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Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(VDD = VDDIO = 2.5V, INT1, INT2, TA = -40C to +85C, SDA and SCL are unconnected, unless otherwise noted. Typical values are
at TA = +25C).
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SUPPLY AND CONSUMPTION
VDD Supply Voltage VDD 1.71 2.5 3.6 V
VDD +
VDDIO (Note 2) VDDIO 1.71 2.5 V
0.3V
IDD Current Consumption
IVDDN 5.4 mA
Normal Mode
IDD Current Consumption Standby
IVDDS 2.7 mA
Mode (Note 3)
IDD Current Consumption 200Hz ODR 3.3 mA
IVDDT
Eco Mode (Note 4) 100Hz ODR 3.0 mA
IDD Current Consumption
IVDDP 8.5 A
Power Down Mode
TEMPERATURE SENSOR
Temperature Sensor Output 8 bit 1 digit/C
TSDR
Change vs. Temperature 16 bit 256 digit/C
Temperature BW TBW 1 Hz
At TA = +25C, 8 bit 25
Temperature Sensor Bias TBIAS digit
At TA = +25C, 16 bit 6400
GYROSCOPE
31.25
62.5
Gyro Full-Scale Range GFSR User selectable dps
125
250
CS
tH_CS
CLK
1 2 8 9 10
tC_CLK
tSU_SI
SDI
HI-Z HI-Z
SDO
CS
tH_CS
CLK 1 2 8 9 10
tC_CLK
tSU_SI
HI-Z
SDI
tH_SI
SDO HI-Z
MAX21000 toc02
MAX21000 toc03
20k 20k 20k
TA = -40C
DIGITAL OUTPUT (LSb)
0 TA = +25C 0 TA = +25C 0
MAX21000 toc05
MAX21000 toc06
BW = 400Hz
0.8 -10
0
0.6 -20
0.4 Y -10 -30
ZERO-RATE (dps)
MAGNITUDE (dB)
X
PHASE (deg)
0.2 BW = 10Hz
BW = 10Hz -40
0 -20 BW = 100Hz BW = 100Hz
-50
-0.2 BW = 400Hz
-30 -60
-0.4 Z
-0.6 -70
-40
-0.8 -80
-1.0 -50 -90
1.6 2.1 2.6 3.1 3.6 1 10 100 1000 0 100 200 300 400 500
POWER SUPPLY (V) FREQUENCY (Hz) FREQUENCY (Hz)
Pin Configuration
TOP VIEW
N.C.
VDD
VDD
+
16 15 14
VDDIO 1 13 RESERVED
N.C. 2 12 DSYNC
SCL_CLK 4 10 RESERVED
GND 5 9 INT2
6 7 8
SDA_SDI_O
SA0_SDO
CS
LGA
(3mm x 3mm)
Pin Description
PIN NAME FUNCTION
1 VDD_IO Interface and Interrupt Pad Supply Voltage
2, 3, 16 N.C. Not Internally Connected
SPI and I2C Clock. When in I2C mode, the IO has selectable antispike filter and delay to ensure
4 SCL_CLK
correct hold time.
5 GND Power-Supply Ground.
SPI In/Out Pin and I2C Serial Data. When in I2C mode, the IO has selectable antispike filter and
6 SDA_SDI_O
delay to ensure correct hold time.
7 SA0_SDO SPI Serial Data Out or I2C Slave Address LSB
8 CS SPI Chip Select/Serial Interface Selection
9 INT2 Second Interrupt Line
10 RESERVED Must Be Connected to GND
11 INT1 First Interrupt Line
Data Synchronization Pin. Used to wake up the MAX21000 from power down/standby and
12 DSYNC
synchronize data with GPS/camera.
13 RESERVED Leave Unconnected
14 VDD Analog Power Supply. Bypass to GND with a 0.1F capacitor and one 1F.
15 VDD Must be tied to VDD in the application.
Functional Diagram
TIMER
MEMS MAX21000
GYRO
SENSE SCL_CLK
FILTERING
SDA_SDI_O
A AFE SPI/I2C
SA0_SDO
SLAVE
REGISTERS CS
AND
A AFE FIFO
GYRO DSYNC
SYNC
DRIVE
A AFE CONTROL
INT1
INTERRUPTS INT2
RING
OSCILLATOR
Detailed Description power the MEMS gyroscope, the MAX21000 can not only
The MAX21000 is a low power, low voltage, small operate at 1.71V but that supply can also be provided by
package three-axis angular rate sensor able to provide a switching regular, to minimize the system power con-
unprecedented accuracy and sensitivity over temperature sumption.
and time. Power-supply current (mA): This parameter defines the
The IC is also the industrys first gyroscope available in a typical current consumption when the MEMS gyroscope
3mm x 3mm package and capable of working with a sup- is operating in normal mode.
ply voltage as low as 1.71V. Power-supply current in standby mode (mA): This
It includes a sensing element and an IC interface that parameter defines the current consumption when the
provides the measured angular rate to the external world MEMS gyroscope is in Standby mode. To reduce power
through a digital interface (I2C/SPI). consumption and have a faster turn-on time, in Standby
mode only an appropriate subset of the sensor is turned off.
The IC has a full scale of 250/500/1k/2k dps for UI
and 31.25/62.5/125/250 dps for OIS. It measures Power-supply current in eco mode (mA): This param-
rates with a user-selectable bandwidth. eter defines the current consumption when the MEMS
gyroscope is in a special mode named eco mode. While
The IC is available in a 3mm x 3mm x 0.9 mm plastic land in eco mode, the MAX21000 reduces significantly the
grid array (LGA) package and operates over the -40C to power consumption, at the price of a slightly higher rate
+85C temperature range. noise density.
See the Definitions section for more information. Power-supply current in power-down mode (A):
This parameter defines the current consumption when
Definitions the MEMS gyroscope is powered down. In this mode,
Power supply (V): This parameter defines the operating both the mechanical sensing structure and reading chain
DC power-supply voltage range of the MEMS gyroscope. are turned off. Users can configure the control register
Although it is always a good practice to keep VDD clean through the I2C/SPI interface for this mode. Full access
with minimum ripple, unlike most of the competitors, to the control registers through the I2C/SPI interface is
who require an ultra-low noise, low-dropout regulator to guaranteed also in power-down mode.
Full-scale range (dps): This parameter defines the mea- Three-Axis MEMS Gyroscope with 16-Bit ADCs
surement range of the gyroscope in degrees per second and Signal Conditioning
(dps). When the applied angular velocity is beyond the The IC consists of a single-drive vibratory MEMS gyro-
full-scale range, the gyroscope output signal is saturated. scope that detects rotations around the X, Y, and Z axes.
Zero-rate level (dps): This parameter defines the zero- When the gyroscope rotates around any of the sensing
rate level when there is no angular velocity applied to the axes, the Coriolis Force determines a displacement, which
gyroscope. can be detected as a capacitive variation. The resulting
signal is then processed to produce a digital stream pro-
Sensitivity (digit/dps): Sensitivity (digit/dps) is the rela- portional to the angular rate. The analog-to-digital con-
tionship between 1 LSB and dps. It can be used to version uses 16-bit ADC converters. The gyro full-scale
convert a digital gyroscopes measurement in LSBs to range can be digitally programmed to 250, 500, 1000
angular velocity. or 2000 dps in UI mode and 31.25/62.5/125/250
Sensitivity change vs. temperature (%): This parameter dps in OIS mode.
defines the sensitivity change in percentage (%) over the
Interrupt Generators
operating temperature range specified in the data sheet.
The MAX21000 offers two completely independent inter-
Zero-rate level change vs. temperature (dps): This rupt generators to ease the SW management of the inter-
parameter defines the zero-rate level change in dps over rupt generated. For instance, one line could be used to
the operating temperature range. signal a DATA_READY event whilst the other line might
Non-linearity (% FS): This parameter defines the maxi- be used, for instance, to notify the completion of the inter-
mum error between the gyroscopes outputs and the best- nal startup sequence.
fit straight line in percentage with respect to the full-scale Interrupt functionality can be configured through the
(FS) range. Interrupt Configuration registers. Configurable items
System bandwidth (Hz): This parameter defines the include the INT pin level and duration, the clearing
frequency of the angular velocity signal from DC to the method, as well as the required triggers for the interrupts.
built-in bandwidth (BW) that the gyroscopes can measure. The interrupt status can be read from the Interrupt Status
A dedicated register can be modified to adjust the gyro- Registers. The event that has generated an interrupt is
scopes bandwidth. available in two forms: latched and unlatched.
Rate noise density (dps/Hz): This parameter defines Interrupt sources can be enabled/disabled and cleared indi-
the standard resolution that users can get from the gyro- vidually. The list of possible interrupt sources includes the
scopes outputs together with the BW parameter. following conditions: DATA_READY, FIFO_READY, FIFO_
THRESHOLD, FIFO_OVERRUN, RESTART, DSYNC.
MAX21000 Architecture
The interrupt generation can also be configured as
The MAX21000 comprises the following key blocks and latched, unlatched, or timed with programmable length.
functions: When configured as latched, the interrupt can be cleared
Three-axis MEMS rate gyroscope sensor with 16-bit by reading the corresponding status register (clear-on-
ADCs and signal conditioning read) or by writing an appropriate mask to the status
Primary I2C and SPI serial communications interfaces register (clear-on-write).
Sensor data registers Digital-Output Temperature Sensor
FIFO A digital output temperature sensor is used to measure
Synchronization the IC die temperature. The readings from the ADC can
Interrupt generators be accessed from the Sensor Data registers.
Digital output temperature sensor The temperature data is split over 2 bytes. For faster and
Self-test less accurate reading, accessing the MSB allows to read
the temperature data as an absolute value expressed in
Celsius degrees (C). By reading the LSB, the accuracy
is greatly increased, up to 256 digit/C.
If used as MS bit, when 1, the address remains Bits 815: data DO[7:0] (read mode). This is the data
unchanged in multiple read/write commands. When 0, that is read from the device (MSb first).
the address is autoincremented in multiple read/write Bits 16... : data DO[...8]. Further data in multiple
commands. byte reading.
Bits 27: Address AD[5:0]. This is the address field of 4) After 16 clock cycles, the master can drive CS high to
the indexed register. deselect the IC, causing it to three-state its SDO out-
Bits 815: Data DI[7:0] (write mode). This is the data put. The falling edge of the clock puts the MSB of the
that is written to the device (MSb first). next data byte in the sequence on the SDO output.
Bits 815: Data DO[7:0] (read mode). This is the data 5) By keeping CS low, the master clocks register data
that is read from the device (MSb first). bytes out of the IC by continuing to supply SCL_CLK
pulses (burst mode). The master terminates the trans-
SPI Half- and Full-Duplex Operation fer by driving CS high. The master must ensure that
The IC can be programmed to operate in half-duplex (a SCL_CLK is in its inactive state at the beginning of the
bidirectional data pin) or full-duplex (one data-in and one next access (when it drives CS low).
data-out pin) mode. The SPI master sets a register bit
called SPI_3_WIRE into ITF_OTP to 0 for full-duplex, and
1 for half-duplex operation. Full duplex is the power-on
default.
Writing to the SPI Slave Interface (SDI) Bit 0: READ bit. The value is 1.
The SPI master writes data to the IC slave interface Bit 1: MS bit. When 1, do not increment address.
through the following steps: When 0, increment address in multiple readings.
1) The SPI master sets the clock to its inactive state. Bit 27: Address AD[5:0]. This is the address field of
When CS is high, the master can drive the SDI input. the indexed register.
2) The SPI master selects the MAX21000 by driving CS low. Bit 815: data DO[7:0] (read mode). This is the data
3) The SPI master simultaneously clocks the command that is read from the device (MSb first). Multiple read
byte into the IC. The SPI write command is performed command is also available in 3-wire mode.
with 16 clock pulses. Multiple byte write command is Sensor Data Registers
performed adding blocks of 8 clock pulses at the previ-
The sensor data registers contain the latest gyroscope
ous one.
and temperature measurement data.
Bit 0: WRITE bit. The value is 0.
They are read-only registers and are accessed through
Bit 1: MS bit. When 1, do not increment address, the serial interface. Data from these registers can be read
when 0, increment address in multiple writing. anytime. However, the interrupt function can be used to
Bits 27: address AD[5:0]. This is the address field of determine when new data is available.
the indexed register.
FIFO
Bits 815: data DI[7:0] (write mode). This is the data The IC embeds a 256-slot of a 16-bit data FIFO for each
that is written inside the device (MSb first). of the three output channels: yaw, pitch, and roll. This
Bits 16... : data DI[...8]. Further data in multiple byte allows a consistent power saving for the system since the
writing. host processor does not need to continuously poll data
4) By keeping CS low, the master clocks data bytes into from the sensor, but it can wake up only when needed
the IC by continuing to supply SCL_CLK pulses (burst and burst the significant data out from the FIFO. When
mode). The master terminates the transfer by driving configured in Snapshot mode, it offers the ideal mecha-
CS high. The master must ensure that SCL_CLK is nism to capture the data following a Rate Interrupt event.
inactive at the beginning of the next access (when it This buffer can work according to four main modes: off,
drives CS low). In full-duplex mode, the IC outputs normal, interrupt, and snapshot.
data bits on SDO during the first 8 bits (the command Both Normal and Interrupt modes can be optionally
byte), and subsequently outputs zeros on SDO as the configured to operate in overrun mode, depending on
SPI master clocks bytes into SDI. whether, in case of buffer under-run, newer or older data
Half-Duplex Operation are lost.
When the SPI master sets SPI_3_WIRE = 1, the IC is put Various FIFO status flags can be enabled to generate
into half-duplex mode. In half-duplex mode, the IC three- interrupt events on INT1/INT2 pin.
states its SDO pin and makes the SDI pin bidirectional,
FIFO Off Mode
saving a pin in the SPI interface. The SDO pin can be left
unconnected in half-duplex operation. The SPI master In this mode, the FIFO is turned off; data are stored only
must operate the SDI pin as bidirectional. It accesses a in the data registers and no data are available from the
IC register as follows: the SPI master sets the clock to its FIFO if read.
inactive state. While CS is high, the master can drive the When the FIFO is turned off, there are essentially two
SDI pin to any value. options to use the device: synchronous and asynchro-
1) The SPI master selects the IC by driving CS low and nous reading.
placing the first data bit (MSB) to write on the SDI Synchronous Reading
input. In this mode, the processor reads the data set (e.g., 6
2) The SPI master turns on its output driver and clocks the bytes for a 3 axes configuration) generated by the IC
command byte into the IC. The SPI read command is every time that DATA_READY is set. The processor must
performed with 16 clock pulses: read once and only once the data set in order to avoid
data inconsistencies.
Benefits of using this approach include the perfect recon- data rate (ODR).
struction of the signal coming the gyroscope and mini- When FIFO is full, an interrupt can be generated.
mum data traffic.
When FIFO is full, all the new incoming data is dis-
Asynchronous Reading charged. Reading only a subset of the data already
In this mode, the processor reads the data generated by stored into the FIFO keeps locked the possibility
the IC regardless the status of the DATA_READY flag. To for new data to be written.
minimize the error caused by different samples being read Only if all the data are read, the FIFO restarts sav-
a different number of times, the access frequency to be ing data.
used must be much higher than the selected ODR (e.g.,
If communication speed is high, data loss can be
10x). This approach normally requires a much higher BW.
prevented.
FIFO Normal Mode To prevent a FIFO-FULL condition, the required
Overrun = false condition is to complete the reading of the data set
FIFO is turned on. before the next DATA_READY occurs.
FIFO is filled with the data at the selected output If this condition is not guaranteed, data can be lost.
(WP-RP)
=
LEVEL
(WP-RP)
= THRESHOLD THRESHOLD THRESHOLD
LEVEL
0 0 0
When FIFO is full, the oldest data is overwritten- When a rate interrupt (either OR or AND) is gener-
with the new ones. ated, the FIFO is turned on automatically. It stores
the data at the selected ODR.
If communication speed is high, data integrity can
be preserved. When FIFO is full, all the new incoming data is dis-
charged. Reading only a subset of the data already
To prevent a DATA_LOST condition, the required stored into the FIFO keeps locked the possibility
condition is to complete the reading of the data set for new data to be written.
before the next DATA_READY occurs.
Only if all the data are read, the FIFO restarts sav-
If this condition is not guaranteed, data can be ing data.
overwritten.
If communication speed is high, data loss can be
When an overrun condition occurs the reading prevented.
pointer is forced to writing pointer -1 to ensure only
older data are discarded and newer data have a To prevent a FIFO-FULL condition, the required
chance to be read. condition is to complete the reading of the data set
before the next DATA_READY occurs.
If this condition is not guaranteed, data can be lost.
RP
WP
WP THRESHOLD THRESHOLD
THRESHOLD
RP
WP
RP
MAX
LEVEL
0
(WP-RP)
=
LEVEL
MAX
LEVEL
0
RP
WP
WP THRESHOLD THRESHOLD
THRESHOLD
RP
WP = RP
Snapshot Mode stored into the FIFO keeps locked the possibility
FIFO is initially in normal mode with overrun for new data to be written.
enabled. Only if all the data are read the FIFO restarts sav-
When a Rate Interrupt (either OR or AND) is gen- ing data.
erated, the FIFO switches automatically to not- If communication speed is high, data loss can be
overrun mode. It stores the data at the selected prevented.
ODR until the FIFO becomes full. To prevent a FIFO_FULL condition, the required
When FIFO is full, an interrupt can be generated. condition is to complete the reading of the data set
When FIFO is full, all the new incoming data is dis- before the next DATA_READY occurs.
charged. Reading only a subset of the data already If this condition is not guaranteed, data can be lost.
RP
WP
WP THRESHOLD THRESHOLD
THRESHOLD
RP
WP
RP
RATE INTERRUPT
SNAPSHOT CAPTURED
MAX MAX MAX
(WP-RP)
=
LEVEL
(WP-RP)
=
LEVEL
Register File addresses in the 0x00 to 0x3F range even though the
The register file is organized per banks. On the common number of physical registers is in excess of 64.
bank are mapped addresses from 0x20 to 0x3F and Common Bank
these registers are always available. It is possible to map
The common is the bank whose locations are always
on addresses 0x00 to 0x1F two different user banks by
available regardless the register bank selection.
properly programming address 0x21. The purpose of this
structure is to limit the management of the register map This bank contains all the registers most commonly used,
including data registers and the FIFO data.
User Bank 0
User bank 0 is the register used to configure most of the features of the IC, with the exception of the interrupts, which
are part of the user bank 1.
User Bank 1
User Bank 1 is primarily devoted to the configuration of the interrupts. It also contains the unique serial number.
TIMER
MEMS MAX21000
GYRO
SENSE SCL_CLK
FILTERING
SDA_SDI_O
A AFE SPI/I2C
SA0_SDO
SLAVE
REGISTERS CS
AND
A AFE FIFO AP
GYRO DSYNC
SYNC
DRIVE
A AFE CONTROL
INT1
INTERRUPTS INT2
RING
OSCILLATOR
PMIC
100nF 1F
Package Information
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a +,
#, or - in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Revision History
REVISION REVISION PAGES
DESCRIPTION
NUMBER DATE CHANGED
0 12/12 Initial release
Updated Benefits and Features section, updated gyro full-scale range typ values,
updated phase delay conditions, updated sensitivity conditions, updated sensitivity
drift over temperature conditions, updated SPI limits, added Notes 9 and 10, updated
1, 310,
1 2/13 SPI Timing Diagrams, removed I2C Timing Diagrams, updated TOC 4, updated Pin
12, 19, 23
Description, updated Definitions section, updated SPI Interface section, removed
Revision ID, Clocking, and Layout, Grounding, and Bypassing sections, and added
Soldering Information section
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrateds website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. 2013 Maxim Integrated Products, Inc. 26