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Experiment 9

Interrupts and ISR Programming

Lab Objective

In this lab we will learn to configure the interrupts in Cortex-M4 based Stellaris microcontroller.
We will configure an interrupt for push button connected to pin 4 of GPIO port F.

Interrupt Control in Cortex-M4

LM4F120H5QR implements Nested Vectored Interrupt Controller to handle the interrupts. All
the exceptions and interrupts are processed in handler mode. The processor returns to the
thread mode when it is finished with all exception processing. The processor automatically
saves its current state to the stack when it accepts an interrupt to be serviced. The state is
automatically restored from the stack upon the exit from the interrupt service routine(ISR).
When an interrupt occurs, state saving and vector fetch are performed in parallel reducing
interrupt latency and enabling efficient interrupt entry.

Software can set eight priority levels(0 to 7; a higher level corresponds to a lower priority, i.e.,
level 0 is the highest interrupt priority) on seven exceptions(such as, reset, software interrupt,
hardware interrupt, bus fault, etc.) and 65 interrupts.

When an exception occurs and it is accepted by processor core, the corresponding interrupt
service routine is executed. Starting address of each exception is loaded from the vector table
which is an array of word-sized data. Each entry in the vector table points to the starting
address of one exception. The vector table is located at address 0x0000.0000 after reset.

Every exception handler is located at the address obtained by multiplying the corresponding
interrupt number with 4. For example, if the reset is exception type 1, the address of the reset
vector is 1 times 4 (each word is 4 bytes), which equals 0x00000004, and NMI vector (type 2)
is located in 2 4 = 0x00000008. The entries of this vector table are given in table 2-8 and 2-9
of datasheet.

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86 CHAPTER 11. EXTERNAL/INTERNAL INTERRUPTS AND ISR PROGRAMMING

Enabling an Interrupt

To activate an interrupt source, following two steps must be followed:

1. Enable the source from the corresponding NVIC enable register [pg. 139].

2. Set the priority for that interrupt. [pg. 149]

For better understanding, we discuss the example of enabling the interrupt for Port F. Follow
the following steps to activate the interrupt for port F.

1. Find the interrupt number (i.e., bit position in interrupt register) from Table 2-9 (2nd
column) on pg.101 corresponding to GPIO Port F.

2. Find the interrupt register that is needed to enable IRQ30 from Table 3-8 (pg.131). It is
NVIC EN0 R. So, it tells you that you need to set bit 30 of NVIC EN0 R to 1 to enable
interrupt on Port F.

3. From Table 3-8, find the register needed to set the priority of IRQ 30. It is NVIC PRI7 R.
To set a priority value, say 5, you may use the following statement in C:

NVIC PRI7 R = ( NVIC PRI7 R & 0xFF00FFFF ) | 0 x00A00000 ;

Configuring GPIO as Interrupt

To configure GPIO pin as interrupt and select the source of the interrupt, its polarity and edge
properties following steps must be followed:

1. Disable the interrupts before writing to the control registers.

2. Select whether the source of interrupt is edge-sensitive or level sensitive using GPIO
Interrupt Sense register (GPIOIS).[pg.623]

3. To enable interrupts for both edges write the appropriate value in the GPIO Interrupt
Both Edges register(GPIOIBE). [pg.624]

4. Write the appropriate value in GPIO Interrupt Event register (GPIOIEV) to configure
the corresponding pin to detect rising or falling edges depending on the corresponding bit
value in the GPIO Interrupt Sense (GPIOIS) register. [pg. 625]

5. Clear the interrupt flag for the corresponding pin by asserting the appropriate bit in the
GPIO Interrupt Clear Register (GPIOICR). [pg. 629]

6. Enable the interrupts by asserting the corresponding bits in GPIO Interrupt Mask register
(GPIOIM). [pg. 626]
87

Source Code

Following code blinks LEDs of different colours on switch press. Understand the code and com-
plete the missing portions. Consult the datasheet for complete understanding of the code.
1 // User button c o n n e c t e d t o PF4
2 // ( t u r n on d i f f e r e n t LEDs on f a l l i n g edge o f button p r e s s )
3
4
5 #d e f i n e SYSCTL RCGCGPIO R ( ( ( v o l a t i l e u n s i g n e d l o n g ) 0 x400FE608 ) )
6
7 // IRQ 0 t o 31 S e t Enable R e g i s t e r
8 #d e f i n e NVIC EN0 R ( ( ( v o l a t i l e u n s i g n e d l o n g ) 0 xE000E100 ) )
9 // IRQ 28 t o 31 P r i o r i t y R e g i s t e r
10 #d e f i n e NVIC PRI7 R ( ( ( v o l a t i l e u n s i g n e d l o n g ) 0xE000E41C ) )
11
12 #d e f i n e GPIO PORTF DATA R ((( volatile unsigned long ) 0x400253FC ) )
13 #d e f i n e GPIO PORTF DIR R ((( volatile unsigned long ) 0 x40025400 ) )
14 #d e f i n e GPIO PORTF DEN R ((( volatile unsigned long ) 0 x4002551C ) )
15 #d e f i n e GPIO PORTF PUR R ((( volatile unsigned long ) 0 x40025510 ) )
16
17 #d e f i n e GPIO PORTF IS R ((( volatile unsigned long ) 0 x40025404 ) )
18 #d e f i n e GPIO PORTF IBE R ((( volatile unsigned long ) 0 x40025408 ) )
19 #d e f i n e GPIO PORTF IEV R ((( volatile unsigned long ) 0 x4002540C ) )
20 #d e f i n e GPIO PORTF IM R ((( volatile unsigned long ) 0 x40025410 ) )
21 #d e f i n e GPIO PORTF ICR R ((( volatile unsigned long ) 0 x4002541C ) )
22
23 #d e f i n e NVIC EN0 INT30 // I n t e r r u p t 30 e n a b l e
24 #d e f i n e PORTF CLK EN // Clock e n a b l e f o r Port F
25 #d e f i n e LEDs // Enable LEDs
26 #d e f i n e SW1 // Enable u s e r s w i t c h SW1
27 #d e f i n e INT PF4 // I n t e r r u p t a t PF4
28
29
30 v o i d E n a b l e I n t e r r u p t s ( v o i d ) ; // D i s a b l e i n t e r r u p t s
31 v o i d D i s a b l e I n t e r r u p t s ( v o i d ) ; // Enable i n t e r r u p t s
32 v o i d Init INT GPIO ( v o i d ) ; // I n i t i a l i z e GPIO and I n t e r r u p t s
33 v o i d Delay ( u n s i g n e d l o n g v a l u e ) ; // Implements d e l a y
34 v o i d W a i t F o r I n t e r r u p t ( v o i d ) ;
35
36 v o l a t i l e u n s i g n e d l o n g i = 0 ;
37
38 v o i d Init INT GPIO ( v o i d ) {
39 v o l a t i l e unsigned d e l a y c l k ;
40
41 SYSCTL RCGCGPIO R |= PORTF CLK EN ; // Enable c l o c k f o r PORTF
42 d e l a y c l k = SYSCTL RCGCGPIO R ; //dummy r e a d t o s t a b l e t h e c l o c k
43
88 CHAPTER 11. EXTERNAL/INTERNAL INTERRUPTS AND ISR PROGRAMMING

44 //GPIO
45 GPIO PORTF DEN R |= (SW1| LEDs) ; // Enable d i g i t a l I /O on PF4 , PF3 PF1
46 GPIO PORTF DIR R = ; //Make PF4 i n p u t and PF3 PF1 output
47 GPIO PORTF PUR R |= SW1; // Enable weak p u l l up on PF4
48
49 //INTERRUPT
50 DisableInterrupts () ;
51 GPIO PORTF IS R &= INT PF4 ; //PF4 i s edge s e n s i t i v e
52 GPIO PORTF IBE R &= INT PF4 ; //PF4 i s not both e d g e s
53 GPIO PORTF IEV R &= INT PF4 ; //PF4 i s f a l l i n g edge
54 GPIO PORTF ICR R |= INT PF4 ; // C l e a r i n t e r r u p t f l a g f o r PF4
55 GPIO PORTF IM R |= INT PF4 ; // Enable i n t e r r u p t on PF4
56
57 NVIC PRI7 R = ; // S e t PF4 p r i o r i t y 5
58 NVIC EN0 R = NVIC EN0 INT30 ; // Enable i n t e r r u p t 30 i n NVIC
59 EnableInterrupts () ;
60
61 }
62
63 v o i d Delay ( u n s i g n e d l o n g v a l u e ) {
64 unsigned long i = 0 ;
65
66 f o r ( i =0; i < v a l u e ; i ++) ;
67 }
68
69 v o i d GPIOPortF Handler ( v o i d ) {
70 int j ;
71 GPIO PORTF ICR R = INT PF4 ;
72
73 i f ( i ==3)
74 i = 1;
75 else
76 i ++;
77 f o r ( j = 0 ; j < 2 ; j ++)
78 {
79 GPIO PORTF DATA R = 1<< i ;
80 Delay ( 1 0 0 0 0 0 0 ) ;
81 }
82 }
83
84 i n t main ( ) {
85 Init INT GPIO ( ) ;
86 while (1)
87 {
88 WaitForInterrupt ( ) ;
89 }
90 }

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