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1 History
Seymour Cray's CDC 6600 from 1966 is often mentioned
as the rst superscalar design. The Motorola MC88100
(1988), the Intel i960CA (1989) and the AMD 29000-
series 29050 (1990) microprocessors were the rst com-
Processor board of a CRAY T3e supercomputer with four super-
mercial single-chip superscalar microprocessors. RISC
scalar Alpha 21164 processors microprocessors like these were the rst to have super-
scalar execution, because RISC architectures frees tran-
A superscalar processor is a CPU that implements a sistors and die area which could be used to include mul-
tiple execution units (this was why RISC designs were
form of parallelism called instruction-level parallelism
within a single processor. It therefore allows for more faster than CISC designs through the 1980s and into the
1990s).
throughput (the number of instructions that can be exe-
cuted in a unit of time) than would otherwise be possible Except for CPUs used in low-power applications,
at a given clock rate. A superscalar processor can exe- embedded systems, and battery-powered devices, essen-
cute more than one instruction during a clock cycle by tially all general-purpose CPUs developed since about
simultaneously dispatching multiple instructions to dif- 1998 are superscalar.
ferent execution units on the processor. Each execution The P5 Pentium was the rst superscalar x86 proces-
unit is not a separate processor (or a core if the proces- sor; the Nx586, P6 Pentium Pro and AMD K5 were
sor is a multi-core processor), but an execution resource among the rst designs which decode x86-instructions
within a single CPU such as an arithmetic logic unit. asynchronously into dynamic microcode-like micro-op
In Flynns taxonomy, a single-core superscalar proces- sequences prior to actual execution on a superscalar
sor is classied as an SISD processor (Single Instruction microarchitecture; this opened up for dynamic scheduling
stream, Single Data stream), though many superscalar of buered partial instructions and enabled more paral-
processors support short vector operations and so could lelism to be extracted compared to the more rigid meth-
be classied as SIMD (Single Instruction stream, Mul- ods used in the simpler P5 Pentium; it also simplied
tiple Data streams). A multi-core superscalar processor speculative execution and allowed higher clock frequen-
is classied as an MIMD processor (Multiple Instruction cies compared to designs such as the advanced Cyrix
streams, Multiple Data streams). 6x86.
1
2 4 ALTERNATIVES
5 See also
Out-of-order execution
Super-threading
Shelving buer
6 References
8.2 Images
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License: CC BY-SA 2.5 Contributors: Own work Original artist: Hannes Grobe & Chresten Wbber, Alfred Wegener Institute for Polar
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