Professional Documents
Culture Documents
QUESTION BANK
CHAPTER 1: ANALOG ELECTRONICS
THEORY QUESTIONS
2. Explain the forward bias and reverse bias of single PN junction diode indicating barrier potential.
3. Explain the VI characteristics of silicon diode.
4. Explain the VI characteristics of germanium diode.
5. Construct a DC load line on forward characteristics of diode D, connected in series with load resistor R L
across DC source. Find the coordinates of Q point and explain the need for DC load line analysis.
6. Explain the significance of reverse recovery time when a pulse is applied across diode. How reverse
recovery time can be minimized?
7. Explain avalanche breakdown and zener breakdown.
8. With the help of block diagram explain different stages of power supply.
9. What is the need for rectifier?
10. What is the significance of transformer in power supply?
DERIVATIONS
1. Derive an expression for average load current and load voltage of half wave rectifier
2. Derive an expression for average load current and load voltage of center tap full wave rectifier
3. Derive an expression for average load current and load voltage of bridge wave rectifier
4. Derive an expression for RMS load current and RMS load voltage of half wave rectifier
5. Derive an expression for RMS load current and RMS load voltage of center tap full wave rectifier
6. Derive an expression for RMS load current and RMS load voltage of bridge wave rectifier
7. Evaluate ripple factor of a half wave rectifier.
8. Evaluate ripple factor of a center tap full wave rectifier
9. Evaluate ripple factor of a bridge wave rectifier.
10. Prove that peak inverse voltage of half wave rectifier is peak input voltage.
11. Prove that peak inverse voltage of center tap full eave rectifier is twice the peak input voltage.
12. Prove that peak inverse voltage of bridge wave rectifier is peak input voltage.
13. Prove that efficiency =40% for half wave rectifier.
14. Prove that efficiency =80.2% for center tap wave rectifier.
15. Prove that efficiency =80.2% for bridge wave rectifier
PROBLEMS
1. A diode with its forward characteristics as shown below is connected in series with a resistance of 1k and
driven by dc voltage source. Dram DC load line and find co-ordinates of Q point. Draw DC load line and find
coordinates of Q point.
2. Find the load resistance in the circuit shown using the diode forward characterstics provided
6mA
3. Find minimal fall time for voltage pulses applied to a diode with reverse recovery time of 4 ns.
4. Estimate the maximum reverse recovery time for a diode for an input pulse with 0.5s fall time.
5. A FWR with capacitor is supplying resistive load of 1k. If the filter capacitor is 500F. Calculate
ripple factor.
6. In a FWR, the input is 30-0-30 v transformer. The load and diode forward resistance are 100 and
10 respectively. Calculate average voltage, rectification efficiency and percentage regulation
7. A FWR with capacitor is supplying resistive load fo 400 in parallel with a capacitor 500F. If the
AC supply voltage is 230sin314t V. Calculate ripple factor and DC current.
10. A diode with Vf=0.7v is connected as a half wave rectifier. The load resistance is 600 and the (rms)
AC input is 24v. Determine the peak output voltage, the peak current and peak reverse voltage.
a). 0.7 b). 0.3 c). 1.0 d). 0.1 Ans - 0.3
3). The PIV is the maximum reverse voltage that can be applied to a diode without
a) Burnout b) Destruction c) Overheating d). Charging
Ans b).Destruction
a). Decrease with temperature b). is due to majority carriers c). depends on the method of its fabrication
d). is in the range of mili- Amp or Micro Amp
Ans - is in the range of mili - Amp or Micro Amp
a). an OFF switch b). a high resistance c). a Capacitor d). an ON Switch
Ans - An ON Switch
a). its bulk resistance increases b). its junction resistance predominates c). it acts like a closed switch d). it
behaves a clippe Ans b).Its junction resistance predominates
a). During the manufacturing process b). When forward bias is applied to it c). Under reverse Bias d). When
its temperature is reduced
a). Decreases with light Doping b). Increases with heavy Doping c). is independent of the applied voltage d).
is increased under Reverse bias
9). Point out the WORNG statement. Barrier potential of a P-N Junction is a function of
a). Diode design b). Temperature c). Forward bias d) Doping density
10). The width of depletion region of an unbiased P-N junction is about a few
Ans c) cm
1. Explain the word transistor. Clearly show the biasing arrangement of the PNP an NPN transistor for
conduction.
2. Give the concept of DC load line.
3. With a neat sketch, clearly show the various current components in a PNP transistor and hence establish
the relevant equations.
4. Sketch and explain the current components in transistor. Hence define emitter efficiency, transport factor
and large signal current gain.
5. What are the three regions of operation of a BJT? What are the biasing conditions for each of these
regions? Mention the region in which BJT acts as an amplifier.
6. Clearly explain the effect of temperature and (Beta) on the operating point stability.
7. Discuss the causes of bias instability in transistor.
8. Sketch and explain the current components crossing each junction of a transistor biased in the active
region.
9. A transistor is capable of providing amplification. Explain the basic transistor amplifier with suitable
diagrams.
10. Bring out the relationship between (Alpha) (Beta) of transistor.
11. Draw the transistor circuit in CB configuration. Sketch the output characteristics. Indicate active,
saturation and cutoff region. Brief explain the nature of those curves.
12. For a transistor working in CB configuration, explain the input and output characteristics with a
suitable diagrams.
13. Sketch and explain the input and output characteristics of a transistor in CE configuration on the
output characteristics. Clearly indicate the 3 operating regions and mention the biasing requirement for
each.
14. Compare amongst CC, CB, CE configurations of a transistor amplifier in terms of the current gain, the
voltage gain, and the input impedance and output impedance.
15. Draw a fixed bias circuit and explain why the circuit is unsatisfactory if the transistor is replaced by
another of the same type. Derive an expression for its stability factor.
16. Draw the sketch of the output characteristics of a transistor in common emitter configuration? Indicate
various region operation and comment for the shape of characteristics qualitatively.
17. Discuss the causes of unstability in a transistor.
Multiple choice question
1. Explain the concept of Load line in case of transistors and thus discuss the biasing techniques applied to
NPN transistors.
2. What do you mean by stabilization?
3. Define stability factor? Find the relationship between stability factor and Ib? What is its ideal value?
4. Give the essential requirements of stabilization.
5. Derive the stability factor for the feedback resistor circuit.
6. Find the stability factor S for self-biasing circuit?
7. Find the stability factor S for Voltage divider bias circuit
8. Find the stability factor S for fixed bias circuit.
9. Define Operating point. Explain why Operating point should be stable.
10. Determine the operating point for the fixed bias circuit for the following given parameters VCC=12 volts,
RB=240K, RC=2.2K, Beta=50
11. Determine the operating point for the feedback resistor circuit for the following given parameters VCC=12
volts, RB=240K, RC=2.2K, Beta=100,RE=2.2K
12. Determine the operating point for the voltage divider bias circuit for the following given parameters
VCC=12 volts, RE=1.2K, RC=5.6K, Beta=50,R1=82K, R2=22K
13. Design a voltage divider bias circuit if operating point + 10V,2mA and VCC=18V, neglect VBE
14. For the CE circuit RB between base and supply Vcc is 1.5 Mohm, RC between
collector and Vcc is 5 Kohm, Vcc=30volts. Draw the DC load line and mark the dc
operating point on it. Assume =100 and neglect VBE.
Multiple choice questions
Ans - ( 1)
21). In the design of a biasing circuit, the value of collector load RC is determined by
a)VCE consideration b). IB consideration c). VCE consideration d). None of the above
Ans- a). VCE consideration
22). If the value of the IC increases the value of the VCE.
a). remains same b). Decreases c). Increases d). None of the above
Ans - b). Decreases
23). If the value of the Temperature increases the value of the VBE.
a). remains same b). Decreases c). Increases d). None of the above
Ans - b). Decreases
24). The stabilization of operating point in potential divider method is provided by .
a). RE Consideration b). RC Consideration c). VCC Consideration d). None of the above
Ans- a). RE Consideration
25). When the temperature changes , the operating point is shifted due to ..
a). Changes in ICBO b). Changes in Vcc
c). Change in the value of circuit resistances d). None of the above
Ans - a). Changes in ICBO
26). An SCR has . PN Junction.
a). 2 b). 3 c). 4 d). None of the above
Ans- b). 3
CHAPTER 2 : OPERATIONAL AMPLIFIERS
1. Discuss Integrated circuit. Briefly give the classification of digital ICs based on the component
fabrication.
2. Draw the block schematic of an op-Amp and Explain the function of each stage.
3. What are the applications of op-amp.
4. What are the ideal characteristics of op amp.
5. Define and mention the importance of the following terms w.r.t. an op-amp
i) CMRR ii) Slew rate iii) PSSR iv) I/p offset voltage iv) Virtual ground.
6. Define for an op-amp i) CMRR ii) output offset voltage. What are their typical values for a 741 op-amp?
14. Calculate the output voltage of a three input summing amplifier given:
R1= 200 Kohm, R2=250 Kohm, R3=500Kohm, Rf=1Mohm, V1= -2V, V2=+2V,
V3=+1V.
DIGITAL LOGIC
1. State and prove De-Morgans theorem for two variables.
2. Write the symbol, truth table and output expression for i) OR gate
ii) NAND gate iii) EX-OR gate iv) NOR gate v) AND gate vi) NOT gate.
3. Draw and Explain the circuit of current mode logic that works as an OR gate.
4. Realize an OR logic gate using diodes.
5. Explain the operation of NOT gate using a transistor.
6. Realize Ex-OR gate using NOT, OR and AND gates only.
7. Realize an AND logic gate using diodes.
8.Draw the logic circuit of full adder. Write Truth table and expression for a
3 input full adder.
9.Write the truth table of a full adder and explain how it can be constructed
using half adders.
10. Draw the circuit of full adder and write its truth table.
11. Show the logic diagram of a clocked RS flip flop with truth table.
12. Show the logic diagram of a clocked D flip flop with truth table.
13. Show the logic diagram of a clocked JK flip flop with truth table.
14. Show the logic diagram of a master slave flip flop with truth table.
15. Draw the architecture of 8086 and explain the each.
Multiple choice questions
1). A logic gate is an electronic circuit which
a). makes a logic decisions b). allows electron flow only in one direction
c). works on binary algebra d). alternate between 0 and 1 values.
Ans - a). makes a logic decisions
2). In positive logic, logic state 1 corresponds to a). Positive voltage b). higher voltage level c). zero
voltage level d). lower voltage level.
Ans - b). higher voltage level
a).Negative voltage b). more Negative voltage c). zero voltage level d). lower voltage level.
Ans - d). lower voltage level.
20). The given Boolean expression is Y AB AB if A=1 abd B=1 then Y=--
a). 1 b). 0 c). either 1 or 0 d). Non of the above
Ans - b). 0
8. For an AM wave, derive the expressions for modulation index and total power
contained in AM wave.
9. Obtain an expression for the total output power of the amplitude double side
band signal.
10.Explain the principle of frequency modulation. Draw the frequency spectrum
of FM wave.
11. What are the advantages of FM system over AM system? Make a critical
comparison.
12. Bring out the merits and demerits of AM and FM.
CHAPTER 5 : TRANSDUCERS