RECTIFIER PROBLEMS

1) Design a half-wave diode rectifier to the following (nominal) specifications:

12 V peak, 60 Hz supply voltage
1 K load resistance
P-P ripple < 1 volt

Answer The ratio of the peak-peak ripple to the sinusoidal peak voltage is:
P-P ripple/Vp 2/(RC)
The rectified voltage peak 12-0.7 = 11.3 volt.
P-P ripple 11.3 (2/RC). For P-P ripple < 1 estimate C > 188 F will suffice.

The conduction angle is found from:

2 4/RC = 0.17 for C = 200F, and = 0.41 radian ( 23 )

The computed rectified output (netlist on the right) is plotted below showing the initial charging of the
capacitor (from an initial uncharged condition).

The diode current pulse also is compared (below) with the load current. Note that the load current
magnitude is multiplied by a factor of 50 for convenience. The load current is approximately 10ma,
whereas the initial current spike is nearly one ampere.
*Half Wave Rectifier Netlist
VSINE 1 0 SIN(0 12 60)
D1 1 2 D1N4004
RL 2 0 1K
CF 2 0 200U
.MODEL D1N4004 D(Is=14.11n N=1.984
+Rs=33.89m Ikf=94.81 Xti=3 Eg=1.11
+ Cjo=25.89p M=.44 Vj=.3245 Fc=. Bv=600 +Ibv=10u Tt=5.7u)
.TRAN .2m 30m
.PROBE
.END

Introductory Electronics Notes 22-1 Copyright M H Miller: 2000

The University of Michigan-Dearborn revised
2) See 0022-Diodes (Rectifier); this is a worked-out illustration.

3) The voltage 'doubler' circuit drawn to the right operates by

enabling C2 to be continually charged, but preventing it from
being discharged. Assume for simplicity that idealized diodes
are used. Apply a V volt square wave to the circuit

For convenient reference number the half-periods

consecutively from 0, starting with a negative half-period.
Consider the nth negative half-period (so that n is zero or even); C1 charges rapidly through the low
resistance path provided by D1 to V. Note that D2 isolates C2, so that the voltage across C2 does
not change during the negative half-period from what it was during the preceding positive half-
period, i.e., e2(n) = e2(n-1). The circuit during the nth positive half period is as shown below left.
The net charge at nodes 2-3 is the sum of the charges on C1 and C2, i.e., C1*V + C2*e(n).

During the next, i.e., the (n+1'st) half period the circuit is as shown below, right. Charge on the
capacitors redistributes itself in keeping with the capacitor terminal requirements. Because the total
charge at nodes 2-3 can not change from the previous half cycle it is necessary that

C1*e(n+1) + C2*e(n+2) = C1*V + C2*e(n)

Finally observe from Kirchoff's Voltage Law that e1(n+1) + e2(n+1) = V

From these equations determine that for successive half-periods (positive or negative)

Introductory Electronics Notes 22-2 Copyright M H Miller: 2000

The University of Michigan-Dearborn revised
 The solution to this difference equation (verify by substitution) is

where n is odd. The value of the constant B depends on the initial charge of the capacitors, but in
any event the second term rapidly becomes negligible.

Assume that both C1= 3F and C2 = 1 F are initially uncharged. Compute the charging transient
for a 1 millisecond period, 10 volt square wave. Note the effect of the finite diode forward
voltages.

* Doubler

VS 1 0 PULSE(-10, 10, 0, 1U, 1U, .5M, 1M)

C1 1 2 1U IC=0
D1 0 2 D1N4004
D2 2 3 D1N4004
C2 3 0 3U IC=0

.MODEL D1N4004 D(Is=14.11n N=1.984 Rs=33.89m Ikf=94.81 Xti=3

+ Eg=1.11 Cjo=25.89p M=.44 Vj=.3245 Fc=. Bv=600 Ibv=10u Tt=5.7u)
.LIB EVAL.LIB
.TRAN 10U 20M UIC
.PROBE
.END

4) An Amplitude-Modulated (AM) signal has the form A(1+m sin mt) sin ct , where m < < c
and m 1. One may view this as a carrier sinusoid sin(ct) whose amplitude varies sinusoidally
around a mean value. Transmission of this signal as a radio wave turns out to be more practical than
Introductory Electronics Notes 22-3 Copyright M H Miller: 2000
The University of Michigan-Dearborn revised
 transmission of the modulation signal alone. Demodulation is the process of recovering the
modulation signal, i.e., tracking the varying amplitude of the carrier signal. (In general the
modulation would be a superposition of sinusoids corresponding, for example, to speech.)
Demodulation may be done by rectifying the carrier signal to obtain a unipolar half-wave signal
whose envelop is the desired modulation signal, and then filtering to maintain the signal during the
omitted half-cycle.

An illustrative AM signal is plotted in the figure following. (Actually this is not a good AM signal.
For reasons to appear the carrier frequency should be considerably higher than the modulating
frequency for good AM. However the details of the modulation would be difficult to illustrate
because of the scale difference, and so simply for illustrative purposes the scale is as plotted.
Incidentally the plot is made using the Probe program.)

A half-wave rectifier circuit to perform demodulation is sketched below. The multiple sources reflect
the use of the POLY() controlled source capability of PSpice to simulate a nonlinear waveform, in
this case the AM modulation shown. Refer to the associated netlist for additional details.

As with the voltage rectifier a diode is used to obtain a unipolar waveform whose envelop follows
the modulation signal. Provided certain conditions are met the voltage across the RC filter tracks the
modulation envelop. To filter the carrier properly the time constant should be large compared to the
carrier period; the capacitor then is charged near the peak of each carrier half-cycle, and the
exponential decay is slow enough to hold (closely) to the peak voltage. On the other hand the
capacitor should be able to discharge fast enough to follow the slower changes in the amplitude of
the modulation envelop, i.e., the time constant should be small compared to the modulation period.
(These inequalities are why it is desirable that the carrier frequency be much greater than the highest
modulation frequency used.

Introductory Electronics Notes 22-4 Copyright M H Miller: 2000

The University of Michigan-Dearborn revised
 The netlist for the demodulation circuit follows. Note the use of the POLY() source description to
obtain the modulated signal. An expanded scale plot of part of the signal period shows the
demodulation process. Note that he RC time constant used is not quite small enough to track the
modulation where is changing fastest.

Compute and explore the circuit performance. Change the RC time constant, describe the effect
expected as a consequence of the change, and compare to the computed performance of the circuit.

* DEMODULATION
VCAR 1 0 SIN(0 1 10K )
RCAR 1 0 1
VMOD 2 0 SIN(0 .5 100)
RMOD 2 0 1
ESIG 3 0
+ POLY(2) 1 0 2 0 0 1 0 0 1

D1 3 4 D1N4004
RL 4 0 10K
CL 4 0 0.1U

.MODEL D1N4004 D(Is=14.11n

+N=1.984 Rs=33.89m Ikf=94.81 Xti=3
+ Eg=1.11 Cjo=25.89p M=.44 Vj=.3
.TRAN 1U 20M 0 1U
.PROBE
.END

Introductory Electronics Notes 22-5 Copyright M H Miller: 2000

The University of Michigan-Dearborn revised