consider the atenna control system block diagram, where motor, load and gears has a transfer

function: G1(s)=0.25/s(s+1.5) the power amplifier is described. by 100/s+100 and the preampl.
the design specifications are: ts<1.5s, %OS<1%, ess step=0, ess ramp <2%

A) design a PID compensator to achieve the design specification. provide op-amp circuit
realization for the compensator.

B) design a rate feedback compensator to achieve the design specifications. verify your design
by plotting the step and ramp responses. provide op-amp circuit realization for the compensator.

C) which design would you recommend and why?