El 4651 V4

EPRI EL-4651, Volume 4
Electromagnetic Transients
Program (EMTP)
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ELECTRIC POWER RESEARCH INSTITUTE

EMTP DEVELOPMENT COORDINATION GROUP
L
EPRI LIBRARY
R E P 0 R T SUMMARY
SUBJECTS Power system planning and engineering I Power system operations
TOPICS Transients Substations

Computer simulation Transmission
Power systems EMTP code
AUDIENCE Power system planners I Electrical engineers
Electromagnetic 'D'ansients Program (EMTP)

Volumes 2-4
The complex and versatile EMTP computer program can help utili-
ties analyze electromagnetic transients, which affect the design and
operation of power systems. A workbook published in 1986 intro-
duced basic EMTP concepts. To guide advanced users, EPRI and
the EMTP Development Coordination Group cosponsored the prep-
aration of three workbooks on complicated program applications.
BACKGROUND Studies of electromagnetic transients were traditionally performed with spe-

cial analog computer models known as transient network analyzers (TNAs).
In the late 1960s, the electromagnetic transient program (EMTP) for digital
computers, developed at Bonneville Power Administration (BPA), replaced
TNAs. This versatile program can be very complex. Workbook I, published
in 1986, presented basic concepts about these transients and the use of
the EMTP code, but did not address all program applications. EPRI co-
sponsored an effort to enhance the EMTP code and its documentation with
the EMTP Development Coordination Group (DCG)-composed of BPA, the
Canadian Electric Association, Hydro Quebec, Ontario Hydro, the U.S. Bureau
of Reclamation, and the Western Area Power Administration. Key to this
effort was the development of reference and tutorial material.
OBJECTIVES To provide utilities with tutorial materials on electromagnetic transients; to

illustrate analysis of such transients with the EMTP computer code.
APPROACH To create EMTP workbooks, the project team developed a series of case
studies that gradually introduce more-sophisticated modeling of the power
system . They documented steps for obtaining reasonable values for input
parameters and prepared templates to facilitate data entry. They also formu-
lated problems to increase user proficiency and provided tutorial information
on transients. Participants and instructors from an annual course on the
EMTP code at the University of Wisconsin helped develop and test the work-
books, providing suggestions that were incorporated into the final documents.
RESULTS Building on the information in the first workbook (volume 1 of this series),
workbooks II-IV will enable EMTP users to increase their competence in
this complicated program. Workbook II presents data preparation and
modeling for cables, electromagnetic induction, and frequency-dependent
EPRI EL-4651s Vols. 2-4

lines. Other covered topics include statistical studies using the EMTP
code, circuit breaker models, frequency-dependent source representa-
tion, and insulation coordination. Workbook Ill discusses modeling for
transformers, synchronous machines, and induction motors and de-
scribes subsynchronous resonance. Workbook IV introduces the use
of a model in the EMTP code that simulates the interaction of power
system transients and control systems, the transient analysis control
systems (TACS) model. It outlines basic TACS concepts and discusses
TACS applications such as variable load problems, static VAR systems,
thyristor models, and basic and detailed HVDC models.
EPRI The EMTP workbook series explains the theoretical basis of transient
PERSPECTIVE analysis, as well as the practical applications of one of the most fre-
quently used and powerful software packages within the utility industry.
These workbooks fulfill several crucial roles. First, they provide an im-
portant guideline for preparing and presenting courses about the EMTP
code. They also help utility technical staff implement the EMTP code.
Finally, they form an excellent reference on electromagnetic transients.
These workbooks are part of a larger effort to improve the EMTP code
and its documentation. EPRI initiated this effort in response to a survey of
more than 70 utilities, which indicated that EMTP users considered expan-
sion of this documentation a high priority. The program included revision
of the rulebook (report EL-4541), the source code documentation (report
EL-4652), and the application guide (report EL-4650). Other contributors
included EPRI associate members American Electric Power Company
and Electricite de France and DCG associate members Central Research
Institute of the Electric Power Industry of Japan and ASEA Brown Boveri.
PROJECT RP2149-6
EPRI Project Manager: Mark G. Lauby
Electrical Systems Division
Contractor: The University of Wisconsin at Madison
For further information on EPRI research programs, call

EPRI Technical Information Specialists (415) 855-2411.
Electromagnetic Transients Program (EMTP)
Volume 4: Workbook IV (TACS)
EL-4651, Volume 4
Research Project 2149-6
Final Report, June 1989
Prepared by
THE UNIVERSITY OF WISCONSIN AT MADISON

Department of Electrical and Computer Engineering
Madison, Wisconsin 53706
Author
R. H. Lasseter
Contributions by
K. Fehrle
ST. JOSEPH 'S UNIVERSITY
B. Lee
THE UNIVERSITY OF WISCONSIN AT MADISON
Prepared for
Electric Power Research Institute

3412 Hillview Avenue .
Palo Alto, California 94304
EPRI Project Manager

M. G. Lauby
Power System Planning and Operations Program
Electrical Systems Division
ORDERING INFORMATION
Requests for copies of this report should be directed to Research Reports Center
(RRC) , Box 50490, Palo Alto, CA 94303, (415) 965-4081. There is no charge for reports
requested by EPRI member utilities and affiliates, U.S. utility associations, U.S. government
agencies (federal, state, and local), media, and foreign organizations with which EPRI has
an information exchange agreement. On request, RRC will send a catalog of EPRI reports.
Electric Power Research Institute and EPRI are registered service marks of Electric Power Research Institute, Inc.
Copyright 1989 Electric Power Research Institute, Inc. All ri ghts reserved.
NOTICE
This report was prepared by the organization(s) named below as an account of work sponsored by the Electric
Power Research Institute, Inc. (EPRI). Neither EPRI, members of EPRI, the organization(s) named below, nor any
person acting on behalf of any of them : (a) makes any warranty, express or implied, with respect to the use of any
information, apparatus, method, or process disclosed in this report or that such use may not infringe privately
owned rights; or (b) assumes any liabilities with respect to the use of, or for damages resulting from the use of,
any information, apparatus, method, or process disclosed in this report.
Prepared by
The University of Wisconsin at Madison
Madison , Wisconsin
ABSTRACT
This workbook represents an introduction to the use of T ACS (Transients
Analysis of Control Systems) in the EMTP. The material progresses from an
overview of basic TACS concepts and components to a detailed HVDC
model. The following applications of TACS are covered: a variable load prob-
lem, static Var systems, thyristor models, TCR, basic HVDC models and a
detailed HVDC model. Complete data files are given for most examples.
iii
Table Of Contents
Chapter Page
1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
Basic Concepts of TACS . . . . . . . . . . . . . . . . . 1-1
Use of TACS . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.2 Interface Between Networks and TACS . . . . 1-3
Solution Concepts . . . . . . . . . . . . . . . . . . . . . . 1-3
Time Delay in Solution . . . . . . . . . . . . . . . . . 1-3
1.3 Basic TACS Components . . . . . . . . . . . . . . . . 1-4
Transfer Functions . . . . . . . . . . . . . . . . . . . . . . 1-4
Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
FORTRAN Expressions . . . . . . . . . . . . . . . . . . 1-7
Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
1.4 The Basic Deck . . . . . . . . . . . . . . . . . . . . . . . . 1-10
Power System and Control System . . . . . . . . 1-11
Power System Only, No Control System . . . . 1-12
Control System Only, No Power System . . . . 1-13
2 Variable Load Problem..................... 2-1

2.1 Single Phase Variable Load Model . . . . . . . . 2-1
Closed Form Solution . . . . . . . . . . . . . . . . . . . 2-1
Load Representation By Network . . . . . . . . . . 2-1
Load Representation By TACS . . . . . . . . . . . . 2-4
2.2 TACS Model of a Power Meter . . . . . . . . . . . 2-10
Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
Application Example . . . . . . . . . . . . . . . . . . . . 2-11
2.3 Application of Variable Load and Power
Meter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
Single Phase . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
Three Phase . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19
Constant Load Represented by TACS . . . . . . 2-26
3 Static Var System . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

3.1 Fundamentals of Static Var Compensators . . 3-1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
Voltage Stabilization . . . . . . . . . . . . . . . . . . . . 3-1
Load Balancing . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
3.2 Basic Operation of Back to Back Switch . . . . 3-2
Thyristor Controlled Reactor . . . . . . . . . . . . . 3-2
Principles of Operation . . . . . . . . . . . . . . . . . . 3-2
3.3 Basic Steady State Model . . . . . . . . . . . . . . . . 3-4
Fundamental current model . . . . . . . . . . . . . . 3-4
Basic reactive current needs . . . . . . . . . . . . . . 3-5
v
Chapter Page
3.4 Simple TACS Model in Three Phase System 3-7

3-Phase model with dynamic load . . . . . . . . . 3-7
3-Phase model with dynamic load and TCR 3-9
4 Thyristor Models ................. ........ . 4-1
4.1 Basic Characteristics of Thyristors . .... . . . 4-1
4.2 EMTP Thyristor Model .. . .. .. . . . ....... . 4-2
4.3 Numerical Oscillations .. . . .......... . . . . 4-4
5 Limiters, Loops, and Time Delays ......... . 5-1
5.1 Limiters ............. . ... . . ........... . 5-1
Limiters on Transfer Functions .......... . 5-1
Test of a First Order Transfer Function with
Limits Using TACS . . .... . .. ........... . 5-3
Test of PI Controller ........... . . .... .. . 5-5
Initialization Issues with Transfer Functions . 5-6
5.2 Closed Loops and Delays . . ..... . .. ..... . 5-6
TACS System Using Only Transfer Functions 5-6
Transfer Functions with a Single
Supplemental Device. . .... .. .... . . ..... . 5-9
Control Loop Using Supplemental Functions 5-11
Effects of Time Delays on Systems with
Poles on the Imaginary Axis .. .... . . .. . . . . 5-12
6 Simulation of TCR Using EMTP ............ . 6-1
6.1 Theory of Gate Pulse Generator . . ....... . 6-1
6.2 Interface to Power System . ..... ...... . . . 6-11
6.3 Full 3-Phase Model on Simple System .. .. . 6-14
3-Phase Model with Fixed Sigma . . .... ... . 6-14
Control of Sigma with a Voltage Regulator . 6-17
7 Basic HVDC System Models ............... . 7-1
7.1 Fundamentals of HVDC . . . .... ....... . . . 7-1
Basic Equations . . . . . . . . . . . . . . . . . . . . . . . . 7-1
Per Unit Leakage Reactance of the Converter
Transformer . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-4
7.2 Description of System Under Investigation . . 7-5
Sample Power System . . . . . . . . . . . . . . . . . . . 7-5
Calculation of DC System Parameters . . . . . 7-8
7. 3 Simulation of DC Converter Using EMTP-
Current Injection Method . . . . . . . . . . . . . . . . 7-9
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-9
AC System Represented by Single-Phase
The venin Model . . . . . . . . . . . . . . . . . . . . . . . . 7-11
AC System Represented by Three-Phase
Full Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-18
vi
Chapter
8 Detailed 6-Pulse Model 8-1

8.1 Six-Pulse Model and Control
Representation . . . . . . . . . . . . . . . . . . . . . . . . . 8-1
Model of Converter (NETWORK) . . . . . . . . . 8-6
Concepts of Current Controller and Gate
Pulse Generator . . . . . . . . . . . . . . . . . . . . . . . . 8-6
TACS Models of the Converter Controller . . 8-8
8.2 Fault Anal ysis Using Detailed 6-Pulse Model .. 8-17
Rectifier StartUp with Big Bang Approach . . 8-17
DC Fault and Load Rejection . . . . . . . . . . . . . 8-20
9 Full HVDC System Model . . . . . . . . . . . . . . . . . . 9-1

9.1 System Strength and Effective Short Circuit
Ratio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1
9.2 Fundamentals of Interface Problems . . . . . . . 9-1
AC Harmonics and Filters . . . . . . . . . . . . . . . 9-1
Voltage Synchronization Problems . . . . . . . . . 9-2
Initialization Problems and Auxiliary StartUp
Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
9.3 Fault Analysis Using Detailed 6-Pulse Model
with Sample AC System . . . . . . . . . . . . . . . . . 9-7
The venin Model . . . . . . . . . . . . . . . . . . . . . . . . 9-7
Full Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-26
9.4 Normal Startup of HVDC Systems . . . . . . . . 9-34
Startup without DC Current Ramp . . . . . . . . 9-34
Startup with DC Current Ramp . . . . . . . . . . . 9-43
vii
Chapter 1
Overview
1.1 Introduction
Development of the Electromagnetic Tran- sors" pick up signals from the power sys-
sients Program (EMTP) started in the tem (often briefly called the Network) for
1960's. It was continuously expanded and input to the control system (often briefly
improved, primarily by the Bonneville called TACS). Commands are forwarded
Power Administration (BPA). Modeling from the control system to the power sys-
and simulation of power systems transient tem as shown in Figure 1-1. Although the
phenomena quickly reached a high degree details of TACS were improved, the con-
of sophistication. However, modeling of cept of two separate systems, Network and
control systems associated with power sys- TACS, is still used today.
tems, such as generator controls or HVDC
converters, was done in a rather crude way
by using such artifices as controlled sources
or preprogrammed switch closings. Details Basic Concepts of TACS
of the effects of the control systems upon
the transient performance of the power sys- Control systems are usually described by
tem could not be modeled . block diagrams with connections between
the output terminals and the input terminals
of the various blocks. At some points, in-
puts to blocks are received from sensors in
Power System the power system model, and at other
(Network) Sensors points, outputs from blocks are forwarded
Current as commands to the power systems model.
)' Voltage Figure 1-2 is a typical example. Inputs to
States blocks can also be received from internal
sources. The functi on of each block is de-
f scribed by the relationship between its in-
Functions
Sources
Commands
'
Control System
puts u 1, u 2 , . .. , uk and its output x (Figure
1-3). The types of control blocks commonly
(TACS) found in control systems of electric power
systems are available as models in TACS .
They will be described later in this Work-
book and can be summarized as follows :
Figure 1-1 Interaction between power sys-
tem (Network) and control system (TAGS)
Transfer Functions. These are basic
building blocks defined by the
A major breakthrough was the 1976 addi- Laplacian operator. The program con-
tion of Transients Analysis of Control Sys- verts the s-domain functions into alge-
tems (TACS) to the EMTP. For the first braic difference equations in the time
time, power systems transients and control domain using the trapezoidal rule.
systems could be modeled simultaneously Static and dynamic limiters are
to study their dynamic interaction. "Sen- available.
1-1
Overview
From internal
t;-----, To EMTP
+ +
G(s) 1-----.t V cos (n- p)
Inc +
From EMTP Sensor.
Figure 1-2 Typical diagram of a control system
Sources. These are time dependent Monitor power systems component

TACS sources. Such sources include variables such as circuit breaker volt-
DC, a pulse, a step, and a sinusoidal ages and currents. With this informa-
function. tion it is then possible to determine
FORTRAN Expression. The relation- and simulate in TACS such breaker
ship between outputs and inputs of a actions as prestrike, clearing, restrike,
component in TACS can be described or reignition.
by FORTRAN statements and func- Determine the value of equivalent
tions. power network sources, such as a con-
Devices. Frequently used subsystems trolled voltage source, to simulate an
of control systems, such as relay oper- AC-DC converter.
ated switches or sample and track cir-
cuits, have been preprogramrned, and Postprocess power network variables
are available as devices in TACS . to find such quantities as the RMS
value of a nonsinusoidal current or
voltage, the energy absorbed by a
surge arrester, or the FOURIER spec-
c"""",. ,."""" trum of a current or voltage.
. Control
block
.,
"""'
X Simulate parts of the electric power
network, such as variable loads , or
other devices and phenomena which
cannot be directly modeled with the
Figure 1-3 Block of control system. existing network components.
Simulate non-electrical parts of the
system, such as the effects of a rotat-
Use of TACS ing mass .
TACS can be used for a variety of tasks in Simulate real control systems without
conjunction with electric power system tran- interaction with a power system.
sient analysis:
Simulate real control systems interact- The control system may be non-electric, as
ing with the power network, such as long as it can be modeled by blocks avail-
HVDC converter controls, back to able in TACS. Other applications will prob-
back thyristor controls in static VAR ably be found by imaginative users. This
systems, or synchronous generator ex- Workbook will limit applications of TACS
citation system controls. to electric power systems.
1-2
Overview
t Network t
.,.... ...... Network .,.... ...... ~
I Si~!1il!S' I Si~IJA~ I
Commands .,.... .,.... Commands .,.... .,.... Commands
I .,.......... I .,.......... I
lv.,.....,.... TACS ~.,.....,.... TACS I
>- >- )J
Time~
Figure 1-4 Solution sequence
1.2 Interface Between Networks and TACS

Solution Concepts This one time step error can in some cases
be compensated, for instance in thyristor
The components of the power system (Net- firings. In other cases, the one time step er-
work) can usually be modeled as simple ror cannot be avoided . It may be necessary
Norton or Thevenin equivalents. The result- to select a time step /).t smaller than other-
ing system of equations can be solved by wise indicated simply to keep this error
straightforward matrix techniques. There within acceptable limits or, in extreme
are a great variety of components in TACS , cases, to keep the solution from going nu-
many of which cannot be modeled by sim- merically unstable .
ple equivalents. For that reason, the Net-
work and TACS are basically two different In addition to this unavoidable one time
programs, with different modeling tech- step error between Network and TACS, the
niques and different input algorithms. The solution of TACS may introduce further de-
two programs are solved separately and al- lays. In cases of control models using only
ternately. First the Network solution is ad- transfer function blocks with no more than
vanced from time t- /).t to t, using the one limiter per feedback loop there will be
TACS commands as established at time no further delays. Transfer functions and
t- /).t. Next the TACS solution is advanced
limiters are not always enough to model re-
from t- /).t to t, using the Network signals alistic control systems. With the introduc-
as established at time t. Then the Network tion of other elements, such as FORTRAN
advances from t to t + /).t, using TACS expressions and devices, there will be extra
commands as established at time t. This al- time delays. These extra elements are
ternate solution mechanism and the related solved in a sequential manner. If there are
flow of information between the two pro- feedback loops, time delays will be intro-
grams is shown in Figure 1-4. duced. The Rule Book explains the reason
behind these TACS induced delays, and
suggests ways to minimize these delays .
Time Delay in Solution This issue is further discussed in Chapter 5
of this Workbook.
As described in the last section, and shown
in Figure 1-4, the information used by the The time step /).t may have to be reduced
Network solution to advance to time t are to keep these TACS induced delay errors
based on the TACS solution for time t- /).t. within acceptable limits. No simple general
The Network solution at time t is therefore rule can be given to manage time delay er-
based on the TACS calculations for time rors. As always in numerical solutions, the
t- /).t. This implies a one time step delay user should critically evaluate the computer
for commands from TACS to Network. No solutions. If necessary, a time step by time
such delay exists for signals from Network step printout of the pertinent variables may
to TACS (see Figure 1-4). have to be studied.
1-3
Overview
1.3 Basic TACS Components

A summary of available TACS components ~ i(t)
and some basic considerations of TACS
simulation are described in the Rule Book + +
Section 14.2. Basic rules for use of TACS
are covered in Sections 14.3 and 14.4.
Steady-state initialization is explained in
the Rule Book Section 14.5. A study of
these sections of the Rule Book is highly
recommended. This Workbook will now ex-
plain the individual TACS elements in more Figure 1-5 Control subsystem
detail.
branch card in Network (see Rule Book Sec-
Transfer Functions tion 6.1). Any such lumped component sub-
system within the control system must be
Control system analysis is most often per- expressed in the form of a Laplace Trans-
formed by transforming the control system form function. For the subsystem in Figure
signals and equations from the time domain 1-5, the time domain differential equation
(t-domain) to the Laplace domain (s-do- is:
main). Laplace Transform theory is mathe-
matically quite sophisticated. For a greatly
simplified introductory engineering ap-
proach it is, however, sufficient to ignore all
initial conditions and to replace:
R i(t) + L di
dt
+.!_I
c
idt = e (t)
1
t-domain function y(t) by:

s-domain function Y(s)
and e2 = ~ Jidt
. d . . dy b Laplace Transform gives
t- domam envatlve dt y:
s-domain derivative sY(s) R I(s) + L s I(s) + I(s) = E1 (s)
sC
t-domain integral Jydt by:
. . Y(s) and
s-domam mtegral - -
s
This converts differential equations in the
time domain to algebraic equations in the Simple substitution gives the transfer func-
Laplace domain. They can be solved to ex- tion
press the output as a function of the input.
This expression Output (s) is called the
Input (s) E2 (s) = G(s) = 1
Laplace transfer function of the component E1 (s) LCsZ + RCs + 1
or subsystem. Laplace transfer functions of linear systems
can always be expressed with a polynomial
in the numerator and a polynomial in the
denominator. With known values of the
A simple example will show this concept. components R, L, and C, the coefficients
Assume a control system contains the sub- can be calculated and the transfer function
system shown in Figure 1-5. The R, L, and can be generally written in the form
C components cannot be described as such
in TACS. There is no equivalent to the
1-4
Overview
Rule Book Section 14.6.1. The numerator

and denominator must be expressed in
polynomial form. If they are given in pole-
The coding of such transfer functions, also zero form, then they must be expanded to
called s-blocks in TACS, is described in the polynomials.
Transfer Function
1 2 3 4 5 6 7 8
12345678901234567890123456789012345678901 234567890123456789012345678901234567890
output fixed fixed Name Name
n name + IN1 -t IN2 -t IN3 -t I N4 INS gain
low h igh low high
- - - -
A6 A6 A6 A6 A6 A6 E6 . 0 E6.0 E6 . 0 A6 A6
If n is greater than 0 the two next lines must be included. The first for the
numerator followed by the denominator. Where n is the highest power of "s".
No N1 N2 N3 N4 Ns N6 N1
Do D1 D2 D3 D4 Ds D6 D1
E10 . 0 E10.0 E10.0 E10.0 E10 . 0 E10.0 E10.0 E10.0
Figure 1-6 Data format for TACS transfer function
In Figure 1-6 the basic data form of a describe it with a s-block without limits, fol-
transfer function is shown. The first two lowed by an z-block with GAIN=1 and the
columns contain the order of the highest desired limits. Beware of using s-blocks
power of "s" of either numerator or de- with limits . See Chapter 5 of this Workbook
nominator polynomials. If this value is zero for more details .
only a single data line is required . The out-
put name follows with six or less characters The simulation of s-blocks will actually be
left-justified. This is followed with one to done in the time domain by TACS. The in-
five input names with a sign. put to the s-block is given as a time vari-
able, and the output is a function of time .
The output of a transfer function can be No Laplace variables are used in TACS. In-
limited by upper and/or lower limits. These stead, the s-block will be converted to the
can be fixed values or variable names as equivalent difference equation in the time
shown in the last four fields of the first line domain for the simulation. Why then de-
in Figure 1-6. Details are given in the Rule scribe a subsystem in the Laplace domain
Book Section 14.6.2. The user has to be at all? Because control systems are usually
careful to establish if the limit is of the described as Laplace components, and
static or dynamic type. The Rule Book de- closed form solutions and stability analysis
scribes the use of both types of limits as are performed in the Laplace domain.
well as the interpretation by TACS, of both
fixed limits and variable (named) limits. If both the numerator and the denominator
Most Hmits in control systems are of the are plain constants with nos terms, then the
static type . TACS interprets the limits of block represents a simple gain k. This is a
z-blocks (n=O) as static types, and the limits degenerate case of as s-block with m=O and
of s-blocks (n > 0) as dynamic types . The n=O . It is called a zero-order block or a
user has no choice. If an s-block with static z-block. Their coding follows the rules
limits is to be modeled, then the user must shown in the first line of Figure 1-6.
1-5
Overview
Sources Type 23: Pulse Source

A: Amplitude of pulse
There are three different types of sources
B: Period in seconds
available in TACS, resident sources, inter-
nally defined sources, and EMTP defined C: Pulse width in seconds
sources.
Type 24: Ramp Source
Resident TACS Sources: A: Maximum amplitude of ramp
These sources represent frequently used B: Ramp time in seconds
functions. They are predefined and have re- C: Not used
served names in TACS. They need not be
specified by the user, and can be used as Amplitude, start time, and other parameters
inputs to any TACS component. For a list of these sources must be defined by the
of Resident Sources, see Rule Book page user, who also freely selects any legal
14-15 . Some examples include, 'UNITY ', TACS name for each such source.
'PI', and 'FREQHZ'. These can be used as
input names to any TACS element. EMTP Defined TACS Sources
Internally Defined TACS Sources These sources make variables from the
power system (Network) available in TACS.
These sources also represent frequently There are no calculations for these sources
used functions. Unlike the resident sources, in TACS. They use the same data format as
which are predefined in detail, the inter- internally defined sources, Figure 1-7. Net-
nally defined sources have only the general work node voltages (type 90) or switch cur-
type of the source predefined. These rents (type 91) are made available in TACS
sources follow the format shown in Figure under the same name. Any node name can
1-7. The first two columns are used to indi- be used for a type 90 voltage source. For a
cate the type of source with the elements A, type 91 current source a switch node name
B, and C providing needed information. must be used.
The four principle sources are given below:
The details of TACS cards describing the
Type 11: Level Signal Source various sources are explained in the Rule
A: The amplitude of signal Book Section 14.6.3. The source type 92 is
used to pass machine model parameters
B, C: Not used from the Network to TACS. Source type 93
Type 14: Sinusoidal Source indicates if a switch in the Network carries
A: Amplitude of cosine function current. Remember, a switch will continue
B: Frequency in Hz. to carry current, even after TOPEN, until
the current goes through zero (see Figure
C: Phase in degrees 1-8). The type 93 source will signal the cur-
rent zero event to TACS. The conduction
Source Format
1 2 3 4 5 6 7 8
12345678901234567890123456789012345678901234567890123456789012345678901234567890
T
y output A B c T-START T-STOP
p name
e
A6 ElO.O ElO.O ElO.O ElO.O ElO.O
Figure 1-7 Data format for TACS source
1-6
Overview
i(t) The relationship between outputs and inputs

of this TACS component are described by a
FORTRAN statement. Most standard FOR-
TRAN algebraic, relational, and logical op-
erators can be used, as can intrinsic func-
tions (see Rule Book page 14-20) . Some
special functions have been created for this
TACS FORTRAN as explained in the Rule
Book. Some limitations apply to the TACS
FORTRAN of supplemental variables com-
pared with standard FORTRAN:
Intrinsic functions accept only one

argument. That means,
SQRT(A**2+B**2) is invalid.
output of source Type 93 Maximum of 20 levels of nesting.

1.01-------------, No arrays can be defined.
Time
GOTO , DO statements are not
allowed.
SUBROUTINE and FUNCTION sub-
Figure 1-8 TAGS source type 93 action programs are not allowed .
The last few restrictions severely limit the
angle of a thyristor can easily be estab- flexibility of the FORTRAN expressions.
lished using a source type 93 signal in
TACS.
The data format for FORTRAN expressions
FORTRAN Expressions is given in Figure 1-9. In the first two col-
umns the number 88 should be used (will
Systems expressed as transfer functions can accept 99 and 98 also). This is left over
be solved simultaneously by matrix tech- from old versions of TACS which required
niques . FORTRAN expressions and devices a choice between 99, 98, and 88 which in-
are inherently non-linear components. Si- fluenced the time delays. This is no longer
multaneous solution by matrix techniques is the case. The output is the same as other
mathematically difficult. The output of elements. For the FORTRAN expression
these components must be calculated se- there must be an "=" in column 11 as
quentially, one at a time. This will introduce shown. After this free format can be used
time delays where there are feedback loops . for the expression. If the expression contin-
See Chapter 5 in this Workbook and Rule ues past 80 columns the character "$" al-
Book pages 14-3 to 14-4. lows continuation to the next line.
FORTRAN Expression
1 2 3 4 5 6 7 8
12345678901234567890123456789012345678901234567890123456789012345678901234567890
output = free format FORTRAN expression ...
I name
~ A6
Figure 1-9 Data format for TACS FORTRAN expression
1-7
Overview
Devices CODE 52 Level triggered switch

CODE 53 Transport delay
CODE 54 Pulse transport delay
Devices represent small subsystems which
have been preprogrammed, and are made CODE 55 Digitizer
available to the user. They are listed and CODE 56 Point-by-point function
described in detail in the Rule Book Section
14. 7.2. Most devices simulate subsystems CODE 57 Time sequenced switch
which are actually used in control systems, CODE 58 Controlled integrator
such as relay operated switches (CODE=51) CODE 59 Simple derivative
or controlled integrators (CODE=58). Most
devices could be implemented by the user, CODE 60 Input IF component
using the basic TACS elements. They are CODE 61 Signal selector
preprogrammed for convenience. The list of CODE 62 Sample and track
devices has been growing over the years,
and will probably continue to grow in the CODE 63 Instaneous min/max
future in response to the stated needs of the CODE 64 Min/max tracking
users. The input format for devices is CODE 65 Accumulator and counter
shown in Figure 1-10. The 88 in the first
two columns and the output name format is
the same as for FORTRAN expressions. In
columns 9-10 is the device code followed It is suggested that the beginner make him-
by input names. The last five fields are dif- self familiar with the general features of
ferent for each device type and the Rule each device, without studying all the details.
Book must be consulted. A list of device Then, whenever a modeling job can be sim-
CODES is given with its function. plified using a device, the user hopefully
will remember this device and now study all
of the details of this particular device to see
CODE 50 Frequency sensor if it suits his needs . The examples in later
sections of this Workbook will use many of
CODE 51 Relay operated switch these devices.
Device
1 2 3 4 5 6 7 8
12345678901234567890123456789012345678901234567890123456789012345678901234567890
outpu c
name 0 + IN1 + IN2 + IN3 + IN4 INS A B c D E
~ - - - -
88 A6 E A6 A6 A6 A6 A6 A6 A6 A6 A6 A6
Figure 1-10 Data format for TACS devices
Output Printed or Plotted Output of TACS Variables
The TACS variables to be printed out are

There are two different types of output in defined in type 33 Output Cards, see Figure
TACS, one is for the expected printed or 1-11. Unlike the power part of the system
plotted data as a function of time and the (Network), which has several types of vari-
other is TACS generated functions to be able for printout (node voltages, branch
used by the network. currents, etc.), TACS has only one type of
1-8
Overview
variables. TACS variables are printed out From the power Network to TACS.
together with the Network variables. To Sensors in the Network pick up infor-
identify them as TACS variables, they are mation and forward it as TACS
formally treated like branch currents, with sources to TACS. These variables are
the first node name always being TACS . inherent inputs to TACS.
Printout control is defined in the Miscella- From TACS to the power Network.
neous Data Cards at the beginning of the Variables in TACS are forwarded to
Input Data Deck and covers both the Net- the Network (commands). These vari-
work and TACS. ables can be considered outputs of
TACS.
If there is no power system (Network) in the In the latter case, the element in Network
model (TACS STAND ALONE case), then must be preprogrammed to receive infor-
the TACS variables in the printout are iden- mation from TACS . These Network ele-
tified by their names only. They are for- ments interacting with TACS include:
mally treated like node voltage printouts in TACS controlled switches type 11, rep-
that case. resenting either a diode, a thyristor, or
a bidirectional switch as explained in
Batch plotting of TACS variables follows the Rule Book Section 9.5.1.
the rules for plotting Network quantities TACS controlled switches type 12,
(see Rule Book Section 15). TACS variables representing a spark gap or triac (see
are treated like Network branch currents for Rule Book Section 9.5.4).
batch plotting, with the first node name al- TACS controlled switch type 13, rep-
ways TACS, and the second node given the resenting a bidirectional switch similar
TACS variable name. to type 11 OPEN/CLOSE feature (see
Rule Book Section 9.5.5).
TACS defined EMTP sources type 60
Interactive plotting of TACS variables also (slave sources) . This is the equivalent
follows the rules for the plotting of Network to the EMTP defined TACS sources
quantities (see Rule Book Section 18). type 90 or 91. There are no calcula-
tions for these sources in the Network
TACS Output to Network part of the program. The Network
source is simply set equal to the speci-
fied TACS variable. For details see
Interaction between the power system (Net- Rule Book Section 10-10.
work) and the control system (TACS) is im- TACS generated modulating source
plemented by the flow of information be- type 17, which creates a a TACS
tween the two systems (see Figure 1-1 and controlled scaling factor that can be
Section 1.1 and 1.2). Two directions of in- used to modify any EMTP source. See
formation flow are possible: Rule Book Section 10-8.
OUTPUT
1 2 3 4 5 6 7 8
12345678901234567890123456789012345678901234567890123456789012345678901234567890
name name name name name name name
~3 A6 A6 A6 A6 A6
A6 A6
Figure 1-11 TACS output request
1-9
Overview
Interface connections between type 59 EMTP defined TACS variables have

Dynamic Synchronous Machine Source been defined and are available during
and TACS, as explained in the Rule the TACS steady-state calculations.
Book page 10-39. Electrical Network parameters, which are
Interface connections between the dy- missing TACS supplied initial conditions,
namic U.M. Source and TACS, as ex- can be initialized by the user as explained
plained in the Rule Book Section 12, in the Rule Book Section 11 . In addition, the
class 6. TACS controlled elements type 11, 12, and
13 can be specified to be open or closed
during the steady-state calculations by us-
The T ACS outputs to Network are one or
ing the keyword CLOSED in columns
more time steps late, as was explained in
55-60. Even so, steady-state solutions for
Section 1.2. This must be kept in mind
electrical networks containing rectifiers or
when checking out a simulation including
other thyristor operated systems are still
T ACS defined EMTP sources and conven-
often far from realistic as delivered by the
tional EMTP (Network) sources.
EMTP. Users have developed sophisticated
artifices to get such systems into a desired
Initialization operational mode as quickly as possible.
Examples in the later sections of the Work-
The EMTP will find a steady-state solution book will introduce some such artifices.
and initialize the system accordingly. In-
itialization of the electrical Network and of The Network supplied source values, types
TACS is done separately, just as in advanc- 90 , 91, 92, and 93 will be available in
ing the solution during the time step loop. TACS by the time TACS calculates its
The steady-state initial conditions of the steady-state solution for initialization. How-
electrical Network are calculated before the ever, several TACS elements need previous
TACS steady-state conditions and initializa- history to establish their present state. The
tion are computed. This is a sequential op- program will take care of some T ACS in-
eration, not a simultaneous process, and itializations as explained in the Rule Book
there are no iterations. This fact implies : Section 14.5. The user must define the re-
maining TACS variables, if needed for an
During the electrical Network steady- acceptable startup, by the TACS user-de-
state calculations, all TACS defined fined initial conditions cards type 77. Even
quantities in Network are still zero. If TACS program defined initial conditions
these TACS defined quantities are can be overruled by type 77 cards. The user
needed to get a meaningful steady- assumes all responsibilities for the compati-
state Network solution, then these val- bility of the TACS initial conditions to the
ues must be provided otherwise. type 77 cards in this case.
1.4 The Basic Deck

There are basically three different configu- The input data file will be constructed
rations for EMTP simulations: somewhat differently for each configura-
tion. The EMTP must be told which con-
A power system (Network) and a configuration the simulation is using in the in-
trol system (TACS), usually interacting put data file.
with each other.
A power system (Network) without a Some terms are still used from the days of
control system. This was the only pos- key punched input card decks in describing
sible configuration until 1976, when EMTP inputs. Today, of course, most input
TACS was introduced. data are created directly as files in the com-
A control system (TACS) without a puter system. But the Rule Book and Work-
power system. books will still use such terms as:
1-10
Overview
deck meaning: file The BLANK line ending TACS inputs

card meaning: line can actually be a completely blank
line or the word "BLANK" . The line
can also start with BLANK followed
The younger generation users will please by any comments for easier readabil-
forgive the EMTP veterans for the use of ity.
these obsolete terms. This explains why no The power system components
data is entered beyond column 80, since (branches, switches, sources, and in-
that was the standard width of the good old itial conditions) must be grouped to-
punched card. The strict adherence to speci- gether. They are separated by BLANK
fied columns for data is another remnant lines.
from the punched card days. Developments The batch plotting and FOURIER
towards free-format input data files are un- Analysis requests for TACS variables
der way, but they are not yet reliable are requested together with the Net-
enough. work requests after the power system
has been described . TACS variables
Power System (Network) and Con- are treated like branch currents, with
trol System (TACS) group type code=9 in column 3. The
first node (columns 25-30) for all
This is the most complete configuration of TACS variables is the word TACS.
EMTP. The structure of the input data deck Interactive plotting must not be speci-
is shown in Figure 1-12. Some remarks : fied in the input data file. It is avail-
able for any output quantity properly
The BEGIN NEW DATA CASE is not captured in a data file. Interactive
mandatory, but helps in multiple case CRT plotting is really a misnomer.
input files (see Rule Book Section The user does not plot while the
5.1.1). EMTP executes, but after the run is
About 55 different special request completed . But the plot variables, time
cards can be used to request all kinds scales etc. can be selected after the
of features as explained in the Rule run is completed, as long as the de-
Book Section 5 .1. Use of special re- sired variable was printed out during
quest cards is not mandatory. the run.
The Miscellaneous Data Parameter The BLANK line after BEGIN NEW
Cards specify parameters that are DATA CASE signals the end of the
common to TACS and Network, such run.
as the time step. If one case of a multiple case input
TACS HYBRID signals to the EMTP data file aborts, then the EMTP will
that a power system and control sys- skip the remaining cards of that case
tem is to be modeled. The key words until it sees a BEGIN NEW DATA
TACS OUTPUTS are also acceptable CASE card, and then it will start exe-
here. cuting that next case.
1-11
Overview
BEGIN NEW DATA FILE

Special requests
Miscellaneous Data Parameters
TACS HYBRID
Transfer functions (s-blocks, z - blocks)
Sources
Supplemental variables and devices
Outputs
Initial conditions
BLANK line ending TACS inputs
Branches
BLANK line ending branch inputs
Switches
BLANK line ending switch inputs
Sources
BLANK line ending source inputs
Initial conditions
Outputs
BLANK line ending outputs
Plotting
FOURIER Analysis
BLANK line ending plotting inputs and ending the case
BEGIN NEW DATA CASE
BLANK line indicating end of run .
Figure 1-12 Data file structure for TAGS HYBRID case.
If any group of components, for instance BEGIN NEW DATA CASE line.
switches, does not exist, then the appropri-
ate BLANK line must still be included. Two Power System (Network) Only, No
blank lines will then appear in succession. Control System
For this reason, it helps in good housekeep-
ing to give each BLANK line a comment This was the standard case before TACS
explaining what it stands for. Comment was introduced in 1976. The structure of
lines can be used any place in the input the data file for this configuration is shown
data file. They are marked by a C in col- in Figure 1-13. The absence of a TACS HY-
umn 1, followed by a space in column 2. BRID line following the Miscellaneous Data
Do not forget the space in column 2! Sev- Parameters line tells the EMTP program
eral cases can be combined in one input that there is only a power system, and no
data file. The cases are separated by the control system.
1-12
Overview
BEGIN NEW DATA CASE

Special requests
Branches
BLANK line ending branches
Switches
BLANK line ending switches
Sources
BLANK line ending source inputs
Initial conditions
Output
BLANK line ending outputs
Plotting
FOURIER Analysis
BLANK line ending plotting inputs and ending the case
BEGIN NEW DATA CASE
BLANK line ending the run
Figure 1-13 Data file Structure for the power system only case.
The TACS STAND ALONE line tells

Control System (TACS) Only, No the EMTP that there is only a control
system to be modeled, but no power
Power System system.
The plot cards can in this case only
request TACS variables to be plotted.
The input data file structure for this con- They are treated as node voltages in
figuration is shown in Figure 1-14. Re- this case, graph type code=4 in col-
marks: umn 3.
BEGIN NEW DATA CASE

Special requests
TACS STAND ALONE
Transfer Functions (s-blocks,z-blocks)
Sources
Supplemental variables and devices
Outputs
Initial conditions .
BLANK line ending TACS inputs
Plotting cards
FOURIER Analysis
BLANK line ending plotting inputs and ending the CASE
BEGIN NEW DATA CASE
BLANK line indicating end of run
Figure 1-14 Data file structure for TAGS STAND ALONE case.
1-13
Chapter 2
Variable Load Problem

This chapter will develop TACS related be used to analyze the effects of a variable
techniques to implement variable loads in a load in a power system.
power system. These techniques will later
2.1 Single Phase Variable Load Model

Closed Form Solution where
A simple problem will be solved by various
methods as an introductory example. The R
a=-
switch in Figure 2-1 will be closed at time L
t=O, and the transient current i(t) is to be
found. Ohm's law and Kirchhoff's law give
</> = tan- 1 ( wRL)
the following differential equation.
L di(t) + Ri(t) = e(t) =Em sin(wt) A numerical solution will now be found us-
dt ing three different approaches to demon-
strate the alternate use of Network and/or
TACS representation of the load, first as a
constant load and later as a variable load.
t= 0 __. Load Representation By Network

i(t)
L The example was run for 60 Hz, R=3 Ohms
and a ratio ....!!.._ = ~ = 3, where P=Active
wL ~
e(t) =Em sin(w t) Power and Q=Reacttve Power. The desired
peak current was Imax=l Amp. From this
R
follows:
SCR
Figure 2-1 Circuit for transient analysis.

L=2 .653 m
R=30
Classical differential equation solution
methods or the Laplace transform method
easily give the closed form solution.
Figure 2-2 EMTP Network diagram

i(t) = E; [sin(wt- </>)+e-at sin</>]
2-1
Variable Load Problem 2 .I
w L = 1.0 Q Vmax = lmax"' Z = 110 = 3.1623 Volts

L = -.!..:.Q_ = 2.653 mH The EMTP Network is shown in Figure 2-2.
377
The EMTP input data file shown in Figure
2-3 follows the rules described in the EPRI
EMTP Rule Book and a similar example in
Z = j R2 + (wL) 2 = 3.1623 Q the EPRI EMTP Workbook Volume 1.
BEGIN NEW DATA CASE

c
c ******************************************************************************
C * EMTP INPUT FILE FOR NETWORK OF FIGURE 2-2 *
c ******************************************************************************
c
C . . . . . . . . . . . . . . . . . . . . . . . . . . . Miscellaneous data ... ....... . ...... ....... . .... .
C DeltaT<---TMax<---XOpt<---COpt<-Epsiln<-TolMat<-TStart
10 . E-5 50 . E-3
C --IOUT<--IPlot<-IDoubl<-KSSOut<-MaxOut<---IPun<-MemSav<---ICat<-NEnerg<-IPrSu
1 1
c
C ........................... Branch data .. ........................ . .......... .
c Bus1->Bus2->Bus3->Bus4-><----R<----L<----c
IOUT 3. 2 . 653 0
BLANK end of branch data
c
C . . . . . . . . . . . . . . . . . . . . . . . . . . . Switch data
C Bus-->Bus--><---Tclose<----Topen<-------Ie 0
SCR IOUT 0. 9999 . 0 01
BLANK end of switch data
c
C .............. . ............ Source data ..................................... .
C Bus--><I<Amplitude<Frequency<--TOIPhiO<---O=PhiO <----Tstart<----Tstop
14SCR 3 . 1623 60. 0. 0. -1. 9999 .
BLANK end of source
c
c 0 0 0 0 0. 0 0 Output Request Data
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
C Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->
SCR IOUT
BLANK end of nodal output request
c
C ........................... Plot request
C Plot data
c
C ------Graph type : 4(volts) 8(branch volts) 9(currents)
C I ----Units: 1(deg) 2(cyc) 3(sec) 4(msec) 5(micresec)
C II ---------Units per inch
2-2
Variable Load Problem 2.1
C II ------Plot starting time

C II -Plot stopping time
C II I --Value at bottom of vertical scale
C II I -Value at top of vertical scale
c II I
C VV<-I<-- I<--I<---I<--1Busl->Bus2->Bus3->Bus4->Heading-------->Vert Axis------>
194 3 . 0 . 30. -2. 2.SCR !OUT RealCurr Amp
BLANK end of plot request
BEGIN NEW DATA CASE
BLANK ends all cases
Figure 2-3 EMTP input file for Network of Figure 2-2.
A general rule of thumb for the size of the L 2.653

time step to analyze simple systems without sient is r =- = - - = 0.88msec. Ten per-
R 3.0
thyristors is as follows: cent of this is about 0.1 msec. The miscella-
Find 5o of the applied sinusoidal neous data line Figure 2-3 indicates a time
step of 10.E-5 = 0.1 msec. was chosen. So
source. the time step was selected quite conserva-
Find 5o of the fastest underdamped tively. The switch card indicates a switch
transient. between nodes SCR and lOUT to be closed
Find 10% of the smallest time con- at t=O and to remain closed (it will open at
stant for overdamped transients . 9999 seconds, well beyond the simulation
time). Figure 2-4 shows the plot of the tran-
Then make the time step equal to or smaller sient current i(t), reaching practically steady
than the smallest of the three values found. state after about 4 time constants or 3.5
msec.
In our example, 5 of 60Hz is 0.231 msec.
The time constant of the over damped tran-
~
!~
0
c(].)
L
L
::J
(_) 0
50 .0
-~
'
Figure 2-4 Plot of Network current
2-3
Variable wad Problem 2.1
Load Representation By TACS

Implementation with Network
Level
Signal
Type 11
l E(')
s-block
I(s)
The differential equation for the circuit of
Figure 2-1 was * S+C
1 Supplemental
L di + Ri = e(t) Variable
L
dt
Figure 2-6 TACS implementation
The Laplace transform of this equation is
in Figure 2-6. This means the load of the
sLI(s) - I.i(O) + RI(s) = E(s) circuit of Figure 2-2 can be represented two
different ways :
Setting the initial current i(O) at time t=O to
i(O)=O, and defining E(s) as the input and as a R-L branch in Network.
l(s) as the output of the subsystem, the as a type 11 source, supplemental
transfer function becomes; variable and a transfer function
combination in TACS .
I(s) 1 1 1 1 1
-=--=L ~=L
E(s) sL+ R s+~ s+ c The input voltage E(s) can be provided in
L two different ways:
The block diagram representing this system as a type 14 source from a node in
is shown in Figure 2-5. Network
as a type 90 source in TACS
In the first case the output current l(s) will
~-~~--~--~~~--s-~-c~-'_(s_J__
typically be returned to the Network as a
E_(s_J__ type 60 EMfP current source. This method
will be useful if the load is variable and
part of a more extensive network. For dem-
onstration purposes, it will be used in this
Figure 2-5 Block diagram of R-L load simple example also. The Network and
TACS diagrams, including interfaces are
shown in Figure 2-7. The dashed lines indi-
Using the same parameters as in the previ- cate the interface between Network and
ous example, the additional numerical val- TACS. The value of the voltage at Network
ues are; node SCR will, after the Network solution
has been advanced by a time step /:it, be
forwarded as a signal to TACS. In this case
the signal is a type 90 Voltage source. The
1 value of the voltage source SCR in TACS
_!_= = 377
L 0.002653 will be set equal to the value of the node
voltage SCR in Network. The TACS solu-
3 tion will then be advanced by one time
c=R = = 1131
L 0.002653 step /:it, and the value of the TACS variable
lOUT will be forwarded as a command to
The block diagram of Figure 2-5 can readily the Network. The command is a type 60
be implemented in TACS by a type 11 level TACS controlled current source in Network.
source, a supplemental variable and a first The value of this current source, lOUT in
order transfer function or s-block as shown Network, will be set equal to the value of
2-4
the TACS variable lOUT. Then the Network step and so on. the input data file for this
solution will be advanced by another time case is shown in Figure 2-8.
Signal-
r--------------------------1
I
I I I
I I I TACS
II I Source
Type 90
SCR I lOUT I SCR
I Type 11
Type 1
s-block
I CONS INT 1 IO UT
*
TACS I
Network 377 I
- s + 1131 I
Source I
Source 1
Type 14 Supplemental
Type 60 Variable 1
'--~-------------------------J
.,.___ Command
Network TACS
Figure 2-7 TAGS and Network implementation of R-L circuit
BEGIN NEW DATA CASE

C . . . . . . . . . . . . . . . . . . . . . . . . . . . Miscellaneous data .. .. . . . .... ... .. . . . . .. ... . .. . .
10 . E-5 SO.E-3
C --IOUT<--IPlot<-IDoubl<-KSSOut<-MaxOut<---IPun<-MemSav<---ICat<-NEnerg<-IPrSup
1 1 1
TACS HYBRID
c
c *****************************************************************************
c * TACS MODEL OF R-L CIRCUIT *
c *****************************************************************************
c
c
C .. .. . . . TACS Voltage Source . Measures Voltage at bus SCR in Network . . . . .. . ... .
C 90 1 . 0 de FQ ac EMTP VOLTAGE
C <TYPE code in the first two columns
C OUTPUT <-----A---<----B----<----C---- <-T-START-<-T-STOP--
90SCR 0.0 60 .
c
C .. .. ... Step Signal . Represents 1 / L . . . . .. ... . . . .. .. .... . ...... .. . ...... . ....... .
c 11 AMPL DC source
2-5

11Cons 377. -1. 9999.
c
C . . ... TACS FORTRAN Statement. Supplemental Variable to Multiply CONS * SCR ..... .
C FORTRAN EXPRESSION
c
C OUTPUT = free-format FORTRAN expression ......... . ...................... .
88INT =Cons*SCR
c
C ... .. . Transfer Function 1/(s + c ) Where c R/L ..... .................. .... .. .
C TRANSFER FUNCTION
c
C <- the order of the highest power of "s" is place in the first two columns
c if greater than 0 two more lines follow for numerator and denominator
c
C OUTPUT +IN1--> +IN2--> +IN3--> +IN4--> +INS--> <-gain<--low<-highLOW-->HIGH->
C -N/D-0--<-N/D-1---<--N/D-2--<--N/D-3--<--N/D-4--<--N/D-5--<--N/D-6--<--N/D-7--
l!OUT -!NT
1.
1131 . 1.
C . .... . TACS output specification . ....... . .. ..... .. . ....... ............ ......... .
c ----->----->----->----->----->
33SCR lOUT
BLANK end of TACS
c
c ...... . ................... .
Switch data
SCR lOUT -1. 9999 . 0 01
c
C ........................... Source data .. ....... .. .. . ......... .. .. . ..... . ... .
c Bus--><I<Amplitude<Frequency<--TOIPhiO<---O=PhiO <----Tstart<----Tstop
14SCR 3 .1623 60. 0. 0. -1. 9999.
c
C .... . . Current calculated in TACS, fed to Network ................ . ............ .
C Bus--><! <----Tstart<----Tstop
60IOUT -1 -1. 9999.
BLANK end of source
c
c ............. .. ... ... . ... . . Output Request Data
SCR lOUT
c . . . . . . . . . . . . . . . . . . . . . . . . . . . Plot request .... . . . ......... ... . .............. .
C VV<-I<--I<--I<---I<--1 Bus1->Bus2->Bus3->Bus4->Heading-------->Vert Axis------>
194 3 . 0. 30 . -2. 2 . SCR lOUT Current Amp
Figure 2-8 Input data file for the system of Figure 2-7.
2-6
Some remarks may explain certain features BLANK end of TACS ends the
of this case in more detail: TACS part of the data file. Unlike
the components in Network (or
The start of the transient is initi- TACS in older EMTP versions) the
ated by starting the type 90 TACS TACS data cards can be arbitrarily
source SCR at time t=O (TSTART=O ordered. This feature greatly simpli-
in columns 61-70 means source is fies transfer of TACS subsystems
activated at t>O) . The switch be- from one data file to another.
tween nodes SCR and lOUT in Net- The plot requested by the plot card in Fig-
work can therefore be closed per- ure 2-8 is shown in Figure 2-9.
manently (TCLOSE=-1 in columns
15-24). Comparison of Load Representation by
The s-block in TACS has input Network and TACS
-INT. Since the current i(t) in Fig-
ure 2-1 was defined as positive The solutions representing the load by Net-
from lOUT to Ground, INT must be work alone and by Network and TACS
negative since the current source should be almost identical. The plots Figure
type 60 defines current as positive 2-4 and Figure 2-9 are indeed quite similar.
from Ground to lOUT. The nega- Close inspection reveals however, that the
tive sign was arbitrarily entered in current in the Network representation (Fig-
the TACS block lOUT, but it could ure 2-4) starts right at time time t=O, while
have been entered at TACS block the current with the TACS representation
CONS or supplemental function
added (Figure 2-9) is slightly delayed in
INT or as a -1 in the numerator of
the TACS block lOUT. starting.
Note the -1 in columns 9-10 for To study this problem further, Figure 2-10
TACS source lOUT. This defines shows the TACS variable lOUT (curve 2)
the source as a current source. and the Network variable lOUT (curve 1)
The TACS circuit was intentionally plotted on the same axes. This shows that
made more elaborate than neces- the TACS variable not only starts delayed,
sary to be be flexible enough to al- but also remains lagging all of the time .
low its use for variable loads later. The reason for this time shift is the fact that
For instance, the type 11 source the network solution advances from time t
CONS could be eliminated by rede- to t + l'l.t using the TACS commands for
fining the supplemental variable as time t (see section 1.2 and Figure 1-4). The
88 INT = SCR * 377.0. Further- value of the current source lOUT in Net-
more, the supplemental variable work at a time t + l'l.t is consequently the
INT could be eliminated by defining value of the TACS variable lOUT at timet.
the numerator of the s-block lOUT The TACS solution as such is indeed up to
as -377.0 (parameter NO, columns date, but it takes one time step for the
1-10, second card of lOUT) , or by transfer to, and then printout in Network.
defining the GAIN of the s-block as The time shift between Network and TACS
377.0 (parameter GAIN, columns
51-56, first line of s-block). variables lOUT should therefore be one
time step l'l.t = 0.1 milliseconds. A time ex-
TACS HYBRID signals a data file panded plot of both variables (Figure 2-11)
for a case with TACS and Network verifies this fact. The time shift can be de-
components to be modeled . termined most easily by the zero crossings,
which are indeed (0 .001 milliseconds)
(10**2) or 0.1 milliseconds apart.
2-7
co
0
2-
-=
T
0
o+J
c(1.)
(._
(._
::J
(_) ~
0
0. 50 .0
""":
0
'
co
'?
- - SCR
Figure 2-9 Plot of current for circuit with a TAGS load model.
This investigation explains why the solution This one time step error is completely negli-
using TACS representation lags the solution gible in our inrush current example. This
using Network representation by one time one time step delay can result in big errors
step. The Network representation solution is in systems with many switching events, par-
of course always on time. The TACS vari- ticularly in systems containing thyristors
able is always on time in the TACS repre- and diodes . In extreme cases, this delay can
sentation solution, but the transfer to Net- make the solution completely useless .
work introduces a one time step delay.
2-8
Figure 2-10 Comparison of Figures 2-4 to 2-9
2-
~
0
-- --
-<
.....
0
..o.J
c
Q)
(_
(_
::J
(_) ~
0
1 1"'1.0 15.0 16 .0
MiII iSecond
...-:
TiMe
0
'
Figure 2-11 Time expanded plot from Network solution (2) and TAGS solution (1).
2-9
Variable wad Problem 2.2
2.2 TACS Model of a Power Meter

Concept grating over one half cycle only. Then
1
T = - = 0.00833 s.
The instantaneous power in any electrical 2/
component is given by
The average power Pis constant in steady-
state. But the average power varies with
p(t) = v(t) i(t) time during transients. Then the average
power P(t) is of interest during the last half
The average power over a period of time T cycle on a continuous basis. This is called
is of more practical interest. This is given the "rolling average power P(t)." It can be
by: found by continuously computing p(t) and
splitting the integral into two components.
p =1-
T
it
t-T
p(t)dt P(t) =
I
~ [f p(t)dt-
t- T
I p(t)dt]
0 0
= 1 [-
T - - 1) ]
P(t) - P(t
The period of time T is usually one period
of the fundamental frequency f For 60 Hz, The second integral has the value of the
the period becomes: first integral delayed by T seconds . This
suggests an implementation in TACS as
1 1 shown in Figure 2-12 . The delay of the
T = - = - = 0.01667 s.
f 60 value of P(t) by time Tis readily obtained
by using TACS Device Code 53- Transport
In many cases the current and voltage Delay. Its output value is equal to the input
waveforms have half wave symmetry, and value delayed by time T, or output (T) =
the average power P can be found by inte- Input (t-1).
_j_,/ ____
r----------~-------~
-J_:~u~e Type 9
I * p 120
1
L__
Source s
Type 90
II L-.....;-.....1
Supplemental
Variable
Integrator
Network
I TACS
I
Figure 2-12 Rolling Average power, conceptual TAGS block diagram.
2-10
Application Example the average power in the single phase load

analysis of Section 2.1. The detailed block
The power meter conceptually developed in
diagram is shown in Figure 2-13.
the last section will now be used to monitor
Signal- I
r--------------r--1
I I I TACS
I I . . .--__,. . _____, Source
Type 90
II I ~--.-~
I
SCRI
Switch
lOUT
I
SCR~------------------------,
Type 1
s-block
-
Variable
! Supplementa
,.--.....J...---,
lNT lOUT
1
I * - 1131 l S+
*
I I
I
I CONS :
PlNST
Network
Source I
Source
377 :
Type 14
~ype 60 I Type 11 :
120
'--------------------~ s
I Command
4-----
I PB
I
I Device
Code=53 IT=0 .00833 I
I +
Network
I TACS PDEL -
I z-bl~ L
I PAVE1
Figure 2-13 Power meter added to block diagram of Figure 2-7.
The resulting data file is shown in Figure current reference directions compat-
2-14. Some remarks may explain certain ible for power calculations. Of
features of this case in more detail : course the minus sign could be in-
troduced at various other compo-
PAVER is computed by a z-block, nents such as the integrator or z-
which is a degenerated s-block of block PAVER.
Oth order.
The supplemental function The integrator PB has a gain of
88PINST= -SCR lOUT needs a 120 entered as gain in columns
minus sign to make the voltage and 51-56 of the first card.
2-11
BEGIN NEW DATA CASE

c
c ******************************************************************************
C * TACS MODEL OF R-L CIRCUIT WITH POWER METER ADDED *
c ******************************************************************************
c
c . . . . . . . . . . . . . . . . . . . . . . . . . . . Miscellaneous data .. ............. ...... .. . ..... .
10.E-5 SO.E-3
C --IOUT<- -IPlot<-IDoubl<-KSSOut<-MaxOut<---IPun<-MemSav<---ICat<-NEnerg<-IPrSup
1 1
TACS HYBRID
c ... .. .. TACS Voltage Source . Measures Voltage at bus SCR in Network .. .... .. . . .
c
c ******************************************************************************
c * TACS MODEL OF R-L CIRCUIT *
c ******************************************************************************
c
c 90 1 . 0 de FQ ac EMTP VOLTAGE
C OUTPUT <-----A---<----B----<---- C---- <-T-START-<-T-STOP--
90SCR 0.0 60 .
c
C . ...... Step Signal. Represents 1/L .................. .. . ....... . . .... .. . . . ... . . .
c 11 AMPL DC source
11Cons 377. -1. 9999.
c
C . .... TAGS FORTRAN Statement. Supplemental Variable to Multiply CONS * SCR .... . .
c
C OUTPUT = free - format FORTRAN expression ............. .. ...... .. ... .. . .. . .
BBINT =Cons*SCR
c
C .... .. Transfer Function 1/(s + c ) Where c R/L ...................... . ... . . . .
C TRANSFER FUNCTION
c
c <- the order of the highest power of "s" is place in the first two columns
C if greater than 0 two more lines follow for numerator and denominator
c
liOUT -INT
1.
1131 . 1.
c
c
c ******************************************************************************
c * POWER METER *
c ******************************************************************************
c
C . .... . TAGS FORTRAN Statement . Multiplies -SCR * IOUT .. .. ..... ... .... ...... .. . .
C OUTPUT = free-format FORTRAN expression . . ...... . ..... . ..... . ... . ... . .. . ..... .
2-12
88PINST =-SCR*IOUT
c
C ... ... Integrator. First Order s-block .. .... ...... . .. ... .... ... ..... ....... .. . . .
C TRANSFER FUNCTION
c
c
1PB +PINST 120 .
1.
0. 1.
c
C ...... Transport Delay. TACS Device, Type 53 . . .. .. . ................. ......... .
C use 88 in the first two columns
c I I<CODE see rule book
c DEVICEII
c II
C OUTPUTvv+IN1--> +IN2--> +IN3--> +IN4--> +INS--> <--A--<--B--<--C--<--E--<--F--
88PDEL 53+PB . 00833
c
C .. ..... z-block. Used to subtract PDEL from PB to get PAVER . ... . ........ . .. ... .
PAVER +PB -PDEL
C .. . ... TACS output specification . ..... .. .......... .... . ....... . .... . ...... .. ... .
c ----->----->----->----->----->
33SCR lOUT PINST PAVER
BLANK end of TACS
c
c 0 0 0 0 0 0 0 Switch data
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SCR lOUT -1 . 9999 . 0 01
c
C .. . ..... .... . ... . .... .. . .. . Source data
C AC_Source
14SCR 3.1623 60. 0. 0. -1. 9999 0
C ... ... Current calculated in TACS, fed to Network .. . . ...... .. .... .. . .......... .
c Bus--><I <----Tstart<----Tstop
60IOUT -1 -1 . 9999 .
BLANK end of source
c
C . . . . . . . . . . . . . . . . . . . . . . . . . . . Output Request Data ........................... .
SCR lOUT

c
C ........................... Plot request
C Plot data
2-13
C VV<-I<-- I<--I<---I<--1Bus1->Bus2->Bus3->Bus4->Heading-------->Vert Axis------>

194 5 . 0. 50 . -1 . 4.TACS PINST TACS PAVER Power Watts
BLANK end of case
Figure 2-14 Input data file for circuit of Figure 2-13.
The transport delay time is given p(t) and the rolling power P(t) found for the
as T= 0.00833 seconds. The solu- inrush current example of Section 2.1.
tion algorithm can however only im- While p(t) is meaningful starting at t=O , P(t)
plement a delay time equal to an is meaningless up to time t=T=0.0084 sec-
integer multiple of the time onds. In steady-state, the value of P(t) can
step, /:it , rounded upward . In our easily be computed as
case the delay time will be 84 time
P(t) =I ~Ms R
steps for an effective delay time of
0.0084 seconds. This small error = (Tz) 2 3.0 = 1.5 Watts
could be reduced by using a time
step /:it = -,T where N IS
. an .mteger. This agrees perfectly with P(t) of Figure
N 2-15 in steady-state.
Figure 2-15 shows the instantaneous power
<D
M
--
~
.......
N
'-
Q)
3:
0
0...
I
0
0
PINST
PAVER
0.0 10 .0 20 .0 30 .0 -10 .0 50 .0
MiII iSecond
TiMe
Figure 2-15 Instantaneous power (1) and average rolling power (2)
2-14
Variable Load Problem 2.3.
2.3 Application of Variable Load and Power Meter

Single Phase p R
the ratio Q = wL is kept constant. Of
The load representation by TACS as de- course the value of R also changes, but it
scribed in Section 2.1 is particularly useful does not appear explicitly in the model.
for representing a variable load, such as a From the expression for active power
pulsating load. The TACS representation of
the R-L load shown in Figure 2-1 was
p =I 2 R= V ~Ms R = _1_ V~MS
RMS R2 + (wL)Z wL p Q
-+-
1. __ 1_ R Q p
- with c = -
L S+ c L
The variable load can simply be represented the value of ..!._ is found to be
L
1
by varying L in the TACS model in cases
with variable power P, but only as long as where P = I ~Ms R
Signal- I
,-------------1---~
I I TACS
t Source
I I Type 90
II I
SCRI lOUT I SCRr------------------------,
Type! + Supplementa
Switch
I .--------...., s-block .--....L..-....,Yariable
SCR (CONS INT lOUT
I +PULSE) 1
- s+1131 T - * -
I '"------r---..........--'
Supplemental
poNS Variable PINST
Network
Source TACS
Source
I ~E=-~
Type 14 377
Type 60 '--------' 3393
\ 1 Level 120
\
\
I
Source
Type 11
Pulse
Source
s
\ 1 Type 23
L-~----------------- PB
1 - - - - Command
I De~ce
Code=53
IT=0 .00833
I
I +
Network PDEL
I TACS
I z-blo~ L
I PAVE1
Figure 2-16 TAGS representation of a variable load
2-15
will be varied to 15 Watts, while also main-

p
taining the ratio Q = 3. This calls for the
Q = I ~Ms wL 1
value - = 3770 .
p R L
-=--
Q wL This example assumes that the load will
Using the same circuit parameters origi- pulsate from 1.5 Watts to 15 Watts for 50
nally used in Section 2-1 milliseconds , then return to 1.5 Watts for
50 milliseconds, and so on.
p
-=3 VMAx= 3.16 V P= 1.5 W
Q The block diagram to implement this pulsat-
one finds the value ing load is shown in Figure 2-16. The TACS
pulse source type 23 will increase the value
..!_= 4 n 60 *1.5 ( 3 +..!_) = 377 1
L 10 3 of L from 377 (CONS) to 3770. So the am-
plitude of this pulse source is 3770 - 377 =
This is of course the same value that was 3393. The input data file, Figure 2-17 gives
established in Section 2.1. Now the load this value for PULSE in columns 11-20.
BEGI N NEW DATA CASE

c
c ******************** ** *** ******** ******************* ************ *** ********** *
c * APPLICATION OF POWER METER IN A R-L CIRCUIT WITH A VARIABLE LOAD *
c * ALL MODELED IN TACS *
c ************************************************************ ************** ****
c
c
C . . . . . . . . . . . . . . . . . . . . . . . . . . . Miscellaneous data .... . . .... ...... .. .. .. . . .. . . . .
C DeltaT<---TMax<---XOpt<---COpt<-Epsiln<- TolMat<-TStart
10 . E-5 0.2
C --IOut<--IPlot<-IDoubl<-KSSOut<-MaxOut<- --IPun<-MemSav<---ICat<-NEnerg<-IPrSup
25 1
TACS HYBRID
c
c ******************************************************************************
C * TACS MODEL OF R-L CIRCUIT *
c **************************** **************************************************
c
C ....... TACS Voltage Source . Measures Voltage at bus SCR in Network ... . . .. ... .
C OUTPUT <-----A---<----B- ---<---- C---- <-T-START-<-T-STOP--
90SCR 0 .0 60 .
c
C . . ..... Step Signal. Represents 1 / L .......... . . . ........ . . . .. . ................. .
C 11 AMPL DC source
C OUTPUT <-----A---<----B----<---- C---- <-T-START-<-T-STOP--
11Cons 377 . - 1. 9999 .
2-16
c
C ****************** VARIABLE LOAD ************************************
C ..... TAGS Source, Pulse type 23. Increases 1/L to 3770 by adding 3393 to 377 ..
c
c 23 AMPL T(sec) WIDTH pulse
C SOURCE
C OUTPUT <-----A---<----8----<----C---- <-T-START-<-T-STOP--
23PULSE 3393 0.1 . 05 . 05 9999.
C ... .. TAGS FORTRAN Statement. Supplemental Variable to Multiply CONS * SCR ..... .
c
C OUTPUT = free-format FORTRAN expression . . .. .. ... .. ...... . ............. . .
88INT =SCR*(CONS+PULSE)
c
C . . ... . Transfer Function 1/(s + c ) Where c R/L ... .. .. ..... ...... ........... .
C TRANSFER FUNCTION
c
c
liOUT -INT
1.
1131 . 1.
c
c ******************************************************************************
C * POWER METER *
c ******************************************************************************
c
C ... . .. TAGS FORTRAN Statement . Multiplies -SCR * lOUT .... . . .. .. ... .......... . . .
C OUTPUT = free-format FORTRAN expression .. .. .. . . ... ... .. . .. .. .. ..... . .. . . . . . . .
88PINST =-SCR*IOUT
c
C ...... Integrator. First Orders-block .......... . .. .. ... .. . ... .... . .......... .. .
C TRANSFER FUNCTION
c
c
1PB +PINST 120.
1.
0. 1.
c
C .... .. Transport Delay. TAGS Device, Type 53 . . ... . .. . . . . . .. ...... . . . . .. ...... .
c I !<CODE see rule book
c DEVICE! I
c II
2-17

88PDEL S3+PB .00833
c
C ..... . . z-block. Used to subtract PDEL from PB to get PAVER . . ..... ...... .... .. .
PAVER +PB -PDEL
C ..... . TACS output specification ................................ . ..... . ........ .
c ----->----->----->----->----->
33SCR IOUT PINST PAVER
BLANK end of TACS
c
c .... ........ ............ .. .
Switch data
SCR IOUT -1. 9999 . 0 01
c
C .............. . .......... .. Source data
C AC_source
14SCR 3.1623 60. 0. 0. -1. 9999.
C ...... Current calculated in TACS, fed to Network ............................. .
C Bus--><I <----Tstart<----Tstop
60IOUT -1 -1. 9999.
BLANK end of source
c
c ........ .......... .. ...... .
Output Request Data
SCR IOUT
c
c .. ........................ . Plot request
C Plot data
c
C ------Graph type: 4(volts) 8(branch volts) 9(currents)
C I ----Units: 1(deg) 2(cyc) 3(sec) 4(msec) S(micresec)
c II ---------Units per inch
c II ------Plot starting time
c II -Plot stopping time
c II --Value at bottom of vertical scale
c II -Value at top of vertical scale
c II
C VV<-I<--I<--I<---I<--1Bus1->Bus2->Bus3->Bus4->Heading-------->Vert Axis------>
19420. 0 . 200 . -17. 17.TACS IOUT TACS PAVER Pandi WandA
BLANK end of case
Figure 2-17 Input data file for the block diagram of Figure 2-16.
2-18
Every T=0.1 seconds (columns 21-30), a A clearly drawn, clearly marked block dia-
pulse of width of 0.05 seconds (columns gram is in general very helpful in develop-
31-40) is generated. This source starts at ing a model as well as in debugging and
TSTART = .05 seconds (columns 61-70) trouble shooting. Of course, each user will
and stops at TSTOP = 9999 seconds (col- develop his own techniques in detail. Some
umns 71-80), which is long after the simula- computer aided EMTP techniques will even
tion is completed. The addition of CONS + produce a block diagram, although unfortu-
PULSE can still be done in the supplemen- nately these are often not as clear as de-
tal variable 88INT, which is now defined by sired.
the FORTRAN expression SCR (CONS +
PULSE). The FORTRAN code of a supple- A run of this model is shown in Figure
mental variable can be quite elaborate, as 2-18. It behaves as expected, with active
explained in the EPRI/DCG EMTP Rule power pulsating between 1.5 W and 15 W
Book. For clarity it is a good idea to write every 50 milliseconds. Note that the power
this expression as a supplemental variable meter is updated to a new power level
block. within around one cycle of the change.
~~
I
- - - -, I
- - - -
..., N
o ..... I \ I
:X:
.......
a_
L
())
:X
0
~
-<
0
I
I ' \
I I
I
(.D
.........
.-..J
c()) I I I
L
L \
:J
u ~
0
0. 160 0 00.0
i I iS co d
I Me
~
(.D
'
TACS -lOUT
TACS -PAVER
Figure 2-18 Output of power meter, load current.
Three Phase
Power System and Problem Definition The sample system is shown in Figure 2-19 .
For studies in this Section, the transmission
Most of the three phase case studies in this line from bus 1 to bus 2 and the generator
Workbook will be based on a 230 kV sam- at bus 3 are assumed to be out of service.
ple power system, which was developed and Furthermore, the Thevenin Equivalent for
extensively analyzed in EMTP Workbook the system at bus 7 was calculated using the
Volume 1 "Introduction to Transients." methods described in Workbook 1, Section
2-19
200 MVA
0 .9 pf
Figure 2-19 Sample power system modified for variable load problem.
8. To prepare for symmetrical and unsym- rameters for the lines in this sample system
metrical load or fault conditions, the were found in Workbook 1, Section 5 and 7,
Thevenin Equivalent was calculated in se- to be:
quence values . Following the methods of
Workbook 1 (Figure 8.4 (b)) , but without Zero Sequence:
giving intermediate results (which are of no Ro = 0.03167 0/km
interest in this context) the Thevenin Lo= 3.222 mH/km
Equivalent values were found to be: Co= 0.00787 .uFikm
Positive Sequences:
R1 = 0.0243 0/km
Zero Sequence: L 1 =0 .9238 mH/km
Ro= 0.13 0 C1 = 0.0126 .uF/km
Lo= 23.71 mH
The line lengths were given in Workbook 1
as:
Positive Sequence:
R1 = 0.06 0 from bus 1 to bus 7 /1_7 =144.4 km
L 1 =39.99 mH from bus 1 to bus 12 11_ 12 =24.14 km
The transformer between bus 12 and bus 13
The Thevenin Equivalent voltage source was represented by its simplest possible
was the nominal voltage of 230 kV RMS model, just a series inductance. Following
line to line. workbook 1, Section 15, this value was
found to be:
The transmission lines were also repre-
sented by sequence parameters. The pa- LT= 70.16 mH on the 230 kV side.
2-20
The parameters for a certain symmetrical

load at bus 13 were found from the load Reactive
50 Power
flow studies described in Workbook 1, Sec- (MVAR)
tion 2. The results were:
40
Active power in the load
P = 9.5 MW
Reactive power in the load 30
Q = 3.123 MVAR
Voltage at the load 20
V = 68.87 kV
This results in load values, referred to the
230 kV side, as follows: 10
Load resistance
RL= 5006 n 0 25 50 75
t (seconds)
Load inductance
LL = 4365 mH
Figure 2-20 Reactive power variation of
Load inductive reactance a steel mill drive.
xL = 1646 n
All parameters of the sample system are
now known for a constant load. Many mod- marks may explain features of this case in
ern power systems, however, have loads more detail:
which vary greatly and rapidly with time.
Examples of such loads are: The Thevenin Equivalent sources
are line to neutral sources. For a
Thyristor controlled heavy drives, 230 kV system, their peak values
such as steel mill drives (see Figure fi
2-20) are 230 * 7'3= 187.79kV. The fac-
Arc furnaces. tor 1000 for kV and kA is often
This type of load requires corrective meas- omitted in linear problems for nu-
ures, such as reactive power compensation, merical convenience. Resulting
to make the resulting voltage variations ac- power values have to then be multi-
ceptable. This Section will develop tech- plied by 1000*1000=1000000.
niques to represent such variable loads with The Thevenin Equivalent imped-
TACS and to measure the rolling active ance is entered in sequence values
power in such variable loads . as mutually coupled R-L elements
of type 51, 52, and 53. This is ex-
plained in the EPRIIDCG EMTP
Rule Book.
Constant Load Representation by The transmission line parameters
Network are entered as distributed parameter
sequence values type -1, -2, and -3,
The sample power system of Figure 2-19 as explained in the Workbook. With
with the parameters established in the last ILINE=O (columns 51-52) and
Section was first analyzed in steady state, XOPT=O (Mise card, columns
with a constant load . The load was repre- 17-24), inductance is entered in
sented by Network components, namely, mH/km, capacitance is entered in
R-L branches . The detailed EMTP diagram ,uF/km. With IPOSE=O (columns
is shown in Figure 2-21 . The resulting input 55-56), the line is defined as trans-
data file is shown in Figure 2-22. Some re- posed.
2-21
Since everything is symmetrical in There are no commands forwarded

this case, the average power in from TACS to Network. TACS is
phases A, B, and C will be identi- used strictly as a postprocessor, not
cal. Therefore it is sufficient to use as a simulator.
a power meter for phase A only.
SOURCE TRANSMISSION LINES
Thev A Bus7A BuslA Bus12A

Three Phase
Thev B The venin Bus7B BuslB Bus 12B
Equivalent
Sequence
Thev C Values Bus7C BuslC
Three Phase Line

90 Miles
Sequence Values
L
Sources
TACS
Source
Type 90 '---r--' T=0.00833
Device Code 53
---------------------------------------'
Figure 2-21 EMTP diagram of sample 3-phase system with power meter.
2-22
Variable LiJad Problem 2.3.
BEGIN NEW DATA CASE

c
c ******************************************************************************
c * THREE PHASE SYSTEM WITH A POWER METER *
c ******************************************************************************
C . . . . . . . . . . . . . . . . . . . . . . . . . . . Miscellaneous data ....... . . ................ . .. . .
20.E-6 SO . E-3
C DeltaT<---TMax<---XOpt<---COpt <-Epsiln<-TolMat<-TStart
1 1
c
TAGS HYBRID
c *****************************************************************************
c * POWER METER *
c *****************************************************************************
c
C . . .. . . . TAGS Voltage Source. Measures Voltage at bus SCR in Network ........ . . .
90IL13A 60. -1. 99999.
c
C ..... .. TAGS Current Source, measures switch current in Network ... ............ .
C ....... and feeds it to TAGS .. .......... . ...................... . . ...... ....... .
C 91 1 . 0 de FQ ac EMTP AMPS
91BUS13A 60. -1 . 99999.
c
C ...... TAGS FORTRAN, Multiplication. Calculates PINSTA
C OUTPUT = free-format FORTRAN expression ................................ .
88PINSTA =BUS13A*IL13A
c
c
C ...... Integrator . First Order s-block .............. . .. .. .... . . .... . ..... .. .... .
C TRANSFER FUNCTION
c
c
1PB +PINSTA 120.
1.
0. 1.
c
C ...... Transport Delay. TAGS Device, Type 53 ................................. .
C I I <CODE see rule book
c DEVICE II
c II
2-23

88PDEL S3+PB . 00833
c
C . . . ... . z-block . Used to subtract PDEL from PB to get PAVER ............. . ..... .
PA +PB -PDEL
c
C . .. ... TACS output specification . .. .. . . .. . . . . . . ...... . .. ... . .. .. .. ... .... . .. . .. .
c ----->- ---->-- --->--- -->----->
33PINSTAPA
BLANK end of TACS
c
c ........................ .. . Circuit data
C INDUCTOR
BUS12ABUS13A 70 . 16 0
BUS12BBUS13B 70 . 16 0
BUS12CBUS13C 70 . 16 0
C RL
C Bu s1->Bus2->Bus3 - >Bus4-><---- R<- - - -L<-- - - C
I L13A S006 . 436S.
IL13B S006 . 436S .
IL13C 5006 . 436S .
C 3_p_RL_MD
C Bus1->Bus2-><---------- ><----R<--- -------L<----R<----------L<----R<---- ------L
S1THEVA BUS7A . 13 23 . 71
S2THEVB BUS7B .06 39 . 99
S3THEVC BUS7C
C 3_p_line_t
C Bus1->Bus2->Bus3->Bus4-><---R' <--- -A<-- - - B<--len 0 0 0<--- ----- ---------- --->0
-1BUS7A BUS1A . 03167 3 . 222 . 00787 144 . 4 0 0
- 2BUS7B BUS1B . 0243 .9238 . 0126 144 . 4 0 0
-3BUS7C BUS1C
-1BUS1A BUS12A . 03167 3 . 222 . 00787 24 . 14 0 0
- 2BUS1B BUS12B . 0243 . 9238 . 0126 24 . 14 0 0
-3BUS1C BUS12C
BLANK end of branch dat a
c
c .......................... . Switch data
C Bus-->Bus--><-- -Tclose<- - - -Topen<------- I e 0
BUS13 AIL13A 0. 9999 . 1
BUS13BIL13B 0. 9999 . 1
BUS13CIL13C 0. 9999 . 1
c
C .......... . .. . ... . ... . ..... Source data .............. . .. .. .......... . ..... . . .
C Bus--><I<Amplitude<Frequency<- -TOIPhiO<--- O=PhiO <-- --Tstart<----Tstop
14THEVA 187 . 79 60 . 0. 0. -1. 9999.
14THEVB 187 . 79 60. -120 . 0. -1. 9999 .
14THEVC 187 . 79 60 . 120. 0. -1. 9999 .
BLANK end of source
c
2-24
c .. . ... .. . ..... . . . ..... . . . . . Output Request Data

C Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus -->Bus-->Bus-->
BUSlA BUS13ABUS7A
c
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . Plot request ... . ...... . . . .... .. ............... .
C Plot data
C VV<-I<--I<--I<---I<-- !Busl->Bus2- >Bus3->Bus4->Heading-------->Vert Axis------>
144 5. 0 . 50 . -200 . 200 . BUS7A BUSlA BUS13A Voltages KVolt
BLANK end of case
Figure 2- 22 Input data file for the system of Figure 2-21 .
Results of a run using this input file are kV. The actual voltage for the load imped-
shown in Figure 2-23 . The average power is ance use is 236.7 kV. This results in a total
3.37 MW per phase, or 10.11 MW total. load of 10.11 MW , which agrees with the
This compares with the assumed value of output of the power meter.
P= 9.5 MW based on a bus voltage of 230
~
00
:a:.~
%: <D
'-
Q)
3: 0
0 'I"
0...
"'
~ -PI~STA
0 -PA
0.0 10 .0 20 .0 30 .0 "'lO .O 50 .0
MiII iSecond
TiMe
Figure 2-23 Instantaneous and average power.
2-25
Constant Load Represented by TACS TACS as explained in Section 2.1. The

EMTP diagram in Figure 2-24 shows the
If the load is variable, or in particular if the
same system as described in the last section
load is pulsating, then it is more suitable to
using a TACS representation of the load.
represent the resistive-inductive load in
Thev A Bus7A Bus1A Bus12A

Three Phase
Thev B The venin Bus7B Bus1B Bus12B
Equivalent
Sequence
Thev C Values Bus7C Bus1C
Three Phase Line Three Phase Line

90 Miles 15 Miles
Sequence Values Sequence Values
L
Transformer
,_,.--"-;.=====-=-
Sources
Type 14
.-.-.-
--------------;>/ /
,:~~;:'ILl~
I LOAD
If3A
,
_.-.- ( I Sources ~ ) 1
( I . I Type 60 7 I 7 I 7 I
NETWORK 1 Signal Signall S1gnall I I 1
TAcs----r---------------t------- -----t--~-t-
source T f
TACS Type 11 CpMMIANDf)
Source
Type 90
.22907
Bus13C
CONS
Supplemental
Variable
PB +
* z-block PA
Supplemental s-block
Variable
T=0 .00833
Device Code 53
Figure 2-24 EMTP model with TAGS current source.
2- 26
Variable wad Problem 2.3.
The resulting input data file is shown in The only difference in Network is
Figure 2-25. Some remarks may help to ex- replacing the branches R-L by
plain the features of this case in more de- TACS EMfP sources type 60.
tail : Since everything is symmetrical in
this case, the average power in all
The TACS representation of the three phases A, B, and C will be
R-L load follows the method of identical. Therefore it is sufficient
Section 2.1, but now for all three to use one power meter only, which
phases A, B, and C. will be assigned to phase A. For
The coefficient c in the s-block is unsymmetrical loads, the power me-
now given by the load parameters ter can easily be expanded to find
as: power in all three phases and then
add them up for a total average
R 5006 power P3 = PA + PB + Pc
c = - = - - = 1146.8
L 4.365 The results of a run with this input data file
is practically the same as shown in Figure
The coefficient 2.. = CONS is now: 2-23 . A close inspection would reveal the
L
1 1 one time step delay as explained in Section
- = - - = 0.22907 2.1. The error introduced is negligible in
L 4.365 this case, particularly since the time step
was reduced to l!:.t = 20 microseconds .
2-27
Variable Load Problem 2.3 .
BEGIN NEW DATA CASE

c ******************************************************************************
c * *
C * THREE PHASE SYSTEM , WITH CONSTANT LOAD MODELED IN TACS AND THE *
C * TACS POWER DESCRIBED EARLIER IN THIS CHAPTER. *
c * *
c ******************************************************************************
c
C . . . . . . . . . . . . . . . . . . . . . . . . . . . Miscellaneous data ..... ... .......... .. ......... .
20.E-6 SO . E-3
C --IOut<--IPlot<-IDoubl<-KSSOut<-MaxOut<---IPun<-MemSav<---ICat<-NEnerg<-IPrSu
1 1
c
TACS HYBRID
c ******************************************************************************
c * TACS MODEL OF CONSTANT THREE PHASE LOAD *
c ******************************************************************************
c
C ....... TACS Voltage Source. Measures Voltage at bus SCR in Network .. .. . .. ... .
C 90 1. 0 de FQ ac EMTP VOLTAGE
90BUS13A 60 .
90BUS13B 60 .
90BUS13C 60.
c
C ....... Step Signal. Represents 1/L = 0.22907 (L=4.365 H) ................... .
C 11 AMPL DC source
11CONS . 22907 -1. 9999 .
c
C ...... TACS FORTRAN STATEMENT, REPRESENTS V*(1/L) ... ... . ...................... .
c
C OUTPUT = free-format FORTRAN expression . ..... . . ... .. . ....... ... ....... . .
88INT_A =BUS13A*CONS
88INT_B =BUS13B*CONS
88INT_C =BUS13C*CONS
c
C .. .. . . S-BLOCK 1/ (s + c) WHERE C=R/L .. . ...... . . . . . . . ................... .... .
C TRANSFER FUNCTION
c
c
1IL13A -INT_A
1.
2-28
1146 . 807 1.
1IL13B -INT_B
1.
1146.807 1.
1IL13C -INT_C
1.
1146 . 807 1.
c
c *************************************************************************
C * TACS POWER METER *
c *************************************************************************
c
C . ... .. TACS FORTRAN STATEMENT, V*I = INSTANTANEOUS POWER ... . ..... .. .... .. .
c
C OUTPUT = free-format FORTRAN expression . .. ........ .... . . .. . . ...... .. ... .
88PINSTA =-BUS13A*IL13A
c
C ... .. . . . S-BLOCK INTEGRATOR ....... . ................. . ... .. ..... . . . ....... .
C TRANSFER FUNCTION
c
c
C -N/D-0--<-N/D-1---<--N/D-2--<--N/D-3--<--N/ D-4--<--N/D-5--<--N/D-6--<--N/D-7--
1PB +PINSTA 120.
1.
0. 1.
c
c ...... TRANSPORT DELAY, TACS DEVICE CODE 53 ....... .. .. ... ..... . .. ..... ... . . ... .
c use 88 in the first two columns
c II <CODE see rule book
c DEVICE II
c II
88PDEL 53+PB .00833
c
C .. . ... . z-block . Used to subtract PDEL from PB to get PAVER ................ . .. .
PA +PB -PDEL
c
C ...... TACS output specification ........ . . ..... . ............ ..... ........... . .. .
c ----->----->----->----->----->
33PINSTAPA
BLANK end of TACS
c .......................... . Circuit data
C INDUCTOR
C Bus1->Bus2->Bus3->Bus4-><----R<----L<----C
BUS12ABUS13A 70 . 16 0
BUS12BBUS13B 70 . 16 0
BUS12CBUS13C 70 . 16 0
2-29
Variable Load Problem 2.3 .
C 3_p_RL_MD
C Bus1->Bus2-><----------><----R<--------- -L<----R<---- --- ---L<----R<----------L
51THEVA BUS7A . 13 23 . 71
52THEVB BUS7B . 06 39 . 99
53THEVC BUS7C
C 3_p_line_t
C Bus1->Bus2->Bus3->Bus4-><---R'<----A<----B<--len 0 0 0<---------- ----------->0
-1BUS7A BUS1A . 03167 3.222 . 00787 144 . 4 0 0
-2BUS7B BUS1B .0243 .9238 . 0126 144.4 0 0
-3BUS7C BUS1C
-1BUS1A BUS12A . 03167 3 . 222.00787 24 . 14 0 0
-2BUS1 B BUS12B . 0243 . 9238 . 0126 24 . 14 0 0
-3BUS1C BUS12C
c ... . ... ... . . .... . ... ... . . . . Switch data
C Bus-->Bus--><---Tclose<---- Topen<-------Ie 0
BUS13AIL13A -1 . 9999 . 1
BUS13BIL13B -1. 9999 . 1

BUS13CIL13C -1. 9999. 1
C . . . . .......... . ...... . ... . . Source data
C AC_source
C Bus - -><I<Amplitude<Frequency<--TOIPhiO<---O=PhiO <----Tstart<----Tstop
14THEVA 187.79 60 . 0. 0. -1. 9999 .
14THEVB 187 . 79 60 . -120 . 0. -1. 9999 .
14THEVC 187 . 79 60 . 120 . 0. -1. 9999 .
C ...... Current calculated in TACS , fed to Network .. ... . ... . ...... . ............ .
C Bus-- ><I <----Tstart<----Tstop
60IL13A -1 -1 . 9999.
60IL13B -1 -1 . 9999 .
60IL13C -1 -1 . 9999 .
BLANK end of source
c .. ..... ... ... .. .... . .. .. . . . Output Request Data
C Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-->Bus-- >Bus-->
BUS1A BUS13ABUS7A
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . Plot request
C Plot data
c II
C VV<- I<--I<--I<---I<--1Bus1->Bus2->Bus3->Bus4->Heading-------->Vert Axis------>
144 5 . 0 . 50 . -200 . 200 . BUS7A BUS1A BUS13A Voltages KVolt
BLANK end of case
Figure 2-25 Input data file for Figure 2-24.
2-30
Variable Load Representation by shown in Figure 2-26. The rated load at bus
TACS using a Step Function 13 is 200 MVA = 1 p. u. In the load flow
study, the load was increased in 0.05 p.u.
The sample system shown in Figure 2-19
will now be analyzed with the following steps (or 10 MVA) keeping !.._ = 3. 042 con-
modifications: Q
stant. The voltage at bus 7 was kept at
The load at bus 13 will be variable nominal voltage 230 kV = 1.0 p.u. The volt-
A capacitor bank will be connected ages at bus 1 and bus 13 are given based on
to bus 1. Vbus7 = l.OLO p.u. In the TACS model for
During load variations, it will be assumed the load as developed in Section 2.1, the
that the ratio value of c for this study will be constant
and is given by:
Activ.e Power = !.._ = ...!!_ = 3 . 042
Reactive Power Q wL
will remain constant. The results of a load c= (J) .....!!..__ = 377. 3.042 = 1146.8
flow study for a variable load at bus 13 is wL
BUS# 13 BUS# 1 BUS# 13

LOAD LEVEL VARS
P.U . P-LOAD Q-LOAD GENERATED VOLTAGE ANGLE VOLTAGE ANGLE
1.10 209 .00 68.88 70 .2446 0 .9370 - 17.646 0 .8692 -29.973

1.05 199 .50 65.57 73 .3176 0.9573 - 16 .721 0.8958 -25.476
1.00 190 .00 62.45 75 .9392 0 .9743 - 15 .875 0.9180 -23.856
0.95 180 .50 59 .33 78.2884 0.9892 - 15.081 0.9377 -22 .396
0.90 171.00 56 .21 80 .4265 1.0027 - 14.327 0 .9554 -21.035
0.85 161.50 53.08 82.3964 1.0149 - 13.605 0.9715 -19 .758
0.80 152 .00 49 .96 84.2110 1.0260 - 12 .910 0 .9683 - 18 .550
0.75 142.50 46 .84 85 .9237 1.0364 - 12 .237 1.0000 -17 .399
0.70 133 .00 43 .72 87 .5200 1.0459 - 11.5 83 1.0128 - 16 .295
0.65 123 .50 40 .59 89 .0244 1.0549 - 10 .945 1.0248 - 15 .232
0 .60 114.00 37.47 90.4420 1.0633 - 10.332 1.0361 - 14.205
0.55 104 .50 34.35 91.7830 1.0711 - 9 .71 2 1.0467 - 13 .209
0 .50 95 .00 31.23 93 .0537 1.0785 - 9. 113 1.0567 - 12 .240
0 .45 85.50 28 .10 94.2619 1.0855 - 8.524 1.0662 - 11.295
0.40 76.00 24.98 95.4078 1.0921 - 7.944 1.0753 - 10.372
0.35 66 .50 21.86 96.4975 1.0983 7.372 1.0839 - 9.468
0.30 57 .00 18 .74 97.5340 1.1042 6.808 1.0920 - 8.581
0.25 47.50 15 .61 98 .5226 1.1097 6.251 1.0998 - 7 .711
0 .20 38 .00 12 .49 99.4617 1.1150 5.699 1.1073 - 6.854
0 . 15 28 .50 9 .37 100 .3550 1.1200 5. 153 1.1143 - 6.010
0 . 10 19.00 6.25 101.2060 1.1248 4.612 1.1211 - 5.178
0 .05 9 .50 3.12 102.0160 1.1293 4.076 1.1276 - 4.356
0 .00 0 .00 0 .00 102.7850 1.1335 3.543 1.1338 - 3.544
Figure 2-26 Load flow study for sample system of Figure 2-19.
The value of ~ will vary with the load, and where w = 2nf = 377
is given as:
p
2_ = ~pi ( !.._ + Q) = 1270 .8 _!2._ -= 3.042
L v RMS Q p v ~MS Q
2-31
SAME NETWORK AS IN FIGURE 2-24 To

Source
~--r---------------------~--------------------~--~ IL13
NETWORK
TACS
Bus 13A Bus 13B
TACS
Source
TACS
Bus 13C
Source
----m
TACS .--...L---, Type 90 Type 9 0 ....---_.__....,
Source
Type 90
LEVEL SOURCE
Bus13A TYPE 11 Bus13C
Bus13A (CONS! Bus13B*(CONS1 Bus13C*(CONS1

+CONS2+CONS3 +CONS2+CONS3 +CONS2+CONS3
+CONS4) +CONS4) +CONS4)
PB
PA
s-block
T=0.00833
Device Code 53
Figure 2-27 EMTP diagram for a case with a variable load and level sources.
p 1 =single phase power-Watts 1

2.. = 1270.8 p3
L 3 to- 6
(23oooo)2v 2
VRMs =single phase voltage-Volts /3 pu
1 p3
The load flow study gives the three phase -= 2
power P3 in MW, and the load voltage Vpu L 41.63 V pu
in per unit value. With the relationships:
The load in this example will be increased

in four steps:
the equation will be: P3 =9.5 to 114 to 190 to 209 MW
2-32
1 senting a load of 9.5 MW. When

The corresponding values of computed
L switching to 114 MW, we need ..!_
by the above formula are: L
2.5510. Rather than turning off
CONS1 at that time, it is easier to
..!..=0.1795 to 2.551 to 5.416 to 6.645 add the difference in a second level
L
source CONS2 = 2.5510 - 0.1795
The values of the varying ..!.. in TACS will 2.3715. CONS3 and CONS4 are
L also found accordingly.
most easily be implemented by adding level
sources of type 11 at the time of the load Note that the power part of the
variation. Figure 2-27 shows the EMTP dia- system, Network, does not change
at all with a variable load.
gram for this case. Only the TACS part of
the diagram is shown. The Network part for Rather than using a z-block to add
the variable load case is exactly identical to CONS1 + CONS2 + CONS3 +
the Network part given in Figure 2-24. The CONS4, the addition can more eas-
resulting input data file is shown in Figure ily be done in the FORTRAN sup-
2-28. Some remarks may help to explain plemental variable INT_A together
the features of this case in more detail: with the multiplication by BUS13A.
The power in all three phases A,
The first level source 11 repre- B, and C will be identical in steady
senting ..!.. is CONS1=0.1795, repre- state. One average power meter is
L therefore sufficient.
BEGIN NEW DATA CASE

c ****************************************************************************
c * *
C * THREE PHASE NETWORK WITH A VARIABLE LOAD. LOAD MODELED AS INCREASING *
C * IN 4 STEPS USING LEVEL DELAYED STEP SOURCES . ALSO HAS TACS POWER METER *
c * *
c ****************************************************************************
c
C . . . . . . . . . . . . . . . . . . . . . . . . . . . Miscellaneous data . . . .. .. .. . .. . . . .......... . . .
SO . E-6 0 .2
C --IOut<--IPlot<-IDoubl<-KSSOut<-MaxOut<---IPun<-MemSav<---ICat<-NEnerg<-IPrSup
1 1
c
TACS HYBRID
c
c ******************************************************************************
C * TACS LOAD REPRESENTATION *
c ******************************************************************************
c
C . .. . .. . TACS Voltage Source . Measures Voltage at bus SCR in Network ......... . .
C OUTPUT <-----A--- <---- B----<----C---- <-T-START-<-T-STOP--
90BUS13A 60 .
90BUS13B 60 .
90BUS13C 60.
C ..... STEP SOURCES REPRESENTING THE DIFFERENT LEVELS OF 1/L .. . .. . . . . ... .... ... .
2-33
C INITIALLY L= 5 . 571 mH, SO 1 / L= 0.1795

C AT t=0.05 sec. ADD 2.3715 TO 1/L SO 1 / L= 2 . 5510
C AT t=0 . 1 sec . ADD 2.8650 SO 1/L= 5 . 4159
C AT t=0 . 15 sec . ADD 1 . 2293 SO 1/L= 6.6452
c
c ...... . Step
Signal. Represents 1 / L .. . ..... .. .. . .. . . ... . ....... .. ... . ..... . .. . . .
C 11 AMPL DC source
C OUTPUT <-----A---<----B----<----C--- - <-T-START-<-T-STOP--
11CONS1 .1795 -1 . 9999 .
11CONS2 2. 3715 0.05 9999 .
11CONS3 2.8650 0.1 9999 .
11CONS4 1 . 2293 .15 9999.
c
C .. . . . TACS FORTRAN Statement. Supplemental Variable to Multiply BUS13 * SCR .. . .
c
C OUTPUT = free-format FORTRAN expression . . ... . ....... . ..... . .. ... .. ... .. .
88INT_A =BUS13A*(CONS1+CONS2+CONS3+CONS4 )
88INT_B =BUS13B* (CONS1+CONS2+CONS3+CONS4)
88INT_C =BUS13C* (CONS1+CONS2+CONS3+CONS4 )
c
C . ..... Transfer Function 1/(s + c ) Where c R/ L . .. ... .... . ..... . ... . .. .. . . .. .
C TRANSFER FUNCTION
c
C if greater than 0 two more lines fol l ow for numerator and denominator
c
C OUTPUT +IN1--> + I N2--> +IN3--> + IN4 --> +I NS--> <-gain<--low<-highLOW-->HIGH->
C - N/D-0--<-N/ D-1---<-- N/D-2--<--N/ D-3 --<--N/ D-4--<--N/ D-5--<--N/ D- 6--<--N/D-7--
1IL13A -INT_A
1.
1146 . 807 1.
1IL13B -INT_B
1.
1146 . 807 1.
1IL13C -INT_C
1.
1146 . 807 1.
c
c ***************************************** * *************************************
c * TACS POWER METER *
c **************************************** ***************************************
c
C . .. . . . TAGS FORTRAN Statement. Multiplies - SCR * !OUT ... .. .. . . . . ... .. ..... . .. . .
C OUTPUT = free-format FORTRAN expression ...... . ......... . . .. . . . . . . . ... .. . .. . . .
c
C .. . . . . Integrator . First Orders-block ..... .. .. . .... .. ....... . .... . .. .. .... . .. . .
C TRANSFER FUNCTION
c
C <- the order of the highest powe r of " s" i s place in the first two columns
2-34
c
C -N/D-0--<-N/D-1---<--N/D-2--<--N/D-3--<-- N/D-4--<--N/D-5--<--N/D-6--<--N/D-7--
1PB +PINSTA 120 .
1.
0. 1.
c
C ... . . . Transport Delay. TACS Device, Type 53 . ... ............ ..... ... .... .... . .
c DEVICE II
c II
C OUTPUTvv+INl--> +IN2--> +IN3--> +IN4--> +INS--> <--A--<--B--<--C--<--E--<--F--
88PDEL 53+PB .00833
c
C ....... z-block . Used to subtract PDEL from PB to get PAVER ............. . .. .. . .
C OUTPUT +INl--> +IN2--> +IN3--> +IN4--> +INS--> <-gain<--low<-highLOW-->HIGH- >
PA +PB - PDEL
c
C . . .... TACS output specification .. . ............................................ .
c ----->----->----->----->----->
33PINSTAPA
BLANK end of TACS
c
c .... .. .................... . Circuit data
C CAPACITOR
BUSlB 4 . 011 0
BUSlA 4 . 011 0
BUSlC 4 . 011 0
c INDUCTOR
c Busl->Bus2->Bus3->Bus4-><----R<----L<--- -C
BUS12ABUS13A 70 . 16 0
BUS12BBUS13B 70 . 16 0
BUS12CBUS13C 70 . 16 0
c 3_p_RL_MD
C Bus1->Bus2-><----------><----R<----------L<----R<------ ----L<----R<----------L
51 THEVA BUS7 A . 13 23. 71
52THEVB BUS7B . 06 39 . 99
53THEVC BUS7C
C 3_p_line_t
C Busl->Bus2->Bus3->Bus4-><---R' <----A<----B<--l en 0 0 0<--------------------->0
-1BUS7A BUSlA . 03167 3 . 222.00787 144 .4 0 0
-2BUS7B BUSlB . 0243 . 9238 . 0126 144 . 4 0 0
-3BUS7C BUSlC
-lBUSlA BUS12A . 03167 3 . 222 . 00787 24.14 0 0
-2BUS1B BUS12B . 0243 . 9238 . 0126 24.14 0 0
-3BUS1C BUS12C
C switch
BUS13AIL13A -1. 9999 . 1
2-35
BUS13BIL13B -1. 9999 . 1

BUS13CIL13C - 1. 9999 . 1
c
C . .... . . ....... . .. ....... ... Source data
C AC_source
14THEVA 187 . 79 60 . 0. 0. -1 . 9999 .
14THEVB 187 . 79 60. - 120 . 0. -1 . 9999 .
14THEVC 187 . 79 60 . 120 . 0. -1. 9999 .
c
C . . ... . Current calculated in TACS, fed to Network .... ... .. . . . .. . . ...... . . . . . .. .
C Bus--><I <-- --Tstart<----Tstop
60IL13A -1 -1. 9999 .
60IL13B - 1 -1 . 9999 .
60IL13C -1 -1 . 9999 .
BLANK end of source
c
c . .. .. ... .. . . . .. . . . . . . ... . .
Output Request Data
C Bus-->Bus-->Bus-->Bus- ->Bus-->Bus-->Bus-- >Bus-- >Bus- ->Bus-->Bus-->Bus-->Bus-->
BUS1A BUS13ABUS7A
c
C ............................ Plot reque st ..... . . . . . .. . . . . . .. . .. . ... . .... .. . .
C Plot data
c
C ------Graph type : 4(volts) 8(branch volts ) 9(currents)
C I ----Units : 1 ( deg) 2(cyc) 3(sec) 4(msec ) S(micresec)
c 11 ---------Units per inch
c II - Plot stopping time
c II
C VV<- I<-- I<-- I <--- I <--1Bus1 - >Bus2->Bus3->Bus4->Heading-------->Vert Axis - --- -->
19420 . 0 . 200. -20 . 80.TACS PA PowerA MW
BLANK end of case
Figure 2-28 Input data file for circuit of Figure 2-27.
Results of a run of the EMTP with the input ond row is the results of the EMTPffACS
data file of Figure 2-28 are shown in Fig- file shown in Figure 2-28 where the base
ures 2-29 and 2-30. In Figure 2-31 the val- voltage is the source behind the Thevenin
ues for the average power P and the voltage equivalent. This results in a different refer-
at bus 1 from the original load flow study ence voltage than that assumed in the load
are compared to the results of the TACS flow case. The last row in Figure 2-31 is a
simulation. In Figure 2-31 the first row rerun of the load flow with the voltage ref-
comes from the load flow shown in Figure erence the same as the EMTPffACS
2-26 where the voltages on bus 1 are based case
on constant p.u. voltages at bus 7. The sec-
2-36
~
~
(\.J
~
~
-
0c.D
0-
>-
Q.) ""' ~
0>
<0 0co
_.j
0
>- ~
0
00 . 8 .0 12 .0 160 .0 00 .0
0 Mi li con
a::'
~ Ti
0
~
BUS1A
~
~
~
Figure 2-29 BUSJA voltage for changing load
@
:X
::E
'-
Q.) 0
3: 0
0 ....-
c...
~
0
(\.J
TACS PA
0
0
0.0 "10 .0 80 .0 120 .0 160.0 200.0
Mi I l iSecond
TiMe
Figure 2-30 Output of power meter for load
2-37
ANALYSIS PL (MW) IV bus tl (p.u.)
9.5 1.1293
Original Load 114 1.0633
Flow 190 0.9743
209 0.9370
9 .8 1.1529
115 1.0597
EMTP-TACS
186.2 0.9660
202.5 0.9244
9 .8 1.1490
Load Flow 115 1.0729
Reduced System 186.2 0.9732
202 .5 0.9336
Figure 2-31 Load flow data for sample system of figure 2-19 with capacitors.
Variable Load Represented by TACS The type 23 pulse source adds to

Using a Pulse Source. this level source. To get 2..=5.4195
L
for the 186.2 MW load, the pulse
Load variations in power systems are often source has to add 5.4195 - 0.1795
pulsating in nature as shown in Figure 2-20. = 5.24 to the level source, entered
as an amplitude in columns 11-20.
This example will now assume a load on
bus 13 pulsating between 9.8 MW and The cycle time, that is the time be-
186.2 MW for the sample system of Figure tween high power pulses, is T = 0.1
seconds. This is entered in columns
2-19. The corresponding values of 2.. are 21-30 .
L The duration of each high power
0.1795 and 5.4159. A pulsating value of ~ pulse is WIDTH= 0.05 seconds, en-
tered in columns 31-40.
can most easily be represented by a pulse The first high power pulse starts at
source of type 23. Figure 2-32 shows the TSTART = 0.05 seconds, entered in
EMTP diagram for this case. Only the 61-70.
TACS part of the diagram is shown. The T-STOP = 9999. seconds means
Network part is identical to the Network that the pulses continue throughout
with the constant load given in Figure 2-24. the run time of the simulation,
The resulting input data file is shown in which is less than 9999 seconds.
Figure 2-33. Some remarks may help to One power meter is sufficient, as
explain the features of this case in more de- before.
tail:
The results of a run of the EMTP with this

The type 11 level source CONS1 = input data file are shown in Figure 2-34 and
0.1795 represents the lower value 2-35. The pulse time is too short for the
of 2.. corresponding to 9.8 MW. voltage at bus 1 to settle to steady state
L (Figure 2-34). However, the average power
2-38
Variable l.J:Jad Problem 2.3
in Figure 2-35 reaches its new level very in the next Sections to analyze Static Var
quickly after the application of the pulse. systems and other control measures used to
The TACS methods to represent variable stabilize the system voltages under variable
loads in power systems will be most useful load conditions.
SAME NETWORK AS IN FIGURE 2-24 To

Source
~--~---------------------r--------------------~----~ IL13
Bus 13C
-----H~-
Bus 13A Bus 13B
NETWORK
--------
TACS
TACS TACS TACS

Source Source Source
Type 90 '--.....---' Type 90 Type 9 0 '---.---'
Bus13A Bus13B Bus13C
CONS1
PB
PA
s-block
T=0 .00833
Device Code 53
Figure 2-32 EMTP diagram for a variable load modeled with a pulse source.
2-39
BEGIN NEW DATA CASE

c ******************************************************************************
c * *
c * THREE PHASE NETWORK WITH VARIABLE LOAD REPRESENTED IN TACS BY *
c * A PULSE SOURCE ADDED TO A STEP SIGNAL *
c * *
c ******************************************************************************
C . . . . . . . . . . . . . . . . . . . . . . . . . . . Miscellaneous data . .. . .... . . ..... . .. .. .. . . . . .. . .
50 . E-6 0.2
C --IOut<--IPlot<-IDoubl<-KSSOut<-MaxOut<---IPun<-MemSav<---ICat<-NEnerg<-IPrSu
31 1
c
TACS HYBRID
c
c ******************************************************************************
C * TACS LOAD REPRESENTATION *
c ******************************************************************************
c
C . ...... TACS Voltage Source . Measures Voltage at bus SCR in Network ... .. . . . .. .
C 90 1.0 de FQ ac EMTP VOLTAGE
90BUS13A 60 .
90BUS13B 60 .
90BUS13C 60.
c
C . . . ... LEVEL SOURCE 1/L= 0.1795 . . . .. . .. . .. . . .. ... . . ... . .. . . . .. . .. . ........ . .. . .
c 11 AMPL DC source
11CONS1 .1795 -1. 9999 .
c
c . . . TACS Source, Pulse type 23 . Increases 1/L to 5 . 4195 by adding 5.24 to 0 . 1795
c
c 23 AMPL T(sec) WIDTH pulse
c <TYPE code in the first two columns
c SOURCE
C OUTPUT <-----A---<----B----<- ---C---- <-T-START-<-T-STOP--
23CONS2 5 . 24 .1 . 05 .05 9999 .
c
C . ... . TACS FORTRAN Statement . Supplemental Variable to Multiply BUS13 * SCR
C . .... ON EACH PHASE . ... . . .. . . . . .. ... . . ... .... . .. . . . .... ... . .. .. .... . ..... .
c
C OUTPUT = free-format FORTRAN expression . . ...... . .... . ..... ... .. . . ... .. . .
88INT_ A =BUS13A*(CONS1+CONS2)
88INT_B =BUS13B*(CONS1+CONS2)
88INT_C =BUS13C*(CONS1+CONS2)
c
C .. ... . Transfer Function 1/(s + c ) Where c R/L . . .. . .. . . . .. . . . .. . ... . . . .. ... .
C TRANSFER FUNCTION
2-40
c
c
C -N/D-0--<-N/D-1---<--N/ D-2--<--N/D-3--<--N/D-4--<--N/D-5--<--N/D-6--<--N/D-7--
1IL13A -INT_A
1.
1146 807
0 1.
1IL13B -INT_B
1.
1146.807 1.
1IL13C -INT_C
1.
1146.807 1.
c
c *******************************************************************************
C * TAGS POWER METER *
c *******************************************************************************
c
C ...... TACS FORTRAN Statement. Multiplies -SCR * IOUT . ...... . ... ... . .. . ... .. . . .
C OUTPUT = free-format FORTRAN expression ... . ...... . . .... . . .... .. ..... ... ..... .
c
C ...... Integrator . First Order s-block .. .. .. .................... ... . . .. ... .... . .
C TRANSFER FUNCTION
c
c
lPB +PINSTA 120 .
1.
0. 1.
c
C ...... Transport Delay . TACS Device, Type 53 . ............ ........... ......... .
C DEVICE!!
c II
88PDEL 53+PB . 00833
c
C .. ..... z-block. Used to subtract PDEL from PB to get PAVER .... .. ............. .
PA +PB -PDEL
C . .... . TACS output specification .... .. ......... .. .. .. . ...... . ........... ..... . . .
c ----->----->----->----->----->
33PINSTAPA
BLANK end of TACS
c
2-41
c .. ... ... ... . .. ... ... . ... .. .

Circuit data
C CAPACITOR
BUS1B 4 . 011 0
BUS1A 4 . 011 0
BUS1C 4.011 0
C INDUCTOR
BUS12ABUS13A 70 . 16 0
BUS12BBUS13B 70.16 0
BUS12CBUS13C 70 . 16 0
C 3_p_RL_MD
C Bus1->Bus2-><----------><----R<--------- -L<----R<----------L<----R<----------L
51THEVA BUS7A . 13 23 . 71
52THEVB BUS7B . 06 39 . 99
53THEVC BUS7C
C 3_p_line_t
C Bus1->Bus2->Bus3->Bus4-><---R' <----A<---- B<--len 0 0 0<--------------------->
-1BUS7A BUS1A .03167 3 . 222 .00787 144.4 0 0
-2BUS7B BUS1B .0243 .9238 . 0126 144 . 4 0 0
-3BUS7C BUS1C
-1BUS1A BUS12A . 03167 3 . 222 . 00787 24 .14 0 0
-2BUS1B BUS12B .0243 . 9238 . 0126 24 . 14 0 0
-3BUS1C BUS12C
c
c .. ......... .. ... . .. .. ..... .
Switch data
C Bus-->Bus--><---Tclose<----Topen<-------I e 0
BUS13AIL13A -1. 9999 . 1
BUS13BIL13B -1 . 9999. 1
BUS13CIL13C -1. 9999 . 1
c
C .................. . . ...... . Source data
C AC_source
14THEVA 187 . 79 60. 0. 0. -1. 9999 .
14THEVB 187 . 79 60 . -120 . 0. -1. 9999 .
14THEVC 187.79 60 . 120. 0. -1. 9999 .
c
C ...... Current calculated in TACS, fed to Network .................... . ........ .
C Bus--><! <----Tstart<----Tstop
60IL13A -1 -1. 9999.
60IL13B -1 -1 . 9999 .
60IL13C -1 - 1. 9999.
BLANK end of source
c
c ... . .. .. ....... . .......... .
Output Request Data
BUSlA BUS13ABUS7A
c
2-42
C ............................ Plot request . .. . . ... . .. ... .. . ..... ...... . ..... .

C Plot data
c
C ------Graph type: 4(volts) 8(branch volts) 9(currents)
C I ----Units: l(deg) 2(cyc) 3(sec) 4(msec) S(micresec)
C II ---------Units per inch
C II ------Plot starting time
C II I -Plot stopping time
C II I I --Value at bottom of vertical scale
C II I I -Value at top of vertical scale
c II I I I
C VV<-I<--I<--I<---I<--1Busl->Bus2- >Bus3->Bus4->Heading------ -->Vert Axis------>
14420 . 0.200.-300 . 300.BUS1A Voltage KV
BLANK end of case
Figure 2-33 Input data file for the system of Figure 2-32.
~
0
0
M
~
A
~ f f
0
..., 0
0(\J
Q)
>-
~

(1 ~ v \
!I A
v,
~
0>
co
~
0
> 0
0
0 .0 ~p . o 8 .0 12 .0 160 .0 00.0
~ Mi 1iS econ
0
~
'
v v vT IE
rJ
~ v v
v v v
0
~
v v 1-- BUS1A
0
8
M
.
Figure 2-34 Plot of voltage at bus 1 for an EMTP run of file of figure 2-33
2-43
~
8
~
L
(l) ~
~
0 ~
a_
~
0
"'
TACS -PA
0
0
0.0 -40 .0 80.0 120 .0 160 .0 200 .0
MiII iSecond
TiMe
Figure 2-35 Plot of average power in phase A from EMTP file in figure 2-33
2-44
Chapter 3
Static Var System

3.1 Fundamentals of Static Var Compensators
Introduction characteristic behavior is almost equivalent
to an ideal system voltage source at the
Static Var compensators are controlled point of connection except that it has a lim-
shunt devices applied to power systems to ited range in which the voltage can be con-
solve a variety of problems. They are prin- trolled.
cipally used to maintain terminal voltages at
or near a constant level, to improve power Figure 3-2 shows a component representa-
system stability, and to hold the power fac- tion using a variable inductance in parallel
tor of a load near unity. The most important with a variable capacitor. In actual systems
property of a static compensator is its abil- a variable (thyristor controlled) reactor is
ity to maintain a constant voltage at its ter- used in parallel with a fixed capacitor to
minals by continuous adjustment of the re- achieve the same reactive power control.
active power it exchanges with the power
system.
I
I
Voltage I
I
I
\
\
\ Figure 3-2 Static Var compensator
\
\
\
\
\
\ Voltage Stabilization
\
\
\ In weak systems or systems with long trans-
mission lines, the voltage is significantly af-
Leading Current Lagging fected by load variation as well as by
switching of lines, reactors, capacitor
Figure 3-1 Steady-State voltage vs banks, transformers, etc. Under heavy
current loads, the voltage will drop considerably or
even collapse. However, when the load is
light, overvoltages can arise. This can cause
The most prevalent types of compensators transformer saturation, which can result in
are the thyristor controlled reactor (TCR) excessive harmonics and even ferro-reso-
and the thyristor switched capacitor (TSC). nance.
The applications considered in this section
will deal only with the TCR. A typical volt- Voltage variation at the end of a transmis-
age-current characteristic of a static Var sion line as a function of the loading for
compensator (SVC) is shown in Figure different compensation is given in Figure
3-1. The SVC can provide leading to lag- 3-3. For systems having P/Po larger than
ging reactive power to an AC system. This 1.0 (Po = natural load), there are large
3-1
Static Var System
changes in voltage for small changes in Load Balancing

power. This can cause the problems dis-
cussed earlier. For weak networks the sys- Single phase or asymmetrical loads may
tem voltage collapses when the loading ex- also affect voltages on weak systems. This
ceeds a critical value. Fixed capacitive volt- could cause voltage asymmetry and over-
age support can increase the voltage stabil- loading of the system. With the addition of
ity margin but cannot deal with sudden load appropriate shunt reactive components it is
variations such as electrical arc furnaces or possible to balance load voltages and cor-
steel rolling mills. These types of load are rect power factor. For balancing asymmetri-
classical applications for static Var compen- cal varying loads such as arc furnaces and
sators. single phase drives a static Var compensa-
tor is a practical solution.
v For these types of loads it is possible to op-
E
erate the SVC with individual phase con-
1.088
trols in such a way as to balance the loads.
1.00 In addition, the same system could be used
to correct the power factor of the load or to
stabilize the voltage in general. There are
many more exotic applications for SVC sys-
0.50 tems. For example:
Increase of power transfer capacity
0.0
Improvement of transient stability
0 1.0 P/Po
2.0 Improvement of system damping
Figure 3-3 Voltage variation vs power Damping of subsynchronous reso-
nance
Reactive compensation for HVDC
Reduction of temporary overvol-
tages
3.2 Basic Operation of Back to Back Switch

Thyristor Controlled Reactor puts are used by a closed loop controller to
create firing signals for the thyristor valves
The basic static Var compensator consists which in turn provide the correct reactive
of a thyristor controlled reactor in parallel compensation in the high voltage bus .
with a fixed capacitor. The basic rating of
the leading reactive power is the same as Principles of Operation
the capacitive value while the lagging rating
is the inductive reactive power minus the The most basic element in a thyristor con-
capacitive. trolled reactor is the thyristor. This is a sili-
con device consisting of four levels of semi-
The basic components of a SVC are shown conductor material which operates as a con-
in Figure 3-4. The TCR and fixed capaci- trolled switch. It will conduct current only in
tors are normally placed on a lower voltage the forward direction, can block voltage in
bus with the system controlling the voltage both directions, turns on only when a gate
on the high voltage bus. The controller uses signal is provided and turns off after a cur-
a reference voltage along with a measured rent zero. This device is shown in Figure
voltage of the high voltage bus. These in- 3-5.
3-2
Static Var System
HV Bus point, 0!, to the turn off point, 0! + a, where

a is the conduction time.
IL PT
1la+a
i(t) =- v(wt)dwt
L a
If the voltage is purely fundamental fre-
quency, then
i(t) = ~ (cosa- cos wt)

TCR Fixed Capacitors wL
The fundamental component of current is
Figure 3-4 TCR Compensator with found by Fourier analysis.
capacitors
The basis of the thyristor controlled reactor
(TCR) is shown in Figure 3-6. The switch-
ing element is shown here as two op-
11 = Vrms
wL
(a- n a)
sin
positely poled thyristors which conduct on

alternate half-cycles of the supply fre-
quency. If the thyristors are gated at the
point where the voltage is at a peak, full
conduction results. This is shown by the
~ v(t) ~
dotted current curve (0! = 90) . This is as if
the thyristors where shorted out, resulting in
a current which Jags the voltage by 90 .
Gate
Cathode
TYPICAL RATINGS
Blocking voltage; 3-6kV
Current; 1-3 kA
Figure 3-5 Thyristor
If the gating is delayed from the peak volt-

age (0! > 90) the current becomes discon-
tinuous with a reduced fundamental compo-
nent of reactive current. This partial con-
duction is obtained with gating angles, 0!,
between 90 and 180. The effect of in-
creasing the gating angle is to reduce the
fundamental component of reactive current.
The basic equation for current can be found Figure 3-6 Controlled reactor
by integrating the voltage from the gating
3-3
Static Var System
In Figure 3. 7 the current wave forms are mum value of reactive current is obtained
shown for five different conduction times, for a= 180.
a. The control law is also shown. The maxi-
Applied Voltage
100 %
Fundamental current
80
60
40
20
0 20 40 60 80 100 120 140 160 180

Conduction Angle, a, Degrees
Figure 3-7 Fundamental reactive current
3.3 Basic Steady State Model

Fundamental current model By looking at the equation for magnitude of
fundamental current,
In general it is seen from Figure 3.6 or 3. 7
that the reactive current from the static Var
compensator will have harmonics for any
operation point with an C greater than 90 . 11 = Vrms
wL
(a- n a)
sin
These harmonics can be a problem but nor-
mally they are controlled through filters
and symmetric firing systems.
it is possible to deduce that the value of in-
For many transient studies it is possible to ductance ranges from L to infinity. To in-
neglect these harmonics. For cases where clude this feature into a differential equa-
the harmonics can be neglected a simple tion a scaling factor needs to be introduced.
fundamental current model can be used. This results in the following equations:
Note that in Figure 3. 7 the fundamental
reactive current depends upon a in a non- L di
linear way, having zero current at zero a V(t) =-- 0SKS1
and maximum current at a a of 180. K dt
Most control systems will generate a re- I(s) =!... V(s)

quired reactive current value which is con- L s
verted to a using a look up table . For the
fundamental current model sigma and the The second equation is the Laplace form
nonlinear features need not be considered. which describes the transient behavior of
3-4
Static Var System
the reactive current as a function of the studies. From these studies the range of the
voltage across the TCR and the scaling fac- controlled reactive power can be calculated.
tor K . This can be easily modeled using a Normally the capacitive range is first deter-
TACS transfer function and the voltage mined, taking into consideration the effects
from the network as shown in Figure of reduced voltage,
3-8.
v(t) from EMTP
,, to EMTP Qc rated = Qc min (

Vrated)
V min
2
FOR~_,
control i(t)
IC
1 ... Once this range is found the inductive reac-
s.
L tive power can be found. For the problems
in the sample system a load flow was run
Figure 3-8 Basic TAGS model, TCR with an ideal reactive power source on bus
#1 in Figure 3.9. For the maximum load of
209 MW, 1.10 pu, the required reactive
Basic reactive current needs power to hold voltage at 1.0 pu is 114.5
MVar capacitive while for the no load 29 .3
In an actual application of a static Var sys- MVar inductive is required.
tem the particular problem should be un- If a 10% under voltage is assumed, then
derstood. For our work the problems of dy-
namic load changes on the sample power
system discussed in section 2.3 will be stud-
ied . For this load it is important to have the Qc rated= 141 .3 Mvar
correct dynamic range of reactive power to
control the dynamic voltage changes. This
can be achieved through a set of load flow which at 230 kV requires a reactance of
Figure 3-9 Sample power system
3-5
Static Var System
which leads to
2
X= (230) = 374.4 ohms
141.3 X = (230? = 310Q
171
or C = 7.0 J..LF. or L = 0.8 H
The inductive reactive power is the sum of
no load and full load, With these values of capacitance and in-
ductance it is possible to build the dynamic
Q = 141.3 + 29.3 = 171 MVar inductive. model of a SVC shown in Figure 3-8.
3-6
Static Var System
3.4 Simple TACS Model in Three Phase System

3 Phase model with dynamic load bus 1. The models for the load are the same
developed in Section 2 of this Workbook.
As with most cases in this workbook series
the 230 kV sample power system developed For voltage support a thyristor controlled
in Workbook 1 will be used. This basic sys- reactor with a fixed capacitor will be placed
tem is shown in Figure 3-9. For the studies on bus 1. For the first series of examples
in this Section, the transmission line from the TCR will not be included but the load
bus 1 to bus 2 and the generator at bus 3 model and the fixed capacitors will be in-
are assumed to be out of service. On bus 13 cluded. This will allow us to better study the
it is assumed that there is a dynamic load problem and observe the effects of the
which causes problems with the voltage on TCR.

Three Phase
Thev B Thevenin Bus7B Bus1B Bus12B
Equivalent f----{::j~:::;CJ-f-r---c4:="::t.:::J-----,
Sequence
Thev C Values Bus7C Bus1C
Three Phase Line Three Phase Line

90 Miles 15 Miles
Sequence Values Sequence Values
L
Sources
Type 14 IL13C, B, A
LOAD
Sources
TTT
f
Type 60 7 7 7
Figure 3-10 Power system without TCR
A three phase Thevenin equivalent for the The load model is the TACS model devel-
system (Figure 3-9) at bus 7 is used. This oped in Section 2.1. In this model the R/wL
was first described in Workbook 1 and ratio is held fixed at 1146.8 while the value
again in this Workbook in Section 2.3. The of 1/L will vary with the load as given.
Thevenin equivalent voltage source is the
nominal voltage of 230 kV RMS line to line .
The transmission lines from bus 7 to bus 1

1
-=-
wP (p- +Q)
- = 1270.8P-
L ~ms Q P ~ms
and from bus 1 to bus 12 were modeled us-
ing the ideal distributed line model. The
transformer between bus 12 and bus 13 was For this study, a step load will be used. The
represented by a series inductance, re- first level will be 9.5 MW with the second
ferred to the 230 kV side, of 70.16 mH. The level 209 MW. The corresponding values of
capacitors on bus 1 are sized to provide 141 1/L computed by the above formula are
MVar (C = 7.0 J.lF) . .1795 and 6.645. These values in TACS are
3-7
Static Var System
;x:O
X .
g
L
(l)
3:
0
0...
- TACS -PA
~
C)
0.0 "10 .0 80 .0 120 .0 160.0 200 .0

Mi II iSecond
Figure 3-11 Measured power phase A Bus 13
implemented by adding sources type 11 at which the RMS value is calculated from the
the time of load variation. This results in sum of the inputs . The only other quantity
the following values for the source types de- required is the frequency for which the
fined in Figure 2-27: RMS calculation is to be performed. This is
entered in field "A", columns 51-56. In col-
consl = 0.1795 umns 8-9 the Type code 66 is also entered.
See the end of Section 3 for some test runs
cons2 = 0.0 on the RMS meter and the errors produced
cons3 = 6.4658 when the wrong base frequency is used.
Figure 3-11 shows the measured power on
cons4 = 0.0 bus 12. This represents the dynamic load on
The outputs from this case are the follow- phase A. The load for the first 100 millisec-
onds is about 3.0 MW per phase or 9.0 MW
ing:
total. After 100 milliseconds, the load has a
measured power on bus 13A step change. This is seen in the power me-
ter output with a delay required for the in-
voltage on phase A bus 1 ternal integration used in evaluation of load
power. This output is approximately 75
RMS voltage on phase A bus 1 MW per phase or 225 MW total.
The RMS voltage is found using a TACS The phase voltage on phase A, bus 1, along
supplemental device. This device is a RMS with the output of the RMS meter is shown
meter which allows one to five inputs from in Figure 3-12. For the first 100 millisec-
3-8
Static Var System
1\ (\ 1\ {\ (\
~ (\
~ II {\
1\ 1\
~
0
r- - - - r- r- -
>- '-
-"'
I """"' - - - - -
~
~
I
<1.) I
0>
<0
~
0
>- ~
0
"'
0 .J p.o 8 .0 12 .0 160 0 00 .0
Mi I iS con
~ Ti 'lE
~
'
~
0
S2
' v v v v v
-- BUS1A
v v v v v v - TACS -VI1HS1A
0
f2
~
Figure 3-12 Phase A voltage bus 1

onds there is a light load and an overvoltage 3-Phase model with dynamic load
close to 30%. This is due to the fixed ca- and TCR
pacitors on bus 1 without the thyristor con-
trolled inductance to control this light load
overvoltage. In the presence of full load it is The basic problem requires control of bus 1
seen that the load along with the fixed ca- voltage during load changes at bus 13. This
pacitor holds the voltage at rated value. Of is to be achieved by placing a thyristor con-
course, a larger load would result in an un- trolled reactor with a fixed capacitor on bus
dervoltage. 1. In Section 3.3 it was found that 7.0~ of
capacitance and 0.8H of inductance per
The next step is to place the TCR on bus 1 phase was required to control the voltage
along with the fixed capacitor. To control over the dynamic range of the load . The
voltage there is also the need to design a model for the network is shown in Figure
voltage controller with a response fast 3-13. Here a TACS controlled current
enough to hold voltage near rated value source has been added to simulate the TCR.
during step changes in the load.
3-9
Static Var System

Three Phase
Thev B The venin Bus7B Bus12B
Equivalent
Sequence
Thev C Values Bus7C
Sources
Type 14 T ACS current model
for TCR Type 60 LOAD+
Sources
Type 60 -:-
+l
r rr
Figure 3-13 Power system with TCR
The first step is to model the behavior of able KIL is to be supplied by the voltage
the TCR as explained in Section 3.3. controller while v(t) is the bus 1 phase volt-
age. This voltage is a type 90 TACS source
v(t) from EMTP with the names BUSlA, BUSlB and BUSlC
for each phase. The variable from the con-
, to EMTP troller is the same for each phase, is labeled
control
FOR:-''-1 1 I i(t) ..
BLgam.
K
- ~ VRMSpu 1
L
L
Figure 3-14 Basic current model for TCR
K Epu 1
s L
The TCR model shown in Figure 3-14 is
required for each phase. The output i(t) is
the TACS controlled current source seen in UNITY
Figure 3-13 . In the source section of the
network data this is represented by three
type 60 sources with the names TCRA, Figure 3-15 Basic voltage controller
TCRB, TCRC. These names are also the for TCR
TACS names on the output of first order
transfer functions . The inputs are BgamA, The basic voltage controller is shown in Fig-
B, C respectively. ure 3-15. It consists of two transfer func-
tion blocks, one zero order with static lim-
There are two inputs to the FORTRAN mul- its, the other a first order function with a
tiplication block in Figure 3-14. The vari- gain K. The inputs are a TACS source
3-10
Static Var System
UNITY and a scaled output from a RMS

meter.
rzT
For an overvoltage, VRMSpu is greater than E x K Jo dt = 1. 0 where E = 0.1
UNITY, providing a positive error input to
the integrator. This increases the output
Epu, which is K in the model. When this is results in a gain .of K = 300.
multiplied by 1/L the result is the control-
ling factor requited by the TACS model
shown in Fig 3-14. If the error or gain on The EMTP date file is shown in Figure 3-17
the integrator is too large Epu could be- while the results are shown in Figure 3-16.
come larger than unity, resulting in a region Again the results of load change can be
not allowed . This is solved by the limits 1/L seen after 100 milliseconds. Before this
on the zero transfer function. point there is a light load with an overvol-
tage during the first 20 milliseconds. The
The value of 1/L is 1/0.8 = 1.25. The gain second curve is the RMS voltage . Note that
of the integrator, K, controls the response of it takes one cycle for the system to become
the controller. In this case K was chosen so initialized and two more cycles for the volt-
the TCR goes from full on to full off in two age controller to reduce the overvoltage. Af-
cycles with a 10% error in voltage. Using 60 ter 100 milliseconds the large load results in
Hz as the basic frequency in the following an undervoltage which is again corrected by
integral, the controller in two cycles .
~
0
.....
N
{\
0
~ A A
::! - N A {\ (\
A
{\ A (\ A I
-
0 I
>-
.>./. '- 1-- - r- - t- - r- - H - r- t- -
I ~-
<1.)
~
0 .J
"'
0) en
<0
o+J
0
::>- ~
0
"'
0 .D "0 .0 8 .0 12( .0 160 0 00.0
Mi liS ~con
0
0
~ Ti ~I
~
0
!!2
' v v v v v v v v
-- BUSL~
v
0 v v - . lACS -VI1HS1A
f2
N
'
Figure 3-16 Bus 1 voltage with SVC
3-11
Static Var System
BEGIN NEW DATA CASE

c
c *******************************************************************************
c * *
c * THREE PHASE SYSTEM OF CHAPTER 2 , WITH VARIABLE LOAD AND *
c * POWER METER, WITH STATIC VAR MODEL ADDED. *
c * *
c *******************************************************************************
C MISC_CARD
SO . E-6 0.2
31 1
TACS HYBRID
c
c *******************************************************************************
c * TACS MODEL OF VARIABLE LOAD , USING STEP SOURCES TO VARY 1/L *
c * AS WAS DONE IN FIGURE 2-27 *
c *******************************************************************************
c . ..... . TACS Voltage Source . Measures Voltage at bus 13 in Network ...... .... .
90BUS13A 60 .
90BUS13B 60 .
90BUS13C 60.
C ..... . . Step Signal . Represents 1/L .. . . ..... . . .. .. .... . . ... . ...... . . . ....... .. . .
C . . . .... 1/L =0.1795 INITIALLY, AND JUMPS BY 6.4658 AT t=0.1 SEC .... .. . ... . .. . .
c 11 AMPL DC source
11CONS1 . 1795 -1 . 9999.
11CONS2 0. 0.05 9999.
11CONS3 6.4658 0.1 9999.
11CONS4 0. . 15 9999 .
c
C .. .. . TACS FORTRAN Statement. Supplemental Variable to Multiply BUS13 * SCR . . .
c
C OUTPUT = free-format FORTRAN expression ... .. . .... ... ... .. ...... .. ... . . . .
88INT_A =BUS13A*(CONS1+CONS2+CONS3+CONS4)
88INT_B =BUS13B*(CONS1+CONS2+CONS3+CONS4)
88INT_C =BUS13C*(CONS1+CONS2+CONS3+CONS4)
c
C . . .... Transfer Function 1 / (s + c ) Where c R/L . . . . .. ... ...... .. .... . . . .. . . . .
C TRANSFER FUNCTION
c
C OUTPUT +INl--> +IN2--> +IN3--> +IN4--> +INS--> <-gain<--low<-highLOW-->HIGH->
C -N/ D-0--<-N/D-1---<--N/D-2--<--N/D-3--<--N/ D-4--<--N/D-5--<--N/D-6--<--N/D-7--
1IL13A -INT_A
1.
3-12
Static Var System
1146.807 1.
1IL13B -INT_B
1.
1146.807 1.
1IL13C -INT_C
1.
1146.807 1.
c
c END OF LOAD MODEL
c
c ***************************************************************************
c * TACS MODEL OF POWER METER, AS INTRODUCED IN FIGURE 2-7 *
c ***************************************************************************
c
C ... ... ... TACS FORTRAN, CALCULATES INSTANTANEOUS POWER .. .. . . .. .. ... . ... . ...... .
C OUTPUT = free-format FORTRAN expression . . ...... . ...... ... .. . ...... ... . .... .. .
c
C .... .. Integrator. First Order s-block ........... ......... .................... . .
C TRANSFER FUNCTION
c
c
C OUTPUT +IN1--> +IN2--> +IN3--> +IN4--> +INS-- > <-gain<--low<-highLOW-->HIGH->
C -N/D-0--<-N/D- 1---<--N/D-2--<--N/D-3--<--N/D-4--<--N/D-5--<--N/D-6--<--N/D-7--
1PB +PINSTA 120 .
1.
0. 1.
c
C ...... Transport Delay . TACS Device , Type 53 . . .... . ... . .. .. .......... ... ..... .
C DEVICE! I
c II
88PDEL 53+PB .00833
c
C ....... z-block. Used to subtract PDEL from PB to get PAVER .. ... .. .. .. . .. ..... .
PA +PB -PDEL
c
C ...... END OF POWER METER ... . .. ...... . .. . .. . ..... . ......... .... .. .... ...... . .. .
c
c *******************************************************************************
c * *
c * TCR MODEL *
c * *
c *******************************************************************************
c
c
c
3-13
Static Var System
c **************************************************************************** * **
C * TCR VOLTAGE CONTROLLER SEE FIGURE 3 - 1S *
c ************************************* **** ** **** ** ******* ******** ****** ****** ***
c 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
C . . .. .. RMS METER , TACS DEVICE , ' TYPE 66 ........................ . . . ........... . . . .

c
c DEVICEII
c II
C OUTPUTvv+IN1--> +IN2--> +IN3--> +IN4 --> +INS--> <--A--<--B--<--C--<--E--<--F- -
88VRMS1A66+BUS1A 60 .
c
C . . . . . . TACS FORTRAN STATEMENT , TO SCALE VRMS TO PER UNIT ...... . . . . . . .. ....... .
C . .. . ..... TACS FORTRAN, CALCULATES INSTANTANEOUS POWER . . ................. . ... . .
C OUTPUT = free-format FORTRAN expression .. . . .... . ... . ... . ...... . . . .. . . . .. . . .. .
88VRMSpu =VRMS1A/ 132 . 7876
c
C . . S- BLOCK , USED TO SUBTRACT VALUES OF TACS UNITY FROM VRMSpu, AND SCALE BY
300/ S
C .... . . Transfer Function 1 /( s + c ) Where c = R/ L . . .. . .. .. . . ............. . ... . .
C TRANSFER FUNCTION
c
C OUTPUT +IN1--> +IN2 --> +IN3-- > +IN4--> + INS-- > <-gain<--low<-highLOW-->HIGH->
C -N/ D-0--<-N/ D-1---<--N/ D-2--<--N/D-3--<--N/ D-4- -<- -N/ D-S--<--N/ D-6--<--N/D- 7--
1Epu +VRMSpu -UNITY 300 .
1.
0. 1.
c
C . .. Z-BLOCK, LIMITER, SCALES BY 1/L=1 . 2S, AND LIMITS OUPUT BETWEEN 0 AND 1.2S.
C OUTPUT +IN1--> +IN2--> +IN3--> +IN4 --> + INS--> <-gain<--low<-highLOW-->HIGH- >
BLgam +Epu 1 . 2S 0 . 1 . 2S
c
C . . . ... END OF VOLTAGE CONTROLLER .............. . ...... . ........ . ......... . ..... .
c
c ************************************* ******* ************* *** ***** ******* ** *****
C * BASIC CURRENT MODEL FOR TCR, SEE FIGURE 3-14 *
c ************************************* *** ***************************************
c
C .... .. VOLTAGE READ FROM BUS 1 OF NETWORK .. . ........ .. .. . ................. . .... .
C OUTPUT <-----A---<--- -B---- <----C---- <- T-START-<-T-STOP--
90BUS1A 60 .
90BUS1B 60 .
90BUS1C 60 .
c
C . .... . TACS FORTRAN MULTIPLIES BUS VOLTAGES TIME OUTPUT OF LIMITER ........ . . . .. .
C OUTPUT = free-format FORTRAN expression .. .. ................................ . .
88BgamA =BUS1A*BLgam
88BgamB =BUS1B*BLgam
3-14
Static Var System
88BgamC =BUS1C*BLgam
c
C .. .... INTEGRATOR 1/S ONE FOR EACH PHASE . . .. . ...... . ...... ..... . . . .. . . . ... .. . . . .
C TRANSFER FUNCTION
c
c
C OUTPUT +IN1--> +IN2--> +IN3--> +IN4--> +INS--> <-gain<--low<-highLOW-->HIGH- >
1TCRA -BgamA
1.
0. 1.
1TCRB -BgamB
1.
0. 1.
1TCRC -BgamC
1.
0. 1.
c END OF TCR CURRENT MODEL
c
C .. .... TACS output specification ....... ... ....... ... ... .... .. ..... . . ..... ... ... .
c ----->----->----->----->----->
33PINSTAPA BUS1A VRMS1AEpu BLgam
c
BLANK end of TACS
C CAPACITOR
BUS1A 7. 0
BUS1B 7. 0
BUS1C 7. 0
C INDUCTOR
BUS12ABUS13A 70 .1 6 0
BUS12BBUS13B 70 . 16 0
BUS12CBUS13C 70.16 0
C 3_p_RL_MD
51THEVA BUS7A .13 23 . 71
52THEVB BUS7B .06 39.99
53THEVC BUS7C
C 3_p_line_t
-1BUS7A BUS1A . 03167 3 . 222 . 00787 144 . 4 0 0
-2BUS7B BUS1B .0243 .9 238 . 0126 144.4 0 0
-3BUS7C BUS1C
-1BUS1A BUS12A . 03167 3 . 222 . 00787 24 .14 0 0
-2BUS1B BUS12B .0243 .9238 .0126 24.14 0 0
-3BUS1C BUS12C
c switch
BUS13AIL13A -1. 9999 . 1
BUS13BIL13B -1. 9999 . 1
BUS13CIL13C -1. 9999 . 1
BUS1C TCRC -1. 9999. 1
BUS1B TCRB -1. 9999. 1
3-15
Static Var System
BUS1A TCRA -1. 9999 . 1

C AC_source
14THEVA 187.79 60 . 0. 0. -1. 9999.
14THEVB 187 . 79 60 . -120 . 0. -1. 9999.
14THEVC 187 . 79 60. 120. 0. -1. 9999 .
c
C ...... Current calculated in TACS, fed to Network ............... . .... . .. .. .. . . .
C Bus--><I <----Tstart<----Tstop
60IL13A -1 -1. 9999.
60IL13B -1 -1 . 9999 .
60IL13C -1 -1 . 9999 .
60TCRC -1 -1 . 9999.
60TCRB -1 -1 . 9999 .
60TCRA -1 -1. 9999.
BLANK end of source
C output_request
BUS1A BUS13ABUS7A
C plot_request
19420. 0.200 . -300.300.TACS BUS1A TACS VRMS1AVoltage KV
BLANK end of case
Figure 3-17 EMTPITACS listing of static Var model
3-16
Chapter 4
Thyristor Models
4.1 Basic Characteristics of Thyristors

The application of solid-state technology to duct three to four thousand amperes of cur-
power systems was made possible by the in- rent and block up to five thousand volts
crease in the voltage and current ratings of across their terminals.
thyristors. Currently these devices can con-
Forward
Current
Conduction
Region (on state)
Reverse Blocking Forward (off state)

Voltage Blocking Voltage
Reverse
Current
Figure 4-1 Thyristor characteristics.
Figure 4-1 shows the basic current vs volt- duction by avalanche breakdown can cause
age characteristics of a thyristor. Important damage to the thyristors and should be
values are the forward and reverse blocking avoided.
voltage and the voltage level in the conduc-
During conduction due to a gate voltage,
tion region. The blocking voltages indicate the device looks like a closed switch, except
the range for which the device will hold off for a small voltage representing a loss. Cur-
voltage. In this region a thyristor looks like rently these devices have a conduction volt-
an open switch. When voltage across the age of around one volt, keeping the losses
device exceeds these values the thyristor low and allowing an ideal switch to be an
will conduct by avalanche breakdown. Con- excellent model of a thyristor.
4-1
Thyristor Models
4.2 EMTP Thyristor Model

The EMTP provides several switching type GTO, or many other types of switching de-
device models. These are a diode, a thyris- vices. These switches are modeled as type
tor, and a general TACS controlled switch. 11 switches in the EMTP portion of the pro-
This latter device, in conjunction with the gram.
correct TACS logic, can simulate such
items as a circuit breaker with restrike, a
ANODE CATHODE
-----/.
BUS1
__ BUS2
GATE
f
GRID (TACS name)
I IDEAL THYRISTOR TYPE 11 SWITCH I

CLOSES WHEN OPENS WHEN CURRENT
GRID> 0.0 BECOMES NEGATIVE
Voltage > 0.0
Figure 4-2 Ideal thyristor switch type 11
The ideal thyristor is a switch that is con- switch is closed it will remain closed until
trolled by a logic signal from TACS (called the current becomes negative. The GRID
GRID in Figure 4-2). When the voltage signal can be removed any time after the
across the switch is positive (cathode to an- current is established and the switch will re-
ode) and there is a GRID signal (greater main closed.
than 0.0) the switch will close. If the voltage
is not positive, or if there is no GRID signal, The form of the input data for a type 11
the switch will remain open. Once the switch is shown in Figure 4-3.
1 2 3 4 5 6 7 8
12345678901234567890123456789012345678901234567890123456789012345678901234567890
T c TACS Names 0
L Eu
y
Node Node 0
s
p V;g tDEION A OPEN/ c t
I HOLD
e
Name Name s M GRID CLOSE hP
(in sec .) E ou
E
D t
11 A6 A6 E10 . 0 ElO . O E10.0 A6 A4 A6 A6 1
Figure 4-3 EMTP data format for type 11 switch
In columns 1-2 the code 11 is used, fol- If the switch is to be closed during initia-
lowed by the node names. The name of the lization, the key word CLOSED is used as
anode is listed first, followed by the cathode shown, or left blank for an open switch. In
name . As other bus names, they must be columns 65 to 70 the name of a TACS vari-
six or fewer characters, and must be left able used to fire the thyristor must appear,
justified. Columns 15-54 are not used . or the device will function as a diode. The
4-2
Thyristor Models
firing variable must be greater than zero to fects of discreteness, or time step size. Dur-
close the switch. It is also advised that ing turn on and turn off, there are errors
when using type 11 switches that the ECHO which are introduced by the discreteness.
feature be activated. This will provide the
times when the device opens and closes.
This has proven to be a very powerful tool In most applications of thyristors to power
in building thyristor based models . ECHO electronic systems, the points of turn on
is activated by a 1 in position 79. and turn off are very critical. For example
in HVDC systems the firing point is usually
accurate to within 0.25. This ensures mini-
When simulating thyristors with a digital mum harmonic generation.
program, care must also be given to the ef-
correct a
EMTP a
timing error ""-a = ""-t turn on error
Figure 4-4 Turn on errors due to time step size
In Figure 4-4 some sources of errors intro- The turn off of the thyristor introduces dif-
duced by time step size are illustrated. Nor- ferent problems. There is a possibility of
mally the firing point is found by a delay a timing errors of one half of a time step as
which is measured relative to some timing shown in Figure 4-5, but these are normally
signal. It can be seen from Figure 4-4 that not a problem. For very small time steps
when the reference point established by the the EMTP device will block the voltage
timing signal falls between time steps, the (open switch) faster than the actual device
EMTP assumes the starting point to be the which has a reversed current. Normally this
next point in time. This introduces an error effect can be neglected for system studies.
less than the time step size. At the point of Only for transient studies involving device
turn on there is another error. Again if the protection would this reversed current need
point of requested turn on is between time to be modeled. In these cases, the ideal de-
points the EMTP waits until the next point vice cannot be used.
to close the switch. This introduces another
error which is also less than a time step. On The EMTP does have numerical oscillation
average the total error in a is one time step. problems during turn off if di/dt changes
Even though HVDC systems have errors of abruptly from a finite value to zero across
0.25 or less, it is normally adequate in an inductance. This will always occur for
simulations to hold errors to 1.00. This trapezoidal integration. There are methods
suggests a time step size of 50 microsec- of reducing this effect which will be dis-
onds for a 60 Hz system. cussed in the next section.
4-3
Thyristor Models
Figure 4-5 Turn off with current chopping
4.3 Numerical Oscillations

The EMTP uses implicit trapezoidal integra-
tion for the solution of differential equa- v(t) = - v(t- ~t) + ZL i(t) - ZL i(t- ~t)
~t ~t
tions. The main features of trapezoidal inte-
gration are its simplicity, numerical stability The response using the trapezoidal rule of
for "stiff" systems, and its self-starting na- integration is shown in Figure 4-6. Using
ture. On the other hand it suffers from nu- the input values i(t - ~t) = 0 and i(t) = 1.0
merical oscillations when used as a dif- with the assumption that v(t - ~t) = 0 the
ferentiator. For thyristors in series with an value of v(t) can be found by the difference
inductor, the sudden change in di/dt during equation. This gives
turn off will induce oscillations if the
modeler is not careful.
2L
v(t) =-
The numerical oscillations can be explained ~t
by looking at the response of an inductor to Now if one looks at the next time step (t +
a step input in current. In the EMTP, the ~t)
differential equation for an inductance,
v(t) = L di(t) v(t + ~t) = - v(t) + ZL i(t + ~t) - ZL i(t)

dt ~t ~t
becomes the difference equation, or

The theoretical voltage response of an in- 2L
ductor to a step current is a delta function v(t+ ~t) = - -
at the step, and zero elsewhere. ~t
4-4
Thyristor Models
i(t) v(t)
2L
1.0
tit
time
time
2L
tit
input output
Figure 4-6 Differentiation of a step function
Note that the resulting oscillation is shown If the ramp i(t) takes 2Llt to go from i=O to
in Figure 4-6. This waveform changes sign i=l.O the resulting response looks closer to
each time step and has little resemblance to a delta function . This is shown in Figure
the time derivative of a unit step which is 4-7.
an impulse function .
i(t) v(t)
time
input output
Figure 4-7 Differentiation of slow rise step
There are two basic ways to stop or improve method. In Figure 4-8 there are four possi-
the problem of numerical oscillations, one ble circuits, each with an inductor in series
is by adding physical components, the other with a thyristor. The top left figure will
is to add damping to the trapezoidal have oscillations.
4-5
Thyristor Models
current current
c-u-rr-e-nt_fY\!V\Cbbec 1 current ...
----c:+- L
R=-
Pilt
Figure 4-8 Solutions to current chopping
The other three will not have oscillations.

One has added a stray capacitor across the R = __!:___
{JI!:.t
switch which will prevent current chopping.
where 13 is a damping factor. When 13 = 0
The value of this capacitor is normally in
we have the normal trapezoidal rule while,
the 1-2 nF range. Another physical solution
is to introduce a R-C snubber circuit across if 13= 1.0 the integration method becomes
backward Euler. For most applications us-
the switch. This is used in actual systems to
ing thyristors it has been found that a 13 =
control the switching voltage transients. If
0.15 works well and introduces errors which
the time step is too large compared to the
are less than those caused by the discretiza-
RC time constant there will still be prob-
tion process itself.
lems . The minimum RC time constant
should be greater than 2-3 times the step The problem of numerical oscillations gen-
size. erated by switch openings will disappear in
Version 3.0 of the DCG/EPRI EMTP with
the introduction of the backward Euler
The last figure shows a method of chang- method at the point of switch opening. In
ing the trapezoidal integration. This is done this method, backward Euler will be used
by placing a damping resistor across the in- over two half time steps after the switch
ductor. If the size of this resistor is repre- opening, after which the program will revert
sented as follows: to trapezoidal methods.
4-6
Chapter 5
Limiters, Loops, and Time Delays
5.1 Limiters
TACS has a general transfer function block
which can be used to describe relationships A
between an input u(t) and the output y(t).
Expressed in the laplace domain the func-
tion is defined as : u
G(s) y
y(s) = G(s) = K No+ N1s + ... + Nmsm

u(s) Do+ D1s + ... + Dni'
where m < n < 7. if B ~ X ~ A then y = X
if x > A then y = A
The actual input also includes a summer if x < B then y = B
such that:
Figure 5-1 Windup limiter.
u(t) = u 1(t) + u2 (t) + ... + u5 (t)
allowing up to five inputs to be summed. For example, consider the system of Figure
Included with this general transfer function 5-2, which is a simple integrator with a
are two types of limiters. One is called a square wave input. Note how the function
windup limiter, and the other one is called a x(t) is clipped. Also note that the input u(t)
non-windup limiter. In the use of these changes sign at t1. tz, t3, t4, . . . , but the out-
limiters there is a great amount of confu- put stays the same until x(t) integrates off
sion, and therefore, possibilities for errors . the limit. If this was a controller function
there would be a delay in changes in the
Limiters on Transfer Functions output relative to changes in the input. In
this example the time lag before the output
The windup limiter is shown in Figure 5-l . responds is dependent on past values of the
This is simply a transfer function where the input.
output is clipped. This means that the func-
tion x depends upon the transfer function Generally this "windup" nature is undesir-
G(s), and the input u, while the output y, is able, and the so-called non-windup limiter
either x or else goes to one of the limits A is used instead. Unlike the windup limiter,
or B. If for example, x becomes larger than non-windup limiters change the dynamic be-
the limit A, then the output y is set equal to havior of the transfer function, and except
A. This implies that y will not change until x for first-order transfer functions, there are
becomes less than A. This can result in a no unique definitions .
delay between the input changes and the
output response.
5-l
limiters, U:Jops and Time Delays
A changes its sign, the value of y(t) will come

off the limit with no delay.
u 1
A
s
u(t) 1 y(t)
...;._-----~ t----~~
1 +sT
u(t)
B
if y = A and f > 0, then dy is set
to zero. dt
A
if y = B and f < o, then dy is set
X (t) f--t----'"'""-t----::>"--t-----'~ to zero. dy dt
otherwise &= f when B ~ y ~ A
B
with f = ]:_ (u- y)
T
Figure 5-4 Non-windup limiter.
A
y(t) f--t--'"'""-+----::'f"--t-----'.... This behavior can be seen in Figure 5-5
using the same example used for a windup
B
limiter, namely a simple integrator with a
square wave input
Figure 5-2 Example of a windup limiter.
In Figure 5-5 the unlimited response is
shown by the dashed curve, which is the
same as x(t) in Figure 5-2. Unlike the win-
dup limiter, the output y(t) comes off the
limit when the input changes sign at
u(t) y(t) t1, tz, t3, t4 , . . . Except for the first part of
the output, y(t) in Figure 5-5 is the same as
that of Figure 5-2 except for a phase shift.
In dealing with non-windup limiters it is im-
portant to understand that this definition
should only be used with first order transfer
functions as defined in Figure 5-4. Some-
times the meaning of first order transfer
functions with a limiter function is confused
Figure 5-3 Integrator with feedback if the functions have any zeros . For second
limiter.
order and higher functions it can be shown
that there are several ways of backing off
A simple model using a dead band limiter the limit. For example, take a second order
with feedback is shown in Figure 5-3. When 1
y(t) is between the limits A and B there is transfer function G(s) = s2. This can back
no feedback. When y(t) exceeds a limit off the limit three ways depending on
there is feedback which reduces the input to whether the internal variables y or y or
the integrator to zero, holding y(t) near the both are forced to remain at zero after the
limiting value. As soon as the input u(t) limit is reached.
5-2
limiters, Loops and Time Delays
gain of 1000 was picked to achieve an out-

A
put of 1.00 at the point in time where the
input goes to zero. This helps in detecting
any computational errors.
1 y(t) In Figure 5-7 and 5-8 a non-windup limiter
1-------~
s has been added. The time step in Figure 5-8
is ten times larger than the time step used
in Figure 5-7. Note that the lower limit is
established after one time step.
B
When the input becomes positive at 0.5
msec, the output responds correctly by com-
'- ing off the lower limit, and increases in
time to the upper limit of 0.8, where it is
u(t)
-.
t
held for the rest of the simulation. Note in
Figure 5-8 that the limited values are the
- same as in Figure 5-7 with a shift in the
non-limited region due to the difference in
time steps.
A
1.0 --@
y(t)
B
t<--t--~---f-~'----+---"~....
1.4
a
msec
u(t)
1000
- s - ~ y(t)
ru = 0.01 msec
Figure 5-5 Example of a non-windup u(t) 2
limiter. 1.0-
/
/
The limiter in TACS can be applied to an .a-r- /
/
equation of any order by setting all deriva- /
/
tives of the output to zero . Perhaps this fea- /
ture should be removed . There are also .6 1- /
y(tj/
problems with the widely used PI controllers /
with limits. .4 r- /
/
/
Test of a First Order Transfer .2 1- 1//
/
Function with Limits Using TACS
0 V~ I I
The simplest test uses a single pulse of 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
magnitude 1.0 and an integrator. Figure 5-6 Milliseconds
shows the response of this simple system Figure 5-6 Test of an integrator
using a time step of 0.01 milliseconds. The
5-3
Limiters, Loops and Time Delays
0 .8 0.8
1.4 u(t) 1----II._Y(t) 1 .4 y(t)
1----ll..
1.2 !:it = 0.01 msec 1.2

!:it = 0 . 1 msec
u(t) u(t)
1.0 1.0
2 2
.8 /---- .8 ,----
/ /.'
/
!:it = 0. 'sec/,,
~,
y(t) / ,
.6 / .6 /,
/ /.'
/ y(t)/,, ~
.4
/ 7' ~
/ /,' !:it = 0.0 1msec
/ /,
.2
1 .2 ,---
1
/,'
I
0 0
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
Milliseconds Milliseconds
Figure 5-7 First order transfer function

with limiter. Time step = Figure 5-8 First order transfer function
0.01 milliseconds. with limiter. Time step = 0. 1 millisec-
onds.
This simple example shows that the limiters
work correctly. In Figure 5-9 the same sys-
tem is tested using a square wave input,
which should force the output off the upper
limit when the input becomes negative. This
is, in fact, the case and there should be no
problems associated with the use of a non-
windup limiter with first order functions .
0 1.0 2 .0 3.0 4.0

Milliseconds
Figure 5-9 Test of upper and lower limits.
5-4
Test of PI Controller reached at a time tz after which the limit is

held at 1.0. A problem is seen at t3 where
The PI controller is used for many control the input, u(t), becomes zero. It is expected
applications. This is a first order transfer that the output becomes 0.8, the value of
function with a pole. the integrator output, instead of holding the
limit value of 1.0. Not until t4, where the
G(s) = K + Ns = K + N input becomes negative, do we see the out-
s s put come off the limit, first with a drop of
y(s) = G(s)u(s) 0.2, followed by a negative output from in-
tegration. Also note how y(t) drops by 0.2 at
t 5 . This is not the normal expected behav-
If we use the same 1.0 millisecond pulses
ior of a PI controller. Figure 5-11 shows a
we used earlier, with a gain K=1000, we
better model for a PI controller. Note the
have the same system as studied in the last difference in the final values and how the
K output comes off the limit when the input
Section, Figures 5-6 to 5-9 for the - re-
s goes to zero in Figure 5-11 as compared to
sponse. If N=0 .2 then the total output, y(t), Figure 5-10.
becomes 1.0 in 0.6 milliseconds with the in-
tegrator outputting 0.8 , and the linear gain
having a value of 0.2. If the input should
become zero, the output would drop to 0.8
as provided by the integration path. This
function is tested using TACS with limits as
shown in Figure 5-10.
u(t)
u(t) 2.0
2.0
1.5
1.5
1.0 ------------, y(t)
\..
'\
1.0 y(t)
----,
\..
'\ 0.5 '\
0.5 '\
'\
'\
'\ '\
0~~~--+-L-----~--~~----
t4 '\ ts o4-~~----J------T--~~r----
' ---
- .5
- .5
-1
-1
0 1.0 2.0 3 .0 4 .0 0 1.0 2.0 3.0 4.0

Milliseconds
Figure 5-10 A PI function in TAGS with Milliseconds
limits .
Figure 5-11 Modified PI controller.
At t 1 there is an expected jump of 0.2 fol-
lowed by a linear rise until a limit is
5-5
Initialization Issues with Transfer Another way would be to replace G(s) with
Functions two integrators and a feedback loop. It is
easy to show that:
In TACS it is only possible to initialize the
output of a transfer function. In cases other 1
y(s) =~u(s)
than first order functions it is not possible ~-+a
to initialize the transfer function correctly.

For example, if we had a case with four can be modeled as shown in Figure 5-12.
first order functions, correct initialization This latter case would allow full initiali-
would require having the output of all four zation by using two transfer functions and a
integrators set to the correct values . Cur- feedback. Initialization would be done by
rently this can only be done by breaking the setting the values of y and A at t=O. Of
high order transfer function into a series of course care must be taken to insure that
first order transfer functions and initializing there are no time delay errors in the feed-
each one separately. In many cases this is back loop.
not possible because the complex numbers
representing the roots are not supported.
y(t)
For example, if G(s) has complex roots, the

series of first order functions could be:
1 1 1
G(s) = 2 2
= - -. - -. = G1 (s) G2 (s)
s +a s + Ja s - Ja
Figure 5-12 Representation of a
It is not possible to enter the transfer func- second order equation using two in-
tions G1 (s) and G2 (s), due to the complex tegrators and a feedback loop.
nature of the components of G1 (s) and G2 (s).
5.2 Closed Loops and Delays

There are several ways in which time delays delays can result. One is in a system of only
can be introduced in TACS . The most basic transfer functions with two or more sets of
is a time delay between TACS and the elec- limits. The other is in a mixed system of
tric network. TACS and the network are transfer functions and supplemental de-
solved separately for each point in time . vices.
Output quantities from the network solution
can be used as input quantities in TACS These internal TACS time delays have been
over the same time step. Output quantities a major problem for many years . Many past
from TACS cannot be used in the network problems have been removed with the code
solution until the next time step. This re- changes of Ma Ren-Ming in 1983/84, but
sults in a time step delay in a closed loop there are still some fundamental errors
between network and TACS. In most cases, which must be addressed.
errors in the network solution due to this TACS System Using Only Transfer
delay are negligible, but care should be
taken since the system's numerical solution Functions
can become unstable under certain condi- The ordering scheme developed by Ma Ren-
tions. Ming allows for closed loop systems without
time delay errors. Principally, this works for
This potential for numerically unstable solu- a system of transfer functions with a single
tions can result from any time step delay in limit in the loop. When more than one
a closed loop, including TACS ONLY limiter is introduced, TACS inserts a time
CASES . In TACS loops two other types of delay and the solution is then no longer si-
5-6
limiters, wops and Time Delays
multaneous. Two cases are used to show Figure 5-13 is a closed loop with a single
this behavior, with several examples of limit. In the plot, points 1, 3, and OUT are
each. The first case has one limiter, and the plotted showing simultaneous solutions. In
second case has two . In the second case, the Figure 5-14 a second limit is introduced
additional limiter has very large limits, which has values large enough to allow the
which are never reached. same solution as in Figure 5-13. Here a sin-
Figures 5-13 and 5-14 are for the first ex- gle time delay is introduced by TACS be-
ample of both cases. Both have a sinusoidal tween the outputs of 3 and 4 as seen in the
source with four transfer function blocks . Figures.
1.25
1.0
0 .75
0.50
0.25
0 .0
-.25
-.50
0 20 40 60 80 100
Milliseconds
Figure 5-13 One limit case, example 1.
In the second example a step function is this case the time step delay introduced by
used. Also note that the transfer function TACS causes the numerical solution to be-
has a pole. In Figure 5-15 the solution is come unstable.
simultaneous while Figure 5-16 is not. In
5-7
1.25
1.0 4
1----''--_. OUT
0 .75
0.50
0.25
0.0
- .25
-.50
0 20 40 60 80 100
Milliseconds
Figure 5-14 Two limit case, example 1.
1.0
2.50
2.00
1.50
1.00 OUT
0.50
0.00
0 20 40 60 80 100
Milliseconds
Figure 5-15 One limit case, example 2.
5-8
1.00
0.50
0 .00
0 20 40 60
Milliseconds
Figure 5-16 Two limit case, example 2.
These two cases show several things. First to model realistic control systems. Other
if the modeler is very careful and uses only building blocks called supplemental devices
single limits in any loops, and only transfer must be used. They make TACS useful, but
function blocks, it is possible to have simul- they do not fit neatly into the control equa-
taneous solutions. When time delays are in- tions used for transfer functions. They are,
troduced, as in Figure 5-14 of Example 1, therefore, solved sequentially rather than si-
there is normally little change made in the multaneously, and result in time delay er-
system solution. On the other hand, for the rors . To hold the time delay errors to a
examples shown in Figure 5-16, a single minimum, the solution order is critical. In
time delay can result in unstable numerical principle there should be no time delays for
results. systems with no loops, and a single delay
for each feedback loop.
Transfer Functions with a Single Figure 5-17 shows Example 1 from the last
Supplemental Device. Section (Figure 5-13), where we have intro-
duced a single supplemental function. In
The methods developed to find simultane- this case the supplemental function is a
ous solutions to control systems using trans- FORTRAN multiply. The time delay is in-
fer functions and limiters are very ingen- troduced at the input to the limited transfer
ious, but not that useful. Transfer function function as seen in the plots of points 3
blocks, limiters, and sources are not enough and 4.
5-9
1.25
1.0 4
1-----''--_. OUT
0 .75
0.50
0 .25
0.0
-.25
-.50
0 20 40 60 80 100
Milliseconds
Figure 5-17 Example 1 with a supplemental function.
s
s-5
----------------------~~~=-~-~-==-~-~-==-~-~-==-
-------------~;o:ect Output
OUT
0.00
0 20 40 60 80 100
Milliseconds
Figure 5-18 Example 2 with a supplemental function
In Figure 5-18 a supplemental function is suits should be 0. 75. In this case the TACS
introduced to the systems of Example 2 ordering has lost the feedback signal. To
(Figure 5-15) . Note that the output jumps to show this, an extra transfer function has
1.00 with no time delay. But the correct re- been added in Example 2 as shown in Fig-
5-10
ure 5-19. In this case the feedback brings one delay. Recall that this resulted in a nu-
the output to 0. 75 with a delay. It looks like merically unstable solution, bringing into
there is a single time step delay, but note question the methods of solving transfer
that Figure 5-16 is the same system with function systems.
2.50
2.00
s
1.50 s-5
OUT
1.00
0 .50
0 .00
0 20 40 60 80 100
Milliseconds
Figure 5-19 Example 2 with an extra transfer function
Control Loop Using Supplemental

Functions
OUT
As discussed in the last Section, supplemen-
tal devices are more common in realistic
control systems than transfer functions. Ex-
ample 3 uses three supplemental functions
and a zero order transfer function. The
feedback is a delay function. If the ordering 2
started with the Type 54 (delay) and worked

around the loop, there would be no need for
TACS to introduce a time delay. In this ex-
ample, the introduction of the "Z" block in-
troduces an extra delay. Figures 5-20 and
21 show the results for different locations
of the transfer function Z.
0 .0 0.4 0.8 1.2

Milliseconds
Figure 5-20 Example 3 with a delay in
the output path.
5-11
Figure 5-20 shows the delay between the in- poles will normally fall in the left half of
put u(t) and the output with the function"Z" the complex plane, and will be much less
in the output path. When the transfer func- sensitive to time delay errors.
tion is moved to the feedback path as
shown in Figure 5-21 there is no extra de- An example is a second order differential
lay. This is less than desirable because care equation of the form:
must be taken to insure that the delay is
introduced in the feedback path. It would be x(t) + x(t) = o
more desirable to have an ordering system
which would order by loops and insert time with
delays in the feedback path.
x(t = O) = o x(t = O) = 1.0
1.0 -r = 10& resulting in

x(t) = - sin(t)
OUT and
u(t)
x(t) = - cos(t)
10 4
2
1.0 as solutions.
The poles of this system are at s = j.

0.5
This equation can be expressed as two first
0.0 order equations:
-0.5 x(t) =- y(t)
-1 .0
y(t) = x(t)
0.0 0.4 0.8 1.2 If time delays are introduced between the
Milliseconds two equations, the resulting poles fall in the
right half of the complex plane. The func-
Figure 5-21 Example 3 with no delay in tions x(t) and y(t) are then unstable.
the output.
In Figure 5-22 the equations are modeled
using TACS transfer functions. The solu-
Effects of Time Delays on Systems tions are as expected, and there are no time
with Poles on the Imaginary Axis delay errors. Note that the output is y(t), or
- x(t). If a time delay is introduced by using
A class of differential equations which are a transfer function and a supplemental
sensitive to time delays are those which function as shown in Figure 5-23, the re-
have poles on the imaginary axis of the sults are unstable. This result is also possi-
complex plane. This results in solutions ble with two transfer functions and a sup-
which are bounded but do not asymptoti- plemental function. This unstable behavior
cally tend to zero. Physically these are reso- could be modeled using an inductor in the
nance systems without damping. For these network and an integrator in TACS. This
systems, time delay errors can create poles time delay then comes between TACS and
in the right half of the complex plane, re- the EMTP.
sulting in functions which are unstable. If
damping is included in the equations the
5-12
1------r_.,our
0.0 16 32 48 64 80
Seconds
Figure 5-22 Solution to resonance system with no time delay errors.
8.0
l!.t Delay
6.0
4.0
2.n
-2 .0
-4.0 1l!.t Delay
-6.0
-8. 0
0.0 16 32 48 64 80
Seconds
Figure 5-23 Unstable resonance due to time delay errors.
5-13
Chapter 6
Simulation of TCR Using EMTP
6.1 Theory of Gate Pulse Generator

The basic static Var system consists of a system impedance, a load, and a source. As
static switch in series with an inductor. seen in Figure 6-1 there are also control
This is normally called a phase controlled functions. These are broken into three
reactor, or thyristor controlled reactor parts . There is the gate pulse generator
(TCR). The TCR is in parallel with a fixed (GPO), a regulator, and an interface to the
capacitor. Together they interface with the power system. In this case this measures
power system at point V. In this simple the RMS voltage.
model the power system is represented by a
r---------------T-----~-------------------------l
I I
I I
I I V
RMS
Detector
Vref
Regulator
G.P.G.
I
I
I
I
- - - - I
L---------------~-----~-------------------------~
Figure 6-1 Single phase SVC
The purpose of the gate pulse generator is the basic gate pulse generator is outlined
to provide firing pulses to the thyristors . and modeled using TACS. (Note that a is
The regulator calculates the conduction an- the time the thyristor conducts, while the
gle, a, which is passed to the gate pulse firing point relative to the voltage across the
generator as a control signal. It is the func- thyristor is normally indicated by ~- These
tion of the gate pulse generator to generate two variables are related by 2~ + a = 27T.)
the correct firing pulses to achieve the re-
quested conduction angle, a. In this section
6-1
A typical gate pulse generator would calcu- integrator would be reset to zero. The inte-
late the firing point Q( from the voltage zero grator output and firing signals are shown
crossing, as shown in Figure 6-2. To in the bottom traces in Figure 6-2.
achieve this firing at the required Q(, the
GPG could consist of an integrator which In this system, control would be achieved by
would start integrating at zero voltage and changing the threshold value. This firing
continue until a controlled threshold is strategy functions well if the voltage has no
reached. harmonics so that the zero crossings can be
found accurately. This is not the case since
both harmonics and transients are expected.
i(t) __...
For the case of a thyristor controlled reactor

(TCR) this problem can be solved by taking
advantage of the 90. phase shift between
the current and the voltage . This insures
that the conduction angle, a, is centered
about the zero crossing of the voltage . It is
now obvious that the conduction current can
be used to locate the zero crossings of the
voltage without the problems associated
with harmonics. In the last trace in Figure
6-2 there is a dotted curve across the con-
duction time, a, which can be used to find
firing points.
This method is shown in Figure 6-3. The
input is a logic signal, NC, which is high
when there is no conduction in either
thyristor. This is added to a constant bias
with a value of unity. The resulting signal
is shown in curve (c). Note that the value is
2.0 when there is no conduction and 1.0
during conduction. When this signal is inte-
grated the result is an output which looks
like a gain change at the point where con-
duction stops. Or it can be said that during
conduction the gain is half of the normal
gain, but since the conduction region is
centered on the voltage zero point, this is
equal to integrating from the zero point in
voltage, with normal gain.
Another advantage of this scheme is that
the only information needed is whether the
thyristors are conducting or not conducting.
There is no need for accurate measurement
of voltage or current. NC is the only system
input to the gate pulse generator. This sig-
Figure 6-2 Firing of thyristors in TCR nal is biased and integrated. The output of
the integrator is negatively biased by Vb as
shown in Figure 6-3(d). The control signal,
At this point a firing pulse would be gener- Vc, has a range from 0 to Vb.
ated for the appropriate thyristor, and the
6-2
a
w G
I Gdt=:
0
a
a--
__
2 a
2 Iw
G dt =2 G
(a-2\
----;!-)
0
a
a--)
Vb = Vc+-+2G (- -
Ga2
w (l)
I
I
I
I . a
I usmg a = :rr-- then
2
~-
~
a
BIAS[
ri
~
n
~t---- Ga G
(c) I I I
Vb = Vc-
2:rrf+f
I I I If the values of G, f and vb are:
G = 60
F =60Hz
Vb= 1.0
then
Figure 6-3 Gate pulse generator
V=~
c 2:rr
From this expression it follows that for o=

This signal is then input to a zero plus de- 180 Vc= 0.5 and for a= 0.0 Vc= 0.0.
tector (ZPD) which issues the firing pulse
whenever the signal becomes positive. The To build this gate pulse generator in TACS,
integrator is also reset at this point. The fir- each element needs to be modeled, namely
ing pulses are illustrated in Figure 6-3(e) . the generation of the NC signal, the GPO
and the control input Vc. In Figure 6-4 the
Upon increasing the magnitude of Vc the TACS form of the interface is shown. There
value of C would decrease and therefore o are two inputs from the network, they are
would increase. This results in a gate pulse type 93 sources, which have the node name
generator where o is proportional to Vc. of the anode of each type 11 switch. In
From Figure 6-3(d) it follows that Vb is re- TACS the value of AS1Q.Q will equal 1.0
lated to Vc through the gain G and the two when the switch having this node name is
regions of conduction and non-conduction. closed. The same holds for AS2Q.Q. If both
This can be expressed in the following switches are not conducting, the output of
equations: the OR function is zero giving the NOT out-
put a value of 1. 0. This is the required func-
or tion NC which is called NCQ.Q.
6-3
UNITY UNITY
NCQ.Q
.OR .NOT 1---.~
FSMQ.Q
Figure 6-4 NCQ.Q signal (interface to
thyristors)
=- 0.0167
Figure 6-5 Firing pulse generator
The actual gate pulse in TACS is shown in The output of this function block is shown
Figure 6-5 . The integrator is modeled using in Figure 6-6. On this figure the variables
a supplemental device type 58, with a gain FSMQ.Q and TSMQ.Q are plotted as a
of 60 . The importance of this device is the function of time. The bias is seen as -1.0 .
ability to reset. The reset variable is in field At each firing pulse the integrator is seen
"D" with the name RSTQ .Q. When its vari- to reset correctly. Note that the first firing
able has a value equal to or less than 0.0 pulse was the external source FIREl which
the output is reset to 0.0. The output of the resets the integrator, which did not have the
integrator, SKAQ.Q, is summed with correct value at t=O. This block was tested
UNITY ( Vb ), and SIGSC ( Vc ), giving an using a dummy NCQ.Q function. It seems
to work as required.
output called TSMQ.Q. This is the function
plotted in Figure 6-3(d) . The zero plus de-
tector is modeled using a type 52 device .
When the variable TSMQ.Q becomes 2
greater than -0.0167 the switch closes al- 1 .0
lowing ESMQ.Q to become UNITY. This
output is subtracted from UNITY to force
the reset (RSTQ.Q) to zero, and therefore
reset the integrator. This signal is also the
firing pulse, FSMQ.Q. Note that with the
reset, the ZPD (type 52) opens forcing
FSMQ.Q to zero. The expected waveform is
also shown in the Figure. It has a value of
1.0 for only one time interval. This is a Nodes-TSMQ.Q Curve 1
FSMQ.Q Curve 2
problem, requiring a shaping circuit. Also
of interest is FIRE1, which is a special fir-
ing signal used for initialization, and the Figure 6-6 Waveforms from FPG
nonzero value used in the ZPD ( 0.0167) .
This is to correct for timing errors. Recall in Figure 6-5 that there was a thresh-
old value on the ZPD of -0.0167 which is
6-4
present to correct for timing errors. If a that the input sigma are in p.u., that is, an
close look is taken at device types 58 and 52 input of 1.0 corresponds to a a of 180.
(Figure 6-7) it is seen that it takes one Llt to
reset the type 58 and one Llt to switch the
type 52. In both of these cases it was as-
sumed that these devices changed in an in-
stantaneous manner. Since this is not the Type 11
case, corrections must be made . There is a SIGS.1 0.4944
third Llt delay introduced between the
EMTP (network solution) and TACS .
SIGSC
This correction can be made by making the 0.50
threshold smaller than zero by three time
steps. Recall that the input value to the inte-
grator is two with a gain of 60. It then fol- Type 11 0.0
lows that: SIGS.2
1 => a= 180
flE = 3flt * 2 * 60 = 0.0167
1.0 => a= 360
for
0.5 => a= 180
!l.t = 4.63- 5
Figure 6-8 Sigma input
TYPE 58 ~~. Recall that the firing pulse FSMQ.Q was

high for one time step. In actual systems a
pulse width from a few degrees to 50-60
is sometimes required . To provide the flexi-
TYPE 52 I I I I I I I I ~ III l~t
bility of changeable pulse width another cir-
cuit is modeled in TACS . The TACS model
is shown in Figure 6-9. The function
FSMQ.Q is inputted to a type 58 integrator
with a gain such that the output of a small
pulse will become unity. For our time step
this gain is 21,600. This then becomes the
output firing pulse FPQ .Q, which is sent to
Figure 6-7 !l.t errors the type 11 switches. This signal is also de-
layed and used to reset the integrator. This
results in a firing pulse with a width con-
The last T ACS item is for the SIGSC vari- trolled by the delay. Note that a " Z " block
able . This is a variable which when equal to was used to allow the closing of the loop.
0.5 requests a a of 180. To correct for this This block could be any place in the loop,
a gain of 0.5 is used, with limits to insure but will cause problems when not in the
operation in the allowed regions of a. Note feedback path.
6-5
In Figure 6-10 there are two plots, the top

one shows a delay in FPQ.Q from FSMQ.Q
due to the wrong placement of the "Z"
block. The lower plot shows the result of
the circuit of Figure 6-9.
Figure 6-9 Firing pulse shaping
2
1.0
0 .8
0 .6
0.4
0.2
0 .0
.303 .304 .305 .306 .307 .308 .309 t (msec)
nodes-TACS FSMQ .Q - Line 1
TACS FPQ.Q - Line 2
2
1.0
0 .8
0 .6
0 .4
Firing
point
0 .2
0 .0
.303 .304 .305 .306 .307 .308 .309 t (msec)
nodes-TACS FSMQ .Q - Line 1
TACS FPQ .Q - Line 2
Figure 6-10 Output of pulse shaping circuit
6-6
BEGIN NEW DATA CASE

c
c *******************************************************************************
c * *
c * GATE PULSE GENERATOR MODEL *
c * *
c ******************************* **** ********************************************
c
c . . . . . . . . . . . . . . . . . . . . . . . . . . . Miscellaneous data .. . ............. . . .. . ... .. ... .
4.63E-5 0 . 05
C --IOut<--IPlot<-IDoubl<-KSSOut<-MaxOut<---IPun<-MemSav<---ICat<-NEnerg<-IPrSup
10
c
TAGS HYBRID
c
C input function (REFER TO FIGURE 6-4)-----------------------------------------
C
C ...... TAGS SOURCES, READ SWITCH STATE IN NETWORK . . ......... ....... . .. ........ .
C TYPE A B C
c 93 sw state
c
C SOURCE
c
93AS1Q.Q
93AS2Q . Q
c
C ... . . . TAGS FORTRAN STATEMENT , LOGIC FUNCTIONS .... .......... . ... .. .. . ......... .
c
C OUTPUT = free-format FORTRAN expression . ...... .. ................ . . .. ... .
88NCQ . Q = . NOT . (AS1Q.Q . OR . AS2Q.Q)
c
C end input function ----------------------------------------------------------
C
C sigma value (REFER TO FIGURE 6 - 8)-------------------------------------------
C
C .. ... . STEP SOURCE INPUTS FOR DETERMINING SIGMA . .... . ... ............ . ........ .
C 11 AMPL DC source
11SIGS .1 . 6667 - 1. 10.
11SIGS .2 .0 .07 10 .
c
C .. . ... Z-BLOCK, SUBTRACTS SIGS . 2 FROM SIGS . 1 , AND SCALES OUTPUT SO 1 PU 180 ...
C .. . .. .... .. ... . ... ALSO LIMITS OUPUT TO BETWEEN 0 AND 0 .4 944 ... ... ... .......... .
SIGSC +SIGS . 1 -SIGS.2 0.5 0 . 0 .4944
c
6-7
C end of sigma ---------------------------------------------------------------

c
C firing pulse generator (REFER TO FIGURE 6-5)---------- -----------------------
c
C ......... TACS DEVICE, TYPE 58, INTEGRATOR ...... .. ....................... ...... .
C CODE
C 58 integrator
c
c DEVICE II
c II
88SKAQ . Q58+UNITY +NCQ.Q 60. 1.0RSTQ.Q
c
C ... . Z-BLOCK FOR ADDING SIGSC TO SKAQ.Q AND SUBTRACTING TACS INPUT UNITY . .. ... . .
TSMQ.Q -UNITY +SIGSC +SKAQ.Q
c
C . ... . TYPE 52 DEVICE , LEVEL CONTROLLED SWITCH ........ .. .. . .. . .... .. ..... . ..... .
C CODE
C 52 LEVEL SWITCH
c
c DEVICEII
c II
88ESMQ . Q52+UNITY -.0167 TSMQ . Q
c
C ...... TYPE 11 STEP INPUT TO REPRESENT REFERENCE FIRING PULSE .. ....... .... .... .
C 11 AMPL DC source
11FIRE1 1 .0 5 . 31496E-35.69660E-3
c
C Z-BLOCK FOR ADDING OR SUBTRACTING VALUES .. ... . . . .. ..... ... ...... . ... ........ .
C ONE FINDS FSMQ.Q, THE OTHER FINDS RSTQ.Q (RESET)
c OUTPUT +IN1--> +IN2--> +IN3--> +IN4--> +INS--> <-gain<--low<-highLOW-->HIGH->
FSMQ.Q +FIRE1 +ESMQ . Q
RSTQ.Q -FSMQ . Q +UNITY
c
c end FPG
c
C pulse shaping (REFER TO FIGURE 6-9)------------------------------------------
C
C . .... TACS DEVICE, TYPE 58, INTEGRATOR ..... .. . . ........... . .. . ...... .. . . ..... .
C CODE
C 58 integrator
c
6-8

C DEVICE!!
c II
88FPQ . Q 58+FSMQ.Q 21600 . 1.0RTPQ . Q
C .. ... TACS DEVICE, TYPE 54, PULSE DELAY ........................................ .
C CODE
C 54 PULSE DELAY
c
c use 88 in the first two columns
c DEVICE!!
c II
c OUTPUTvv+IN1--> +IN2--> +IN3--> +IN4--> +INS--> <--A--<--B--<--C--<--E--<--F--
88DELQ.Q54-FPQ.Q +UNITY 3.0E- 4
c
C ...... Z-BLOCK, GAIN = 1 . 0 .... .. . . .. . . .. . .. .... .. . ... .... .. ....... .. ..... . .. . .. .
RTPQ.Q +DELQ.Q
c
C end of pulse shaping ------------------------- -------------------------------
c
c
C .. . ... TACS output specification . ... .. ............. .. . .. ............... . ..... .
c ----->----->----->----->----->
33NCQ . Q FSMQ . QSIGSC FPQ.Q RTPQ.QFSMQ.Q
BLANK end of TACS
c
c
C . . . . . . . . . . . . . . . . . . . . . . . . . . . Circuit data .................................. .
C NETWORK *********************************************************************
C RESISTOR
SSLQ.QAS2Q . Q . 001 0
AS1Q.QB.2SW .001 0
C INDUCTOR
SSLQ . Q 1. 03
C RL
B. 1 B. 2 0 . 01 0 . 265
C RLC
B.2SW SSLQ.Q 200.0 0.5
c
c .......................... .Switch data
C switch
B. 2 B. 2SW -1.0 10 . 0 1
C VALVE
6-9
11AS1Q . QSSLQ.Q FPQ.Q

11AS2Q . QB.2SW FPQ.Q
c
C ........ .. .... . .. .. ........ Source data
C AC_source
14B.1 1.0 60 . 0 -90.0 0.0 -1 . 0 10 . 0
BLANK end of source
c
C ............................ Plot request . .......... .. .. ... . . ..... .. . . . .... .
c Plot data
c
C ------Graph type: 4(volts) B(branch volts) 9(currents)
C I ----Units: 1(deg) 2(cyc) 3(sec) 4(msec) S(micresec)
c II -Plot stopping time
c II
C VV<-I<--I<--I<---I<--1Bus1->Bus2->Bus3->Bus4->Heading-------->Vert Axis------>
194.11 30.31.1 -.2 1 . 1TACS FSMQ.QTACS FPQ.Q
BLANK end of case
Figure 6-11 Input data file for single phase simulation of TCR.
6-10
6.2 Interface to Power System

To test this gate pulse generator it is neces- two back to back thyristors modeled using
sary to create a simple power system. The Type 11 switches with a TACS generated
principle elements are shown in Figure gate signal FPQ.Q. A snubber is used to
6-12. These items are a source, system im- prevent numerical oscillations.
pedance, and the TCR. In the TCR there are
R=O.l!l
L=0.265 mH B
B.l ,.....__.r--1---.:_:2_..
B.2SW
R=O.OOl!l
ASlQ .Q
1.0 s FPQ.Q
60HZ
Snubber
R=200!l SSLQ.Q
C=0.5 J.LF
Figure 6-12 Power system

There is a measuring switch between nodes pulses are shown in Figure 6-13. Note that
B.2 and B.2SW to allow study of the cur- the current takes a cycle to come to steady
rent. The SIGSC in the TACS was set at state. This is due to the inductors in the net-
.6667 to create a conduction angle, a, equal work. Once at steady state the system works
to 120 . The resulting current and firing very well.
6-11
1\J
II I
{\
I I n
I I
I lfl I 1 n 1
I
III I I I II I
I I III I
I I I II I
I I I
--.J
c
Q)
(_
(_
:J
~ I \
I ~
(_) ~ \
c:::>
0.0 ~0.0
' I
80 0 1 0 .0 160 .p
M 11 iSE cc hd
U) r1e
1
c:::>
'
v v v v v v
8.2 -B .2SW
TACS -FPO .O
Figure 6-13 Switch current and firing pulses.
To further test the function of the gate state of the conduction of the thyristors.
pulse generator several open loop responses There is no need for the analog informa-
are tested . In Figure 6-14, a step change in tion. This system is insensitive to harmonics
the conduction angle is tested . The top plot and transients on the voltage waveform.
shows the current and the lower plot shows
the TACS function TSMQ.Q. This example In addition to being able to fire at the cor-
shows a change in a from 175. to 90. Just rect point, the gate pulse generator must
before the thyristor current commutates off, also correct for changes in voltage phase.
a is changed to 90. The gate pulse genera- For example, on systems where a line to
tor responds immediately, giving the correct ground fault would cause a phase shift in
firing signal for the next cycle. This exam- the voltage across a delta configure TCR,
ple illustrates the effectiveness of the GPG, the gate pulse generator must correct the
where the only information required is the firing angle for this phase shift.
6-12
;,....\
'-.. v I \
\ I \
\ I lt 10 ms
\ I \
-1
Figure 6-16 Restoration of source voltage
seen in the first cycle of the current and the

voltage. After the abrupt change in voltage
phase there is an excess amount of current
for a half cycle, which is immediately cor-
rected in the next half cycle.
Figure 6-14 Step change in VB A more radical example of synchronization

of the gate pulse generator is shown in Fig-
ure 6-16. In this case the voltage has com-
pletely collapsed on the AC bus while the
controls continued to function under a fixed
sigma. The voltage recovers at a worst
point, forcing the GPG to be completely out
of synchronization. This results in the first
half cycle of current having a conduction
angle close to 360 o. The second half cycle
\ in the positive plane does not exist. The
\ third is close to the requested value, with
\ I
\ I the fourth half cycle at steady state. The
-1 \ II .. , system in this case has synchronized itself
- 10 ms
in two cycles.
Figure 6-15 Change in source voltage Using TACS and a simple network, it has
been demonstrated that the gate pulse gen-
erator can produce firing pulses for the re-
quested conduction angles, o, and can ad-
just to changing phase of the AC system. At
In Figure 6-15, the response of the GPG is this point the model will be introduced into
shown when the voltage has a phase shift of the three phase network used in Section 3.4
25. The system is operating at a constant Instead of using a current source model, the
sigma (a= 120) . This operating point is full thyristor model will be used .
6-13
6.3 Full 3-Phase Model on Simple System

3-Phase Model with Fixed Sigma ones developed in Section 2 of this Work-
book. For voltage support a thyristor con-
As with most cases in this workbook series, trolled reactor with a fixed capacitor will be
the 230 kV sample power system developed placed on bus 1.
in Workbook 1 will be used. The basic sys-
tem is shown in Figure 3-9. For the studies The element MD is the three phase
in this Section, the transmission line from Thevenin equivalent for the system (Figure
bus 1 to bus 2 and the generator at bus 3 6-17) at bus 7. This was first described in
are assumed to be out of service. On bus 13 Workbook 1 and again in this Workbook in
it is assumed that there is a dynamic load Section 2.3. The Thevenin equivalent volt-
which causes problems with the voltage on age source is the nominal voltage of 230 kV
bus 1. The models for the load are the same RMS line-to-line.
13
MD~~~~-r---~~_m~----
otl-(:..:>l....----1
Figure 6-17 Full model with SVC
The transmission lines from bus 7 to bus 1 L = 3*0.8 = 2.4 H

and from bus 1 to bus 12 were modeled us-
ing the ideal distributed line model. The Other quantities that need to be changed
transformer between bus 12 and bus 13 was from the first part of this section are the
represented by a series inductance, referred error function E (used in GPG) , the snubber
to the 230 kV side. This has a value of size, and the special firing signals. The first
70 .16 mH. The capacitors on bus 1 are two items are changed since a different
sized to provide 141 MVar (C=7.0 J.1F) . See time step was used, .Dot= 50 microseconds.
the last part of Section 3.3. f =- (3 .Dot. 120) = - 0.018
The TCRs are in delta to remove the third and for the snubber (time constant = 100
harmonics, which are created by the switch- microseconds)
ing of current. The values of the inductors
are now: R = 466 kQ
6- 14
C=2.1E-4 fi.F The duration of each pulse is 0.4 millisec-

onds.
Each TCR has its own firing pulse genera-
tor, with each using the same fixed CJ as
input. The circuits are the same as for the Figure 6-18 shows the measured power on
single-phase case except that the dummy bus 12. This represents the dynamtc load on
firing signal (used in GPG) is different for phase A. The load for the first 100 millisec-
each leg of the delta. If the voltage on onds is about 3.0 MW per phase, or 9.0
phase A is the reference, then for a MW total. The load changes at 100 millisec-
onds. This is seen in the power meter out-
a = 120 the starting times for the pulses put with a delay required for the internal
are as follows:
integration used in the evaluation of the
TCR_AB: 4.1167 ms load power. This output is approximately 75
MW per phase or 225 MW total. T~e load
TCR_BC: 1.3387 ms model is the TACS model developed m Sec-
TCR_AC: 6.8944 ms tion 2.1 and used in Section 3.
C>
C>
00
~C>
C>
<D
L
(l)
3:
0 C>
c...
.....
C>
- - TACS -PA
C>
C>
0 .0 '10 .0 80.0 120 .0 160 .0 200 .0
Hi J l iSecond
Til'le
Figure 6-18 Load in phase A
The phase voltage on phase A, bus 1, along greater than 120. In the presence o~ a full
with the output of the RMS meter is shown load there is an undervoltage whtch re-
in Figure 6-19. For the first 100 millisec- quires a slightly smaller sigma to correct.
onds there is low load and an overvoltage Also note that the voltage is not in a steady-
close to 10%. This is due to the fixed sigma state even though sigma is fixed . Of course
(a= 120 ) on the thyristor controlled reac-
tor. To control this light load, CJ needs to be
6-15
this is due to the interaction with the power AB and BC. The non-steady-state behavior
system. is easily seen.
Figure 6-20 shows the TCR currents in legs
f2
N
0
~ 0
- 00
0 ......
>
.JJ. r-
(1)
0
0>
<0 0
.oJ
a>
I
0
> 0
0
00 .
~
0
0 Til'l
0
~
0
0
- TACS BUS1A
,_
0
TACS -RHS1A
~
Figure 6-19 Voltage on phase A at bus 1
(\
0.
E:
=o
<
:a:s N { {\ '
II
II ~
II
{ {\ ,.
II
II
(
A
{
I {
II II II II
I
(\ ~ (\ II (\ '
I
I II II II II II
II II II I II II
.oJ
c(1)
II II I
I II I I I I II II
L
L I I I I I
:::J
u 0
I I I I I I ~ I I
I I ~0 . 0 I 12~0 .0
I I
~ .b
0
00 I I I 2 .ol 1Gb .d I
I I II I I I I I 'li I ifecorlb I
II vII II I I T~l'l~ II II
jl II II 11
II II II II II
II II v 1/ v oJ v 1/ v \
\I II II v J
0
8
N
0
\I ,, v
II
v\ vv
v ,,
II
J
- SSHOA8-SSLOAC
- SSHOOCSSLOAB
Figure 6-20 Current in two legs of TCR
6-16
Control of Sigma with a Voltage changes for any system. In this case a sepa-
Regulator rate a must be calculated for each phase.
Figure 6-21 shows the control scheme for
It is now necessary to build a voltage regu- the voltage regulator. The input signals are
lator. The level of sophistication of a three the three line-to-neutral bus voltages to be
phase voltage regulator depends on the regulated. Each of these phase voltages is
function it performs and on the constraints fed to a RMS meter which calculates the
it is subject to . The voltage regulator used RMS value on a continuous basis. The RMS
in this section controls the average voltage calculation includes not only the fundamen-
of the three RMS phase voltages. This con- tal, but also all of the harmonic components
trol scheme is adequate to handle three of the input signal. The three RMS voltages
phase symmetrical changes, either small or are scaled and averaged to provide per unit
large disturbances, in a balanced system. output. This is compared with a reference
More complicated control schemes may be voltage to produce a voltage error signal
designed to handle various unsymmetrical ~v.
G(s) = O.Ols a- sin(an)

lr=---'-~
1.0 + 0.001s 1t
Figure 6-21 Voltage regulator
The regulator provides a proportional path the integrator, control the maximum rate of
with a gain of 1.5. This is the principle change of the reactive current request Ir
small signal gain for the regulator. For for any input signal. If these limits were not
large changes there is a rate feedforward present, large disturbances would change
path with the transfer function G(s) which the reactive power too fast. For this system,
allows fast response to sudden events. The the maximum rate of change of Ir is 1 p. u.
small signal or steady state gain, which is in one cycle.
the product of 1.5 and 300, determines the
steady-state response. If this gain is too The integrator gain is shared by both the
large, the SVC output will undergo damped steady-state and transient control, and any
oscillations in approaching the final steady- change in this gain has effects on both re-
state value. If this gain is too small, the sys- sponses. The reactive current request Ir is
tem will take too long to compensate for a normalized parameter. It is bounded by
changes in the voltage . an upper limit of 1.0 which requires the
TCR to be fully on, and a lower limit of 0.0
which requires the TCR to be fully off. Ir
The outputs of the proportional gain and is the input for the non-linear interface
the rate feedforward paths are combined which calculates the correct conduction an-
and inputted to an integrator, which calcu- gle (normalized by n) . This output is fed to
lates the corresponding reactive current. all three GPGs for our three phase system.
Note that this gain is 50% larger than that
used in Section 3. The maximum magni- In Figure 6-22 the TCR current in leg AB is
tudes of the input signal to the integrator shown, along with the calculated sigma.
are clamped by a pair of fixed limits of Note that during light loads the sigma is
0.2. These limits, combined with the gain of close to 180 which provides maximum in-
6-17
ductive reactive power to hold the voltage mum which removes the inductive reactive
down. For heavy loads the sigma is mini- power from the bus.
c:o
E
0>
r---------
(f) I
'-..
-.J
c
Q)
I
(_
::J
(_)
0. 0.0 160 .0 200.0

MiII iSecond
00
SSHOBC-SSLOAB
'? TACS -SIGP
Figure 6-22 Current and a in one leg
The RMS voltage on phase A, bus 1, along expected undervoltage, which again is cor-
with the output of the RMS meter is shown rected by the controller.
in Figure 6-23. For the first 100 millisec-
onds there is light load and an overvoltage The response to the load changes can also
close to 10% for the first cycle, after which be compared to the simplified model from
the regulator brings the overvoltage to rated Section 3. Figure 3-16 is also shown in Fig-
values. In the heavy load region there is the ure 6-24. Note that the simplified model did
~
,_
0
N
~
0
0 ~
>-
.>J
Q)
0> ~
c:o 0
C7>
..o.J
0
>- ~
0
0
0. 200 .0
0
':'
0 TiM
0
~
TACS -BUStA
~ TACS -RMS1A
,_
0
Figure 6-23 Regulated voltage (full model)
6-18
a very good job of reproducing the behavior pected for small changes in voltage for sys-
of the detailed system. This should be ex- tems which are not sensitive to harmonics.
0
0
.......
""'
0 A
~ A I
~
I; - ,..... A {\
~ (\ A ~ (\
' ,....
0
>
(\ I
-
j,i
I - r- -+- - f- - -f- -
<l>
0
0 .J
t--
- '
...- ...... ,_.
0> en
....
<0
0
:>- 0
0
"'
0.b ~p.o 8 .0 12( .0 160.0 00.0
0 Mi I iS ~con
0
en
' Ti ~I
~
0
~
' v v v v v v v v
- BUS1A
v v
0 v v - . TACS VRHS1A
0
.......
':"
Figure 6-24 Regulated voltage (simplified model)
In Figure 6-25 are examples of the response and recovery require modeling of the thyris-
of this model (detailed) to a nearby three- tors . Figure 6-26 shows the input data file .
phase fault. Issues such as trapped current
6-19
.. ,.
.... 0
._.,
..
...
....
...
'".,.b..~--::::,..:h..~C:::;;-~..:;:=:C.,,..JIG ~"'ii,_L_,.,.sJ~,..~L-..,i4J oo
1\.\.IJICDMU
le) Normalbed CoaduetloD Ancl

(a) Bu Yolbl
""
......
1.10
.......
(a) BUI Volb&t
1.1'
"
(UI) Delt:a~onntded TCR (pluae CA)
.... lTi) W,-...eoa.ne<ted TCR (Fh.:aa C)

lb) Thyrut.oreoatroUed Reactor CtUTeo:U
(b) Th,n.t.orcontroUed React.or CtUTtuU

Figure 6-25 Faults modeled with full model.
6-20
BEGIN NEW DATA CASE

c
c ********** ************************************** *************************** ***
c * *
c * INPUT DATA FILE FOR SIMPLE THREE PHASE SYSTEM (FIGURE 6 - 17) WITH *
c * FULL THREE PHASE MODEL OF TCR AND ITS CONTROL SYSTEM. *
c * *
c ********************************************************* * ********************
c
ABSOLUTE TACS DIMENSIONS
c 3456789 123456789 123456789 123456789 123456789 123456789 123456789 1234567890
30 70 100 60 90 550 1680 180
C . . . . . . . . . . . . . . . . . . . . . . . . . . . Miscellaneous data . . . ............ . ............ . .
C DeltaT<-- -TMax <--- XOpt<---COpt<-Epsiln<-TolMat<-TStart
50 . E-6 0.2
C --IOut<--IP l ot<-IDoubl<-KSSOut<- MaxOut<---IPun<-MemSav<---ICat<-NEnerg<-IPrSup
31 1
c
TACS HYBRID
c
c ******************************************************************************
c * VARIABLE LOAD MODEL, AS INTRODUCED IN CHAPTER 2 . *
c * USES STEP SOURCES TO VARY 1 / L *
c ** * ***************************************************************************
C ... ... . TACS Voltage Source . Measures Voltage at bus 13 in Network .. ... ..... .
C OUTPUT <--- - - A---<---- B---- <- ---C---- <- T-START-<-T-STOP- -
90BUS13A 60 .
90BUS13B 60 .
90BUS13C 60 .
c
C .. . ... . Step Signal . Represents 1 / L ....... . ... . ........ . .. . ..... . .... . ......... .
C ........... INITIALLY 1 / L=0.1795 , THEN AT t=0 . 1 sec . 1 / L JUMPS BY 3 . 3226
C 11 AMPL DC source
C OUTPUT <-----A---<----B----<----C---- <-T-START-<-T- STOP--
11CONS1 . 1795 -1 . 9999 .
11CONS2 3 . 3226 0 .1 9999 .
c
C ... TACS FORTRAN Statement . Supplemental Variable to Multiply CONS * BUS13 VOLT .
c
C OUTPUT = free-format FORTRAN e x pression . . ....... . . . .... . ..... .. .. . ... . . .
88INT_ A =BUS13A*(CONS1+CONS2)
88INT_ B =BUS13B*(CONS1+CONS2)
88INT_C =BUS13C*(CONS1+CONS2)
c
C ...... Transfer Function 1 / (s + c ) Where c R/ L ONE FOR EACH PHASE .. ... . .... .
C TRANSFER FUNCTION
6-21
c
c
C - N/D-0--<-N/D-1---<--N/D-2--<--N/D-3--<--N/D-4--<--N/D-5--<--N/D-6--<--N/D-7--
1IL13A -INT_A
1.
1146 . 807 1.
1IL13B -INT_B
1.
1146 . 807 1.
1IL13C -INT_C
1.
1146 . 807 1.
c
C . ..... END OF VARIABLE LOAD .... . .. . ... . . . .. . .......... . .... ... . ... ......... . .. .
c
c *******************************************************************************
c * TACS POWER METER, SAME AS MODEL USED IN CHAPTER 2 , FIGURE 2-13 *
c *******************************************************************************
c
C . . ... . TACS FORTRAN Statement. COMPUTES INSTANTANEOUS POWER .. ... . . . .... . .... . .
C OUTPUT = Free-format FORTRAN expression . . . . .. .... ... . .... . ... ... . .. . . .. . . . . . .
c
C . . ... . Integrator. First Orders-block .. . ... .. . .. . . . . .. ... . . . .. ..... .. .... .. .. . .
C TRANSFER FUNCTION
c
c
1PB +PINSTA 120.
1.
0 0 1.
c
C .... . . Transport Delay . TACS Device , Type 53 .. . .. . .. . ... . . .... . .. ......... . . . .
c DEVICE II
c II
88PDEL 53+PB .00833
c
C . . . .. . . z-block. Used to subtract PDEL from PB to get average power .. .. . .. .... .
PA +PB -PDEL
c
C . .... . .... END OF POWER METER ..... .......... . . . ...... . . .... . . ... ... . . .. .. . ..... .
6-22
c
c
c *******************************************************************************
c * *
c * TCR CONTROL SYSTEM *
c * *
c *******************************************************************************
c
c
c *******************************************************************************
c * FIRING PULSE GENERATOR , FIGURE 6 - 11 TACS FILE *
c *******************************************************************************
c
C ..... .. INPUT FUNCTION, FOR THYRISTORS . SEE FIGURE 6-4 .. .. . .. ... ............. .
c
C . .. .. . TACS SOURCES, READ SWITCH STATE IN NETWORK ........... ... ................ .
C ... . ... NOW IN THREE PHASE LINE TO LINE VALUES ..... . .. ........... . . ........... . .
C TYPE A B C
c 93 SW state
c
C SOURCE
c
93AS1QAB
93AS2QAB
93AS1QBC
93AS2QBC
93AS1QAC
93AS2QAC
c
C ...... TACS FORTRAN STATEMENT, LOGIC FUNCTIONS .......... . . . ......... . . .. .. . . .
c
C OUTPUT = free-format FORTRAN expression ..... . .. . ... ..... ...... ......... .
88NCQAB =.NOT. (AS1QAB . OR.AS2QAB)
88NCQBC =.NOT. (AS1QBC.OR.AS2QBC)
88NCQAC =.NOT. (AS1QAC.OR.AS2QAC)
c
C end input function ----------------------------------------------------------
C
c ******************************************************************************
c * VOLTAGE REGULATOR, DETERMINES SIGMA (SIGP) FIGURE 6-21 *
c ******************************************************************************
c
C . ...... NODE VOLTAGES READ FROM NETWORK AT BUS 1 AND INPUT TO TACS . .. .. ... . . .. .
90BUS1A 60.
90BUS1B 60.
90BUS1C 60.
6-23
C . . ... .. TACS DEVICE TYPE 66 , CALCULATES RMS VALUES . . .. . ........... . ..... .. ... .
c
c DEVICEI I
c II
C OUTPUTvv+IN1--> +IN2- -> +IN3--> +IN4--> +INS--> <-- A- -<-- B- -<--C--<--E--<--F--
88RMS1B 66+BUS1B 60 .
88RMS1C 66+BUS1C 60 .
88RMS1A 66+BUS1A 60 .
c
C ....... TACS FORTRAN . ADDS RMS VALUES , TAKES AVERAGE VALUE .... .. .. .. . ...... . .. . .
C . . .. . .. ALSO CONVERTS TO PER UNIT AND COMPARES TO REFERENCE VALUE .. . .. . .. . .. .
c
C OUTPUT = free-format FORTRAN expression . . ....... .. .. .. ... . .. .... . . ..... .
88Deltav =(RMS1A+RMS1B+RMS1C) / 398 . 363-1
c
C . ..... Z-BLOCK , GAIN = 1 . S ....... ... .... . ...... . ...... . ......... . .. ... . .. . .
C OUTPUT +IN1--> +IN2--> +IN3--> +IN4- -> +INS--> <-gain<-- low<-highLOW-->HIGH->
KDV +Deltav 1.s
c
C ... .. S-BLOCK , G(S)= (0 . 01 S)/(1.0 + 0.001 s) .. . .......... .. . . . . ...... .. .. .
C ... .. RATE FEEDFORWARD GAIN . . .. . .. .. .. . .. . ... . . .. . . ... . .. . ..... .. ... . ... . . .
C TRANSFER FUNCTION
c
c
C OUTPUT +IN1--> +I N2--> +IN3--> +IN4--> +INS--> <-gain<-- low<-highLOW-->HIGH->
C -N/ D-0--<-N/D-1---<--N/ D-2--<--N/ D-3 - -<--N/D-4--<--N/ D- S--<--N/D-6--<--N/D-7--
1SDV +DeltaV
0. . 01
1. . 001
c
C .. . ... Z- BLOCK, SUMS OUTPUT OF Z-BLOCK OF GAIN 1 . S AND RATE FEEDFORWARD ...... .
C . . .... FUNCTION . ALSO ACTS AS LIMITER LIMITING OUPUT BETWEEN - 0 . 2 AND 0 . 2 .. . . .
LIMDV +KDV +SDV -. 2 .2
c
C ....... S-BLOCK, INTEGRATOR, 300/ S . . ... . ... .. .. .. .. . ................ . . ... .. .. . .
C TRANSFER FUNCTION
c
c
C OUTPUT +IN1--> +IN2-- > +IN3 - -> +I N4--> +INS--> <-gain<--low<-highLOW-->HIGH->
C -N/ D-0--<-N/ D- 1---<--N/ D-2--<--N/ D- 3--<-- N/ D-4--<--N/ D- S--<-- N/ D-6--<--N/ D-7--
1INTDV +LIMDV 300.
1.
0. 1.
c
6-24
C .. . ... Z-BLOCK, LIMITER , LIMITS OUTPUT TO BETWEEN 0 . 0065 AND 0.9 .............. .
C OUTPUT +IN1--> +IN2--> +IN3- ~ > +IN4--> +IN5--> <-gain<--low<-highLOW-->HIGH->
IT +INTDV .0065 .9
c
C TACS DEVICE TYPE 56 , REPRESENTS NON - LINEARITY IN SIGMA VERSUS CURRENT . ... . . . .
C .. . .... USES A POINT BY POINT METHOD TO IMITATE THE CURVE ... . . ... .. . ..... ..... .
C DEVICES
C CODE
C 56 point-by-point function
C use 88 in the first two ,columns
c DEVICEII
c II
C OUTPUTvv+IN1--> +IN2--> +IN3--> +IN4--> +IN5--> <--A--<--B--<--C--<-- E--<--F--
88SIGP 56+IT
0. 0.
. 0129021432 0.1
.0972693085 0.2
. 2972693085 0.3
.6129021432 0.4
1.0 0.5
9999.
c
C ...... END OF VOLTAGE REGULATOR, SIGP IS OUTPUT .. .. .. ... . ..... ........ . . .. . ... .
c
c ******************************************************************************
C * THREE PHASE FIRING PULSE GENERATOR, SEE FIGURE 6-5 *
c ******************************************************************************
c
C .... . TACS DEVICE TYPE 58 , INTEGRATOR ........ . .... .. . ... .. ... . . . . ............. .
C CODE
C 58 integrator
c
c DEVICE II
c II
C OUTPUTvv+IN1--> +IN2--> +IN3--> +IN4--> +IN5--> <--A--<--B--<--C--<--E--<--F--
88SKAQAB58+UNITY +NCQAB 60 . 1.RSTQAB
88SKAQBC58+UNITY +NCQBC 60 . 1 . RSTQBC
88SKAQAC58+UNITY +NCQAC 60 . 1 . RSTQAC
c
C ...... Z-BLOCK , GAIN =1 , USED TO ADD SIGMA, SKAQ
C ... . .. AND TO SUBTRACT TACS SOURCE UNITY
C OUTPUT +IN1--> +IN2--> +IN3--> +IN4--> +IN5--> <-gain<--low<-highLOW-->HIGH->
TSMQAB -UNITY +SIGP +SKAQAB
TSMQBC -UNITY +SIGP +SKAQBC
TSMQAC -UNITY +SIGP +SKAQAC
c
C ...... TACS DEVICE TYPE 52, LEVEL SWITCH
C CODE
6-25
C 52 level switch
c
c DEVICE! I
c II
88ESMQAB52+UNITY - . 018 TSMQAB
88ESMQBC52+UNITY -.018 TSMQBC
88ESMQAC52+UNITY - . 018 TSMQAC
c
C . ... . . LEVEL SOURCES, USED TO SEND 0 . 4ms FIRING PULSES . . . . .. . ... . ... . . . .. . . . . . .
C . . ... . PULSES STAGGERED FOR THREE PHASE . ... .. . . . . ... . .... .. ... . .... .. . . . . . . ... . .
C 11 AMPL DC source
C OUTPUT <-----A---<----B-- - - <----C---- <-T-START-<-T-STOP--
11FP1AB 1. 4.1167E-3 4.5167E-3
11FP1BC 1. 1.3387E-3 1.7387E-3
11FP1AC 1. 6 . 8944E-3 7.2944E-3
c
C . .. . . .. . Z-BLOCK, SUMMER AND ALSO SEND OUTPUT FSMQ ...... . ..... .. ...... . . .. .... .
C OUTPUT +IN1--> +IN2--> +IN3--> +IN4--> +INS--> <-gain<- -low<-highLOW-->HIGH->
FSMQAB +FP1AB +ESMQAB
FSMQBC +FP1BC +ESMQBC
FSMQAC +FP1AC +ESMQAC
c
C . ... .. . Z-BLOCK, SUBTRACTS FSMQ FROM UNITY TO GET RESET PULSE . .... . .... . . . ... .
C OUTPUT +IN1--> +IN2--> +IN3--> +IN4-- > +INS--> <-gain<--low<-highLOW-->HIGH->
RSTQAB -FSMQAB +UNITY
RSTQBC -FSMQBC +UNITY
RSTQAC -FSMQAC +UNITY
c
C .... . ... .. END OF FIRING PULSE GENERATOR .. .... . ... .. .... .. . .. .. ... ...... . .. . . .
c
c ******************************************************************************
c * PULSE SHAPING CIRCUIT , SEE FIGURE 6-9 *
c ******************************************************************************
c
c
C . . .. . TACS DEVICE, TYPE 58, INTEGRATOR .... ...... . ..... .. . ... . . . .... . .. .. . . ... .
C CODE
C 58 integrator
c
c DEVICE! I
c II
88FPAB 58+FSMQAB 2 . E4 1 . RTPQAB
88FPBC 58+FSMQBC 2 . E4 1 . RTPQBC
88FPAC 58+FSMQAC 2 . E4 1 . RTPQAC
6-26
c
C ..... TAGS DEVICE , TYPE 54 , PULSE DELAY ....... . . . .. .. .... ......... .. . .. . ....... .
C CODE
C 54 PULSE DELAY
c
c DEVICEII
c II
C OUTPUTvv+IN1--> +IN2--> +IN3--> +IN4-- > +INS--> <--A--<--B--<--C--<--E--<--F- -
88HSMQAB54-FPAB +UNITY 3.E-4
88HSMQBC54-FPBC +UNITY 3.E-4
88HSMQAC54-FPAC +UNITY 3 . E-4
c
C ...... Z-BLOCK, GAIN = 1. 0 ... .. . .. . . .. . .. ... .... . .. ... . ... . . ............ .. .. . . . .
RTPQAB +HSMQAB
RTPQBC +HSMQBC
RTPQAC +HSMQAC
c
c end of pulse shaping - - ------------ --- ---------------- -----------------------
c
c
C . . .... TACS output specification . ..... ... . ..... . . ... ... . .. . ... . .. ..... ..... . . . . .
c ----->----->----->----->----->
33PINSTAPA BUS1A RMS1A FPAB FPAC FPBC SIGP LIMDV
c
BLANK end of TACS
c
c . . .. . .. .. ... .. .. ... .. . .. . . .
Circuit data
C RESISTOR
SSLQACAS1QAC . 0010
SSHQACAS2QAC .0010
AS2QABSSHQAB . 0010
AS1QABSSLQAB . 0010
AS2QBCSSHQBC . 0010
AS1QBCSSLQBC . 0010
c CAPACITOR
C Bus1->Bus2->Bus3->Bus4-><----R<----L<----c
BUS1A 7. 0
BUS1B 7. 0
BUS1C 7. 0
C INDUCTOR
BUS12ABUS13A 70 . 16 0
BUS12BBUS13B 70 . 16 0
BUS12CBUS13C 70.16 0
SSHQABSSLQAC 2 . 4E3 1
SSHQBCSSLQAB 2.4E3 1
SSLQBCSSHQAC 2 . 4E3 1
6-27
C RLC
C Bus1->Bus2->Bus3->Bus4-><----R<----L<----c
SSLQACSSHQAC 466.E3 2.1E-4
SSLQABSSHQAB 466 . E3 2 . 1E-4
SSHQBCSSLQBC 466 . E3 2 . 1E-4
C 3__p_RL_MD
C Bus1->Bus2-><------ ----><----R<- --- - -----L<----R<----------L<----R<---------- L
51THEVA BUS7A . 13 23 . 71
52THEVB BUS7B . 06 39 . 99
53THEVC BUS7C
C 3__p_line_t
C Bus1->Bus2 - >Bus3->Bus4-><- --R'<----A<----B<--len 0 0 0<-- ------------------->0
-1BUS7A BUS1A .03167 3 . 222 . 00787 144.4 0 0
- 2BUS7B BUS1B . 0243 . 9238 . 0 1 26 144.4 0 0
-3BUS7C BUS1C
- 1BUS1A BUS12A . 03167 3.222.00787 24 . 14 0 0
- 2BUS1B BUS12B . 0243 . 9238 . 0126 24 . 14 0 0
-3BUS1C BUS12C
c
c .. . .......... . ............ . Switch data
C switch
C Bus - ->Bus--><---Tclose<----Topen<------- Ie 0
BUS13AIL13A -1 . 9999. 0
BUS13BIL13B -1. 9999 . 0
BUS13CIL13C -1. 9999. 0
BUS1A SSHQAB -1. 9999 . 1
BUS1C SSHQAC -1. 9999 . 1
BUS1B SSHQBC -1. 9999 . 1
c VALVE
11AS1QACSSHQAC FPAC
11AS2QACSSLQAC FPAC
11AS2QABSSLQAB FPAB
11AS1QABSSHQAB FPAB
11AS2QBCSSLQBC FPBC
11AS1QBCSSHQBC FPBC
c
c .. . ...... . . . .. . .... .. ...... Source data
C AC_source
C Bus-- ><I<Amplitude<Frequency<--TOIPhiO<- --O=PhiO <----Tstart<-- --Tstop
14THEVA 187 . 79 60 . - 90 . 0. -1 . 9999 .
14THEVB 187 . 79 60 . -210 . 0. -1. 9999.
1 4THEVC 187 . 79 60 . 30 . 0. -1. 9999 .
C . .. ... Current calculated in TACS, fed to Network . .. .. .. .. . .. ... . . .. .. ... . ... . .
C Bus--><I <-- --Tstart<----Tstop
60IL13A -1 -1. 9999 .
60IL13B -1 -1 . 9999.
60IL13C -1 -1. 9999 .
BLANK end of source
c
6-28
C 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Output Request Data 0 0 o o o o o o o o o o o o o o o o o o o o o o o o o o

C Bus-->Bus-->Bus-->Bus- ->Bus- ->Bus-->Bus-- >Bus-->Bus-->Bus-->Bus-->Bus-->Bus-- >
BUSlA BUS13ABUS7A BUSlB BUSlC
c
C 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0. 0 0 0 0 0 0 . 0 Plot request 0 0 0 0 0 0 0 0 0 0 . 0 0 0 0 0 0 0 0 0 0 0 0 o o o o o o o o 0 0 0 0
c Plot data
c
C ---- --Graph type : 4(volts) 8(branch volts) 9(currents)
C I ----Units: l(deg) 2(cyc) 3(sec) 4(msec) S(micresec)
c II - Plot stopping time
c II
C VV<-I<--I<--I<---I<--1Busl->Bus2->Bus3->Bus4->Heading-------->Vert Axis------>
19420 0 Oo200 o - 05 oSTACS SIGP SSLQABSSHQBC
BLANK end of case
Figure 6-26 Input data file for complete three phase TCR model
with a simple AC system.
6-29
Chapter 7
Basic HVDC System Models
7.1 Fundamentals of HVDC

Figure 7-1 shows the basic configuration of purpose by providing isolation between AC
a typical 6-pulse bridge converter. The and DC systems , and to optimize operating
bridge consists of an array of six thyristor valve voltages.
valves that can be considered "electroni-
cally controlled current switches" . Typical DC voltage and AC current
waveforms of a rectifier bridge are illus-
By delaying the firing instants of the val ves trated in Figure 7-2. Note that~ is the firing
with respect to the natural zero crossings of delay angle and J.l is the overlap angle (due
the commutating voltages, one effectively to the presence of the leakage inductance of
controls the magnitude as well as the direc- the converter transformer) . By analyzing
tion of the power flow. these waveforms, one can derive the basic
equations that describe DC system behavior
The converter transformer serves a dual during normal operations .
1 : a
Figure 7-1 Six-pulse converter bridge.
Basic Equations where :
Average DC Voltag-e
Given the valve-side AC phase voltages:
ea(t) =Em cos(wt + 60)

eb(t) =Em cos(wt- 60) Note that a is the transformer turns ratio,
ec(t) =Em cos(wt- 180) and VLL is the RMS line-to-line AC voltage
on the line-side of the transformer.
7-1
0 wt
ia
J 1) 3
~ 5
l
-6
~ -2
l -4 J~------------~~
-6
Figure 7-2 Waveforms of rectifier DC voltage and AC currents.
Table 7-1 DC voltage expressions.

Original System-Figure 7.5(a) System with Increased Load-Figure 7.5(b)
BUS
lV I 9 lVI 9
1 1.054 -9.18 1.011 -0.32
2 1.040 -17.99 0.871 -23.14
3 .LQ.5il. -3.99 .LQ.5il. 5.08
4 .LQ.5il. 3.15 .LQ.5il. 4.37
5 1.045 -2.08 1.027 -Q.95
6 .LQ.5il. ~ .LQ.5il. ~
7 1.046 -2.95 1.025 -1.83

8 .LQ.5il. -8.14 .1..Q.5.Q -9.13
9 1.020 -13.49 0.935 -14.98
10 1.026 -20.89 0.810 -30.46
11 .LQ.5il. -15.36 .LQ.5il. -2o.ooo
12 1.040 -10.70 0.996 -1 .98
13 1.004 -15.92 0.958 -7.70
P: 1 ~2 134.34 MW 281 .71 MW
7-2
As the waveform of DC voltage (expres- and

sions given in Table 7-1) essentially consists
of segments of AC voltages, the average DC _di_3(_t) = /3Em cos(wt- 90o)
voltage can be found from: dt 2Xc/W
Thus
= vd{cosa;coso]
where: ./3
= - Em
- (cos a - cos wt )
2Xc
Using the final condition, i3 = ld at wt = o,
one obtains:
DC Current
- [cos a- cos u~]
nVdo
Id = -
For simplicity, ripple-free DC current will 6Xc
be assumed . During commutation,
o,
a ::;; wt ::;; current flowing on valve 1 DC Equivalent Circuit
will be transferred (commutated) to valve 3.
In this commutation period, we have the cir- From the equations of DC voltage Vd and
cuit in Figure 7-3 (note that Xc is the trans- DC current ld, we can tie these two quanti-
former leakage reactance seen from the ties together:
valve-side of the transformer) with the
equations: 3
Vd= Vd 0 COSa--Xc ld
.7t'
This suggests the equivalent circuit de-
scribed in Figure 7-4.
7-3
Id _____.,.
3
-Xc
n _____.
Id
3
+ +
t
1
i3(t)
+
eb(t)
1
Vdocosa vd
Figure 7-3 Circuit showing commu- Figure 7-4 Equivalent circuit of recti-
tation from valve 1 to valve 3. fier bridge.
Line-Side AC Currents P VI
cos= _d_= d d
By applying Fourier analysis on the AC cur- S<t> /3 (VLL)U<t>,ms)
rent waveform shown earlier in Figure 7.2,
=-=
vd cos a + cos 0
the RMS magnitude of the fundamental line-
side AC current is found to be:
Per Unit Leakage Reactance of

the Converter Transformer
where
Leakage reactance of the converter trans-
former is often specified in per unit quanti-
K = j p? + sin2 f.1.- 2f.J. sinf.J. cos(a + o) ties, namely:
2(cos a- coso)
It can be shown that, although K is a func- X cI = ____!_:__

tion of ~ and J.l, its value is very close to
unity and does not change very much with
different operating conditions. As sufficient
accuracy can be achieved in most cases by When the converter transformer is sized for
simply using a unity K, we will drop this K the rated total current (fundamental plus
term for the remainder of this Workbook. harmonic components), i.e.
Displacement Factor
This is, by definition, the power factor asso-
ciated with the fundamental components, The valve-side base impedance is found to
namely: be:
7-4
equation applicable to rated conditions can

be obtained:
vd
-=cosa--
Xc'
From above, a special form of the voltage Vdo 2
7.2 Description of System Under Investigation

Sample Power System To investigate the system further, the dou-
ble lines between bus 2 and bus 9 are re-
moved while maintaining the same 500
The power system shown in Figure 7-5 is MVA load at bus 10. It is found that the
used to study the effects of increasing the system simply cannot support the loss of
load at bus 10 from 300 to 500 MVA. With this line (results not shown here).
both capacitors (at bus 1 and bus 10) re-
moved, generation at bus 3 is also increased To bring the system back to operation at
from 200 to 500 MW. Table 7-2 contains this increased load level, the AC transmis-
the results of this study. sion line between bus 1 and 2 is now re-
placed by a DC line carrying 400 MW, as
shown in Figure 7-6. The reactive power
As is evident in Table 7-2, the voltages dip consumed by the converters is assumed to
considerably with respect to the original be fully compensated at the corresponding
system. Additional studies reveal that the commutation bus. Table 7-3 shows the re-
new system can only support a load at bus sults of this new case. As expected, the
10 up to 540 MVA before it collapses. voltages improve significantly.
7-5
(a)
Transmission R' X' (L') B' (C')
Lines Qjkm Qjkm (mH/km) f.J.mhosjkm (pFjkm)
zero seq . 0.31676 1.2147 (3.222) 2.9660 (0.00787)
pos . seq. 0.02434 0.034826 (0.9238) 4.7505 (0.0126)
SOOMVA
90 mi
60 mi
lOOMVA
180 mi double-line
300 MVA
0 .9 pf
(b)
Figure 7-5 Sample power system (a) original system;

(b) system with increased load.
7-6
Table 7-2 Load flow results of the sample power system

Original System-Figure 7 . 5(a) System with Increased Load-Figure 7 .5(b)
BUS
I vI e I vI e
1 1. 054 -9 . 16 1 .101 -0.32
2 1.040 -17.99 0.671 -23 . 14
3 1.050 -3 .99 1.050 5 .06
4 1. 050 3 . 15 1 .050 4 .37"
5 1 .045 -2.06 1 .027 -0 .95
6 1.050 0 .00 1 .050 0 .00
7 1.046 -2.95 1.025 -1 .63
6 1.050 -6.14 1 .050 -9.13
9 1 .020 -13 .49 0.935 -14 .96
10 1 .026 -20 .69 0.610 -30.46
11 1 .050 -15.36 1 .050 -20 .00
12 1.040 -10.70 0 .996 -1 .96
13 1 .004 -15 .92 0 .956 -7 .70
P : 1 _.2 134 .34 MW 261 .71 MW
SOOMVA
120 mi
DC line
4> ~ 500 MVA
~~-~>~~9pf
~-~~ft:q
60 mi
~~
-. -. ~
100MVA
300 MVA
0.9 pf
50 MVA
Figure 7-6 System with DC line in place.
7-7
Table 7-3 Load flow results of the system with the DC line in place
System with DC lines

BUS
lVI e
1 1.032 -6.31
3 1.050 -1.01
4 1.050 4.48
5 1.035 - 0.80
6 1.050 0.00
7 1.034 - 1.68
8 1.050 -3 .86
9 0.961 -9.54
12 1.017 -7.90
13 0.980 -13 . t r
P: 1--+ 2 400 MW
Calculation of DC System
Parameters Xc = ZBASE Xc' = (n
6 ld
Vdo) Xc' = 9.08Q
This amounts to a valve-side leakage induc-
To prepare for the EMTPffACS simulation, tance of:
parameters of the DC system must be cal-
culated first. The characteristics for the rec- Xc
tifier terminal at bus 1 are given as: Lc = - = 24.08mH
(J)
Vd = 250kV; ld = l.6kA; Pd = 400MW; From DC current equation:

a= 18 Xc' = 10% VLL = 230kV; nVdo ~
Knowing that Id =--[cos a- cosu]
6Xc
vd
-=cosa--
Xc' it can be found that
Vdo 2
we obtain o= 31.67 and 11- = 13.6r
Vdo = 277.45kV It follows that
By definition, cos cp = cos a+ coso = 0.901

2
Therefore,
Qd = Pd tan= 192.6MVar
thus we obtain the valve-side line-to-line
AC voltage (in RMS) as For 100% reactive power compensation,
this would require a capacitor size of:
aVLL = 205.45kV
C = _!_ 100 %
W (VLL)
pd = 9.66pF
i.e.
a= 0.8933 Interested readers can also verify that our

The leakage reactance seen from the valve- sample DC rectifier system has a "K" of
side of the transformer can now be calcu- about 0.998, which is indeed very close to
lated: unity.
7-8
7.3 Simulation of DC Converter Using EMTP-Current

Injection Method
Introduction ues of both the peak magnitude ( I<I>pk) and
phase angle (8-<l>) of the injected fundamen-
We are now ready to simulate the HVDC tal AC line current. This in turn requires
system. The method we will use here is
the information on the magnitude ( Vm) as
known as the current injection method. With
reference to Figure 7-7, this method is char- well as the phase angle (8) of the funda-
acterized by the injection of a fundamental mental AC busbar voltage.
AC current into the AC system. Note that Voltage Tracking System
current harmonics are ignored. The validity
of this approximation can be justified, as A good way to find Vm and 8 is through the
real systems always have AC filters in- use of Fourier analysis.
stalled at the point of common coupling
(PCC) between AC and DC systems. This 2
simple method can therefore be used as a
first approximation for the analysis of the
cl =T I v(t)coswt dt
t
t- T
transients produced by the DC rectifier
from the AC system point of view. t t- T
= ~{I v(t) cos wt dt- I v(t) cos wt dt}

0 0
t
sl =~ I v(t) sin wt dt
t- T
t t- T
AC Network
=~{I v(t)sinwt dt- I v(t)sinwt dt}
0 0
Note that the above equations can be imple-

Figure 7-7 Basic current injection model. mented in TACS with the same concepts as
those first described in Section 2.2 of this
Work Book, for the power meter.
Basic equations to be used are listed below:
Vm can now be obtained from
VI(t) = Vm cos(wt +e)
2Xc
Vm = )(Ct) 2 + (St) 2 .
cos o= cos a - f3 Id
a 3 Vm The determination of 8 needs more elabora-
tion. The difficulties arise from the lack of
r~, =cos _ 1 [cos a+ cos
'Y
OJ a FORTRAN ATAN2-like function in the
2 supplemental variable functions with the
it (t) = I<l>pk cos(wt + 8- ) current version of EMTP (Version 1.0). The
absence of structured IF-THEN-ELSE
statements certainly offers no alleviation.
where To circumvent the problem, the following
expression is suggested:
The essence of the current injection method

e = tan- I G (-s1) + {CI .LT. 0}. n
involves the determinations of correct val-
7-9
cos (wt + e) cos wt + S ::...._

Ct____
- = __: 1 sin wt
__
The above expression will correctly return Vm
values of e ranging from - 90 to + 270. and
This exploits the way that the TACS pro-
gram handles logical expressions. More . (wt + e)
sm C1 sin_wt_- __::..._
- = __:c.__ S1 cos _wt
_
specifically, the evaluation of expression Vm
{ C1 .LT. 0} will return value 1 if it is true,
and value 0 otherwise. This is an undocu- DC Side Event Models
mented feature, and should be machine in-
dependent. The readers are nonetheless ad- To study the transient response of the
vised to check this point on their own ma- power system to DC, the following events
chines. will be simulated:
There is, however, a potential problem with initial DC current ramp-up (from 0%
the suggested expression. This expression at time zero up to 100% at 50 msec),
does not explicitly prevent the runtime "di- DC line to ground fault at 100 msec,
vision by zero" error from happening, as followed by
would be the case when Ct becomes zero . a complete DC load rejection at 150
Although this does not occur very often, we msec.
would still want to avoid such problems. Since the control circuit of the HVDC sys-
A solution to this problem is-not to find 8 tem is not included in our basic model, we
explicitly. Instead, we will find the function will use a pair of forced functions for DC
"cos(wt+8-<j>)" from the following: current and rectifier ~. which duplicate the
desired control activities. Figure 7-8 shows
cos(wt + e- ) = the TACS model for producing Id and ~
cos(wt +e) cos+ sin(wt +e) sin As demonstrated in Figure 7-9, rectifier~ is
increased right after the DC fault and even-
with the two intermediate terms obtained tually drives the DC current down to its
from nominal value.
Magnitude =1.6
Turn on at t=50 ms
Ramp up to 1.6,
in 50 ms.
TIMEX 107.79 (XP3 .1S) e-286" XP
3.6 e- t 3sXP- 4.822 e-2t7XP + 1.22173
Magnitude =0. 3141 6
Figure 7-8 TAGS models of curves for Id and alpha.
7-10
4 .8
3.2
1.6
0.0 ~;._.-----r-------,-------+-------r t (msec)

0 50 100 150 200
a (degrees) (a)
110
90 r'------.w.w. 0
8118_- - t
60
30
18
0 +--------r-------,-------,-----------rt
0 50 100 150 200
(msec)
(b)
Figure 7-9 Forced functions: (a) DC current waveform; (b) ALPHA waveform.
AC System Represented by Also, to find the square of C1, we have

Single-Phase Thevenin Model used the expression "C1c1", rather than
"C1 2". This is because current version
As a first example, the AC system de- (Version 1.0) of EMTP always evaluates the
scribed in Figure 7-6 is reduced to its single power function a b (by assuming real num-
phase equivalent at bus 1, which has a ber arguments) with an equation eblna
value of R = 1.1572 n., and L = 44.58 mH. (even when b is an integer). This will result
This is also illustrated in Figure 7-10. The in runtime error when a becomes negative.
TACS model of the voltage tracking system A legitimate alternative to "C1c1" is the
is given in Figure 7-11. The listing of the expression "ABS(C1) .. 2".
EMTP input file is contained in Figure 7-12.
Note in particular the minus sign associated Figure 7-12 illustrates the TACS model of
with TACS supplemental variable IACF. the DC system equations for determining
The phase angle of the voltage source at the phase angle of the DC system as seen
SCR is chosen in such a way that under by the AC system. The figure also repre-
nominal condition BUS1 voltage has a sents the equations for determining the cur-
phase angle of + 60. rent injected back into the AC system.
7-11
V(t)
SCR
Type 60 Source
ldc(t)
a(t)
Figure 7-10 EMTP network model of the first example.
Vm = j(Cl Cl +Sl Sl)

(Cl cos(wt) + Sl sin(wT))
cV= Vm _ . cV
(Cl sin(wt)- Sl cos(wt))
sV= _ . sV
Vm
(supplemental variables)
Figure 7-11 TAGS model of the voltage tracking system.
7-12
ALFA Vm Inc Xc
Inc cV sV
cos(AF) = cos(ALFA) a 2./3 Inc

Ilpk=---____::;.::._
2 Xc Inc ;r
a=0 .8933 cos(DT) = cos(AF)- /3
a 3 Vm term= cv cos(I/J) +sV* sin(I/J)
,~,. _1 (cos(AF) + COS(DT) IACF
'I'= cos IACF = - Ilpk term
2
DC System Equations AC current injection
Figure 7-12 TAGS models of DC system equations and AC current injection.
BEGIN NEW DATA CASE

c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C EMTP Work Book #4 Example 7-1 (Results Shown in Figure 7 .1 2)
C (Current Injection Method w/ Single Phase Thevenin Model)
C (Voltage Tracking w/ 1 Cycle Integration)
c
c <RECTIFIER> DC : 250 KV, 1 . 6 KA, ALPHA = 18 degrees .
c AC : 230 KV L-L on Line Side; 205 . 45 KV L- L on Valve Side .
c X'fmer w/ 10% Leakage Reactance (i .e. Xc = 9.08 Ohms) .
c 100% Reactive Power Compensation at PCC (C=9.66 uF).
c
c ** This system has an ESCR (Effective Short Circuit Ratio) of
c about seven .
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c <---!cat
5 . E-5 . 200
10 1 1
TACS HYBRID
c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
C ** ****0**** ****0**** ****0**** ****0**** ****0**** ****0* {{{TACS Section}}}
c
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C --Xc <-GAIN
Xc +UNITY 9.08
C --Forced Ide Function -----+---------+---------+---------+---------+---------+
C <-----MAGN <-GAIN <---Tstart<----Tstop
Ide +RAMP +LEVELl +DCF 1.
c
24RAMP 1. 6 50. E-3 0. 50. E-3
llLEVELI 1. 6 50 . E-3 150. E-3
88X TIMEX- 0.100
88XP ABS(X) * (X. GE . O)
88DCF 107 . 79E6 * (XP**3.15) * EXP(-286.*XP)
C --Forced ALPHA Function ---+---------+---------+---------+---------+---------+
ALFA +CONT +LEVELA
c
llLEVELA . 31416 0. 99999 .
88CONT 3.6 * EXP(-135 . *XP) - 4 .8 22 * EXP( -2 17.*XP) + 1 .2 2173
C --Measured Bus Voltage (Valve Side , Line-to-Ground , Peak) ---------+---------+
90BUS1 0. 60 .
C --Voltage Tracking System -+---------+---------+---------+---------+---------+
88wt 120 * PI * TIMEX
88coswt cos (wt)
88sinwt SIN (wt)
88PRODC BUS1 * coswt
88PRODS BUS1 * sinwt
7-13
C .. (Integration Over 1 Cycle)

1C1P +PRODC 120 .
1.
0. 1.
1S1P +PRODS 120 .
1.
0. 1.
88C1D 53+C1P .01667
88S1D 53+S1P . 01667
C1 +C1P -C1D
S1 +S1P -S1D
c
88Vm SQRT( C1*C1 + S1*S1 )
88cV (C1*coswt + S1*sinwt) I Vm
88sV (C1*sinwt - S1*coswt) I Vm
C --DC System Equations -----+---------+---------+---------+---------+---------+
88a 0 . 8933
88cosAF COS(ALFA)
88cosDT cosAF- 2*Xc*Idcl(a*SQRT(3)*Vm)
88PHI ACOS( (cosAF + cosDT) I 2 )
C --AC Current Injection ----+---------+---------+---------+---------+---------+
88I1pk a*2*SQRT(3)*Idc I PI
88term = cV*COS(PHI) + sV*SIN(PHI)
88IACF = - I1pk * term
C --TACS Output Specification ---------+---------+---------+---------+---------+
c ----->----->----->----->----->----->----->----->
33Idc ALFA PHI C1 S1 cV I1pk term
BLANK {{{End of TACS Section}}}
c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
C ** ****0**** ****0**** ****0**** ****0**** ****0**** *** {{{NETWORK Section}}}
C {{Branches}}
C --Thevenin Impedance of the AC System
C <----R<----L<----C
SCR BUS1 1.1572 44.58
c -------+---------+---------+---------+---------+---------+---------+---------+
C {Rectifier Side VAR Supporting Capacitor}
BUS1 9.66
C {End of Rectifier Side VAR Supporting Capacitor}
BLANK {{End of Branches}}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Switches}}
BUS1 IACF MEASURING 1
BLANK {{End of Switches}}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{ Sources}}
C <-----MAG<-----FREQ<----Phase <---Tstart
14SCR 187 . 794 60.0 67.43 -1.
C --Injected AC Currents ----+---------+---------+---------+---------+---------+
60IACF -1 -1.
BLANK {{End of Sources}}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C -----> {{Nodal Voltage olp Request}}
BUS1
BLANK {{End of Nodal Voltage olp Request}}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Plot Request}}
BLANK {{End of Plot Request}}
C {{{End of NETWORK Section}}}
c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
c ** ****0**** ****0**** ****0**** ****0**** ****0**** ****0**** ****0**** ****0
END LAST DATA CASE
BLANK
Figure 7-13 Input data file of the example shown in Figure 7-10.
7-14
c::)
~
~
0
......
0
0
0. "10 .0 80 .0 120 .0 160 .0 200 .0
0
0
Mi I 1iSecond
......
' \. Tir1e
0
0 \
~ '-
0
'
------,"" -=--"T.\CS Cl
- TA'CS\-~ ........ "'" .-
9
~
co
0
A {\ {\ {\ {\ {\ (\ (\ (\ {\ {\
A
T
0
0
0
0 -1o.n 80 .0 .?0 . 1 0.0 20 0.0
hll Sec nd
I e
co
0
J v v v v v v v v- 't,;cs -c'vJ v
()o
>- .
~g
N
Cl.l
0>
<0
0
::>- 0
0
0.
0
8N
'
- BUS1
Figure 7-14 Results of the example in Figure 7-13.

(a) tracked C1and S1 :
(b) tracked AC voltage in per unit;
(c) AC busbar voltage;
7-15
r
\
I
0
I
N
160.0 200.0
Hi II iSecond
BUS1 IACF
TACS Ide
TACS ALFA
Figure 7-14 (continued)
(d) AC/DC currents and rectifier alpha.
Figure 7-14 shows the results of this study. one full cycle. It would appear that integra-
Some general observations can be made: tion over half a cycle might yield the same
result due to the half-wave symmetry prop-
Our voltage tracking system works the erty of the sinusoidal waveform. This is not
way it is intended to.
the case. Figure 7-15 shows the results of
After the load rejection, there is an ov- the latter case (replacing the integrator
ervoltage-known as dynamic overvolt-
age (DOV) or temporary overvoltage gains with 240, and time delay of type 53
(TOV)-at bus 1. This overvoltage con- devices with 0.00833). An unstable behav-
tains a fundamental component as ior of the voltage tracking system is ob-
well as higher order harmonics. served, as C1 and S1 are beating against
The current injection method, though each other-especially after the DC fault oc-
simple in principle, proves to be ade- curs. With the use of one cycle integration
quate for simulation. in our original case, this unstable behavior
Note that in the voltage tracking system of is prevented from happening as the feed-
this particular example, we have elected to back errors are averaged out over the full
integrate variables PRODC and PRODS by cycle.
7-16
0
0
s
0
0
0. "10 .0 80 .0 120.0 160 .0 200 .0
0 I MiII iSecond
0
s I
0
8N
'
(\ (\
~
1\
A (\ (\ (\ (\ "
00
0
J N ~ tJ )
......
0
~
0 \~ v ~
0
0 "10 . ~0.0 1 0. 1 0.0 20 0 0
M11 Secc ()d
1 e
00
9
v v v v v v v V- \v(cs -au v
0
0
C>
......
0
(l) 0
0
0) N
<0
.......
0
>- 0
0
0. 1 . 200 .0
0 i i ec
0
0
N
'
C>
8 - B S1
'f
Figure 7-15 Results of the example with half-cycle integration

(a) tracked cl and sl;
(b) tracked AC voltage in per unit;
(C) AC busbar voltage.
7-17
AC System Represented by voltage tracking system has been built for

Three-Phase Full Model each individual phase. Two major distinc-
tions are identified below:
The same model of the DC system used in
the previous section will again be used in In the DC system equations, Vm is
the three-phase system to study the tran- taken as the average of the peak values
sient response at bus 1 of the same power of the three AC voltages .
system (Figure 7-6). Figure 7-16 shows the While half-cycle integration is used in
circuits used for this study. It can be seen voltage tracking, there appears to be
that AC lines directly connected to bus 1 no numerical instability. This is
are replaced by the complete model of dis- mainly due to the mechanism just de-
tributed three-phase lines, and the rest of scribed. Namely, by taking the average
the AC system is replaced by the corre- of the three phase voltages, the possi-
sponding Thevenin equivalents. ble feedback errors tend to cancel out
one another, yielding very satisfactory
The input EMTP data file is given in Figure results.
7-17. Note that the DC current control ac- Results of this run are given in Figure 7-18 .
tion is simulated in exactly the same way as They show good agreements with the sin-
we did on the one-phase model. Also, one gle-phase model.
BUS1a
BUS3a Type 60
.-----____:::::::.-r--.,_.-+-1---l Hll Sources
Thevenln
lmpedancesH-~----1 II
H
(Type 14 Sources)
L__ _t-rt;--iHII
BUS7a
(Transmission Line) (Transmission Line)
Figure 7-16 EMTP model for example with the AC system represented by a full three-
phase model.
7-18
BEGIN NEW DATA CASE

c ==+====1====+====2====+==== 3====+====4 ====+====5====+====6====+====7====+====8
C EMTP Work Book #4 Example 7-2 (Results Shown in Figure 7 .1 6)
C (Current Injection Method wl Three Phase More Detailed Model)
C (Separate Voltage Tracking for Each Phase : 11 2 Cycle Integration)
c
C <RECTIFIER> DC: 250 KV, 1 . 6 KA, ALPHA= 18 degrees .
C AC: 230 KV L-L on Line Side; 205.45 KV L-L on Valve Side.
C X'fmer wl 10% Leakage Reactance (i.e. Xc = 9.08 Ohms).
C 100% Reactive Power Compensation at PCC (C=9.66 uF).
c
C ** This system has an ESCR (Effective Short Circuit Ratio) of
C about seven .
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C <---Icat
5 . E-5 .200
10 1 1
TACS HYBRID
c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
C ** ****0**** ****0**** ****0**** ****0**** ****0**** ****0* {{{TACS Section}}}
c
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C --Xc <-GAIN
Xc +UNITY 9 . 08
C --Forced Ide Function -----+---------+---------+---------+---------+---------+
Ide +RAMP +LEVELl +DCF 1.
c
24RAMP 1.6 50.E-3 0. 50.E-3
11LEVELI 1.6 50 . E-3 150 . E- 3
88X TIMEX - 0 . 100
88XP ABS(X) * (X.GE.O)
88DCF 107 . 79E6 * (XP**3.15) * EXP(-286.*XP)
C --Forced ALPHA Function ---+---------+---------+---------+---------+---------+
ALFA +CONT +LEVELA
c
llLEVELA . 31416 0. 99999.
88CONT 3 . 6 * EXP( - 135.*XP) - 4 . 822 * EXP(-217 . *XP) + 1 . 22173
C --Measured Bus Voltage (Valve Side , Line-to-Ground , Peak) ---------+---------+
90BUS1a 0. 60 .
90BUS1b 0. 60.
90BUS1c 0. 60 .
C --Voltage Tracking System -+---------+---------+---------+---------+---------+
C .. (Separate Voltage Tracking for Each Phase; Integration Over 112 Cycle Only)
88wt 120 * PI * TIMEX
88coswt = COS (wt)
88sinwt = SIN (wt)
C .. (Phase A) ..... + ....... . . + .. .. . . . . . + .. . .. .. . . + . ... . ... . + ......... + ... ... . . . +
88PRODCa = BUSla * coswt
88PRODSa = BUSla * sinwt
lClPa +PRODCa 240 .
1.
0. 1.
1S1Pa +PRODSa 240.
1.
0. 1.
88C1Da 53+C1Pa . 00833
88S1Da 53+S1Pa .00833
Cla +ClPa -ClDa
Sla +SlPa -SlDa
c
88Vma SQRT( C1a*C1a + Sla*Sla )
88cVa (Cla*coswt + Sla*sinwt) I Vma
88sVa (Cla*sinwt - Sla*coswt) 1 Vma
C .. (Phase B) ..... + ..... . . .. + . . .. .. ... + ......... + ...... ... + . ...... .. + ...... . .. +
7-19
88PRODCb = BUSlb * coswt

88PRODSb = BUSlb * sinwt
lClPb +PRODCb 240.
1.
0. 1.
lSlPb +PRODSb 240 .
1.
0. 1.
88C1Db 53+C1Pb .00833
88S1Db 53+S1Pb . 00833
Clb +ClPb -ClDb
Slb +SlPb -SlOb
c
88Vmb SQRT( Clb*Clb + Slb*Slb )
88cVb (Clb*coswt + Slb*sinwt) I Vmb
88sVb (Clb*sinwt - Slb*coswt) I Vmb
c .. (Phase C) . . ... + .... .. .. . + .. .... ... + ......... + ... ...... + . ... .. . .. + .... ..... +
88PRODCc = BUSlc * coswt
88PRODSc = BUSlc * sinwt
lClPc +PRODCc 240.
1.
0. 1.
lSlPc +PRODSc 240.
1.
0. 1.
88C1Dc 53+C1Pc .00833
88S1Dc 53+S1Pc .00833
Clc +ClPc -ClDc
Slc +SlPc -SlOe
c
88Vmc SQRT( Clc*Clc + Slc*Slc )
88cVc (Clc*coswt + Slc*sinwt) I Vmc
88sVc (Clc*sinwt - Slc*coswt) 1 Vmc
C --Averaging Three-Phase Voltages ----+---------+---------+---------+---------+
88Vm = (Vma + Vmb + Vmc) 1 3
C --DC System Equations -----+---------+---------+---------+---------+---------+
88a 0.8933
88cosAF COS(ALFA)
88cosDT cosAF - 2*Xc*Idcl(a*SQRT(3)*Vm)
88PHI ACOS( (cosAF + cosDT) I 2 )
C --AC Current Injections ---+---------+---------+---------+---------+---------+
88Ilpk a*2*SQRT(3}*Idc I PI
c
88terma cVa*COS(PHI) + sVa*SIN(PHI)
88termb cVb*COS(PHI) + sVb*SIN(PHI)
88termc cVc*COS(PHI) + sVc*SIN(PHI)
c
88IACFa - Ilpk * terma
88IACFb - Ilpk * termb
88IACFc - Ilpk * termc
C --TACS Output Specification ---------+---------+---------+---------+---------+
c ----->----->----->----->----->----->----->----->----->----->
33Idc ALFA PHI eva cVb eVe Ilpk terma termb termc
c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
C {{Branches}}
C <----R<----L {Rectifier Side AC Lines}
BUS12aBUS13a 0. 70 . 16
BUS12bBUS13bBUS12aBUS13a
BUS12cBUS13cBUS12aBUS13a
BUS13a 251.2 219 . 1
BUS13b BUS13a
BUS13 c BUS13a
c <----R<----------L
7-20
51THEVa BUS7a .1164 23.71

52THEVb BUS7b . 0423 41 . 25
53THEVc BUS7c
51BUS3a BUS1a 28.06
52BUS3b BUS1b 61.74
53BUS3c BUS1c
c <---R'<---L ' <---C'<----d
-1BUS7a BUS1a .3167 3.222.00787 144.4
-2BUS7b BUS1b .0243 .9238 .0126 144.4
-3BUS7c BUS1c
- 1BUS1a BUS12a .3167 3 . 222 . 00787 24 . 14
-2BUS1b BUS12b . 0243 . 9238 .0126 24 . 14
-3BUS1c BUS12c
c {End of Rectifier Side AC Lines}
c -------+---------+---------+---------+---------+---------+---------+---------+
c {Rectifier Side VAR Supporting Capacitors}
BUS1a 9.66
BUS1b BUS1a
BUS1c BUS1a
C {End of Rectifier Side VAR Supporting Capacitors}
BLANK {{End of Branches} }
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Switches}}
BUS1a IACFa MEASURING 1
BUS1b IACFb MEASURING 1
BUS1c IACFc MEASURING 1
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Sources}}
14THEVa 187.794 60 . 0 70 . 88 -1.
14THEVb 187 . 794 60 . 0 -49.12 -1 .
14THEVc 187.794 60.0 -169 . 12 -1 .
c
14BUS3a 187 . 794 60 . 0 70 . 88 -1 .
14BUS3b 187 . 794 60.0 -4 9.12 -1 .
14BUS3c 187.794 60.0 -169.12 -1.
C --Injected AC Currents ----+---------+----- ----+---------+---------+---------+
60IACFa -1 -1.
60IACFb -1 -1.
60IACFc -1 -1.
c ==+====1====+====2====+====3====+====4====+====5====+====6~===+====7====+====8
C ----->----->-----> {{Nodal Voltage o/p Request}}
BUS1a BUS1b BUS1c
BLANK {{End of Nodal Voltage o/p Request}}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Plot Request}}
c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
c ** ****0 **** ****0**** ****0**** ****0**** ****0**** ****0**** ****0**** ****0
END LAST DATA CASE
BLANK
Figure 7-17 Input data file of the example shown in Figure 7-16.
7-21
....
~
f',
{ .'\
I\ 1\
(. (I
\.i ~ I \I. \ li . I \f ~
00 I
0
~ I
"'0'" l
00
9
.
\I\
.....
~ -eve
0
0
~
0
0
~0 . 200 .0
.
Figure 7-18 Results of the example in Figure 7-16.

(a) tracked three-phase AC voltages in per unit;
(b) three-phase AC bus voltages;
(c) AC bus voltage-phase a;
7-22
~
......
0.
E
-=
.:
~
N
~
0
0 200.0
0
N
'
~
- BUS1e -IACF e
"f - BUS1b -IACFb
- - BUSic -IACFc
r
~
...... I \
I
~
N
~
0
0. 160 .0 200 .0
Hi I l iSecond
~
~
0
- BUS1e -IACFe
"f TACS -Ide
- - TACS -ALFA
Figure 7-18 (continued)
(d) three-phase AC currents;
(e) AC current (phase a), DC current, and rectifier ALPHA.
7-23
Chapter 8
Detailed 6-Pulse Model
8.1 Six-Pulse Model and Control Representation

The basic element of HVDC converters is HVDC transmission system depicted in Fig-
the six-pulse bridge that has already been ure 8-1. The concepts for modeling such a
described in Chapter 7. Several bridges in HVDC transmission link will now be devel-
series connection usually form one pole of a oped.
converter, and four poles constitute an
Power Order
r
I
(VII)
Smoothing
AC
Filters
AC AC
System
AC
System
Figure 8-1 HVDC transmission link (bi-polar DC system shown)
Unlike Chapter 7 where a set of equations in EMTP by TACS-controlled type-11

were used to represent the DC converter, switches that were first introduced back in
real components will be modeled in this Chapter 4. TACS can also be used to apply
chapter. Thyristor valves can be represented gate pulses as determined by the control cir-
8-1
cuit simulation. To illustrate the simulation With a perfect 3-phase voltage

techniques without undue complexity, we source connected directly to the recti-
will also make the following simplifications: fier transformer, AC filters can also
be removed.
A mono-polar DC system with one
six-pulse bridge at the rectifier ter- The resulting simplified diagram is shown
minal will be considered. in Figure 8-2. The transformer is assumed
The DC transmission line is repre- to be Y-Y connected. The neutral of the Y
sented by a 50 resistor. in the primary (line-side) is grounded. The
DC filters are neglected . secondary (valve-side) windings are con-
The inverter terminal is replaced by nected in Y with the neutral floating. The
a constant back EMF. bridge model will, in addition to the thyri-
It is assumed that the rectifier bridge stors and their snubbers, include some
is fed by a perfectly stiff AC system. small series resistances.
Smoothing Smoothing
Reactor
Back
Switch
EMF
Figure 8-2 Simplified HVDC system for fault and load rejection studies.
We will use the same rectifier bridge rating aVLL = 205.45kV (RMS)
as described in Chapter 7, which has the The total leakage inductance, as seen from
following parameters: the secondary-side, of the converter trans-
former has been found as:
Vd = 250kV; Id = l.6kA; Pd = 400MW;
Lc = 24.08mH
a=l8; X'c=10%; VLL=230kV; The inverter back EMF can be found from:
The secondary-side AC line-to-line voltage BEMF= 250kV- 5Q 1.6kA = 242kV

is :
8-2
II
(Type 12 Source)
DCLH .I
DCLH . r II
(Switch)
IDC .r
Switch : Current
Passed to T ACS
KSY .r K2Y .r
FSY.r (from TACS)
K3Y.r K6Y .r DCL.r

bY.r
DCH .r II
F3Y .r (from TACS)
K1Y .r aY .r K4Y.r
VSaY .r.
TaY.r
Voltage Passed
to TACS
I
I II II II
I
I
I (Type 14 Source) I
~--------------------------~
Perfect AC Sources
Figure 8-3 EMTP Network model of the system described in Chapter 8.
8-3
C ** ****0**** ****0**** ****0**** *** *0* ** * ****0**** *** {{{NETWORK Section}}}

C {{Branches}}
c {DC Line & Smoothing Reactors}
c <----R<---- L
IDC . r DCLH.r 350.0
DCLH.rDCLH . i 5.0
DCLH. iBEMF 350 . 0
c {End of DC Line & Smoothing Reactors}
C -- Small Resistance Between Low Pole and Ground ------- --+---------+---------+
c <----R
DCL.r 1 . E-3
c -------+--------- +- - - ------+---------+---------+---------+---------+---------+
C {Rectifier Side 6-Pulse Y-Bridge Valve Ckt.}
c .. dV/ dt Snubber <----R <----c
DCH . r aY . r 2000 . 0 0 . 06
DCH.r bY.r DCH.r aY . r
DCH . r cY . r DCH . r aY.r
aY . r DCL . r DCH . r aY . r
bY . r DCL . r DCH . r aY . r
cY . r DCL.r DCH.r aY.r
c . . Small Valve Series R <----R
DCH . r K1Y . r 1.E-3
DCH.r K3Y.r DCH . r K1Y . r
DCH . r K5Y . r DCH . r K1Y . r
A1Y.r aY . r DCH . r K1Y . r
A3Y . r bY.r DCH . r K1Y . r
A5Y . r cY . r DCH . r K1Y . r
aY . r K4Y.r DCH.r K1Y . r
bY.r K6Y . r DCH . r K1Y . r
cY.r K2Y.r DCH . r K1Y . r
A4Y.r DCL . r DCH.r K1Y.r
A6Y.r DCL . r DCH . r K1Y . r
A2Y . r DCL . r DCH . r K1Y . r
c {End of Rectifier Side 6-Pulse Y-Bridge Valve Ckt . }
c -------+--------- +--- --- ---+---------+---------+---------+- --------+- --------+
C {Re ctifier Side Y-Bridge Interface Transformer Ckt.}
C Transformer
C No Saturation No Magnetizing Branch .. 5% Leakage Ind . on Both Sides
C <-same <-NAME
TRANSFORMER TaY . r
9999
C BUS-->BUS--> <----L<-TURN
1VPaY . r 15 . 1 230 . 00
2VSaY . rVNaY.r 12 . 0 205 . 45
TRANSFORMER TaY . r TbY . r
1VPbY . r 15 . 1 230 . 00
2VSbY . rVNbY.r 12 . 0 205 . 45
TRANSFORMER TaY . r TcY . r
1VPcY.r 15 . 1 230 . 00
2VScY.rVNcY.r 12 . 0 205 . 45
C -- Valve Side Y Connection via Small Inductance
8-4
c <----L
VNaY . rMY . r 1 . E-3
VNbY.rMY . r VNaY . rMY.r
VNcY . rMY.r VNaY . rMY . r
VSaY . raY . r VNaY . rMY . r
VSbY.rbY.r VNaY . rMY . r
VScY.rcY . r VNaY . rMY . r
c {End of Rectifier Side Y-Bridge Interface Transformer Ckt . }
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c {{Switches}}
C -- Rectifier Line Side AC Current Measurement -+---------+---------+---------+
BUS1a VPaY. r MEASURING 1
BUS1b VPbY. r MEASURING 1
BUS1c VPcY.r MEASURING 1
C -- Rectifier Side DC Current Sensor Switch ----+---------+------- --+---------+
DCH. r !DC. r MEASURING 1
C -- Switch Simulating DC Line to Ground Fault at Rectifier Terminal +---------+
DCLH . r 0 . 050 9999 .
c -- Y Bridge Valves --------+---------+- --------+---------+---------+---------+
c GRID-> E
11A1Y . r KlY . r F1Y . r 1
11A2Y . r K2Y . r F2Y . r 1
11A3Y . r K3Y.r F3Y . r 1
11A4Y . r K4Y . r F4Y . r 1
11A5Y. r K5Y . r F5Y.r 1
11A6Y.r K6Y . r F6Y.r 1
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Sources}}
C -- Rectifier Side Perfect Sources
14BUS1a 187 . 794 60 . 0 60 . 00 -1.
14BUS1b 187.794 60 . 0 -60 . 00 -1.
14BUS1c 187 . 794 60 . 0 -180 . 00 -1 .
C -- Inverter Side Back EMF -+---------+---------+---------+---------+---------+
c <------MAG <--TO(sec) <---Tstart<----Tstop
12BEMF 242 . 0 .00001 0.0055
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Nodal Voltage o/p Request}}
DCH.r BUS1a BUS1b BUS1c
BLANK {{End of Nodal Voltage o / p Request } }
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Plot Request}}
c {{{End of NETWORK Section}}}
c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
END LAST DATA CASE
BLANK
Figure 8-4 Network portion of the EMTP codes for the system described in Figure 8-3.
8-5
Model of Converter (NETWORK) Note that the "Echo" feature has

been activated for diagnostic pur-
The EMTP diagram with node names and poses . The firing signals F1 Y.r,
all connections is shown in Figure 8-3. The F2Y.r, . . . etc. will be generated
resulting input data file is given in Figure by TACS and forwarded to NET-
8-4. Some remarks may explain features of WORK (see TACS listing in Figure
this case in more detail: 8-10) .
The inverter back EMF is repre-
The smoothing reactors used on both sented by a ramp function source
sides of the DC line are sized at 350 BEMF of type 12. Tstart = 5.5 msec
mH. is determined by the startup of the
The snubber circuits have a RC time system (see Section 8.2) .
constant of 120 J.l.Sec, which is 2.4 Note that all bridge node names end
times the magnitude of our time step with Y.r, which means Y bridge of
(see Chapter 4 for discussions on the the rectifier. H needed, additional
problem of numerical oscillations). bridges can be added easily by copy-
The Y-Y transformer is represented ing this bridge listing then substitut-
by three single-phase transformers ing all Y.r' s for say D.i's for a delta
TaY.r, TbY.r, and TcY.r. The special connected inverter bridge. The secon-
request word "TRANSFORMER" dary connections of the transformers
starts the model for each transformer can be easily rearranged to represent
as explained in the Rule Book page a delta connection.
6-17 .
These transformers have no magnet- Concepts of Current Controller
izing branches. Saturation effects are
also not modeled.
and Gate Pulse Generator
The 10% leakage inductance has The operating objective for a HVDC link is
been split into two equal halves, i.e. often to maintain a given DC line current
15.1 mH on the primary side and
12.0 mH on the secondary side. This Id . The control system for the link shown in
in general results in better represen- Figures 8-1 and 8-2 will in this case,
tation of the transformer.
Each transformer has a turn ratio of measure the actual DC current Id in
230/205.45 . The use of 1/0 .8933 the line (using sensors),
would have worked as well. compare Id with a reference current
The transformer secondary windings level !ORDER (error function), and
are connected in Y with the neutral generate gate pulses for the thyristors
node MY.r floating . Very small in- so as to make Id=lORDER (regulator
ductors have been used to make and gate pulse generator) .
these connections .
Design of a current regulator is a challeng-
The three switches on the AC side
are for output purposes only. ing task for automatic control system engi-
neers. A simple, but functional current
The switch between nodes DCH.r regulator is presented in Figure 8-5. With-
and IDC.r is included to forward the out explaining design details, one can easily
DC line current to TACS for control see the following :
purposes . In reality, such DC line
breakers are not used .
If Id is greater than !ORDER, then
The switch between node DCLH.r the error signal will be positive. The
and ground is provided to stage a integrator output will increase, thyris-
DC line-to-ground fault. tor firing angle 0! will increase, thus
The thyristors are modeled with reducing the bridge rectified DC volt-
TACS-controlled switches of type 11. age, and hence the DC current.
8-6
The error function is filtered to re- ics and other side effects prohibit using the
move the 360 Hz ripple caused by voltage as measured across the valve or at
the 6-pulse firing. the transformer secondary winding . Actual
Regulator path K gives a gain pro- HVDC control systems use sophisticated
portional to the error signal. techniques to generate the idealized refer-
Regulator path G(s) gives a gain re- ence voltage Vac . In our example, however,
lated to the rate of change of the we will simply use a TACS source of type
current error. This improves the re- 14 to represent this reference voltage. The
sponse of the regulator to rapidly reason why this would work is that perfect
changing currents as seen in the case voltage sources are available right at the
of a DC fault. primary side of the transformers. More ad-
vanced voltage synchronization techniques
will be introduced in Chapter 9.
With reference to Figure 8-6, a level trigger
forms a long pulse Fac with G!= 0, which is
then delayed by the pulse width W to form
signal Dac. With proper logic operations,
pulses Pac and Nac are produced.
Pac = (Fac .AND. ( .NOT. Dac))
Nac = (Dac .AND. ( .NOT. Fac))
F
ac V~c'\J V~ \j
Figure 8-5 Current regulator concept.
Dac ..-------.
I 'C7
I ""I
Selection of individual parameters of the 1-lw
regulator is a task for control engineers and
will not be discussed in this Workbook. The
PacD
n
output of the regulator will be a signal pro-
portional to the firing angle a in degrees or
NacO
seconds. 0
The gate pulse generator will use the firing
angle value a of the regulator and generate Figure 8-6 Gate pulse generator concept.
a thyristor firing pulse exactly a degrees af-
ter the natural zero crossing of the particu-
lar bridge commutating voltage. Again, gate Note that while both pulses now have width
pulse generator concepts and designs can W, they are still at a= 0 with reference to
be quite sophisticated. A gate pulse genera- the positive and negative zero crossings.
tor concept is shown in Figure 8-6. These pulses are then delayed by the time a
as delivered by the current regulator. Figure
For valve 1, the voltage across the valve be- 8-7 gives the block diagram of such a gate
fore firing is Vac (see Figure 8-3). Harmon- pulse generator.
8-7
Fac
Vac
Fba
Vba
Feb
Vcb
a = delay In seconds
Figure 8-7 Block diagram of gate pulse generator.
TACS Models of the Converter The reference DC current order

Controller IOR1.r is adjusted in the Z-block
within the DC current order block.
Figure 8-8 shows the complete function With the selected normalization, a
value of IOR.r = 1.0 p.u. represents
blocks of the rectifier firing angle control. a DC current order of 1.6 kA. For
TACS models for these function blocks as other reference values of DC current
well as the resulting TACS codes are given order, the gain of the Z-block will
in Figure 8-9 through Figure 8-14. have to be adjusted accordingly.
The raw error signal "ISC.r - IOR.r"
DC Current Regulator is not generated explicitly, but
formed by the "+" and "-" inputs to
Figure 8-9 shows the TACS diagram of the the 360 Hz filter.
DC current regulator along with the DC cur- INI.r, device code 57, is a time se-
rent order block. The corresponding codes quenced switch that will be closed at
actually used are given in Figure 8-10 . time t = 15 msec. It is used for
Some remarks may explain features of this startup (see Section 8.2) .
case in more detail: The integrator output ALPI.r is de-
signed in such 0! way that 1 p.u. cor-
The actual DC line current Id is responds to 180 of firing delay an-
picked up from switch IDC.r in NET- gle 0!. Its initial value is set to 0.1
WORK (see Figure 8-3) and for- (i.e. 0! = 18).
warded to TACS as a type 91 source To avoid extreme swings of <l! under
with the same name IDC.r. transient conditions, the integrator
Current IDC. r is normalized to 1. 6 output is limited by a unity gain Z-
kA = 1 p.u. by Z-block ISC.r. block ALPH.r to values between
8-8
o.o278 Camin =so) and 0.61 onds. Since 1 p.u. = 180 = 0.00833
(amax = 109.8 ). seconds, a Z-block TALP.r with gain
0.00833 effectively converts the firing
The firing delay needed in the gate angle 0! in degrees to a firing delay
pulse generator is expressed in sec- time ta in seconds.
IDC.r
from NETWORK)
' Voltage
Synchronization
Gate Pulse
Generator
Double
Pulsing
Pulse
Bloc kin
VacY.r. P1Y . r ID1Y.r F1Y.r ..

VbaY. P4Y .r ID4Y.r F4Y .r ..
.... ...
VcbY.r. P3Y.r ID3Y.r F3Y .r ..
... ...
P6Y .r lnRV r F6Y .r ..
DC Current
Order
DC Current
Regulator
PSY .r lnsv r
...
FSY .r..,
...
F2Y.r..,
.
IOR . r
TALP .r
P2Y .r .. I D2Y .r ..
. ( to NETWORK)
Figure 8-8 Basic function blocks of the rectifier firing angle control.
8-9
Oo t:l
I .....
~
........
0 e.
:n
<Q
~
Q..
~ ?'
()) ~
~
I
<0
~
0
~
(/)
IDC.r (actual current from NETWORK)
DC Current Regulator ~
30 Current Scaling
g. UIDC!..I 1 ISC.r 360 Hz 2nd Order Filter
(i)
0
11.6 +
1 + 1.9527x1 o s
7 2
FER.r .. J K l FEG.r
-.. Z-Biock 1
s:
(1) ~
3
1 + 1.5676x10. s + 1.9527x1o s
7 2
Z-Biock Integrator
S-Biock Switch
CJ
ff
-=;1~,_
0
() .01 s
G)
~ ~ 4 Ill
1 + 1.36054x1 0 s co
~.....
DC Current Order
FEC.r -o
S-Biock c:
0 INI.r ;;;
a.
(1)
......
<ll
G)
<ll
ru (amax = 109.8) o.
.
:J
::3 61 <ll
Integrator
Q. 11 TI IOR1.~
. ~
tJ
0
()
l I
TAGS Source
1.0 I--
IOR.r 25.132741
s
ALPI.r
:
I
(1 p.u. = 180) I
K=1
lALPH.r
-;.. .00833
r
J .I
l
TALP
.r
I (a in second)
~
....
c: Z-Biock
S-Biock Z-Biock Z-Biock
~
(1) 0.0278
::3
..... (amin=5)
(i)
<Q
~
.....
0
;-..
BEGIN NEW DATA CASE

c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C EMTP Work Book #4 Example 8-1 (Results Shown in Figure 8 . 15 & Figure 8 . 16)
C (Perfect Sources At Rectifier PCC)
C (Big Bang; DC Fault ; Load Rejection)
c
c <RECTIFIER> DC: 250 KV, 1 . 6 KA, ALPHA= 18 degrees.
c 350 mH Smoothing Reactor .
c AC: 230 KV L-L on Line Side; 205.45 KV L-L on Valve Side .
c Transformer w/ 10% Leakage Reactance per Phase .
c
c <INVERTER> 242 KV DC Voltage w/ 350 mH Smoothing Reactor .
c
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c <---I cat
5 . E-5 150 . E-3
100 3 1
c
TACS HYBRID
c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
C ** ****0**** ****0**** ****0**** ****0**** ****0**** ****0* {{{TACS Section}}}
c
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {Rectifier DC Current Order}
11IOR1 . r 1 .0 -1.
IOR . r +IOR1 . r 1.0
C {End of Rectifier DC Current Order}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c {Rectifier DC Current Regulator}
c <input>
c IDC . r DC current passed from EMTP
c IOR . r Reference current order level in PU
c <output>
c TALP.r Rectifier ALPHA in Second .
c <note>
c ISC . r -- Scaled Down Version of "IDC.r" w/
c 1 PU = 1.600 KA (1/1.600 = 0.625)
c -------+---------+---------+---------+---------+---------+---------+---------+
c <-----MAGN <-GAIN <---Tstart<----Tstop
91IDC. r -1.
ISC.r +IDC . r 0.625
C -- 360Hz 2nd Order Filter -+---------+---------+---------+---------+---------+
2FER . r +ISC . r -IOR.r 1 .0
1.0 0 . 0 1 . 9527E-7
1.0 1.5676E-3 1.9527E-7
C -- K & G(S) -----+---------+---------+---------+---------+---------+---------+
FEG. r +FER. r 1. 0
c
1FEC . r +FER . r 1.0
0.01
8-11
1.01.36054E-4
C -- Integrator Switch ------+---------+---------+---------+---------+---------+
88INI . r 57+FEC.r +FEG . r 1.0
0 . 015
9999 .
C -- Integrator ---+---------+---------+---------+---------+---------+---------+
C <-GAIN
1ALPI . r +INI.r 1.0
25.132741
1.0
C -- Initial Condition (Rectifier ALPHA= 18.0 deg)
77ALPI . r 0.100
C -- Rectifier ALPHA Limits -+---------+---------+---------+---------+---------+
c <-GAIN<---LO<---HI
ALPH.r +ALPI . r 1.0 . 0278 0.61
C -- Conversion ---+---------+---------+---------+---------+---------+---------+
C . . ALPH.r: rectifier ALPHA in p . u. (1 p.u . = 180 deg . )
C .. TALP . r: rectifier ALPHA in second
TALP . r +ALPH.r . 00833
c {End of Rectifier DC Current Regulator }
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
Figure 8-10 TAGS portion of the EMTP codes; Part 1: DC current order and current
regulator.
Gate Pulse Generator rather than the code 53 transport de-

lay, because the latter uses much
Figure 8-11 shows the diagrams of the gate more storage in the computer mem-
pulse generator along with the voltage syn- ory.
chronization block. The corresponding The logical expression PacY.r =
TACS codes are listed in Figure 8-12. Addi- .NOT. DacY.r .AND. FacY.r is rep-
tional remarks are given below: resented by a supplemental variable
using logical operators in the FOR-
The type 14 TACS sources VacY.r, TRAN statement. The rise of pulse
VbaY.r, and VcbY.r are proportional PacY.r coincides with the zero cross-
to and in phase with the corresponding of VacY.r, representing a gate
ing line-to-line voltages Vac, Vba, pulse with width PWIDTH, and delay
and Vcb of the AC network. angle a= oo.
Device code 52 is a level triggered Another pulse delay code 54 shifts
switch. Its output FacY.r will be 1.0 the pulse by the firing delay time ta
as long as VacY.r is positive. So as established by the DC current
FacY.r will be pulses of 112 period regulator (see Figure 8-9). The end
duration separated by 112 period. result P1 Y.r is a correctly delayed
The level triggered switch acts as a firing pulse for valve 1.
zero crossing detector. The pulses for valves 2 to 6 are formed ac-
The code 54 pulse delay shifts signal cordingly. The resulting pulses P1 Y.r,
FacY.r by PWIDTH = 0.001 seconds P2Y.r, . . . etc. , are then sent to the next
(i.e. 21.6), forming pulse DacY.r. two function blocks , namely "double puls-
The code 54 pulse delay is used ing" and "pulse blocking".
8-12
!1
co
c::
(i)
Co
0
......
...... PWIDTH
Delayedby ~
~
() PWIDTH sec. ~ Delayed by a
(/)
11541 DacY.r
I ~PacY_r 1 l54l P1Y.r
3
0
f5-
(i)
Voltage
Synchronization
0....., F Wllll1!!811lB!lJ
<;: VacY.r
~
ii)
CQ ff
(\) TACS Source
(/) 1 ~~~
c
' CT
() (ij
::J-
a:::"l I
"'0
~
t:;j VbaY.r :;
til
..... e.
a
:::"l
til
:::"l
Q
CQ
til
.....
(\)
PWIDTH
b
"b VcbY.r ---, .....
(1:)
c::
(i)
e.
(i)
(\) ~
CQ
~
(\)
:::"l TALP.r ------------------------t~
(\) (from DC Current Regulator)
il1
..... ~
0
Oo
:"'
~
I
........
v..,
~
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {R~ctifier Voltage Synchronization}
C -- VacY.r, VbaY.r , VcbY . r :
c Reference Voltages for Firing Pulses
c -------+---------+---------+---------+---------+---------+---------+---------+
C <------MAG<-----FREQ<----ANGLE <---Tstart<----Tstop
14VacY.r 1. 60 . 0 30.00 -1.
14VbaY . r 1. 60 . 0 -90 . 00 -1.
14VcbY. r 1. 60.0 150.00 -1.
C {End of Rectifier Voltage Synchronization}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c {Rectifier Gate Pulse Generator}
C <input>
C VacY . r , VbaY . r, VcbY.r :
C Line-to-Line Voltages from Voltage Synchronization.
C TALP . r:
C Desired Delay Angle ALPHA from Current Regulator Output .
C <output>
C P1Y.r , P2Y . r , .. . , P6Y . r :
C Basic Delayed Firing Pulses .
C VacY . r, VbaY . r, VcbY . r: Reference Voltages for Firing Pulses
c -------+---------+----- ----+---------+---------+---------+---------+---------+
C .. Width of Firing Pulse ( . 0010 = 21.6 deg) in Seconds
c <--GAIN
?WIDTH +UNITY .0010
C -- Level Trigger (Device 52) --------+---------+---------+---------+---------+
C <-GAIN<-LEVL <--i / p
88FacY.r52+UNITY 1.0 0 .0 VacY . r
88FbaY . r52+UNITY 1. 0 0.0 VbaY . r
88FcbY . r52+UNITY 1.0 0 .0 VcbY.r
C -- Delay by ?WIDTH seconds +--- ------+---------+---------+--------******-----+
88DacY.r54+FacY.r ?WIDTH
88DbaY . r54+FbaY . r ?WIDTH
88DcbY.r54+FcbY.r ?WIDTH
C -- Form Pulses --+---------+---------+---------+---------+---------+---------+
88PacY.r .NOT. DacY . r .AND. FacY.r
88NacY . r . NOT . FacY . r . AND. DacY.r
88PbaY . r .NOT. DbaY.r .AND . FbaY.r
88NbaY.r .NOT. FbaY.r . AND. DbaY.r
88PcbY.r .NOT. DcbY . r . AND . FcbY . r
88NcbY . r . NOT . FcbY . r . AND . DcbY . r
C -- Form Delayed Pulses ----+---------+---------+---------+--------******-----+
88P1Y . r 54+PacY . r TALP . r
88P4Y.r 54+NacY . r TALP . r
88P3Y . r 54+PbaY . r TALP . r
88P6Y . r 54+NbaY . r TALP.r
88P5Y.r 54+PcbY.r TALP.r
88P2Y.r 54+NcbY . r TALP.r
C {End of Rectifier Gate Pulse Generator}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
Figure 8-12 TAGS portion of the EMTP codes;
Part II: voltage synchronization and gate pulse generator.
8-14
Double Pulsing and Pulse Blocking will therefore make no difference. On the
other hand, if the system at startup is not
Figure 8-13 and Figure 8-14 show the dia- conducting current, then we will have two
grams and actual TACS codes of the last valves fired simultaneously completing a
closed loop and allowing DC current to start
two function blocks.
flowing.
The double pulsing is needed for startup The pulse blocking is provided to simulate a
purpose. To allow current to flow in the rec- 100% DC load rejection: a 100% reduction
tifier bridge at the beginning of the simula- of the DC load as seen by the AC system.
tion we must fire two valves at the same Although DC load rejection can also be
time, then afterwards have each firing simulated with a bypass pair (say, valve 1
spaced by 60 o in a 6-pulse system. This is and valve 4), we will use a yet simpler
achieved by the double pulsing technique . method-pulse blocking. It can be seen from
For example, at the time when the logic Figure 8-13 and Figure 8-14 that normal fir-
calls for valve 2 to be fired, valve 1 will ing pulses will be blocked (prevented from
also receive the firing pulse generated for being sent to the valves) as soon as the
valve 2. Note that in steady-state operation, blocking signal BLCK.r becomes non-zero.
valve 1 will have already been fired and
conducting current. Any additional pulses
Double Pulsing Pulse Blocking
P1Y. r ... I D1Y.r
~
1 .0
I
F1Y .r ...
P4Y . r
I
r+1
...~I 1.0
J
D4Y .r
F4Y.r ...
from Ga te Z-Biock
~
Pulse Gene rater to Thyristor
Grids in
P3Y . r NETWORK
I D3Y.r .--------
...J
.
1.0 F3Y .r
P6Y. r
I
I D6Y.r
~.--------.. ...
J... 1 .0
.
F6Y.r
I
~
....
PSY. r
I DSY.r .--------
J.. 1 .0 FSY.r .......
P2Y. r
I
I D2Y.r
~.--------..
] .
. 1.0
I
~
F2Y.r
.......
BLCK .r
I ~
TACS Source
Figure 8-13 TAGS models of the double pulsing and pulse blocking blocks.
8-15
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c {Rectifier Double Pulsing}
c
D1Y . r +P1Y . r +P2Y.r 1.0
D4Y . r +P4Y . r +P5Y.r 1.0
D3Y . r +P3Y.r +P4Y . r 1 .0
D6Y.r +P6Y.r +P1Y.r 1 .0
D5Y . r +P5Y . r +P6Y . r 1.0
D2Y . r +P2Y.r +P3Y.r 1.0
C {End of Rectifier Double Pulsing}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c Rectifier Pulse Blocking}
C . . Block All Valves After 100 msec
C <-----AMPL <---Tstart<----Tstop
llBLCK.r 1. . 100
c
98F1Y . r D1Y.r . AND. .NOT. BLCK . r
98F4Y . r D4Y.r . AND. .NOT . BLCK.r
98F3Y.r D3Y.r .AND. .NOT. BLCK . r
98F6Y . r D6Y.r .AND. .NOT . BLCK.r
98F5Y.r D5Y . r .AND. .NOT. BLCK . r
98F2Y.r D2Y.r .AND. .NOT. BLCK . r
c {End of Rectifier Pulse Blocking}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c {Output Specification}
c --- -->----->----->----->
33ALPH . rVacY . rVbaY . rVcbY . r
c {End of Output Specification}
c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
Figure 8-14 TAGS portion of the EMTP codes; Part Ill: double pulsing and pulse
blocking.
8-16
8.2 Fault Analysis Using Detailed 6-Pulse Model

The transient response of the HVDC system Rectifier StartUp with Big Bang
described in the previous section will now Approach
be studied. More specifically, the following
events will be staged: For fast initialization we will start the sys-
tem at time t = 0 with its required DC volt-
DC line to ground fault at 50 msec age (by using a fixed 0!), but with no back
mark, followed by EMF. This will allow a fast buildup of the
a complete DC load rejection at 100 DC current. Full back EMF is not applied
msec. until the DC current comes to its rated
value.
As mentioned earlier, the DC fault is simu-
lated by closing the switch between node For our system, the back EMF (BEMF),
DCLH.r and ground. This will result in the source type 12, will at time t = 0 be set to
loss of the back EMF, and as a conse- zero by making its starting time Tstart =
quence the occurrence of DC over-current. 0.0055 seconds. After 5.5 msec the back
The peak value and duration of the over- EMF will jump from 0 to full 242 kV in a
current is dependent upon the AC/DC sys- 0.01 msec period. As the circuit resistance
tem components and the response of the is much smaller than the combined reac-
controls. tance, the 5.5 msec time delay is estimated
roughly from the following:
The rectifier controller is able to vary the
DC voltage by changing the firing delay an- = O Id(350 * 2 + 24.08)
gle 0!. When a= oo we have maximum DC Tstart 8333 + Vd
voltage, and when 0! approaches 90 the = 5.5msec
average DC voltage becomes zero. The DC
controls can thus regulate DC voltage or where 0.8333 ms is the 18 0! delay, 350*2
DC current by changing the firing delay an- corresponds to the two smoothing inductors,
gle 0!. and 24.08 is the total leakage inductance
seen from the secondary side of the trans-
On modern DC systems, the rectifier con- former.
trols will have at least three regulator The thyristor firing is initialized with 0!= 18
modes: a current mode, a voltage mode, at time t=O. The integrator switch (see Fig-
and a constant firing angle mode. For most ure 8.5) is open so as to have a zero error
conditions including steady state and DC signal input to the integrator. To get a firing
faults, the regulator will operate in the con- angle of 0!= 18 , integrator output ALPI.r is
stant DC current mode. This allows us to initialized to 0.1 p. u. (see Figure 8-9). This
neglect the other two modes and only model is done because all integrators will at time
the current regulator mode for this example zero inherently have an output value of
as shown in Section 8.1. zero. If other initial values are desired, then
they must be defined by the user with a
Before we can simulate the transient events, type 77 statement.
we must bring the DC system to steady-
state operation. For our system, this The value of 0.1 p.u. (or 18) will prevail
amounts to a DC voltage of 250 kV, a DC until integrator switch INI.r closes and pro-
current of 1.6 kA, and a firing delay angle vides non-zero input to the integrator. This
of 0! = 18. As we have no interest in per- generates a DC voltage in the bridge, which
forming a normal startup procedure here, is approximately the voltage needed for our
we will resort to a specialized fast initiali- desired steady state current. With this DC
zation method called the big bang startup. voltage and no back EMF, the DC current
will quickly reach 1.6 kA. At that point in
time the back EMF is imposed to hold the
8-17
DC current at about 1.6 kA. The switch in ticularly since we simulate only one bridge
Figure 8-5 which ensured a zero input to the with no DC filters. The DC voltage shows,
firing angle integrator originally, will now in addition to the 360 Hz ripple, the com-
be closed at 15 msec and the current con- mutation notches caused by the overlap.
trol will establish the desired 1.6 kA and Note also that the steady state ~ is slightly
come to steady state within a few more mil- off the 18 mark. This is due to the use of
liseconds. additional components-such as small induc-
Figure 8-15 shows the results of the initiali- tors and small resistors for connection pur-
zation process just described . The startup of poses-in our sample system. To compensate
the system behaves in the way we expected. the additional voltage drop due to these
The delay near t=O is due to the 18 o firing components the rectifier ~ is automatically
angle delay. The ripple at a characteristic decreased slightly by the controller so as to
frequency of 360 Hz is clearly visible, par- maintain a 250 kV DC voltage.
8-18
~
0
0. 10 .0 20 .0 30 .0 "10 .0 50.0
MiII iSecond
TiMe
10 .0 20 .0 30.0 "10 .0 50 .0
MiII iSecond
TiMe
0
0
......
0
0
C)
"'
C)
C)
0 10 .0 20 .0 30 .0 "10 .0 50 .0
MiII iSecond
TiMe
Figure 8-15 Startup using big bang technique

(a) a (1 p.u. = 180 );
(b) DC current;
(c) DC voltage.
8-19
DC Fault and Load Rejection on the AC side, as a stiff AC system has

been used in this example .
Results of the complete simulation includ-
ing a DC fault and a 100% DC load rejec-
tion are given in Figure 8-16. The fault ap- In closing, the readers are reminded that
plied at time t = 50 msec makes the DC the big bang startup process of the convert-
current shoot up to over 4 kA. Control ac- er bridge is of course completely different
tion however quickly pushes a further, and from the actual operation of a HVDC sys-
within about 30 msec the old current level tem. It serves the purpose of bringing the
of 1.6 kA is reached again-now of course system to steady state as quickly as possi-
with a much smaller DC voltage due to a ble . Such artifice in modeling and simula-
much bigger firing angle a . tion is not only allowed, but desirable. This
challenges the intuition of the users, and
The 100% DC load rejection staged at t = adds a component of art to the science of
100 msec basically causes no overvoltage power system analysis.
8-20
Ln
c:i
0
0
0. 50 .0 100 .0 150 .0
MiII iSecond
50 .0 100 .0 150 .0
MiII iSecond
C>
"'!"
I\
I
0
N
\,
I
~
i
0
0. . 120 .0 150.0
MiII iSecond
~
~
) BUS1e VPeY .r
0 \.' BUS1b VPbY .r
"'!" BUSic VPcY .r
Figure 8-16 Results of the complete simulation

(a) a (1 p.u. = 180 );
(b) DC current;
(c) three phase AC currents;
8-21
0
0
0.
50.0
Mi ll iSecond 150.0
Me
=-0
-""
0 f' "
~ Ii ! I\ /'1 /\ ,'\
/I (I '\ f',
I II, 'I /1 .".
y'
I 1,1 i I 1/ j I 1/ ! I I I I I
I '\
,
II ( v I' I, I
' , I { r 1 I .
0
II I
' !I '
/I , I
; J '
0
0. I I I I 'I 'I I I
.I I I
I I I I ,I '
II
0 r '
11.60.0
~ I lj .' '
' II
\I \J '
A
v '\
Figure 8-16 (Continued)

(d) DC VOltage;
(e) three phase AC voltages .
8-22
Chapter 9
Full HVDC System Model
9.1 System Strength and Effective Short Circuit Ratio

The detailed HVDC model used in the pre- systems . In technical terms, we say that the
vious chapter has assumed the existence of system interface has an infinite strength, or
a perfect three-phase voltage source (i .e. that it has an infinite effective short circuit
infinite bus) right at the point of common ratio (ESCR).
coupling (PCC) between the AC and DC
~~
ZtLA.t VL0 QPd. Converter
= 1 for rectifier
PCC
Qd
Xc'
Q
Q =- 1 for inverter
a<RJ or YUJ
Figure 9-1 One line diagram showing effective Thevenin equivalent of the AC system.
With reference to Figure 9-1, effective short stance, if Zt is expressed in 0 and Pd (for
circuit ratio is defined as : DC power) in MW, then V should be inter-
preted as the line-to-line RMS AC voltages
ESCR = VZ/Zt
pd
(in kV).
It is not difficult to appreciate that as the
where Zt is the effective Thevenin imped- ESCR between the AC and DC systems be-
ance (including compensating capacitors, if comes smaller, the greater the number of
any) of the AC network. Note that V, Zt, problems likely to be encountered. In this
and Pd are normally per-unit AC quanti- chapter, however, we will concentrate only
ties. Real quantities can also be used if they on the simulation aspects of the interface
are applied in a consistent manner. For in- problems.
9.2 Fundamentals of Interface Problems

Since the infinite bus assumption rarely ap- voltage distortion at the PCC;
plies to real AC power networks, we will voltage synchronization problem;
replace the perfect voltage source used in initialization issue.
Chapter 8 with our sample AC system de-
scribed in Chapter 7 (see Figure 7-6) . AC Harmonics and Filters
Operation of p-pulse converters typically
As a consequence of using more realistic produces AC current harmonics in the order
AC system models, three new interface of qp 1, where pis the pulse number and q
problems must now be considered; they are: is any positive integer. If left unchallenged,
9-1
these current harmonics will penetrate into As the loading of the system changes,
the AC network. As harmonic currents flow so do the bus voltages. The changes in
through system impedances in various bus voltages at PCC occur in magni-
paths, harmonic voltages are formed all tude as well as in phase angle.
over the system. In the process they may No longer can we simply use a set of fixed
excite resonances, polluting the entire net- voltage sources as our reference voltages
work. for firing pulse generation. Consequently,
To confine the converter harmonics to the the voltage synchronization block used in
station, AC filters are installed at PCC. AC Chapter 8 (see Figure 8-11) will have to be
filters are generally shunt-connected modified. As seen in Figure 9-4, our new
voltage synchronization block will track the
branches that present a low impedance path
to ground for harmonics . They also appear actual phase voltages and generate a set of
as large capacitors at fundamental fre- balanced line voltages .
quency, thus providing all or part of the In general, the AC voltages at PCC can be
needed reactive power compensation. expressed as:
A detailed discussion on AC filter design 00
strategy is beyond the scope of this Work-

book. For our sample AC/DC system, we
Va(t) = L Vamh cos(hwt + E>ah)
h =1
will simply divide the 9.66 p.F1 compensat- 00
ing capacitor into three banks (2 .62 p.F,

2.62 p.F, 4.42 p.F) and transform them into h = 1
00
two tuned filters and one damped filter. The
actual filter parameters used are given in Vc(t) =L Vcmh cos(hwt + E>ch)
Figure 9-2. The readers are referred to Kim- h =1
bark's classical textbook2 on HVDC for the After dropping the corresponding subscript
definitions of tuned frequency and quality fac- "1", the fundamental components of the
tor of AC filters. Figure 9-3 demonstrates phase voltages become:
that our resultant AC filter has low imped-
ance value at 5th and 7th harmonic fre-
quencies. It also appears as a low imped- Va(t) = Yam cos(wt + E>a)
ance with some damping over a wide range = Ca cos wt + Sa sin wt
of (higher) frequencies .
vb(t) = Vbm cos(wt + E>b)
Voltage Synchronization = cb cos wt + sb sin wt
Problems
The absence of perfect voltage sources at Vc(t) = Vcm cos(wt + E>c)
PCC implies the following: = Cc cos wt + Sc sin wt
AC voltages at the AC/DC interface
will always have some degree of dis- Note that the Fourier coefficients ( Ca, Sa,
tortion, even with filters installed. Cb, Sb, Cc and Sc) and the resulting fun-
Three-phase bus voltages at the inter- damental phase voltages can be obtained
face may be unbalanced, say in the with a voltage tracking system described in
event of a single-line-to-ground fault Section 7.3. At this point, the commutating
on the AC side. voltages can be obtained 3 and used as the
1 Calculated in Section 7 . 2 .
2 E . W. Kimbark, Direct Current Transmission, Vol. I (Chap 8), Wiley-Interscience, New York,
NY, 1971.
3 By way of example, reference voltage for valve 1 can be obtained from Vac(t) = va(t)- Vc(t).
9-2
reference voltages for the gate pulse gen- We will take it one step further however. In
erator. This would simulate the firing con- this chapter, we will simulate another con-
trol scheme known as equal-firing-angle trol scheme known as equal-pulse-spacing
(EPA), or individual phase control scheme. (EPS) or equidistant firing control scheme.
BUS1a BUS1b BUS1c
1
AC Filters
~----
---------
.--------4~----.
-----,
.----~~t-----. I
I
I
I I
I BUS1cml
I
I I
I I
I sth 7th I
1 Tuned Tuned I
I
I
L-- -
__ ...I
I
(a)
Type TUNED TUNED DAMPED

h 5th 7th 11th
C(uF) 2.62 2.62 4.42
L(mH) 107.42 54.81 13.16
R (Q) 1.27 0.90 70.92
Quality Factor 160 160 1.3

Fundamental MVAR
(Assuming 230 KV Line) 54.43 53.34 88.88
Fundamental MW
(Assuming 230 KV Line) 0.07 0.05 0.05
(b)
Figure 9-2 AC Filters: (a) Circuit diagram;

(b) Filter parameters.
9-3
z,(n)
700
600
500
400-
300
200
100
0
0
\ J'
6 12 18 24 30 36 42 48
-
h
(a)
eI (0)
100
50 -
o-
-50
v
-100
0
- 6 12 18 24
(b)
30 36 42 48
h
Figure 9-3 Characteristics of the AC filter used in Chapter 9.

(a) magnitude of filter impedance vs. frequency (multiple of fundamental)
(b) angle of filter impedance vs. frequency .
. Find .. Find .....

.. Fundamental . Positive Sequence
.. Component
of the
Phase Voltage
..
.....
Component
of the
Line Voltage
.....
Figure 9-4 Voltage synchronization concept.
9-4
In practice, the firing pulses generated by the positive sequence components of the
EPS are timed by a phase-locked oscillator, tracked phase voltages. In the time domain,
resulting in uniformly spaced firing pulses. they are:
To "emulate" EPS control, we'll first find
1
Va.(t) = 3[Vam cos(wt + 8a) + Vbm cos(wt + eb + 120) + Vcm cos(wt + ec- 120)]
1
vb.(t) = 3[Vam cos(wt + 8a- 120) + Vbm cos(wt + 8b) + Vcm cos(wt + 8c + 120)]
1
Vc.(t) = 3[Vam cos(wt + ea + 120) + Vbm cos(wt + eb -120) + Vcm cos(wt + ec)J
Knowing that for a balanced 3-phase sys- times as large, we can write the positive-se-
tem, the line voltage lags corresponding quence line voltages as:
phase voltage by 30 with a magnitude 13
1
Vac.(t) = 13 CVam cos(wt + ea- 30) + Vbm cos(wt + eb + 90) + Vcm cos(wt + ec- 150)]
1
Vba.(t) = 73[Vam cos(wt + ea- 150) + Vbm cos(wt + eb- 30) + Vcm cos(wt + ec + 90)]
Again, in order to avoid using the inverse we'll expand these equations, i.e.
tangent function (see Section 7.3) in finding
phase angles of Vac.(t), Vba.(t) and Vcb.(t),
v (t) = _!__[ Vam cos 8a cos(wt- 30) + Vbm cos eb cos(wt + 90) + Vcm cos 8ccos(wt -150)]
ac 13 - Vam sin 8a sin(wt- 30)- Vbm sin eb sin(wt + 90)- Vcm sin 8c sin(wt- 150)
1 [ Cacos(wt-30)+Cbcos(wt+90)+Cccos(wt-150)]
= 13 +Sa sin(wt- 30) + Sb sin(wt + 90) + Sc sin(wt- 150)
Similarly,
v (t) = _!__[ Ca cos(wt- 150) + Cb cos(wt- 30) + Cc cos(wt + 90)]
ba 13 +Sa sin(wt- 150) + Sb sin(wt- 30) + Sc sin(wt + 90)
and
v (t) = _!__[ Ca cos(wt + 90) + Cb cos(wt- 150) + Cc cos(wt- 30)]
cb 13 +Sa sin(wt + 90) + Sb sin(wt- 150) + Sc sin(wt- 30)
The last three equations allow us to calcu- Initialization Problems and
late the reference voltages to be used by the Auxiliary StartUp Sources
gate pulse generator.
For the purpose of fast initialization, we
will again use the big bang approach de-
scribed in Chapter 8. Without stiff voltage
9-5
sources at PCC, however, the startup of the the fundamental switch currents be-
system may take a longer time to reach the come small.
steady state. This becomes more significant After another 10-30 milliseconds the
as the system in question gets weaker. harmonic components of the system
voltages and currents will, hopefully,
To bring the system to steady state as fast be properly initialized. The system
as possible, we will use yet another trick. will now be in steady state.
More specifically, we will connect a set of Additional comments are given below:
auxiliary startup sources (one for each
phase) to PCC. The magnitudes and phase The existence of a high impedance
angles of the auxiliary voltage sources for branch in parallel connection with
startup are obtained from steady-state cal- each startup source is to avoid possi-
culations by assuming a full load at PCC. ble numerical problems when the
Figure 9-5 shows the basic circuit utilizing switch is opened.
this technique. The principal features are as Since ordinary (type 0) EMTP
follows : switches can only be opened when the
switch current goes through zero, the
opening of the switches in three differ-
The switches connecting the auxiliary ent phases does not occur simultane-
sources are initially closed. This al- ously. This is especially true consider-
lows the use of the big bang method ing that the currents through the
to quickly establish a rated DC current startup sources are rich in harmonics.
at the rectifier terminal while allowing
The additional 10-30 milliseconds
the system to promptly reach a steady time period described above allows
state. transients caused by this kind of
These auxiliary sources are then re- asymmetrical switch opening to die
moved (by opening the switches) as down.
PCC
.. ---~
I~.)...
I -=
I
I
I
I
I
--- I
Figure 9-5 Auxiliary startup concept.
9-6
9.3 Fault Analysis Using Detailed 6-Pulse Model with

Sample AC System
We are now ready to study the transient re- to the rectifier station. Alternatively the
sponse of our sample HVDC system (see power balance equation can be expressed
Figure 7-6). Events to be simulated once as :
again include:
VE V2
a DC line-to-ground fault at the 50 Pd = cos(A.- 8) --:zcosA.
msec mark, followed by
2
a complete DC load rejection at 100 Qd- Be V2 = VE sin(A.- 8)- V2 sin A.
msec.
z z
The parameters associated with our sample
Most of the basic calculations have been system are repeated below:
done in Chapter 7. What is left is the deter-
mination of the startup sources. They can E= 230kV
be obtained from the simplified circuit dia-
gram shown in Figure 9-6. From the dia- Pd = 400MW
gram, the power balance equation at PCC Qd = 192.6MVar
can be written as:
C = 9.66pF
ZLA. = 1.1572 + j(120 n) 44.58 10- 3
= 16.86L86.1 og
From above, it can be found that V = 225.5
where Be ( =wC) is the susceptance (in kV and 8 = 7.43. Thus the auxiliary
mhos) of the compensating capacitor. Note startup voltage source, which lags the corre-
that E and V are RMS line-to-line AC volt- sponding Thevenin voltage source by 7.43,
ages, and that Pd and Qd are the total three will assume a peak magnitude of 184.12 kV
phase active and reactive powers delivered (phase to ground).
ZLA. pd

VL0
PCC
Qd
.
~'I
Figure 9-6 Basic circuit for power balance equation.
AC System Represented by showing implementation details are given in

Three-Phase Thevenin Model Figure 9-8 through Figure 9-12. They
should be self explanatory. The combined
As a first example, our sample AC system filter/system impedance plot is given in Fig-
is represented by its three-phase Thevenin ure 9-13 . Note that harmonic impedance of
equivalent. The complete input data file is the AC network (excluding filters) increases
listed in Figure 9-7. Miscellaneous diagrams linearly with harmonic frequency. This is
9-7
due to the use of a simple Thevenin equiva- switches are then allowed to be
lent for the AC system. Additional com- opened after the 12 msec mark. This
ments are provided below: is followed by the closing of the inte-
grator switch at the 25 msec mark to
The transformer turn ratio has been activate the constant DC current con-
changed to 225.50/205.45 . This is in trol.
contrast to the value of 230.00/205.45 At the 50 msec mark, the switch be-
used in Chapter 8 where perfect volt- tween node DCLH.r and ground is
age sources were directly connected to closed to simulate the DC fault.
the transformer input. The blocking of all firing pulses at t =
The three switches (BUS1a-Vaa.r, 100 msec concludes the last simulated
BUS1b-Vbb.r, BUS1c-Vcc.r) connect- event.
ing the auxiliary sources are closed at Figure 9-14 shows the results of the first 50
the beginning of the run. msec of the simulation. Results of the com-
With the integrator switch INI.r in- plete simulation are given in Figure 9-15 .
itially opened, ALPI.r initialized to As expected, our new voltage synchroniza-
0.100 (a = 18 ) and inverter back tion circuit is able to correctly initialize it-
EMF (BEMF) set to zero, the DC cur- self and provide a reasonably "balanced"
rent is quickly brought to 1.6 kA with set of voltages at all times . Note also that
the combination of fixed alpha and with the existence of the AC network im-
fixed voltage sources at the interface. pedance, the DC current overshoot after the
Full back EMF is not applied until 5.5 DC fault is somewhat reduced (refer to Fig-
msec. has elapsed. The startup ure 8-16 in Chapter 8 for comparisons).
9-8
BEGIN NEW DATA CASE

c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C EMTP Workbook #4 Example 9- 1 (Results Shown in Figure 9.14 & Figure 9.15)
C (Rectifier End AC System: 3-Phase Thevenin Model w/ AC Filters)
C (Big Bang w/ Aux . StartUp Source; DC Fault ; Load Rejection)
c
C <RECTIFIER> DC: 250 KV, 1.6 KA, ALPHA= 18 degrees .
C 350 mH Smoothing Reactor .
C AC: 225.5 KV L-L on Line Side; 205 . 45 KV L-L on Valve Side .
C Transformer w/ about 10% Leakage Reactance per Phase.
c
C ** This system has an ESCR (Effective Short Circuit Ratio) of
C about seven.
c
C <INVERTER> 242 KV DC Voltage w/ 350 mH Smoothing Reactor.
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C <---Icat
5 . E-5 150.E-3
100 3 1
c
TACS HYBRID
C ** ****0**** ****0**** ****0**** ****0**** ****0**** ****0* {{{TACS Section}}}
c
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c {Rectifier DC Current Order}
11IOR1.r 1.0 -1.
IOR . r +IOR1 . r 1.0
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c {Rectifier DC Current Regulator}
C <input>
C IDC . r DC current passed from EMTP
C IOR.r Reference current order level in PU
C <output>
C TALP . r Rectifier ALPHA in Second.
C <note>
C ISC . r Scaled Down Version of "IDC.r" w/
C 1 PU = 1.600 KA (1 / 1.600 = 0.625)
c -------+---------+---------+---------+---------+---------+---------+---------+
91IDC . r -1.
ISC.r +IDC . r 0.625
2FER . r +ISC.r -IOR.r 1.0
1.0 0.0 1.9527E-7
1 . 0 1 . 5676E-3 1 . 9527E-7
C -- K & G(S) -----+---------+---------+---------+---------+---------+---------+
FEG.r +FER . r 1.0
c
1FEC.r +FER . r 1.0
0.01
1.01.36054E-4
C -- Integrator Switch ------+---------+---------+----- ----+---------+---------+
88INI . r 57+FEC.r +FEG . r 1 .0
0.025
9999.
C -- Integrator ---+- ----- ---+---------+---------+---------+---------+---------+
C <-GAIN
1ALPI. r +INI. r 1. 0
25 . 132741
1 .0
9-9
C -- Initial Condition (Rectifier ALPHA= 18.0 deg)

77ALPI . r 0 . 100
C <-GAIN<---LO<---HI
ALPH . r +ALPI.r 1.0 . 0278 0.61
C Conversion ---+---------+---------+---------+---------+---------+---------+
C . . ALPH . r: rectifier ALPHA in p .u. (1 p . u . = 180 deg .)
C . . TALP.r: rectifier ALPHA in second
TALP . r +ALPH . r .00833
C {End of Rectifier DC Current Regulator}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {Rectifier Voltage Synchronization}
C <input>
C BUS1a, BUS1b, BUS1c Actual Phase Voltages Passed from EMTP;
c (Possibly Distorted & Unbalanced) .
C <output>
C VacY . r, VbaY.r, VcbY.r : Reference Voltages for Firing Pulses .
c (By Taking the Pos. Seq. Fundamental L-L Voltages)
c -------+---------+---------+---------+---------+---------+---------+---------+
c <-----FREQ <---Tstart<----Tstop
90BUS1a 0. 60 . -1.
90BUS1b 0. 60 . -1.
90BUS1c 0. 60 . -1.
c .. (The following 3 variables are obtained for comparison purposes only.)
88UacY . r BUSla - BUS1c
88UbaY . r BUS1b - BUS1a
88UcbY . r BUS1c - BUS1b
c
88wt . r 120 * PI * TIMEX
88coswt COS wt.r )
88sinwt SIN wt . r )
88coswt1 COS wt.r - RAD( 30)
88sinwt1 SIN wt.r - RAD( 30)
88coswt2 COS wt.r + RAD( 90)
88sinwt2 SIN wt . r + RAD( 90)
88coswt3 COS wt . r - RAD(150)
88sinwt3 SIN wt . r - RAD(150)
C -- Find FUNDAMENTAL components of ac voltages -+---------+---------+---------+
C -- (by integrating over 1/2 cycle)
88C1a . r BUS1a * coswt
88S1a . r BUS1a * sinwt
88C1b . r BUS1b * coswt
88S1b.r BUS1b * sinwt
88C1c.r BUS1c * coswt
88S1c.r BUS1c * sinwt
c <-GAIN
1C2a . r +C1a.r 240 . 0
1.
0. 1.
1S2a . r +S1a.r 240 . 0
1.
0. 1.
1C2b . r +C1b.r 240.0
1.
0. 1.
1S2b . r +S1b.r 240 . 0
1.
0. 1.
1C2c.r +C1c . r 240.0
1.
0. 1.
1S2c . r +S1c . r 240.0
9-10
1.
0. 1.
c <-DELY
88C3a.r 53+C2a . r .00833
88S3a.r 53+S2a . r . 00833
88C3b.r 53+C2b.r .00833
88S3b.r 53+S2b . r .00833
88C3c.r 53+C2c . r .00833
88S3c.r 53+S2c . r .00833
c
Ca.r +C2a.r -C3a.r
Sa.r +S2a.r -S3a.r
Cb.r +C2b.r -C3b.r
Sb.r +S2b . r -S3b.r
Cc.r +C2c.r -C3c . r
Sc.r +S2c.r -S3c.r
c
C -- Find POSITIVE Sequence Components of the Fundamental Line Voltages -------+
88VacYrC Ca . r * coswt1 + Cb.r * coswt2 + Cc.r * coswt3
88VacYrS Sa.r * sinwt1 + Sb.r * sinwt2 + Sc.r * sinwt3
88VacY.r (VacYrC + VacYrS) 1 SQRT(3)
c
88VbaYrC Ca . r * coswt3 + Cb . r * coswt1 + Cc.r * coswt2
88VbaYrS Sa . r * sinwt3 + Sb . r * sinwt1 + Sc . r * sinwt2
88VbaY . r (VbaYrC + VbaYrS) I SQRT(3)
c
88VcbYrC Ca . r * coswt2 + Cb.r * coswt3 + Cc . r * coswt1
88VcbYrS Sa . r * sinwt2 + Sb.r * sinwt3 + Sc . r * sinwt1
88VcbY . r (VcbYrC + VcbYrS) I SQRT(3)
c {End of Rectifier Voltage Synchronization}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c {Rectifier Gate Pulse Generator}
C <input>
C VacY.r, VbaY . r, VcbY . r :
C Tracked Voltages (Positive Sequence Fundamental L-L Voltages)
C (from Voltage Synchronization Block)
C TALP.r :
C Desired Delay Angle ALPHA from Current Regulator Output .
C <output>
C P1Y.r, P2Y . r, ... , P6Y.r :
C Basic Delayed Firing Pulses.
C VacY.r, VbaY . r, VcbY . r : Reference Voltages for Firing Pulses.
c -------+---------+---------+---------+---------+---------+---------+---------+
C .. Width of Firing Pulse (.0010 = 21.6 deg) in Seconds
C <--GAIN
PWIDTH +UNITY .0010
C -- Level Trigger (Device 52) --------+---------+---------+---------+---------+
c <-GAIN<-LEVL <--ilp
88FacY . r52+UNITY 1.0 0 .0 VacY.r
88FbaY.r52+UNITY 1.0 0.0 VbaY . r
88FcbY . r52+UNITY 1 .0 0.0 VcbY . r
C -- Delay by PWIDTH seconds +---------+---------+---------+--------******-----+
88DacY.r54+FacY . r PWIDTH
88DbaY . r54+FbaY.r PWIDTH
88DcbY.r54+FcbY.r PWIDTH
C -- Form Pulses --+---------+---------+---------+---------+---------+------ ---+
88PacY . r . NOT. DacY . r . AND . FacY . r
88NacY . r . NOT . FacY.r . AND . DacY . r
88PbaY . r . NOT . DbaY . r .AND. FbaY.r
88NbaY.r .NOT . FbaY.r .AND . DbaY.r
88PcbY . r . NOT . DcbY.r . AND . FcbY . r
88NcbY . r . NOT . FcbY.r .AND. DcbY . r
9-11
C -- Form Delayed Pulses ----+- ------ --+---------+---------+--------******-----+

88P1Y.r 54+PacY.r TALP . r
88P4Y.r 54+NacY.r TALP.r
88P3Y.r 54+PbaY.r TALP.r
88P6Y.r 54+NbaY . r TALP.r
88PSY . r 54+PcbY . r TALP.r
88P2Y . r 54+NcbY . r TALP . r
c {End of Rectifier Gate Pulse Generator }
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c {Rectifier Double Pulsing}
c
D1Y . r +P1Y.r +P2Y . r 1.0
D4Y . r +P4Y . r +PSY.r 1.0
D3Y . r +P3Y.r +P4Y.r 1.0
D6Y . r +P6Y.r +P1Y . r 1.0
DSY . r +PSY.r +P6Y.r 1.0
D2Y . r +P2Y . r +P3Y.r 1.0
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C { Rectifier Pulse Blocking}
c . . Block All Valves After 100 msec
c <-----AMPL <---Tstart<----Tstop
11BLCK . r 1. .100
c
88F1Y . r D1Y.r .AND. . NOT. BLCK . r
88F4Y . r D4Y . r .AND . . NOT . BLCK . r
88F3Y . r D3Y.r .AND . . NOT. BLCK . r
88F6Y . r D6Y . r . AND . . NOT . BLCK.r
88FSY .r DSY.r .AND . .NOT. BLCK . r
88F2Y.r D2Y . r .AND. .NOT. BLCK.r
c {End of Rectifier Pulse Blocking}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c {Output Specification}
c ----->----->----->----->----->----- >----->
33ALPH . rVacY . rVbaY.rVcbY . rUacY . rUbaY.rUcbY . r
C {End of Output Specification}
c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
C {{Branches}}
C {DC Line & Smoothing Reactors}
C <----R<----L
IDC . r DCLH . r 350 . 0
DCLH . rDCLH.i 5.0
DCLH . iBEMF 350 . 0
C -- Small Resistance Between Low Pole and Ground ---------+---------+---------+
c <----R
DCL . r l . E-3
c -------+---------+---------+---------+---------+---------+---------+---------+
C <----R<-- - - L {Rectifier Side AC Thevenin Impedance}
SCRa BUS1a 1.1572 44 . 58
SCRb BUSlb SCRa BUS1a
SCRc BUS1c SCRa BUS1a
C {End of Rectifier Side AC Thevenin Impedance}
c -------+---------+---------+---------+---------+---------+--------- +---------+
C {Rectifier Side AC Filters}
c -- AC Filters: 5th Tuned, 7th Tuned, & 11th Damped
c <----R<----L<----C
BUSla 1. 27 107 . 42 2 . 62
BUS1a 0 . 90 54.81 2 . 62
BUS1a BUS1am 4 . 42
9-12
BUS1am 70 . 92
BUS1am 13 . 16
c
BUS1b 1. 27 107.42 2.62
BUS1b 0 . 90 54 . 81 2.62
BUS1b BUS1bm 4.42
BUS1bm 70.92
BUS1bm 13 . 16
c
BUS1c 1. 27 107.42 2.62
BUS1c 0.90 54 . 81 2 . 62
BUS1c BUS1cm 4 . 42
BUS1cm 70 . 92
BUS1cm 13.16
c {End of Rectifier Side AC Filters}
c -------+---------+---------+---------+---------+---------+---------+---------+
C -- High Resistance Across Start-Up Sources
C <----R
Vaa.r 1 . E8
Vbb.r Vaa.r
Vcc.r Vaa . r
c -------+- --------+---------+---------+---------+---------+---------+---------+
c {Rectifier Side 6-Pulse Y-Bridge Valve Ckt . }
C .. dV/dt Snubber <----R <----C
DCH . r aY . r 2000 . 0 0 . 06
DCH . r bY . r DCH . r aY.r
DCH.r cY . r DCH . r aY . r
aY . r DCL . r DCH.r aY . r
bY . r DCL . r DCH.r aY . r
cY.r DCL.r DCH.r aY . r
c .. Small Valve Series R <----R
DCH . r KlY . r 1.E-3
DCH.r K3Y . r DCH .r KlY . r
DCH.r K5Y . r DCH .r K1Y.r
A1Y . r aY . r DCH.r K1Y . r
A3Y.r bY.r DCH.r K1Y.r
A5Y.r cY . r DCH . r K1Y . r
aY.r K4Y.r DCH . r KlY . r
bY . r K6Y . r DCH . r KlY.r
cY . r K2Y . r DCH.r K1Y . r
A4Y.r DCL.r DCH . r KlY.r
A6Y . r DCL . r DCH . r K1Y.r
A2Y . r DCL . r DCH . r K1Y . r
C {End of Rectifier Side 6-Pulse Y-Bridge Valve Ckt.}
c -------+-- -------+---------+---------+---------+---------+---------+---------+
C {Rectifier Side Y-Bridge Interface Transformer Ckt . }
C Transformer
C No Saturation No Magnetizing Branch .. 5% Leakage Ind . on Both Sides
C <-same <-NAME
TRANSFORMER TaY.r
9999
C BUS-->BUS--> <----L<-TURN
1VPaY . r 15 . 1 225.50
2VSaY . rVNaY . r 12 . 0 205.45
TRANSFORMER TaY.r TbY . r
1VPbY . r 15 . 1 225.50
2VSbY.rVNbY . r 12 . 0 205 . 45
TRANSFORMER TaY . r TcY.r
1VPcY.r 15 . 1 225 . 50
2VScY . rVNcY . r 12.0 205 . 45
C <----L
9-13
VNaY.rMY.r l . E-3
VNbY.rMY.r VNaY . rMY . r
VNcY.rMY . rVNaY . rMY.r
VSaY.raY.r VNaY.rMY.r
VSbY.rbY.r VNaY . rMY.r
VScY.rcY.r VNaY . rMY.r
C {End of Rectifier Side Y-Bridge Interface Transformer Ckt.}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Switches}}
C -- Switches for Rectifier Side Start-Up Sources
c <---Tclose<----Topen I
BUSla Vaa.r -1 . 0 . 012 1
BUSlb Vbb.r -1 . 0 . 012 1
BUSlc Vcc.r -1. 0.012 1
BUSla VPaY . r MEASURING 1
BUSlb VPbY . r MEASURING 1
BUSlc VPcY. r MEASURING 1
C -- Rectifier Side DC Current Sensor Switch ----+---------+---------+---------+
DCH. r !DC. r MEASURING 1
DCLH.r 0 . 050 9999.
c -- Y Bridge Valves --------+---------+---------+---------+---------+---------+
c GRID-> E
llAlY . r KlY.r FlY . r 1
11A2Y . r K2Y.r F2Y. r 1
11A3Y.r K3Y.r F3Y. r 1
11A4Y.r K4Y . r F4Y.r 1
11A5Y.r K5Y . r F5Y . r 1
11A6Y . r K6Y.r F6Y.r 1
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Sources}}
C -- Rectifier Side Thevenin Sources
14SCRa 187.794 60.0 67 . 43 -1.
14SCRb 187.794 60 . 0 -52 . 57 -1.
14SCRc 187.794 60.0 -172 . 57 -1.
C -- Rectifier Side Start-Up Sources --+---------+---------+---------+---------+
14Vaa . r 184 . 12 60 . 0 60.00 -1.
14Vbb . r 184.12 60 . 0 - 60 . 00 -1.
14Vcc . r 184.12 60.0 -180.00 -1.
C -- Inverter Side Back EMF -+---- -----+---------+---------+---------+---------+
C <------MAG <--TO(sec) <---Tstart<----Tstop
12BEMF 242.0 . 00001 0. 0055
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c {{Nodal Voltage o/p Request}}
DCH.r BUSla BUSlb BUSlc
BLANK {{End of Nodal Voltage ojp Request}}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Plot Request}}
c ** ****0**** ****0**** ****0**** ****0**** ****0**** ****0**** ****0**** ****0
END LAST DATA CASE
BLANK
Figure 9-7 Input data file for system represented by a three-phase Thevenin model.
9-14
+--------------111
(Type 12 Source)
(Switch)
Switch : Current
Passed to T ACS
K1Y.r A1Y.r K4Y.r A4Y .r
(Voltage Passed
to TACS)
Figure 9-8 Basic EMTP model of the system described in Section 9.3.
9-15
AC Network (Simple Thevenin Model)
-------------------
I
I
I
I
I
I
I
Figure 9-9 EMTP model of the three-phase Thevenin equivalent of the AC system.
Aux.
Start-Up
p---
1
I
Sources
BUS1a BUS1b
--
BUS1c
I
I
I I
I I
I I
I I
I I
I I
I I
Figure 9-10 EMTP model of the auxiliary startup sources.

from NETWORK Gate
Voltage Pulse Double Pulse
Synchronization Generator Pulsing Blocking
~~
IDC .r
Figure 9-11 TAGS blocks of the systems described in Section 9.3.
9-16
(actual voltages from NETWORK)

Voltage Synchronization
o-ob
o-o-0
0 0 I/)
001/'l
C')Ol~
C') Ol ~ VacYrS = Sa.r sin ro 11 + Sb.r sin ro 12 + Sc.r sin ro 13 I + I
I
3 3 3
+ I
VacYrC = Ca.r cos ro 11 + Cb.r cos ro t2 + Cc.r cos ro 13
1
3 a3
VacY.r = - - (VacYrC + VacYrS) (JJ (JJ (JJ
c c c .[3 8 8 8
"(i) v; u;
II II II
II II II VbaYrS = Sa.r sin ro t3 + Sb.r sin ro t1 + Sc.r sin ro t2
8
~
8
~
8
VbaYrC - Ca.r cos ro !3 + Cb.r cos ro !1 + Cc.r cos ro !2 8 ~ ~
c c c 1 (JJ (JJ (JJ
u; u; u; VbaY.r = - - (VbaYrC + VbaYrS) 8 8 8

fi
VcbYrC = Ca.rcosrot2 + Cb.rcosrot3 + Cc.rcosrot1
VcbYrS = Sa.r sin ro 12 + Sb.r sin ro t3 + Sc.r sin ro t1
1
VcbY.r = (VcbYrC + VcbYrS)
fi
VacY.r VbaY.r VcbY.r
( to Gate Pulse Generator)
Figure 9-12 TAGS model of the voltage synchronization block.
9-17
zs (Q)
700
600
500
400
300
200
100
0 h
0 6 12 18 24 30 36 42 48
(a)
Zt(Q)
700
600
500
400
300
200
100
0
[)\ J' h
0 6 12 18 24 30 36 42 48
(b)
Figure 9-13 Harmonic impedance: (a) AC system only (Thevenin model);

(b) total impedance (system + filter) .
9-18
0
0
0. 10 .0 20 .0 30 .0 "'10.0 50 .0
MiII iSecond
TiMe
~ - TACS -ALPH .r
0
0
00
10 .0 20 .0 30 .0 "'10 .0 50 .0
MiII iSecond
tr>
0 TiMe
-
~
0
- DCH .r -IDC .r
Figure 9-14 Initializing HVDC system with auxiliary startup source and back EMF
(a) ~ (1 p.u. = 180);
(b) DC current;
9-19
-
00
-...{----. 1- - ....___;_. -
I . I If
1('- ..,----- l
I I.
en
v.
0
I
. ,{ l .
I A . 11
0
0
0 .p\
' l I
'
. l
~
1\ II
. ~
I "10 .0 I
l I k
~
1D.O 20 3o .ov I \150 .C
'Mi I l iSecor~
en \
~. }.
TJ~e
9 I. ' '
I
-00
'
- ~ - --'\-----I - J\.---- I Jr - j.
I
r
- BUSie -VPeY .r
BUSib -VPbY .r
- - BUSic -VPcY .r
...-:
......
0
0
0
0. 20 .0 30 .0 "10 .0 50 .0
...... Mi I l iSecond
0
Til'le
...-:
";"' / - BUS1e -Vee .r
- BUSib -Vbb.r
-
':"'
- - BUSic -Vee .r
0
0
lii3
0
0
0. 10.0 20 .0 30 .0 "10 .0 50 .0
Mi I l iSecond
- DCH .r
(d) currents in startup switches;
(e) DC voltage;
9-20
C>
C>
0.
~
0
C>
~
- BUS1e
C> - BUS1b
8 - - BUSic
"f
I \ I '- /"' I '\ I

......
.
C>
C> I \ .I I \ .
I
\ I \ . \
~
/
I
\'
.I 1\
"I
."\
.\
C>
I . \ !\
C>
0. . 56 .0
\ I
. \_ I
~
C>
C>
\'\ ).
~ r\ ,
\ I I I \
I
....! \,../
C>
8
'!""
/ \ /"'.
C>
C> I \ / \
~ r
,(
I
/ \ . I
I \
. 30 . ~. I \ s6 .o
\
.I
\ .
\I .I
).
I A
I
\ . I I \ . \ I
\
.
\ \ \ / \.._:L T
../ '../ -VecY .r /
C> - TACS -VbeY .r
8 - - TACS -VcbY .r
"f
(f) actual AC phase voltages;
(g) actual AC line-to-line voltages;
(h) tracked AC line voltages.
9-21
co
0
0
0
0. 30.0 60 .0 90 .0 120.0 150 .0
MiII iSecond
TiMe
~ - lACS -ALPH .r
0
'
Figure 9-15 Complete simulation results of the system described in Figure 9-7
(a) ~ (1 p.u. = 180 );
9-22
0
.....
120 .0 150.0
MiII iSecond
TiMe
0
N
'
I\
I \ t\-
0 1 ~ \
I""" \ ~.
rf-' i
N
/ -t-c r~r--~ ! rl\r' '(~

0
I
I
l
'I
l
)
!
~ ' l
I
I I
i
I \
o o.p,\ ~, 3o1 ~ ~o . ~ )91 .o 120.0 150 .0
MiII iSecond
. i .
1
[I i I
\ l T M9 I
w1 ~-r-- '-'i-..Jr.r ~- .. ~~~ IJ\ r I
\ r"if'" ,rv
\ I I'
\ jlf\ ,_
\I - BUS1e VPeY .r
- BUS1b VPbY .r
- BUSic -VPcY .r
(b) DC current;
9-23
~
8
(\J
0
0
0. 30.0 120 .0 150.0
MiII iSecond
8
(\J
0
- DCH.r
0
II
0
0
N
II o~
I I ,J ~
I 1/ I
0
o 16o.o
0
I I !I
0
~
0
~I
o \ I I /\
f I I~ j
0 J IV II ~
0
2 0
\1 I

(d) DC voltage;
(e) actual AC phase voltages;
9-24
C)
C)
~
'I
~
C)
"
I If I
.\
.
I j'J.
' \
I I, I
C)
N
. . i .
1
!I I.
!I I I
0
C) .
0 . .
I I I I aid ! I I I '
II I I I \I
~ \ .
8N
. ~ tl '
\ I . , \ I\ f \ I\/.,
J
II.
J ~f .' .J I J
\ 1\.
C)
v I
0
C)
0
C)
T
I r.
'\
J\ i' 1\ {
.\
I\ !\
. \ \ .
.II .\, I \j ~ 1 I .I \
I\ ''.
I i \
I \1 .
' \
I I .
I. \
I ,
.
C)
0
v . v .
~
"I f . \'I
I
~
I } . I 'I
I . A
' I
'I
I ,\
I ~ I II
. ~ I 1\ 'I
I
. l ,I
.I . I
'
~ I I. I 0~~ d,lI I
!70.0
y ~I I I 1.1
0
C)
~ l . 1 I
~ I 1\ ,
I 1\. j \ I~ f .I 1\ rl i I~
I I I.j
\I \j \1 \ ! \ I\ j I I~
~~Y .r,
0
" -v Y"'
-VcbY .r
\.
8
""f

(f) actual AC line-to-line voltages;
(g) tracked AC line voltages.
9-25
AC System Represented ing the AC filter, are given in Figure 9-18.

by Three-Phase Full Model Note that the harmonic impedance of the
AC system clearly shows a series of reso-
The Thevenin equivalent of the AC network nance and anti-resonance points. Results of
used in the previous section is now replaced this run are provided in Figure 9-19. There
by its three-phase full model described in appear to be no significant differences from
Figure 9-16. The resultant input data file is the results of the previous case. The slight
shown in Figure 9-17. Since the TACS por- decrease in rectifier alpha at rated operat-
tion of the codes are identical to the previ- ing condition is caused by the small error in
ous case, they are omitted. The characteris- initialization. If desired, this can be cor-
tic harmonic impedance of the AC network, rected by raising the tap positions of the
as well as the combined impedance includ- converter transformers .
..----o BUS1 a
BUS1b
AC Network (Full Model) BUS1c
p------------------ The venin

(Type 14 Sources) Impedances
(Transmission Line) (Transmission Line)
~------------------------------~--
Figure 9-16 EMTP Model of the three-phase detailed AC system.
9-26
BEGIN NEW DATA CASE

c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C EMTP Workbook #4 Example 9-2 (Results Shown in Figure 9 . 19)
C (Rectifier End AC System: 3-Phase Full Model w/ AC Filters)
C (Big Bang w/ Aux . StartUp Source; DC Fault; Load Rejection)
c
c <RECTIFIER> DC: 250 KV, 1.6 KA , ALPHA= 18 degrees.
c AC: 225.5 KV L-L on Line Side; 205 . 45 KV L-L on Valve Side .
c Transformer w/ about 10% Leakage Reactance per Phase .
c
c about seven .
c
c <INVERTER> 242 KV DC Voltage w/ 350 mH Smoothing Reactor.
c
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C <---!cat
5 . E-5 150 . E-3
100 3 1
c
TACS HYBRID
c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
C ** ****0**** ****0**** ****0**** ****0**** ****0**** ****0* {{{TACS Section}}} '
(TACS Section Not Shown ; Identical to Figure 9 . 7)

c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
C {{Branches}}
C {DC Line & Smoothing Reactors}
c <----R<----L
IDC . r DCLH . r 350 . 0
DCLH.rDCLH . i 5 .0
DCLH. iBEMF 350 . 0
C -- Small Resistance Between Low Pole and Ground ---------+---------+---------+
c <----R
DCL . r 1 . E-3
c -------+---------+---------+---------+---------+---------+---------+---------+
C <----R<----L {Rectifier Side AC Lines}
BUS12aBUS13a 0 . 70 .1 6
BUS12bBUS13bBUS12aBUS13a
BUS12cBUS13cBUS12aBUS13a
BUS13a 251.2 219 . 1
BUS13b BUS13a
BUS13c BUS13a
c <----R<----------L
51THEVa BUS7a .1164 23.71
52THEVb BUS7b . 0423 41.25
53THEVc BUS7c
51BUS3a BUS1a 28.06
52BUS3b BUS1b 61 . 74
53BUS3c BUS1c
c <---R'<---L ' <---C'<----d
-1BUS7a BUS1a .3167 3 . 222.00787 144.4
-2BUS7b BUS1b .0243 .9238 .0126 144 . 4
-3BUS7c BUS1c
-1BUS1a BUS12a . 3167 3 . 222 . 00787 24.14
-2BUS1b BUS12b . 0243 . 9238 .0126 24.14
-3BUS1c BUS12c
9-27
C {End o f Rectifier Side AC Lines}

c - - - - - --+---------+---- ---- -+---------+---------+-- -------+---------+----- ----+
C {Rectifier Side AC Filters}
C -- AC Filters: 5th Tuned, 7th Tuned , & 11th Damped
C <----R<----L<----C
BUSla 1.27 107.42 2 . 62
BUS1a 0.90 54.81 2.62
BUS1a BUS1am 4.42
BUS1am 70.92
BUS1am 13.16
c
BUS1b 1. 27 107.42 2 . 62
BUS1b 0.90 54.81 2.62
BUS1b BUS1bm 4 . 42
BUS1bm 70. 9 2
BUS1bm 13 . 16
c
BUS1c 1. 27 107.42 2 . 62
BUS1c 0.90 54.81 2 . 62
BUS1c BUS1cm 4.42
BUS1cm 70.92
BUS1cm 13.16
C {End of Rectifier Side AC Filters}
c ---- ---+---------+---------+---------+---------+---------+-- -------+---------+
C -- High Resistance Ac r oss Start- Up Sources
C <--- -R
Vaa . r 1.E8
Vbb . r Vaa.r
Vcc . r Vaa . r
c -------+-------- -+---------+---------+---------+---- -----+---------+--------- +
c {Rectifier Si de 6-Pul se Y-Bri d ge Valve Ckt . }
C .. dV/dt Snubber <-- --R <----c
DCH.r aY . r 2000.0 0.06
DCH . r bY . r DCH . r aY . r
DCH . r cY.r DCH . r aY . r
aY.r DCL . r DCH.r aY . r
bY.r DCL . r DCH . r aY . r
cY.r DCL . r DCH.r aY.r
c .. Small Valve Series R <----R
DCH.r K1Y.r 1.E-3
DCH.r K3Y . r DCH . r K1Y . r
DCH . r KSY.r DCH.r K1Y.r
A1Y . r aY . r DCH . r K1Y . r
A3Y.r bY.r DCH . r K1Y . r
ASY . r cY . r DCH.r K1Y . r
aY.r K4Y.r DCH.r K1Y.r
bY . r K6Y.r DCH.r K1Y.r
cY . r K2Y . r DCH . r K1Y . r
A4Y.r DCL.r DCH.r KlY . r
A6Y.r DCL . r DCH . r K1 Y. r
A2Y.r DCL .r DCH.r K1Y.r
c {End of Rectifier Side 6-Pulse Y-Bridge Valve Ckt.}
c -------+---------+---- ---- -+- - - ------+---------+---------+---- -----+----- - --- +
C {Rectifier Side Y- Bridge Interface Tr ansfo r mer Ckt.}
C Transformer
C No Saturation No Magnetizing Branch . . 5% Leakage Ind. on Both Sides
C <-same <-NAME
TRANSFORMER TaY.r
9999
C BUS-->BUS--> <----L<- TURN
1VPaY . r 15 . 1 225 . 50
2VSaY.rVNaY.r 12 . 0 205.45
9-28
TRANSFORMER TaY . r TbY . r

lVPbY . r 15.1 225.50
2VSbY . rVNbY . r 12 . 0 205 . 45
TRANSFORMER TaY.r TcY.r
lVPcY.r 15 . 1 225 . 50
2VScY. rVNcY. r 12. 0 205. 45
C <----L
VNaY . rMY. r 1 . E-3
VNbY . rMY . r VNaY.rMY.r
VNcY . rMY . r VNaY . rMY . r
VSaY . raY.r VNaY.rMY.r
VSbY.rbY.r VNaY.rMY . r
VScY.rcY . r VNaY . rMY.r
C {End of Rectifier Side Y-Bridge Interface Transformer Ckt . }
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Switches}}
C -- Switches for Rectifier Side Start-Up Sources
C <---Tclose<----Topen I
BUSla Vaa. r -1. 0 . 012 1
BUSlb Vbb . r -1. 0 . 012 1
BUSlc Vcc.r -1. 0.012 1
BUSla VPaY . r MEASURING 1
BUSlb VPbY . r MEASURING 1
BUSlc VPcY . r MEASURING 1
DCH . r IDC. r MEASURING 1
DCLH.r 0 . 050 9999 .
c -- Y Bridge Valves --------+------ - --+--- ------+------ ---+---------+--------- +
c GRID-> E
llAlY . r KlY.r FlY . r 1
11A2Y . r K2Y . r F2Y . r 1
11A3Y . r K3Y . r F3Y . r 1
11A4Y . r K4Y . r F4Y.r 1
11A5Y . r K5Y . r F5Y . r 1
11A6Y. r K6Y . r F6Y. r 1
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Sources}}
C -- Rectifier Side Thevenin Sources
14THEVa 187 . 794 60.0 70.88 -1 .
14THEVb 187.794 60.0 -49.12 -1.
14THEVc 187.794 60 . 0 - 169 . 12 -1.
c
14BUS3a 187.794 60 . 0 70.88 -1.
14BUS3b 187 . 794 60.0 -49.12 -1.
14BUS3c 187 . 794 60.0 -169.12 -1 .
C -- Rectifier Side Start-Up Sources --+---------+---------+---------+---------+
14Vaa . r 184.12 60.0 60 . 00 -1 .
14Vbb . r 184 . 12 60 . 0 - 60 . 00 -1 .
14Vcc . r 184 . 12 60.0 -180.00 -1 .
C -- Inverter Side Back EMF -+---------+--------- +---------+---------+---------+
12BEMF 242 . 0 . 00001 0 . 0055
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Nodal Voltage o j p Request}}
DCH . r BUSla BUSlb BUSlc
9-29
BLANK {{End of Nodal Voltage o/p Request}}

c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c {{Plot Request}}
C {{{End of NETWORK Section} }}
c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
c ** ****0**** ****0**** ****0**** ****0**** ****0**** ****0**** ****0**** ****0
END LAST DATA CASE
BLANK
Figure 9-17 Input data file for circuit using Figure 9-16.
9-30
zs (Q)
700
600
500
400
300
200
100
h
6 12 18 24 30 36 42 48
(a)
zt (n)
700
600
500
400
300
200
100
0 h
0 6 12 18 24 30 36 42 48
(b)
Figure 9-18 Harmonic impedance (a) AC system only (Full model) .

(b) Total impedance (system + filter).
9-31
20 .0 30.0 -40.0 50 .0
Mi 11 iSecond
TiMe
'
-
~
'
J
I
BUS1e -Vee .r
BUS1b -Vbb .r
BUS1c -Vcc .r
1.1>
0
0
0
0. 30 .0 60 .0 90.0 120 .0 150.0
Mi 11 iSecond
TiMe
0
N
30 .0 60 .0 90 .0 120 .0 150 .0
MiII iSecond
TiMe
Figure 9-19 Complete simulation results of the system described in Figure 9-17
(a) currents in startup switch;
(b) a (1 p.u. = 180 );
(c) DC current;
9-32
~ ~------~------~~~~~~~~--~------~
0. 30 .0 120 .0 150.0
MiII iSecond
11'1
0
0
~
0
0
0
0.
0
0
~
'\ 1\ r. I I\ f\
I.
,I
I\ (\
I 1j ~ " {
" .1
I I f '1 I I! I
0
I . I Ii ~ 0
I
1,.1 /\ I Ij ~ u
, I I ~ ,
0 0
~
~
0 0
"I r ~
0
~ .~ A
0 0
I J I II A
0
I I'I ~ I II
0
II
I I fI
I o I
0 f50.0
I I \II
lI
0
0
~
0
I II
\I .

(d) DC voltage;
(f) tracked AC line voltages.
9-33
9.4 Normal Startup of HVDC Systems

One of the more basic methods to bring the in real systems. This does not in any
system to steady state is to approximate the way hinder our appreciation of the na-
normal startup procedure. If the system is ture of problems associated with nor-
stiff this can be done in less than 200 milli- mal startup procedure.
seconds with little problem. If the system is Startup without
weak, however, this normal startup process
may take many seconds. DC Current Ramp
For normal startup some basic control loops We'll first simulate the normal system
are needed. On the rectifier there should be startup without a DC current ramp. The
a current controller or 0! should be fixed . NETWORK portion of the system model is
This results in the full DC voltage being ap- given in Figure 9-20. Conspicuously absent
plied at the rectifier for startup and held are the auxiliary startup circuits. A diagram
until the system comes to steady state. showing the implementation details of the
DC current regulator, DC current order, as
The inverter needs a voltage control loop. It well as a programmed amin are given in
should also have an initial 0! of about Figure 9-21. Figure 9-22 describes the over-
90- 100 with firing starting at the pres- all TACS function blocks of the system
ence of some DC voltage at the inverter. model. An abbreviated version of the input
This will support current at a low voltage data file is shown in Figure 9-23, with the
level with a large error in the inverter volt- simulation results given in Figure 9-24.
age controller. This error will quickly drive Some remarks may serve to explain fea-
the inverter voltage to rated value through tures of this case in more detail:
the voltage controller action.
In the remaining sections of this chapter, The previously fixed low limit of the
we will simulate the normal startup process rectifier alpha in the DC current regu-
using our sample HVDC system which the lator is now replaced by a named vari-
able ALO.r that obtains the desired
readers should by now be very familiar. The settings from the two type 11 sources
previous section demonstrates that there is AL01.r and AL02.r.
little difference between the response of a
full model of the AC system and the simple Similarly the rectifier DC current or-
Thevenin equivalent to changes in the DC der IOR.r is synthesized from two type
system. To keep matters simple, we will use 11 sources IORl.r and IOR2 .r. The
the input data file already given in Figure DC current order is set to 0.15 p.u.
9-7 and make as little change as possible. (i.e. 0.24 kA) at the beginning of the
This implies the following: run; this would allow the initial tran-
sients to settle down before a further
Although the DC line-to-ground fault increase in DC current is warranted.
and the DC load rejection will not be The integrator switch INI.r is initially
staged, their associated circuit compo- closed and remains so throughout the
nents (e.g. the switch between node whole simulation. The initial rectifier
DCLH.r and ground) are still retained. 0! (ALPI.r) is set to 30 (= 0.1667) ; so
They are simply not activated in the is the starting amin (ALO .r) . Note that
time span covering the entire program the actual alpha to maintain a 0.15
run. p. u. DC current at full DC voltage is
The inverter terminal is still repre- slightly higher than 30 .
sented by a back EMF (type 12 With a zero inverter back EMF
source). (BEMF) and a forced a min of 30at
No attempt is made to mimic exactly time t = 0, the DC current quickly
the actual startup process performed approaches 15% of the rated value.
9-34
+-------------ill
(Type 12 Source)
DCLH .I
DCLH .r
(Switch)
IDC .r
Switch : Current
Passed to T ACS
(from TACS)
K3Y.r
Figure 9-20 EMTP Network model of the examples used in Section 9-4.
9-35
~
'0 )::.-,
I r--
w
<>- --o'@
~(D
3tp
- . 1\)
~
\)
::J-..
0'~ ~
~
::o
::J-(1)
~
(!) -
~.g
DC Current Regulator ~
IUIDC! r
~
m-
3(1) Current Scaling ~
-o3
-(!) _1_ ISC.r 360 Hz 2nd Order Filter
(!)::J ~ 1.6 +
9:?1
(I) -
()0
c:::J
.
Z-Biock 1 + 1.9527x10 s
1 2
~ 1 + 1.5676x1 0 3 s + 1.9527x1 01 s 2
FER.r ... I
. K = 1 1 FEG.r
(1)0
Z-Biock Integrator
~....
Q:;
DC Current Order S-Biock Switch
+)I 5
s(i)
tJ
::!!o I 1111
.
10R1.r., ....---
~
.01 s
1 + 1.36054x1 0 s
-4 ~~~
+
G)
!!!.
CD
<.Q
C:() 1.0 IOR.r S-Biock
FEC.r \J
(DC: 1111 IOR2.r.,
~
(!)(!)
'::J
I
TAGS Source
.. '---
INI.r
c
iii
CD
1\J,..... Z-Biock G)
~ ...... CD
::J
(!) (amax = 1 r o.61 CD
<.Q Integrator
c:
ill
ALPHA min ~
...... 25.132741 IALPH.~ 1.008331 ..::!.
~
0
I 1111 AL01~-
ALO.r
~ s
ALPI.r .... I
(1 p.u. = 1So) I I
K=1
I
TALP.r
r(a in second) ......
tJ 1.0 ... 7Z-Biock Z-Biock
0
()
c:
I 1111 AL02.!_
-T
TAGS Source
.. '---
Z-Biock
l S-Biock
~
(!)
::J
......
0
......
~
~
Q)
::J
Q
from NETWORK
Gate
Voltage Pulse Double Pulse
Synchronization Generator Pulsing Blocking
to
NETWORK
Figure 9-22 TAGS function blocks for the examples used in Figure 9-23.
Full BEMF is applied at the 2.1 msec ditions to be reached, despite the re-
mark. At about the same time the ac- quest of a step change, due to the 25 %
tion of the DC current regulator natu- overshoot on the DC current (see DC
rally "pulls" the alpha out of the amin current plot in Figure 9-24).
mode. The preprogrammed amin
(ALO.r) is dropped to so (= 0.0278) There is also a slight overvoltage in
at t = 20 msec. The DC current is the AC voltage waveforms at the be-
well regulated at 0.15 p.u. ginning of the run when the converter
At time t = 50 msec, a step change is taking little power from the system.
(from 15% to 100%) of the DC cur- This is due to the surplus of reactive
rent order IOR.r is requested. This power supplied by the filter circuit. It
challenges the current regulator to follows that for weak systems one may
promptly reduce a which almost im- need to switch out some or all of the
mediately hits the new amin It re- filter/capacitor banks until the DC
quires 180 msec. for steady-state con- power reaches rated value.
9-37
BEGIN NEW DATA CASE

c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C EMTP Workbook #4 Example 9-3 (Results Shown in Figure 9 . 24)
C (Rectifier End AC System : 3-Phase Thevenin Model w/ AC Filters)
c (StartUp: Step Change in DC Current Order at 50 msec Time Mark)
c
c <RECTIFIER> DC: 250 KV, 1 . 6 KA, ALPHA= 18 degrees.
c AC : 225 . 5 KV L-L on Line Side ; 205 . 45 KV L-L on Valve Side .
c Transformer w/ about 10% Leakage Reactance per Phase .
c
c about seven.
c
c <INVERTER> 242 KV DC Voltage w/ 350 mH Smoothing Reactor.
c
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C <---!cat
S.E-5 200.E-3
100 3 1
c
TACS HYBRID
c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
C ** ****0**** ****0**** ****0**** ****0**** ****0**** ****0* {{{TACS Section}}}
c
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
11IOR1.r 0 . 15 -1. 0 . 050
11IOR2. r 1.00 0.050
IOR.r +IOR1.r +IOR2.r 1.0
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {Rectifier ALPHAmin}
11AL01. r 0 . 1667 -1. 0. 020
11AL02 . r 0.0278 0.020
ALO . r +AL01 . r +AL02 . r 1.0
C -- Initial Value of Rectifier ALPHA 30 degrees (Forced)
77ALPI . r 0 . 1667
C {End of Rectifier ALPHAmin}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {Rectifier DC Current Regulator}
C <input>
C IDC . r DC current passed from EMTP
C IOR . r Reference current order level in PU
C <output>
C TALP.r Rectifier ALPHA in Second.
c <note>
C ISC.r Scaled Down Version of "IDC.r" w/
c 1 PU = 1 . 600 KA (1/1.600 = 0 . 625)
c -------+---------+---------+---------+---------+---------+---------+---------+
91IDC.r -1 .
ISC . r +IDC . r 0.625
2FER . r +ISC . r -IOR . r 1.0
1 .0 0.0 1.9527E-7
1 . 0 1 . 5676E-3 1.9527E-7
C -- K & G(S) -----+---------+---------+---------+---------+---------+---------+
FEG.r +FER.r 1.0
c
9-38
1FECor +FER or 1.0

0001
1 o01o36054E-4
C -- Integrator Switch ------+---------+---------+---------+---------+---------+
C --(Always Closed)
88INior 57+FECor +FEGor 1 o0
OoOOO
99990
C -- Integrator ---+---------+---------+---------+---------+---------+---------+
C <-GAIN
1ALPi or +INi or 1 o0
25 0132741
1.0
C <-GAIN <-HIGHlow-->
ALPHor +ALPior 1.0 Oo61ALO or
C Conversion ---+---------+---------+---------+---------+---------+---------+
C o o ALPH or: rectifier ALPHA in pou o (1 PoU o = 180 dego)
C 0 0 TALP or: rectifier ALPHA in second
TALP or +ALPHor o00833
C {End of Rectifier DC Current Regulator}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {Rectifier Voltage Synchronization}
(Omitted Lines Are Similar to Those Given in Figure 9o7)

c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C { Rectifier Pulse Blocking}
C 0 0 (Not Activated)
C <-----AMPL <---Tstart<----Tstop
11BLCKor 1o 99990
c
(Omitted Lines Are Similar to Those Given in Figure 9o7)

c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Switches}}
C -- Rectifier Line Side AC Current Measurement
BUS1a VPaYor MEASURING 1
BUS1b VPbY or MEASURING 1
BUS1c VPcYor MEASURING 1
DCHo r IDC Or MEASURING 1
C 0 0 (Not Activated)
DCLHor 99990 99990
C -- Y Bridge Valves --------+---------+---------+---------+---------+---------+
C GRID-> E
11A1Yor K1Y or F1Yor 1
11A2Y 0r K2Y 0r F2Y or 1
11A5Y or K5Y or F5Y or 1
11A6Y or K6Yor F6Yor 1
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
9-39
c {{Sources}}
c -- Rectifier Side Thevenin Sources
14SCRa 187 . 794 60 . 0 67 . 43 -1.
14SCRb 187 . 794 60.0 -52.57 -1.
14SCRc 187.794 60 . 0 -172 . 57 -1.
12BEMF 242. 0 . 00001 0 . 0021
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Nodal Voltage o/p Request}}
DCH . r BEMF BUS1a BUS1b BUS1c
BLANK {{End of Nodal Voltage o;p Request}}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Plot Request}}
c **+****1****+****2****+****3****+****4****+****5****+****6****+****7****+****8
c ** ****0**** ****0**** ****0**** ****0**** ****0**** ****0**** ****0**** ****0
END LAST DATA CASE
BLANK
Figure 9-23 Input data file for the first example in Section 9-4.
9-40
"10.0 80 .0 120 .0 160 .0 200 .0

Mi I l iSecond
TiMe
co
lACS -ALPH .r
9 TACS -ALO .r
I.L)
"10.0 80 .0 120 .0 160.0 200 .0

Mi I l iSecond
TiMe
- lACS -ISC .r
--- lACS -IOR.r
Figure 9-24 Simulation results of the example described in Figure 9-23:
(a) actual a and amin;
(b) per unit actual DC current and DC current order;
9-41
,...., I ~~
....- ~I! , I .,......
- I
,._
0
I
I
0 'I
0
0. 2ilo.
.
,._
0
I
--.r:
'
JL
0
0
0. ""10.0 80 .0 120.0 160 .0 200.0
MiI I iSecond
0
0
0
Ti Me
~

(d) rectifier DC voltage and inverter back EMF;
9-42
!\
I\ /\ AI I ;\ AI\ 1\ {\f\ (\ J\ !\ AI\ /\ (\ 1\ 1\ (\ ;'. I\ '\ li I\ .\ A1\ \ f ~ .~.
~ I I I II ' I ~ I I 11 I II ' 11 I ' I I I I / i / '1 1! l I If ~
l'a I ' ~ II ' ' ~ ' I I ' I ' I ' ~
I ! j ' J J ' i '
,I . I II , I !I I I I ~ I f\ , I\ I , I I
I ' } ' I
.I I 'I I 'I I I, I I I ~ ,
~ '
I, I I . I ~ I I , I ,I I , I I , . I II , I III I I , I I 'I I I I II I
0 _l I .I I I I ' I I ' I ' 'I '' 'I '
o 0. II II , I ~I ~ , I ~ I ,I I, 0~ 6 , ,II ! I ' lud .l I I ' I Ill 'P...! I I 'II I I JAo 0

I 1 ~~ I I I I II I
'1.
' 1- .UJ I I~ ' ~v

! ~ I I 'I I t . ~I ! I :1 ! 1 I I 11 t>edo fll ' I I I
~ 1 I 1 I IT l'le t ~ ~ \ ~ J
~ ' 1 ~ ' ~
'I ' I ' I li ' I .
r. ~ ' }. ' A
f I I! I /' , I I~ . I . f I . f \ I 1 . 1 I I I I 1 1 1
i
o J v I/ \.1 I1 \j \I VV
t I :) VI1 l 1V\I V\I V I \)JJJ;
V V ~I ~J V ~fc~/ ~~r :~/ ~ ~I
;g - lACS UcbY .r
(i A/"\/$\ I I(\ A/ I.f\ (\I\ !\ (\ I\ .riA I\!\{\ I\ i~ AI\ !\{II\!\(\ '\A I\(' {\ f\
j . { , I II , ~ ! I! . I If , I C . lj I If , If I I If . ~~
'i ~ !1 I 1 .~ j ! .\ } ,I ~ . ~ f
0
,
~'
1
1
jl iI
'
11
'
iI
'I
i I I!1 i' I 11 ~I I IIf\ 11 'II 1' 1 I!1 i' I 11 !I
1
'.I
i 1 II !11 1!1 i I
' I '
!1
I
1 1
0.~'/ ~I ! I !I ~b I !I f il' I I 0~0 i !I i I !LJo iI i I 1/ ~1G .~ i I ! I' aoo .0

0
I I I I
L" I ~I ! I ! II ' I ' ' I' ' I ~ ' I \1 i ' 'I ' ~'M ,Ill ~0 \d II i I v
t I ~ l J.T l'l9j l f { l '
0
0
I
I ll ! I i ! I\ , I I~ j I li I '\ f 1 Ii j I / . I .\ f I r~ li j I \
0
N
1
v\/\,1 v \1\,1 V1J \/vII\; VIJ $ \ JV" ~ V\ 1/ \llL\J~~s 1 \Jev ~d ~ V\
\ 1
1 1
0
- lACS VbeY.r
8 - - lACS VcbY.r
;

Startup with DC Current Ramp rated value with power and current coming
up with the ramp in a controlled manner.
The example presented in the first part of As a last example, the DC current order
Section 9.4 clearly indicates that there will block used in the previous example is now
be some problems if the system is allowed replaced by the new circuit (see Figure
to come up too fast. The sample system 9-25). This circuit simulates a linear DC
used has an effective short circuit ratio of current ramp (from 15% to 100% current in
about seven, which is still a relatively strong 60 msec.) starting at time t = 50 ms. An
system. For weak systems, the problems are abbreviated version of the input data file is
much more severe, and a gradual ramp on shown in Figure 9-26. The simulation re-
the DC current order must be used. This sults, given in Figure 9-27, show much im-
will allow the DC voltage to come near proved response over the previous case.
9-43
'0
I F::!! ~
:::::::
-t...
-t... -o<g
~(i)
3<p
-.I\)
~
<J
:::SOl
0'~ ~
....
""'o
s:-(1)
1"1:1
3
(!) -. DC Current Regulator
~.g Current Scaling
~
m-
3(!) u-IDC! _1_ ISC.r
~
360 Hz 2nd Order Filter
-o3 ~ 1.6 +
-(!)
(!):::s 7 2 FER.r ~f K_ l FEG.r
-.......-
QD>
oo
(/)
...... Z-Biock
~
1 + 1.9527x10. s
3
1 + 1.5676x10. s + 1.9527x1o s
7 2
1
Z-Biock Integrator
c:::::S DC Current Order S-Biock Switch
(/)0
~ .... s
QS:
s (!) I .
1111 10R1 .r... ....---
~
.01 s
1 + 1.36054x10 s
4 ~~,_ G)
!!l.
CJ 1241 IOR2 . r~ 1.0 CD
:!!o I FEC.r -u
<Q
C::()
(i)c::
<0(!)
':::S
~ I 1111
TACS Source
IOR3.r...
... _
Z-Biock
loR.r
INI.r
S-Biock c:
'{jj
CD
G)
CD
!\)....,. (amax = 109.8) :::J
!J>--.. 0.61 CD
(!) Integrator ill
ALPHA min
<Q
s. 11 11 AL01~ ........--- 25.132741 ALPI.r ...I K =1
lALPH.r r 1
TALP
0
..:::!-
.....
Q)
......
0 ALO.r
~ s
....
(1 p.u. = 18oo) L I
-;. .00833
l
.r
I (a in second)
-="' 1.0
11 11 AL02~ S-Biock ... ;z-Biock Z-Biock
0
0
TACS Source
. '----
Z-Biock
I ...
()
c::
~
(!)
:::s
......
0
g.
-="'
Q)
:::s
Q
BEGIN NEW DATA CASE

c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C EMTP Workbook #4 Example 9-4 (Results Shown in Figure 9.27)
C (Rectifier End AC System: 3-Phase Thevenin Model w/ AC Filters)
C (StartUp: 60 msec DC Current Ramp at 50 msec Time Mark)
c
c <RECTIFIER> DC : 250 KV, 1 . 6 KA, ALPHA= 18 degrees .
c AC : 225 . 5 KV L-L on Line Side; 205.45 KV L-L on Valve Side.
c Transformer w/ about 10% Leakage Reactance per Phase.
c
c about seven.
c
C <INVERTER> 242 KV DC Voltage w/ 350 mH Smoothing Reactor.
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c <---I cat
S . E-5 200.E-3
100 3 1
c
TACS HYBRID
C ** ****0**** ****0**** ****0**** ****0**** ****0**** ****0* {{{TACS Section}}}
c
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
c <-----MAGN<---T(sec) <-GAIN <---Tstart<----Tstop
11IOR1 . r 0 . 15 -1.
24IOR2.r 0 . 85 0 . 060 0.050 0.11 0
11IOR3.r 0 . 85 0 . 110
IOR . r +IOR1 . r +IOR2.r +IOR3 .r 1.0
c ==+====1====+====2====+====3====+====4 ====+====5====+====6====+====7====+====8
C {Rectifier ALPHAmin}
11AL01. r 0. 1667 -1. 0 . 020
11AL02.r 0 . 0278 0.020
ALO . r +AL01.r +AL02 . r 1.0
C -- Initial Value of Rectifier ALPHA 30 degrees (Forced)
77ALPI . r 0 . 1667
C {End of Rectifier ALPHAmin}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7 ====+====8
C {Rectifier DC Current Regulator}
(Omitted Lines Are Similar to Those Given in Figure 9.23) :

12BEMF 242.0 . 00001 0 . 0021
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Nodal Voltage o / p Request}}
DCH.r BEMF BUS1a BUS1b BUS1c
BLANK {{End of Nodal Voltage o / p Request}}
c ==+====1====+====2====+====3====+====4====+====5====+====6====+====7====+====8
C {{Plot Request}}
END LAST DATA CASE
BLANK
Figure 9-26 Input data file of the second example discussed in Section 9-4.
9-45
"'lO .O 80 .0 120 .0 160 .0 200 .0

MiII iSecond
Til'le
-r:
0
'
00
0 TACS -ALPH .r
' TACS -ALO.r
00
0
"'lO .O 80 .0 120.0 160 .0 200 .0

Mi II iSecond
-r:
0 Til'le
'
00
0
'
- - lACS - ISC .r
--- lACS -IOR .r
Figure 9-27 Simulation results of the example described in Figure 9-26:

(a) actual a and amin;
(b) per unit actual DC current and DC current order;
9-46
r r
-
"'
I
<D
0
I
I
0 l
~0 .0
0
0.
<D
9
l
I
"'
";"' I
J~
-
00
0
0
~
~ ~------~------~------~------~--------
0. "10 .0 80 .0 120 .0 160 .0 200.0
Mi II iSecond
0
0 Tir1e
~
'

(d) rectifier DC voltage and inverter back EMF;
9-47
8
'I""
II
''
II
' .
~ ~~~~~~~~~~~+.+~~~~~~~~~
0.
8
T

9-48
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0
P E 465 o.
Electric Power Research Institute (EPRI)

Associate Members of the EMTP Research with EPRI
Electricite de France
American Electric Power Service Corporation
Members of the EMTP Development Coordination Group

Bonneville Power Administration
Canadian Electrical Association-Utility Members
Hydro Quebec
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Associate Members of the EMTP Development Coordination Group

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El 4651 V4

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EPRI EL-4651, Volume 4

<---- ~~ 1J ~~I~VN ~~w

ELECTRIC POWER RESEARCH INSTITUTE

TOPICS Transients Substations

AUDIENCE Power system planners I Electrical engineers

Electromagnetic 'D'ansients Program (EMTP)

BACKGROUND Studies of electromagnetic transients were traditionally performed with spe-

OBJECTIVES To provide utilities with tutorial materials on electromagnetic transients; to

EPRI EL-4651s Vols. 2-4

For further information on EPRI research programs, call

Final Report, June 1989

THE UNIVERSITY OF WISCONSIN AT MADISON

Electric Power Research Institute

EPRI Project Manager

2 Variable Load Problem..................... 2-1

3 Static Var System . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

3.4 Simple TACS Model in Three Phase System 3-7

8 Detailed 6-Pulse Model 8-1

9 Full HVDC System Model . . . . . . . . . . . . . . . . . . 9-1

Figure 1-2 Typical diagram of a control system

Sources. These are time dependent Monitor power systems component

Figure 1-4 Solution sequence

1.2 Interface Between Networks and TACS

1.3 Basic TACS Components

t-domain function y(t) by:

Rule Book Section 14.6.1. The numerator

Figure 1-6 Data format for TACS transfer function

Sources Type 23: Pulse Source

Figure 1-7 Data format for TACS source

i(t) The relationship between outputs and inputs

Intrinsic functions accept only one

output of source Type 93 Maximum of 20 levels of nesting.

Figure 1-9 Data format for TACS FORTRAN expression

Devices CODE 52 Level triggered switch

Figure 1-10 Data format for TACS devices

Output Printed or Plotted Output of TACS Variables

The TACS variables to be printed out are

name name name name name name name

Figure 1-11 TACS output request

Interface connections between type 59 EMTP defined TACS variables have

1.4 The Basic Deck

deck meaning: file The BLANK line ending TACS inputs

BEGIN NEW DATA FILE

Figure 1-12 Data file structure for TAGS HYBRID case.

BEGIN NEW DATA CASE

The TACS STAND ALONE line tells

BEGIN NEW DATA CASE

Variable Load Problem

2.1 Single Phase Variable Load Model

t= 0 __. Load Representation By Network

Figure 2-1 Circuit for transient analysis.

Figure 2-2 EMTP Network diagram

w L = 1.0 Q Vmax = lmax"' Z = 110 = 3.1623 Volts

BEGIN NEW DATA CASE

C II ------Plot starting time

A general rule of thumb for the size of the L 2.653

Load Representation By TACS

Figure 2-7 TAGS and Network implementation of R-L circuit

BEGIN NEW DATA CASE

C OUTPUT <-----A---<----B----<----C---- <-T-START-<-T-STOP--

Figure 2-10 Comparison of Figures 2-4 to 2-9

2.2 TACS Model of a Power Meter

Application Example the average power in the single phase load

<---- 1J I~VN ~~w

Bus13A (CONS! Bus13B(CONS1 Bus13C(CONS1