Analysis of Asymmetrical Cascaded 7 Level and 9 Level
Multilevel Inverter
SUBHRAJEET DAS, M. Tech (PECD, EE)
Abstract- This paper proposes comparison between
Asymmetrical Cascaded 7 level and 9 level Multilevel
Inverter (MLI) using multicarrier based Level shift
Pulse Width Modulation Technique (LSPWM). This
control scheme is applied to 7 level and 9 level
Asymmetrical Cascaded Multilevel Inverter (CMLI).
Different topologies of multilevel inverter have been
reported in the literature, but this work mainly
focuses on the asymmetrical cascaded multilevel
inverter circuit with reduced number of input DC
sources. Here PWM switching techniques for
Asymmetrical cascaded multilevel inverters is Phase
disposition (IPD) .THD and motor output are
analyzed in FFT window. The results are observed
by MATLAB/SIMULINK software.
keywords- Asymmetrical CMLI, LSPWM, THD,
MOSFET, IGBT,IPD,POD,APOD .
INTRODUCTION
Now a days renewable energy resources have been the
focus for researchers and different families of power
inverters have been designed to make the integration of
these types of systems into the distribution grid a
current reality. Besides, in the transmission lines, high-
power electronic systems are needed to assure the
power distribution and the energy quality. Therefore,
power electronic inverters have the responsibility to
carry out these tasks with high efficiency. The increase
of the world energy demand has entailed the appearance
of new power converter topologies and new
semiconductor technology capable to drive all needed
power. A continuous race to develop higher-voltage and
higher-current power semiconductors to drive high-
power systems still goes on. However, at present there is
tough competition between the use of classic power
converter topologies using high-voltage semiconductors
and new converter topologies using medium-voltage
devices. Power inverters are an amazing technology for
industrial practice powered by electric drive systems.
They are potentially helpful for a wide range of
applications: transport (train traction, ship propulsion,
and automotive applications), energy conversion,
manufacturing, mining, and petrochemical. Many of
these processes have been continuously raising their
demand of power to reach higher production rates, cost
reduction (large-scale economy), and efficiency.
Although the IGBT has features of high power and high
voltage, incapable of being operated at high frequency
and the complicated design of gate driver are the major
disadvantages of the IGBT. By contrast, the MOSFET is
more appropriate to be operated at high frequency, but
power rating is not as good as the IGBT. In view of these,
many different multilevel topologies are designed to
solve the problem with using low rating components in
high power application The power electronics research
community and industry have reacted to this demand in
two different ways: developing semiconductor
technology to reach higher nominal voltages and
currents (currently 8 kV and 6 kA) and by developing
new converter topologies, with traditional
semiconductor technology, known as multilevel
inverters.
Multilevel inverter has become popular to fulfill power
requirement due to advantage of high power quality
waveforms, low electromagnetic compatibility. Inverter
is a device that converts electrical power from DC to AC
form using electronic circuits. Generally simple inverter
gives 2 or 3 level output voltage .Multilevel inverter
gives 3 or more output voltage levels. It produces a
stepped output voltage with reduced harmonic
distortion when compared to a 2 level inverter.
Multilevel inverter are basically 3 types
i. Diode clamped inverter
ii. Flying capacitor inverter
iii. Cascaded inverter
The most commonly efficient inverter is cascaded
multilevel inverter. It provides higher output voltage and
power levels. It is one of the methods used for drive
application which meet the requirements such as high
power rating with reduced THD and switching losses.
The Asymmetric Multilevel Inverter increases the
number of levels in the output and reduces the number
of input DC sources required. IGBT is used as
semiconductor switch for designing the inverter circuit.
It has the high power rating, less conduction loss and
less switching loss. DC sources are basically two types
which are Asymmetrical DC source and symmetrical DC
source. Asymmetric DC source has unequal magnitude of
voltage whereas symmetric DC source has equal
magnitude of voltage. Asymmetrical cascaded MLI has
less number of DC source voltage and switches as
compared to symmetrical cascaded MLI. The advantage
of an asymmetric cascaded has an increased number of
voltage levels for a given module counts. The
comparison between asymmetrical cascaded 9 level MLI
and 7 level MLI were done and based on the results
obtained the most effective MLI is adopted that gives the
reduced THD output and better performance.

ASYMMETRICAL CASCADED MLI

In Asymmetric Cascaded Multilevel Inverter, DC sources
of unequal magnitude of voltage are used. Here 7 level
and 9 level Asymmetric Cascaded MLI is analyzed. In
case of 7 level Asymmetric Cascaded MLI two unequal
magnitude DC sources and 8 power switches are used. In
case of 9 level Asymmetric Cascaded MLI three DC
sources are used having 2 same and third different and
12 power switches are used. The basic modal circuit for
7 level and 9 level Asymmetric Cascaded MLI are shown
in fig 1 and 2 respectively.
Asymmetrical seven level inverter
Asymmetrical nine level inverter
OPERATION OF CASCADED 9 LEVEL TOPOLOGY
The Asymmetrical cascaded 9 level multilevel inverter
has three DC sources and twelve power switches
magnitude of DC sources are 100V, 200V and 100V
respectively. The sources are connected to three H
Bridge units which are cascaded in single phase. In an
individual H-bridge the output voltage is +VDC, 0 or
VDC. Hence the desired output voltage for 9 level
Asymmetric CMLI are +4VDC, +3VDC, +2VDC, +VDC, 0, -
VDC, -2VDC, -3VDC, -4VDC. To get the desired output
voltage the power switches are turned ON and OFF. By
making the proper combination of switches we get the
desired output voltage. To get maximum output voltage
+4V; the switches S1, S10, S9, S6, S5 AND S2 are ON and
remaining switches are OFF at this time. For +3V; the
switches S1, S10, S12, S6, S5and S2 are ON and
remaining are OFF. Similarly all voltage levels can be
analyzed by see the table given below Table .
 Another application where the pulse number may be low
is in converters which are better described as amplifiers,
whose upper output fundamental frequency may be
relatively high. These high power switch-mode
amplifiers find application in active power filtering, test
signal generation, servo and audio amplifiers. These low
pulse numbers place the greatest demands on effective
modulation to reduce the distortion as much as possible.

PWM TECHNIQUES
The fundamental methods of pulse-width modulation
(PWM) are divided into the traditional voltage-source
and current-regulated methods. Voltage-source methods
more easily lend themselves to digital signal processor
(DSP) or programmable logic device (PLD)
implementation. However, current controls typically
Switching pattern for asymmetrical cascaded nine depend on event scheduling and are therefore analog
level inverter implementations which can only be reliably operated up
to a certain power level. In discrete current-regulated
MODULATION TECHINQUE methods the harmonic performance is not as good as
that of voltage-source methods. A sample PWM method
Mainly the power electronic converters are operated in
is described below.
the switched mode. Which means the switches within
the converter are always in either one of the two states -
turned off (no current flows), or turned on (saturated
with only a small voltage drop across the switch). Any
operation in the linear region, other than for the
unavoidable transition from conducting to non-
conducting, incurs an undesirable loss of efficiency and
an unbearable rise in switch power dissipation. To
control the flow of power in the converter, the switches
alternate between these two states (i.e. on and off). This
happens rapidly enough that the inductors and
capacitors at the input and output nodes of the converter
average or filter the switched signal. The switched
component is attenuated and the desired DC or low
frequency AC component is retained. This process is
called Pulse Width Modulation (PWM), since the desired PWM switching technique
average value is controlled by modulating the width of
the pulses. Inverter output voltage, VAO= Vdc/2, When Vcontrol > Vtri,
For maximum attenuation of the switching component, and VAO= -Vdc/2, When Vcontrol < Vtri.
the switch frequency fC should be high- many times the
frequency of the desired fundamental AC component f 1 PWM frequency is the same as the frequency of Vtri .
seen at the input or output terminals. In large Amplitude is controlled by the peak value of Vtri and
converters, this is in conflict with an upper limit placed Fundamental frequency is controlled by the frequency of
on switch frequency by switching losses. For GTO Vcontrol .
converters, the ratio of switch frequency to fundamental
frequency fC/f1 (= N, the pulse number) may be as low as
unity, which is known as square wave switching.
The modulation index is defined as the ration of control
signal to the reference signal. It is also defined as the
ratio of switching frequency to the reference signal
frequency.

The frequency modulation ratio Mf is defined as the ratio

of switching frequency to the PWM inverter to the
fundamental frequency .

Ma = (1)
Mf = .(2)
Then the output voltage can be written as
VO = Ma * Vin ..(3)

There are three alternative PWM strategies with

different phase relationships for the level-shifted Voltage waveform of seven level asymmetrical
multicarrier modulation: inverter
a. In-phase disposition (IPD), where all carrier
waveforms are in phase. Here upper H-Bridge voltage is taken as 100 volts and
b. Phase opposition disposition (POD), where all middle bridge voltage is taken as 200 volts and lower
carrier waveforms above zero reference are in bridge is taken as 100 volts.
phase and are 1800 out of phase with those below Modulation index is 0.95 .
zero.
c. Alternate phase disposition (APOD), where every
carrier waveform is in out of phase with its
neighbor carrier by 1800.

SIMULATION RESULTS AND ANALYSIS

Here upper H-Bridge voltage is taken as 100 volts and
lower bridge voltage is taken as 200 volts.
Modulation index is 0.95 .

Simulation diagram of nine level asymmetrical

inverter
Simulation diagram of seven level asymmetrical
inverter
 quality. The simulation result shows that the
asymmetrical inverter has less number of switches and
THD content is less than symmetrical inverter. But
switching strategy of asymmetrical inverter is more
complex than symmetrical inverter. Also it is found that
with the increase of modulation index the content of
THD decreases and with increase in level of inverter
voltage wave-form improves and THD decreases.

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