Cypress Intro To BLE System Design

PSoC 4 BLE Customer Training Workshop:
Introduction to BLE
System Design
BLE = Bluetooth Low Energy
PSoC = Programmable System-on-Chip
Easily Design Low-Power, Wireless Systems for the

Internet of Things With the Most Integrated One-Chip BLE Solution
001-93534 Owner: GUL Introduction to BLE System Design Customer Training Workshop
Rev 0-PRERELEASE 1/9/15
Workshop Objectives
By the end of this workshop, you will
Learn how to create low-power, sensor-based systems for the Internet of Things (IoT)
Understand the BLE architecture
Understand the PSoC 4 BLE solution
Learn how to use PSoC 4 BLE and its development environment to implement:
BLE connections with PSoC 4 BLE
One-chip, sensor-based, system designs with BLE connectivity
One-chip, CapSense touch-sensing user interface designs with BLE connectivity
001-93534 Owner: GUL Introduction to BLE System Design Customer Training Workshop 2
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Workshop Agenda
Time Page Topic
0:15 (15 min) 4 Set Up and Install Software
0:30 (15 min) 5 BLE and PSoC Terms
1:15 (45 min) 9 PSoC 4 BLE Introduction
1:30 (15 min) 22 Lab #1: Blinking LED
2:15 (45 min) 24 BLE Architecture and Solution Overview
3:00 (45 min) 33 Lab #2: Setting Up a BLE Connection
3:15 (15 min) 35 Session Break
3:45 (30 min) 36 PSoC Programmable Technologies
4:15 (30 min) 45 Lab #3: Sensor-Based System Design with BLE Connectivity
4:30 (15 min) 47 User Interface
5:00 (30 min) 52 Lab #4: CapSense Design with BLE Connectivity
5:30 (30min) 54 PSoC 4 BLE Portfolio and Example Applications
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Setup and Install Software
Required Software
Copy the contents of the provided USB drive onto your laptop and launch the following software installers.
Follow the on-screen instructions to complete the installation. This will take approximately 15 minutes.
Software Tool Version File Name

PSoC Creator1 3.1 PSoCCreatorSetup_3.1_es100_12-26-14
CySmart2 1.0 (or newer) CySmartSetup.exe
BLE Pioneer Kit 1.0 (or newer) CY8CKIT042BLEKITSetupOnlyPackage_RevSA.exe
BLE Lab Exercises Rev ** n/a (Unzip BLEWorkshop.zip to your laptop)
Note
You can alternatively use the bundled installer, which includes three of the above software tools (PSoC Creator,
CySmart and BLE Pioneer Kit). This bundled installer file is named CY8CKIT042BLEKITSetup_RevSA.exe
Required Hardware:
BLE Pioneer Kit2 (CY8CKIT-042-BLE)
Raise your hand if you need help!
1 PSoC Integrated Design Environment (IDE)

2A GUI-based software tool that installs on your PC to test and debug BLE functionality
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Bluetooth Terms
Bluetooth Classic
A legacy standard for personal area networks made popular by audio streaming to cell phone headsets
Operated in the 2.4-GHz ISM1 Band with GFSK2 modulation and supports up to 3-Mbps data rate
Bluetooth Low Energy (BLE)

A standard for short-range, low-power wireless applications that communicate state or control information
Operates in the 2.4-GHz ISM1 Band with GFSK2 modulation and supports a 1-Mbps data rate
Not backward-compatible with Bluetooth Classic
Bluetooth 4.0
An upgraded Bluetooth Classic specification that adds BLE
Bluetooth Smart Ready
Bluetooth 4.1 Product
An enhanced Bluetooth 4.0 specification, adopted in Dec. 2013
Includes improved security, lower power and higher throughput3 Bluetooth Classic
Product
Bluetooth Smart
Audio
A brand for Bluetooth 4.0/4.1 products that support only BLE Streaming
Bluetooth Smart Ready

A brand for Bluetooth 4.0/4.1 products that support Bluetooth Smart
both Bluetooth Classic and BLE Sensor Product
Data
1 An Industrial, Scientific, Medical (ISM) RF frequency band that is license-free worldwide
2 Gaussian frequency shift keying
3 272 Kbps (15% higher vs. 4.0) with protocol overhead
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Terms You Will Hear Today
Analog Front End (AFE)
An analog signal conditioning circuit that uses opamps, filters and comparators to interface to an ADC
Balun
An electrical device that converts a differential RF signal to a single-ended signal or vice-versa
Antenna Matching Network (AMN)

An RLC circuit network that provides Balun functionality, antenna impedance matching and low-pass filtering
BLE Protocol Stack (BLE Stack)

Firmware implementing the Bluetooth 4.0/4.1 specification to provide BLE communication
BLE Profile (Profile)

A Bluetooth specification that guarantees interoperability between devices that use the same Profile
For example, keyboards use the HID Profile and Heart Rate Monitors (HRMs) use the HRM Profile
CySmart
A GUI-based software tool that installs on your PC to test and debug BLE functionality
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PSoC Terms
75+ Components
PSoC Creator available
PSoC 3, PSoC 4 and PSoC 5LP Integrated Design Environment (IDE)
Software that installs on your PC that allows:
Concurrent hardware and firmware design of PSoC systems, or
Hardware design followed by export to popular IDEs
Components
Free embedded ICs represented by an icon in PSoC Creator software
Used to integrate multiple ICs and system interfaces into one PSoC
Dragged and dropped as icons to design systems in PSoC Creator
Inherently connected to the MCU via the main system bus
The BLE Component creates Bluetooth Smart products in minutes BLE Component creates Programmable Analog
Bluetooth Smart products Components create sensor
The Programmable Analog Components are used for sensors interfaces
Component Component Configuration Tool
Component Configuration Tools
Simple graphical user interfaces in PSoC Creator
Embedded in each Component
Used to customize Component parameters
Accessed by right-clicking a Component BLE Component Icon
PSoC 4 BLE
A PSoC 4 IC with an integrated BLE radio
BLE Component Configuration Tool
Includes a royalty-free BLE Protocol Stack compatible with Bluetooth 4.1
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PSoC Terms
CapSense
Cypresss touch-sensing user interface solution
The industrys No. 1 solution in sales by 4x over No. 2
Programmable Analog Block

A hardware block that is programmed using PSoC Components to implement custom AFEs
Includes opamps, comparators and ADCs
Programmable Digital Block

A hardware block that is programmed using PSoC Components to implement custom digital peripherals
Includes TCPWMs1, Universal Digital Blocks and serial communication blocks (SCBs2)
Universal Digital Block (UDB)

PSoC Programmable Digital Block containing:
Two programmable logic devices (PLDs)
One programmable data path with an arithmetic logic unit
Status and control registers
Configured with PSoC Creator using: 1) PSoC Creator Components, 2) the graphical state machine editor, or
3) Verilog code
Continuous Time Block (CTBm)

Programmable Analog Block used to implement opamps, PGAs, comparators, etc.
1 Timer, counter, pulse-width modulator; configurable as 16-bit timer, counter, pulse-width modulator blocks
2 Serial communication block configurable as I2C/SPI/UART
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Introduction to BLE System Design
PSoC 4 BLE INTRODUCTION
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The Internet of Things Revolution
The Internet of Things (IoT) is now a commercial reality
The IoT is how everyday physical objects are connected to the Internet
e.g., a thermostat is adjusted by a cell phone
Six billion everyday physical objects will be connected to the IoT by 20201
Sensor-based systems connect the real world to the IoT

Sensor-based IoT systems operate interactively and autonomously, typically using wireless communication
Sensor-based IoT systems must be low power to run on batteries
BLE is the de facto low-power wireless standard for the IoT

1.2 billion Bluetooth Smart Ready products were sold in 20132, including Galaxy, iPad and Thinkpad
BLE is designed for low-power, sensor-based products like wearable electronics, medical devices and home
automation devices
IoT products require sensor-based BLE systems

Fitness Monitor by Microsoft Heart Rate Monitor by Mio Kevo Deadbolt by Kwikset
1 Cisco CEO John Chambers speaking at the 2014 Mobile World Congress trade show
2 ABI Research
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Design Problem 1
Designing systems with multiple ICs increases BOM cost
Sensor-based systems require sensor AFEs, digital control logic, a BLE radio and an MCU
Sophisticated user interfaces require additional touch or display ICs
Example BOM Cost for a Multi-Chip IoT Solution1
BLE MCU $1.92
Balun for BLE Radio $0.33
AFE Opamps $0.24
AFE Instrumentation Amplifier $1.02
CapSense Touch Controller $0.47
Total Solution Cost $3.98
1 Digikey 1ku cost as of June 2014. See Appendix slide #68 for details on part numbers for each IC in this example BOM.
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Design Problem 2
Achieving low system power is difficult
Wireless systems often operate from coin cell or small LiPo1 batteries
Optimizing system power requires careful use of low-power modes
Battery Drain Is a Big Problem in Wearable Using Low-Power Modes and Configuring the BLE Connection Interval
Electronics Can Reduce System Power
D 20
18.7
16.5 18C
Average current Stage Power Mode Activity
16
consumption for
A Active Oscillator Startup
14 connection interval of
B Sleep Oscillator Startup
Current (mA)
12 1 sec = 18.9 A
C Sleep RF Transmit
10
D Sleep RF Receive
8
E Active BLE Stack
A 6 E Processing
4.8 B
4 F Deep-Sleep WCO On
2
F
~
~
0
0 1,000 2,000 3,000 4,000 999,000 1,000,000
Time (s)
Active Sleep Active Deep-Sleep
Consumers demand IoT products with long Designing a BLE system with optimized sleep and active power modes to reduce system
battery life power consumption is difficult
1A rechargeable battery of lithium-ion polymer technology, nominally rated at 3.3 V and packaged in small, soft pouches
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Design Problem 3
Designing wireless sensor-based systems for the IoT is difficult
RF board design is complicated
Designing wireless sensor-based systems requires engineers to work with design tools from multiple IC vendors
Wireless specs require complex firmware development (e.g., the BLE Protocol Stack)
Typical AMN Bluetooth Specification 4.1
L1
2 nH
C1 C2
18 pF 1 pF
L2 L3 To Antenna (50 )
Ant 2 or
Ant 1 1 nH 3 nH SMA (50 )
C3 L4
C5
1 pF
18 pF 2 nH
C4
1 pF
Requires 9 external components 7 volumes, 2,684 pages
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PSoC 4 BLE One-Chip Solution
PSoC 4 BLE solves these problems by:
1. Integrating programmable AFEs and digital logic, CapSense and an ARM Cortex-M0 CPU with a BLE radio
2. Delivering five flexible, easy-to-use, low-power modes
3a. Simplifying RF board design by integrating the Balun
3b. Enabling complete system design in PSoC Creator
3c. Simplifying the BLE Protocol Stack and BLE Profile configuration with the easy-to-use BLE Component
AFE ICs + BLE MCU + BLE Stack Complete BLE System Design in PSoC Creator PSoC 4 BLE One-Chip Solution
Instrumentation Dual-Channel
Amplifier Opamp
VREF_IN
SARADC
Opamp1 Opamp2 Opamp4
VREF
Electrode1
BLE MCU BLE 4.1 Spec

VREF Opamp3
Electrode2 VREF2 Accelerometer CapSense BLE
VREF_IN2
Integrate AFEs, digital logic, And complete your system design easily using To create your PSoC 4 BLE
CapSense and an ARM Cortex-M0 PSoC Creator and PSoC Components one-chip solution for the IoT
with a BLE radio
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1. PSoC 4 BLE Integrates Programmable
AFEs, Digital Logic and CapSense
Applications Block Diagram
Sports and fitness monitors, wearable electronics, medical devices,
home automation solutions, game controllers, sensor-based PSoC 4 BLE
low-power systems for IoT MCU Subsystem Programmable Analog I/O Subsystem
Blocks
GPIO x8
Features Opamp SAR1

CORTEX-M0 x4 ADC
32-bit MCU subsystem
48 MHz
48-MHz ARM Cortex-M0 CPU
Programmable Interconnect and Routing

CMP
Advanced High-Performance Bus (AHB)

CSD
Up to 256KB flash and 32KB SRAM x2 GPIO x8
Programmable Analog Blocks

BLE Subsystem Programmable Digital
Four opamps, configurable as PGAs, comparators, filters, etc. Blocks
One 12-bit, 1-Msps SAR1 ADC
CapSense with SmartSense Auto-tuning UDB2 x4 GPIO x8
One Cypress Capacitive Sigma-Delta (CSD) controller with Flash
touchpad capability (256KB)
Programmable Digital Blocks TCPWM3 x4
Four Universal Digital Blocks (UDB2s): custom digital peripherals

SRAM
Four configurable TCPWM3 blocks: 16-bit timer, counter or PWM (32KB) SCB4 x2
GPIO x8
Two configurable serial communication blocks (SCB4s):
I2C master or slave, SPI master or slave, or UART
Segment LCD Drive
Packages
Serial Wire Debug
56-pin QFN (7 x 7 x 0.6 mm), 68-ball CSP (3.9 x 3.5 x 0.55 mm) GPIO x4
Bluetooth Smart connectivity with Bluetooth 4.1
2.4-GHz BLE radio with integrated Balun
Collateral Availability
Preliminary Datasheet: PSoC 4 BLE Datasheet Sampling: Now
Production: 128KB Now, 256KB Q2 2015
1 Successive approximation register 3 Timer, counter, pulse-width modulator; configurable as 16-bit timer, counter, pulse-width modulator blocks
2 Universal Digital Block 4 Serial communication block configurable as I2C/SPI/UART
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2. PSoC 4 BLE Enables Low-Power
Wireless Systems
Digital Analog Clock
Current Code Wake-Up Wake-Up
Power Mode Peripherals Peripherals Sources
Consumption Execution Sources Time
Available Available Available
Active 1.7 mA @ 3 MHz Yes All All All - -
Sleep 1.3 mA No All All All Any interrupt source 0
1 2
WDT , LCD , Comparator,
WCO6, Comparator, GPIO8,
Deep-Sleep 1.3 A No I2C/SPI, Opamps, 25 s
32-kHz ILO7 WDT, SCB9
Link-Layer3 POR4, BOD5
Comparator,
Hibernate 150 nA No No No Comparator, GPIO 2 ms
POR, BOD
Wake-Up pin,
Stop 60 nA No No No No 2 ms
XRES10
PSoC 4 BLE Current Consumption
PSoC 4 BLE has best-in-class low-power modes
Consumes lowest current in Stop mode with I/O 20 C
retention 18 D
Average current
16 Stage Power Mode Activity
Retains SRAM data in Hibernate mode 14
consumption for
connection interval of
A Active Oscillator Startup
B Sleep Oscillator Startup
Current (mA)
1 sec = 18.9 A
Retains complete system status in Deep-Sleep mode 12
C Sleep RF Transmit
10
Provides APIs to switch easily between power modes 8
D Sleep RF Receive
E Active BLE Stack
Consumes avg. 18.9-A for a 1-sec connection interval 6 A
B
E Processing
4 F Deep-Sleep WCO On
2
F
~
~
0
0 1,000 2,000 3,000 4,000 999,000 1,000,000
Time (s)
Active Sleep Active Deep-Sleep

1 Watchdog timer 4 Power-on-reset
2 Liquid crystal display 5 Brownout-detect 7 32-kHz internal low-speed oscillator 9 Serial communication block
3 Digital logic managing BLE protocol 6 32-kHz watch crystal oscillator 8 General-purpose input/output 10 External reset
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3a. PSoC 4 BLE Simplifies RF Board
Design
Designing an AMN is non-trivial
AMNs are sensitive to PCB layout and parasitics
Tuning the AMN is required for best RF performance
AMN tuning complexity increases dramatically when many external components are required
A typical AMN has 7-9 external components vs. two for the Cypress AMN because the Balun is integrated
Cypresss AMN Vendor As AMN example Vendor Bs AMN example

L1
C3 L3
2.2 pF 3.3 nH C1 C2 2 nH
C1 18 pF 1 pF
1.2 pF L1 C2 C4
RFP L2 L3
Ant 4.7 nH 1.0 pF 1.5 pF RFP
RFN
RFN 1 nH 3 nH
VDD_PA
L2 C3 L4
L1 10 nH C5
6.8 nH 18 pF 2 nH 1 pF
C1
2.2 nF C4
1 pF
2 external components 7 external components 9 external components
The PSoC 4 BLE integrated Balun simplifies RF board design and reduces PCB footprint
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3b. PSoC Creator Enables Complete
System Design
BLE Heart Rate Monitor (HRM) Example Project With a Custom AFE Shown in PSoC Creator
1. Explore the library of 75+
Components
2 2. Drag and drop Component

icons to complete your
hardware system design in
HRM
the main design workspace
(e.g., use the BLE
5 1
Component for Bluetooth
Smart designs)
3. Configure Components
using the Component
Configuration Tools
4. Access Component
datasheets directly from the
Component Configuration
Tools
6 4 3 5. Codesign your application

firmware and hardware in
PSoC Creator
6. Use the Getting Started with

PSoC 4 BLE App Note for
complete system design
guidelines
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3c. The BLE Component Simplifies
BLE Stack and Profile Configuration
The BLE Component contains:
The Bluetooth 4.1 specification
The BLE Protocol Stack, including all BLE Profiles
APIs for easy firmware development
BLE Component Configuration Tool in PSoC Creator
BLE Component Icon
Right-click the BLE

Component to view the
Component Configuration Tool
The BLE Component Configuration Tool simplifies the BLE Protocol Stack and Profile configuration
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BLE Pioneer Kit
The $49 BLE Pioneer Kit (CY8CKIT-042-BLE) contains: BLE Pioneer Kit Baseboard with
PSoC 4 BLE Module
BLE Pioneer Kit Baseboard
Provides access to all PSoC 4 BLE GPIOs
Is compatible with Arduino and Digilent Pmod hardware ecosystems
Features onboard CapSense slider, RGB LED, push buttons and Cypress F-RAM
Includes PSoC 5LP for program and debug
Supports 1.9 V, 3.3 V or 5 V, including coin cell battery operation
BLE Modules (2)

Two FCC-certified1 BLE modules that plug into the BLE Pioneer Kit Baseboard
Feature onboard PCB antenna and provide access to all GPIOs
Support BLE-UART bridge via an onboard four-pin header
BLE USB Dongle BLE USB Dongle
Enables a PC to act as the BLE host for developing and debugging BLE peripherals
Features an onboard LED, push button and PSoC 5LP for program and debug
Example Projects
Demonstrate how to use PSoC Creator to implement common BLE Profiles, such Example Android and iOS Apps
as Heart Rate Monitor (HRM), Glucose Meter and Human Interface Device (HID)
Include iOS and Android mobile apps with full source code
1 Electronicproducts manufactured or sold in the U.S. certifying that its electromagnetic interference
is under limits defined by the Federal Communications Commission (FCC)
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BLE Pioneer Kit Baseboard and
PSoC 4 BLE Module
BLE Pioneer Kit Baseboard PSoC 4 BLE Module
Arduino Compatible I/O BLE Module Header PCB Wiggle Antenna

Header (J3 and J4) (J10 and J11) (for BLE Radio)
LDO 5V-1.9V
System Power
Supply Jumper
(J16)
Status LED
Power LED RGB LED
USB BLE
Connector Reset
(J13) Button
Proximity
Header
(J14)
PSoC 5LP I/O Push
Header (J8) Button
Diligent
Pmod
Compatible I/O
Header
PSoC 5LP for Program CapSense Slider PSoC 4 BLE

and Debug Arduino CY8C4247LQI-BL483
Compatible I/O
Header (J1 and J2)
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LAB 1: BLINKING LED
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Lab 1: Blinking LED
Objectives
Learn how to use PSoC Creator to implement and debug PSoC designs
Implement a simple blinking LED design
Software tools
PSoC Creator
New Component
Pin (digital output)
Lab 1: Block Diagram
BLE Pioneer Kit
PSoC 4 BLE
ARM Pin Blue

Cortex-M0 P3[7]1 LED
U
PSoC 5LP S PSoC Creator
Serial Wire Debug (SWD) B Program and
Debug
1 Represents the logical pin placement at Port 3, Pin 7 in PSoC Creator

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BLE SOFTWARE ARCHITECTURE
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BLE Software Architecture
Display
Heart rate sensor data
Discover & Connect
Sensor Data structure, Find, Read
Service Data bearer, Security
Logical channel - L2CAP PDUs
Physical/Logical Link - packets
Physical channels - Symbols
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BLE Software Stack
The BLE software stack has three parts: APPLICATION Profile: HID, HRM, Glucose Meter, etc.
Generic Access Profile (GAP)
Application: Firmware for a functional use case utilizing Generic Attribute Profile (GATT)
the Host and the Controller to implement product-specific HOST Attribute Protocol (ATT) Security Manager (SM)
functionality Logical Link Control and Adaption Protocol

(L2CAP)
Host Control Interface (HCI)

Host: Subset of the BLE Protocol consisting of Stack2 Link Layer (LL) Direct Test Mode (DM)
various communication protocols that manage how two or CONTROLLER
Physical Layer (PHY)
more BLE devices communicate with each other
Controller: Physical device that transmits and receives

encoded radio signals and decodes these signals to
interpret the packets of information within them
1 The BLE Architecture terms required for todays labs are explained in the following slides. Refer to the Appendix for definitions of all other BLE architecture terms.
2 Firmware implementing the Bluetooth 4.0/4.1 specification to provide BLE communication
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PHY: Physical Layer
APPLICATION Profile: HID, HRM, Glucose Meter, etc.
2.4-GHz ISM band
1-Mbps data rate, GFSK modulation
Generic Attribute Profile (GATT)
40 RF channels (3 for advertising, 37 for data)
HOST Attribute Protocol (ATT) Security Manager (SM)
2-MHz channel spacing Logical Link Control and Adaption Protocol
Minimum output power: 0.01 mW (L2CAP)

Maximum output power: 10 mW
Link Layer (LL) Direct Test Mode (DM)
Receiver sensitivity: < -70 dBm with BER 0.1% CONTROLLER
Protocol Data Unit
BLE RF CHANNEL DISTRIBUTION BLE PHYSICAL PACKET FORMAT
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LL: Link Layer
Establishes and maintains a reliable physical link APPLICATION Profile: HID, HRM, Glucose Meter, etc.

Two channel types: advertising and data
The LL functions include:
Advertising, scanning, creating and maintaining connections
Logical Link Control and Adaption Protocol
Error detection (24-bit CRC) (L2CAP)
Encryption (AES-128-bit) Host Control Interface (HCI)

Link authentication CONTROLLER
Adaptive Frequency Hopping (AFH) for data channels
State State Description

Standby Does not transmit or receive packets
Advertising Broadcasts advertisements on advertising channels
1. Connectable Undirected
2. Connectable Directed
3. Non-connectable Undirected
4. Scannable Undirected
Scanning Looks for advertisers
Initiating Initiates connections to advertiser
Master Communicates with one or more slave devices
Connection Defines transmission timing
Slave Communicates with single master
LINK LAYER STATE MACHINE
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BLE Link Layer Topology
SLAVE
ADVERTISER
CONNECTION ADVERTISER
INITIATING
MASTER
ADVERTISING
SCANNER
SLAVE
ADVERTISER
ADVERTISER
STANDBY
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LL: Link Layer
By BLE spec, devices may have multiple link layer instances
Requires hardware support in specific BLE device silicon
BLE device can be master or slave but not both

(L2CAP)

CONTROLLER
Multiple State Machine Advertising Scanning Initiating Connection

States and Roles Master Slave
Advertising No Yes Yes* Yes * Yes *
Scanning Yes No Yes Yes Yes
Initiator Yes * Yes No Yes No
Connection Master Yes * Yes Yes Yes No
Slave Yes * Yes No No No
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Host Controller Interface Layer
Packet based interface between host and controller
Three types of packets
Command: Host initiated. Handles setup, control,
configuration, discovery and security
Event: Controller initiated. Reports events, status, errors (L2CAP)
Data: Host or controller initiated. Data for commands or Host Control Interface (HCI)
events Link Layer (LL) Direct Test Mode (DM)

CONTROLLER
HOST
COMMAND
DATA
EVENT
DATA
CONTROLLER
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L2CAP:
Logical Link Control and Adaption Protocol Layer
Provides Logical channels to higher layer protocols
Protocol multiplexer
Fragmentation and reassembly
All host & application data is sent using L2CAP packets Logical Link Control and Adaption Protocol
CIDs identify logical channels (fixed and dynamic) (L2CAP)

ATT and SM layer use Basic Connection Oriented Channel
CONTROLLER
L2CAP assembles data from Link Layer channel into a single

packet information payload
Connection Oriented Channel Protocol

1. Connection setup
2. Flow control
3. Disconnection
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SM: Security Manager Layer
Security Manager Goals
Passive eavesdropping protection Generic Access Profile (GAP)
MITM (Man-In-The-Middle) protection


LE Privacy (Encrypted MAC) Logical Link Control and Adaption Protocol
Manages Pairing, and Key Distribution (L2CAP)

Protocol for exchanges with peer device
Provides security toolbox CONTROLLER
Security Modes
Just Works: No Temporary Key. Unauthenticated pairing with MITM protection
Passkey: Authenticated pairing with 6 digit Temporary Key and MITM protection
Out Of Band: Authenticated pairing with Temporary Key from OOB mechanism. MITM protection.
Security Concept Description

Pairing Process for creating a shared secret key (the link key)
Authentication Verification that the two devices have the same link key
Bonding Storing the link key created during pairing for use in subsequent connections
Authorization Confirmation by the user to continue with the procedure (after
authentication)
Association Models Just works, Passkey Entry, Out Of Band
Encryption Obscures data from unauthorized observer
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SM: Security Manager Layer
RFC3610 based AES-128 encryption (in hardware on PSOC)
Counter mode cipher
Block chaining message authentication code
Each new data packet has Message Integrity Check (MIC) Logical Link Control and Adaption Protocol
MIC is separate from CRC (L2CAP)
Packet only sent to host after MIC is checked Host Control Interface (HCI)

Lowers peak power requirement CONTROLLER
Key generated by Host without information from other device
LE Privacy Makes it difficult for an attacker to track a device over a period of time
Every 15 minutes, the device changes its address to a new random value
MAC = AES(CSRK, plaintext, 64), i.e. MAC is encrypted
Connection occurs with this resolvable private address
Requires key to generate / resolve address
Signed Data allows fast authentication without encryption

SignCounter initialized to zero when CSRK is generated
SignCounter incremented for every message that is signed with a given CSRK
SignCounter evaluated to detect attacks
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ATT: Attribute Protocol Layer
Exposes data using typed, addressable attributes APPLICATION Profile: HID, HRM, Glucose Meter, etc.

Presents client with methods of reading, writing attributes
Enables server to send notifications and indications

BLE uses Attributes to create usage cases (L2CAP)
Some devices have data, others want data Host Control Interface (HCI)

Some data are read CONTROLLER
Some data are best notified when they change value
Some will require to be written
All attributes have Handles, Types (UUIDs) and Values

UUIDs are 128 bits in length
BLE also defines 112 bit Base ID to enable 16 bit UUIDs (EX: 00000000-0000-1000-8000-00805F9B34FB)
Handle Type (UUID) Value Permission

Bits 16 128 4 Kb Public / Private
0x0009 <<Device Name>> Temperature Sensor Public
0x0022 <<Battery State>> Discharging (0x01) Public
0x0098 <<Temperature>> 20.5 C Private
Example Attributes
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ATT: Attribute Protocol Layer
BLE is CLIENT SERVER architecture at ATT protocol layer APPLICATION Profile: HID, HRM, Glucose Meter, etc.

SERVERS have data
SERVERS expose data using ATTRIBUTES
(L2CAP)
CLIENTS request data from SERVERS Host Control Interface (HCI)

SERVERS respond with data CONTROLLER
REQUEST SERVER
RESPONSE
Client can only send one Request at a time
Request completes after client receives Response
ATTRIB 1
INDICATION (ATT CHANGE)
Server can only send one indication at a time
CLIENT CONFIRMATION
ATTRIB 2
Indication complete when server receives Confirmation
Commands / Notifications can be sent at any time

ATTRIB N My be dropped if buffer overflows. Not reliable.
COMMAND (NO RESP)
Attributes can be read, written or found (by request)

NOTIFICATION (NO CMD) Find by Handle UUID/Type or Value
ATT Protocol Methods
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GATT: Generic Attribute Profile Layer
Implements Server Services and Client Use Cases APPLICATION Profile: HID, HRM, Glucose Meter, etc.

Attribute data encapsulated in Services
Attribute data exposed as Characteristics HOST Attribute Protocol (ATT) Security Manager (SM)
Same protocol methods as ATT layer Logical Link Control and Adaption Protocol
(L2CAP)
Primary Service: Exposes primary usable function of device Host Control Interface (HCI)
Secondary Service: Subservient to other primary/secondary svc Link Layer (LL) Direct Test Mode (DM)
CONTROLLER
CLIENT REQUEST SERVER

RESPONSE
SERVICE 1
Use Case CHAR 1
INDICATION (ATT CHANGE) CHAR N
CONFIRMATION
SERVICE N
COMMAND (NO RESP)
CHAR 1
Characteristic Format Typical Characteristic
CHAR N
NOTIFICATION (NO CMD)
GATT Protocol Methods
Rev 0 1/9/15
GAP: Generic Access Profile Layer
GAP layer defines profile roles and procedures for
Bonding
Discovering capabilities
Exchanging security information
Establishing connections (L2CAP)
Resolving addresses Host Control Interface (HCI)
Defines advertising and scan response data formats Link Layer (LL) Direct Test Mode (DM)
CONTROLLER
Broadcaster Observer Peripheral Central

Advertising Listening Advertising and Connectable Scans and initiates connections
Non-connectable Scans for advertisements Always a slave Always a master
Rev 0 1/9/15
BLE Application
BLE Application is defined as a set of Use Cases
Use Cases use Services on Server Generic Attribute Profile (GATT)
Services expose Characteristics HOST Attribute Protocol (ATT) Security Manager (SM)
Characteristics contain Attributes Logical Link Control and Adaption Protocol

(L2CAP)
Attributes expose typed, addressable data Host Control Interface (HCI)

Bluetooth SIG has defined standardized Use Cases CONTROLLER
Developers can create custom Use Cases
CLIENT REQUEST SERVER

RESPONSE
SERVICE 1
Use Case CHAR 1
1
INDICATION (ATT CHANGE) CHAR N
CONFIRMATION
Use Case
2
SERVICE N
COMMAND (NO RESP)
APPLICATION CHAR 1
CHAR N
NOTIFICATION (NO CMD)
Rev 0 1/9/15
Example BLE Application
Heart Rate Monitor
A Bluetooth Smart-Ready mobile phone (supporting BLE + Bluetooth Classic) is paired with a Bluetooth Smart
fitness monitor (supporting BLE only)
Bluetooth Smart-Ready Mobile Phone

BLE Protocol Stack on Mobile App BLE Protocol Stack on Fitness Monitor
Profile HRM Scans Services Exposes Services Profile HRM Sensor
Collector
GAP Role Central Initiates physical Accepts physical GAP Role Peripheral
link connection link connection
GATT Role Client Wants data Has data GATT Role Server
LL Master Establishes and Advertises LL Slave
manages link capabilities
Services Device Information Service
Bluetooth Smart HRM Service

Fitness Monitor Characteristics HRM: Heart Rate
Measurement
BLE Connection
HRM: Body Sensor Location
HRM: Heart Rate Control

Point
Rev 0 1/9/15
BLE Component Overview
Open the BLE Component Configuration Tool to review1
Open Lab 1 and add the BLE Component to the design
Right-click the BLE Component and open the Component Configuration Tool
BLE Component Icon in PSoC Creator BLE Component Configuration Tool
1 Refer to the Appendix for additional reference material

Rev 0 1/9/15
CySmart: BLE Test and Debug Tool
CySmart
An easy-to-use, GUI-based, BLE test and debug tool
Works in conjunction with the BLE USB Dongle (included with the BLE Pioneer Kit)
Available as an independently installed software tool and also within PSoC Creator
CySmart supports:
Scanning and connecting to advertising BLE devices
Pairing and bonding with connected BLE devices
Accessing the GATT database of the connected BLE device
Reading and writing to characteristics of connected BLE devices
PSoC 4 BLE Test and Debug Setup with CySmart and PSoC Creator
BLE Connection Between the BLE USB Dongle
and the BLE Pioneer Kit
PC
U U
CySmart
S PSoC Creator S
Software Tool
B B
BLE USB Dongle
BLE Pioneer Kit Baseboard and

PSoC 4 BLE Module
Rev 0 1/9/15
BLE USB Dongle and CySmart
BLE USB Dongle CySmart BLE Test and Debug Tool
Wiggle Antenna
PRoC BLE
CYBL10162-56LQXI
Reset Button
Programming Header
User Button
PSoC 5LP for

Program
and Debug
USB Plug (J1)
CySmart makes real-time test and debug of BLE devices easy

Rev 0 1/9/15
LAB 2: SETTING UP A BLE CONNECTION
Rev 0 1/9/15
BLE Lab 2: Setup a BLE Connection
Objectives
BLE Component Icon
Learn how to use the BLE Component
Implement a standard Find Me Profile with the Immediate Alert Service (IAS)
Learn how to use the CySmart tool to debug BLE designs
Software tools
PSoC Creator
CySmart
New Components
BLE Lab 2: Block Diagram
TCPWM
BLE Pioneer Kit PC
PSoC 4 BLE
BLE BLE USB Dongle
ARM Connection
BLE
Cortex-M0
Pin CySmart
TCPWM Blue LED Software Tool
P3[7]1
1 Represents the logical pin placement at Port 3, Pin 7 in PSoC Creator

Rev 0 1/9/15
SESSION BREAK
Rev 0 1/9/15
PSoC PROGRAMMABLE TECHNOLOGIES
Rev 0 1/9/15
PSoC 4 BLE Programmable Analog Blocks consist of
One 12-bit 1-Msps SAR1 ADC
Two low-power comparators (operational in Deep-Sleep mode)
Four high-performance opamps (operational in Deep-Sleep mode)
Two IDACs
One on-chip temperature sensor
One 1- to 36-channel analog multiplexer (AMUX) that can be flexibly configured to create custom AFE designs
ADC + Opamps + AMUX ICs PSoC 4 BLE Programmable Analog Blocks Custom AFE Design in PSoC Creator
CTBm
Op Op 12-bit SAR1 ADC

amp amp 1-Msps
Op Op AMUX
amp amp
AMUX
CapSense
CMP CMP 8-bit 7-bit
IDAC IDAC A Dynamic Gain Switching Amplifier implemented in
PSoC Creator using the PSoC 4 BLE opamp,
analog muxes and SAR1 ADC
Programmable Analog Blocks can be flexibly configured to create custom AFEs for sensor
interfaces
1 Successive approximation register
Rev 0 1/9/15
Sequencing SAR ADC Block
Sequencing SAR ADC PSoC 4 BLE SAR ADC Block As Viewed in PSoC Creator
12-bit successive approximation register (SAR) ADC
SARMUX
Sample rate up to 1-Msps
Wide operation from 1.71-5.5 V
Selectable SAR ADC input sources
External pins
Analog bus
Temperature sensor
Selectable voltage references (not shown)

Port3
Internal VDDA and VDDA/2 references
Internal 1.024-V reference with buffer The hardware sequencer controls the inputs to the SAR ADC via the
red switches
External reference
SAR multiplexer (SARMUX) with hardware sequencer

Eight individually configurable input channels, each configurable as single-ended or differential
Rev 0 1/9/15
Continuous Time Block (CTBm)
The PSoC 4 BLE CTBm consists of: PSoC 4 BLE Continuous Time Block (CTBm) As Viewed in PSoC Creator
CTBm
Port2 Port1
Four opamps
AMUXBUS A
User-programmed modes for speed and power AMUXBUS B
Follower or comparator configurations
Port0
Functional in Deep-Sleep modes
Rail-to-rail inputs and output Comparator
1- or 10-mA output current drive
6-MHz gain bandwidth
6-V/s slew rate
The CTBm features flexible routing between the opamps, comparators and the
analog-mux bus
Two low-power comparators
User-programmed modes for speed and power
1 s at 250 A (typical)
400 ns at 300 A (typical)
150 ns at 1 mA (typical)
Functional in Deep Sleep and Hibernate modes
Available as wake-up source in either mode
Low input offset voltage < 4 mV
The PSoC 4 BLE CTBm enables the design of custom AFEs without requiring external ICs
Rev 0 1/9/15
Programmable Digital Blocks
Create custom digital peripherals for your application
PSoC Creator Components integrate 75+ digital functions into a one-chip PSoC solution
PSoC Creator digital Components are dragged and dropped as icons to create custom digital logic solutions
PSoC Creator provides Component Configuration Tools to simplify parameter configurations with a graphical
user interface
Reconfigure Programmable Digital Blocks

Dynamic reconfiguration = changing hardware on the fly
Dynamically reconfigure serial communication blocks (e.g., a UART transfer followed by a SPI transfer in the
same block)
Dynamically reconfigure timer/counter/PWM blocks
PSoC Programmable Digital Blocks Integrate Digital Functions PSoC Programmable Digital Blocks Integrate Communication
Interfaces
4 examples of
communication
interface
functions that
can be
7 examples of glue logic implemented in
functions that can be SCBs
implemented in UDBs
Programmable Digital Blocks can be configured flexibly for control and communication
Rev 0 1/9/15
Universal Digital Block
Four Universal Digital Blocks (UDB) Universal Digital Block (UDB)
PLD Chaining
Fully Programmable Digital Block PLD PLD
Two 12C4 PLDs and programmable data path Clock and 12C4 12C4
Reset (8 PTs) (8 PTs)
Digital routing connection to the systems Advanced High-Performance Control
Bus (AHB)
Create additional digital peripherals: Timer, PWM, I2C, SPI, I2S1, etc. Status and
Control Datapath
Datapath
Chaining
Build custom logic and non-standard interfaces
Custom communication protocols
Digital Routing to the System AHB
Patches to standard protocols
Example: Optical Audio Cable
Build unique and differentiated functions
S/PDIF, SGPIO controller, voltage sequencer, etc.
Offload traditional CPU functions to hardware

State machines, LUT, simple math, digital filter, etc.
PSoC 4 BLE UDBs can build unique

interfaces like I2S1 for digital audio
1 Inter-IC Sound, an electrical serial bus interface standard used to connect
Rev 0 1/9/15
Serial Communication Block
Two Serial Communication Blocks (SCB) PSoC 4 BLE SCB Component Configuration Tool
Dynamically reconfigurable SCB

I2C, UART or SPI
I2C master and slave

Data rate up to 1,000 Kbps
Standard UART with SmartCard reader

Supports IrDA protocol
SPI master and slave Example: Serial Cable

Supports Motorola, TI and National Semiconductor protocols
Low-power operation modes for SPI and I2C
PSoC 4 BLE SCBs can build real-time reconfigurable

serial protocols
Rev 0 1/9/15
Timer/Counter/PWM Block
Four Timer/Counter/PWM Blocks (TCPWM)
TCPWM Component Configurations

Dynamically reconfigurable digital block
Timer with compare and capture
Counter
PWM
PWM with dead time
PWM with low-noise pseudo-random output
Quadrature decoder (QuadDec)
Example: PWMs for Fan Control
PSoC 4 BLE TCPWM blocks can be used to design closed-

loop fan controllers that support up to six independently
controlled fans
Rev 0 1/9/15
Sensor-Based IoT System Design
Programmable architecture offers unique advantages for sensor-based IoT system design
Reduces power consumption for battery-operated applications by offloading CPU tasks to the UDBs
Creates custom digital peripherals using UDBs (e.g., below, a custom I2C wake-up from an accelerometer)
Reconfigures blocks during operation to create multiple functions
Allows any pin to be used as an analog or digital I/O with on-chip multiplexers
Actual PSoC Creator Complete IoT System Design (Complete Production Design) 1
HRM Input
PSoC 4 BLE is a complete low-power wireless IoT system in one chip
1 Colored header signifies an inherent system bus connection

Rev 0 1/9/15
LAB 3: SENSOR-BASED SYSTEM DESIGN
WITH BLE CONNECTIVITY
Rev 0 1/9/15
Lab 3: Sensor-Based System Design
with BLE Connectivity
Objectives
SAR ADC Component
Measure simulated heart rate using the Programmable Analog Blocks
Implement a Heart Rate Monitor Profile and send the data over BLE
Optimize the design for low power consumption
Software tool
PSoC Creator
CySmart
New Components
SAR ADC
Opamp Lab 3: Block Diagram
BLE Pioneer Kit PC
PSoC 4 BLE
BLE USB Dongle

PSoC 5LP ARM
Signal Opamp SAR ADC BLE
Cortex-M0 BLE
Generator
Connection
Pin Blue
P3[7]1 LED CySmart
Software Tool
Pin Green
P3[6]2 LED
1 Represents the logical pin placement at Port 3, Pin 7 in PSoC Creator 2 Represents the logical pin placement at Port 3, Pin 6 in PSoC Creator
Rev 0 1/9/15
USER INTERFACE
Rev 0 1/9/15
Segment LCD Control Block
Direct-drive Segment LCD Controller Segment LCD Component Configuration Tool
Up to 4 commons and 32 segments
Offers three drive modes

Cypresss digital correlation method
PWM at one-half bias
PWM at one-third bias
Operates in Active, Sleep and Deep-Sleep modes
Supports STN1 and TN2 LCD types

Example: Segment LCD
Display Type Deep Sleep Mode Sleep/Active Mode
TN Glass Digital correlation PWM one-third bias
STN Glass Digital correlation Digital correlation
PSoC 4 BLE can drive Segment LCDs to create

modern user interfaces at low cost
1 STN: Super Twisted Nematic

2 TN: Twisted Nematic
Rev 0 1/9/15
PSoC 4 Brings Proven CapSense
Technology to the BLE World
Touch Buttons: 2003 Liquid Tolerance: 2008 Noise Immunity: 2010 Configurability: 2011 1B Units Shipped: 2013
LG Chocolate Mobile Phone Whirlpool Dishwasher HP TouchSmart Printer Microsoft Arc Touch Mouse Samsung Galaxy Note 3
Cypresss R&D delivers CapSense algorithms offer SmartSense Auto-tuning: no CapSense Express configurable One billionth CapSense
cellphone CapSense buttons water tolerance and proximity manual tuning, high noise solutions-no firmware chip with stylus-activated
sensing immunity buttons
CapSense is industrys No. 1 solution, 4x in sales over No. 2 CapSense Component Configuration Tool
CapSense buttons just work because of rigorous engineering and testing
PSoC Creator CapSense Component: design with no code

Drag and drop the CapSense Component to create a CapSense system
Buttons, sliders and proximity sensors are customized using the
CapSense Component Configuration Tool
SmartSense Auto-tuning just works by setting, monitoring and
continuously maintaining optimal performance
Rev 0 1/9/15
CapSense Touch Sensing
CapSense replaces mechanical buttons
A capacitive sensor is used to measure the change in capacitance between a pin and ground
CapSense algorithms and analog circuitry convert the measured capacitance to a raw count
A finger touch increases the capacitance of the system, which in turn increases the raw count
An increase in the raw count above a user-defined threshold registers a touch
Refer to the Getting Started With CapSense Guide for details on CapSense algorithms
Capacitive Sensor Capacitive Sensor Raw Count Variation on Finger Touch
Without a Finger Touch With a Finger Touch
3660
1,700
3640
No Touch Touch No Touch
3620
1,650
3600
Threshold
Raw Count
3580
Signal
Overlay Overlay
1,600
CF 3560
Copper Capacitive Copper Copper Capacitive Copper

3540
Ground Sensor Ground Ground Sensor Ground
1,550
CP CP CP CP 3520
Noise
PCB PCB 3500
1,500
3480
CX = 2CP CX = 2CP + CF 3460

Baseline
0 0 200 400
400 600 800
800 1000 1,200
1200 1400 1,600
1600
Time (ms)
CX = Total Capacitance measured by the CF = Capacitance added by a finger touch CapSense algorithms use analog circuits to
capacitive sensing system CF is dependent on the overlay material, overlay convert the capacitance to raw count, which is
CP = Parasitic capacitance thickness and the dimensions of the finger compared to the user-defined threshold to
(typical = 9mm) and sensor record a touch
Rev 0 1/9/15
SmartSense Auto-Tuning
SmartSense Auto-tuning sets, monitors and continuously maintains optimal capacitive
sensor performance
Reduces design effort by eliminating manual tuning after the design phase
Adapts to manufacturing variations in PCB, overlay and paint that degrade touch-sensing performance
Adapts to changes in system environment due to RF noise sources
Allows a platform design approach that uses different overlays, button shapes and trace lengths with the same
electronics
SmartSense Auto-tuning Cuts Design Cycle Time
SmartSense Auto-tuning eliminates time-

consuming manual tuning and the design iterations
caused by it
Steps eliminated
through Auto-tuning
functionality
Rev 0 1/9/15
LAB 4: CapSense DESIGN WITH BLE
CONNECTIVITY
Rev 0 1/9/15
PSoC 4 BLE Lab 4:
CapSense Data Reporting Over BLE
Objectives
Drive RGB LED color and intensity using Precision Illumination Signal Modulation (PrISM)
Implement a Custom BLE Profile with a custom Service to send RGB LED color and intensity data over BLE
Implement a Custom Service to send CapSense slider data over BLE
CapSense CSD Component
Use CySmart or the iOS/Android app to validate the operation
Software tool
PSoC Creator
CySmart
New Components
PrISM
CapSense CSD Lab 4: Block Diagram
BLE Pioneer Kit PC
PSoC 4 BLE
BLE BLE BLE USB Dongle
Connection
ARM P3[6-7],
PrISM RGB LED
Cortex-M0 P2[6]
Linear CySmart
CapSense P2[1-5]
Slider Software Tool
Rev 0 1/9/15
PORTFOLIO AND EXAMPLE APPLICATIONS
Rev 0 1/9/15
PSoC 4 Portfolio
ARM Cortex-M0 | CapSense
Programmable
PSoC MCU Intelligent Analog Programmable Digital
Analog
PSoC 4000 PSoC 4100 PSoC 4200
PSoC 4400
NEW CY8C4128-BL Q115 NEW CY8C4248-BL Q115
24 MHz, 256K/32K1, 48 MHz, 256K/32K1,
CMP2, Opamp, ADC3, CMP2, Opamp, ADC3,
SCB4, IDAC5, TCPWM6, SCB4, IDAC5, TCPWM6,
BLE7 BLE7, UDB8
NEW NEW CY8C4127-BL NEW NEW NEW CY8C4247-BL
CY8C4127-M CY8C4247-M CY8C4247-L
24 MHz, 128K/16K1, 48 MHz, 128K/16K1,
24 MHz, 128K/16K1 48 MHz, 128K/16K1 48 MHz, 128K/16K1
CMP2, Opamp, ADC3, CMP2, Opamp, ADC3,
NDA Required NDA Required NDA Required
SCB4, IDAC5, TCPWM6, SCB4, IDAC5, TCPWM6,
Contact Sales Contact Sales Contact Sales
BLE7 BLE7, UDB8
NEW NEW NEW

CY8C4126-M CY8C4246-M CY8C4246-L CY8C44x6
24 MHz, 64K/8K1 48 MHz, 64K/8K1 48 MHz, 64K/8K1 48 MHz, 64K/16K1
NDA Required NDA Required NDA Required NDA Required
Contact Sales Contact Sales Contact Sales Contact Sales
CY8C4245
CY8C4125 CY8C44x5
48 MHz, 32K/4K1,
24 MHz, 32K/4K1, 48 MHz, 32K/8K1
CMP2, Opamp, ADC3,
CMP2, Opamp, ADC3, NDA Required
SCB4, IDAC5, TCPWM6,
SCB4, IDAC5, TCPWM6 Contact Sales
UDB8
CY8C4244
CY8C4014 CY8C4124
48 MHz, 16K/4K1,
16 MHz, 16K/2K1, 24 MHz, 16K/4K1,
CMP2, Opamp, ADC3,
CMP2, I2C, IDAC5, CMP2, Opamp, ADC3,
SCB4, IDAC5, TCPWM6,
TCPWM6 SCB4, IDAC5, TCPWM6
UDB8
CY8C4013
16 MHz, 8K/2K1,
CMP2, I2C, IDAC5,
TCPWM6
1 Flash 4 Production Sampling Development Concept

KB/SRAM KB Serial communication block programmable as I2C/SPI/UART 7 Bluetooth Low Energy
2 Comparator 5 Current-output digital-to-analog converter 8 Universal Digital Block Status
3 Analog-to-digital converter 6 Timer/counter/PWM block Availability QQYY QQYY
Rev 0 1/9/15
Wireless Portfolio
2.4-GHz RF Programmable Radio-on-Chip (PRoC) Programmable System-on-Chip (PSoC)
Transceiver MCU CapSense TrueTouch1 Intelligent Analog Programmable Digital
NEW NEW NEW NEW CY8C41x7-BL NEW CY8C42x7-BL
CYBL1016x CYBL1046x CYBL1056x
PSoC 4 BLE PSoC 4 BLE
PRoC BLE PRoC BLE PRoC BLE
CM03, 2 SCB4, 2-Finger1 CM03, 2 SCB4, 2-Finger1
CM03, 2 SCB4 CM03, 2 SCB4, CapSense CM03, 2 SCB4, 2-Finger1
CMP5, Opamp CMP5, Opamp, 4 UDBs6
36 GPIOs, 128KB Flash 36 GPIOs, 128KB Flash 36 GPIOs, 128KB Flash
BLE2
36 GPIOs, 128KB Flash 36 GPIOs, 128KB Flash
NEW Q115 NEW Q115 NEW Q115 NEW CY8C41x8-BL Q115 NEW CY8C42x8-BL Q115
CYBL1017x CYBL1047x CYBL1057x
PSoC 4 BLE PSoC 4 BLE
PRoC BLE PRoC BLE PRoC BLE
CM03, 2 SCB4, 2-Finger1 CM03, 2 SCB4, 2-Finger1
CM03, 2 SCB4 CM03, 2 SCB4, CapSense CM03, 2 SCB4, 2-Finger1
CMP5, Opamp CMP5, Opamp, 4 UDBs6
36 GPIOs, 256KB Flash 36 GPIOs, 256KB Flash 36 GPIOs, 256KB Flash
36 GPIOs, 256KB Flash 36 GPIOs, 256KB Flash
CYRF8935 CYRF89135
WUSB8-NL PRoC-Embedded
1 Mbps WUSB8-NL, M8C9
GFSK7
TX 18 mA, RX 18 mA 35 GPIOs, 32KB Flash CYRF89435 CYRF89535

PRoC-CS PRoC-TT
WUSB8-NL, M8C9 WUSB8-NL, M8C9, 2-Finger1
CYRF9935 CYRF89235 35 GPIOs, 32KB Flash 35 GPIOs, 32KB Flash
WUSB8-NX PRoC-USB
2 Mbps WUSB8-NL, M8C9, USB
TX 12 mA, RX 15 mA 13 GPIOs, 32KB Flash
GFSK7 + DSSS10
CYRF69103
PRoC-LP
WUSB8-LP, M8C9
CYRF6936 14 GPIOs, 8KB Flash
WUSB8-LP
1 Mbps
TX 26 mA, RX 21 mA CYRF69213
PRoC-LP
WUSB8-LP, M8C9, USB
14 GPIOs, 8KB Flash
1 Touch-sensing technology with 2-finger gestures 5 Comparator 9 Cypress proprietary 8-bit MCU
2 Bluetooth 6 Universal 10Direct Production Sampling Development Concept
Low Energy, also known as Bluetooth Smart Digital Block sequence spread spectrum
3 ARM Cortex-M0 7 Gaussian frequency shift keying Status
4 Serial communication block 8 WirelessUSB Availability QQYY QQYY
Rev 0 1/9/15
Product Overview: BLE Series
Feature PSoC 4 BLE Series PRoC BLE Series
CPU Core ARM Cortex-M0 ARM Cortex-M0
CPU Speed (MHz) 48 48
Flash Size/SRAM (KB) 256/32 256/32
ADC 12-bit SAR1 1 Msps 12-bit SAR 1 Msps
Opamps 4 -
Comparators 2 -
IDACs 2 2
UDBs 4 -
Timers, Counters, PWMs 4/4/8 4/4/8
CapSense Yes Yes
I2S Yes Yes
Serial Interfaces 4 SPI, 2 I2C, 4 UART 2 SPI/I2C/UART
I/Os (Capacitive Sensing I/Os) 36 36
Package 56-QFN, 68-CSP 56-QFN, 68-CSP
Applications General-purpose, such as PC peripherals, HID, remote control,
fitness monitors and wireless toys
wearable electronics
Two BLE product families, each optimized to help you build your low-power wireless IoT system
1 Successive approximation register
Rev 0 1/9/15
PSoC 4 BLE Solution vs. Competitions
Features CY8C4xxx-BL nRF51822 CC2541 CSR1011

CPU, Speed ARM CM0, 48 MHz ARM CM0, 16 MHz 8051, 32 MHz 16-bit RISC, NA
Flash, BLE Stack (KB) 128/256, 64 256, 80 256, 1304 64 (ROM), 64
Supply Voltage 1.9-5.5 1.8-3.6 2.0-3.6 1.8-3.6
Serial Interface1 4 SPI, 2 I2C, 3 UART 2 SPI, 2 I2C, UART 2 SPI, I2C, 2 UART SPI, I2C, UART
CapSense Channels 36 No No No
UDBs 4 No No No
ADC 12-bit, 1-Msps 10-bit, 14.7-ksps 12-bit, 7.5-ksps 10-bit, 0.7-ksps
Opamp, Comparator 4, 2 No, No No, 1 No, No
Packages/GPIOs QFN, CSP / 36 QFN, CSP / 32 QFN / 23 QFN / 32
Rx Sensitivity2 (dBm) -92 -93 -88 -92.5
Avg. Current (A) 18.9, 5.7 15.5, 5.6 24, 6.75 28, 10.75
(1-sec, 4-sec connection)
Deep-Sleep Current (A) 1.3 2.3 1 5
Hibernate Current3 (nA) 150 2,400 500 Not supported
Stop Mode Current (nA) 60 No No 600
Integrated Balun Yes No No Yes
1 Cypress and TI have both master and slave available for 3 Hibernate with RAM retention
SPI and I2C, while Nordic and CSR have only master 4 The TI BLE Stack consumes 130KB of flash because of the lower code density of the 8051
2 Measured pre-Balun in all cases vs. ARM Cortex- M0
Rev 0 1/9/15
PSoC 4 BLE Solution Example:
BLE Sensor Hub
PSoC 4 BLE Value Block Diagram
Design Problems PSoC 4 BLE One-Chip Solution

Easily add BLE connectivity to a sensor hub
Interface with multiple analog and digital sensors Thermistor
A
Drive a PWM-based vibration motor Accelerometer M SAR BLE
Design for low-power operation from a coin cell battery U ADC
RF Link
Battery X
Voltage
PSoC Solution
Simple, one-chip implementation for BLE connectivity
32
Programmable AFE with SAR ADC to interface with sensors
Digital peripherals like SCB to interface with digital sensors CORTEX-M0
48 MHz
Digital peripherals like TCPWM to drive vibration motors
Five flexible low-power modes for long battery life
One-chip = MCU + AFE + Digital + BLE Radio

2 32
Pressure SCB2 Vibration
TCPWM3
Sensor (I2C) Motor
PSoC 4 BLE Design Resources

BLE Fitness Monitor
Design Software: PSoC Creator by Jawbone
Kit: BLE Pioneer Kit (CY8CKIT-042-BLE) PSoC 4 BLE can enable a similar
Design Guide: Getting Started with PSoC 4 BLE App Note one-chip integrated BLE solution with
analog and digit al sensor interfaces
and low power consumption
1 Real-time clock 2 Serial Communication Block 3 Timer, counter, pulse-width modulator; configurable as 16-bit timer, counter pulse-width modulator blocks
Rev 0 1/9/15
PSoC 4 BLE Solution Example:
Heart Rate Monitor
PSoC 4 BLE Value Block Diagram
Design Problems PSoC 4 BLE One-Chip Solution

Easily add BLE connectivity to a heart rate monitor Battery
Implement a custom AFE for sensing and filtering of the Voltage A
heart rate signals Filter M SAR
Design for low-power operation from a coin cell battery Opamp x 2 U ADC
X
PSoC Solution
Simple, one-chip implementation for BLE connectivity Electrode 1
Amplifier
including the Heart Rate Monitor Profile Electrode 2 Opamp x 2
Programmable AFE with opamps for sensing and 32
filtering of the heart rate signals
CORTEX-M0
Five flexible low-power modes for long battery life 48 MHz
One-chip = MCU + AFE + BLE Radio
BLE
RF Link
PSoC 4 BLE Design Resources

BLE Heart Rate Monitor
Design Software: PSoC Creator by Mio
Kit: BLE Pioneer Kit (CY8CKIT-042-BLE) PSoC 4 BLE can enable a similar
Design Guide: Getting Started with PSoC 4 BLE App Note one-chip integrated BLE solution
with a custom Analog Front End
and low power consumption
Rev 0 1/9/15
PRoC BLE Solution Example:
Remote Control
PRoC BLE Value Block Diagram
Design Challenges
Advanced features: trackpad, voice, motion sensing BLE Remote Control
Very low cost
Seamless Touch Sensing and RF Digital 6-Axis Motion
Microphone Sensor
PRoC BLE Solution 4
I2 S I2 C 2
Provides support for advanced features:
Trackpad with two-finger gestures RF Link
Voice commands over BLE Debug SWD1 PRoC BLE Infrared LED
Six-axis motion sensing Header CYBL10563-56LQXI
Integrates BLE radio, microcontroller and Touch Sensing
Integrates Balun to reduce external RF ICs
GPIO 6 GPIO 16
Allows two-layer PCB design
DC-DC
Delivers high SNR with SmartSense Auto-tuning Converter Keyboard
Matrix Trackpad
Sensor
Battery
PRoC BLE Design Resources

PRoC BLE
Design Software: PSoC Creator Remote Control RDK
Kit: PRoC BLE Remote Control (CY5672) Supports BLE HID Profile, two-
Datasheet: PRoC BLE Datasheet finger gestures, voice command,
Design Guide: Getting Started with PRoC BLE App Note six-axis motion sensing, Infrared
LED and 10 buttons
1 Serial wire debug communication protocol

Rev 0 1/9/15
References and Links
Product Webpages:
Cypresss BLE solutions webpage: www.cypress.com/BLE
PSoC 4 BLE product webpage: www.cypress.com/PSoC4BLE
PSoC 4 BLE product datasheet: www.cypress.com/PSoC4BLEDatasheet
PRoC BLE product webpage: www.cypress.com/PRoCBLE
PRoC BLE product datasheet: www.cypress.com/PRoCBLEDatasheet
PSoC Creator: www.cypress.com/PSoCCreator
CySmart for Windows PC: www.cypress.com/CySmart
CySmart for Mobile Apps: www.cypress.com/CySmartMobile
BLE Pioneer Kit: www.cypress.com/CY8CKIT-042-BLE
Remote Control RDK: www.cypress.com/CY5672
Touch Mouse RDK: www.cypress.com/CY5682
BLE Frequently Asked Questions: www.cypress.com/PSoC4BLEKBA
Application Notes:
Getting Started with PSoC 4 BLE (AN791267): www.cypress.com/go/AN91267
Getting Started with PRoC BLE (AN94020): www.cypress.com/go/AN94020
Available Q115: PSoC 4 BLE Measuring Power Consumption (AN92584)
Available Q115: Creating BLE Applications Using PSoC 4 BLE (AN91184)
Available Q115: Creating Custom Profiles Using PSoC 4 BLE (AN96112)
Design Guides:
PSoC 4 BLE Antenna Design Guide: www.cypress.com/go/AN91445
CapSense Design Guide: www.cypress.com/go/AN85951
Rev 0 1/9/15
General Online Resources
Cypress Resources Cypress BLE Solutions: www.cypress.com/BLE
PSoC: www.cypress.com/PSoC
Roadmap: www.cypress.com/PSoCRoadmap
Kits: www.cypress.com/kits
Support: www.cypress.com/support
Training: www.cypress.com/training
Cypress Store: www.cypress.com/store
Community & Forums: www.cypress.com/forums
App Notes: www.cypress.com/AppNotes
Cypresss BLE solutions webpage is your one-stop-shop for everything BLE,

including, Product Datasheets, Development Kits, Application Notes, Software
Downloads, Example Projects, Demo Videos, and more
Bluetooth Resources
Bluetooth SIG website: www.bluetooth.org
BLE Profiles and Services: www.bluetooth.org/en-us/specification/adopted-specifications
Bluetooth Low Energy - The Developers Handbook by Robin Heydon (ISBN-10:013288836X)
Rev 0 1/9/15
Workshop Objectives Recap
You should now:
Know how to create low-power, sensor-based systems for the IoT
Understand the BLE architecture
Understand the PSoC 4 BLE architecture
Know how to use PSoC 4 BLE, with the PSoC Creator and the BLE Pioneer Kit, to implement
BLE connections with PSoC 4 BLE
One-chip, sensor-based, system designs with BLE connectivity
One-chip, CapSense touch-sensing user interface designs with BLE connectivity
Rev 0 1/9/15
APPENDIX
Rev 0 1/9/15
PSoC 4 BLE Product Selector Guide
Direct LCD
Part Number1 CPU Speed UDB2 SCB3 TCPWM4 SAR ADC IDAC5 Drive Opamps Comparators Package
CY8C4127LQI-BL473 24 MHz 0 2 4 806 ksps 0 2 2 56-QFN
CY8C4127FNI-BL483 24 MHz 0 2 4 806 ksps 2 2 2 68-CSP
CY8C4247LQI-BL473 48 MHz 4 2 4 1 Msps 0 4 2 56-QFN
CY8C4247FNI-BL483 48 MHz 4 2 4 1 Msps 2 4 2 68-CSP
PSoC 4 BLE Part Numbering Decoder

CY 8C 4X X X XX X BLXXX
Device Identification Number that corresponds to the part feature set

Temperature Range: I = Industrial
Package: FN = CSP, LQ = QFN
Flash Size: 7 = 128KB, 8 = 256KB
CPU Speed: 2 = 24 MHz, 4 = 48 MHz
Product Type: 42 = Programmable Digital, 41 = Intelligent Analog
Marketing Code: 8C = PSoC Platform
Company ID: CY = Cypress
1 All
part numbers support: Industrial temperature (-40C to +85C), 128KB flash and input voltage range from 1.71 V to 5.5 V 2 UDB = Universal Digital Block
3 SCB = Serial communication block 4 TCPWM = Timer/counter/pulse-width modulator (PWM) block 5 IDAC = Current-output digital-to-analog converter
Rev 0 1/9/15
PRoC BLE Product Selector Guide
CPU Flash 12-bit
Part Number1 Speed Size CapSense SCB2 TCPWM3 SAR ADC I2S PWMs LCD Package
CYBL10161-56LQXI 48 MHz 128KB No 1 2 1 Msps No No No 56-QFN
CYBL10162-56LQXI 48 MHz 128KB No 2 4 1 Msps No 4 No 56-QFN
CYBL10163-56LQXI 48 MHz 128KB No 2 4 1 Msps Yes No No 56-QFN
CYBL10461-56LQXI 48 MHz 128KB Yes 2 4 1 Msps No No No 56-QFN
CYBL10462-56LQXI 48 MHz 128KB Yes 2 4 1 Msps Yes No No 56-QFN
CYBL10463-56LQXI 48 MHz 128KB Yes 2 4 1 Msps No No Yes 56-QFN
CYBL10561-56LQXI 48 MHz 128KB Yes (Gestures) 2 4 1 Msps No No No 56-QFN
CYBL10562-56LQXI 48 MHz 128KB Yes (Gestures) 2 4 1 Msps Yes 1 No 56-QFN
CYBL10563-56LQXI 48 MHz 128KB Yes (Gestures) 2 4 1 Msps Yes 1 Yes 56-QFN
CYBL10563-68FNXI 48 MHz 128KB Yes (Gestures) 2 4 1 Msps Yes 1 Yes 68-CSP
PRoC BLE Part Numbering Decoder

CY BL 10 X X X - NN XX X X
Temperature Range: I = Industrial

Lead: X = Lead Free
Package Type: LQ = QFN, FN = CSP
Number of pins in the package
Device Identification Number that corresponds to the part feature set
Flash Size: 1 = 8KB, 2 = 16KB, 3 = 32KB, 4 = 64KB, 5 = 96KB, 6 = 128KB
Primary Device Feature: 1 = MCU, 4 = CapSense, 5 = CapSense with Gestures
Product Type: 10 = 1st BLE family
Marketing Code: BL = BLE Product family
Company ID: CY = Cypress
1 All part numbers support: Industrial temperature (-40C to +85C) and input voltage range from 1.9 V to 5.5 V
2 Serial communication block 3 Timer/counter/pulse-width modulator block
Rev 0 1/9/15
PSoC 4 BLE Solution Value
Example: Heart Rate Monitor
Competitor $1.92
Competitor
BLE: Nordic nRF51822-QFAB-R7
Price: $1.921 Opamp $0.24
BOM Integration
Balun $0.33
Opamp: On Semi LM324DR2G (2 Qty)
Price: $0.241
Amplifier $1.02
Balun: ST Microelectronics BAL-NRF02D3
Price: $0.331 CapSense Controller $0.47
Amplifier: Microchip MCP6N11-001E/SN

Price: $1.022 BOM Integration Value $2.06
CapSense Controller: Cypress CY8CMBR3002-SX1I

Balun Tuning $0.08
Price: $0.471
Additional Value BLE Protocol Stack $0.08

Configuration
Balun Tuning: Saves four man-weeks of engineering effort
at $2K per man-week, amortized over 100,000 units Total Additional Value $0.16
Value Added: $0.08
Total Value Delivered $4.14
BLE Protocol Stack Configuration: Saves four man-weeks
of engineering effort at $2K per man-week, amortized over
100,000 units
Value Added: $0.08 Target Cypress Solution: CY8C4247LQI-BL453
Total Cost: $3.901
1 Digikey website 1ku pricing on 6/24/2014 6% Total Savings: $0.24
2 Microchip website 1ku pricing on 6/24/2014
Rev 0 1/9/15
Connection Interval Current
Average Current vs Connection Interval of Various BLE Radios
2000
2,000
1800
1,800
RF Peak Current of Various BLE Radios
1600
1,600
CY (18.6mA) 15mA 12mA 9mA 6mA
1,400
1400
Average Current (A)
1,200
1200
1,000
1000
800
600
400
200
200
0
0
88ms 50ms
50 100ms
100 500ms
500 1000ms
1,000 2000ms
2,000 4000ms
4,000
Connection Interval (ms)
Assumptions: BLE Stack Processing Time 500 s; Crystal PPM 50 ppm
The effect of RF Peak Current diminishes when connection intervals exceed 50 ms

Rev 0 1/9/15
BLE Architecture Overview: Controller
A standard-defined interface between the Host and the Controller, allowing data exchange between the two.
The part in the controller is typically called the lower-host controller interface; the part in the host is typically
called the upper-host controller interface.
Link Layer (LL)

Implements key procedures to establish a reliable physical link.
Has two types of channels: advertising channels and data channels.
The LL functions include:
Advertising, scanning, creating and maintaining connections
24-bit CRC and AES-128-bit encryption for secure data
Adaptive Frequency Hopping (AFH) for data channels to ensure robustness
Direct Test Mode (DTM)

Allows a tester to command the Controllers Physical Layer to transmit or receive a sequence of test packets

Transmits or receives data at 1 Mbps using GFSK modulation in the 2.4-GHz ISM Band
Consists of 40 RF channels (37 for data, 3 for advertisement) in the ISM Band with 2-MHz channel spacing
Link Layer (LL) Data Packet Structure BLE Architecture: Controller
8 32 8 8 0 to 296 24 Bits
Host Control Interface
Preamble
Header
Length
Access Data Controller Link Layer (LL) Direct Test Mode (DM)
CRC
Address
Rev 0 1/9/15
BLE Architecture Overview: Host
Logical Link Control and Adaptation Protocol (L2CAP)
Provides protocol multiplexing, Segmentation, and Reassembly Services to the upper-layer protocols
Segmentation breaks the received data packets into smaller packets which the LL can transmit
Reassembly combines the smaller packets received from the LL into a meaningful data packet
Each L2CAP packet contains a 32-bit header followed by its payload, and packet length must be included
in the header assumed segmentation and reassembly is used
L2CAP has multiple channels and channel Identifier is included in packet header
Bluetooth 4.1 also allows direct data channels through L2CAP connection-oriented channels
Security Manager (SM)

Defines the methods used for pairing2, encryption and key distribution
BLE uses 128-bit AES for data encryption
L2CAP Packet Structure BLE Architecture: Host

2 2 0 to 65535 Bytes
Channel
Length
Information Payload Generic Attribute Protocol (GATT)

ID
Host
Attribute Protocol (ATT) Security Manager (SM)
Logical Link Control and Adaption Protocol (L2CAP)
1 Alternate MAC PHY

2 A process to establish secure, authenticated BLE connections
Rev 0 1/9/15
BLE Architecture Overview: Attribute
Attributes are the smallest elements in the BLE spec that represent data.
Each Attribute consists of:
Handle: A 16-bit address assigned by the Attribute Server allowing its Client to access the Attribute
Type: Specifies the type of data, such as temperature, pressure, volume, power, etc. represented by a
128-bit full Universal Unique Identifier (UUID) or 16-bit short UUID. Any derived UUID can be recombined
with 16-bit number and Bluetooth base UUID defined by Bluetooth SIG.
The Bluetooth base UUID is defined as 00000000-0000-1000-8000-00805F9B34FB
Value: The actual data exposed by a device
Each Attribute has permissions, which are split into three types: access permissions, authentication
permissions and authorization permissions
Structure of an Attribute
2 2 or 16 0 to 512 Bytes
Attribute Handle Attribute Type Attribute Value
Rev 0 1/9/15
BLE Profiles and Services Supported
Acronym Profile Acronym Profile
ANP Alert Notification Profile HRP Heart Rate Profile
ANS Alert Notification Service HRS Heart Rate Service
BAS Battery Service IAS Immediate Alert Service
BLP Blood Pressure Profile LLS Link Loss Service
BLS Blood Pressure Service LNP Location and Navigation Profile
CPP Cycling Power Profile LNS Location and Navigation Service
CPS Cycling Power Service NDCS Next DST Change Service
CSCP Cycling Speed and Cadence Profile PASP Phone Alert Status Profile
CSCS Cycling Speed and Cadence Service PASS Phone Alert Status Service
CTS Current Time Service PXP Proximity Profile
DIS Device Information Service RSCP Running Speed and Cadence Profile
FMP Find Me Profile RSCS Running Speed and Cadence Service
GLP Glucose Profile RTUS Reference Time Update Service
GLS Glucose Service ScPP Scan Parameters Profile
HOGP HID over GATT Profile ScPS Scan Parameters Service
HIDS Human Interface Device Service TIP Time Profile
HTP Health Thermometer Profile TPS TX Power Service
HTS Health Thermometer Service
Learn more about BLE Profiles and Services: https://www.bluetooth.org/en-us/specification/adopted-specifications

Rev 0 1/9/15
BLE Component: General Tab
Allows configuration of the BLE Component
Supports loading and saving of custom configuration in XML1 format
Profile Mode
Enables selection of the target BLE Profile from a list of supported Profiles
Supports all Bluetooth SIG Profiles BLE Component Configuration Tool: General Tab
Supports creation of custom Profiles
Profile Roles (GATT)

Supports Client, Server, Client and Server
GAP Roles
Supports Peripheral, Central, Broadcaster,
Observer, Peripheral and Central
Host Controller Mode

Allows communication with a BLE Stack by
placing the Component in HCI2 mode using
an embedded UART Component
1 Extensible Markup Language file format

2 A standard-defined interface between the Host and the Controller, allowing data exchange between the two
Rev 0 1/9/15
BLE Component: Profiles Tab
Configures BLE Profile parameters
All Profiles must also have a mandatory Generic Access Service and a Generic Attribute Service
Supported Services
Alert Notification Service BLE Component Configuration Tool: Profiles Tab
Battery Service
Blood Pressure Service
Cycling Power Service
Cycling Speed and Cadence Service
Current Time Service
Device Information Service
Glucose Service
Human Interface Device Service
Health Thermometer Service
Heart Rate Service
Immediate Alert Service
Link Loss Service
Location and Navigation Service
Next DST Change Service
Phone Alert Status Service
Running Speed and Cadence Service
Reference Time Update Service
Scan Parameters Service
TX Power Service Standard and custom BLE Profiles are easily implemented using the BLE Component
Configuration Tool
Custom Service
Rev 0 1/9/15
BLE Component: GAP Settings Tab
Allows you to use GAP parameters to configure:
Advertising settings and timing parameters
Advertisement packets
Scan response packets
BLE Component Configuration Tool: GAP Settings Tab
Enables configuration of:
General settings
Device name, device address and power level
Security requirements
Security modes and levels
I/O capabilities
Pairing and Bonding requirements
Rev 0 1/9/15
PRoC BLE Kits
Choose the right development kit or a reference design kit (RDK)
BLE Pioneer Kit PRoC BLE Module Remote Control RDK Touch Mouse RDK
Kit Number CY8CKIT-042-BLE CY5671 CY5672 CY5682
Key Features Arduino-compatible FCC1 certified Integrated trackpad 6 functional keys
CapSense slider 2.6 cm x 4.3 cm 2-finger gesture 1-finger gesture
Includes: Onboard antenna Voice commands HID Profile
Base board 3-axis accelerometer
PRoC BLE module 3-axis gyroscope
PSoC 4 BLE module HID Profile
Applications Evaluation board Low-cost BLE connectivity Remote control Mouse

Keyboard Touch mouse
DVK or RDK Price $49 $5 $49 $49
PRoC BLE provides a portfolio of kits to accelerate your time-to-market

1 Electronic products manufactured or sold in the U.S. certifying that its electromagnetic interference
is under limits defined by the Federal Communications Commission (FCC)
Rev 0 1/9/15
Why CapSense Just Works
High SNR enables CapSense to exceed requirements for robust performance
Enables system designs with an SNR >100:1, greater than the International Electrotechnical Commission (IEC)
requirement of 5:1
Enables designs with thick or curved overlays Radiated Immunity Test Room
Enables advanced features such as glove touch and stylus touch support Radiating
Antenna
Parasitic Glove CapSense SNR
Test Parameter Capacitance Overlay Thickness (IEC Spec = 5:1)
Reference 10 pF 1.0 mm None 150:1

Thick Overlay 10 pF 2.0 mm None 73:1
CapSense
Glove Touch 10 pF 1.0 mm 4 mm 37:1 Test Board
Thick Overlay 10 pF 2.0 mm 4 mm 25:1
Cypress setup to test the EMI
and Glove Touch tolerance of CapSense buttons
Radiated Emission Test Data
Noise immunity: CapSense meets all of the IEC standards
Electric Field Strength (dBV/m)

70
IEC Standard Description IEC Standard Requirement CapSense 60
50
61000-4-3/6-1 Radiated immunity SNR > 5:1, 10:1 SNR, IEC 61000-6-3 limit
40
(80 MHz to 2.4 GHz) No false trigger, > 10V/m No false triggers
30
61000-6-3 Radiated emission 30.0 dBV/m, 30-230 MHz < 25 dBV/m 20
37.5 dBV/m, 230-1,000 MHz < 37 dBV/m 10 Actual CapSense data
0
30 100 1,000
Frequency (MHz)
CapSense just works because of high SNR and rigorous testing
Rev 0 1/9/15
CapSense Works Under Liquids
CapSense maintains touch accuracy in wet conditions by using:
A shield electrode to eliminate false touches from water droplets, mist and other liquids
A guard sensor to eliminate false touches from streaming liquids or submersion
Liquid-Tolerant CapSense Sensor Layout
Guard Shield electrodes are copper fills around sensors that offset
Sensor liquid droplets; guard sensors are
copper traces that offset streaming liquids
Shield
Sensor Sensor
Electrode
Raw Count1 Without a Shield Electrode Raw Count With a Shield Electrode CapSense Works Under Liquids
Finger Water Finger

Touch Droplet Touch
Touch Touch
Threshold Threshold
Water
Droplet
Noise Floor
Noise Floor
The raw count generated by a water droplet The raw count generated by a water droplet CapSense buttons even work under spaghetti
exceeds the touch threshold, causing a false is below the touch threshold; therefore, there sauce
touch is no false touch
1A raw count is a digitized value of the capacitance of a proximity sensor
Rev 0 1/9/15
CapSense Proximity Sensing
Capacitive proximity sensors sense an object without an actual touch
A capacitive proximity sensor is used to measure the change in capacitance between a pin and ground
A hand near a capacitive proximity sensor increases the measured capacitance
CapSense algorithms and analog circuitry convert the measured analog capacitance to a digital raw count1
A hand is detected when the raw count exceeds a user-defined proximity sensing threshold
Proximity Sensor Without Proximity Sensor With Raw Count Variation With
A Hand2 Nearby A Hand Nearby A Hand Nearby
3660
3640
No Hand Hand No Hand
40,600
3620
Signal
3600
Proximity Sensing
Threshold
40,400
Raw Count
3580
Overlay Overlay CFP
3560
Copper Proximity Copper Copper Proximity Copper
40,200
Ground Sensor Ground Ground Sensor Ground 3540
CP CP CP CP 3520
PCB PCB Noise
40,000
3500
3480
Baseline
CX = 2CP CX = 2CP + CFP 3460
0 0 200 400
400 600 800
800 1000 1,200
1200 1400 1,600
1600
CX = Total capacitance measured by the CFP = Capacitance added to the system Time (ms)
capacitive proximity sensing system by a nearby hand The raw count increases when a hand
CP = Parasitic capacitance3 CFP is dependent on the overlay material, overlay approaches a proximity sensor
thickness, size of the sensor and the distance of
the hand from the sensor
1A raw count is a digitized value of the capacitance of a proximity sensor

2A hand is used here as an example. Capacitive Proximity Sensing will work with any object that can absorb or create an electrical charge (includes both metallic and non-metallic objects)
3 The intrinsic capacitance of printed circuit board (PCB) traces or other connections to a capacitive proximity sensor
Rev 0 1/9/15
Bluetooth Compliance and Listing
Cypresss BLE solutions are qualified by the Bluetooth SIG with modular certification for
the RF-PHY, Link Layer and BLE Stack allowing for greater flexibility.
QD ID Declaration ID Name Product Product Type Spec Date
CYBL10X6X,
63683 D025069 CSP package Bluetooth Smart device End Product 4.1 02-Dec-2014
PSoC 4XX7_BLE
CYBL10X6X,
62887 D024757 QFN package Bluetooth Smart device End Product 4.1 08-Nov-2014
PSoC 4XX7_BLE
PRoC BLE,
62245 D024754 CYBLE RF-PHY (QFN) Component (Tested) 4.1 07-Nov-2014
PSoC 4 BLE
PRoC BLE,
63368 D025068 CYBLE RF-PHY (CSP) Component (Tested) 4.1 02-Dec-2014
PSoC 4 BLE
PRoC BLE,
62243 D024755 CYBLE Link Layer Component (Tested) 4.1 07-Nov-2014
PSoC 4 BLE
PRoC BLE,
61908 D024756 CYBLE Host Component (Tested) 4.1 07-Nov-2014
PSoC 4 BLE
Bluetooth Adopter Membership (Free): Develop, Qualify, List and Sell Bluetooth Products
Free Membership; Product Listing Fee: $4,000 USD
Includes the license to build products using Bluetooth technology
Includes the license to use the Bluetooth trademarks in your products
Includes a license to the Profile Tuning Suite (PTS), a protocol and interoperability testing tool
Rev 0 1/9/15
BLE vs. Other RF
Type Data Rate Range Frequency Standard Solution Cost
Proprietary Low: 10s Kbps 10 m-1 km+ 433 kHz No $
Proprietary Low: 100 Kbps 3-100 m 900 MHz No $$
Proprietary Med: 1s Mbps 3-100 m 2.4 GHz No $$
NFC Low: 100s Kbps 4 cm 13.56 MHz Yes $
WiFi High: 100s Mbps 100 m-1 km+ 2.4/5 GHz Yes $$$
Bluetooth Med: 3 Mbps 10-100m 2.4 GHz Yes $$
BLE Med: 1 Mbps 10-50m 2.4 GHz Yes $
Rev 0 1/9/15

Cypress Intro To BLE System Design

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Cypress Intro To BLE System Design

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PSoC 4 BLE Customer Training Workshop:

Easily Design Low-Power, Wireless Systems for the

Software Tool Version File Name

CySmart2 1.0 (or newer) CySmartSetup.exe

BLE Pioneer Kit 1.0 (or newer) CY8CKIT042BLEKITSetupOnlyPackage_RevSA.exe

BLE Lab Exercises Rev ** n/a (Unzip BLEWorkshop.zip to your laptop)

Raise your hand if you need help!

1 PSoC Integrated Design Environment (IDE)

Bluetooth Low Energy (BLE)

Bluetooth Smart Ready

Antenna Matching Network (AMN)

BLE Protocol Stack (BLE Stack)

BLE Profile (Profile)

Programmable Analog Block

Programmable Digital Block

Universal Digital Block (UDB)

Continuous Time Block (CTBm)

Sensor-based systems connect the real world to the IoT

BLE is the de facto low-power wireless standard for the IoT

IoT products require sensor-based BLE systems

Example BOM Cost for a Multi-Chip IoT Solution1

BLE MCU $1.92

Balun for BLE Radio $0.33

AFE Opamps $0.24

AFE Instrumentation Amplifier $1.02

CapSense Touch Controller $0.47

Total Solution Cost $3.98

Active Sleep Active Deep-Sleep

Typical AMN Bluetooth Specification 4.1

Requires 9 external components 7 volumes, 2,684 pages

BLE MCU BLE 4.1 Spec

Electrode2 VREF2 Accelerometer CapSense BLE

Features Opamp SAR1

Programmable Interconnect and Routing

Advanced High-Performance Bus (AHB)

Programmable Analog Blocks

Programmable Digital Blocks TCPWM3 x4

Four Universal Digital Blocks (UDB2s): custom digital peripherals

Active Sleep Active Deep-Sleep

Cypresss AMN Vendor As AMN example Vendor Bs AMN example

2 external components 7 external components 9 external components

2 2. Drag and drop Component

6 4 3 5. Codesign your application

6. Use the Getting Started with

BLE Component Icon

Right-click the BLE

BLE Modules (2)

BLE USB Dongle BLE USB Dongle

Arduino Compatible I/O BLE Module Header PCB Wiggle Antenna

PSoC 5LP for Program CapSense Slider PSoC 4 BLE

BLE Pioneer Kit

ARM Pin Blue

1 Represents the logical pin placement at Port 3, Pin 7 in PSoC Creator

Heart rate sensor data

Discover & Connect

Sensor Data structure, Find, Read

Service Data bearer, Security

Logical channel - L2CAP PDUs

Physical/Logical Link - packets

Physical channels - Symbols

Generic Access Profile (GAP)

functionality Logical Link Control and Adaption Protocol

Host Control Interface (HCI)