Professional Documents
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* Rethinking the Internet of Things: A Scalable Approach to Connecting Everything, Francis daCosta
2010 Mentor Graphics Corp. Company Confidential
EDPS 2016 Keynote - S. Leef - April 2016 www.mentor.com
DRIVING FORCES BEHIND IOT
220M
Multiple processors 2000
Transistors
Itanium 2
42M
Transistors
Pentium III
1997
7.5m+
Transistors
1995 Pentium II
5.5M+
Transistors
1993 Pentium Pro
3.1M+
Transistors
Pentium
1989
1,290,000
Transistors
1985 486
275,000
Transistors
1982 386
1979 134,000
29,000 Transistors
Transistors 286
8088
3G/4G/LTE
Bluetooth
Wi-Fi
Encryption
Compression
Navigation
Speech Processing
Audio/Video
Motion Detection
Voice Telephony
Internet Access
Gaming
Search
Integrated and
Connected Systems
Multiprocessing
Gigabit,
Non-volatile
Memory
Digital Signal
Processing
Microprocessor
Packaged IC
Consumer
Communications Energy
SW Medical
Desktop 42M SW Industrial
Computer Transistors Automotive
Military & SW Aerospace
Aerospace 1,290,000
Transistors
29,000
Transistors Pentium 4
SW
SW SW
486
8088
Source: http://uk.businessinsider.com/internet-of-everything-2015-bi-2014-12?op=1
Application App
App
Mobile
Content
App
App
garage
control
access App App
App app
UI App
App
App
App
App
Private interface
changing, its morphing into a
App
Internet
connected IoT end node
Middleware
Linux API MobileOS API Private interface
Remote Large
Mobile conduit
Linux
OS Attack Surface
Private interface
HAL HAL
Internet
Hardware
WiFi
Memory Memory
CPU
Application
Processor
CPU
Sensors
Baseband
Processor
Ethernet
Actuators
Radio / WiFi
INTERNET OF THINGS
Cisco
$14.4 Trillion
IDC
$8.9 Trillion
$300 Billion
to Machina Research
$4.5 Trillion
$14.4 Trillion
Gartner Research
Infosys* $1.9 Trillion
$300 Billion
*By 2017
Where
Domain expertise
meets
Mobility, Sensors
Limitless storage
Infinite compute power
Pervasive internet access
2010 Mentor Graphics Corp. Company Confidential
EDPS 2016 Keynote - S. Leef - April 2016 www.mentor.com
IoT Health Care Application
Memory, Storage
Local Compute,
Connectivity
XMPP, HTTPS
SCALABLE BACKEND
WIRELESS DEVICE
Sensors
Local Compute
Connectivity
Actuators
GATEWAY
WIRED DEVICES WIRELESS DEVICES
USB, Ethernet & SENSOR NODES
WiFi, BLE
MQTT
TV/DISPLAY
HDMI, LVDS
Wireless Gateway
Networking Switch 802.11ac & BLE
Optional On-Premise
802.15.4 Server - On the
(ZigBee/6LowPAN) Edge of the Cloud
M2M IoT
Counterfeiting/Trojans Hardware
IoT ~50 Billion
~2 Billion
Source: Information Week, June 7, 2006 & Business Insider, July 24th 2013
Design Specification
RTL Coding
3rd Party IP
and Code Reuse
Functional Verification
Logic Synthesis
Complicated
3rd Party Scripts
Gate Level Simulation
Control Bus
System
IP blocks verified for functionality
Bus
A key question NOT asked is: Address Bus
Does this block do Data Bus
UART
anything ELSE?
Cybersecurity
Co-processor
Untrusted
Network
VPN for
Trusted Silicon
Untrusted
SoC RTL
DFS DFS DFS DFS
DFS Gen
DFT
(IJTAG Std.)
Physical
ATPG
JTAG Connectivity Other I/F Connectivity
Operations
D Enrollment Categorization Provisioning Validation
Server F
DB S
*Schuttle or Volume
Tape-out Production* AUTHENTICATION-enabled Applications
Per Design $ Per Part $ Per Transaction $
Mentor Graphics Corp. Company Confidential
www.mentor.com
EDPS 2016 Keynote - S. Leef - April 2016
Security Subsystem
IP1
Connectivity Interface
Other middleman between SoC & Server
JTAG
CPU I/F
Decoder
Holds decoded values that
enable/disable IPs or lock
Authentication Hardware
Memory Validates fingerprint in response to
portions of internal logic.
server providing a unique FP-Code
These are unique per Chip.
DFS Protocol
IP3 Odometers
Holds Part Usage Info
Security Block Fingerprint ID
Depending upon user- CPU Config Code
driven configuration Other Codes Maintains Public Data
and end application Enabled OTP Memory Data is decoded to authenticate
the SoC or provision its features
commodity IP
(not to scale)
BIG
DATA