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  • Design of Low Power Test Pattern Generator Using Buffers

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    antonytechno
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    Most of the pattern generators used for BIST are sequential circuits consisting of flip-flops. LFSR is one of the most widely used pattern generators comprising of a series of flip-flops with additional xor taps. The use of flip-flops in circuits increases circuit complexity, propagation delay, power consumption and requirement of additional external signals such as reset and clock. Here in this paper we propose a new combinational architecture for pattern generator which constitutes only few logic gates and not flip-flops. Thus this method aids in providing an efficient and effective way in greatly reducing power consumption, delay and complexity.

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    Design of Low Power Test Pattern Generator using Buffers

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    Most of the pattern generators used for BIST are sequential circuits consisting of flip-flops. LFSR is one of the most widely used pattern generators comprising of a series of flip-flops with additional xor taps. The use of flip-flops in circuits increases circuit complexity, propagation delay, power consumption and requirement of additional external signals such as reset and clock. Here in this paper we propose a new combinational architecture for pattern generator which constitutes only few logic gates and not flip-flops. Thus this method aids in providing an efficient and effective way in greatly reducing power consumption, delay and complexity.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    6 views1 page

    Design of Low Power Test Pattern Generator Using Buffers

    Uploaded by

    antonytechno
    Most of the pattern generators used for BIST are sequential circuits consisting of flip-flops. LFSR is one of the most widely used pattern generators comprising of a series of flip-flops with additional xor taps. The use of flip-flops in circuits increases circuit complexity, propagation delay, power consumption and requirement of additional external signals such as reset and clock. Here in this paper we propose a new combinational architecture for pattern generator which constitutes only few logic gates and not flip-flops. Thus this method aids in providing an efficient and effective way in greatly reducing power consumption, delay and complexity.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 1

    International Conference on Intelligent Computing and Systems 34

    International Conference on Intelligent Computing and Systems 2017 [ICICS 2017]

    ISBN 978-81-933235-5-7 VOL 01


    Website icics.asia eMail icics@asdf.res.in
    Received 10 January 2017 Accepted 28 - January 2017
    Article ID ICICS067 eAID ICICS.2017.067

    Design of Low Power Test Pattern Generator using


    Buffers
    Dinesh Kumar S1, P Gomathi2
    1 2
    Assistant Professor, Professor, Department of ECE, NSN College of Engineering and Technology, India
    Abstract: Most of the pattern generators used for BIST are sequential circuits consisting of flip-flops. LFSR is one of the most widely used pattern
    generators comprising of a series of flip-flops with additional xor taps. The use of flip-flops in circuits increases circuit complexity, propagation delay,
    power consumption and requirement of additional external signals such as reset and clock. Here in this paper we propose a new combinational
    architecture for pattern generator which constitutes only few logic gates and not flip-flops. Thus this method aids in providing an efficient and effective
    way in greatly reducing power consumption, delay and complexity.
    ISBN 978-81-933235-5-7 VOL 01
    Website icics.asia eMail icics@asdf.res.in
    Received 10 January 2017 Accepted 28 - January 2017
    Article ID ICICS068 eAID ICICS.2017.068

    Improvement of Ergonomic Factors in a Textile Industry:


    A Case Study
    K Balasundaram1, Ashenafi Adugna2, A Ashok Kumar3, M S Senthil Kumar4
    1,2,4
    Department of Industrial Engineering, Institute of Technology, Dire Dawa University, Dire Dawa, Ethiopia
    3
    Department of Textile Engineering, Institute of Technology, Dire Dawa University, Dire Dawa, Ethiopia
    Abstract: In industry, ergonomics is an important aspect. The ergonomic factors play an important role in the effective running of a company, so
    these factors are to be considered seriously. In industry, the various aspects of ergonomic are to be considered that relates with the employees; while
    working. The ergonomic problems will affect the workers in a negative way; this will lead to a decrease in productivity, non-achievement of the target
    value, etc. A case study conducted on a textile industry, located in Dire Dawa, Ethiopia. The main aim of this study is to find out the ergonomic
    problems that affect employees in a weaving unit and also survey is conducted to know the response of the employees about the working conditions
    provided by the company. According to this study, the responses of the employees are obtained and ergonomic factor that has the highest responses are
    selected and suggestions are given to improve the factors.

    This paper is prepared exclusively for International Conference on Intelligent Computing and Systems 2017 [ICICS 2017] which is published by ASDF
    International, Registered in London, United Kingdom under the directions of the Editor-in-Chief Dr M Sivaraja and Editors Dr. Daniel James, Dr. Kokula Krishna
    Hari Kunasekaran and Dr. Saikishore Elangovan. Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted
    without fee provided that copies are not made or distributed for profit or commercial advantage, and that copies bear this notice and the full citation on the first
    page. Copyrights for third-party components of this work must be honoured. For all other uses, contact the owner/author(s). Copyright Holder can be reached at
    copy@asdf.international for distribution.

    2017 Reserved by Association of Scientists, Developers and Faculties [www.ASDF.international]

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