Thermostructural

analysis of a 8 Pin
Small-Outline Integrated
Circuit (SOIC)

Challenge
The challenge was to perform a thermostructural analysis of
a 8 pin (SOIC) chip with applied heat flux on the main chip
core surfaces.

Simulation
The geometry is a simplified version of a front landing gear
configuration of a commercial aircraft. The domain was meshed
using the Snappy-Hex-Mesh on the SimScale platform. The
resulting mesh consists of approximately 1.8 million nodes and
is shown in the figure below.

Above: Thermodynamic analysis of a 8 Pin SOIC chip.

Electronic chips are commonly

used in wide range of The geometry was meshed using parametrized tetrahedralization

electronic circuits. Power loss on SimScale platform. The mesh is shown in the figure below.

normally occurs in these chips

due to the rise in temperature
which decreases their
efficiency. The project shows
the thermostructural analysis
of a 8 pin (SOIC) chip with
applied heat flux on the main
chip core surfaces.

Simulation in your browser

Analysis set-up and results
For the analysis steady state thermostructural was selected
since surface heat flux was considered to be static.

Ceramic was selected as a material for the chip whereas

copper was selected for its pins. A convective heat flux
of 18 W/(m K) was applied on all the outer faces of the
chip. From bottom, pins were fixed in all directions and a
surface heat flux of 8000 W/m (0.16 W (heat loss)/2e-5 m
(surface area) was applied on the top and bottom face of
the middle core.
Above: The heat flux produced in the chip
The figures below shows the temperature, heat flux and
vonMises stress produced in the chip. It can be seen that
the power loss of only 0.16 W can lead to a temperature
increase of 516 K (243 C)

Above: The temperature of the chip

Above: An example of a 8 Pin SOIC chip.

Above: The stress on the chip

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