1.

Introduction:

In his project we proposed a different Arithmetic and Logical unit (ALU) using Vedic
and Wallace Tree Multiplier. The proposed ALU is having less delay and area when compared to
the other existing ALU.

Now days we have entered in the digital domain where the digital signal processing is of
main concern. Todays CPUs are increasingly working at higher frequencies with reduction in
size of transistors. Arithmetic and Logic Unit is one of the most important and critical blocks in
the CPU. Hence it is imperative to have fast and efficient ALU. ALU is the most important unit
in Microprocessor/Microcontroller and CPU that performs basic Arithmetic operations like
Addition, Subtraction, Multiplication and Logical operations. Mostly in all of the ALUs the
Logical operations are performed with the use of Pipelining and Parallel processing Approach.
Thats why, if the multiplexers delay doesnt taken into account which is used to integrate these
logic gates, then delay of the all the Logical operations is of only one gate Delay. So there is not
much Delay problem regarding the Logical Operations. But this problem is highly concerned
with the Arithmetic Operations. Thats why we have designed a Speed optimized Arithmetic unit
for the ALU. Multiplication is the most time consuming amongst the basic mathematical
calculation performed by arithmetic unit. With these considerations, it is always important to
have fast and efficient mechanism to implement the multiplication function. In this Vedic
Urdhva Triyambakam formula can be used, which is devised by Jagadguru Bal Krishna Tirtha Ji
Maharaj. This is also called as Mental Multiplication technique as it is faster than conventional
approaches. This is illustrated by an example, show below. Syntax of two digit Vedic
multiplication

1.2 Motivation:

ALU One of the most critical functions carried out by CPU. Digital multiplication is the
most extensively used operation (especially in signal processing), people who design digital
signal processors sacrifice a lot of chip area in order to make the multiplication as fast as
possible. Innumerable schemes have been proposed for realization of the operation.

1.3 ABOUT ALU:

Microprocessors/Microcontrollers have a single module that performs arithmetic

operations on integer values. This is because many of the different arithmetic and logical
operations can be performed using similar (if not identical) hardware. The component that
performs the arithmetic and logical operations is known as the Arithmetic Logic Unit, or ALU.
The ALU is one of the most important components in a microprocessor, and is typically
the part of the processor that is designed first. Once the ALU is designed, the rest of the
microprocessor is implemented to feed operands and control codes to the ALU.
 Figure 1.1 : ALU symbolic representation

1.3.1 Signals:

An ALU has a variety of input and output nets, which are the electrical conductors used
to convey digital signals between the ALU and external circuitry. When an ALU is operating,
external circuits apply signals to the ALU inputs and, in response, the ALU produces and
conveys signals to external circuitry via its outputs.

a. Data:
A basic ALU has three parallel data buses consisting of two input operands (A and B) and
a result output (Y). Each data bus is a group of signals that conveys one binary integer number.
Typically, the A, B and Y bus widths (the number of signals comprising each bus) are identical
and match the native word size of the external circuitry (e.g., the encapsulating CPU or other
processor)
b. Opcode:
The opcode input is a parallel bus that conveys to the ALU an operation selection code,
which is an enumerated value that specifies the desired arithmetic or logic operation to be
performed by the ALU. The opcode size (its bus width) is related to the number of different
operations the ALU can perform; for example, a four-bit opcode can specify up to sixteen
different ALU operations. Generally, an ALU opcode is not the same as a machine language
opcode, though in some cases it may be directly encoded as a bit field within a machine language
opcode.
c. Status:
The status outputs are various individual signals that convey supplemental information
about the result of an ALU operation. These outputs are usually stored in registers so they can be
used in future ALU operations or for controlling conditional branching. The collection of bit
registers that store the status outputs are often treated as a single, multi-bit register, which is
referred to as the "status register" or "condition code register". General-purpose ALUs
commonly have status signals such as:

Carry-out, which conveys the carry resulting from an addition operation, the borrow
resulting from a subtraction operation, or the overflow bit resulting from a binary shift
operation.
Zero, which indicates all bits of output are logic zero.
Negative, which indicates the result of an arithmetic operation is negative.
 Overflow, which indicates the result of an arithmetic operation has exceeded the numeric
range of output.
Parity, which indicates whether an even or odd number of bits in the output are logic one.
The status input allows additional information to be made available to the ALU when performing
an operation. Typically, this is a "carry-in" bit that is the stored carry-out from a previous ALU
operation
The arithmetic and logic unit (ALU) performs all arithmetic operations (addition,
subtraction, multiplication, and division) and logic operations. Logic operations test various
conditions encountered during processing and allow for different actions to be taken based on the
results. The data required to perform the arithmetic and logical functions are inputs from the
designated CPU registers and operands. The ALU relies on basic items to perform its operations.
These include number systems, data routing circuits (adders/subtractors), timing, instructions,
operands, and registers. Figure 1.1 shows a representative block diagram of an ALU. An ALU
loads data from input registers, an external Control Unit then tells the ALU what operation to
perform on that data, and then the ALU stores its result into an output register. The Control Unit
is responsible for moving the processed data between these registers, ALU and memory.

Figure1.2: ALU Architecture

An ALU must process numbers using the same format as the rest of the digital circuit. The
format of modern processors is almost always the two's complement binary number
representation. Early computers used a wide variety of number systems, including ones'
complement, two's complement sign-magnitude format, and even true decimal systems, with ten
tubes per digit.
 ALUs for each one of these numeric systems had different designs, and that influenced
the current preference
for two's Arithmetic operations Logical operations complement,
Addition And
as this is the
Subtraction Or
Multiplication Not
Division Nand
Remainder Nor
Modulus Xor
Unary addition
Unary subtraction
Exponential
representation that makes it easier for the ALUs to calculate additions and subtraction.

Most ALUs can perform the following operations:

Bitwise logic operations (AND, NOT, OR, XOR, NAND, NOR)

Integer arithmetic operations (addition, subtraction, and sometimes multiplication and
division, though this is more expensive).
Other operations like greater than, equal to, exponential, modulus etc.
1.3 THE VARIOUS OPERATIONS:

1.3.ARITHMETIC OPERATIONS:

ADDITION
Addition is the basic operation of arithmetic. In its simplest form, addition combines two
numbers, the addends or terms, into a single number, the sum of the numbers. Adding more than
two numbers can be viewed as repeated addition; this procedure is known as summation and
includes ways to add infinitely many numbers in an infinite series; repeated addition of the
number one is the most basic form of counting
0101 (decimal 5) + 0011 (decimal 3) = 0100 (decimal 8)

SUBTRACTION
Subtraction is one of the four basic arithmetic operations; it is the inverse of addition,
meaning that if we start with any number and add any number and then subtract the same
number we added, we return to the number we started with. Subtraction is denoted by a minus
sign in infix notation.
MULTIPLICATION
Multiplication is the second basic operation of arithmetic. Multiplication also combines
two numbers into a single number, the product. The two original numbers are called the
multiplier and the multiplicand, sometimes both simply called factors.

DIVISION
Division is essentially the opposite of multiplication. Division finds the quotient of two
numbers, the dividend divided by the divisor. Any dividend divided by zero is undefined. For
positive numbers, if the dividend is larger than the divisor, the quotient is greater than one,
otherwise it is less than one (a similar rule applies for negative numbers). The quotient multiplied
by the divisor always yields the dividend.

REMAINDER
The binary % operator is said to yield the remainder of its operands from an implied
division; the left-hand operand is the dividend and the right-hand operand is the divisor.

5%3 produces 2 (note that 5/3 produces 1)

5 %(-3) produces 2 (note that 5/(-3) produces -1)

(-5)%3 produces -2 (note that (-5)/3 produces -1)

(-5)%(-3) produces -2 (note that (-5)/(-3) produces 1)

MODULUS
In computing, the modulo operation, sometimes also called "remainder" or "rest", gives
the remainder of a division. It finds the remainder of division of one number by another. Given
two numbers, a (the dividend) and n (the divisor), a modulo n abbreviated as a mod n) is the
remainder, on the division of a by n. For example, if you divide 7 by 3, 3 goes into 7 two times.
But there is a remainder of 1, and that is the result of the modulo operation.

UNARY ADDITION/ SUBTRACTION

Unary addition and subtraction operators are unary operators that add or subtract one
from their operand, respectively. They are commonly implemented in imperative programming
languages. The increment operator increases the value of its operand by 1. The operand must
have an arithmetic data type, and must refer to a modifiable data object. Similarly, the decrement
operator decreases the value of its modifiable arithmetic operand by 1.

EXPONENTIAL
In mathematics, the exponential function is the function ex, where e is the number
(approximately 2.718281828) such that the function ex is its own derivative.[1][2] The
exponential function is used to model phenomena when a constant change in the independent
variable gives the same proportional change (i.e., percent increase or decrease) in the dependent
variable. The function is often written as exp (x), especially when it would be impractical to
write the input expression as an exponent.

1.3.2 LOGICAL OPERATIONS

AND
A bitwise AND takes two binary representations of equal length and performs the logical
AND operation on each pair of corresponding bits. In each pair, the result is 1 if the first bit is 1
AND the second bit is 1. Otherwise, the result is 0. For example:
0101 (decimal 5) AND 0011 (decimal 3) = 0001 (decimal 1)
Table 2: AND Gate truth table
A B Y
0 0 0
0 1 0
1 0 0
Figure: AND Gate symbol 1 1 1

OR

A bitwise OR takes two bit patterns of equal length, and produces another one of the
same length by matching up corresponding bits (the first of each; the second of each; and so on)
and performing the logical inclusive OR operation on each pair of corresponding bits. In each
pair, the result is 1 if the first bit is 1 OR the second bit is 1 OR both bits are 1, and otherwise
the result is 0. For example:
0101 (decimal 5) OR 0011 (decimal 3) = 0111 (decimal 7)

Table 3: OR Gate truth table

A B Q
0 0 0
0 1 1
1 0 1
Figure: AND Gate symbol 1 1 1

NOT
The bitwise NOT, or complement, is a unary operation that performs logical negation on
each bit, forming the ones' complement of the given binary value. Digits which were 0 become 1,
and vice versa. For example:
NOT 0111 (decimal 7) = 1000 (decimal 8)

Table 4: NOT Gate truth table

A Q
0 1
1 0
 Figure: AND Gate symbol

NAND
A bitwise NAND takes two binary representations of equal length and performs the
logical NAND operation on each pair of corresponding bits. In each pair, the result is 0 if the
first bit is 1 AND the second bit is 1. Otherwise, the result is 1. For example:
0101 (decimal 5) AND 0011 (decimal 3) = 1110 (decimal 14)
Table 5: NAND Gate truth table
A B Z
0 0 1
0 1 1
Figure: NAND Gate symbol 1 0 1
1 1 0

NOR
A bitwise NOR takes two bit patterns of equal length, and produces another one of the
same length by matching up corresponding bits (the first of each; the second of each; and so on)
and performing the logical inclusive OR operation on each pair of corresponding bits. In each
pair, the result is 1 if the both bits are zero otherwise the result is 0. For example:

0101 (decimal 5) OR 0011 (decimal 3) = 1000 (decimal 8)

Table 6: N0R Gate truth table

A B Z
0 0 1
0 1 0
Figure: NOR Gate symbol 1 0 1
1 1 0

XOR
A bitwise exclusive or takes two bit patterns of equal length and performs the logical
XOR operation on each pair of corresponding bits. The result in each position is 1 if the two bits
are different, and 0 if they are the same. For example:
0101 (decimal 5) XOR 0011 (decimal 3) = 0110 (decimal 6)

Table 7: X0R Gate truth table

A B Y
0 0 1
0 1 0
1 0 0
 1 1 1

Figure: EXOR Gate symbol

XNOR
The XNOR gate (sometimes, EXNOR, ENOR, and, rarely, NXOR, XAND) is a
digital logic gate whose function is the logical complement of the exclusive OR (XOR) gate. The
two-input version implements logical equality, behaving according to the truth table to the right.
A high output (1) results if both of the inputs to the gate are the same. If one but not both inputs
are high (1), a low output (0) results.
Table 7: X0R Gate truth table

A B Y
0 0 1
0 1 0
1 0 0
Figure: XNOR Gate symbol 1 1 1

1.3.3 Bit shift operations:

ALU shift operations cause operand A (or B) to shift left or right (depending on the opcode)
and the shifted operand appears at Y. Simple ALUs typically can shift the operand by only one
bit position, whereas more complex ALUs employ barrel shifters that allow them to shift the
operand by an arbitrary number of bits in one operation. In all single-bit shift operations, the bit
shifted out of the operand appears on carry-out; the value of the bit shifted into the operand
depends on the type of shift.

Arithmetic shift: the operand is treated as a two's complement integer, meaning that the most
significant bit is a "sign" bit and is preserved.
Logical shift: a logic zero is shifted into the operand. This is used to shift unsigned integers.
Rotate: the operand is treated as a circular buffer of bits so its least and most significant bits
are effectively adjacent.
Rotate through carry: the carry bit and operand are collectively treated as a circular buffer of
bits