Electron Manual - EEE (11.07.17)

Electron Devices Lab Manual Department of EEE
CONTENT
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Electron Devices
Lab Manual
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CIRCUIT DIAGRAM FOR P-N JUNCTION DIODE(MULTI SIM)
FORWARD BIAS :
REVERSE BIAS:
CIRCUIT DIAGRAM FOR P-N JUNCTION DIODE(HARDWIRED)
FORWARD BIAS :
(0-25) mA
-I
1k + A F
A
+
1N4007 V vf
VIN (0-3)V
K
RPS (0-30) v
REVERSE BIAS:
(0-500)A
IR
1k + A K
+
1N4007 V VR
VIN A (0-30)V
RPS (0-30) v
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Exp No :
CHARACTERISTICS OF SEMI - CONDUCTOR DIODE
Date :
AIM: -
To draw the V-I characteristics of a p-n junction diode and to find the forward resistance RF and cut-
in voltage using multisim software .
To draw the V-I characteristics of a p-n junction diode and to find the forward resistance RF and cut-
in voltage using hardwired components.
APPARATUS REQUIRED: -
S.No NAME RANGE QUANTITY

1 PN Junction diode IN4007 1
2 Resistor 1K 1
3 Ammeter 0-50 mA, 0-500 A Each 1
4 Voltmeter 0-30V, 0-3V Each 1
5 RPS 0-30V 1
6 Bread board - 1
THEORY: -
When a P and N type semi-conductor are formed together a P-N junction is created. There are two types of
biasing. When a P-type semiconductor is connected to positive terminal of the battery and N-type Semiconductor is
to the negative terminal , the junction barrier vanishes and we get forward current. But When connections are
interchanged the junction barrier increases very much and there is no current flow. But a small value of current, due
to the minority carriers, known as reverse saturation current, is present there.
PROCEDURE: -
1. The connections are made as per the circuit diagram.
FORWARD CHARACTERISTICS:
1. Input supply voltage is varied.

2. The corresponding forward voltage and current are noted.
3. The readings are tabulated and the graph is plotted between the voltage on x-axis and current on y-axis.
4. From the graph the forward resistance RF = Vf/ If cut-in voltage are calculated.
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MODEL GRAPH:-
IF(mA)
Vb
VR (V) VK VF(V)
VK- cut-in voltage

Vb avalanche breakdown voltage
IR(A)
TABULATION(MULTISIM):-
FORWARD BIAS: REVERSE BIAS:
Sl VIN VF IF
.No. (in Volts) (in Volts) (in mA) Sl. VIN VR IR
No. (in Volts) (in Volts) (in A)
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REVERSE BIAS CHARACTERISTICS:
1. The terminals are reversed and the above steps are repeated.
TABULATION(HARDWIRED):-
Sl VIN VF IF
.No. (in Volts) (in Volts) (in mA) Sl. VIN VR IR
No. (in Volts) (in Volts) (in A)
RESULT: -
Thus , the forward and reverse characteristics of a P-N junction diode were plotted and following observations
were made.
MULTISIM HARDWIRED
Forward resistance
Cut-in voltage
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CIRCUIT DIAGRAM FOR ZENER DIODE(MULTI SIM)
FORWARD BIAS:
REVERSE BIAS:
CIRCUIT DIAGRAM FOR ZENER DIODE(MULTI SIM)
FORWARD BIAS:
(0-25) mA
IF
R 1k + A
BZD27- +
V vf
RPS (0-30)V C6V8
k (0-3)V
-
REVERSE BIAS:
(0-25)mA
R 1k IR
+
A
K
BZD27- +
C6V8
RPS (0-30)V V VR
V IN - (0-30)V
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xp No :
CHARACTERISTICS OF ZENER DIODE
Date :
AIM: -
To draw the V-I characteristics of a zener diode and to find the value of forward resistance, cut-
in voltage and breakdown voltage using MULTI SIM.
To draw the V-I characteristics of a zener diode and to find the value of forward resistance, cut-
in voltage and breakdown voltage using Hardwired components.

1. Zener diode B2 68V - 1
2. Resistor 1K 1
3. Ammeter 0-50 mA 1
4. Voltmeter 0-30V, 0-3V Each1
5 RPS 0-30V 1
6 Bread board - 1
THEORY: -
A Zener Diode conducts both in forward and reverse biased condition. In the forward biased condition
it acts like an ordinary P-N Jn diode. But in reverse bias, due to avalanche breakdown at a particular value of
voltage, known as Zener voltage, the current starts increasing abruptly even if the reverse voltage is kept constant.
Hence Zener Diode is used as voltage regulator.
PROCEDURE: -
FORWARD CHARACTERISTICS:
1. current are noted.

2. The readings are tabulated and the graph is plotted between the voltage on x-axis and current on y-axis.
Input supply voltage is varied .
3. The corresponding forward voltage
4. From the graph the forward resistance RF = Vf/ If cut-in voltage are calculated.
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MODEL GRAPH:-
IF(mA)
VF
VZ Rf = IF
VR (v) VK VF(v)
VK- cut-in voltage

VZ zener breakdown voltage
IR(mA)
TABULATION(Multisim):-
VF IF Sl VIN VR IR
Sl VIN
(in (in mA) .No. (in (in (in mA)
.No. (in Volts) Volts) Volts)
Volts)
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REVERSE BIAS CHARACTERISTICS:
1. The terminals are reversed and the above steps are repeated.
TABULATION(Hardwired):-
VF IF Sl VIN VR IR
Sl VIN
(in (in mA) .No. (in (in (in mA)
.No. (in Volts) Volts) Volts)
Volts)
RESULT: -
Thus, the forward and Reverse characteristics of Zener diode were obtained.
MULTISIM HARDWIRED
Forward resistance
Cut-in voltage
Break-down Voltage
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CIRCUIT DIAGRAM:-
(0-50)mA
IC
A+
(0-500)A C +
R 50k IB B
+ A BC107 V VCE
NPN (0-30)V
E
+
V VBE
RPS 0-30 (0-3)V RPS 0-30
VBB VCC
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Exp No :
CHARACTERISTICS OF BJT IN CE MODE.
Date :
AIM :-
To study the input and output characteristics of the given transistor
APPRATUS REQUIRED: -

1 Transistor BC107 1
2 Resistor 50 K 1
3 Voltmeter 0-50V 1
4 Ammeter 0-50 mA, 0-500 A Each 1
5 Bread board - 1
THEORY: -
It is nothing but two junction diodes connected back to back. There is three region named as Emitter,
Base and Collector. The base is lightly doped, collector moderately and emitter heavily. The emitter region is
made larger to dissipate heat energy. The function of emitter region is to inject charge carriers to the base,
which, in turn pass to the collector.
The collector collects the charge carriers from the base or emitter.
PROCEDURE: -
INPUT CHARACTERISTICS:
1 Connections are made as per the circuit diagram.

2 The output voltage VCE is kept constant.
3 By varying the input voltage VBE , the corresponding input currents IB are noted down
4 A graph is plotted between VBE and IB.
5 The inverse slope of the curve gives forward input resistance.
OUTPUT CHARACTERISTICS:
1. Connections are made as per the circuit diagram.

2. The input current IB is kept constant.
3. By varying the output voltage VCE , the corresponding output current IC is noted down.
4. A graph is plotted between VCE and IC .
5. The inverse slope of the curve gives forward output resistance.
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PIN DIAGRAM:
B
Bottom View BC107 Specification: BC107/50V/0.1A,0.3W,300MHz
E C
MODEL GRAPH:-
INPUT CHARACTERISTICS:- OUTPUT CHARECTERSTICS: -
IB ( A) IC(mA)
VCE1 VCE2
IB3
IB2
IB1
VBE (v) VCE(volt)
Tabulation(Multisim):-
INPUT CHARECTERSTICS: - OUTPUT CHARECTERSTICS: -
VCE = --------------- IB =________
VS(volt) VBE(volt) IB( A) VS (VOLTS) IC (mA)

VCE(VOLTS)
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Tabulation(Hardwired):-
INPUT CHARECTERSTICS: - OUTPUT CHARECTERSTICS: -
VCE = --------------- IB =________
VS(volt) VBE(volt) IB( A) VS (VOLTS) IC (mA)

VCE(VOLTS)
RESULT: -
The input and output characteristics of the transistor in CE mode are drawn and the input
and output resistances are calculated.
Input resistance =
Output resistance =
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CIRCUIT DIAGRAM
(0-25) mA
IE
R 1k E
B1
+ A -
+ VE 2N2646
VEE V (0-30)V
B2 VBB -
RPS(0- 30)V RPS(0- 30)V
-
PIN DIAGRAM:
BOTTOM VIEW OF 2N2646:
SPECIFICATION FOR 2N2646:

* Inter base resistance RBB = 4.7 to 9.1 K
* Minimum Valley current = 4 mA

* Maximun Peak point emitter current 5 A
*Maximum emitter reverse current 12 A.
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Exp No :
CHARACTERISTICS OF UJT
Date :
AIM: -
To find the characteristics of UJT and also its negative resistance.
1 UJT 2N2646 - 1
2 Ammeter 0-25 mA 1
3 Voltmeter 0-50V 1
4 Resistor 2.2K 1
5 RPS 0-30V 2
6 Bread board - 1
THEORY: -
UJT is a three terminal semiconductor-switching device. As it has only one junction (p-n) and three
terminal it iscalled so. It consists of a lightly doped n-type silicon bar with a heavily doped p-type Material alloyed
to forma p-n rectifying junction. The ohmic carriers B1 and B2 are attached to it at opposite ends.
PROCEDURE: -

2. VBB was kept fixed and IE was gradually increased by varying VS and the corresponding VE readings are
noted.
3. The same procedure was repeated for other values of VGS.
4. A Graph was drawn keeping VE on y-axis and IE on x-axis.
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MODEL GRAPH:
VE(V)
Vp- peak voltage
VV -valley voltage
VP
VV
IP IV IE (mA)
TABULATION:-
VBB = ____________
Sl.No. VS (volts) VE ( in volts) IE ( in mA )
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CALCULATION: -
Sl.No. VS (volts) VE ( in volts) IE ( in mA )
RESULT: -
Thus the characteristics of UJT was obtained
1. Negative Resistance = -------------------- at Vbb =---------

Negative Resistance = --------------------- at Vbb = ---------
2. Peak Voltage (Vp) = ------------- at Vbb = -----------

Peak Voltage (Vp) = ------------- at Vbb = -----------
3. Valley Voltage(Vv) = ------------ - at Vbb = ----------

Valley Voltage(Vv) = ------------ - at Vbb = ----------
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CIRCUIT DIAGRAM:-
ID
(0-25)mA
R 1k
+ A
D
G BF245A +
s
V VDS
VDD
VGG (0-30)V RPS (0-30)V
RPS (0-30)V
MODEL GRAPH:-
DRAIN CHARACTERISTICS: TRANSFER CHARACTERISTICS:-
ID (mA)
ID (mA)
VGS 1
VGS 2 VdS (Const)
VDS ( V)
VGS (V)
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Exp No :
Date :
DRAIN AND TRANSFER CHARACTERISTICS OF JFET.
AIM: -
To study the drain and transfer characteristics of JFET and find the value of drain resistance
(rd), transfer conductance (gm), and amplification factor( ).
1 JFET BFW10 1
2 Ammeter 0-25 mA 1
3 Voltmeter 0-30V 1
4 Resistor 1K 1
5 RPS 0-30V 2
6 Bread board - 1
THEORY: -
Here, We have two P-type substrates on either side of the n-channel JFET. Now since the
junctions are reverse biased, there are no free carriers left on the P-side for current conduction. However the
current results, when voltages are applied across the n-channel. The depletion region increases with increase in
the voltage VGS. Thus for a fixed Drain to Source voltage it is possible to control the drain current Id.
PROCEDURE: -
The connections are given as per the circuit diagram.
DETERMINATION OF DRAIN CHARACTERISTICS:

1. Voltage VGS is kept at some fixed level.
2. The Drain to Source voltage VDS is varied and the corresponding drain current Id is
noted. The Graph was plotted between VDS on the x-axis and Id on y-axis.
3. The drain resistance (rd) was determined as rd= VDS/ Id
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DETERMINATION OF TRANSFER CHARACTERISTICS:

1. The VDS is kept at some particular value.
2. The Source voltage VGS is varied at some particular level and the corresponding drain current Id was
noted.
3. A graph was plotted between VGS and ID.
4. The transfer conductance value was determined by gm= Id/ VG
PIN DIAGRAM:
BOTTOM VIEW OF BFW10:

SPECIFICATION:
Voltage : 30V, IDSS > 8mA.
VS ( in VGS = VS ( in VDS =
Volts) Volts)
VDS (V) ID ( mA) VGS (V) ID ( mA)
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DETERMINATION OF AMPLIFICATION FACTOR:
Amplification factor = gm*rd
VS ( in Volts) VGS = VS ( in Volts) VDS =

RESULT: -
Thus the Drain and transfer characteristics of the given JFET were studied and the following values
were determined.
a) Drain resistance (rd) =
b) Trans-Conductance (gm) =
c) Amplification factor ( ) =
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Circuit Diagram: -
MODEL GRAPH:-
ID (mA)
ID (mA)
VGS 1
VGS 2 VdS (Const)
VDS ( V)
VGS (V)
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Exp No :
DRAIN AND TRANSFERCHARACTERISTICS OF
Date :
MOSFET
AIM: -
To study and plot the drain and transfer characteristics of MOSFET
1 MOSFET IR150 1
2 Ammeter 0-25 mA 1
3 Voltmeter 0-30V 1
4 Resistor 1K 1
5 RPS 0-30V 2
6 Bread board - 1
THEORY: -
MOSFET is an abbreviation for metal oxide semiconductor filed transistor. Like JFET, it has a source (S),
drain (D) and gate (G). However unlike JFET, the gate of MOSFET is insulated from channel. Because of this,
MOSFET is sometimes known as IGFET(insulated gate FET). Basically MOSFET are of two types 1) depletion type
MOSFET and 2) enhancement type MOSFET.
Enhancement MOSFET has no depletion mode and only operates in enhancement mode. It differs in
construction from depletion type MOSFET in the sense that it has no physical channel. The min gate-source
voltage (VGS), which produces inversion layer, called as threshold voltage.
Drain characteristics for enhancement MOSFET: -
When VGS< (VGS) the no drain current flows. However in actual practice, and extremely small value of
drain current does flow through MOSFET. This current flow is generally due to presence of thermally generated
electron in P type substrate when value of VGS is kept above (VGS) significant drain current flow.
Transfer characteristics of MOSFET: -
When VGS=0 there is no drain current, however if VGS is increased rapidly. The relation gives the drain
current at any instant along the curve.
ID=k [(VGS-VGS)]
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VS ( in VGS = VS ( in VDS =
Volts) Volts)
DETERMINATION OF AMPLIFICATION FACTOR:
Amplification factor = gm*rd
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Procedure: -
DETERMINATION OF DRAIN CHARACTERISTICS:

1. Voltage VGS is kept at some fixed level.
2. The Drain to Source voltage VDS is varied and the corresponding drain current Id is noted. The Graph was
plotted between VDS on the x-axis and Id on y-axis.
3. The drain resistance (rd) was determined as rd= VDS/ Id
DETERMINATION OF TRANSFER CHARACTERISTICS:
1. The VDS is kept at some particular value.

2. The Source voltage VGS is varied at some particular level and the corresponding drain current Id was
noted.
3. A graph was plotted between VGS and ID.
4. The transfer conductance value was determined by gm= Id/ VGS.
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VS ( in Volts) VGS = VS ( in Volts) VDS =

RESULT: -
Thus the Drain and transfer characteristics of the given MOSFET were studied and the following
values were determined.
a) Drain resistance (rd) =
b) Trans-Conductance (gm) =
c) Amplification factor ( ) =
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CIRCUIT DIAGRAM
R 1k
A+
IA
IG A (0-25)mA
(0-25)mA TYN 612
R 1k
+ A G K VAA
+ RPS (0-30)V
V VAK
(0-30)V
VGG
RPS (0-30)V
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Exp No :
CHARACTERISTICS OF SILICON CONTROLLED RECTIFIER
Date :
AIM: -
To plot the characteristics of SCR and also to find the holding voltage VH and the holding
Current IH.

1 SCR TYN612 1
2 Resistor 1K 2
3 Ammeter 0-10mA, 0-25 mA Each 1
4. Voltmeter 0-30V 1
5 RPS 0-30 V 1
6 Bread board - 1
THEORY: -
A SCR has two states, either it conducts heavily or does not conduct. Thus SCR behaves like a switch.To
operate the SCR, the first method is to keep the gate open and make supply voltage equal to breakdown Voltage.
The second method is to operate it with supply voltage less than breakdown voltage and then by means of a
small voltage applied to the gate. Applying a small positive voltage to gate is equivalent to Close the SCR because
the breakdown voltage is usually much greater than the supply voltage. Once SCR starts conducting , there is no
need for any gate pulse.
PROCEDURE: -
1. The connections are given as per the circuit diagram.

2. The gate current Ig is increased until the SCR gets triggered.
3. For that particular value of Ig the anode voltage is varied and the corresponding anode current
Iais noted.
4. The graph between the anode voltage Va on x-axis and the anode current Ia on y-axis are plotted.
5. For the next set of gate current Ig, the above procedure is repeated.
6. From the graph, the holding current IH, holding voltage VH , and breakdown voltage are calculated.
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PIN DETAILS OF SCR:
A - ANODE K - CATHODE
G A K G - GATE
MODEL GRAPH
IA(mA)
IL
IH
VH VBO VAK(V)
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IG = _________________
IG = _________________
S.NO VS (volts) VAK (volts) IA(mA) S.NO VS (volts) VAK (volts) IA(mA)
RESULT: -
Thus the V-I characteristics of SCR was drawn and verified.
Latching current =
Break over voltage =
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SHUNT VOLTAGE REGULATOR
+ RS = 47 IL A ( 0 100 mA )
+ -
IZ
+
R.P.S IZ12 (0 30 V)
( 0-30V ) V RL
- VT
DRB
SERIES (ZENER) VOLTAGE REGULATOR
SL 100 IL ( 0 100 mA )
+ + -
C E A
1K B +
R.P.S (0 30 V)
(0- 30V) RL
IZ 12 - VT
V
DRB
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EXP NO :
SERIES VOLTAGE REGULATOR
DATE :
AIM : To design A voltage regulator using zener diode Vo = 11.5 Vin, IL max = 50 mA. Input voltage
15<Vi<20.
To design voltage regulator using series element such as Vo = 11.5Vin IL max = 100mA, & 15<Vi<25.
APPARATUS REQUIRED :-
SNO APPARATUS RANGE QTY
1 Transistor SL 100 1
2 Resistor 4.7 , 1k Each 1
3 D.R.B - 1
4 Zener diode IZ 12 1
5 Ammeter (0-100mA) 1
6 Voltmeter (0-30V) 1
THEORY :-
ZENER VOLTAGE REGULATOR:-
In a regulator using zener diode , the diode is operated in breakdown condition where the
voltage across zener is nearly constant.Inspite of changes in zener current.So it can be used to regulate voltage
with varying input voltage or varying load condition.
For varying voltage as it varies IZ also varies accordingly but zener diode maintains a
constant voltage across output terminals for a certain range.
SERIES VOLTAGE REGULATOR:-

To overcome limitations of shunt regulator the SVR is used. In SVR the transistor
is series control element while zener diode is reverse biased so that it works in breakdown region and gives
constant output for the base of transistor. Thus the BE junction is always forward biased. The emitter current
is equal to number of current because control element spreads as an ammeter
following so that transistor is in series with the load.
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FORMULA:-

1. Rsmax = Vimin Vz
IL max + Izmax
L
Izmin = 10% of ILmax.
3. Izmax = V L max Vz
Rs
4. Pzmax = Vz Izmax
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1. IR = IZ min + IB max
2. Rmax = Vimin Vz ; Rmax = Vimin Vz
IL max + Iz max R
3. Pzmax = Vz Izmax.
4. PBJT = VCemax . ILmax.
MODEL GRAPH
12V VO
VT
12V
IL MAX VIN
LOAD REGULATION INPUT REGULATION
TABULATION
VIN= RL=
RL (Ohms) IL (mA) VT(Volts) VIN(Volts) VT(Volts)
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PROCEDURE:-
1. Connections are made as per the circuit diagram.

2. Resistance is varied and corresponding voltage and current are noted.
3. The same procedure was repeated for shunt and series regulator.
4. Corresponding graphs were drawn.
RESULT:- Hence voltage regulator using zener diode as series element is designed and
conducted, Load regulation and current regulation was found out.
Average = ______________.
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EXP NO : CHARACTERISTICS OF DIAC

DATE :
AIM:-
To draw the V-I characteristics of DIAC and obtain the break over voltage (VBO).
APPARATUS REQUIRED:-
1 DIAC - 1
2 Ammeter 0-100 mA 1
3 Voltmeter 0-30V 1
4 Resistor 1K 1
5 RPS 0-30V 1
6 Bread board - 1
THEORY:
A DIAC is a two terminal three layer bidirectional device which can be switched from its
off state to on state for either polarity of applied voltage.
The operation of DIAC is identical both in forward and reverse conduction. The DIAC
does not conduct until the applied voltage of either polarity reaches the break over voltage VBO.
PROCEDURE:
1. The connections are made as shown in the circuit diagram.

2. First DIAC is connected in forward direction
3. The input supply is increased in step by step by varying the RPS
4. The corresponding ammeter and voltmeter readings are noted and tabulated.
5. Then the DIAC is connected in reverse condition.
6. The above process is repeated
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MODEL GRAPH
TABULATION:
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RESULT:
Thus the V-I characteristics of DIAC was obtained and graph was drawn.
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EXP NO :
CHARACTERISTICS OF TRIAC
DATE :
AIM:
To draw the V-I characteristics of TRIAC and obtain the breakover voltage (VBO).
APPARATUS REQUIRED:
1 TRIAC 1
2 Ammeter 0-100 mA 1
3 Voltmeter 0-30V 1
4 Resistor 1K 2
5 RPS 0-30V 2
6 Bread board - 1
Theory:
A TRIAC is a three terminal semiconductor switching device which cancontrol alternating current
in a load.A TRIAC can control conduction of both positive and negative half cycles of A.C supply. It is
sometimes called a bidirectional semiconductor triode switch.
Procedure:
TRIAC Characteristics:
1. The connections are made as shown in the circuit diagram.

2. The TRIAC is connected in forward direction and supply is switched ON.
3. VMT1MT2 is constant by varying RPS2 and then varying IG by varying RPS1.
4. The corresponding ammeter and voltmeter readings are noted and tabulated.
5. Next the TRIAC is connected in reverse direction.
6. The above process is repeated.
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MODEL GRAPH
TABULATION:
Forward direction Reverse direction

IG = _________________ IG = _________________
S.NO VS (volts) VMT (volts) IMT2(mA) S.NO VS (volts) VMT (volts) IMT2(mA)
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RESULT:
Thus the V-I characteristics of TRIAC was obtained and graph was drawn.
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Exp No :
CLIPPER CIRCUIT
Date :
AIM: -
To construct the biased positive & negative Clipper circuits using diodes.
APPARATUS REQUIRED:
S.NO. APPARATUS REQUIRED RANGE QUANTITY

1. RAS (030)V 1
2. Diode 1N4001 1
3. Resistor 10K- 1
4. CRO 0-20 MHZ - 1
5. FGR -- 1
6. Bread Board -- 1
7. Connecting Wires -- 1 Set
THEORY: -
It is a nonlinear wave shaping circuit. The clipping circuit requires a minimum of two components i.e.
a diode and a resistor. DC battery is also used to fix the clipping level. The input waveform can be clipped at
different levels by simply changing the battery voltage and by interchanging the position of various elements.
PROCEDURE: -
Connections are made as shown in fig. Power supply is switched ON. Using Function Generator we can
vary the frequency and fixed at particular frequency. Now the corresponding input and output waveforms are
drawn. Amplitude and time, input & output waveforms are drawn. And graph is drawn for input and output
waveform. Power supply is switched OFF.
APPLICATION:
It is used in radar applications.

It is used in digital computers.
It is widely used in radio and television receivers.
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APPLICATION:
It is used in radar applications.

It is used in digital computers
It is widely used in radio and television receivers.
VIVA QUESTIONS:
What is clipper?
What is meant by Biased Clipper?
Mention the applications of Clipper?
Differentiate between series and shunt positive clipper?
RESULT:
Thus the Positive and Negative Clipper Circuits were studied and constructed and its input and output
waveforms were drawn
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CIRCUIT DIAGRAM OF POSITIVE CLAMPER:

5. F
-+
IN 4001
100 K_
FGR CRO
CIRCUIT DIAGRAM OF NEGATIVE CLAMPER:
6 - 100 F
IN 4001 K
FGR 100 K_ C R O
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Exp No : ,
CLAMPER CIRCUIT
Date :
AIM: -
To construct and study the output waveform of Clamper Circuit.
APPARATUS REQUIRED:
S.NO. APPARATUS REQUIRED RANGE QUANTITY

1. 1
Diode 1N4001
2. 1
Capacitor 100 F / 25 V
3. 1
CRO 0-20 MHZ
4. 1
FGR --
5. 1
Bread Board --
6. 15
Connecting Wires --
THEORY: -
Clamping is the process of introducing a dc level into an ac signal. Clampers are also sometimes
known as dc restorers. Clamping is the process of shifting the input signal above or below the zero level.
A clamping circuit should not change peak to peak value of the signal; it should only change the DC
level. To do so, a clamping circuit uses a capacitor together with a diode and a resistor.
PROCEDURE: -
Connections are made as shown in fig. Switched ON the Function generator. Now corresponding
input and output waveforms are visible at the monitor of CRO. Amplitude and Time of input and output
waveform is measured and tabulated.
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MODEL GRAPH
POSITIVE CLAMPER
Amplitude (v)
Time (ms)
2Vm
Vm
Time (ms)
NEGATIVE CLAMPER
Amplitude (v)
Time (ms)
Time (ms)
-Vm
-2Vm
SCSVMV University
APPLICATION:
1. Used in television receivers to restore the original D.C reference signal to the video signal.
2. Used to produce a D.C voltage whose value is multiple of peak AC input applied voltage.
VIVA QUESTIONS:
1. What is the other name for clamper?

2. What is clamper?
3. Mention the application of clamper?
4. What is the difference between the clipper and clamper?
RESULT:
Thus the Clamper Circuits were constructed and its input and output
waveforms were drawn.
SCSVMV University
SCSVMV University

Electron Manual - EEE (11.07.17)

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Electron Devices Lab Manual Department of EEE

SL.NO DATE NAME OF THE EXPREIMENTS SIGNATURE

CIRCUIT DIAGRAM FOR P-N JUNCTION DIODE(MULTI SIM)

CIRCUIT DIAGRAM FOR P-N JUNCTION DIODE(HARDWIRED)

S.No NAME RANGE QUANTITY

1. The connections are made as per the circuit diagram.

1. Input supply voltage is varied.

VK- cut-in voltage

FORWARD BIAS: REVERSE BIAS:

REVERSE BIAS CHARACTERISTICS:

FORWARD BIAS: REVERSE BIAS:

CIRCUIT DIAGRAM FOR ZENER DIODE(MULTI SIM)

CIRCUIT DIAGRAM FOR ZENER DIODE(MULTI SIM)

S.No NAME RANGE QUANTITY

1. The connections are made as per the circuit diagram.

1. current are noted.

VK- cut-in voltage

REVERSE BIAS CHARACTERISTICS:

FORWARD BIAS: REVERSE BIAS:

S.No NAME RANGE QUANTITY

1 Connections are made as per the circuit diagram.

5 The inverse slope of the curve gives forward input resistance.

1. Connections are made as per the circuit diagram.

5. The inverse slope of the curve gives forward output resistance.

Bottom View BC107 Specification: BC107/50V/0.1A,0.3W,300MHz

VBE (v) VCE(volt)

INPUT CHARECTERSTICS: - OUTPUT CHARECTERSTICS: -

VCE = --------------- IB =________

VS(volt) VBE(volt) IB( A) VS (VOLTS) IC (mA)

INPUT CHARECTERSTICS: - OUTPUT CHARECTERSTICS: -

VCE = --------------- IB =________

VS(volt) VBE(volt) IB( A) VS (VOLTS) IC (mA)

BOTTOM VIEW OF 2N2646:

SPECIFICATION FOR 2N2646:

* Minimum Valley current = 4 mA

S.No NAME RANGE QUANTITY

1. The connections are made as per the circuit diagram.

Sl.No. VS (volts) VE ( in volts) IE ( in mA )

Sl.No. VS (volts) VE ( in volts) IE ( in mA )

Thus the characteristics of UJT was obtained

1. Negative Resistance = -------------------- at Vbb =---------

2. Peak Voltage (Vp) = ------------- at Vbb = -----------

3. Valley Voltage(Vv) = ------------ - at Vbb = ----------

VGS 2 VdS (Const)

S.No NAME RANGE QUANTITY

The connections are given as per the circuit diagram.

DETERMINATION OF DRAIN CHARACTERISTICS:

3. The drain resistance (rd) was determined as rd= VDS/ Id

DETERMINATION OF TRANSFER CHARACTERISTICS:

BOTTOM VIEW OF BFW10:

DRAIN CHARACTERISTICS: TRANSFER CHARACTERISTICS:-

DETERMINATION OF AMPLIFICATION FACTOR:

Amplification factor = gm*rd

DRAIN CHARACTERISTICS: TRANSFER CHARACTERISTICS:-

VS ( in Volts) VGS = VS ( in Volts) VDS =

a) Drain resistance (rd) =

VGS 2 VdS (Const)

S.No NAME RANGE QUANTITY

Drain characteristics for enhancement MOSFET: -

Transfer characteristics of MOSFET: -

DRAIN CHARACTERISTICS: TRANSFER CHARACTERISTICS:-

DETERMINATION OF AMPLIFICATION FACTOR:

Amplification factor = gm*rd