HANDLING PRECAUTIONS Table of 'Contents

~ NOTE : Static ote<:tricity may cause damage to the inte- Chapter 1 Overview
grated circuits on the malnboard. Before handling any SpeoticabOns . . ' 1. 1
malnboard outside of its protectlv packaging, ensure
Ma~nboard layout . . . . . . . . 13
~t ~s ~lectrk: charge in your body.
System BlOck O~agram . . . . 14
~"" ny or all orthese bo.<i<: pm:oudons "ben hondli~ lh Chapter 2 Main board Settings
ru:sinboatd nr Other computer c;Otnponm\5:
Jumpers 21
WcM a sut i ~ '""q ~trap which fil\ uound your wrist .nd i~ coo~
nt<d 10. ""''"raJ
ealtb grOt!Jld CPU SeleCtor Jumpers 2 t
Touch a SfOI.1ndtd or :mtiSUiioe sw(.c< 0or a mtnl fu ture- web as a NS873111312 Jumper Selling 23
'"'attrpi~ N$37332 Jumper Settlng 24
Avoid root~ with the compQ~I'Il~ on add-on card.,, ~ll\J$ and CPU Clock Jumper JK1.JK4 (VT8225N) 24
moduJcs and with the --gol<kn finger" conne<;t()rs pluu;c:d lnt.O the System Jumper Setting . .
txp&lSion \lot. 11 is besl to handle sy~ltOl componenls b) thtir . 25
mounlil1& l><a<ktt J Keyboard Controller Select . . 2-5
Connec1ors .. 2-8
AboH~: methocb t1t.hcr pn:"'<nt u.atic buikJ...u-p or cau.W: itlo be: dis.
dwg<d~l~ IDE Conlloller Select 2-9
VESA Bus Connector 2. 11
TRADEMARKS "' 3 3.Yoll Regulalor Board Installation 214
IBM registerod trademark of lnternatJonal Bustness Machines Corp. Chapter 3 Memory~S~u~bs~y~s~le:!.m::__ _ __ _ _ _ _ __ _ _
Intel registerod trademarl< of Intel Corp Memory locabOns 31
All ()1}.,, trd,lf'Nitl$ mcntWntd lit lit& mDifllal art Tf'XiJI~td lnsta~ORAM 3-2
propnry ojlltt ttlpffli-.y_ ownu.t .
SIMM Banks . . , . 32
DRAM Configuration .3-2
COPYRIGHT~
lnstallaiiOn Instructions .36
7710 mtllfuel IM')' not, In ,.~lttN' or In paTt, k p/tDI(H'{)p/td. uprc>- Cache Memory .. 3-6
duttd,triiJtJNikd. fffliUifiUd, or lfilJU.minN in 1111/tfJU~Yf ftJrm
lnsta~.ng Cache Memory . . . . 3-7
w;ltJtOifl du
rittm ctJnsmttJ/Ilu nwJtll/iiCfllrtr, exaptfor n1ples
rnalned h)1 1ht p11rdt4.fU for pusontll rclthal purpoJa. Cache SRMI Specd1eatl0ns and Selllngs . 38
128K Cache SRAM . . 38

486-VIPIO
486-VIPIO
 Chapter 1

Overview
lla.l'd on lh< VIA GMC chips<!, the 486-VIl'-IOmaJnboard
.. combinc1 an ISANvbu platf'orm with the advonc<d PC I local
bus. The VESA local bus "htch allows the sys1<m 1~ run
5)1ltbronously with II!< CPU llld lhe l'CI local bus whicb
improv~ the performi~tce of disk lfO drumat.ically speed! up
graphics perfonnanc:.e. This mQtherboard de$ign deljver,; unsur-
passed fkxibi lity that SUJ'P<lr15 SMM (8)>>1tm Management
MOde) CI>Us, mul(i-master Qptrauons and pNwides bui1tin
power mana_gtmMt featuf('S i<ltal for Gn;tn PCs.. The optional
enhanced II> F. support allows the inslallation of four host inter-
face- <f.co.victs U'duding CD-ROM drives.
The board's spillly <quipp<d chips. VIA VT82CSOS, is a
bus bridge that exJends <he ISANLbus to a compl<te
PCIIISANL S)<m by r.illy int<gr.lling S)~lcm management
interfact. power nlanagerncnt unil, keybo:ltd conuollcr with
J'St2 mouse inte-rrace, dock. stop m<..-cbanism and write-back
lcvtl-<>ne. cache !.Upport. Jn addition. it mC(.."lS PC12.0 spccifica
tion for Jl"optf atbltl"atton bttwctn PCI ma:,lers and ~etion
bctwee.n 1~1 ma,<;.ters and sla\'es. Thit chapter give;s you 3 brief
overview ofthis maioboard. providing basic infonnaiion on hs
major p..vt.~ and C()mponenls.

Specifications
--------------- -
l'he 486-VI P-10 mainboard comes with the following fearures:
Supports lntd 8~86SX/UX/InteiOX2"'11meiDf.l""/486
SL-nhanccd!Cyrix Cx486S!DX'" mlcroproetsJor in a
PGA package.
VIA VT82C486A-f I'C/AT chipset includes buikin 8042
ktybo.ml cootroll<r.
VIA VT82C5050 chips<< for VF.SA 10 PCI bridge.

486-VIP-10
1-2 Overview Overview 1-3

Optional Flash ROM.
Award BIOS. f r Mainboard Layout

Supports 128K/256K/512K/1M direct-mapped write-
back/write-through cache memory.
72-pin SIMM sockets supports up to 64MB DRAM, pro-
~"';--8~1
---=.JJtL _ _ _

I
l
..

.,:~.'"
1~!
_
I

JX1 ]1
~
l:312 i
_ _I
=
icN41~~
L..... __ I L............J

CN6 .. J

Tl~~
vides page mode DRAM operation. 3

3.
Supports system and video BIOS cacheable imd shadpw. ~


Supports decoupled DRAM refresh.
Optional built-in ZIF socket that accepts Intel's Over-
c ~I f/2
~ ,0., D
DS12885Q
~
"0
(")
"0
(")
"0
g
~~
:;;: c;;
LJD
IJ~
Drive processors. i'i

~11~11~1~~-~~
Optional Regulator Daughter Board provides 3.45V for

IntelDX4 CPU.
Supports three 16-bit ISA expansion slots.
D
~ II~




Supports two VESA bus expansion slots.
Supports four PCI bus expansion slots.
DALLAS DS1288SQ real time clock/calendar.
Provides built-in power management features necessary for
Green PCs.
( (
r,
~--~
82C505
1
3=1
JTJ

Cable for the PS/2 mouse interface (optional). ~ill~

la~~~.J
J20JK4JK2
l82C486AI ~J21
Supports VIA 83C461/Promise PDC20230C (optional)
Local IDE. ~ L___
Optional enhanced IDE support allows for up to four host ~a ~1~ A'

r~l.
interface devices. TAGRAM M1
1 BANKO --~ 'coO'
Built-in IDE HDD/FDD and Local Bus IDE interface.' M3 M2
r== BANK~
M7
I c BANKO
MB
I
80486SX/
NS PC87311/312/332 chipset for two serial/one parallel
port.
C---sAfJK
MS
I I BANK1 J DX/DX2/DX4
Cx486S/Cx486DX
c;:-=i
Jl:B
L_~_j~~~ P24D/P24T/P24CT
Supports ECP/EPP Protocol (NS 332 only). r=_~BANK1 ~~ [-~-~ P4S/P23S/P24S

c=:::::J ~ 8
1
J32 J31 J30
c:::J CJ CJ 1oe==:J J29

( (_ Figure 1-1. Mainboard Layout

486-VlP-10 486-VIP-10
2-2 Mainboard Settings Mainboard Settings 2-3

JUMPER
(RP008P4R)
JC5
RN18
P23SIP4SI
P24S/P24T
short
empty
486SXIOX/
lnteiDX2
open
empty
Cx486S/OX'
(M&,M7)
open
inserted
lnteiDX4/
P24DIP24CT
short
ei:npty
I

( c JUMPER

! J27
DX4 clock mode select
1-2
2-3
2.5X mode
2X mode
PIN DEFINITION

open 3X mode
RN19 empty empty empty inserted JX1, J20, J23 1-2 (default)
RN20 empty empty empty empty JX2, JX5 2-3 (default)
1-2 IRQ14

JUMPER 486SX/
P24S*/P4S*/
486DX/ P24CT/ Cx486S cxg~~?l
. 1'240
il JT3
2-3 IRQ10 (default)
P23S Intel DX21 P24T* (M6) Cx487S. 1-2 PCICLK=CPUCLK (default)
lnte1DX4 (M6+C6) JT4, J19 2-3 PCICLK=CPUCLK/2
(40MHz is recommended for better performance.)
JC1, JC2 2-3 1-2 1-2 2-3 1-2 1-2 '
i

JC3 open open short open open ' open. i

Table 2-1. Jumper Setting for CPU Selector

JC4 1-2 1-2 2-3 1-2 1-2 2-3
JC6 short short short open open short
-

* P23S, P24S, P24D and P4S are the SL-enhanced CPUs while P24T is the Penttum
OverDrive Processor.
~ NOTE : When the on board 3.3-volt regulator is not present,
~ NOTE : Users are not encouraged to change the jumper
settings not listed in this manual. Changing the jumper
settings improperly may adversely affect system perform-
ance.
'

the 3.3-volt daughter board should be inserteded. If not,

please read page 2-14.
( (
1
NS87311/312 Jumper Setting
BASE 1/0 ADDRESS
JUMPER PIN DEfli\IITION
I I INDEX ADDRESS I DATA ADDRESS
Write-back/write-through select for P24D/P24T JF
JC7 1-2 write-back I 1-2 I 26EH* I 26FH*
2-3 write-through L __ I 2-3 I 398H I 399H
For Intel's 3.3V CPU or Cyrix's 3.6V CPU
JC8 1-2 Intel DX4

~UMPER
2-3 Cyrix 486DX/DX2-V
PRINTER PORT DIRECTION SELECT
1-2 lntei-S CPU
JC9 INPUT BIDIRECTION
2-3 P24D/P24T/Cyrix 486DX
JG 1-2 ..2-3
If onboard regulator is present, selector for Intel's 3.3v'cpu
or Cyrix's 3.6V CPU JH 1-2 N/A
JC10
open Intel DX4
--
short Cyrix 486DX/DX2-Y
-
* factory default
Table 2-2. NS87311/312 Jumper Setting
Table 2-1. Jumper Setting for CPU Selector (Crmtinued)

( l

486-VIP-10 486-VIP-10
 2 -5
2-4
- - - -- MeltlbOard Set!U1gs MaonbOard SettJngs
---
I
NS87332 Jumper Setting
('
System Jumper Selling

j
~ ----=
JG~---...
~
BAS WADOftf.SS
"' ~ ..,.ou_ --
---- - --
M~~.(Jss
.IF moexAOO..ess Pi!ST~CiearM'-<:1
12 12 20t
n ooen(dtfMJ

-
--- ~~u-~--- ---
1-2 . 2-3 I 269<' Dspla;, ty9e le't<t

-
2-3'
~
2-3 . ISCH
J3) ="EQANOA(~~

j
N H _ _ _ _ _:;:393>1 3-
rJt'Wf) dcbult Ta/:ol~ 1--6 .\)Jttflf Jum.J''' &umg
1ill>lc 1-J NS87JJJ '""'"'' """'"8
:IRIOOMLUP~
OU J --- -
~
faa."")
CPU Clock Jumper JK1.JK4 (V!8226N)

..2";'
1-2
2-3
_ _ _,:.2-l,:_
lkt1.11t
*',"; _i___:;.;'
___,
12
2-3
_...
___
2-3"
11"-t
,_,.
-

taM~ 1-.J CPl.ICI!J-JmJW' ~{t<~,t,QnJKI..JAJ f' ...IS22Jj\~

...
2-3
\2
r Jl
J2
J3A

m -.L
.1)6 I
. IRQU
tROS

llt09-==:;
IRQIO_ _ __ _
12
2)
Pul up (de'~
Pui~IPCfctJdG~

I ol;ld-- IR(! r./1 U(>'~ -'-fxr ~'Ill

Keyboard Controller Select

J~4 JUMPER ~ ~
c;;= NSI7U2 CP MOO OMA CHAHNt:L
~ OR01. !lACl<~
_ __ .:;2-3::.__-----r:=_
_
ORE03 DACK3
1-l(de'IVIO

foNt J-S ,\'SI7JJ1 F.l"l' .If...&.: D.ll Clt.JNtd .'idllon

~
JX3 JIJMPE,.

tl
_
23
~\Co911
~ybo.t{(lwt~S6

1:
FVNClW>N

.z__ lr:tema..t)'bNrdw:hOulPSr2~
-~-
12' ~tetbord~
.

TuN:!~ Kty!xAirJ""""'""'Scnll!!f

486-VlP-10 466-VlP-10
2-6 Mainboard Sett>ngs Mainboard Seltlngs 2-7

INT'ER.IfAL INl<RIW.
COfoiN:E-CTOR PIK-outS SlGIW.HAM!
KEYBOARD KrnlOARO EXT"fJIHAl.
(i
JUMPER

I
OOHTRou.Eit
Wln:tf'SI2
OO,_.TROU,ER
'MTHOUT PS12
II t<EYeQARO
CONTROllER I Pow<!<goo<! I

-
YOU$. YOUSe I 2 10, 11, 12 5V I
CN5 3 .. 12V I
J11 2-3 23 12"

-
PowerConnt<:toc: ~ 12V I
5. 6. 7, 8
RNI empty I W'l$0rterr GroUnd !

RN2
RN3 "'' '"'""
emoty 'lnsortt<S
I emptf
-
.. 9
I
SV
Data camer detect
. CN!I
Serial Pon2
2
3
R6o$rve data
Transmitdata
f..u,.,'\01')' dcfauh
!Qh/e ].9. ltllf!rnoVf:Xurnal Kt.thourd Selection
Conneaot

5
Data uansmk ready
Sigoal ground
em 6 ' Ready to rec:e.'ve data
s.rial Pori I 7 Request tG send data
ConneaO< 8 C$eatto s:end
Connectors 9 Ring indJCatoc:
1 LPTsuooe
TM tt)lm~OI M allow 1hc: m~unb<\lrd to connect tlecuooically H CtJbrtO~D~tl.bit7
10 LPT.-1edge
With OChtr ('~~ O( the ))'Mttn SOO\e connecl()f$: h3\t tWO pins, II LPTbi,JfY
other!> have four ,,r five pfn.<O. Some millfunttion problems
eocoun ter~ with your S)'Stem may be caused by loose or
improper connections. En~ur~ that all connections are in .place
CN8
Parak i'Port Conned.ot ..
12
13
15
~~nc:lat\1$
Au~o f1n fOOd
lPT e<(
and fim>ly anaeh<d. C 18
17
'Mf3te I'N\tet
Sel.ed pr-6'1te
COKKECTOR PIH'.QUTS
I
SIGIW. NAME
Mouse data
I-+- 18-25

4,
2
5
Gf<>Ut'ld
Density !elect

CNI 2 NC NC
PSI2 Movw CCMY~ec::tOt' 3 Ground 8 lnctexcte~
(Jumper Type)
+5V
10 Se~motorA

r- 6
I
-ClOCk
~rdda1a
12
14
16
18
S.!ed~..... ...
Se!ednve e
Se!ec.tmocorB
CN2
2, 6 NC Direc::boncooirOI
3 CN9 20 S!eppulse
Ground
P$12 Koyboanl Co<med oo
5 6V
Koyt>oa~ ClOCk
FODC~ 22
24
26
WriteOata
Write en~~
Keyboard clock 28 TtackO
l Wnte protect
2 NC 30
CN3 ; 32 Reactda~ ,
3 Ground

~)l>owConnoctot 34 Headse~
5V 1.3. 5. 7.9.1\
~aroeiOC:k
Dcok<l1"9
13, 15, t7. 19 Gtound
21 , 23. 26. 27.33
CN<
I
2.6
Mou.. d~.a
NC

P$12 MOOSe Connector 3 Groufi(S
(M.,;.()IN T~)

- --

5
v
Mo<lseCIOCk
rahle 1-10. Cl)nlf'r.1Ctor rm f)ejinit1ons (Con1lnued)

Tab/el-10. Om.Yrtll' Pin Dejin/11ons (Commui!d)

486-VlP-10 486-VIP-10
 0
1~ ~~
~
!J .."
p-~ i i I i f ~fF ! b ~r" ~i . wi' I
~~ ~~~~ !/ '&f~
I' !~~ lj" If
~
u r~ ~~ ~~ u~
I
~~
( I! r !r i
s r r- i '
..., ~[
;;
rii
'i"' I ~
f ~~ s :.&, t
~ li'
!a ........,
- ""r-.
-- -.-
-_,_
~
S? ~~
-
.t ~
I I
t~ j! l
'sfr fi fil if11f[iji" r:ti~H' 6 s r n~l'
~ ~a a~~ 4 ! .
~ r~
,.~. i i &a t 1 i~
la 1 1
y;=. I
~~
t
t 'I '; i I
E f
....
-
""'
I
- I
d ii :

t,. " ~ ! ..~ g: ~ f
:::
.. II
";:; ~ [
[ [ ;:: ~
~ nn ~
1~-iii n
~ ~ .i
) to
,,
~ ~
f nrL r iiie~
:S? N W
t ~~~ ~ 8 -. I
t ~
~ ! fr
'!~ ! I
. .f . ! 8 1 z ~
If ~ ii
z.: I ~

I ..
 'a
J~-~ 'a~ I
u~ ~~
i

g ~!'* I
=~~~tt~~~~~~~-~;;;;~= oe ~$~w&)~ - ~~ J
~ ~~ J

sassssR~siss 5ssssss~sas (P~

t::a&~ i 65 ~ -~ ~ =
..
! I
9 '
n .t u i

... ... ....

~ ~ ~
;
I [< >&'?d~ ... iii
.- .
-tt.=~ .. :: c.
t 1 rrl~p ~ ~
z=~ q ~ i ~ . i
.. ~~~t
~
P"';Hr~~ n
s~
oc15 ... ~ ~ ~
II r"~,~~a!;l
!& f - ~1::
ifl ~1
t r hi l ..l-.._!1'~~~ ~
i:.
a ~~ I l". r
r
{ t.H~; ~ !II! I
J :I r!ru~.I = ~~
illi
I I .. ~ !I'.... f !J! 1[ l~l
H-~~~r~J
f II
f -"j ~~-~
8
~~ ;,.~
.l- i ii ~r
t!d f'l
.;, ~ !!.
huu ~
212 Mainboanl Se~s -- - - - -- -- -- -- --- - --
Manboard Setllngs 2 13

(;

I IE
~
~*
4'
.J!.t.l1:l_ -
j 6fn:) I 42
I Ejt:'tN
)

. 4l
AD$2-L......:.....!
LltDY2-3 s
., ' iDfypN 4S

~
~ - i IO'l.
=j~'" 3. 52
-
UCEN2-l. ~-~
~~.. 56 - ---

TcJ/>It' 1/S, S/,;7 Lot"UI /hl..t CQIIIli.'Clor Pin AsSI):Nnnt

t Jab/~ J .. JO S/,.., Loco/ nu.~ COI11tt'CIIII' l 'btAJSI)r:M1tnl

- - ---- --
486-VIP-10
--- - - - ----
486-VIP-10
 ':'
J. ;

~
l!s
w
H fo ~*1r ~g;1
~
j! ~ c !l: = -
.fr -.. < ...ij!.-i i ...<
~A !?,
f ~ !i!~~e~ II~~ ~~
i- Li. e-
i w J .,, .. ~ ~
fi:
~ 11 <:
~-
... [.lwt
r ~ i "~ !~~ c
! ... i u<t:r t-f ~ .
-~ l ~ ;(' .,, i i!'<;! ~ ~ t
i "~
If t," ,J .... !!
~ f' ~f:S:
.. ...."' ~"Bi" ~
1. r I ~A
if !:;..
ft:i>!!: ?:g~
r ';~:.l
;::o.llif
8'
a.
Hi !~ n i" n a-H
.. r -~ "'
pa !i H-:::;~~;.r .. 5'
i[
i' .-!1 - ~ f~
~;;,.~~ - ~ i.r - ..
! f iii
~'i~it"! if~t ...
i
" H
t
-~ ~
~ ~~
~c
A3
~ [~ a.
~~ - rP=f.r.:;o
"' ~~ g
zg~ a~~ ~~al~
-g-s ~ "' .Q ~;~I "
i
I!
~~'Y-t!~""t ~
H. r-s .. - "

.-. ......
-
t-
-
""'
f3
0
.:<!
r
i ~ & [fl1~ 7
0

e. ;e_
: i
~=-~
- j ; i :"
i:g~;:
r
!1,
n ' (J ...,
h= .." -: ~l"
[i ~= O
l il ~~--~;:--
~ :t.-
tW~A jl .f il~i
! ~.
)1_,
~ i ~1 t. J] iii :1:
____. H .
l ~! w~ 3
~i ~i~. -< r~ 0
c:.__=-==:! ~
f l 3"-.gi
~ ~ -1
-~!: !_, c:::
..f 0
J ~ ~:r 't l '<
0
....,."' ,..
~
jf
~
> t & i
'!
~ ~ii .,-
~ 8'1i2,~ 3
..
3-2 Memory Subsystem Memory Subsystem 3-3

TOTAL BANKO BANK1 BANK2 BANK3

Installing DRAM ( (( MEMORY (72-PIN) (72-PIN) (72-PIN) (72-PIN)

.. 4MB 1MB 1MB

SIMM Banks 1MB 1MB 4MB I,
6MB 4MB 1MB
1MB
The 486-VIP-10 can accommodate onboard mem~ry from I to
4MB 1MB 1MB
64MB using SIMMs (Single-In-Line Memory l'yiodules). The
mainboard has four memory banks- Bank 0, I, 2, 3. Each 4MB 1MB 1MB
-
bank can accept either a 1MB, 4MB, or 16MB SIMM in-t;ach 4MB 1MB 1MB 1MB
7MB
socket. ' - - -
1MB 4MB 1MB 1MB
4MB 4MB
DRAM Configuration
4MB 4MB
8MB
Memory can be installed in a variety of configurations, as
shown in the next table: 4MB
4MB
4MB
4MB

TOTAL BANKO BANK1 BANK2 BANK3 1MB 4MB 4MB

MEMORY (72-PIN) (72-PIN) (72-PIN) (72-PIN)
4MB 1MB 4MB
1MB 9MB
4MB 4MB 1MB
1MB 1MB
1MB 4MB 4MB

1MB
1MB
( ( 1MB 4MB 4MB
1MB 4MB 4MB
1MB 1MB
1MB 10MB
1MB 1MB 1MB
2MB 4MB 4MB
1MB 1MB
4MB 4MB 4MB
1MB 1MB 12MB 4MB 4MB 4MB
1MB 1MB 1MB
f-- 4MB 4MB 4MB
3MB 1MB 1MB 1MB
1MB 4MB 4MB 4MB
1MB 1MB 1MB 13MB
1----- 4MB 1MB 4MB 4MB
1MB 1MB 1MB 1MB
4MB 4MB 4MB 4MB
4MB
4MB 16MB 16MB
4MB
16MB ~

4MB
- 16MB
4MB 1MB
16MB 1MB
1MB 4MB
1MB 16MB
5MB 1MB 4MB 17MB
1MB 16MB
4MB 1MB
I 16MB 1MB
1MB 4MB
( (_ 1MB 16MB
4MB 1MB

Table 3-1. DRAM Configurations (Continued)

Table 3-1. DRAM Configurations (Continued)

486-VIP-10 486-VIP-10
3-4 Memory Subsystem Memory Subsystem 3-5

I
TOTAL
MEMORY

-
BANKO
(72-PIN)

16MB
BANK1
(72-PIN)

1MB
BANK2
(72-PIN)

1MB
BANK3
(72-PIN)
t I ([
TOTAL
MEMORY
BANKO
(72-PIN)

16MB
BANK1
(72-PIN)

16MB
BANK2
(72-PIN)

1MB
BANK3
(72-PIN)

1MB 1MB 16MB 1MB 16MB 16MB

18MB 33MB
1MB 16MB 1MB 1MB 16MB 16MB
16MB 1MB 1MB 1MB 16MB 16MB
I
16MB 1MB 1MB 1MB 16MB 16MB 1MB 1MB
19MB -
34MB
1MB 16MB 1MB 1MB' 1MB 1MB 16MB 16MB
16MB 4MB 16MB 16MB 4MB
4MB 16MB 4MB 16MB 16MB
36MB
20MB
4MB 16MB 4MB 16MB 16MB
4MB 16MB } 4MB 16MB 16MB
1----
16MB 4MB 1MB 4MB 16MB 16MB
37MB --r------
16MB 4MB 1MB 4MB 1MB 16MB 16MB
1MB 4MB 16MB 16MB 16MB 4MB 4MB
40MB
21MB
1MB 16MB 4MB 4MB 4MB 16MB 16MB
4MB 1MB 16MB 16MB 16MB 16MB
48MB
4MB 16MB 1MB ( I ( 16MB 16MB 16MB
16MB 4MB 1MB 1MB 49MB 1MB 16MB 16MB 16MB
22MB
4MB 16MB 1MB 1MB 52MB 4MB 16MB 16MB 16MB
16MB 4MB 4MB 16MB 16MB 16MB 16MB
64MB
4MB 4MB 16MB 32MB* 32MB*
24MB
4MB 16MB 4MB * Double-RAS SIMM
16MB 4MB 4MB Table 3-1. DRAM Configurations
25MB 1MB 16MB 4MB 4MB
16MB 4MB 4MB 4MB
28MB
4MB 16MB 4MB 4MB
~ NOTE : Only Banks 0 and 2 can accept double-RAS SIMM. i
If Bank 0 has a double-RAS SIMM inserted, then Bank 1 I
16MB 16MB should be free of SIMM. Likewise, if Bank 2 has a double- i
16MB RAS SIMM inserted, then Bank 3 should be free of SIMM. I
32MB
16MB 16MB
32MB*
32MB*

Table 3-1. DRAM Configurations (Continued) ( ((_

486-VIP-10 486-VIP-10
3-6 Memory Subsystem Memory Subsystem 3-7

Installation Instructions
f (( Installing Cache Memory

~ NOTE : Always observe static electricity precautions. See I

"Handling Precautions" at the start of this manu at. j ~ NOTE : Always observe static electricity precautions. See 1

"Handling Precautions" at the beginning of this manual. .

I. Locate the SlMM banks on the mainboard. Determine
your desired configuration to be installed.
2. Insert the SIMM edge connector at a 90-degreeangle If you do not have the confidence to make the installation, better
onto the socket. consult a service technician for assistance.
I. Locate the cache memory on the mainboard.
See Figure 3-1 again.
2. Be guided by the Cache SRAM settings depending on
your desired SRAM configuration.
Correct orientation of the chips is necessary for the cache to
operate properly. Normally, the chips have either a curved
notch or a dot. This marker on the chip must be matched to the
marker on the socket for correct alignment.
( ( Install the chips individually as follows:
Figure 3-2. Installing SfMMs
3. Align the chip with the marker on the socket.
3. Carefully push the SIMM down and back into the socket until
Press the chip onto the socket, ensuring that the pins on the
the retaining clips of the socket snap, holding the SIMM in
chip are aligned with the corresponding connecti0ns on
place. The holes in the SIMM should match the pins on the
the socket.
socket's retaining clips.
4. Carefully apply enough pressure to partially seat the chip
To remove the SIMMs, pull the retaining latch on both ends of
into the socket.
the socket and reverse the procedure above.
Ensure that all pins are properly aligned with the connectors and
that there are no bent pins. If there are any bent pins, remove the
Cache Memory chip, straighten the pin and repeat the proce~s.
5. Press the chip completely into the socket so that the pins
The 486-VIP-10 can accept cache memory of 128KB, 256KB, are properly seated.
512KB, or 1MB.

~ NOTE : Be sure to use the correct chips for the amount of['
cache memory you want to add. You must install both the ( (_
correct Cache and Tag ~RAM. 1

486-VIP-10 486-VIP-10
38 _ __ _ _ __ _ MelllOIY Subsystem Memo.y Subsystem 39

512K Cache SRAM

Cache SRAM Specifications and Settings
(
128K Cache SRAM

U2: - . . . -

Lt3~.1':K_4l_:-

..,5 W f d ! f t ' - .... ~

L19 ~ ~ ~ "' I t:___] I

OR

_
II ~" 'ftMU'f'"

L16-
256KCacheSRAM ,M 2-

lola-
...
t.13~.~:~

M8~f.l~

OR .. 1MB Cache SRAM

M3 ~:H:-ft:-
Ul -t'.M:n,_

M5~

9 t
L__j L__j I ... p :... 1t

4.56-VIPIO 4.56-VIP-10
3- 10 Memory Subsystem

Chapter4
The cache size is jumper selectable. M2-M5 are assigned as
Bank 0 and M6-M9 are assigned as Bank I. { r(
Award BIOS Setup
I
128K I 256K I 512K ,,1 1M I
The 486-VIP-10 comes with the Award BIOS chip that con-
BankO
tains the ROM Setup information of your system. This chip
32Kx 8 32Kx 8 64Kx 8 128K x 8 64Kx8 128K x 8 I

serves as an interface between the CPU and the rest of the

Bank 1 Empty 32Kx8 Empty Empty s4Kxa 128K x 8
mainboard's components. This chapter explains the informa-
Tag RAM 8Kx 8/ 32Kx.at 64~)(8/
32Kx 8 32Kx 8 32Kx8 . tion contained in the Setup program and tells you how to modify
(M1) 32Kx 8 64Kx a 128K x 8
the settings according to your system configuration.
JS1
1-2 2-3 2-3 2-3 2-3 2-3
(Jumper)
JS2
(Jumper)
1-2 2-3 2-3 2-3 2-3 2-3 I

System Setup
JS3
1-2 1-2 1-2 2-3 2-3 2-3 A Setup program, built into the system BIOS, is stored in the
(Jumper)
JS4 CMOS RAM that allows the configuration settings to be
1-2 1-2 1-2 1-2 1-2 2-3
(Jumper) changed. This program is executed when:
JS5
1-2 1-2 1-2 2-3 2-3 2-3 1. User changes system configuration.
(Jumper)
JS6
(Jumper)
1-2 1-2 1-2 1-2 1-2 2-3
c ( 2. User changes system backup battery.
3. System detects a configuration error and asks fhe user
Table 3-2. Cache Configuration Size to run the Setup program.
After power-on RAM testing, the message "TO ENTER
SETUP BEFORE BOOT, PRESS CTRL-ALT-ESC or
<DEL>" appears. After pressing the above mentioned keys, the
following screen appears:
~OM PC~~~~A-BIOS-(2A4L4~0tD-- -----,~
STANDARD CMOS SETUP
AWARD SOFTWARE. INC. -1
STANDARD CMOS-SETUP- -~-SUPERVIS~; PASSWO~ - t

BIOS FEATURES SETUP I USER PASSWORD ~ I

CHIPSET FEATURES SETUP IDE HDD AUTO DETECTION I

POWER MANAGEMENT SETUP i SAVE & EXIT SETUP I

PCI CONFIGURATION SETUP ll EXIT WITHOUT SAVING . ' I

_~ave -~jft) ~hange

LOAD BIOS DEFAULTS
LOAD SETUP DEFAULTS
--~ ----- - - - - - ---

Esc Quit ~ ~ -> < Select Item

(_ l
P !()

- - -
and Ex1t_ Setup

- -
Time, Date. Hard D1sk Type
- - - -- - ---
Ce>lc>r_

-
J
486-VIP-10 486-VIP-10