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5 4 3 2 1

VA70HW BLOCK DIAGRAM POWER VGA POWER


CPU VCORE GPU VCORE
PAGE 80 PAGE 80
DDIC
HDMI DDR-III
PAGE 38 DDR3L 1333/1600 MHz SYSTEM, +3V, +5V +1.05VS_VGA
eDP x 2 channel A SO-DIMM*2 PAGE 81
eDP Panel PAGE 16
+VCCP & +VCCP_VT
D PAGE 37
CPU PAGE 82
+3VS_VGA D

Haswell DDR3L 1333/1600 MHz DDR-III


dGPU PCIE X 16 channel B
DDR & VTT +12VS_VGA
NVIDIA N14E SO-DIMM*2 PAGE 83

PAGE 17
2.5V & 1.5VS &1.1VS LOAD SWITCH
PAGE 84
PAGE 91
PAGE 3-10
PAGE 70~79 USB2.0
Camera SMART CHARGER POWER PROTECT
FDI x 2 DMI x 4 PAGE 88
PAGE 92

POWER DETECT
PAGE 90
USB2.0
USB PORT9
VGA LOAD SWITCH
CRT PAGE 91
PAGE 39
USB2.0 POWER PROTECT
USB PORT2 PAGE 92

PCH PAGE 58

Head Phone Lynx Point USB2.0 Power Rails


(Combo Jack) Azalia Codec Azalia USB20 PORT1
Sleep State RTC VA VSUS VS
RTK/ALC3225 USB3.0 USB30 PORT2
S0 ON ON ON ON
C MIC C
PAGE 58 S3 ON ON ON OFF
PAGE 41 42 USB2.0
USB20 PORT0 S4 ON ON ON OFF
TPM USB3.0 USB30 PORT1 S5/ AC ON ON ON OFF
PAGE 43
PAGE 61 S5/ DC ON ON OFF OFF
K/B EC PAGE 30 LPC
PAGE 48 PCIE *1
Click T/P
IT8528E HSPI MiniCard
WLAN/WMAX PCIe Port
PAGE 48
PAGE 13-19 USB2.0 PCIE_P1 CARDREADER
BT combo
FAN PAGE 55 PCIE_P2 mSATA
PAGE 49
PCIE_P3 Mini CARD (WLAN)
PCIE_P4 LAN
SPI ROM
SATA

PCIE_P5
4MB (BIOS/EC)
PCIE_P6
PAGE 30
PCIE *1 Giga LAN USB20 PORT
SPI BCM57780 RJ45
SPI ROM USB P00 External MB
2MB (ME) PAGE 33
PAGE 34 USB P01 External MB
PAGE 28
PCIE *1


USB P02
B
Card Reader External DB B
RTS5209 SD Socket USB P03
SATA HDD PAGE 40 USB P04
PAGE 60 PAGE 40 USB P05
PCIE *1 PAGE 40 WiFi
USB P08
mSATA/SSD Camera
SATA HDD SATA 3.0 USB P09 External DB
PAGE 60 USB P10
PAGE 53 BT
USB P11 PCIE/mSATA
SATA ODD USB P12
PAGE 60 USB P13

SATA PORT
SATA P0 HDD 1
SATA P1
IO BOARD PWR BOARD SATA P2 ODD
SATA P3
SATA P4 mSATA
USB PORT3 POWER Button
HP_OUT SATA P5 HDD 2
A A

USB PORT9 POWER LED


MIC IN

LID SW
Title : BLOCK DIAGRAM
BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Monday, February 04, 2013 Sheet 1 of 96
5 4 3 2 1
5 4 3 2 1

+VCCIOA_OUT
+VCCIOA_OUT +VCCIOA_OUT 4,6
U0301A Haswell rPGA EDS PEG_COMP R0301 1 1% 2 24.9Ohm

E23
PEG Compensation
PEG_RCOMP PEG_RXN[15:0] 70
M29 PEG_RXN15
D21 PEG_RXN_0 K28 PEG_RXN14
D 22 DMI_TXN0 DMI_RXN_0 PEG_RXN_1 D
22 DMI_TXN1 C21 M31 PEG_RXN13
B21 DMI_RXN_1 PEG_RXN_2 L30 PEG_RXN12
22 DMI_TXN2
A21 DMI_RXN_2 PEG_RXN_3 M33 PEG_RXN11
Enable PCIE Lane Reversal
22 DMI_TXN3 DMI_RXN_3 PEG_RXN_4 Need to PD CFG[2]
L32 PEG_RXN10
D20 PEG_RXN_5 M35 PEG_RXN9
22 DMI_TXP0 DMI_RXP_0 PEG_RXN_6
22 DMI_TXP1 C20 L34 PEG_RXN8
B20 DMI_RXP_1 PEG_RXN_7 E29 PEG_RXN7
22 DMI_TXP2 DMI_RXP_2 PEG_RXN_8
A20 D28 PEG_RXN6
22 DMI_TXP3

DMI
DMI_RXP_3 PEG_RXN_9 E31 PEG_RXN5
D18 PEG_RXN_10 D30 PEG_RXN4
22 DMI_RXN0 DMI_TXN_0 PEG_RXN_11
22 DMI_RXN1 C17 E35 PEG_RXN3
B17 DMI_TXN_1 PEG_RXN_12 D34 PEG_RXN2
22 DMI_RXN2 DMI_TXN_2 PEG_RXN_13
A17 E33 PEG_RXN1
22 DMI_RXN3 DMI_TXN_3 PEG_RXN_14 E32 PEG_RXN0 PEG_RXP[15:0] 70
D17 PEG_RXN_15 L29 PEG_RXP15
22 DMI_RXP0 DMI_TXP_0 PEG_RXP_0
22 DMI_RXP1 C18 L28 PEG_RXP14
B18 DMI_TXP_1 PEG_RXP_1 L31 PEG_RXP13
22 DMI_RXP2 DMI_TXP_2 PEG_RXP_2
A18 K30 PEG_RXP12
22 DMI_RXP3 DMI_TXP_3 PEG_RXP_3 L33 PEG_RXP11
PEG_RXP_4 K32 PEG_RXP10
PEG_RXP_5

PEG
L35 PEG_RXP9
PEG_RXP_6 K34 PEG_RXP8
PEG_RXP_7 F29 PEG_RXP7
H29 PEG_RXP_8 E28 PEG_RXP6
22 FDI_CSYNC
FDI

C FDI_CSYNC PEG_RXP_9 C
J29 F31 PEG_RXP5
22 FDI_INT DISP_INT PEG_RXP_10 E30 PEG_RXP4 R1.2 2012/12/19
PEG_RXP_11
PEG_RXP_12
F35
E34
PEG_RXP3
PEG_RXP2
CX0301~CX0308, CX0317~CX0324 options are changed to /EGL
PEG_RXP_13 F33 PEG_RXP1
PEG_RXP_14 D32 PEG_RXP0
PEG_RXP_15 H35 PEG_TXN0_C CX0301 2 1 0.22UF/10V /EGL
PEG_TXN_0 PEG_TXN15 70
H34 PEG_TXN1_C CX0302 2 1 0.22UF/10V /EGL
PEG_TXN_1 PEG_TXN14 70
J33 PEG_TXN2_C CX0303 2 1 0.22UF/10V /EGL
PEG_TXN_2 PEG_TXN13 70
H32 PEG_TXN3_C CX0304 2 1 0.22UF/10V /EGL PEG_TXN12 70
PEG_TXN_3 J31 PEG_TXN4_C CX0305 2 1 0.22UF/10V /EGL
PEG_TXN_4 PEG_TXN11 70
G30 PEG_TXN5_C CX0306 2 1 0.22UF/10V /EGL PEG_TXN10 70
PEG_TXN_5 C33 PEG_TXN6_C CX0307 2 1 0.22UF/10V /EGL
PEG_TXN_6 PEG_TXN9 70
B32 PEG_TXN7_C CX0308 2 1 0.22UF/10V /EGL
PEG_TXN_7 PEG_TXN8 70
B31 PEG_TXN8_C CX0309 2 1 0.22UF/10V /DGPU PEG_TXN7 70
PEG_TXN_8 A30 PEG_TXN9_C CX0310 2 1 0.22UF/10V /DGPU
PEG_TXN_9 PEG_TXN6 70
B29 PEG_TXN10_C CX0311 2 1 0.22UF/10V /DGPU PEG_TXN5 70
PEG_TXN_10 A28 PEG_TXN11_C CX0312 2 1 0.22UF/10V /DGPU
PEG_TXN_11 PEG_TXN4 70
B27 PEG_TXN12_C CX0313 2 1 0.22UF/10V /DGPU
PEG_TXN_12 PEG_TXN3 70
A26 PEG_TXN13_C CX0314 2 1 0.22UF/10V /DGPU PEG_TXN2 70
PEG_TXN_13 B25 PEG_TXN14_C CX0315 2 1 0.22UF/10V /DGPU
PEG_TXN_14 PEG_TXN1 70
A24 PEG_TXN15_C CX0316 2 1 0.22UF/10V /DGPU PEG_TXN0 70
PEG_TXN_15 J35 PEG_TXP0_C CX0317 2 1 0.22UF/10V /EGL
PEG_TXP_0 PEG_TXP15 70
B G34 PEG_TXP1_C CX0318 2 1 0.22UF/10V /EGL B
PEG_TXP_1 PEG_TXP14 70
H33 PEG_TXP2_C CX0319 2 1 0.22UF/10V /EGL PEG_TXP13 70
PEG_TXP_2 G32 PEG_TXP3_C CX0320 2 1 0.22UF/10V /EGL
PEG_TXP_3 PEG_TXP12 70
H31 PEG_TXP4_C CX0321 2 1 0.22UF/10V /EGL PEG_TXP11 70
PEG_TXP_4 H30 PEG_TXP5_C CX0322 2 1 0.22UF/10V /EGL
PEG_TXP_5 PEG_TXP10 70
B33 PEG_TXP6_C CX0323 2 1 0.22UF/10V /EGL
PEG_TXP_6 PEG_TXP9 70
A32 PEG_TXP7_C CX0324 2 1 0.22UF/10V /EGL PEG_TXP8 70
PEG_TXP_7 C31 PEG_TXP8_C CX0325 2 1 0.22UF/10V /DGPU
PEG_TXP_8 PEG_TXP7 70
B30 PEG_TXP9_C CX0326 2 1 0.22UF/10V /DGPU PEG_TXP6 70
PEG_TXP_9 C29 PEG_TXP10_C CX0327 2 1 0.22UF/10V /DGPU
PEG_TXP_10 PEG_TXP5 70
B28 PEG_TXP11_C CX0328 2 1 0.22UF/10V /DGPU
PEG_TXP_11 PEG_TXP4 70
C27 PEG_TXP12_C CX0329 2 1 0.22UF/10V /DGPU PEG_TXP3 70
PEG_TXP_12 B26 PEG_TXP13_C CX0330 2 1 0.22UF/10V /DGPU
PEG_TXP_13 PEG_TXP2 70
C25 PEG_TXP14_C CX0331 2 1 0.22UF/10V /DGPU PEG_TXP1 70
PEG_TXP_14 B24 PEG_TXP15_C CX0332 2 1 0.22UF/10V /DGPU
PEG_TXP_15 PEG_TXP0 70

SOCKET_947P
If Support PCIE Gen3, change AC Cap to 0.22uF
12V012BSM001

A A

Title : CPU(1)_DMI,PEG,FDI,CLK,MISC
PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
B VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 3 of 96

5 4 3 2 1
5 4 3 2 1

+VCCIO_OUT
+VCCIO_OUT +VCCIO_OUT 6,37,47,63

1
+1.05VS Haswell rPGA EDS
+1.35V_VCCDDQ +1.35V_VCCDDQ 6
U0301B
R0440
100KOhm MISC
+3VSUS +3VSUS 22,23,27,28,30,33,43,61,81,92
T0419 1 TP_SKTOCC#_R AP32 AP3 SM_RCOMP_0 R0411 2 1% 1 100Ohm
@ SKTOCC# SM_RCOMP_0 AR3 SM_RCOMP_1 R0412 2 1% 1 75Ohm
SM_RCOMP_1 +3V +3V 37,43,63,65,91

THERMAL
1 AN32 AP2 SM_RCOMP_2 R0413 2 1 100Ohm

DDR3
T0420 TP_CATERR#_R 1%

2
H_PECI AR27 CATERR# SM_RCOMP_2 AN3
25 H_PECI PECI SM_DRAMRST# CPUDRAMRST# 5 +1.05VS +1.05VS 25,26,27,47,63,80,82
R0430 1 @ 2 0Ohm AK31
62Ohm 2 1 R0404 H_PROCHOT# R0403 2 156Ohm H_PROCHOT#_D AM30 FC1 AR29 XDP_PRDY# 1 T0403
+VCCIO_OUT PROCHOT# PRDY# +VCCIOA_OUT +VCCIOA_OUT 3,6
2 1 H_THRMTRIP#_R AM35 AT29 XDP_PREQ# 1 T0404

1
C0404 25,47 H_THRMTRIP# THERMTRIP# PREQ# AM34 1
Stuff R0408 R0402 SP0401 XDP_TCK T0405
D @ 2 1 TCK AN33 1 D
0.1UF/10V H_PM_SYNC_R XDP_TMS T0406
22 H_PM_SYNC TMS AM33 1
R0402 SP0402 XDP_TRST# T0407

2
Intel MOW WW14: stuff

JTAG
10KOhm 2 1 R0408 AT28 TRST# AM31 XDP_TDI_R 1 T0408
R1.2 2012/11/26 H_CPUPWRGD PD 10Kohm R1.1 PM_SYNC TDI

PWR
R0402 2 1SP0403 H_CPUPWRGD_R AL34 AL33 XDP_TDO_R 1 T0409
25 H_CPUPWRGD PWRGOOD TDO
reserved for 2014 processor 2 @ 1 22 PM_DRAM_PWRGD
SP0408 1
SP0409 1
2 R0402
2 R0402
VDDPWRGOOD_R AC10
AT26 SM_DRAMPWROK DBR#
AP33 H_DBR#_R 1 T0410
+VCCIO_OUT 25 PCH_PLTRST_CPU# PLTRSTIN# AR30 XDP_BPM01 T0411
1KOhm R0417 BPM_N_0 AN31 XDP_BPM11 T0412
R1.2 2012/11/08 BPM_N_1
21 CLK_DP_N SP0406 1 2R0603 CLK_DP_N_R cost dwon 0ohm G28 AN29 XDP_BPM21 T0413
DPLL_REF_CLKN BPM_N_2

CLOCK
21 CLK_DP_P SP0407 1 2R0603 CLK_DP_P_R H28 AP31 XDP_BPM31 T0414
SP0410 1 2 R0603 CLK_DP_SSC_N_R F27 DPLL_REF_CLKP BPM_N_3 AP30 XDP_BPM41 T0415
R0418 21 CLK_DP_SSC_N SSC_DPLL_REF_CLKN BPM_N_4
1KOhm2 1 SP0411 1 2 R0603 CLK_DP_SSC_P_R E27 AN28 XDP_BPM51 T0416
21 CLK_DP_SSC_P SSC_DPLL_REF_CLKP BPM_N_5
@ SP0405 1 2 R0402 CLK_EXP_N_R D26 AP29 XDP_BPM61 T0417
21 CLK_EXP_N BCLKN BPM_N_6
R1.2 2012/11/08 21 CLK_EXP_P
SP0404 1 2 R0402 CLK_EXP_P_R E26
BCLKP BPM_N_7
AP28 XDP_BPM71 T0418

cost dwon 0ohm


SOCKET_947P
12V012BSM001
+VCCIO_OUT

@ SSC CLOCK TERMINATION


CLK_DP_SSC_P_R R0419 1 2 10KOhm Stuff R0445 & R0446 only when SSC clock not used

CLK_DP_SSC_N_R R0420 1 2 10KOhm

@
U0301H Haswell rPGA EDS

T28 M27
C DDIB_TXBN_0 EDP_AUXN EDP_AUXN 37 +VCCIOA_OUT
U28 N27 C
DDIB_TXBP_0 EDP_AUXP EDP_AUXP 37
T30 P27
DDIB_TXBN_1 EDP_HPD EDP_HPD# 37
U30 E24
U29 DDIB_TXBP_1 EDP_RCOMP R27 DP_COMP R0410 1 1% 2 24.9Ohm
V29 DDIB_TXBN_2 EDP_DISP_UTIL
DDIB_TXBP_2 EDP_DISP_UTIL 37
R1.0 PU/PD for JTAG signals U31
V31 DDIB_TXBN_3 eDP
DDIB_TXBP_3 P35
EDP_TXN_0 EDP_TXN0 37
T34 R35 EDP_TXP0 37
39 HDMI_TXN2_PCH DDIC_TXCN_0 EDP_TXP_0
U34 N34 EDP_TXN1 37
39 HDMI_TXP2_PCH DDIC_TXCP_0 EDP_TXN_1
U35 P34
+1.05VS 39 HDMI_TXN1_PCH DDIC_TXCN_1 EDP_TXP_1 EDP_TXP1 37
V35 DDI P33
39 HDMI_TXP1_PCH DDIC_TXCP_1 FDI_TXN_0
U32 R33
39 HDMI_TXN0_PCH DDIC_TXCN_2 FDI_TXP_0
VCCST
39 HDMI_TXP0_PCH
T32
U33 DDIC_TXCP_2 FDI_TXN_1
N32
P32
R1.2 2012/10/29
XDP_TMS R0401 1 @ 2 51Ohm 39
39
HDMI_CLKN_PCH
HDMI_CLKP_PCH
V33 DDIC_TXCN_3
DDIC_TXCP_3
FDI_TXP_1 option changed from /non_FDI
XDP_TDI_R R0402 1 @ 2 51Ohm
XDP_PREQ# R0406 1 2 51Ohm P29 R1.2 2012/12/06
DDID_TXDN_0
XDP_TCK R0407 1
@
2 51Ohm
R29
N28 DDID_TXDP_0 remove R0436~R0439 for GDDR5
XDP_TRST# R0405 1 2 51Ohm P28 DDID_TXDN_1
P31 DDID_TXDP_1
R31 DDID_TXDN_2 R0432 2 1 0Ohm
DDID_TXDP_2 FDI_TXN0 22
N30 R0433 2 1 0Ohm FDI_TXP0 22
P30 DDID_TXDN_3 R0434 2 1 0Ohm
DDID_TXDP_3 FDI_TXN1 22
R0435 2 1 0Ohm FDI_TXP1 22
SOCKET_947P
DDI
DDI
Port B: N/A
Port C: HDMI
12V012BSM001 R1.2 2012/10/29
B DDI Port D: DP to VGA option changed from /FDI B
DDI signals Mapping, check 497750

+3VSUS
+1.35V_VCCDDQ +3VSUS
R1.2 2012/11/27 R0431 1 @ 2 0Ohm
80 VR_HOT#
design gude and check list use 5%
1

Intel CRB 1% R0421 R0425


1.8KOhm U0401 10KOhm
1% 5 A 1
VCC
2

0.87 Volt B 2 +1.35V_VCCDDQ


@
R0424@ H_PROCHOT#
PM_DRAM_PWRGD 0Ohm 2 1 R0423 2 1 4 3 Q0402
GND 3
Y PMBS3904
9.09KOHM Vcc=1.65~5.5 C R0426
1

@ B 1 1 2
1

2
Intel Comments
1

R0422 C0403 E 17.4KOhm C0401 3


D
1

Intel MOW WW14: 3.3KOHM 0.22UF/10V 2 47PF/50V


@
2

1
change R0449, R0450 value C0402 R0427 @ Q0401
@ @
2

A 1% 0.22UF/10V 47KOhm 1 THRO_CPU A


R1.1 THRO_CPU 30
2

1% 2N7002 G
@
2

S 2
@

Power good for +1.35V_VCCDDQ (delay > 15ns)


Processor may be damaged if VIH exceeds the maximum voltage for extended periods.
Title : CPU(1)_DMI,PEG,FDI,CLK,MISC
SM_DRAMPWROK VIH MAX = 1.0V ; VIH MIN=0.45*VDDQ
PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
Custom VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 4 of 96

5 4 3 2 1
5 4 3 2 1

+1.35V +1.35V 6,16,18,63,83

R0520,R0521 must be grounded.


CRB 0.7

Haswell rPGA EDS U0301C Haswell rPGA EDS U0301D


16 M_A_DQ[63:0] 17 M_B_DQ[63:0]
D D
M_A_DQ0 AR15 AC7 M_B_DQ0 AR18 AG8
M_A_DQ1 AT14 SA_DQ_0 RSVD_AC7 U4 M_B_DQ1 AT18 SB_DQ_0 RSVD1 Y4
SA_DQ_1 SA_CK_N_0 M_A_DIM0_CLK_DDR#0 16 SB_DQ_1 SB_CKN0 M_B_DIM0_CLK_DDR#0 17
M_A_DQ2 AM14 V4 M_B_DQ2 AM17 AA4
AN14 SA_DQ_2 SA_CK_P_0 AD9 M_A_DIM0_CLK_DDR0 16 AM18 SB_DQ_2 SB_CK0 AF10 M_B_DIM0_CLK_DDR0 17
M_A_DQ3 M_B_DQ3
SA_DQ_3 SA_CKE_0 M_A_DIM0_CKE0 16 SB_DQ_3 SB_CKE_0 M_B_DIM0_CKE0 17
M_A_DQ4 AT15 U3 M_B_DQ4 AR17 Y3
SA_DQ_4 SA_CK_N_1 M_A_DIM0_CLK_DDR#1 16 SB_DQ_4 SB_CKN1 M_B_DIM0_CLK_DDR#1 17
M_A_DQ5 AR14 V3 M_B_DQ5 AT17 AA3
AN15 SA_DQ_5 SA_CK_P_1 AC9 M_A_DIM0_CLK_DDR1 16 AN17 SB_DQ_5 SB_CK1 AG10 M_B_DIM0_CLK_DDR1 17
M_A_DQ6 M_B_DQ6
SA_DQ_6 SA_CKE_1 M_A_DIM0_CKE1 16 SB_DQ_6 SB_CKE_1 M_B_DIM0_CKE1 17
M_A_DQ7 AM15 U2 M_B_DQ7 AN18 Y2
AM9 SA_DQ_7 SA_CK_N_2 V2 M_A_DIM0_CLK_DDR#2 16 AT12 SB_DQ_7 SB_CKN2 AA2 M_B_DIM0_CLK_DDR#2 17
M_A_DQ8 M_B_DQ8
SA_DQ_8 SA_CK_P_2 M_A_DIM0_CLK_DDR2 16 SB_DQ_8 SB_CK2 M_B_DIM0_CLK_DDR2 17
M_A_DQ9 AN9 AD8 M_B_DQ9 AR12 AG9
SA_DQ_9 SA_CKE_2 M_A_DIM0_CKE2 16 SB_DQ_9 SB_CKE_2 M_B_DIM0_CKE2 17
M_A_DQ10 AM8 U1 M_B_DQ10 AN12 Y1
AN8 SA_DQ_10 SA_CK_N_3 V1 M_A_DIM0_CLK_DDR#3 16 AM11 SB_DQ_10 SB_CKN3 AA1 M_B_DIM0_CLK_DDR#3 17
M_A_DQ11 M_B_DQ11
SA_DQ_11 SA_CK_P_3 M_A_DIM0_CLK_DDR3 16 SB_DQ_11 SB_CK3 M_B_DIM0_CLK_DDR3 17
M_A_DQ12 AR9 AC8 M_B_DQ12 AT11 AF9
AT9 SA_DQ_12 SA_CKE_3 M_A_DIM0_CKE3 16 AR11 SB_DQ_12 SB_CKE_3 M_B_DIM0_CKE3 17
M_A_DQ13 M_B_DQ13
M_A_DQ14 AR8 SA_DQ_13 M7 M_B_DQ14 AM12 SB_DQ_13 P4
SA_DQ_14 SA_CS_N_0 M_A_DIM0_CS#0 16 SB_DQ_14 SB_CS_N_0 M_B_DIM0_CS#0 17
M_A_DQ15 AT8 L9 M_B_DQ15 AN11 R2
AJ9 SA_DQ_15 SA_CS_N_1 M9 M_A_DIM0_CS#1 16 AR5 SB_DQ_15 SB_CS_N_1 P3 M_B_DIM0_CS#1 17
M_A_DQ16 M_B_DQ16
SA_DQ_16 SA_CS_N_2 M_A_DIM0_CS#2 16 SB_DQ_16 SB_CS_N_2 M_B_DIM0_CS#2 17
M_A_DQ17 AK9 M10 M_B_DQ17 AR6 P1
AJ6 SA_DQ_17 SA_CS_N_3 M8 M_A_DIM0_CS#3 16 AM5 SB_DQ_17 SB_CS_N_3 M_B_DIM0_CS#3 17
M_A_DQ18 M_B_DQ18
SA_DQ_18 SA_ODT_0 M_A_DIM0_ODT0 16 SB_DQ_18
M_A_DQ19 AK6 L7 M_B_DQ19 AM6 R4
SA_DQ_19 SA_ODT_1 M_A_DIM0_ODT1 16 SB_DQ_19 SB_ODT_0 M_B_DIM0_ODT0 17
M_A_DQ20 AJ10 L8 M_B_DQ20 AT5 R3
AK10 SA_DQ_20 SA_ODT_2 L10 M_A_DIM0_ODT2 16 AT6 SB_DQ_20 SB_ODT_1 R1 M_B_DIM0_ODT1 17
M_A_DQ21 M_B_DQ21
SA_DQ_21 SA_ODT_3 M_A_DIM0_ODT3 16 SB_DQ_21 SB_ODT_2 M_B_DIM0_ODT2 17
M_A_DQ22 AJ7 V5 M_B_DQ22 AN5 P2
AK7 SA_DQ_22 SA_BS_0 U5 M_A_BS0 16 AN6 SB_DQ_22 SB_ODT_3 R7 M_B_DIM0_ODT3 17
M_A_DQ23 M_B_DQ23
SA_DQ_23 SA_BS_1 M_A_BS1 16 SB_DQ_23 SB_BS_0 M_B_BS0 17
M_A_DQ24 AF4 AD1 M_B_DQ24 AJ4 P8
SA_DQ_24 SA_BS_2 M_A_BS2 16 SB_DQ_24 SB_BS_1 M_B_BS1 17
M_A_DQ25 AF5 M_B_DQ25 AK4 AA9
AF1 SA_DQ_25 V10 AJ1 SB_DQ_25 SB_BS_2 M_B_BS2 17
M_A_DQ26 M_B_DQ26
M_A_DQ27 AF2 SA_DQ_26 VSS1 U6 M_B_DQ27 AJ2 SB_DQ_26 R10
AG4 SA_DQ_27 SA_RAS# U7 M_A_RAS# 16 AM1 SB_DQ_27 VSS2 R6
M_A_DQ28 M_B_DQ28
SA_DQ_28 SA_WE# M_A_WE# 16 SB_DQ_28 SB_RAS# M_B_RAS# 17
M_A_DQ29 AG5 U8 M_B_DQ29 AN1 P6
SA_DQ_29 SA_CAS# M_A_CAS# 16 SB_DQ_29 SB_WE# M_B_WE# 17
M_A_DQ30 AG1 M_B_DQ30 AK2 P7
AG2 SA_DQ_30 V8 M_A_A[15:0] 16 AK1 SB_DQ_30 SB_CAS# M_B_CAS# 17
M_A_DQ31 M_A_A0 M_B_DQ31
SA_DQ_31 SA_MA_0 SB_DQ_31 M_B_A[15:0] 17
M_A_DQ32 J1 AC6 M_A_A1 M_B_DQ32 L2 R8 M_B_A0
M_A_DQ33 J2 SA_DQ_32 SA_MA_1 V9 M_A_A2 M_B_DQ33 M2 SB_DQ_32 SB_MA_0 Y5 M_B_A1
M_A_DQ34 J5 SA_DQ_33 SA_MA_2 U9 M_A_A3 M_B_DQ34 L4 SB_DQ_33 SB_MA_1 Y10 M_B_A2
M_A_DQ35 H5 SA_DQ_34 SA_MA_3 AC5 M_A_A4 M_B_DQ35 M4 SB_DQ_34 SB_MA_2 AA5 M_B_A3
M_A_DQ36 H2 SA_DQ_35 SA_MA_4 AC4 M_A_A5 M_B_DQ36 L1 SB_DQ_35 SB_MA_3 Y7 M_B_A4
M_A_DQ37 H1 SA_DQ_36 SA_MA_5 AD6 M_A_A6 M_B_DQ37 M1 SB_DQ_36 SB_MA_4 AA6 M_B_A5
C C
M_A_DQ38 J4 SA_DQ_37 SA_MA_6 AC3 M_A_A7 M_B_DQ38 L5 SB_DQ_37 SB_MA_5 Y6 M_B_A6
M_A_DQ39 H4 SA_DQ_38 SA_MA_7 AD5 M_A_A8 M_B_DQ39 M5 SB_DQ_38 SB_MA_6 AA7 M_B_A7
M_A_DQ40 F2 SA_DQ_39 SA_MA_8 AC2 M_A_A9 M_B_DQ40 G7 SB_DQ_39 SB_MA_7 Y8 M_B_A8
M_A_DQ41 F1 SA_DQ_40 SA_MA_9 V6 M_A_A10 M_B_DQ41 J8 SB_DQ_40 SB_MA_8 AA10 M_B_A9
M_A_DQ42 D2 SA_DQ_41 SA_MA_10 AC1 M_A_A11 M_B_DQ42 G8 SB_DQ_41 SB_MA_9 R9 M_B_A10
M_A_DQ43 D3 SA_DQ_42 SA_MA_11 AD4 M_A_A12 M_B_DQ43 G9 SB_DQ_42 SB_MA_10 Y9 M_B_A11
M_A_DQ44 D1 SA_DQ_43 SA_MA_12 V7 M_A_A13 M_B_DQ44 J7 SB_DQ_43 SB_MA_11 AF7 M_B_A12
M_A_DQ45 F3 SA_DQ_44 SA_MA_13 AD3 M_A_A14 M_B_DQ45 J9 SB_DQ_44 SB_MA_12 P9 M_B_A13
M_A_DQ46 C3 SA_DQ_45 SA_MA_14 AD2 M_A_A15 M_B_DQ46 G10 SB_DQ_45 SB_MA_13 AA8 M_B_A14
R1.2 2012/11/08 M_A_DQ47 B3 SA_DQ_46 SA_MA_15 M_B_DQ47 J10 SB_DQ_46 SB_MA_14 AG7 M_B_A15
SA_DQ_47 SB_DQ_47 SB_MA_15
cost dwon 0ohm M_A_DQ48 B5
SA_DQ_48 M_A_DQS#[7:0] 16
M_B_DQ48 A8
SB_DQ_48
2N7002

M_A_DQ49 E6 AP15 M_A_DQS#0 M_B_DQ49 B8


Q0506

18 DIMM_VREF_CA SA_DQ_49 SA_DQS_N_0 SB_DQ_49 M_B_DQS#[7:0] 17


M_A_DQ50 A5 AP8 M_A_DQS#1 M_B_DQ50 A9 AP18 M_B_DQS#0
SA_DQ_50 SA_DQS_N_1 SB_DQ_50 SB_DQS_N_0
1

3 M_A_DQ51 D6 AJ8 M_A_DQS#2 M_B_DQ51 B9 AP11 M_B_DQS#1


D SA_DQ_51 SA_DQS_N_2 SB_DQ_51 SB_DQS_N_1
SP0501 M_A_DQ52 D5 AF3 M_A_DQS#3 M_B_DQ52 D8 AP5 M_B_DQS#2
M_A_DQ53 E5 SA_DQ_52 SA_DQS_N_3 J3 M_A_DQS#4 M_B_DQ53 E8 SB_DQ_52 SB_DQS_N_2 AJ3 M_B_DQS#3
R0603 SA_DQ_53 SA_DQS_N_4 SB_DQ_53 SB_DQS_N_3
DRAMRST_CNTRL_PCH 1 M_A_DQ54 B6 E2 M_A_DQS#5 M_B_DQ54 D9 L3 M_B_DQS#4
G M_A_DQ55 A6 SA_DQ_54 SA_DQS_N_5 C5 M_A_DQS#6 M_B_DQ55 E9 SB_DQ_54 SB_DQS_N_4 H9 M_B_DQS#5
2

2 S M_A_DQ56 E12 SA_DQ_55 SA_DQS_N_6 C11 M_A_DQS#7 M_B_DQ56 E15 SB_DQ_55 SB_DQS_N_5 C8 M_B_DQS#6
SA_DQ_56 SA_DQS_N_7 M_A_DQS[7:0] 16 SB_DQ_56 SB_DQS_N_6
@ M_A_DQ57 D12 AP14 M_A_DQS0 M_B_DQ57 D15 C14 M_B_DQS#7
B11 SA_DQ_57 SA_DQS_P_0 AP9 A15 SB_DQ_57 SB_DQS_N_7 AP17 M_B_DQS[7:0] 17
M_A_DQ58 M_A_DQS1 M_B_DQ58 M_B_DQS0
16,18 DIMM0_VREF_DQ SA_DQ_58 SA_DQS_P_1 SB_DQ_58 SB_DQS_P_0
M_A_DQ59 A11 AK8 M_A_DQS2 M_B_DQ59 B15 AP12 M_B_DQS1
SA_DQ_59 SA_DQS_P_2 SB_DQ_59 SB_DQS_P_1
1

R1.2 2012/11/28 SP0502


M_A_DQ60
M_A_DQ61
E11
D11 SA_DQ_60 SA_DQS_P_3
AG3
H3
M_A_DQS3
M_A_DQS4
M_B_DQ60
M_B_DQ61
E14
D14 SB_DQ_60 SB_DQS_P_2
AP6
AK3
M_B_DQS2
M_B_DQS3
cost dwon 0ohmQ0502B SA_DQ_61 SA_DQS_P_4 SB_DQ_61 SB_DQS_P_3
3

R0603 M_A_DQ62 B12 E3 M_A_DQS5 M_B_DQ62 A14 M3 M_B_DQS4


@ D M_A_DQ63 A12 SA_DQ_62 SA_DQS_P_5 C6 M_A_DQS6 M_B_DQ63 B14 SB_DQ_62 SB_DQS_P_4 H8 M_B_DQS5
DRAMRST_CNTRL_PCH 5 DDR_CA_VREF AM3 SA_DQ_63 SA_DQS_P_6 C12 M_A_DQS7 SB_DQ_63 SB_DQS_P_5 C9 M_B_DQS6
2

DDR_WR_VREF01 F16 SM_VREF SA_DQS_P_7 SB_DQS_P_6 C15 M_B_DQS7


G S DDR_WR_VREF02 F13 SA_DIMM_VREFDQ SB_DQS_P_7
SB_DIMM_VREFDQ
UM6K1NG1DTN
4

SOCKET_947P
1 R0515

1 R0509

1 R0510

12V012BSM001
SOCKET_947P
12V012BSM001
1% 1% 1%
@ @ @
B B
2

R1.0 S3 circuit:- DRAM_RST# to memory should be high during S3


1KOhm

1KOhm

1KOhm

+1.35V
1

UM6K1NG1DTN
1

G S
DRAMRST_CNTRL_PCH 2 SP0503
2

R0603
@ D
R0507
Q0502A 1KOhm
6

@
R1.2 2012/11/28 0614-change Q0501 from UM6K1N to 2N7002
1

R1.0 0209
17,18 DIMM1_VREF_DQ cost dwon 0ohm Change R0508 to 1K ohm R0501 2 1 0Ohm

R0508 close to DIMM @ Q0501


2N7002
CPU driven VREF path is stuffed by default
CRB 0.7 R0508 1 2 1KOhm CPUDRAMRST#_R
2 S
D

16,17 DDR3_DRAMRST# CPUDRAMRST# 4


3

1 1% 2
G

@ R0506 4.99KOhm
1

21 DRAMRST_CNTRL_PCH
1

@ C0501
0.047UF/16V
2

Reserve S3 power reduction schematic

If don't support S3 power reduction


A 1. Unmount R0450, R0452, U0404, R0453, Q0403, C0404, R0455, R0454, C0405 A
2. Change R0449 to 200ohm from 1kohm, change R0409 to 130ohm from 0ohm - Design Guide 1.0 page 106
3. Unmount Q0501, C0501, R0506, R0504, R0507
4. Mount R0501, change r0508 to 0ohm from 1kohm

5 Unmount Q0701, R0703, R0705, Q0702


6. Mount R0702 and short JP0701
7. Unmount R2232, R2231, Q2203

Title : CPU(2)_DDR3
PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
C VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 5 of 96

5 4 3 2 1
5 4 3 2 1

+1.35V_VCCDDQ +1.35V_VCCDDQ 4

+1.35V +1.35V 5,16,18,63,83

+VCORE +VCORE 9,63,80


Decoupling guide from Intel (SPEC) Decoupling guide from Intel (EE)
+VCCIO_OUT +VCCIO_OUT 4,37,47,63
VDDQ 22uF * 11 pcs (stuff) VDDQ 22uF * 2pcs (stuff)
10uF * 10 pcs (stuff) 10uF * 2pcs (stuff) +VCCIO2PCH +VCCIO2PCH 27
330uF * 2 pcs (stuff) 330uF * 1pcs (stuff) +VCCIOA_OUT +VCCIOA_OUT 3,4

Decoupling guide from Intel ( SPEC) Decoupling guide from Intel ( EE)
+VCORE 10uF * 11pcs (stuff) +VCORE 10uF * 11 pcs (stuff)
D
22uF * 19pcs (stuff) 22uF * 19 pcs (stuff) D
470uF * 4pcs (stuff) 470uF * 5 pcs (stuff)

+VCORE
U0301E Haswell rPGA EDS

AA26
1 @ 2 PS_S3CNTRL_1.5V_R VCC100 AA28
22 PS_S3CNTRL_1.5V VCC99
R0608 0Ohm K27 AA34
@ L27 RSVD23 VCC98 AA30
2 1 T27 RSVD22 VCC97 AA32
470PF/50V C0623 V27 RSVD21 VCC96 AB26
@ RSVD20 VCC95 AB29
SIR472DP-T1-GE3
+1.35V_VCCDDQ VCC94 AB25
VCC93
G
+1.35V
5 4 AB27
D 5
3 VCC92 AB28
6 S
2 AB11 VCC91 AB30
7
1 AB2 VDDQ13 VCC90 AB31
8
AB5 VDDQ12 VCC89 AB33
VDDQ11 VCC88

1
Q0601 @ @ @ @ @ @ @ @ @ AB8 AB34
+ + AE11 VDDQ10 VCC87 AB32
CE0602 CE0601 C0604 C0605 C0614 C0625 C0626 C0606 C0618 C0619 C0621 C0620 C0624
AE2 VDDQ9 VCC86 AC26
560UF/2.5V 560UF/2.5V22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V

2
AE5 VDDQ8 VCC85 AB35
Default: no support @

2
JP0601 vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small AE8 VDDQ7 VCC84 AC28
S3 power reduction 4.2A 2 1 vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small AH11 VDDQ6 VCC83 AD25
2 1 K11 VDDQ14 VCC82 AC30
3MM_OPEN_5MIL N11 VDDQ15 VCC81 AD28
VDDQ5 VCC80

1
@ @ @ @ @ @ @ @ @ @ N8 AC32
C0603 C0622 C0642 C0643 C0646 C0615 C0613 C0601 C0617 C0602 T11 VDDQ16 VCC79 AD31
JP0602 VDDQ4 VCC78
10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V T2 AC34
2 1

2
T5 VDDQ17 VCC77 AD34
2 1
vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small T8 VDDQ3 VCC76 AD26
1MM_OPEN_M1M2 VDDQ18 VCC75
vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small W11 AD27
W2 VDDQ2 VCC74 AD29
+VCORE W5 VDDQ19 VCC73 AD30
W8 VDDQ1 VCC72 AD32
VDDQ20 VCC71 AD33
C VCC70 C
N26 AD35
+VCCIO_OUT(1---1.05V) output from CPU K26 RSVD19 VCC69 AE26
+VCCIOA_OUT +VCORE AL27 VCC103 VCC68 AE32
Placement note:
1. R0602 close to CPU AK27 RSVD18 VCC67 AE28
Unstuff R0622 RSVD24 VCC66
2. R0603 close to CPU +VCCIO2PCH AE30
VCC65

2
3. R0605 close to VR AG28
4. R0608 close to CPU Intel MOW WW09: renamed VCC64
R1.1 +VCCIO_OUT R0601 AG34
5. R0607 close to VR VCCIO2PCH to RSVD VCC63
6. R0611 close to CPU 100Ohm R1.2 2012/11/08 AE34
R1.2 2012/11/16 1% VCC62 AF25
follow Intel CRB cost dwon 0ohm VCC61 AF26

1
Place as close to CPU as possible SP0601 1 2VCC_SENSE_R
R0402 AL35 VCC60 AF27
80 VCCSENSE VCC_SENSE VCC59
R1.2 2012/11/26 E17 AF28
R0603 1 0Ohm 2 +VCCIO_OUT_R AN35 RSVD27 VCC58 AF29
follow design guide VCCIO_OUT VCC57
+VCCIO_OUT +VCCIO_OUT +VCCIO_OUT +VCCIO_OUT R0604 1 0Ohm@ 2 +VCCIO2PCH_R A23 AF30
R0605 1 0Ohm 2 +VCCIOA_OUT_R F22 RSVD25 VCC56 AF31
C0655 W32 VCOMP_OUT VCC55 AF32
2

1
C0657 4.7UF/6.3V AL16 RSVD30 VCC54 AF33
RSVD29 VCC53

2
R0610 R0613 R0611 22UF/6.3V C0611 C0612 T0601 1 J27 AF34
@ RSVD26 VCC52
130Ohm R0609 54.9Ohm 75Ohm @ 0.01UF/50V 0.01UF/50V AL13 AF35

2
1% 130Ohm 1% R1.2 2012/11/08 1% RSVD28 VCC51 AG26
1% cost dwon 0ohm VCC50 AH26
R1.2 2012/11/08 80 VR_SVID_ALERT#
1

2
R0612 43Ohm H_CPU_SVIDALRT# AM28 VCC49 AH29
cost dwon 0ohm

1
+VCORE SP0603 1 2 R0402 H_CPU_SVIDCLK AM29 VIDALERT# VCC48 AG30
80 VR_SVID_CLK VIDSCLK VCC102
SP0602 1 2 R0402 H_CPU_SVIDDAT AL28 AG32
80 VR_SVID_DATA VIDSOUT VCC101 AH32
AP35 VCC47 AH35
T0606 1PWR_DEBUG H27 VSS3 VCC46 AH25
AP34 PWR_DEBUG VCC45 AH27
T0602 1 AT35 VSS4 VCC44 AH28
T0603 1 AR35 RSVD_TP4 VCC43 AH30
Power team suggestion RSVD_TP3 VCC42
1

1
T0605 1 AR32 AH31
C0647 C0654 C0652 C0650 C0648 C0653 C0651 C0649 C0645 C0644 C0616 T0604 1 AL26 RSVD_TP2 VCC41 AH33
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V AT34 RSVD_TP1 VCC40 AH34
2

AL22 VSS5 VCC39 AJ25


vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small AT33 VSS6 VCC38 AJ26
vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small AM21 VSS7 VCC37 AJ27
AM25 VSS8 VCC36 AJ28
B VSS9 VCC35 B
AM22 AJ29
AM20 VSS10 VCC34 AJ30
AM24 VSS11 VCC33 AJ31
AL19 VSS12 VCC32 AJ32
1

AM23 VSS13 VCC31 AJ33


C0630 C0641 C0640 C0636 C0634 C0639 C0637 C0607 C0627 C0608 AT32 VSS14 VCC30 AJ34
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
If XDP not implemented, then Route Processor PWR_DEBUG as a test point. VSS15 VCC29 AJ35
This Test point must be clearly labeled(shark bay schematic check list 497750)
2

VCC28 G25
vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small VCC27 H25
vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small VCC26 J25
+VCORE VCC25 K25
VCC24 L25
VCC23 M25
Y25 VCC22 N25
Y26 VCC11 VCC21 P25
VCC10 VCC20
1

Y27 R25
C0638 C0628 C0632 C0629 C0631 C0635 C0633 C0609 C0610 Y28 VCC9 VCC19 T25
22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V Y29 VCC8 VCC18
2

Y30 VCC7 U25


vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small Y31 VCC6 VCC17 U26
vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small Y32 VCC5 VCC16 V25
Y33 VCC4 VCC15 V26
Y34 VCC3 VCC14
Y35 VCC2 W26
VCC1 VCC13 W27
VCC12
SOCKET_947P
12V012BSM001

Cap of 470UF or more place at power schematic

A A

Title : CPU(4)_PWR
PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
Custom VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 6 of 96

5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : CPU(4)_PWR
PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
C VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 7 of 96
5 4 3 2 1
5 4 3 2 1

U0301F Haswell rPGA EDS

A10 AK34 U0301G Haswell rPGA EDS


A13 VSS16 VSS314 AK5
A16 VSS127 VSS315 AL1 B34 K10
A19 VSS238 VSS316 AL10 B4 VSS84 VSS174 K2
A22 VSS268 VSS317 AL11 B7 VSS85 VSS175 K29
A25 VSS279 VSS318 AL12 C1 VSS86 VSS176 K3
A27 VSS290 VSS319 AL14 C10 VSS87 VSS177 K31
A29 VSS301 VSS320 AL15 C13 VSS88 VSS178 K33
D A3 VSS312 VSS321 AL17 C16 VSS89 VSS179 K35 D
A31 VSS323 VSS322 AL18 C19 VSS90 VSS180 K4
A33 VSS17 VSS324 AL2 C2 VSS91 VSS181 K5
A4 VSS28 VSS325 AL20 C22 VSS92 VSS182 K7
A7 VSS39 VSS326 AL21 C24 VSS93 VSS184 K8
AA11 VSS50 VSS327 AL23 C26 VSS95 VSS185 K9
AA25 VSS61 VSS328 E22 C28 VSS96 VSS186 L11
AA27 VSS72 VSS329 AL3 C30 VSS97 VSS187 L26
AA31 VSS83 VSS330 AL4 C32 VSS98 VSS188 L6
AA29 VSS94 VSS331 AL5 C34 VSS99 VSS189 M11
AB1 VSS105 VSS332 AL6 C4 VSS100 VSS190 M26
AB10 VSS116 VSS333 AL7 C7 VSS101 VSS191 M28
AA33 VSS128 VSS18 AL8 D10 VSS102 VSS192 M30
AA35 VSS139 VSS19 AL9 D13 VSS103 VSS193 M32
AB3 VSS150 VSS20 AM10 D16 VSS104 VSS195 M34
AC25 VSS161 VSS21 AM13 D19 VSS106 VSS196 M6
AC27 VSS172 VSS22 AM16 D22 VSS107 VSS197 N1
AB4 VSS183 VSS23 AM19 D25 VSS108 VSS198 N10
AB6 VSS194 VSS24 E25 D27 VSS109 VSS199 N2
AB7 VSS205 VSS25 AM32 D29 VSS110 VSS200 N29
AB9 VSS216 VSS26 AM4 D31 VSS111 VSS201 N3
AC11 VSS227 VSS27 AM7 D33 VSS112 VSS202 N31
AD11 VSS239 VSS29 AN10 D35 VSS113 VSS203 N33
AC29 VSS250 VSS30 AN13 D4 VSS114 VSS204 N35
C VSS260 VSS31 VSS115 VSS206 C
AC31 AN16 D7 N4
AC33 VSS261 VSS32 AN19 E1 VSS117 VSS207 N5
AC35 VSS262 VSS33 AN2 E10 VSS118 VSS208 N6
AD7 VSS263 VSS34 AN21 E13 VSS119 VSS209 N7
AE1 VSS264 VSS35 AN24 E16 VSS120 VSS210 N9
AE10 VSS265 VSS36 AN27 E4 VSS121 VSS211 P11
AE25 VSS266 VSS37 AN30 E7 VSS122 VSS212 P26
AE29 VSS267 VSS38 AN34 F10 VSS123 VSS213 P5
AE3 VSS269 VSS40 AN4 F11 VSS124 VSS214 R11
AE27 VSS270 VSS41 AN7 F12 VSS125 VSS215 R26
AE35 VSS271 VSS42 AP1 F14 VSS126 VSS217 R28
AE4 VSS272 VSS43 AP10 F15 VSS129 VSS218 R30
AE6 VSS273 VSS44 AP13 F17 VSS130 VSS219 R32
AE7 VSS274 VSS45 AP16 F18 VSS131 VSS220 R34
AE9 VSS275 VSS46 AP19 F20 VSS132 VSS221 R5
AF11 VSS276 VSS47 AP4 F21 VSS133 VSS222 T1
AF6 VSS277 VSS48 AP7 F23 VSS134 VSS223 T10
AF8 VSS278 VSS49 W25 F24 VSS135 VSS224 T29
AG11 VSS280 VSS51 AR10 F26 VSS136 VSS225 T3
AG25 VSS281 VSS52 AR13 F28 VSS137 VSS226 T31
AE31 VSS282 VSS53 AR16 F30 VSS138 VSS228 T33
AG31 VSS283 VSS54 AR19 F32 VSS140 VSS229 T35
AE33 VSS284 VSS55 AR2 F34 VSS141 VSS230 T4
AG6 VSS285 VSS56 AR22 F4 VSS142 VSS231 T6
B B
AH1 VSS286 VSS57 AR25 F6 VSS143 VSS232 T7
AH10 VSS287 VSS58 AR28 F7 VSS144 VSS233 T9
AH2 VSS288 VSS59 AR31 F8 VSS145 VSS234 U11
AG27 VSS289 VSS60 AR34 F9 VSS146 VSS235 U27
AG29 VSS291 VSS62 AR4 G1 VSS147 VSS236 V11 R1.2 2012/11/08
VSS292 VSS63 VSS148 VSS237 Placement note:
AH3
AG33 VSS293 VSS64
AR7
AT10
G11
G2 VSS149 VSS240
V28
V30
cost dwon 0ohm
1. SP0801 close to CPU
AG35 VSS294 VSS65 AT13 G27 VSS151 VSS241 V32 SP0801 R0402
AH4 VSS295 VSS66 AT16 G29 VSS152 VSS242 V34 VSS_SENSE_R 1 2
AH5 VSS296 VSS67 AT19 G3 VSS153 VSS243 W1 VSSSENSE 80
AH6 VSS297 VSS68 AT21 G31 VSS154 VSS244 W10
VSS298 VSS69 VSS155 VSS245

2
AH7 AT24 G33 W3
AH8 VSS299 VSS70 AT27 G35 VSS156 VSS246 W35 R0802
AH9 VSS300 VSS71 AT3 G4 VSS157 VSS247 W4 100Ohm
AJ11 VSS302 VSS73 AT30 G5 VSS158 VSS248 W6 1%
AJ5 VSS303 VSS74 AT4 H10 VSS159 VSS249 W7

1
AK11 VSS304 VSS75 AT7 H26 VSS160 VSS251 W9
AK25 VSS305 VSS76 B10 H6 VSS162 VSS252 Y11
AK26 VSS306 VSS77 B13 H7 VSS163 VSS253 H11
AK28 VSS307 VSS78 B16 J11 VSS164 VSS254 AL24
AK29 VSS308 VSS79 B19 J26 VSS165 VSS255 F19
AK30 VSS309 VSS80 B2 J28 VSS166 VSS256 T26
VSS310 VSS81 VSS167 VSS257 T0801
AK32 B22 J30 AK35
A E19 VSS311 VSS82 J32 VSS168 VSS_SENSE AK33 1 A
VSS313 J34 VSS169 RSVD31
J6 VSS170
VSS171
K1
VSS173 Title : CPU(3)_CFG,RSVD,GND
SOCKET_947P Engineer: Wing_Cheng
PEGATRON COMPUTER INC
12V012BSM001
SOCKET_947P Size Project Name Rev
12V012BSM001 B VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 8 of 96

5 4 3 2 1
5 4 3 2 1

+VCORE +VCORE 6,63,80


CFG strapping information: The CFG signals have a default value of '1'

U0301I Haswell rPGA EDS


CFG[1:0]: Reserved configuration lane.

D AT1 D
AT2 RSVD_TP17 C23
CFG[2]: PCIE Static Numbering Lane Reversal- CFG[2] is for the 16x RSVD_TP16 RSVD_TP11 R1.2 2012/11/26
AD10 B23
RSVD2 RSVD_TP10
- 1: (Default) Normal Operation, Lane # definition matches sockect pin map definition
A34 RSVD_TP9
D24
D23
reserved for 2014 processor
- 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ... A35 RSVD_TP15 RSVD_TP8
RSVD_TP14
PM_PWROK 22,30,92
W29
W28 RSVD_TP18 AT31 CFG_RCOMP 49.9Ohm 1 1% 2 R0908
CFG[4]: eDP enable RSVD_TP19 CFG_RCOMP
R0901 2 1% 1 49.9Ohm H_CPU_RSVDG26 G26 AR21 CFG16 1 T0922

1
W33 TESTLO1 CFG_16 AR23 CFG17 1 T0923
-1 = Disabled AL30 RSVD3 CFG_18 AP21 1
R0910
CFG18 T0925
-0 = Enabled AL29 RSVD4 CFG_17 AP23 CFG19 1 T0924 4.7KOhm
RSVD5 CFG_19 @
+VCORE F25
VCC104 1%

2
CFG[6:5]: PCI Express Port Bifurcation Straps C35
B35 RSVD_TP13 RSVD6
AR33
G6 FC_G6
R1.2 2012/11/28
-00 = 1 x8, 2 x4 PCI Express*
RSVD_TP12 FC2
RSVD7
AM27 channged from 2.2k/5%

1
AL25 AM26
-01 = reserved RSVD_TP20 RSVD8 F5 R0911
-10 = 2 x8 PCI Express* W30 RSVD9 AM2 2.2KOhm
-11 = 1 x16 PCI Express* W31 RSVD_TP21 RSVD10 K6 1%
R0902 2 1% 1 49.9Ohm H_CPU_RSVDW34 W34 RSVD_TP22 RSVD11 @

2
TESTLO2 E18
T0905 1 CFG0 AT20 RSVD12
CFG[19:7]: Reserved configuration lane. CFG_0
C
T0906 1 CFG1 AR20
CFG_1 RSVD13
U10 FC signals are signals that are available for compatibility with other processors. A test point C
T0907 1 CFG2 AP20
CFG_2 RSVD14
P10 may be placed on the board for these lands. Refer to the appropriate platform design guide
T0908 1 CFG3 AP22
T0910 1 CFG4 AT22 CFG_3 B1 for implementation details.(haswell EDS 487246)
T0911 1 CFG5 AN22 CFG_4 NC A2
T0912 1 CFG6 AT25 CFG_5 RSVD15 AR1
T0914 1 CFG7 AN23 CFG_6 RSVD_TP7
T0913 1 CFG8 AR24 CFG_7 E21
T0915 1 CFG9 AT23 CFG_8 RSVD_TP6 E20
T0917 1 CFG10 AN20 CFG_9 RSVD_TP5
T0916 1 CFG11 AP24 CFG_10 AP27
T0918 1 CFG12 AP26 CFG_11 RSVD16 AR26
T0919 1 CFG13 AN25 CFG_12 RSVD17
T0920 1 CFG14 AN26 CFG_13 AL31
T0921 1 CFG15 AP25 CFG_14 VSS258 AL32
CFG_15 VSS259

SOCKET_947P
12V012BSM001
CFG2 1 1% 2
R0903 1KOhm

B B
CFG4 1 1% 2
R0905 1KOhm

CFG5 1 1% 2
R0904 @ 1KOhm

CFG6 1 1% 2
R0906 @ 1KOhm

CFG7 1 1% 2
R0907 @ 1KOhm

CFG9 1 1% 2
R0909 1KOhm
@

A A

Title : CPU(3)_CFG,RSVD,GND
PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
Custom VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 9 of 96

5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : NB(3)_****
PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
C VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 10 of 96
5 4 3 2 1
5 4 3 2 1

+1.35V +1.35V 5,6,18,63,83

+0.675VS +0.675VS 17,63,83


R1.2 2012/11/20
M_A_DIM0_CLK_DDR0 Part ref. changed +3VS +3VS 17,20,21,22,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92

H:4mm
1

+1.35V +1.35V_DDR3
+1.35V_DDR3 +1.35V_DDR3 17

1
R1601
5 M_A_A[15:0] M_A_DQ[63:0] 5
150Ohm C1621
JP1601
@ 2 10PF/50V CON1601A
M_A_A0 98 5 M_A_DQ0 1 2
2

M_A_DIM0_CLK_DDR#0 M_A_A1 97 A0 DQ0 7 M_A_DQ4 1 2


@ M_A_A2 96 A1 DQ1 15 M_A_DQ3 3MM_OPEN_5MIL R1.2 2012/11/20
A2 DQ2
M_A_A3 95
92 A3 DQ3
17
4
M_A_DQ2
JP1602 Part ref. changed
M_A_A4
M_A_A5 91 A4 0 DQ4 6
M_A_DQ7
M_A_DQ6
ok 2
2 1
1
M_A_DIM0_CLK_DDR1 M_A_A6 90 A5 DQ5 16 M_A_DQ1
A6 DQ6 2MM_OPEN_5MIL
M_A_A7 86 18 M_A_DQ5
1

M_A_A8 89 A7 DQ7 21 M_A_DQ11 +1.35V_DDR3 +1.35V_DDR3


A8 DQ8
1

R1602 M_A_A9 85 23 M_A_DQ9 CON1601B


C1622 M_A_A10 107 A9 DQ9 33 M_A_DQ15 75 76
150Ohm A10/AP DQ10 VDD1 VDD2
10PF/50V M_A_A11 84 35 M_A_DQ14 81 82
@
2

D M_A_A12 83 A11 DQ11 22 M_A_DQ10 87 VDD3 VDD4 88 D


2

1
M_A_DIM0_CLK_DDR#1 M_A_A13 119 A12/BC# DQ12 24 M_A_DQ8 93 VDD5 VDD6 94
@ M_A_A14 80 A13 1 DQ13 34 M_A_DQ12
ok C1601 C1602
99 VDD7 VDD8 100
C1603 C1604

M_A_A15 78 A14 DQ14 36 M_A_DQ13 0.1UF/10V 0.1UF/10V 105 VDD9 VDD10 106 0.1UF/10V 0.1UF/10V

2
A15 DQ15 39 M_A_DQ20 111 VDD11 VDD12 112
DQ16 41 M_A_DQ17 117 VDD13 VDD14 118
102 DQ17 51 M_A_DQ18 123 VDD15 VDD16 124
5 M_A_DIM0_CLK_DDR1
104 CK1 DQ18 53 M_A_DQ23
Layout Note: Place these caps near SO DIMM 0 VDD17 VDD18
5 M_A_DIM0_CLK_DDR#1 101 CK1# DQ19 40 M_A_DQ16
5 M_A_DIM0_CLK_DDR0 103 CK0 2 DQ20 42 M_A_DQ21
ok 2 3
5 M_A_DIM0_CLK_DDR#0 CK0# DQ21 VSS1 VSS2
50 M_A_DQ19 8 9
121 DQ22 52 M_A_DQ22 13 VSS3 VSS4 14
5 M_A_DIM0_CS#1 S1# DQ23 VSS5 VSS6
114 57 M_A_DQ24 19 20
5 M_A_DIM0_CS#0 S0# DQ24 59 25 VSS7 VSS8 26
M_A_DQ28
120 DQ25 67 M_A_DQ27 31 VSS9 VSS10 32
5 M_A_DIM0_ODT1 ODT1 DQ26 VSS11 VSS12
116 69 37 38
5 M_A_DIM0_ODT0 ODT0 DQ27 56
M_A_DQ31
M_A_DQ25
ok 43 VSS13 VSS14 44
113
3 DQ28 58 M_A_DQ29 48 VSS15 VSS16 49
5 M_A_WE# WE# DQ29 VSS17 VSS18 +1.35V_DDR3 +0.675VS
110 68 M_A_DQ30 54 55
5 M_A_RAS# 115 RAS# DQ30 70 60 VSS19 VSS20 61 +1.35V_DDR3
M_A_DQ26 Layout Note: Place these caps near SO DIMM 0
5 M_A_CAS# CAS# DQ31 VSS21 VSS22
129 M_A_DQ37 65 66
79 DQ32 131 M_A_DQ32 71 VSS23 VSS24 72
5 M_A_BS2 BA2 DQ33 VSS25 VSS26

1
108 141 M_A_DQ35 127 128 @
5 M_A_BS1 109 BA1 DQ34 143 133 VSS27 VSS28 134 +
M_A_DQ34 CE1603
5 M_A_BS0 BA0 DQ35 VSS29 VSS30

1
130 138 139
74 DQ36 132
M_A_DQ38
M_A_DQ33
ok 144 VSS31 VSS32 145
220UF/6.3V C1626
10UF/10V
C1625
10UF/10V
C1628
10UF/10V
C1633
10UF/10V
C1631
10UF/10V
C1627
10UF/10V C1632 C1629 C1630 C1634

2
5 M_A_DIM0_CKE1 73 CKE1 DQ37 140 150 VSS33 VSS34 151
M_A_DQ36
5 M_A_DIM0_CKE0 4 1BV090000003
@ @ @ 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
CKE0 DQ38 142 M_A_DQ39 155 VSS35 VSS36 156 @ @
1 2 RN1601A 201 DQ39 147 M_A_DQ44 161 VSS37 VSS38 162
3 10KOhm 4 197 SA1 DQ40 149 167 VSS39 VSS40 168
SMBus Slave Address: A0H RN1601B M_A_DQ42
10KOhm SA0 DQ41 VSS41 VSS42
157 M_A_DQ47 172 173
DQ42 159 M_A_DQ45 178 VSS43 VSS44 179
5 M_A_DQS[7:0]
M_A_DQS0 M_A_DQS7 188 DQ43 146 M_A_DQ40
ok 184 VSS45 VSS46 185
M_A_DQS1 M_A_DQS#7 186 DQS7 DQ44 148 M_A_DQ41 189 VSS47 VSS48 190
171 DQS#7 DQ45 158 195 VSS49 VSS50 196
M_A_DQS2
M_A_DQS3
M_A_DQS6
M_A_DQS#6 169 DQS6 5 DQ46 160
M_A_DQ43
M_A_DQ46 VSS51 VSS52
M_A_DQS4 M_A_DQS5 154 DQS#6 DQ47 163 M_A_DQ52 207
M_A_DQS5 M_A_DQS#5 152 DQS5 DQ48 165 M_A_DQ53 T1601 1 PM_EXTTS#0_DIM_A 198 GND1 208
M_A_DQS6 M_A_DQS4 137 DQS#5 DQ49 175 M_A_DQ55 125 EVENT# GND2
M_A_DQS7 M_A_DQS#4 135 DQS4 DQ50 177 M_A_DQ54 TEST 205
Reserve
5 M_A_DQS#[7:0] DQS#4 DQ51 NP_NC1
64 164 77 206
M_A_DQS#0
M_A_DQS#1
M_A_DQS3
M_A_DQS#3 62 DQS3 DQ52 166
M_A_DQ51
M_A_DQ49
ok 122 NC1 NP_NC2
47 DQS#3 DQ53 174 NC2 203
M_A_DQS#2
M_A_DQS#3
M_A_DQS2
M_A_DQS#2 45 DQS2 6 DQ54 176
M_A_DQ48
M_A_DQ50 +V_VREF_CA_DIMM0 VTT1 204
+0.675VS +3VS
M_A_DQS#4 M_A_DQS1 29 DQS#2 DQ55 181 M_A_DQ58 VTT2
M_A_DQS#5 M_A_DQS#1 27 DQS1 DQ56 183 M_A_DQ61 126
M_A_DQS#6 M_A_DQS0 12 DQS#1 DQ57 191 M_A_DQ63 1 VREFCA 199
10 DQS0 DQ58 193 VREFDQ VDDSPD
M_A_DQS#7 M_A_DQS#0 M_A_DQ57 ok

1
DQS#0 DQ59 180 M_A_DQ60 C1608 C1606
187 DQ60 182 M_A_DQ56 C1609 C1605
C 170 DM7 DQ61 192 C
7 M_A_DQ62 2.2UF/6.3V 0.1UF/10V 0.1UF/10V 2.2UF/6.3V

2
153 DM6 DQ62 194 M_A_DQ59 @ @
DM should connect to GND directly
Design Guide 0.9 p86 (436735) 136 DM5 DQ63
63 DM4 Reference schematic have 2.2 uf cap.
46 DM3 +V_VREF_DQ_DIMM0
28 DM2
11 DM1
DM0

1
202 30 C1610
17,28,48,53,55 SMB_CLK_S 200 SCL RESET# DDR3_DRAMRST# 5,17
C1607
17,28,48,53,55 SMB_DAT_S SDA 2.2UF/6.3V 0.1UF/10V

2
DDR3_DIMM_204P @
12V02GIRM001

R1.2 2012/11/20 R1.2 2012/11/20


Part ref. changed Part ref. changed
M_A_DIM0_CLK_DDR2
H:8mm +1.35V_DDR3 +1.35V_DDR3
1

CON1602B DDR3_DIMM_204P
1

R1604 CON1602A 75 76
C1624 M_A_A0 98 5 M_A_DQ0 81 VDD112V02GIRM001
VDD2 82
150Ohm A0 DQ0 VDD3 VDD4 88
10PF/50V M_A_A1 97 7 M_A_DQ4 87
@
2

A1 DQ1 VDD5 VDD6 94

1
M_A_A2 96 15 M_A_DQ3 C1616 C1612 93 C1617 C1614
2

M_A_DIM0_CLK_DDR#2 M_A_A3 95 A2 DQ2 17 M_A_DQ2 99 VDD7 VDD8 100


@ M_A_A4 92 A3 DQ3 4 M_A_DQ7 0.1UF/10V 0.1UF/10V 105 VDD9 VDD10 106 0.1UF/10V 0.1UF/10V

2
M_A_A5 91 A4 DQ4 6 M_A_DQ6 111 VDD11 VDD12 112
90 A5 DQ5 16 /DGPU /DGPU 117 VDD13 VDD14 118 /DGPU /DGPU
M_A_A6 M_A_DQ1
86 A6 DQ6 18 123 VDD15 VDD16 124
M_A_DIM0_CLK_DDR3
M_A_A7
M_A_A8 89 A7 0 DQ7 21
M_A_DQ5
M_A_DQ11
Layout Note: Place these caps near SO DIMM 0 VDD17 VDD18
M_A_A9 85 A8 DQ8 23 M_A_DQ9
1

M_A_A10 107 A9 DQ9 33 M_A_DQ15 2 3


A10/AP DQ10 VSS1 VSS2
1

R1603 M_A_A11 84 35 M_A_DQ14 8 9


C1623 M_A_A12 83 A11 DQ11 22 M_A_DQ10 13 VSS3 VSS4 14
150Ohm A12/BC# DQ12 VSS5 VSS6
10PF/50V M_A_A13 119 24 M_A_DQ8 19 20
@
2

M_A_A14 80 A13 DQ13 34 M_A_DQ12 25 VSS7 VSS8 26


2

M_A_DIM0_CLK_DDR#3 M_A_A15 78 A14 DQ14 36 M_A_DQ13 31 VSS9 VSS10 32


@ A15 1 DQ15 39 M_A_DQ20 37 VSS11 VSS12 38
DQ16 41 M_A_DQ17 43 VSS13 VSS14 44
102 DQ17 51 M_A_DQ18 48 VSS15 VSS16 49
5 M_A_DIM0_CLK_DDR3 CK1 DQ18 VSS17 VSS18
104 53 M_A_DQ23 54 55
5 M_A_DIM0_CLK_DDR#3 101 CK1# DQ19 40 60 VSS19 VSS20 61
M_A_DQ16
5 M_A_DIM0_CLK_DDR2 103 CK0 DQ20 42 65 VSS21 VSS22 66
M_A_DQ21
5 M_A_DIM0_CLK_DDR#2 CK0# DQ21 VSS23 VSS24
50 M_A_DQ19 71 72
121 DQ22 52 M_A_DQ22 127 VSS25 VSS26 128 +1.35V_DDR3 +0.675VS
5 M_A_DIM0_CS#3
114 S1# 2 DQ23 57 M_A_DQ24 133 VSS27 VSS28 134
5 M_A_DIM0_CS#2 S0# DQ24 59 M_A_DQ28 138 VSS29 VSS30 139
Layout Note: Place these caps near SO DIMM 0
120 DQ25 67 M_A_DQ27 144 VSS31 VSS32 145
B 5 M_A_DIM0_ODT3 ODT1 DQ26 VSS33 VSS34 B
116 69 M_A_DQ31 150 151
5 M_A_DIM0_ODT2 ODT0 DQ27 56 155 VSS35 VSS36 156
M_A_DQ25
DQ28 VSS37 VSS38

1
M_A_WE# 113 58 M_A_DQ29 161 162 C1636 C1635 C1638 C1643 C1641 C1637
M_A_RAS# 110 WE# DQ29 68 M_A_DQ30 167 VSS39 VSS40 168 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V C1642 C1639 C1640 C1644
115 RAS# DQ30 70 172 VSS41 VSS42 173
M_A_CAS# 3 M_A_DQ26 @ @ @ 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
CAS# DQ31 129 M_A_DQ37 178 VSS43 VSS44 179 @ @
79 DQ32 131 184 VSS45 VSS46 185 /DGPU /DGPU /DGPU /DGPU /DGPU
M_A_BS2 M_A_DQ32
M_A_BS1 108 BA2 DQ33 141 M_A_DQ35 189 VSS47 VSS48 190
M_A_BS0 109 BA1 DQ34 143 M_A_DQ34 195 VSS49 VSS50 196
BA0 DQ35 130 M_A_DQ38 VSS51 VSS52
74 DQ36 132 M_A_DQ33 207
5 M_A_DIM0_CKE3 73 CKE1 DQ37 140 1 198 GND1 208
M_A_DQ36 T1602 PM_EXTTS#0_DIM_A
5 M_A_DIM0_CKE2 CKE0 DQ38 EVENT# GND2
142 125
1 2 RN1602A 201
4 DQ39 147
M_A_DQ39
M_A_DQ44 Reserve
TEST 205
3 10KOhm 4 197 SA1 DQ40 149 77 NP_NC1 206
+3VS RN1602B M_A_DQ42
10KOhm SA0 DQ41 NC1 NP_NC2
SMBus Slave Address: A2H /DGPU 157 M_A_DQ47 122
DQ42 159 M_A_DQ45 NC2 203
/DGPU +0.675VS
M_A_DQS7 188 DQ43 146 M_A_DQ40 +V_VREF_CA_DIMM0 VTT1 204 +3VS
M_A_DQS#7 186 DQS7 DQ44 148 M_A_DQ41 VTT2
M_A_DQS6 171 DQS#7 DQ45 158 M_A_DQ43 126
169 DQS6 DQ46 160 1 VREFCA 199
M_A_DQS#6
M_A_DQS5 154 DQS#6 5 DQ47 163
M_A_DQ46
M_A_DQ52 VREFDQ VDDSPD
DQS5 DQ48
1

1
M_A_DQS#5 152 165 M_A_DQ53 C1618 DDR3_DIMM_204P C1620
M_A_DQS4 137 DDR3_DIMM_204P DQ49
DQS#5 175 M_A_DQ55 C1619 12V02GBRM001 C1615
M_A_DQS#4 135 DQS4 DQ50 177 M_A_DQ54 2.2UF/6.3V 0.1UF/10V 0.1UF/10V 2.2UF/6.3V
12V02GBRM001
2

2
M_A_DQS3 64 DQS#4 DQ51 164 M_A_DQ51 @ /DGPU @
62 DQS3 DQ52 166 /DGPU /DGPU
M_A_DQS#3 M_A_DQ49
M_A_DQS2 47 DQS#3 DQ53 174 M_A_DQ48
M_A_DQS#2 45 DQS2 DQ54 176 M_A_DQ50 +V_VREF_DQ_DIMM0
M_A_DQS1 29 DQS#2 6 DQ55 181 M_A_DQ58
M_A_DQS#1 27 DQS1 DQ56 183 M_A_DQ61
M_A_DQS0 12 DQS#1 DQ57 191 M_A_DQ63
DQS0 DQ58
1

M_A_DQS#0 10 193 M_A_DQ57 C1613


DQS#0 DQ59 180 M_A_DQ60 C1611
187 DQ60 182 M_A_DQ56 2.2UF/6.3V 0.1UF/10V
2

170 DM7 DQ61 192 M_A_DQ62 @


153 DM6 DQ62 194 /DGPU
M_A_DQ59
DM should connect to GND directly 136 DM5 7 DQ63
Design Guide 0.9 p86 (436735) 63 DM4
46 DM3
28 DM2
11 DM1
DM0
SMB_CLK_S 202 30 DDR3_DRAMRST#
SMB_DAT_S 200 SCL RESET#
SDA
/DGPU

A A

Title : DDR3(1)_SO-DIMM0
BG1-CSC-HW R&D Dept.5 Engineer: Wing_Cheng
Size Project Name Rev
D VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 16 of 96
5 4 3 2 1
5 4 3 2 1

+1.35V +1.35V 5,6,16,18,63,83

H:4MM
+1.35V_DDR3 +1.35V_DDR3 +0.675VS +0.675VS 16,63,83
5 M_B_A[15:0] M_B_DQ[63:0] 5
+3VS +3VS 16,20,21,22,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92
CON1701A CON1701B
M_B_A0 98 5 M_B_DQ1 75 76
A0 DQ0 VDD1 VDD2 +1.35V_DDR3 +1.35V_DDR3 16
M_B_DIM0_CLK_DDR0 M_B_A1 97 7 M_B_DQ5 81 82

1
M_B_A2 96 A1 DQ1 15 M_B_DQ4 C1701 C1702 87 VDD3 VDD4 88 C1703 C1704
A2 DQ2 VDD5 VDD6
1

1 M_B_A3 95 17 M_B_DQ7 93 94
M_B_A4 92 A3 DQ3 4 M_B_DQ3 99 VDD7 VDD8 100
R1701 ok 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V

2
C1737 M_B_A5 91 A4 DQ4 6 M_B_DQ0 105 VDD9 VDD10 106
150Ohm A5 DQ5 VDD11 VDD12
90 16 111 112
@ 10PF/50V M_B_A6 0 M_B_DQ2
2

M_B_A7 86 A6 DQ6 18 M_B_DQ6 117 VDD13 VDD14 118


2

M_B_DIM0_CLK_DDR#0 M_B_A8 89 A7 DQ7 21 M_B_DQ14 123 VDD15 VDD16 124


M_B_A9 85 A8 DQ8 23 M_B_DQ10
Layout Note: Place these caps near SO DIMM 1 VDD17 VDD18
@
M_B_A10 107 A9 DQ9 33 M_B_DQ15
D M_B_A11 84 A10/AP DQ10 35 M_B_DQ12 2 3 D
M_B_A12 83 A11 DQ11 22 M_B_DQ9 8 VSS1 VSS2 9
M_B_DIM0_CLK_DDR1 M_B_A13 119 A12/BC# DQ12 24 M_B_DQ8
ok 13 VSS3 VSS4 14 +1.35V_DDR3 +1.35V_DDR3 +0.675VS
M_B_A14 80 A13 DQ13 34 M_B_DQ11 19 VSS5 VSS6 20
A14 1 DQ14 VSS7 VSS8 Layout Note: Place these caps near SO DIMM 1
1

M_B_A15 78 36 M_B_DQ13 25 26
A15 DQ15 VSS9 VSS10
1

R1702 39 M_B_DQ16 31 32

1
C1738 DQ16 41 M_B_DQ17 37 VSS11 VSS12 38 @
150Ohm DQ17 VSS13 VSS14 +
10PF/50V 102 51 M_B_DQ22 43 44 CE1703
@
2

5 M_B_DIM0_CLK_DDR1

1
104 CK1 DQ18 53 M_B_DQ19 48 VSS15 VSS16 49
ok 220UF/6.3V C1741 C1742 C1744 C1745 C1750 C1749
2

5 M_B_DIM0_CLK_DDR#1 101 CK1# DQ19 40 54 VSS17 VSS18 55


M_B_DIM0_CLK_DDR#1 M_B_DQ21 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V C1746 C1743 C1748 C1747

2
5 M_B_DIM0_CLK_DDR0 CK0 DQ20 VSS19 VSS20
@ 103 42 M_B_DQ20 60 61 @ @ @ 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
5 M_B_DIM0_CLK_DDR#0 CK0# DQ21 50 65 VSS21 VSS22 66 1BV090000003
M_B_DQ18
121
2 DQ22 52 M_B_DQ23 71 VSS23 VSS24 72
@ @
5 M_B_DIM0_CS#1 114 S1# DQ23 57 127 VSS25 VSS26 128
M_B_DQ27
5 M_B_DIM0_CS#0 S0# DQ24 59 133 VSS27 VSS28 134
M_B_DQ25
120 DQ25 67 M_B_DQ31 138 VSS29 VSS30 139
5 M_B_DIM0_ODT1 116 ODT1 DQ26 69 144 VSS31 VSS32 145
M_B_DQ28
5 M_B_DIM0_ODT0 ODT0 DQ27 56 M_B_DQ26
ok 150 VSS33 VSS34 151
113 DQ28 58 M_B_DQ24 155 VSS35 VSS36 156
5 M_B_WE# WE# DQ29 VSS37 VSS38
110 68 161 162
5 M_B_RAS#
115 RAS# 3 DQ30 70
M_B_DQ29
M_B_DQ30 167 VSS39 VSS40 168
5 M_B_CAS# CAS# DQ31 129 172 VSS41 VSS42 173
M_B_DQ33
79 DQ32 131 M_B_DQ32 178 VSS43 VSS44 179
5 M_B_BS2 108 BA2 DQ33 141 184 VSS45 VSS46 185
M_B_DQ38
5 M_B_BS1 109 BA1 DQ34 143 189 VSS47 VSS48 190
5 M_B_BS0 BA0 DQ35 130
M_B_DQ34
M_B_DQ36
ok 195 VSS49 VSS50 196
74 DQ36 132 M_B_DQ37 VSS51 VSS52
5 M_B_DIM0_CKE1 CKE1 DQ37
73 140 207
5 M_B_DIM0_CKE0 CKE0 4 DQ38 142
M_B_DQ35
M_B_DQ39 T1701 1 PM_EXTTS#0_DIM_B 198 GND1 208
1 2 RN1701A 201 DQ39 147 M_B_DQ41 125 EVENT# GND2
+3VS 10KOhm SA1 DQ40 TEST
SMBus Slave Address: A4H 3 4 RN1701B 197 149 M_B_DQ40 Reserve 205
10KOhm SA0 DQ41 157 77 NP_NC1 206
M_B_DQ47
DQ42 159 122 NC1 NP_NC2
5 M_B_DQS[7:0]
M_B_DQS0 M_B_DQS7 188 DQ43 146
M_B_DQ46
M_B_DQ45
ok NC2 203
DQS7 DQ44 +V_VREF_CA_DIMM1 VTT1 +0.675VS
186 148 204
M_B_DQS1
M_B_DQS2
M_B_DQS#7
M_B_DQS6 171 DQS#7 5 DQ45 158
M_B_DQ44
M_B_DQ42 VTT2 +3VS
M_B_DQS3 M_B_DQS#6 169 DQS6 DQ46 160 M_B_DQ43 126
M_B_DQS4 M_B_DQS5 154 DQS#6 DQ47 163 M_B_DQ53 1 VREFCA 199
M_B_DQS5 M_B_DQS#5 152 DQS5 DQ48 165 M_B_DQ52 VREFDQ VDDSPD
DQS#5 DQ49

1
M_B_DQS6 M_B_DQS4 137 175 M_B_DQ50 C1723 DDR3_DIMM_204P C1715
135 DQS4 DQ50 177
5 M_B_DQS#[7:0]
M_B_DQS7
M_B_DQS#0
M_B_DQS#4
M_B_DQS3 64 DQS#4 DQ51 164
M_B_DQ49
M_B_DQ48
ok C1724
2.2UF/6.3V 0.1UF/10V
12V02GISM001
0.1UF/10V
C1714
2.2UF/6.3V

2
M_B_DQS#1 M_B_DQS#3 62 DQS3 DQ52 166 M_B_DQ54 @ @
M_B_DQS#2 M_B_DQS2 47 DQS#3 DQ53 174 M_B_DQ51
M_B_DQS#3 M_B_DQS#2 45 DQS2 6 DQ54 176 M_B_DQ55
M_B_DQS#4 M_B_DQS1 29 DQS#2 DQ55 181 M_B_DQ59 +V_VREF_DQ_DIMM1
M_B_DQS#5 M_B_DQS#1 27 DQS1 DQ56 183 M_B_DQ63
M_B_DQS#6 M_B_DQS0 12 DQS#1 DQ57 191 M_B_DQ61
M_B_DQS#7 M_B_DQS#0 10 DQS0 DQ58 193 M_B_DQ60
DQS#0 DQ59 ok

1
180 M_B_DQ58 C1725
C 187 DQ60 182 M_B_DQ57 C1722 C
170 DM7 DQ61 192 M_B_DQ62
7 2.2UF/6.3V 0.1UF/10V

2
153 DM6 DQ62 194 M_B_DQ56 @
136 DM5 DQ63
DM should connect to GND directly
Design Guide 0.9 p86 (436735) 63 DM4
46 DM3
28 DM2
11 DM1
DM0
202 30
16,28,48,53,55 SMB_CLK_S SCL RESET# DDR3_DRAMRST# 5,16
200
16,28,48,53,55 SMB_DAT_S SDA
DDR3_DIMM_204P
12V02GISM001

M_B_DIM0_CLK_DDR2

H:8MM
1

+1.35V_DDR3 +0.675VS
1

R1703 Layout Note: Place these caps near SO DIMM 1


150Ohm C1739 +1.35V_DDR3 +1.35V_DDR3
@ 10PF/50V
2

CON1702A CON1702B
2

M_B_DIM0_CLK_DDR#2 M_B_A0 98 5 M_B_DQ1 75 76


A0 DQ0 VDD1 VDD2

1
@ M_B_A1 97 7 M_B_DQ5 81 82 C1705 C1710 C1711 C1712 C1713 C1726

1
M_B_A2 96 A1 DQ1 15 M_B_DQ4 C1735 C1730 87 VDD3 VDD4 88 C1728 C1720 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V C1716 C1717 C1718 C1719
M_B_A3 95 A2 DQ2 17 M_B_DQ7 93 VDD5 VDD6 94 @ @ @ 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
M_B_A4 92 A3 DQ3 4 M_B_DQ3 0.1UF/10V 0.1UF/10V 99 VDD7 VDD8 100 0.1UF/10V 0.1UF/10V @ @

2
91 A4 DQ4 6 105 VDD9 VDD10 106 /DGPU /DGPU /DGPU /DGPU /DGPU
M_B_DIM0_CLK_DDR3 M_B_A5 M_B_DQ0
A5 DQ5 /DGPU /DGPU VDD11 VDD12 /DGPU /DGPU
90 16 111 112
M_B_A6 0 M_B_DQ2
1

M_B_A7 86 A6 DQ6 18 M_B_DQ6 117 VDD13 VDD14 118


A7 DQ7 VDD15 VDD16
1

R1704 M_B_A8 89 21 M_B_DQ14 Layout Note: Place these caps near SO DIMM 1 123 124
C1740 M_B_A9 85 A8 DQ8 23 M_B_DQ10 VDD17 VDD18
150Ohm A9 DQ9
10PF/50V M_B_A10 107 33 M_B_DQ15
@
2

M_B_A11 84 A10/AP DQ10 35 M_B_DQ12 2 3


2

M_B_DIM0_CLK_DDR#3 M_B_A12 83 A11 DQ11 22 M_B_DQ9 8 VSS1 VSS2 9


@ M_B_A13 119 A12/BC# DQ12 24 M_B_DQ8 13 VSS3 VSS4 14
M_B_A14 80 A13 DQ13 34 M_B_DQ11 19 VSS5 VSS6 20
M_B_A15 78 A14 1 DQ14 36 M_B_DQ13 25 VSS7 VSS8 26
B A15 DQ15 39 M_B_DQ16 31 VSS9 VSS10 32 B
DQ16 41 M_B_DQ17 37 VSS11 VSS12 38
102 DQ17 51 M_B_DQ22 43 VSS13 VSS14 44
5 M_B_DIM0_CLK_DDR3 104 CK1 DQ18 53 48 VSS15 VSS16 49
M_B_DQ19
5 M_B_DIM0_CLK_DDR#3 101 CK1# DQ19 40 54 VSS17 VSS18 55
M_B_DQ21
5 M_B_DIM0_CLK_DDR2 CK0 DQ20 VSS19 VSS20
103 42 M_B_DQ20 60 61
5 M_B_DIM0_CLK_DDR#2 CK0# DQ21 50 65 VSS21 VSS22 66
M_B_DQ18
121
2 DQ22 52 M_B_DQ23 71 VSS23 VSS24 72
5 M_B_DIM0_CS#3 114 S1# DQ23 57 127 VSS25 VSS26 128
M_B_DQ27
5 M_B_DIM0_CS#2 S0# DQ24 59 133 VSS27 VSS28 134
M_B_DQ25
120 DQ25 67 M_B_DQ31 138 VSS29 VSS30 139
5 M_B_DIM0_ODT3 116 ODT1 DQ26 69 144 VSS31 VSS32 145
M_B_DQ28
5 M_B_DIM0_ODT2 ODT0 DQ27 VSS33 VSS34
56 M_B_DQ26 150 151
M_B_WE# 113 DQ28 58 M_B_DQ24 155 VSS35 VSS36 156
110 WE# DQ29 68 161 VSS37 VSS38 162
M_B_RAS#
M_B_CAS# 115 RAS# 3 DQ30 70
M_B_DQ29
M_B_DQ30 167 VSS39 VSS40 168
CAS# DQ31 129 M_B_DQ33 172 VSS41 VSS42 173
M_B_BS2 79 DQ32 131 M_B_DQ32 178 VSS43 VSS44 179
M_B_BS1 108 BA2 DQ33 141 M_B_DQ38 184 VSS45 VSS46 185
M_B_BS0 109 BA1 DQ34 143 M_B_DQ34 189 VSS47 VSS48 190
BA0 DQ35 130 M_B_DQ36 195 VSS49 VSS50 196
74 DQ36 132 M_B_DQ37 VSS51 VSS52
5 M_B_DIM0_CKE3 CKE1 DQ37
73 140 207
5 M_B_DIM0_CKE2 CKE0 4 DQ38 142
M_B_DQ35
M_B_DQ39 T1702 1 PM_EXTTS#0_DIM_B 198 GND1 208
1 2 RN1702A 201 DQ39 147 M_B_DQ41 125 EVENT# GND2
+3VS 10KOhm SA1 DQ40 TEST
SMBus Slave Address: A6H 3 4 RN1702B 197 149 M_B_DQ40 Reserve 205
10KOhm SA0 DQ41 157 77 NP_NC1 206
/DGPU M_B_DQ47
DQ42 159 M_B_DQ46 122 NC1 NP_NC2
M_B_DQS7 188 DQ43 146 M_B_DQ45 NC2 203
DQS7 DQ44 +V_VREF_CA_DIMM1 VTT1 +0.675VS
186 148 204
M_B_DQS#7
M_B_DQS6 171 DQS#7 5 DQ45 158
M_B_DQ44
M_B_DQ42 VTT2 +3VS
M_B_DQS#6 169 DQS6 DQ46 160 M_B_DQ43 126
M_B_DQS5 154 DQS#6 DQ47 163 M_B_DQ53 1 VREFCA 199
M_B_DQS#5 152 DQS5 DQ48 165 M_B_DQ52 VREFDQ VDDSPD
DQS#5 DQ49
1

1
M_B_DQS4 137 175 M_B_DQ50 C1729 DDR3_DIMM_204P C1736
M_B_DQS#4 135 DQS4 DQ50 177 M_B_DQ49 C1732 C1734
DQS#4 DQ51 12V02GISM000
M_B_DQS3 64 164 M_B_DQ48 2.2UF/6.3V 0.1UF/10V 0.1UF/10V 2.2UF/6.3V
2

2
M_B_DQS#3 62 DQS3 DQ52 166 M_B_DQ54 @ /DGPU @
47 DQS#3 DQ53 174 /DGPU /DGPU
M_B_DQS2 M_B_DQ51
M_B_DQS#2 45 DQS2 6 DQ54 176 M_B_DQ55
M_B_DQS1 29 DQS#2 DQ55 181 M_B_DQ59 +V_VREF_DQ_DIMM1
M_B_DQS#1 27 DQS1 DQ56 183 M_B_DQ63
M_B_DQS0 12 DQS#1 DQ57 191 M_B_DQ61
M_B_DQS#0 10 DQS0 DQ58 193 M_B_DQ60
DQS#0 DQ59
1

180 M_B_DQ58 C1727


187 DQ60 182 M_B_DQ57 C1733
170 DM7 DQ61 192 M_B_DQ62
7 2.2UF/6.3V 0.1UF/10V
2

153 DM6 DQ62 194 M_B_DQ56 @


136 DM5 DQ63 /DGPU
DM should connect to GND directly
Design Guide 0.9 p86 (436735) 63 DM4
A 46 DM3 A
28 DM2
11 DM1
DM0
SMB_CLK_S 202 30 DDR3_DRAMRST#
SMB_DAT_S 200 SCL RESET#
SDA
DDR3_DIMM_204P
12V02GISM000
/DGPU

1202-000R000
(12V02GIRM001)
Title : DDR3(2)_SO-DIMM1
BG1-CSC-HW R&D Dept.5 Engineer: Wing_Cheng
Size Project Name Rev
D VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 17 of 96

5 4 3 2 1
5 4 3 2 1

+1.35V_DDR3 +1.35V_DDR3 16,17

+V_VREF_CA_DIMM0 +V_VREF_CA_DIMM0 16

DDR3L Vref +V_VREF_DQ_DIMM0 +V_VREF_DQ_DIMM0 5,16

+V_VREF_CA_DIMM1 +V_VREF_CA_DIMM1 17

+V_VREF_DQ_DIMM1 +V_VREF_DQ_DIMM1 5,17

D D

M3: CPU driven VREF path is stuffed be default.


M1: VREF_DQ driven by a Voltage Divider Network during Processor power-off

+V_VREF_DQ_DIMM0

M3
5,16 DIMM0_VREF_DQ
+V_VREF_DQ_DIMM1

1
R1803
@ 0Ohm

2
5,17 DIMM1_VREF_DQ

+1.35V +1.35V

R1.2 2012/11/08 R1.2 2012/11/08


cost dwon 0ohm cost dwon 0ohm
2

2
C C
R1.2 2012/12/04 R1.2 2012/12/04
R1804 change short pin size R1816 change short pin size
1KOhm 1KOhm
1

1
1 2 1 2
SP1805 R0402 SP1804 R0402 C1804 C1805
nb_r0402_short_25mil nb_r0402_short_25mil 0.022UF/16V 0.022UF/16V

2
1

C1803 R1805 C1802 R1815


0.1UF/16V 1KOhm 0.1UF/16V 1KOhm CHKLST, 497750
2

1
R1807 R1808
2

24.9Ohm 24.9Ohm
1% 1%

2
M1

Intel 0203
M3+M1: Default Recommendation

B B

+V_VREF_CA_DIMM0
M3 +V_VREF_CA_DIMM1
1 2
SP1802 R0402
nb_r0402_short_25mil
1 2
5 DIMM_VREF_CA
SP1801 R0402
nb_r0402_short_25mil
+1.35V
R1.2 2012/11/08
cost dwon 0ohm
R1.2 2012/12/04
2

R1810 change short pin size


1KOhm
1

1 2
SP1803 R0402
nb_r0402_short_25mil
1

C1801 R1811
0.1UF/16V 1KOhm CHKLST, 497750 C1806
2

0.022UF/16V
2

A A
2

R1809
24.9Ohm
1%
2

Title : DDR3(3)_CA/DQ Voltage


M1 PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
Custom VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 18 of 96
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

R1.4--2

Title : VID Controller


PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
C VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 19 of 96
5 4 3 2 1
5 4 3 2 1

RTC battery
+RTCBAT

R1.2
2012/11/06
+3VA
D2001
+VCC_RTC
T2012
T2011 T2010
1 1
1 1
3
2 1+RTC_BAT 2

1
R2001 1KOhm +VCC_RTC +VCC_RTC 22,27
1V/0.2A C2003

1
1UF/6.3V


+3VA +3VA 27,30,63,65,81,88,93

2
3 J2001 R1.0 0110
4 BATT_HOLDER_2P +3VS +3VS 16,17,21,22,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92
GND
+3VSUS_ORG +3VSUS_ORG 21,22,24,25,26,27
D
2 12V20GBSM000 +12VS
D
+12VS 28,39,41,63,91
Connector Type 1217-001L000
GND +1.5VS +1.5VS 21,22,24,26,27,41,53,55,63,84

+VTT_PCH_VCCIO +VTT_PCH_VCCIO 26,27

+VCC_RTC RTCRST# RC delay


should be 18ms~25ms C2001 SP2002
2 5% 1 TPM Settings JRST2001 2 1RTC_X1_C 1 2
R2018 20KOhm Clear ME RTC Shunt GND R0402
Registers 15PF/50V

1
1

1
Keep ME RTC Open X2001
JRST2001 2 32.768KHZ R2002
Registers (Default)
1
1

C2005 10MOhm
LPT_PCH_M_EDS
2

SGL_JUMP GND 3 U2001A


1UF/6.3V @
2

2
BC8
SATA_RXN_0 SATA_RXN0 60
RTC_X1 B5 BE8 SATA_RXP0 60

4
RTCX1 SATA_RXP_0
07V080000003
T2005 2 1 RTC_X2 B4 AW8 SATA_TXN0 60 HDD1
GND GND 1 C2002 15PF/50V RTCX2 SATA_TXN_0 AY8

RTC
SATA_TXP_0 SATA_TXP0 60
T2007 GND SRTC_RST# B9
1MOhm R2023 1 SRTCRST# BC10
2 1 SM_INTRUDER# A8 SATA_RXN_1 BE10
INTRUDER# SATA_RXP_1
T2006 R2020 1 1% 2 330KOhm PCH_INTVRMEN G10 AV10
+VCC_RTC INTVRMEN SATA_TXN_1
1 AW10
2 5% 1 RTC_RST# D9 SATA_TXP_1
RTCRST#

SATA
R2021 20KOhm BB9
SATA_RXN_2 SATA_RXN2 60
BD9 SATA_RXP2 60
R2011 1 2 33Ohm ACZ_BCLK B25 SATA_RXP_2
41 ACZ_BCLK_AUD HDA_BCLK ODD
1

AY13
SATA_TXN_2 SATA_TXN2 60
C JRST2002 R2012 1 2 33Ohm ACZ_SYNC A22 AW13 C
1

41 ACZ_SYNC_AUD HDA_SYNC SATA_TXP_2 SATA_TXP2 60


1

C2004
2

SGL_JUMP 41 SB_SPKR AL10 BC12


1UF/6.3V SPKR SATA_RXN_3 BE12
@
2

R2015 1 2 33Ohm ACZ_RST# C24 SATA_RXP_3


41,42 ACZ_RST#_AUD HDA_RST# AR13
SATA_TXN_3

AZALIA
L22 AT13 R1.3 2013/1/11
41 ACZ_SDIN0_AUD HDA_SDI0 SATA_TXP_3
mSATA move to port 4
GND GND K22
HDA_SDI1 BD13
R1.2 2012/12/03 Remove TP SATA_RXN4 53
G22 SATA_RXN4/PERN1 BB13
Add R2031 HDA_SDI2 SATA_RXP4/PERP1 SATA_RXP4 53

30 PCH_FLASH_DESCRIPTOR R20311 2 10KOhm F22 AV15 SATA_TXN4 53 mSATA


HDA_SDI3 SATA_TXN4/PETN1 AW15
Request by CSC SATA_TXP4/PETP1 SATA_TXP4 53
R20131 2 33Ohm ACZ_SDOUT A24
for CMOS clear 41 ACZ_SDOUT_AUD HDA_SDO BC14
function SATA_RXN5/PERN2 SATA_RXN5 60
HDA_DOCK_EN# B17 BE14 HDD2
DOCKEN#/GPIO33 SATA_RXP5/PERP2 SATA_RXP5 60
C22 AP15
CMOS Settings JRST2002 30 EXT_SCI# HDA_DOCK_RST#/GPIO13 SATA_TXN5/PETN2 AR15
SATA_TXN5 60
SATA_TXP5/PETP2 SATA_TXP5 60
1 2
Clear CMOS Shunt R2017 10KOhm
+3VSUS_ORG
R1.1
Open SATA_RCOMP
AY5 SATA_COMP R2026 1 2 7.5KOhm +1.5VS
Keep CMOS (Default) 1 2
+3VS
AP3 R2024 10KOhm
SATALED# SATA_LED# 66
T2001 1 PCH_JTAG_TCK_BUF AB3 AT1 SATA_DET0_R_N 1 T2009
JTAG_TCK SATA0GP/GPIO21
T2002 1 PCH_JTAG_TMS AD1 AU2 Int. PU BBS_BIT0_R SP2001 2 1 R0402
JTAG_TMS SATA1GP/GPIO19 BBS_BIT0 23
INTVRMEN: Integrated SUS 1.05V VRM Enables T2003 1 PCH_JTAG_TDI AE2 BD4

JTAG
Low: Enable External VRs JTAG_TDI SATA_IREF
High:Enable Internal VRs T2004 1 PCH_JTAG_TDO AD3 BA2
JTAG_TDO TP9 R2016 2 1 0Ohm
@ +1.5VS
GND R2027 1 2 0Ohm F8 BB2
TP25 TP8
PCH_INTVRMEN 330KOhm 2 1%
@
1 R2028 R1.2 2012/11/28 C26
B
follow Intel design guide TP22
B
T2008 1 PM_TEST_RST_N AB6
GND TP20

DH82LPMS
02V000000012

HDA_DKEN : Flash Descriptor Security Overide


H = Disabled (Default)
L = Enabled

(43K ohm)check list(10K ohm))??


Note : Rising edge of PWROK
JRST2003
SATA0GP pull up
1MM_OPEN_M1M2
HDA_DOCK_EN# 1 2 2 R2030 1 1KOhm
1 2
@
Strap information: +3VS

HDA_SPKR: No reboot strap SB_SPKR R2019 1 @ 2 1KOhm


+3VS
Low: Disable (Default)
High:Enable

SATA_DET0_R_N 1 2
R2025 10KOhm
HDA_SDO: ACZ_SDOUT R2022 1 @ 2 1KOhm @
+3VSUS_ORG
1.Flash descriptor security:
Sampled Low: in effect.
Sampled High: override
2.HDA_SDO which sample high on the rising edge of PWROK
Will also disable Intel ME.
A A

HDA_DOCK_EN#:
Reserved

[0216] : ACZ_SYNC strap is no longer supported on LPT, by Intel FAE Stu.

Title : PCH(1)_SATA,IHDA,RTC,LPC
PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
C VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 20 of 96
5 4 3 2 1
5 4 3 2 1

+3VS +3VS 16,17,20,22,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92

+1.5VS +1.5VS 20,22,24,26,27,41,53,55,63,84

+3VSUS_ORG +3VSUS_ORG 20,22,24,25,26,27


CLK_BUF_CPYCLK_N 1 2 RN2108A
+VCCAXCK_VRM +VCCAXCK_VRM 27 10KOhm
CLK_BUF_CPYCLK_P 3 4 RN2108B
LPT_PCH_M_EDS 10KOhm
U2001C

CLK_BUF_EXP_N 1 2 RN2109A
10KOhm
T2102 1 CLK_PCH_SRC0_N Y43 AB35 CLK_PCIE_PEG#_PCH_L SP2113 1 2 R0402 CLK_BUF_EXP_P 3 4 RN2109B
CLKOUT_PCIE_N_0 CLKOUT_PEG_A CLK_PCIE_PEG#_PCH 70 10KOhm
CLK_BUF_DOT96_N 1 2 RN2110A
10KOhm
T2104 1 CLK_PCH_SRC0_P Y45 AB36 CLK_PCIE_PEG_PCH_L SP2114 1 2 R0402 CLK_PCIE_PEG_PCH 70 CLK_BUF_DOT96_P 3 4 RN2110B
CLKOUT_PCIE_P_0 CLKOUT_PEG_A_P 10KOhm
CLK_BUF_CKSSCD_N 3 4 RN2111B
10KOhm
T2101 1 CLK_REQ0# AB1 AF6 CLK_REQ_PEG_A# SP2112 1 2 R0402 CLKREQ_PEG# 70 CLK_BUF_CKSSCD_P 1 2 RN2111A
PCIECLKRQ0#/GPIO73 PEGA_CLKRQ#/GPIO47 10KOhm
SP2117 2 1 CLK_PCH_SRC1_N AA44 Y39 CLK_PCH_PEG_B_N 1 T2109 CLK_BUF_REF14 R2101 1 2 10KOhm
40 CLK_PCIE_CR#_PCH CLKOUT_PCIE_N_1 CLKOUT_PEG_B
D SP2118 2 1 CLK_PCH_SRC1_P AA42 D
40 CLK_PCIE_CR_PCH CLKOUT_PCIE_P_1 Y38 CLK_PCH_PEG_B_P 1 T2110
SP2119 2 1 CLK_REQ1# AF1 CLKOUT_PEG_B_P
40 CLK_REQ1_CR# CLOCK TERMINATION for FCIM
PCIECLKRQ1#/GPIO18 U4 CLK_REQ_PEG_B# 1 T2105 Default power-on mode is ICC. GND
SP2104 1 2 R0402 CLK_PCH_SRC2_N AB43 PEGB_CLKRQ#/GPIO56
53 CLK_PCIE_mSATA#_PCH CLKOUT_PCIE_N_2 AF39
CLKOUT_DMI CLK_EXP_N 4
53 CLK_PCIE_mSATA_PCH SP2105 1 2 R0402 CLK_PCH_SRC2_P AB45 100MHz
CLKOUT_PCIE_P_2 AF40
CLKOUT_DMI_P CLK_EXP_P 4
SP2106 1 2 R0402 CLK_REQ2# AF3
53 CLK_REQ2_PCIE_mSATA# PCIECLKRQ2#/GPIO20/SMI# +3VS
AJ40
CLKOUT_DP CLK_DP_SSC_N 4
SP2101 1 2 R0402 CLK_PCH_SRC3_N AD43 AJ39 135MHz
55 CLK_PCIE_WLAN#_PCH CLKOUT_PCIE_N_3 CLKOUT_DP_P CLK_DP_SSC_P 4
55 CLK_PCIE_WLAN_PCH SP2102 1 2 R0402 CLK_PCH_SRC3_P AD45 INT_SERIRQ R2107 1 2 10KOhm
SP2103 1 2 R0402 CLK_REQ3# T3 CLKOUT_PCIE_P_3 AF35 CLK_DP_N
55 CLK_REQ3_WLAN# PCIECLKRQ3#/GPIO25 CLKOUT_DPNS CLK_DP_N 4
AF36 CLK_DP_P 135MHz DGPU_EDID_SELECT# R2113 1 @ 2 10KOhm
CLKOUT_DPNS_P CLK_DP_P 4
SP2107 1 2 R0402 CLK_PCH_SRC4_N AF43
33 CLK_PCIE_LAN# CLKOUT_PCIE_N_4
SP2108 1 2 R0402 CLK_PCH_SRC4_P AF45 AY24 CLK_BUF_EXP_N DGPU_PRSNT# R2106 1 /UMA 2 10KOhm
33 CLK_PCIE_LAN CLKOUT_PCIE_P_4 CLKIN_DMI
33 CLK_REQ4_LAN# SP2109 1 2 R0402 CLK_REQ4# V3 AW24 CLK_BUF_EXP_P
PCIECLKRQ4#/GPIO26 CLKIN_DMI_P DGPU_PRSNT# R2109 1 /DGPU 2 10KOhm
T2116 1 CLK_PCH_SRC5_N AE44 AR24 CLK_BUF_CPYCLK_N
T2117 1 CLK_PCH_SRC5_P AE42 CLKOUT_PCIE_N5 CLKIN_GND AT24 CLK_BUF_CPYCLK_P
T2118 1 CLK_REQ5# AA2 CLKOUT_PCIE_P_5 CLKIN_GND_P
PCIECLKRQ5#/GPIO44 H33 CLK_BUF_DOT96_N GND
T2134 1 CLK_PCH_SRC6_N AB40 CLKIN_DOT96N G33 CLK_BUF_DOT96_P
T2133 1 CLK_PCH_SRC6_P AB39 CLKOUT_PCIE_N_6 CLKIN_DOT96P
T2135 1 CLK_REQ6# AE4 CLKOUT_PCIE_P_6 BE6 CLK_BUF_CKSSCD_N SP2111
PCIECLKRQ6#/GPIO45 CLKIN_SATA BC6 CLK_BUF_CKSSCD_P R0402 C2102 12PF/50V
T2114 1 CLK_PCH_SRC7_N AJ44 CLKIN_SATA_P 1 2 1
XTAL25_OUT_C 2
CLKOUT_PCIE_N_7 GND
F45 CLK_BUF_REF14
T2115 1 CLK_PCH_SRC7_P AJ42 REFCLK14IN D17 CLK_PCI_FB X2101
PCH CLKREQ Setting:
CLKOUT_PCIE_P_7 CLKIN_33MHZLOOPBACK

1
25MHZ Not connected to device.

1
T2111 1 CLK_REQ7# Y3 AL44 XTAL25_OUT
PCIECLKRQ7#/GPIO46 XTAL25_OUT

1MOhm
AM43 XTAL25_IN 2 GND
T2132 1 CLK_XDP_N AH43 XTAL25_IN
CLKOUT_ITPXDP C40 DGPU_EDID_SELECT# 1 T2113 4 +3VSUS_ORG
100MHz
T2131 1 CLK_XDP_P AH45 CLKOUTFLEX0/GPIO64

2
CLKOUT_ITPXDP_P F38 CLK_OUT1 1 T2128 CLK_REQ4_LAN# R2117 1 2 10KOhm

R2111
/TPM CLKOUTFLEX1/GPIO65
43 LPCCLK 22Ohm 2 1 R2132 CLKOUT_PCI0_R D44 C2101 12PF/50V

3
CLKOUT_33MHZ0 F36 CLK_OUT2 1 T2126 1 2 CLK_REQ0# R2118 1 2 10KOhm
CLKOUTFLEX2/GPIO66 07V080000010 GND
CLK_PCI_FB 22Ohm 2 1 R2128 CLK_PCI_FB_R E44
CLKOUT_33MHZ1 @
C 22Ohm 2 1 R2129 CLK_KBCPCI_PCH_R B42 CLKOUTFLEX3/GPIO67
F39 DGPU_PRSNT# 1 T2127 CLK_REQ3_WLAN# R2133 1 2 10KOhm R1.2 2012/12/17 C
30 CLK_KBCPCI_PCH CLKOUT_33MHZ2
ICLK_IREF
AM45 ICLK_IREF SP21201 2
NB_R0402_20MIL_SMALL
+1.5VS
Add R2133
22Ohm 2 1 R2130 CLK_DEBUG_R F41
65 CLK_DEBUG CLKOUT_33MHZ3 R1.2 2012/11/28 R1.2 2012/12/04
AD39 CLK_REQ6# R2121 1 2 10KOhm
T2130 1 CLK_DBG_R A40 TP19 AD38 cost dwon 0ohm change short pin size
CLKOUT_33MHZ4 TP18 CLK_REQ5# R2122 1 2 10KOhm
1%
AN44 DIFFCLK_BIASREF R2116 1 2 7.5KOhm +VCCAXCK_VRM
2

DIFFCLK_BIASREF CLK_REQ7# R2123 1 2 10KOhm


CLOCK SIGNAL
C2103
10PF/50V CLK_REQ_PEG_B# R2124 1 2 10KOhm
1

@ DH82LPMS
02V000000012 CLK_REQ_PEG_A# R2125 1 2 10KOhm

GND

DGPU_PWR_EN is active high


Connected to device.

+3VS
Debug R1.2 2012/12/13 +3VS

WLAN clk pull-high


U2001D LPT_PCH_M_EDS SCL_3A 1 T2136 CLK_REQ3_WLAN# R2108 1 2 10KOhm

R1.1 CLK_REQ1# R2119 1 2 10KOhm


SDA_3A 1 T2137
N7 +3VSUS_ORG CLK_REQ2# R2120 1 2 10KOhm
SMBALERT#/GPIO11 ELAN_ALERT# 48
A20
30,43,65 LPC_AD0 LAD_0
SMBus R10 SCL_3A
SMBCLK SCL_3A 28
30,43,65 LPC_AD1
C20
LAD_1 U11 SDA_3A
SMBDATA SDA_3A 28
A18 CLK_REQ6# R2114 1 @ 2 10KOhm
LPC

30,43,65 LPC_AD2 LAD_2 N8 DRAMRST_CNTRL_PCH SCL_3A RN2103B 4 3 2.2KOhm


SML0ALERT#/GPIO60 DRAMRST_CNTRL_PCH 5
C18
30,43,65 LPC_AD3 LAD_3 U8 SML0_CLK 1 T2120 SDA_3A RN2103A 2 1 2.2KOhm CLK_REQ4_LAN# R2112 1 @ 2 10KOhm
B21 SML0CLK
30,43,65 LPC_FRAME# LFRAME# R7 SML0_DAT 1 T2122
D21 SML0DATA DRAMRST_CNTRL_PCH R2104 1 2 1KOhm CLK_REQ3_WLAN# R2110 1 @ 2 10KOhm
LDRQ0# H6 SML1ALERT# 1 T2112
B T2121 1 SNN_LPC_DRQ#1 G20 SML1ALERT#/PCHHOT#/GPIO74 CLK_REQ2# R2126 1 @ 2 10KOhm B
LDRQ1#/GPIO23 K6 SML1_CLK SML0_CLK 3 4 RN2104B
SML1CLK/GPIO58 SML1_CLK 28 2.2KOhm @
Serial Interrupt Request AL11 CLK_REQ1# R2127 1 2 10KOhm
30,43,65 INT_SERIRQ SERIRQ N11 SML1_DAT SML0_DAT 1 2 RN2104A
SML1DATA/GPIO75 SML1_DAT 28 2.2KOhm
SML1_CLK 1 2 RN2105A GND
2.2KOhm
AF11 1 T2123
AJ11 CL_CLK SML1_DAT 3 4 RN2105B
SPI

28,30 PCH_SPICLK SPI_CLK 2.2KOhm


AF10 1 T2124
AJ7 C-Link CL_DATA SML1ALERT# R2105 1 2 10KOhm
28 PCH_SPICS0# SPI_CS0# AF7 1 T2125
PCH_SPICS1# AL7 CL_RST# ELAN_ALERT# R2131 1 2 10KOhm
28,30 PCH_SPICS1# SPI_CS1#
AJ10
SPI_CS2# BA45
AH1 TP1
28,30 PCH_SPISI SPI_MOSI BC45
AH3 Thermal TP2
28,30 PCH_SPISO SPI_MISO BE43
AJ4 TP4
28,30 SPI_WP_IO2 SPI_IO2 BE44
AJ2 TP3
28,30 SPI_HOLD#_IO3 SPI_IO3 AY43
TD_IREF
1

R2103 It must be 8.2k ohm 1% ???


8.06KOhm
2

GND

A A

DH82LPMS
02V000000012
Title : PCH(2)_PCIE,CLK,SMB,PEG
BG1\CORE Engineer: Wing_Cheng
Size Project Name Rev
Custom VA70_HW 1.1
Date: Friday, January 18, 2013 Sheet 21 of 96

5 4 3 2 1
5 4 3 2 1

+3VSUS_ORG +3VSUS_ORG 20,21,24,25,26,27

+3VS +3VS 16,17,20,21,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92

+1.5VS +1.5VS 20,21,24,26,27,41,53,55,63,84

+VCC_RTC +VCC_RTC 20,27

+3VSUS +3VSUS 4,23,27,28,30,33,43,61,81,92

+5VSUS +5VSUS 30,60,61,63,65,66,83,91

+12VSUS +12VSUS 28,33,55,60,81,91


U2001B LPT_PCH_M_EDS
+VCCDSW +VCCDSW 27

3 DMI_RXN0 AW22 +3VA


DMI_RXN_0 +3VA 20,27,30,63,65,81,88,93
3 DMI_RXN1 AR20
DMI_RXN_1 AJ35
FDI_RXN_0 FDI_TXN0 4
3 DMI_RXN2 AP17
AV20 DMI_RXN_2 AL35
D 3 DMI_RXN3 FDI_TXN1 4 D
DMI_RXN_3 FDI_RXN_1

3 DMI_RXP0 AY22 AJ36 FDI_TXP0 4


AP20 DMI_RXP_0 FDI_RXP_0
3 DMI_RXP1 DMI_RXP_1 FDI AL36 FDI_TXP1 4
AR17 FDI_RXP_1
3 DMI_RXP2 DMI_RXP_2
3 DMI_RXP3 AW20 DMI AV43
DMI_RXP_3 TP16

3 DMI_TXN0 BD21 AY45


BE20 DMI_TXN_0 TP5
3 DMI_TXN1 DMI_TXN_1 AV45
BD17 TP15
3 DMI_TXN2 DMI_TXN_2
3 DMI_TXN3 BE18 AW44
DMI_TXN_3 TP10
3 DMI_TXP0 BB21 AL39 FDI_CSYNC_R SP2213 1 2 R0402 FDI_CSYNC 3
BC20 DMI_TXP_0 FDI_CSYNC
3 DMI_TXP1 DMI_TXP_1 AL40 FDI_INT_R SP2201 1 2 R0402 FDI_INT 3
BB17 FDI_INT
3 DMI_TXP2 DMI_TXP_2
3 DMI_TXP3 BC18 AT45 FDI_IREF 0Ohm 1 2 R2226 +1.5VS
DMI_TXP_3 FDI_IREF
R2225 2 1 0Ohm DMI_IREF BE16 AU42
R1.2 2012/10/29
+1.5VS DMI_IREF TP17 option changed from /FDI
AW17 AU44
TP12 TP13 R1.2 2012/12/19
If SUSWARN #/SUS_ACK # handshake
AV17
TP7 FDI_RCOMP
AR44 FDI_RCOMP R2230 1 2 7.5KOhm +1.5VS option changed from /non_RETINA
is not used, these signals are tied on the board +1.5VS R2231 1 2 7.5KOhm DMI_RCOMP AY17
DMI_RCOMP

T2211 SUS_PWR_ACK_R SP2208 1 2 R0402 R2208 1 @ 2 330KOhm GND DSWODVREN - On Die DSW VR Enable
1 SUSACK#_PCH R2203 2 @ 1 0Ohm SUSACK#_R R6 C8 DSWODVREN R2207 1 2 330KOhm +VCC_RTC HIGH - Enabled(DEFAULT) ; LOW-Disabled


SUSACK# DSWVRMEN
R1.2 2012/11/06 R2205 2 1 10KOhm PM_SYSRST#_R AM1 System Power L13 PCH_DPROK SP2214 1 2 R0402 PM_RSMRST_R
T2212 +3VS SYS_RESET# Management DPWROK
SYS_PWROK SP2209 1 2 R0402 SYS_PWROK_R AD7 K3 PCIE_WAKE# 33,53
SYS_PWROK WAKE#
1

9,30,92 PM_PWROK SP2205 1 2 R0402 PM_PCH_PWROK_R F10 AN7 PM_CLKRUN# PM_CLKRUN# 43


PWROK CLKRUN# T2206
SP2212 1 2 R0402 PM_APWROK_R AB7 U7 SUS_STAT 1
APWROK SUS_STAT#/GPIO61 T2205
4 PM_DRAM_PWRGD H3 Y6 SUSCLK_C 1
DRAMPWROK SUSCLK/GPIO62 T2204
PM_RSMRST# has pull down 10k ohm in EC 30 PM_RSMRST# SP2206 1 2 R0402 PM_RSMRST_R J2 Y7 SLP_S5# 1
RSMRST# SLP_S5#/GPIO63

30 ME_SUSPWRDNACK SP2210 1 2 R0402 SUS_PWR_ACK_R J4 C6 SLP_S4#_R SP2202 1 2 R0402 PM_SUSC# 30


C SUSWARN#/SUSPWRNACK/GPIO30 SLP_S4# C

30 PM_PWRBTN# SP2207 1 2 R0402 K1 H1 SLP_S3#_R SP2203 1 2 R0402 PM_SUSB# 30


PWRBTN# SLP_S3# T2209
30 ME_AC_PRESENT SP2211 1 2 R0402 AC_PRESENT_R E6 F3 ME_PM_SLP_A#_R 1
T2201 ACPRESENT/GPIO31 SLP_A#
1 BATLOW# K7 F1 SLP_DSW#_R R2210 2 @ 1 0Ohm
T2202 BATLOW#/GPIO72 SLP_SUS# SLP_SUS# 30 i-AMT
1 RI# N4 AY3 H_PM_SYNC 4
RI# PMSYNCH
AB10 DH82LPMS G5 ME_PM_SLP_LAN#_R 1 T2210
TP21 SLP_LAN# i-AMT
T2203 1 SLP_WLAN# D2
SLP_WLAN#/GPIO29

02V000000012

R1.2 2012/12/17
U2201 @
R2204 mount
SYS_PWROK for PCH

R2204 2 1 0Ohm

+3VSUS

U2201
PM_PWROK 1 A 5 +3VSUS_ORG
VCC

92 DELAY_VR_AND_ALL_SYS 2 B

3 4 SYS_PWROK
GND
Y
Vcc=2~5.5 PCIE_WAKE# R2232 1 2 10KOhm
B @ B
ME_AC_PRESENT R2234 1 2 10KOhm
R2206 2 1 0Ohm BATLOW# R2233 1 2 10KOhm

+3VS

/TPM
PM_CLKRUN# R2212 1 2 8.2KOhm

+3VSUS +5VSUS +12VSUS ME_PM_SLP_A#_R R2217 1 @ 2 10KOhm

PM_PWROK R2213 1 2 10KOhm


1

5% PCH_DPROK R2235 1 @ 2 100KOhm ME_SUSPWRDNACK R2218 1 2 10KOhm


R2221 R2223 R2222
10KOhm 10KOhm 100KOhm
@ @ @ GND RI# R2214 1 2 10KOhm
2

PLL ON DIE VR ENABLE


SUSCLK_C R2229 1 @ 2 1KOhm GND HIGH - ENABLED
LOW - DISABLED (DEFAULT
PS_S3CNTRL_1.5V 6
ME_PM_SLP_LAN#_R R2220 1 @ 2 10KOhm

Q2201B
3

UM6K1N
@
5
4

Q2201A
6

UM6K1N
@
SP2204 1 2 R0402 2
23,30,63,91,92 SUSB_EC#
1

PM_SUSB# R2224 2 1 0Ohm


@

GND GND
A A

Title : PCH(3)_FDI,DMI,SYS PWR


PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
Custom VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 22 of 96

5 4 3 2 1
5 4 3 2 1

+3VS +3VS 16,17,20,21,22,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92

R1.2 2012/10/29 +3V +3V 37,43,63,65,91

option changed from /non_FDI_@


R1.2 2012/12/06
remove R2335~R2337, R2339~R2341, JP2304~JP2306 for GDDR5 U2001E LPT_PCH_M_EV

CRT_B_PCH 50 ohm JP2301 2 1 SHORT_PIN 37.5 ohm B_PCH T45 R40


38 DAC_B_PCH VGA_BLUE DDPB_CTRLCLK
D D
CRT_G_PCH 50 ohm JP2302 2 1 SHORT_PIN 37.5 ohm G_PCH U44 R39
38 DAC_G_PCH VGA_GREEN DDPB_CTRLDATA
CRT_R_PCH 50 ohm JP2303 2 1 SHORT_PIN 37.5 ohm R_PCH V45 R35
38 DAC_R_PCH VGA_RED DDPC_CTRLCLK HDMI_DDC_CLK_PCH 39
R1.2 2012/10/29 38 DDC2BC_PCH
M43 R36
VGA_DDC_CLK DDPC_CTRLDATA

1
option changed from /FDI HDMI_DDC_DATA_PCH 39

R1.2 2012/12/19 R2304 R2305 R2306 M45 N40 1 T2306


?

CRT
38 DDC2BD_PCH VGA_DDC_DATA DDPD_CTRLCLK
option changed from /non_RETINA 150Ohm 150Ohm 150Ohm SP2304 1 2 R0402 N42 N38
38 DAC_HSYNC_PCH VGA_HSYNC DDPD_CTRLDATA
R1.1

2
R1.3 2013/1/8 38 DAC_VSYNC_PCH
SP2305 1 2 R0402 N44
VGA_VSYNC
+3VS R2332~R2334 are removed R1.2 2012/10/29 R2326 1 1% 2 649OHM U40 DDPB_AUXN
H45

option changed fromGND /FDI GND DAC_IREF K43 DPC_AUXN 1 T2303 R1.2 2012/10/29
Close to CPU DDPC_AUXN
R2309 1 @ 2 1KOhm LCD_BL_PWM_PCH R1.2 2012/12/19 R1.2 2012/11/27 R1.2 2012/12/06 U39
VGA_IRTN J42
option changed from /non_FDI

DISPLAY
follow intel design guide
remove R2348 for GDDR5 DDPD_AUXN
R2307 1 @ 2 1KOhm LCD_BACKEN_PCH
option changed from /non_RETINA co-lay with R2326
SP2306 1
R1.2 2012/12/19
2 R0402 N36 H43 R1.2 2012/12/06
37 LCD_BL_PWM_PCH option changed from /non_RETINA
EDP_BKLTCTL DDPB_AUXP
remove R2338, R2329~R2331, R2349 for GDDR5

LVDS
R2308 1 @ 2 1KOhm LCD_VDD_EN_PCH SP2307 1 2 R0402 K36 K45 DPC_AUXP 1 T2304
37 LCD_BACKEN_PCH EDP_BKLTEN DDPC_AUXP
10KOhm 2 @ 1 R2318 DGPU_PWM_SELECT# SP2308 1 2 R0402 G36 J44
+3VS 37 LCD_VDD_EN_PCH EDP_VDDEN DDPD_AUXP
R2313 1 2 10KOhm DGPU_SELECT# K40
6 5 RN2301C INT_PIRQA# H20 DDPB_HPD R1.2 2012/11/27
PIRQA#
10KOhm 2 /DGPU
@ 1 R2319 DGPU_HOLD_RST#_R
8
10KOhm
7 RN2301D INT_PIRQB# L20 DDPC_HPD
K38
HDMI_HPD_PCH 39 follow intel design guide
10KOhm 2 /DGPU 1 R2320 DGPU_PWR_EN 10KOhm PIRQB# H39
4 3 RN2301B INT_PIRQC# K17 DDPD_HPD
R2327 2 1 2.2KOhm DDC2BC_PCH 10KOhm PIRQC#
2 1 RN2301A INT_PIRQD# M20
R2328 2 1 2.2KOhm DDC2BD_PCH 10KOhm PIRQD# PCI G17 MPC_PWR_CTRL# 1KOhm 2 @ 1 R2322
PIRQE#/GPIO2 GND
70 DGPU_HOLD_RST# SP2301 1 2 R0402 DGPU_HOLD_RST#_R A12
GPIO50 F17 SATA_ODD_DA#
PIRQF#/GPIO3 SATA_ODD_DA# 60
T2305 1 DGPU_SELECT# B13
GPIO52 L15 EXTTS_SNI_DRV0_PCH
DGPU_PWR_EN C12 PIRQG#/GPIO4
63 DGPU_PWR_EN GPIO54
C M15 EXTTS_SNI_DRV1_PCH C
BBS_BIT1 C10 PIRQH#/GPIO5
Int. PU
CRT Disable: (For discrete graphic) GPIO51 AD10 PCI_PME# 1 T2301
T2302 1 DGPU_PWM_SELECT# A10 PME#
GPIO53 Y11 PLT_RST#
1. NC: 3. Connected to GND: PLTRST#
STP_A16OVR Int. PU AL6
GPIO55
CRT_R,CRT_G,CRT_B CRT_ITRN +3VS
CRT_HSYCN,CRT_VSYNC DAC_IREF

2. 1K+-5% pull-down to GND: 4. Connect to +V3.3: 10KOhm 1 2 R2342 SATA_ODD_DA#


10KOhm 1 @ 2 R2343 EXTTS_SNI_DRV1_PCH
VCCADAC 10KOhm 1 @ 2 R2344 EXTTS_SNI_DRV0_PCH
10KOhm 1 @ 2 R2345 MPC_PWR_CTRL#

STP_A16OVR:
BBS_BIT0,BBS_BIT1 : Boot BIOS Strap +3VS +3VSUS
A16 swap override Strap/ DH82LPMS
Boot BIOS Strap Top-Block swap override jumper 02V000000012

1
Strap information:
R2347 R2346
BBS_BIT1 BBS_BIT0 Boot BIOS Location 0Ohm 0Ohm There signals have a weak internal pull down
Low=Enabled A16 swap override/
@ @
0 0 LPC Top-Block swap override DDPB_CTRLDATA: "0" = Port is not detected; "1"= Port is detected

2
DDPC_CTRLDATA: "0" = Port is not detected; "1"= Port is detected
DDPD_CTRLDATA: "0" = Port is not detected; "1"= Port is detected
0 1 Reserved (NAND)
High=Default
1 0 Reserved
U2302
1 1 SPI (PCH) DEFAULT 1 5
PLT_RST# 2 A VCC
3 B 4
GND Y BUF_PLT_RST# 30,33,40,43,47,53,55,70
Sampled on rising edge of PWROK.
SN74LVC1G08DCKR
@

1
20 BBS_BIT0 BBS_BIT0 R2310 1 @ 2 1KOhm STP_A16OVR R2312 1 @ 2 1KOhm GND
B B
R2315
BBS_BIT1 R2311 1 @ 2 1KOhm 1 2 100KOhm
GND R2314 0Ohm

2
GND +3VS

R2316 1 @ 2 10KOhm GND

R2317 1 @ 2 10KOhm +3VS


R1.1
1

R2321
10KOhm
@
2

U2301
+3VSUS 5 1 R2323 1 @ 2 0Ohm DGPU_PWR_EN
VCC A 2
B SUSB_EC# 22,30,63,91,92
R2325 1 @ 2 0Ohm 4 3
91 VGA_PWRON Y GND GND
SN74LVC1G08DCKR
@

R2324 1 2 0Ohm

A A

Title : PCH(4)_DP,LVDS,CRT
PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
C VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 23 of 96
5 4 3 2 1
5 4 3 2 1

LPT_PCH_M_EDS
U2001I
USB PORT
AW31 B37 USB_PN0
40 PCIE_RXN1_CR PERN1/USB3RN3 USB2N0 USB_PN0 61
AY31 D37 USB_PP0
40 PCIE_RXP1_CR PERP1/USB3RP3 USB2P0 USB_PP0 61
A38 USB_PN1 USB P00 External 2.0/3.0 +3VSUS
USB2N1 USB_PN1 61 +3VSUS 4,22,23,27,28,30,33,43,61,81,92
C2409 1 2 0.1UF/10V PCIE_TXN1_CR_C BE32 C38 USB_PP1
40 PCIE_TXN1_CR PETN1/USB3TN3 USB2P1 USB_PP1 61
C2410 1 2 0.1UF/10V PCIE_TXP1_CR_C BC32 A36 USB_PN2 USB P01 External 2.0/3.0
40 PCIE_TXP1_CR PETP1/USB3TP3 USB2N2 USB_PN2 61 +3VS +3VS 16,17,20,21,22,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92
C36 USB_PP2
D USB2P2 USB_PP2 61
AT31 A34 USB P02 External 2.0 +3V
D
53 PCIE_RXN6_mSATA PERN2/USB3RN4 USB2N3 +3V 37,43,63,65,91
AR31 C34
53 PCIE_RXP6_mSATA PERP2/USB3RP4 USB2P3
@ B33 USB_PN4 1 T2403 USB P03 +3VSUS_ORG
USB2N4 +3VSUS_ORG 20,21,22,25,26,27
53 PCIE_TXN6_mSATA C2404 1 2 0.1UF/10V PCIE_TXN6_mSATA_C BD33 D33 USB_PP4 1 T2405
C2403 1 2 0.1UF/10V PCIE_TXP6_mSATA_C BB33 PETN2/USB3TN4 USB2P4 F31 USB_PN5 USB P04
53 PCIE_TXP6_mSATA PETP2/USB3TP4 USB2N5 USB_PN5 55 +12VS +12VS 28,39,41,63,91
G31 USB_PP5
USB2P5 USB_PP5 55
@ K31 USB P05 WiFi
AW33 USB2N6 L31
55 PCIE_RXN2_WLAN PERN_3 USB2P6
AY33 G29 USB_PN7 1 T2404 USB P07
55 PCIE_RXP2_WLAN PERP_3 USB2N7 H29 USB_PP7 1 T2406
C2401 1 2 0.1UF/10V PCIE_TXN2_WLAN_C BE34 USB2P7 A32 USB_PN8 USB P08 Camera
55 PCIE_TXN2_WLAN PETN_3 USB2N8 USB_PN8 37
C2402 1 2 0.1UF/10V PCIE_TXP2_WLAN_C BC34 C32 USB_PP8
55 PCIE_TXP2_WLAN PETP_3 USB2P8 USB_PP8 37
A30 USB_PN9 USB P09 External 2.0
USB2N9 USB_PN9 61
33 PCIE_RXN3_LAN
AT33 C30 USB_PP9 +1.5VS
PERN_4 USB2P9 USB_PP9 61 +1.5VS 20,21,22,26,27,41,53,55,63,84
33 PCIE_RXP3_LAN
AR33 B29 USB_PN10 1 T2407 USB P10 BT
PERP_4 USB2N10 D29 USB_PP10 1 T2408
C2406 1 2 0.1UF/10V PCIE_TXN3_GLAN_C BE36 USB2P10 A28 USB_PN11 USB P11 PCIE/mSATA
33 PCIE_TXN3_LAN PETN_4 USB2N11 USB_PN11 53
C2407 1 2 0.1UF/10V PCIE_TXP3_GLAN_C BC36 C28 USB_PP11
33 PCIE_TXP3_LAN PETP_4 USB2P11 USB_PP11 53
G26 USB_PN12 1 T2401 USB P12

PCIe
AW36 USB2N12 F26 USB_PP12 1 T2402
AV36 PERN_5 USB2P12 F24

USB
USB P13
PERP_5 USB2N13 G24
C BD37 USB2P13 C
BB37 PETN_5
PETP_5 AR26
USB3RN1 USB3_RX1_N 61
AY38 AP26
PERN_6 USB3RP1 USB3_RX1_P 61
AW38 BE24
PERP_6 USB3TN1 USB3_TX1_N 61
BD23
USB3TP1 USB3_TX1_P 61
BC38 AW26
PETN_6 USB3RN2 USB3_RX2_N 61
BE38 AV26
PETP_6 USB3RP2 USB3_RX2_P 61
BD25
USB3TN2 USB3_TX2_N 61
AT40 BC24
PERN_7 USB3TP2 USB3_TX2_P 61
AT39 AW29
PERP_7 USB3RN5 AV29
BE40 USB3RP5 BE26
BC40 PETN_7 USB3TN5 BC26
PETP_7 USB3TP5 AR29
AN38 USB3RN6 AP29
AN39 PERN_8 USB3RP6 BD27
PERP_8 USB3TN6 BE28
BD42 USB3TP6
BD41 PETN_8 K24
PETP_8 USBRBIAS# K26 +3VSUS_ORG
USBRBIAS
SP2403
B 1 2NB_R0402_20MIL_SMALL PCIE_IREF BE30 M33 USB_BIAS R2403 1 1% 2 22.6Ohm B
+1.5VS PCIE_IREF TP24 GND
L33
TP23
R1.2 2012/11/28 BC30 P3 OC0#/GPIO59 7 8 RN2401D
TP11 OC0#/GPIO59 10KOhm
cost dwon 0ohm V1 OC1#/GPIO40 1 2 RN2401A
OC1#/GPIO40 10KOhm
U2 OC2#/GPIO41 3 4 RN2401B
R1.2 2012/12/04 OC2#/GPIO41 10KOhm
BB29 P1 OC3#/GPIO42 1 2 RN2402A
change short pin size TP6 OC3#/GPIO42 10KOhm
M3 OC4#/GPIO43 7 8 RN2402D
OC4#/GPIO43 10KOhm
DH82LPMS T1 OC5#/GPIO9 5 6 RN2401C
OC5#/GPIO9 10KOhm
R2401 1 2 7.5KOhm PCIE_RCOMP BD29 02V000000012 N2 OC6#/GPIO10 3 4 RN2402B
+1.5VS PCIE_RCOMP OC6#/GPIO10 10KOhm
M1 OC7#/GPIO14 5 6 RN2402C
OC7#/GPIO14 10KOhm

Place within 500 mils of PCH

SP2402 1 2 R0402
USB_OC0# 61

SP2401 1 2 R0402
USB_OC1# 61
A A

Title : PCH(5)_PCI,NVRAM,USB
@ Engineer: Wing_Cheng
R2404 1 2 0Ohm PEGATRON COMPUTER INC
Size Project Name Rev
Custom VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 24 of 96
5 4 3 2 1
5 4 3 2 1

+3VS +3VS 16,17,20,21,22,23,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92

+3VSUS +3VSUS 4,22,23,27,28,30,33,43,61,81,92

+VCCDSW +VCCDSW 27

+3VSUS_ORG +3VSUS_ORG 20,21,22,24,26,27

+3VS +3VS +3VS PCB ID2 PCB_ID1 PCB_ID0


R1.0 TBD 0 0
R1.1 TBD 0 1
R1.2 TBD 1 0
R1.3 TBD 1 1

1
D
R1.2 2012/11/30 R2561 R2559 R2553
D

PCB_ID R1.2
10KOhm 10KOhm 10KOhm
@ @

2
PCB_ID0
PCB_ID1
PCB_ID2

R1.2 2012/11/28 U2001F LPT_PCH_M_EDS

eDP_ON# is not used PCH_GPIO0_R AT8


BMBUSY#/GPIO0
Reserved R1.2 2012/11/29
1

1
GPIO1 F13
R2558 R2560 R2554
This signal has a weak internal pull-up but requires an
external pull down. T2505, R2563 are removed, too TACH1/GPIO1
TP14 is Intel Reserved Pin: Must have a pull up resistor to VCC3_3. Standard
T2503 1 DGPU_HPD_INTR# A14
10KOhm 10KOhm 10KOhm PCH_GPIO8 SP2506 1 2 R0402 TACH2/GPIO6 resistor value in the range of 4.7K to 15K ok(shark bay LPT EDS 486708)
@ G15 CPU/Misc
2

2
TACH3/GPIO7
@ Y1
PCH_GPIO8_R need close to EC
GPIO8
SP2502 1 2 R0402 PM_LANPHY_EN K13
53,55 WLAN_RST#_PCH LAN_PHY_PWR_CTRL/GPIO12 AN10
TP14 A20GATE 30
GND GND GND SP2501 1 2 R0402 HOST_ALERT#1_R AB11
30,65 EXT_SMI# GPIO15 AY1 H_PECI_R 0Ohm 1 @ 2 R2503
AN2 PECI 1 2 R2504 H_PECI 4
SATA_DET#4 43Ohm
SATA4GP/GPIO16 AT6 H_PECI_EC 30
DGPU_PWROK C14 GPIO RCIN# RCIN# 30
87,92 DGPU_PWROK TACH0/GPIO17 AV3
PROCPWRGD H_CPUPWRGD 4
BB4
66 WLAN_LED SCLOCK/GPIO22 AV1 PM_THRMTRIP# 390Ohm 1 1% 2 R2505
THRMTRIP# H_THRMTRIP# 4,47
SP2504 1 2 R0402 PCH_GPIO24 Y10 R2506 2 1% 1 1KOhm
55 AOAC_ON GPIO24 +1.05VS
AU4 @
R11 PLTRST_PROC# PCH_PLTRST_CPU# 4
GPIO27
GPIO27 N10
VSS3 GND
WLAN_ON_R AD11
R1.2 2012/11/08 GPIO28
cost dwon 0ohm STP_PCI# AN6
C GPIO34 C
SP2507 1 2 R0402 SATA_PWR_EN#1_R AP1
42 OP_SD# GPIO35/NMI#
SP2503 1 2 R0402 SATA_ODD_PRSNT#_R AT3
+3VSUS_ORG 60 SATA_ODD_PRSNT# SATA2GP/GPIO36
FDI_OVRVLTG AK1
+3VS +3VS SATA3GP/GPIO37
PCB_ID0 AT7
EXT_SMI# R2512 1 2 1KOhm SLOAD/GPIO38
PCB_ID1 AM3 A2
SDATAOUT0/GPIO39 VSS4

1
A41
VSS13

1
R2524 AN4 A43
PCH_GPIO8 R2513 2 1 10KOhm 55 BT_ON_PCH SDATAOUT1/GPIO48 VSS14
10KOhm R2525 A44
T2504 1 PCH_ALERT# SP2505 1 2 R0402 CRIT_TEMP_REP#_R AK3 VSS12 B1
10KOhm SATA5GP/GPIO49 VSS11
PM_LANPHY_EN R2518 2 @ 1 10KOhm @ B2

2
@ PCB_ID2 0Ohm 1 @ R2552 2 U12 VSS10 B44

2
GPIO57 VSS21 B45
@
C16 VSS9 BA1
53,55 WLAN_ON 60 SATA_ODD_PWRGT TACH4/GPIO68 VSS1
PCH_GPIO24 R2520 2 1 10KOhm BC1
GPIO69 D13 VSS2 BD1
TACH5/GPIO69 VSS8 BD2
@
VSS6

3
GPIO70 G13 BD44
Q2501B TACH6/GPIO70 VSS7 BD45
+3VS UM6K1N 5 GPIO71 H15 VSS5 BE2
@ TACH7/GPIO71 VSS20 BE3

4
VSS19

6
RCIN# has pull high at EC side D1
Q2501A BE41 VSS18 E1
2 @ 1 2 BE5 VSS25 NCTF VSS17 E45
DGPU_HPD_INTR# R2514 10KOhm UM6K1N WLAN_ON_R
C45 VSS24 VSS16 A4

1
PCH_ALERT# R2515 2 @ 1 10KOhm @ A5 VSS23 VSS15
VSS22
DGPU_PWROK R2519 2 1 10KOhm DH82LPMS
02V000000012
R1.2 2012/11/29 GND GND
GND
R2523, eDP_ON# pull-up is removed GPIO change: GND

2 1 10KOhm
CIO_PLUG_EVENT/PCIE_WAKE#/OP_SD#/DDR_VOLT_SEL
GPIO69 R2502 @
PCB_ID2

B B
R1.1
GPIO1 R2521 2 @ 1 10KOhm
DGPU_PWROK R2532 2 @ 1 10KOhm

STP_PCI# R2517 2 1 10KOhm PCH_GPIO8_R R2526 2 @ 1 10KOhm

SATA_DET#4 R2522 2 1 10KOhm


R1.1 IO Flexible: +3VS
PCH_GPIO0_R R2556 2 @ 1 10KOhm GND
USB3 Port 3 PCIE Port2 Mode (USB3P3_PCIEP2_MODE)
R2534 1 1% 2 1KOhm FDI_OVRVLTG R2531 1 2 100KOhm GPIO70 R2527 2 @ 1 10KOhm USB3p3_tach6_gp70 pin is a 0, then Root Port 2 is
+3VS GND assigned to USB3 Port 3, else it is assigned to PCI Express.
@
Functional Strap Definitions @
Usage: TLS Confidentiality(Intel Crypto Transport Layer Security) GPIO71 R2528 2 @ 1 10KOhm
+3VSUS_ORG "0" = Disable
"1" = Enable
USB3 Port 2 PCIE Port1 Mode (USB3P2_PCIEP1_MODE)
GPIO70 R2529 2 @ 1 10KOhm
USB3p2_tach7_gp71 pin is a 0, then Root Port 1is
assigned to USB3 Port 2, else it is assigned to PCI Express.
R2533 1 1% 2 200KOhm SATA_ODD_PRSNT#_R GPIO71 R2530 2 @ 1 10KOhm
+3VS
GPIO27 R2557 2 1 10KOhm Functional Strap
@ Definitions
Usage: Reserved
@ This signal has a weak internal pull-down. GND
NOTES:
1. The internal pull-down is disabled after PLTRST# deasserts.
2. This signal should not be pulled high when strap is sampled

A A

GPIO27 R2535 2 1 10KOhm

GND
Title : PCH(6)_CPU,GPIO,MISC
PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
Custom VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 25 of 96

5 4 3 2 1
5 4 3 2 1
R1.2 2012/11/27
+VCCA_DAC_1_2
follow intel design guide
B2601 R1.2 2012/11/28
1 2
R2611 is removed
+1.5VS
1kOhm/100Mhz R1.2 2012/12/06

1
C2619 C2620 C2621 remove R2612, R2610 for GDDR5
0.01UF/50V 0.1UF/16V 10UF/10V R1.2 2012/12/19

2
option changed to N/A
LPT_PCH_M_EDS
U2001G GND GND GND
LPT_PCH_M_EDS +V3.3S_ADACBG
U2001J P45 70mA
VCCADAC1_5 GND
1.31A R2603 0Ohm
AL34 K39 AA24 P43 1 2
VSS116 VSS96 +V1.05VS_PCH_VCC VCC7 CRT DAC VSS26 +3VS +VTT_PCH_VCCIO
AL38 L2 AA26
VSS115 VSS95 VCC8 R1.2 2012/12/03 R1.2 2012/12/04

1
AL8 L44 AD20 M31 13mA @ C2623 1 2 10UF/10V GND NB_R0402_20MIL_SMALL
AM14 VSS114 VSS94 M17 C2616 C2615 C2614 C2601 AD22 VCC9 VCCADACBG3_3 +V1.5S_VCCAPLL_FDI SP26131 2 cost dwon 0ohm change short pin size
VSS113 VSS93 VCC11 +1.5VS
AM24 M22 10UF/10V 1UF/6.3V 1UF/6.3V 1UF/6.3V AD24

2
D
AM26 VSS112 VSS92 N12 AD26 VCC10 BB44 +V1.05S_VCC_EXP D
AM28 VSS111 VSS40 N35 AD28 VCC12 VCCVRM2
VSS91 VSS42 VCC13

1
FDI
AM30 N39 GND GND GND GND AE18 AN34 R1.2 2012/12/17
AM32 VSS90 VSS41 N6 AE20 VCC1 VCCIO1 C2609 C2606 C2608 C2607 C2613 C2622
VSS110 VSS43 VCC17 R2606 is removed
AM16 P22 AE22 AN35 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 10UF/10V

2
AN36 VSS118 VSS45 P24 AE24 VCC2 VCCIO2 +3VS
AN40 VSS89 VSS44 P26 AE26 VCC16 R30 +3VS_VCC_GIO
AN42 VSS88 VSS48 P28 AG18 VCC15 HVCMOS VCC3_3_R30 R32 NB_R0402_20MIL_SMALL
AN8 VSS117 VSS47 P30 AG20 VCC14 VCC3_3_R32 GND 0Ohm SP26141 2
VSS109 VSS46 VCC6 T2601
AP13 P32 AG22 Y12 1 1 2 +3VSUS_ORG R1.2 2012/12/03
VSS108 VSS49 VCC5 DCPSUS1

1
AP24 R12 AG24 R2602 cost dwon 0ohm
VSS87 VSS50 VCC4

1
AP31 R14 Y26 AJ30 C2618
VSS107 VSS53 VCC3 VCCSUS3_3_1 +3VSUS_VCCPSUS R1.2 2012/12/04

Core
AP43 R16 AJ32 C2617 0.1UF/16V

2
AR2 VSS86 VSS52 R2 VCCSUS3_3_2 0.1UF/16V change short pin size
T2602

2
AK16 VSS85 VSS51 R34 AJ26 1 +1.5VS
AT10 VSS84 VSS55 R38 C2612 1 2 1UF/6.3V R2601 1 2 5.1Ohm +PCH_VCCDSW U14 USB3 DCPSUS3_1 AJ28 GND
VSS83 VSS54 GND DCPSUSBYP DCPSUS3_2
AT15 R44 AA18 AK20 +V1.05S_VCC_EXP GND NB_R0402_20MIL_SMALL
AT17 VSS82 VSS56 R8 U18 VCCASW12 VCCIO3 AK26 +VCCAPLL_USB3 SP26151 2
AT20 VSS37 VSS58 T43 U20 VCCASW11 VCCVRM3 AK28
0.67A
VSS36 VSS57 VCCASW1 VCCVRM4 R1.2 2012/12/03

1
AT26 U10 +V1.05VM_VCCASW U22 NB_R0402_20MIL_SMALL
AT29 VSS35 VSS60 U16 U24 VCCASW2 BE22 +VCCAPLL_EXP SP26171 2 C2602 @ cost dwon 0ohm
VSS38 VSS59 VCCASW3 VCCVRM5 +1.5VS
AT36 U28 V18 PCIe/DMI C2610 1 210UF/10V 1UF/6.3V R1.2 2012/12/04
GND

2
VSS34 VSS61 VCCASW9

1
AT38 U34 V20 AK18 @ change short pin size
D42 VSS80 VSS62 U38 C2603 C2604 C2605 V22 VCCASW10 VCCIO4 NB_R0402_20MIL_SMALL
AV13 VSS33 VSS63 U42 22UF/6.3V 1UF/6.3V 1UF/6.3V V24 VCCASW4 AN11 +VCCAPLL_SATA3 SP26161 2 GND
+1.5VS

2
AV22 VSS32 VSS65 U6 Y18 VCCASW5 VCCVRM1
VSS119 VSS64 VCCASW6 R1.2 2012/12/03

1
AV24 V14 Y20 SATA AK22
AV31 VSS39 VSS66 V16 Y22 VCCASW7 VCCIO9 C2611 cost dwon 0ohm
AV33 VSS28 VSS67 V26 GND GND GND VCCASW8 AM18 10UF/10V R1.2 2012/12/04

2
BB25 VSS31 VSS68 V43 VCCIO11 AM20 @ change short pin size
VSS29 VSS71 VCCIO10


AV40 W2 AM22
AV6 VSS30 VSS70 W44 VCCMPHY VCCIO5 AP22
AW2 VSS106 VSS69 Y14
DCPSUS1 DCPSUS2(27 ) DCPSUS3: VCCIO6 AR22 GND
F43 VSS105 VSS73 Y16 If INTVRMEN is strapped high then power to this well is supplied internally VCCIO7 AT22
VSS81 VSS72 VCCIO8
AY10
VSS104 VSS74
Y24 and this pin should be left as no connect.
AY15 Y28 If INTVRMEN is strapped low then power to this well must be supplied by an
AY20 VSS103 VSS76 Y34
C AY26 VSS102 VSS75 Y36 external 1.05 V suspend rail. C
AY29 VSS101 VSS78 Y40 Note: External VR mode applies to Mobile Only.
VSS100 VSS77
AY7
VSS99 VSS79
Y8 (shark bay GaryReff schematic 481356)
B11
B15 VSS98
VSS97

GND GND

DH82LPMS
02V000000012
DH82LPMS
02V000000012

+1.05VS +V1.05VS_PCH_VCC
JP2601
1.29A +V1.05VM_VCCASW +V1.05VM_VCCASW 27
1 2
1 2
2MM_OPEN_5MIL
+V1.05VM_VCCASW +VTT_PCH_VCCIO +VTT_PCH_VCCIO 27
JP2602
0.67A +1.05VS +1.05VS 4,25,27,47,63,80,82
2 1
2 1
+1.5VS +1.5VS 20,21,22,24,27,41,53,55,63,84
2MM_OPEN_5MIL
B B
+VTT_PCH_VCCIO +3VS +3VS 16,17,20,21,22,23,25,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92
JP2603
3.629A
1 2
1 2
2MM_OPEN_5MIL
+3VSUS_VCCPSUS +3VSUS_VCCPSUS 27

A A

Title : PCH(7)_POWER,GND
BG1\CORE Engineer: Wing_Cheng
Size Project Name Rev
C VA70_HW 1.1
Date: Friday, January 18, 2013 Sheet 26 of 96

5 4 3 2 1
5 4 3 2 1

U2001K LPT_PCH_M_EDS

AA16 B19
AA20 VSS136 VSS171 B23
AA22 VSS197 VSS170 B27
AA28 VSS196 VSS169 B31
AA4 VSS195 VSS168 B35 +VCCDSW
AB12 VSS194 VSS167 B39
AB34 VSS193 VSS166 B7 NB_R0402_20MIL_SMALL
AB38 VSS192 VSS165 BA40 SP27081 2 +3VSUS_VCCPUSB +3VSUS_VCCPSUS +3VSUS_ORG
VSS146 VSS164 +3VSUS_ORG LPT_PCH_M_EDS
AB8 BD11 U2001H
VSS128 VSS163

1
AC2 BD15
D AC44 VSS145 VSS162 BD19 C2702 D
VSS191 VSS161 R1.2 2012/12/03
AD14 AY36 cost dwon 0ohm 0.1UF/16V NB_R0402_20MIL_SMALL

2
AD16 VSS190 VSS160 AT43 R24 R20 +VCCDSW SP27011 2
AD18 VSS189 VSS159 BD31 R1.2 2012/12/04 R26 VCCSUS3_3_9 VCCSUS3_3_6 R22 R1.2 2012/12/04
VSS204 VSS129 VCCSUS3_3_3 VCCSUS3_3_7

1
AD30 BD35 change short pin size GND R28 +VCCSST 1 2 change short pin size
VSS203 VSS130 VCCSUS3_3_4 GPIO/LPC GND +3VS
AD32 BD39 R1.2 2012/12/03 U26 0.1UF/16V C2705 C2704
AD40 VSS202 VSS131 BD7 VCCSUS3_3_5 A16 0.1UF/16V
cost dwon 0ohm

2
AD6 VSS209 VSS132 D25 M24 VCCDSW3_3
VSS208 VSS144 R1.2 2012/12/04 GND VSS27
AD8 AV7 change short pin size AA14 NB_R0402_20MIL_SMALL
AE16 VSS188 VSS133 F15 R2726 1 2 0Ohm +1.05VS_VCCAUSB U35 DCPSST +3VS_VCCPCORE SP27021 2
VSS187 VSS143 +1.05VS VCCUSBPLL
AE28 F20 NB_R0402_20MIL_SMALL AE14 GND

USB
VSS186 VSS134 VCC3_3_2 R1.2 2012/12/03

1
AF38 F29 SP27091 2 +3VS_VCCAUBG L24 AF12 +VTT_PCH_VCCIO
VSS185 VSS142 +3VS VCC3_3_1 VCC3_3_3 cost dwon 0ohm
AF8 F33 C2703 AG14 NB_R0402_20MIL_SMALL C2701
AG16 VSS184 VSS135 BC16 0.1UF/16V C2714 1 2 0.1UF/16V U30 VCC3_3_4 SP27031
+V1.05S_VCCAUX 2 0.01UF/50V
GND R1.2 2012/12/04

2
AG2 VSS183 VSS121 D4 NB_R0402_20MIL_SMALL V28 VCCIO12 +3VSUS_ORG
VSS201 VSS120 R1.2 2012/12/03 VCCIO14 change short pin size
AG26 G2 cost dwon 0ohm SP27101 2 +1.05VS_VCCUSBCORE V30 U36 NB_R0402_20MIL_SMALL
VSS200 VSS122 +VTT_PCH_VCCIO VCCIO13 VCCIO15
AG28 G38 GND Y30 +3VSUS_VCCPAZSUS 1
SP2704 2 GND
VSS199 VSS123 R1.2 2012/12/04 GND VCCIO16
AG44 G44 1 2 R1.2 2012/12/03R1.2 2012/12/04
VSS198 VSS124

1
AJ16 G8 change short pin size +VCCAXCK_VRM C2730 0.1UF/16V T2701 1 Y35 Azalia +VCC_RTC
cost dwon 0ohm change short pin size
AJ18 VSS182 VSS125 H10 NB_R0402_20MIL_SMALL DCPSUS2 A26 C2706
AJ20 VSS148 VSS126 H13 SP27111 2 AF34 VCCSUSHDA
+1.5VS 0.1UF/16V

2
VSS147 VSS127 VCCVRM7

1
AJ22 H17 NB_R0402_20MIL_SMALL C2712 C2713 C2731
VSS150 VSS139 +1.05VS

1
AJ24 H22 SP27121 2 +1.05VS_VCC_AXCK_DCB AP45 K8 +VCCPRTCSUS
AJ34 VSS149 VSS140 H24 C2715 VCC20 VCCSUS3_3_8 GND 0.1UF/16V 0.1UF/16V1UF/6.3V

2
VSS181 VSS141

1
AJ38 H26 10UF/10V C2717 +1.05VS_VCC_SSCFF Y32 A6

2
AJ6 VSS180 VSS138 H31 @ C2716 VCCCLK1 VCCRTC
1UF/6.3V
AJ8 VSS179 VSS158 H36 10UF/10V +3VS_VCC_FLEX0 M29 RTC P14 +VCCRTCEXT

2
GND

2
AK14 VSS178 VSS137 H40 GNDR1.2 2012/12/03 VCCCLK3_3_1 DCPRTC1 P16
VSS177 VSS157 DCPRTC2

1
AK24 H7 cost dwon 0ohm +3VS_VCC_FLEX1 L29 +1.05VS_VCCPCPU 1 2 R2732 +1.05VS +3VS
VSS176 VSS156 VCCCLK3_3_2 +1.05VS
AK43 K10 R1.2 2012/12/04 0Ohm C2708
VSS175 VSS155

1
AK45 K15 change short pin size GND +3VS_VCC_FLEX23 L26 AJ12 1 0Ohm 2 R2733 0.1UF/16V
+VCCIO2PCH

2
AL12 VSS174 VSS154 K20 M26 VCCCLK3_3_3 V_PROC_IO_1 AJ14 C2709 C2710 C2727 @
CPU
VSS173 VSS153 VCCCLK3_3_4 V_PROC_IO_2

2
AL2 K29 0.1UF/16V 0.1UF/16V 1UF/6.3V

2
BC22 VSS172 VSS152 K33 +3VS_VCC_ASEPCI U32 GND R2720 R2734
BB42 VSS206 VSS151 BC28 V32 VCCCLK3_3_5

ICC
AD12 +3VM_VCCPSPI Unstuff R2731, stuff R2732 0Ohm 0Ohm
VSS205 VSS207 VCCCLK3_3_6 SPI VCCSPI
+VCCCLKF135 AD34 GND Intel MOW WW09: renamed

1
VCCCLK2 P18
VCC18 VCCIO2PCH to RSVD @
+1.05VS_VCC_SSCFF AA30 P20 +3VS_VCCPFUSE R1.1
DH82LPMS AA32 VCCCLK3 VCC19 NB_R0402_20MIL_SMALL
VCCCLK4

1
C 02V000000012 L17 PCH_VCC_1_1_20 SP27051 2 C2729 C
Fuse VCCASW13 +V1.05VM_VCCASW
+1.05VS_VCCCLKF100 AD35 NB_R0402_20MIL_SMALL 1UF/6.3V
GND GND VCCCLK5 R18 PCH_VCC_1_1_21 SP27061 2
+V1.05VM_VCCASW

2
+1.05VS_VCCSSCF100 AG30 VCCASW14
AG32 VCCCLK6 NB_R0402_20MIL_SMALL
VCCCLK7 AW40 +V1.5S_VCCATS SP27071 2
VCCVRM6 +1.5VS
+1.05VS_VCCCLKF100 AD36 GND
VCCCLK8 AK30 R1.2 2012/12/03
+1.05VS_VCCSSCF100 AE30 VCC3_3_5 cost dwon 0ohm
Thermal
AE32 VCCCLK9 AK32
R1.2 2012/12/03 VCCCLK10 VCC3_3_6 R1.2 2012/12/04
cost dwon 0ohm change short pin size
R1.2 2012/12/04
change short pin size NB_R0402_20MIL_SMALL
+1.05VS +3VS +3VS +3VS_VCCPTS SP27211 2
+3VS

1
NB_R0402_20MIL_SMALL NB_R0402_20MIL_SMALL NB_R0402_20MIL_SMALL
SP27131 2 +1.05VS_VCC_SSCFF SP27141 2 +3VS_VCC_FLEX0 SP27151 2 +3VS_VCC_FLEX1 C2711 R1.2 2012/12/03
DH82LPMS 0.1UF/16V cost dwon 0ohm

2
1

1
C2718 C2719 C2720 +3VSUS_ORG +3VA
02V000000012 R1.2 2012/12/04
1UF/6.3V 1UF/6.3V 1UF/6.3V
change short pin size
2

2
GND

+3VS +3VS +1.05VS R2719 1 2 0Ohm


GND GND GND +3VM_VCCPSPI +3VS
NB_R0402_20MIL_SMALL NB_R0402_20MIL_SMALL NB_R0402_20MIL_SMALL @
SP27161 2 +3VS_VCC_FLEX23 SP27171 2 +3VS_VCC_ASEPCI SP27181 2 +VCCCLKF135 20mA R2701 2 @ 1 0Ohm +VCCPRTCSUS R2718 1 2 0Ohm
1

1
C2721 C2722 C2723 C2728 +3VM_SPI

1
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V C2726
R2702 2 1 0Ohm 1UF/6.3V
2

2
GND
+1.05VS GND +1.05VS GND GND
GND
NB_R0402_20MIL_SMALL NB_R0402_20MIL_SMALL
SP27191 2 +1.05VS_VCCCLKF100 SP27201 2 +1.05VS_VCCSSCF100
1

B C2724 C2725 B
1UF/6.3V 1UF/6.3V
2

GND GND

+3VSUS_ORG

+3VSUS
+V1.05VM_VCCASW +V1.05VM_VCCASW 26
JP2702
2 1 261mA
2 1
1MM_OPEN_M1M2 +3VSUS +3VSUS 4,22,23,28,30,33,43,61,81,92

+3VSUS_ORG +3VSUS_ORG 20,21,22,24,25,26

+1.5VS +1.5VS 20,21,22,24,26,41,53,55,63,84

+3VS +3VS 16,17,20,21,22,23,25,26,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92

+1.05VS +1.05VS 4,25,26,47,63,80,82

+VTT_PCH_VCCIO +VTT_PCH_VCCIO 26

+VCCAXCK_VRM +VCCAXCK_VRM 21

+3VSUS_VCCPSUS +3VSUS_VCCPSUS 26

+3VA +3VA 20,30,63,65,81,88,93

+VCC_RTC +VCC_RTC 20,22

A
+VCCIO2PCH +VCCIO2PCH 6 A

Title : PCH(8)_POWER,GND
PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
Custom VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 27 of 96

5 4 3 2 1
5 4 3 2 1

PCH SPI ROM +3VS +3VS 16,17,20,21,22,23,25,26,27,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92

+12VS +12VS 39,41,63,91


R1.0 0106
+12VSUS +12VSUS 22,33,55,60,81,91
+3VM_SPI
@ +3VM_SPI +3VM_SPI 27
+3VA_EC 2 1
R2802 0Ohm D2801 +3VSUS
2 1 1 +3VSUS 4,22,23,27,30,33,43,61,81,92
+3VSUS
R2803 0Ohm 3
2
@
1V/0.2A <6.5 inch <6.5 inch

2 1
PCH EC
R2801 0Ohm
SPI ROM
D D
(32Mb)

SPI ROM
+3VM_SPI +3VM_SPI (128 Kb)
R1.2 2012/11/29 R1.2 2012/11/28 +3VM_SPI
+3VM_SPI
reserved for intel design guide follow intel design guide R1.2 2012/11/28
R1.2 2012/11/29
2

2
follow intel design guide

2
R2822 R2807 reserved for intel design guide

1
1KOhm 1KOhm R2808 R2823
@ C2802 1KOhm 1KOhm
0.1UF/16V @
1

1
U2801
PCH_SPICS0# 1 0Ohm 2 R2804 SPI1_CS#0 1 8
21 PCH_SPICS0# CS# VCC
PCH_SPISO 1 33Ohm 2 R2805 SPI1_SO 2 7 SPI1_HOLD# R2811 1 2 33Ohm
21,30 PCH_SPISO 1 SO/SIO1 NC/SIO3 SPI_HOLD#_IO3 21,30
33Ohm 2 R2806 +3VM_SPI1_WP# 3 6 SPI1_CLK R2809 1 2 33Ohm
21,30 SPI_WP_IO2 WP#/SIO2 SCLK PCH_SPICLK 21,30
4 5 SPI1_SI R2810 1 2 33Ohm
GND SI/SIO0 PCH_SPISI 21,30
MX25L1675EM2I-10G ROM setting:
05V000000023 Configuration 1. ITE HSPI -> short J2803 pin2 & 3
(16Mb) and no stuff U2801,U2802

@ +3VM_SPI

R1.2 2012/11/28
follow intel design guide
Configuration 2. One ROM solution -> short J2803 pin1&2
and no stuff U2802 ; stuff U2801(BIOS+ME)
Configuration 3. Two ROM solution -> short J2803 pin1&2 , J2802 pin2&3

2
+3VM_SPI Stuff U2801(ME), Stuff U2802(BIOS)
R2821 R1.2 2012/11/28
1KOhm follow intel design guide

2
1
C2801 R2815 Follow Intel setting:
@ 0.1UF/16V 1KOhm
U2801: ME

2
@ U2802: BIOS

1
U2802 @
C PCH_SPICS1# 0Ohm 1 2 R2817 SPI2_CS#1 1 8 C
21,30 PCH_SPICS1# 1 2 R2816 2 CS# VCC 7
33Ohm SPI2_SO SPI2_HOLD# R2814 1 2 33Ohm
33Ohm 1 @ 2 R2818 +3VM_SPI2_WP# 3 DO(IO1) HOLD#/RESET#(IO3) 6 SPI2_CLK R2812 1 2 33Ohm
4 WP#(IO2) CLK 5 SPI2_SI R2813 1 @ 2 33Ohm
@
GND DI(IO0)
@ @
W25Q32FVSSIQ @
05V000000022
@ (32Mb)

+3VS
SPI Debug Connector PCH SMBus
SMBUS Link device
eDP
+12VS WLAN
CPU XDP

3
PCH XDP
RN2801A RN2801B
4.7KOHM 4.7KOHM

+3VSUS

4
+3VS

2
6 1
21 SCL_3A SMB_CLK_S 16,17,48,53,55

Q2801A
PCH UM6K1N

5
B B
3 4
21 SDA_3A SMB_DAT_S 16,17,48,53,55

Q2801B
UM6K1N

1 @ 2
+12VSUS
R2820 0Ohm
1 2 +12VS
R2819 0Ohm

+3VS +3VSUS
2

Q2802A
UM6K1N
1 6
30,49,74 SMB1_CLK SML1_CLK 21

PCH
EC, VGA Thermal 5
Q2802B
UM6K1N
4 3
30,49,74 SMB1_DAT SML1_DAT 21

A R1.2 2012/10/29 A

option changed from /non_FDI_@


R1.2 2012/11/28
R2822, R2823 are removed

SCL_VGA 30,49,74
+3VS Title : PCH(9)_SPI,SMB
SDA_VGA 30,49,74 ANX6211 PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
C VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 28 of 96
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : CLK_ICS9LRS3197
PEGATRON COMPUTER INC Engineer: Wing_Cheng
Size Project Name Rev
Custom VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 29 of 96
5 4 3 2 1
5 4 3 2 1

T3010
1
AC_IN_OC# 90
T3011
1
M_VREF 83

D D

+3VA_EC +3VA_EC 28,47


+3VS +3VS 16,17,20,21,22,23,25,26,27,28,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92 +3VA @ +3VA_EC


+3VSUS
+3VA
+3VSUS 4,22,23,27,28,33,43,61,81,92
+3VA 20,27,63,65,81,88,93
L3001
1kOhm/100Mhz
R1.2 2012/11/06
1 2
T3014
R3074 1 0Ohm 2 1

T3015
1

T3016
+3VA_EC 1
+3VA_EC
R1.2 2012/11/08
U3001
cost dwon 0ohm

1
3 66 C3001 C3002 C3003
VBAT ADC0/GPI0 67 AD_IINP 88
SUS_PWRGD_R SP3013 1 2 R0402 10UF/10V 0.1UF/16V 0.1UF/16V C3004 C3005
SUS_PWRGD 81,92

2
127 ADC1/GPI1 68 ALL_SYSTEM_PWRGD_R SP3021 1 2 R0402 10UF/10V 0.1UF/16V

2
121 VSTBY(PLL) ADC2/GPI2 69 ALL_SYSTEM_PWRGD 92
VRM_PWRGD_R SP3017 1 2 R0402
114 VSTBY5 ADC3/GPI3 70 VRM_PWRGD 80,92
VSTBY4 ADC4/GPI4 THERM_ALERT#_EC 74
92 71 SLP_SUS#_R SP3018 1 2 R0402 GND
VSTBY3 ADC5/DCD1#/GPI5 SLP_SUS# 22 +3VACC
50 72 SP3001
VSTBY2 ADC6/DSR1#/GPI6 WLAN_WAKE# 55
26 73 R3075 1 2 0Ohm 1 2 SP3002
+3VA_EC VSTBY1 ADC7/CTS1#/GPI7 VR_IMON 80 +3VS
@ 1 2
R0603

1
R0603

1
24 GND EC_AGND C3007
PWM0/GPA0 PWR_BLUE_LED# 65,66
25 C3006 0.1UF/16V

2
74 PWM1/GPA1 28 CHG_LED_BLUE# 66
+3VACC 0.1UF/16V

2
AVCC PWM2/GPA2 29 BAT_ORG_LED# 66
PWM3/GPA3 PWR_AMBER_LED# 65,66
11 30 EC_AGND
+3VS VCC PWM4/GPA4 FB_CLAMP_TGL_REQ# 74
31
PWM5/GPA5 USBP0_EN 61
32
PWM6/SSCK/GPA6 EC_SPKR 41
34
PWM7/RIG1#/GPA7 LCD_EC_PWM 37

108
R1.2 2012/11/08
RXD/SIN0/GPB0 109
LAN_PWR_ON# 33
follow MA50
TXD/SOUT0/GPB1 112
BT_ON_EC 55 For PU / PD
C 7 8 RN3004DLAD0 10 RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 PM_RSMRST# 22 +3VS C
21,43,65 LPC_AD0 5 47OHM
6 RN3004CLAD1 9 LAD0/GPM0
21,43,65 LPC_AD1 3 47OHM 4 RN3004BLAD2 8 LAD1/GPM1 56 +3VA_EC
KSO16 KSO16 48
21,43,65 LPC_AD2 1 47OHM 2 RN3004ALAD3 7 LAD2/GPM2 KSO16/SMOSI/GPC3 120 1 2 TP_CLK
RN3002A
21,43,65 LPC_AD3 47OHM 13 LAD3/GPM3 TMRI0/GPC4 57 KSO17 AC_IN_OC 74,88,90 3 4.7KOHM4 TP_DAT
KSO17 48 RN3002B
21 CLK_KBCPCI_PCH 6 LPCCLK/GPM4 KSO17/SMISO/GPC5 124 1 10KOhm 2 @ 3 4.7KOHM4
R3062 AC_IN_OC RN3003B SUSB_EC#
21,43,65 LPC_FRAME# LFRAME#/GPM5 TMRI1/GPC6 BAT1_IN_OC# 90 4.7KOHM2
22 16 RN3003A 1 SUSC_EC#
23,33,40,43,47,53,55,70 BUF_PLT_RST# 5 LPCRST#/GPD2 PWUREQ#/BBO/SMCLK2ALT/GPC7 ME_AC_PRESENT 22 1 2 47KOhm 4.7KOHM
R3004 BAT1_IN_OC#
21,43,65 INT_SERIRQ 1 2 R0402 15 SERIRQ/GPM6
SP3004
25,65 EXT_SMI# 1 2 R0402 23 ECSMI#/GPD4 18 1 10KOhm 2 PWR_SW#_M
SP3005 R3025 GND
20 EXT_SCI# 1 2 R0402 126 ECSCI#/GPD3 RI1#/GPD0 21 PM_SUSB# 22 1 2
SP3006 RN3001A SMB0_CLK
25 A20GATE 1 2 R0402 4 GA20/GPB5 RI2#/GPD1 33 PM_SUSC# 22 3 4.7KOHM 4 +3VS
SP3007 RN3001B SMB0_DAT
25 RCIN# 14 KBRST#/GPB6 GINT/CTS0#/GPD5 47 PM_PWROK 9,22,92 4.7KOHM
FAN0_TACH
47 EC_RST# WRST# TACH0A/GPD6 48 FAN0_TACH 49
1 TACH1A/TMA1/GPD7 USBP1_EN 61
T3013


R1.2 2012/11/06 48 KSI0 58 +3VS
59 KSI0/STB# 19 VSUS_ON_EC SP3003 1 2 R0402 R3017 1 10KOhm 2 A20GATE
48 KSI1 KSI1/AFD# L80HLAT/BAO/GPE0 VSUS_ON 63,81,91,93
48 KSI2 60 82
61 KSI2/INIT# EGAD/GPE1 83 SUSC_EC# 63,91 7 8 SMB1_DAT 1 10KOhm 2 RCIN#
48 KSI3 RN3001D R3018
62 KSI3/SLIN# EGCS#/GPE2 84 SUSB_EC# 22,23,63,91,92 5 4.7KOHM 6
48 KSI4 RN3001C SMB1_CLK
63 KSI4 EGCLK/GPE3 125 CPU_VRON 80 4.7KOHM 1 10KOhm 2
48 KSI5 R3060 FAN0_TACH
64 KSI5 PWRSW/GPE4 35 PWR_SW#_M 65
48 KSI6 KSI6 RTS1#/GPE5 RF_DET# 55
48 KSI7 65 17 R3055 1 2 10KOhm THERM_ALERT#_EC R3066 1 10KOhm 2 FB_CLAMP_TGL_REQ#
36 KSI7 LPCPD#/GPE6 20 LAN_WAKE# 1 LID_SW# 37,65
T3008
48 KSO0 37 KSO0/PD0 L80LLAT/GPE7 +3VA_EC
48 KSO1 38 KSO1/PD1
48 KSO2 KSO2/PD2
48 KSO3 39 106 RF_ON_R
40 KSO3/PD3 SSCE1#/FSCE1#/GPG0 107 FDIO2 PM_SUSB# R3006 1 2 100KOHM
48 KSO4 KSO4/PD4 FDIO2/DTR1#/SBUSY/GPG1/ID7
48 KSO5 41 100 1 T3006 PM_SUSC# R3007 1 2 100KOHM
42 KSO5/PD5 SSCE0#/GPG2 104 FDIO3 R3038 1 10KOhm 2 WLAN_WAKE#
48 KSO6 KSO6/PD6 FDIO3/DSR0#/GPG6
48 KSO7 43
44 KSO7/PD7 CPU_VRON R3009 1 2 100KOHM
48 KSO8 KSO8/ACK#
48 KSO9 45 93 EN_POC_PWR 1 T3003 R3061 1 10KOhm 2 IOAC_EN
46 KSO9/BUSY CLKRUN#/GPH0/ID0 94 PCH_FLASH_DESCRIPTOR
R3076 1 2 100KOHM
48 KSO10 KSO10/PE CRX1/SIN1/SMCLK3/GPH1/ID1 CHGCB0 61
48 KSO11 51 95
52 KSO11/ERR# CTX1/SOUT1/GPH2/SMDAT3/ID2 96 1 2 0Ohm USBP2_EN 61 1 10KOhm 2
48 KSO12 HSPI_CS R3056 R3064 RF_DET#
KSO12/SLCT HSCE#/GPH3/ID3 PCH_SPICS1# 21,28
48 KSO13 53 97 HSPI_CLK R3057 1 2 0Ohm PM_RSMRST# R3011 1 2 10KOhm @
54 KSO13 HSCK/GPH4/ID4 98 1 2 0Ohm PCH_SPICLK 21,28
48 KSO14 HSPI_SO R3058
55 KSO14 HMISO/GPH5/ID5 99 HSPI_SI 1 2 0Ohm PCH_SPISO 21,28 1 10KOhm 2 RF_DET#
48 KSO15 R3059 R3063
KSO15 HMOSI/GPH6/ID6 PCH_SPISI 21,28
AC_IN_OC is pulled high at power

119
22 ME_SUSPWRDNACK CRX0/GPC0
4 THRO_CPU
123
CTX0/TMA0/GPB2 R1.2 2012/11/08 VSUS_ON R3008 1 2 100KOHM
+3VSUS

88 BAT_LEARN
85
PS2CLK0/TMB0/CEC/GPF0
cost dwon 0ohm R3020 1 10KOhm 2 PM_PWRBTN#
86
55 WLAN_RST#_EC PS2DAT0/TMB1/GPF1 R1.2 2012/11/28
22 PM_PWRBTN#
T3009 1
87
88
eDP_ON#_EC PS2CLK1/DTR0#/GPF2 change to 33ohm for Intel check list +3VSUS
R3065 1 10KOhm 2 @ LAN_PWR_ON# R1.2 2012/12/05
48 TP_CLK
89 PS2DAT1/RTS0#/GPF3
PS2CLK2/GPF4 R1.2 2012/12/07 R3065 changed to @
90 R3053 2 @ 1 100KOHM VSUS_ON +5VSUS
48 TP_DAT PS2DAT2/GPF5
B
110
R3056~R3059 are replaced by SP3014, SP3015, SP3019, SP3020 +3VA_EC
B
R3014 47KOhm


R1.2 2012/11/06 Battery
63,88
63,88
SMB0_CLK
SMB0_DAT
111 SMCLK0/GPB3 R1.2 2012/12/17 2 1 PWR_BLUE_LED# R1.2 2012/11/30
SMDAT0/GPB4
28,49,74 SMB1_CLK
115
116 SMCLK1/GPC1 SP3014, SP3015, SP3019, SP3020 are replaced by 0ohm R3054 1 2 10KOhm VSUS_ON R3027 47KOhm
2 @ 1 PWR_AMBER_LED#
cost down
Thermal sensor 28,49,74 SMB1_DAT SMDAT1/GPC2
25 H_PECI_EC H_PECI_EC 117 @
118 SMCLK2/PECI/GPF6 +5VA
VSUS_ON Default Pull High to +3VSUS @
1

+3VS_WLAN C3011
37 LCD_BACKOFF# SMDAT2/PECIRQT#/GPF7
+3VS_WLAN T3012 81
10PF/50V
49 CTL_FAN R3015 47KOhm
1 DAC5/RIG0#/GPJ5
@71,74,84 80 2 1 BAT_ORG_LED#
2

FB_CLAMP DAC4/DCD0#/GPJ4
1

81 USBCHG_EN 79
DAC3/TACH1B/GPJ3
1

R3040 55,81 IOAC_EN 78 @


DAC2/TACH0B/GPJ2 R3022 47KOhm
10KOhm R3041 21,28 SPI_HOLD#_IO3 R3044 1 0Ohm 2 SPI_HOLD#_IO3_R 77
2 1
HDIO3/GPJ1 CHG_LED_BLUE#
10KOhm 21,28 SPI_WP_IO2 R3042 1 0Ohm 2 SPI_WP_IO2_R 76
TACH2/HDIO2/GPJ0
2

@
55 RF_ON mSATA_PWR_ON#
2

PCH_FLASH_DESCRIPTOR 128 1 C3008 0.1UF/16V


CK32K/GPJ6 VSS1 LAN_PWR_ON#
3

20 PCH_FLASH_DESCRIPTOR R3079 1 @ 2 0OhmSCLCDP_EC_R


2 12 1 2
61 SCLCDP_EC CK32KE/GPJ7 VCORE GND
Q3001B 27
UM6K1N 5 VSS2 49
GND AUD_PWR_ON#
R1.2 2012/11/08 VSS3 91 CAMERA_PWR_ON#
4

R1.2 2012/11/08 VSS4


6

cost dwon 0ohm SCE# 101 113 ODD_PWR_ON#


cost dwon 0ohm 105 FSCE# VSS5 122
Q3001A R1.2 2012/12/04SCK FSCK VSS6
UM6K1N 2 RF_ON_R R1.2 2012/11/28 remove R3016 SI 102
103 FMOSI 75
change back to 0ohm SO
EC_AGND
1

FMISO AVSS
R1.2 2012/12/06
R3042, R3044 are replaced by SP3008, SP3012 IT8528E/AX
GND GND R1.2 2012/12/17 06V380000016
R3035 2 1 0Ohm SP3008, SP3012 replaced by 0ohm

Cload=12.5PF
place close to EC
+3VA_EC +3VA_EC_SPI

D3001@
1
3

Share ROM non-Share ROM 2

0.8V/0.2mA
07V030000001
R3039 1 2 0Ohm

A A
+3VA_EC_SPI +3VA_EC_SPI
R1.2 2012/11/28
follow Intel design guide R1.2 2012/11/28
+3VA_EC_SPI
2

follow Intel design guide


1

+3VA_EC_SPI
R1.2 2012/11/08 R3071
C9201 R3070 R1.2 2012/11/08
cost dwon 0ohm 1KOhm
0.1UF/16V 1KOhm cost dwon 0ohm
2

R1.2 2012/11/28 R1.2 2012/11/28


1

change back to 0ohm R3013 R3001 C3010


1

change back to 0ohm


1

U3003 3.3KOhm 3.3KOhm 0.1UF/16V


SCE# R3069 2 1 0Ohm SCE#_S 1 8
2

SO R3029 15Ohm SO_S 2 CS# VCC 7 ROM_HD#_S R30731 2 0Ohm FDIO3


@
1

DO(IO1) HOLD#/RESET#(IO3)
FDIO2
R3072
1 2 ROM_WP#_S 3
4 WP#(IO2) CLK
6
5
SCLK_S
SI_S
R3030
R3067
15Ohm
15Ohm
SCK
SI SCE# R3068 2 @ 1 0Ohm @
SCE#_nonS
U3002
1 8 @ Title : ITE8528E
0Ohm GND DI(IO0) 2 CE# VCC 7
SO R3031 SO_nonS
15Ohm ROM_HD#_nonS Engineer: Wing_Cheng
W25Q32FVSSIQ ROM_WP#_nonS 3 SO HOLD# 6 SCK_nonS 15Ohm R3016 SCK BU2/RD3
05V000000022 @ 4 WP# SCK 5 SI_nonS 15Ohm R3023 SI Size Project Name Rev
GND SIO
(32Mb) @
PM25LD010C-SCE @
Custom VA70_HW 1.0
(128KB) Date: Friday, January 18, 2013 Sheet 30 of 96
@
need to check ROM P/N GND

5 4 3 2 1
5 4 3 2 1

Close to LAN chip within 250mils

PCIE_RXP3_LOM C3315 2 1 0.1UF/10V +VDD1.2_LAN


PCIE_RXP3_LAN 24
PCIE_RXN3_LOM C3314 2 1 0.1UF/10V
PCIE_RXN3_LAN 24
+VDD1.2_LAN

1
C3307 C3304 C3305 L3301
PCIE_TXP3 C3310 +VDD_GPHYPLL 1 2
PCIE_TXP3_LAN 24 0.1UF/10V 0.1UF/10V 0.1UF/10V
PCIE_TXN3 4.7UF/6.3V

2
PCIE_TXN3_LAN 24

1
C3321 1KOhm/100Mhz
C3320
0.1UF/10V 4.7UF/6.3V 09V010000038
CLK_PCIE_LAN

2
CLK_PCIE_LAN 21
CLK_PCIE_LAN#
CLK_PCIE_LAN# 21

D D
+VDD1.2_LAN
L3304 R1.2 2012/10/29
+VDD1.2_LAN
VDDC LX pin 46~48 has been connected
together. +VDD33_LOM L3307
1

C3301 C3308 4.7UH +3VS +VDD_LANPLL 1 2


09V030000084
0.1UF/10V
10UF/6.3V Irat=1.2A 1KOhm/100Mhz
2

1
C3322 C3323 09V010000038
34 LED_BLINKINGn
R3303
0.1UF/10V
1KOhm 4.7UF/6.3V
34 LED_LINKn

2
Frank

2
0503 LAN_LPWR is not defined GPIO in PCH .
L_TRDP3
L_TRDN3
34
34
R1.2-26 EMI
+VDD1.2_LAN

EEDAT
EECLK

AVDDL
VDDC
L3306

VDDO
AVDDL 1 2
R1.0 chnge VP P/N.

1
C3318 C3317 1.5KOhm/100Mhz
+VDD33_LOM

49
48
47
46
45
44
43
42
41
40
39
38
37
0.1UF/10V 4.7UF/6.3V 09V010000039
U3301
R1.2 2012/11/08

2
VMAIN_PRSNT
LINKLED#
SPD100LED#
SPD1000LED#
TRAFFICLED#

VDDC3

AVDDL3
VDDO
GND

TRD3_N
EECLK
EEDATA

TRD3_P
cost dwon 0ohm
1 0Ohm @1
T3301 R3308 2 LAN_LPWR_R 1 36 AVDDH R1.1 10/31 EMI CHANGE
BUF_PLT_RST# R3312 1 @ 2 4.7KOhm 2 LOW_PWR AVDDH2 35
23,30,40,43,47,53,55,70 BUF_PLT_RST# PERST# TRD2_N L_TRDN2 34
SP3302 1 2 R0402 3 34
1 2 21 CLK_REQ4_LAN# 4 CLKREQ# TRD2_P 33 L_TRDP2 34
PCIE_WAKE#_LAN R3311 4.7KOhm PCIE_WAKE#_LAN AVDDL
5 WAKE# AVDDL2 32 +VDD33_LOM
6 MODE TRD1_P 31 L_TRDP1 34
R1.1 IOAC 10/31 VDDC
7 VDDC1 TRD1_N 30 L_TRDN1 34
+VDD33_LOM AVDDH L3302
VREGPNP_CTL AVDDH1

PCIE_REFCLK_N
PCIE_REFCLK_P
PCIE_PLLVDDL1

PCIE_PLLVDDL2

GPHY_PLLVDDL
NB_R0603_32MIL_SMALL +VDD1.2_LAN 8 29 AVDDH 1 2
SR_VFB TRD0_N L_TRDN0 34
SP3301 1 2 SR_VDD 9 28

PCIE_RXD_N
PCIE_RXD_P
PCIE_TXD_N
L_TRDP0 34

PCIE_TXD_P
10 SR_VDD TRD0_P 27 AVDDL 1KOhm/100Mhz

XTALVDDH

1
LX 11 SR_VDDP AVDDL1 26 RDAC R3302 1 2 1.24KOhm C3313 C3312

1
SR_LX RDAC 09V010000038
XTALI 12 25 BIASVDD

VDDC2
1

XTALO
C3302 C3316 XTALI BIASVDDH 10V220000198 0.1UF/10V 0.1UF/10V

2
4.7UF/6.3V

2
0.1UF/10V

2
R3301
X3301 25MHZ BCM57780A0KMLG

13
14
15
16
17
18
19
20
21
22
23
24
XTALO 1 2 XTALO_R 1 3 XTALI 02V0H0000001

+VDD33_LOM

+VDD_GPHYPLL
200Ohm XTALO

VDDC

+VDD_LANPLL

+VDD_LANPLL
2

XTALVDD L3303
XTALVDD 1 2
C C3309 C3325 C

1
15PF/50V 15PF/50V C3324 1KOhm/100Mhz

PCIE_RXN3_LOM
PCIE_RXP3_LOM

CLK_PCIE_LAN#
1AV200000005 1AV200000005 09V010000038

CLK_PCIE_LAN
0.1UF/10V

2
PCIE_TXN3
PCIE_TXP3
R1.1 +VDD33_LOM
change value for -R test report +VDD33_LOM
+VDD33_LOM

L3305
BIASVDD 1 2

1
C3303

1
C3319 1KOhm/100Mhz
R3305 R3304
1KOhm 1KOhm 0.1UF/10V 0.1UF/10V 09V010000038

2
@

2
U3302
8 1

1
7 VCC A0 2
EECLK 6 WP A1 3
@ 5 SCL A2 4
EEDAT
SDAGND

2
AT24C02C-XHM-T
R3307 R3306 05V020000003
1KOhm 1KOhm
@ @

1
Title : LAN_RTL8411
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Wing_Cheng
Size Project Name Rev
D VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 33 of 96

B B

R1.2 2012/10/29
For LAN power control on S5 state option changed from /ABCT
R3315
1 2

0Ohm
10V440000001
@
+3VSUS +VDD33_LOM
R1.1 10/31 EMI CHANGE
L3308
1 2

2 S
D
3
SI2304BDS-T1-GE3 1.5KOhm/100Mhz

1
Q3301 C3306

1
09V010000039
/TP1_LAN
+12VSUS C3311 0.1UF/10V

2
4.7UF/6.3V

2
2
R3313
R3314 10KOhm
100KOhm
/TP1_LAN

1
3

1
D

G
Q3302 PCIE_WAKE#_LAN

S 2
1 22,53 PCIE_WAKE#

D
30 LAN_PWR_ON#

1
G 2N7002 R1.1 IOAC 10/31
2 S C3355 2N7002
1UF/25V Q3303

2
1AV300000031 @
0Ohm 1
/TP1_LAN R3309 2
/TP1_LAN

A A

5 4 3 2 1
5 4 3 2 1

FAE suggestion 1003

Co-Layout
LU3401

L_TXP_T 2 23 L_TXP
33 L_TRDP0 C3410 TD1+ MX1+
D D
2 1 1 24 L_CMT0
TCT1 MCT1
L_TXN_T 3 22 L_TXN
33 L_TRDN0 0.1UF/16V TD1- MX1-

L_RXP_T 5 20 L_RXP
33 L_TRDP1 C3409 TD2+ MX2+
2 1 4 21 L_CMT1
TCT2 MCT2
L_RXN_T 6 19 L_RXN
33 L_TRDN1 0.1UF/16V TD2- MX2-

L_TRLP2_T 8 17 L_TRLP2
33 L_TRDP2 C3408 TD3+ MX3+
2 1 7 18 L_CMT2
TCT3 MCT3
L_TRLM2_T 9 16 L_TRLM2
33 L_TRDN2 0.1UF/16V TD3- MX3-

L_TRLP3_T 11 14 L_TRLP3
33 L_TRDP3 C3407 TD4+ MX4+
2 1 10 15 L_CMT3 R3401 1 2 75Ohm
TCT4 MCT4
L_TRLM3_T 12 13 L_TRLM3
33 L_TRDN3 0.1UF/16V TD4- MX4-
EMI suggest to change 0805 size 0921
09V120000003 GST5009

1
C3403
1500PF/2KV

2
C C
D3401
EMI Req @

1 2

LAN_GND
AZ2025-01H.R7G
R3402 1 2 0Ohm

10PF/50V 2 1 C3404

10PF/50V 2 1 C3405

10PF/50V 2 1 C3406 +VDD33_LOM 510Ohm 1 2 R3405 LED_LINKn


LED_LINKn 33

1
C3402
1
LAN_GND
R1.2 2012/11/08 470PF/50V
SP3401

2
cost dwon 0ohm @
NB_R0402_20MIL_SMALL
R1.2 2012/12/04
change short pin size LAN_GND
2

B B
10

13
LAN_GND
9

P_GND1 LAN_JACK_8P
G
L_TXP 1
+VDD33_LOM L_TXN 2
L_RXP 3
L_TRLP2 4
L_TRLM2 5
L_RXN 6
R1.2 2012/11/08 L_TRLP3 7
2

P_GND2

cost dwon 0ohm L_TRLM3 8


SP3402
R1.2 2012/12/04
Y
NB_R0402_20MIL_SMALL
change short pin size CON3401
11

12

14

12V23GBSD009
1

R3404 1 2 510Ohm
LED_BLINKINGn 33
1
@ C3401
470PF/50V Close Connector
2

LAN_GND

LAN_GND

A A

<Variant Name>

Title : RJ45/ RJ11


BG1-CSC-HW R&D Dept.5 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 34 of 96
5 4 3 2 1
5 4 3 2 1

R1.2 2012/10/29
All components options changed from /non_FDI
R1.2 2012/12/06
remove U3501 for GDDR5
D D

C C

B B

A <Variant Name> A

Title : DP to VGA
BG1-CSC-HW R&D Dept.5 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 35 of 96

5 4 3 2 1
5 4 3 2 1

D D

C C

B B

Initial Code EEPROM

A A

Title : LVDS CONN


BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 36 of 96

5 4 3 2 1
A B C D E

LVDS LVDS/eDP control signal


LVDS/EDP pin LVDS/EDP pin
1 1
CH A
LCD_BACKOFF LCD_BACKEN_PCH 23
LCD_VDD_EN LCD_VDD_EN_PCH 23

LCD_BL_PWM LCD_BL_PWM_PCH 23

CH B
+EDP_VCC

2
D3704
R3704 1 2
LCD_BACKOFF# 30
10KOhm
RB751V-40
D3701

1
2
LID_SW# 30,65
3
1 LCD_BACKOFF

2
1V/0.1A
R3712
100KOhm

2 BACK_EN_C 2

1
1
C3706

100PF/50V

2
@

1kOhm/100Mhz
L3703 1 2
LCD_EC_PWM 30
@ Irat=300mA

LCD_BL_PWM_C 2 L3702 1 0Ohm LCD_BL_PWM

R1.3 2013/1/210Ohm 2 @ 1 R3703 EDP_DISP_UTIL 4

1
C3707
L3702 is changed to 0ohm
100PF/50V

2
R1.2 2012/11/29
P/N changed to 12V37GBSM011
3 R1.2 2012/11/19 3

From CPU Pin mapping changed R1.2 2012/11/29

eDP DP_AUXP
DP_AUXN

DP_TXP0
C3716
C3717

C3722
1
1

1
2 0.1UF/10V
2 0.1UF/10V

2 0.1UF/10V
EDP_AUXP 4
EDP_AUXN 4

EDP_TXP0 4
R1.2 2012/11/15
Changing to 30pins+10pins
option changed from N/A
R1.2 2012/12/06
remove CON3704 for GDDR5
DP_TXN0 C3718 1 2 0.1UF/10V
EDP_TXN0 4
+EDP_VCC
DP_TXP1 C3724 1 2 0.1UF/10V EDP_TXP1 4
+3VS DP_TXN1 C3723 1 2 0.1UF/10V EDP_TXN1 4
1

R3724
0Ohm R1.2 2012/11/26
prevent +EDP_VCC voltage drop
2

+EDP_VCC_OUT 1
U3701
5
R1.2 2012/11/28
R1.2 2012/10/29

USB Camera
OUT IN SCL, SDA changed to +EDP_VCC
2 option changed from /non_FDI R1.2 2012/11/30
LCD_VDD_EN 3
GND

EN DSG
4 +EDP_VCC_R 2
R3701
1+EDP_VCC_OUT R1.2 2012/12/06
remove C3727~C3730 for GDDR5
HPD CON3704 pin8 chaged to NC
G5244T11U 150Ohm +3V_CMOS L3705
2

31
+VCCIO_OUT 120Ohm CON3703
R3713
1 2 +3V_CMOS_C 1

SIDE1
100KOhm Irat=500mA USBP8-_E 2 1
1

2
C3701 C3702 2 +3V
USBP8+_E 3

1
4 1UF/6.3V @ C3732 4

1
C3733 4 3
1

4.7UF/6.3V 1AV200000038 R3719 R3706 0Ohm RN3711A


CPU 5 4 22PF/50V
2

1
10KOhm 5 1 2 1 0Ohm 2
0.1UF/16V ANALOG 6 33
@
HPD low active

2
INT_MIC_AC_IN 7 6 SIDE3 @
41 INT_MIC_AC_IN 7 USBP8-_E
8 24 USB_PN8
2
DP_TXN1 9 8

1
9 L3704
4 EDP_HPD# Q3701 DP_TXP1 10 +3VS +3V_CMOS
10 90Ohm/100Mhz
3 2N7002 11
D DP_TXN0 12 11
12 R3707
DP_TXP0 13 34

4
13 SIDE4 1 2 USBP8+_E
14 24 USB_PP8
1 DP_HPD_C 14
DP_AUXP 15
G 15 0Ohm 3 0Ohm 4
S 2 DP_AUXN 16

1
+AC_BAT_SYS 16 C3731
D3703 17
1

17 RN3711B 22PF/50V @
18
L3701 R3720 +EDP_VCC 18 @
19

2
80Ohm/100Mhz 1 2 100KOhm 19
T3701 1 BIST 20
2 1 AC_INV 20
21
22 21
2

DP_HPD_C
1

Irat=2A C3708 C3709 C3721 @ 22


AZ2025-01H.R7G BACK_EN_C 23
@ 39PF/50V 23
@ LCD_BL_PWM_C 24
0.1UF/25V 0.1UF/25V 1AV200000014 24
25
2

@ 2 1 10PF/50V 25
26 35
C3726 AC_INV 27 26 SIDE5
AC_INV 28 27
28

SIDE2
AC_INV 29
SP3702 29
AC_INV 30
ANALOG 1 2 R0402 30
A_GND
WTOB_CON_30P

32
12V37GBSM007

+3VS D3702
+EDP_VCC AZ2025-01H.R7G @ R1.2 2012/11/20
5
INT_MIC_AC_IN 1 2 P/N changed 5

C3710
C3719 0.1UF/10V C3720
39PF/50V 1AV200000024 39PF/50V
1AV200000014 1AV200000014
@ @

Title : LVDS CONN


BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Monday, January 21, 2013 Sheet 37 of 96
A B C D E
5 4 3 2 1

DAC_R 1 2 V_RED_J L3801 1 2 75Ohm/100Mhz RED


23 DAC_R_PCH
JP3801 SHORT_PIN
09V010000050
DAC_G 1 2 V_GREEN_J L3802 1 2 75Ohm/100Mhz GREEN
23 DAC_G_PCH
JP3802 SHORT_PIN
09V010000050
D D
DAC_B 1 2 V_BLUE_J L3803 1 2 75Ohm/100Mhz BLUE
23 DAC_B_PCH
JP3803 SHORT_PIN
09V010000050

DDC2BD_5 R3814 1 2 0Ohm DDC2BD_S

R1.2 2012/10/29 HSYNC_CRT R3804 2 1 0Ohm HSYNC

option changed from /non_FDI VSYNC_CRT R3805 2 1 0Ohm VSYNC


R1.2 2012/12/06 DDC2BC_5 R3815 1 2 0Ohm DDC2BC_S
remove R3837, R3838 for GDDR5
+5VS

1
1

2
R1.2 2012/10/29 D3804
R3801
150Ohm
R3802
150Ohm
R3803
150Ohm
C3801 C3802 C3803 C3804 C3805 C3806 C3807 C3808 C3809 C3810

option changed from /FDI RB751V-40 1% 1% 1% 10PF/50V10PF/50V10PF/50V 10PF/50V10PF/50V10PF/50V12PF/50V6.8PF/50V6.8PF/50V12PF/50V

1
R1.2 2012/12/19

2
+3VS

2
option changed from /non_RETINA +5VS_CRT

1
R3806 R3807
Q3801A 2.2KOhm 2.2KOhm

2
C UM6K1N C

1 R3833

2
5
2 DDC2BD 1 6 DDC2BD_5
23 DDC2BD_PCH 0Ohm
1 R3834 2 DDC2BC 4 3 DDC2BC_5
23 DDC2BC_PCH 0Ohm
Q3801B
UM6K1N

The LC filter circuit(NV DSC only)


CON3801
16 DDC:L=27nH,C=12PF
DDC2BC_S 15 5 CRT_IN#_EC_CON
HSYNC/VSYNC:L=27nH,C=47PF
R1.2 2012/10/29 10 RGB:L=100nH,C=10PF

1
option changed from /non_FDI_@ VSYNC 14
9
4
R3822
R1.2 2012/12/06
remove R3825, R3826, R3835, R3836 for GDDR5 HSYNC 13 3 BLUE 0Ohm
8
DDC2BD_S 12 2 GREEN

2
7

DDC2BD_S
VSYNC
11 1 RED +5VS
6

U3801
B B
3 4 HSYNC_CRT
R3824 1 2 0Ohm DAC_HSYNC 2 GND Y 17
23 DAC_HSYNC_PCH A

4
1 5
OE# Vcc
R1.2 2012/10/29 74AHCT1G125GW
D_SUB_15P D3801
CM1293_04SO
option changed from /FDI 06V030000010 +5VS_CRT
12V10GBRD012
@

R1.2 2012/12/19 U3802


option changed from /non_RETINA 1
OE# Vcc
5
R3823 1 2 0Ohm DAC_VSYNC 2
23 DAC_VSYNC_PCH A
3 4 VSYNC_CRT
GND Y
74AHCT1G125GW

3
06V030000010

DDC2BC_S
HSYNC
R1.2 2012/10/29
option changed from /non_FDI_@
R1.2 2012/12/06
remove R3825, R2826, R3835, R3836 for GDDR5

A A

Title : CRT
BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 38 of 96
5 4 3 2 1
5 4 3 2 1

4 HDMI_CLKP_PCH C3908 1 2 0.1UF/16V HDMI_CLKP

4 HDMI_CLKN_PCH C3910 1 2 0.1UF/16V HDMI_CLKN

4 HDMI_TXP0_PCH C3909 1 2 0.1UF/16V HDMI_TXP0

4 HDMI_TXN0_PCH C3911 1 2 0.1UF/16V HDMI_TXN0

4 HDMI_TXP1_PCH C3904 1 2 0.1UF/16V HDMI_TXP1

4 HDMI_TXN1_PCH C3905 1 2 0.1UF/16V HDMI_TXN1

4 HDMI_TXP2_PCH C3906 1 2 0.1UF/16V HDMI_TXP2

4 HDMI_TXN2_PCH C3907 1 2 0.1UF/16V HDMI_TXN2


D D

2 R3914

2 R3917

2 R3913

2 R3911

2 R3916

2 R3912

2 R3910

2 R3915
Close to connector and do T routing

R3910,R3911,R3912,R3913,R3914,R3915,R3916,R3917
Intel design guide : 680ohm /UMA

680OHM 1

680OHM 1

680OHM 1

680OHM 1

680OHM 1

680OHM 1

680OHM 1

680OHM 1
NV reference schematics : 499ohm /DGPUO
R1.2 2012/12/03
L3901~L3904 are changed to 90ohm for layout to change footpring
0ohm are removed cause they can't co-lay with new footprint
R1.2 2012/12/04 3
D
L3903, L3902 pin mapping changed Q3902
Add RN3901~RN3904 for layout +5VS
1
2N7002
EMI solution
G
R1.2 2012/12/11 2 S N/A
changed to 45ohm HDMI_CLKP R3922 1 @ 2 220Ohm HDMI_CLKN
R1.3 2013/1/15 GND 10V220000339
changed to 67ohm
HDMI_TXN0 1
@
2 RN3903A HDMI_TXN0_CON HDMI_TXN2 1
@
2 RN3901A HDMI_TXN2_CON HDMI_TXP0 R3923 1 @ 2 220Ohm HDMI_TXN0
R1.3 2013/1/16 0Ohm 0Ohm
10V220000339
L3901~L3904 are swaped HDMI_TXP1 R3924 1 @ 2 220Ohm HDMI_TXN1
10V220000339

HDMI_TXP2 R3925 1 @ 2 220Ohm HDMI_TXN2


4

3
10V220000339
L3904 L3901
67ohm 67ohm
N/A N/A
EMI suggestion 0922
1

2
09V090000007 09V090000007
EMI suggestion 0922
C C

@ @
HDMI_TXP0 3 4 HDMI_TXP0_CON HDMI_TXP2 3 4 HDMI_TXP2_CON
0Ohm 0Ohm
RN3903B RN3901B

@ @
HDMI_CLKP 3 4 RN3904B HDMI_CLKP_CON HDMI_TXP1 3 4 RN3902B HDMI_TXP1_CON
0Ohm 0Ohm

HDMI_SCL & HDMI_SDA : no via , trace length should be as short as possible


EMI suggestion 0922 EMI suggestion 0922
1

2
1

L3902
L3903
67ohm
67ohm
N/A
4

N/A
4

09V090000007
09V090000007

@ @
HDMI_CLKN 1 2 HDMI_CLKN_CON +12VS HDMI_TXN1 1 2 HDMI_TXN1_CON 12V12GBRD001

20
22
0Ohm 0Ohm
RN3904A RN3902A HDMI_CON_19P
1

P_GND1
P_GND3
G

F3901
2 1 +5VS_HDMI
2 S

+5VS
D

HDMI_TXP2_CON 1
0.35A/6V 1
NDS351AN_NL HDMI_TXN2_CON 3 2
5 3 2 4 HDMI_TXP1_CON
Q3901 5 4
2

C3901 HDMI_TXP0_CON 7 6 HDMI_TXN1_CON


D3902 HDMI_TXN0_CON 9 7 6 8
0.1UF/25V 11 9 8 10 HDMI_CLKP_CON
1V/0.1A
1

+3VS 13 11 10 12 HDMI_CLKN_CON
RN3905,RN3906 HDMI_SCL 15 13 12 14
17 15 14 16 HDMI_SDA
Intel design guide:2.2K ohm /UMA
1

HDMI_HPD_CON 19 17 16 18 +5VS_HDMI
19 18
B NV reference schematics:4.7K ohm /DGPUO B

P_GND2
P_GND4
4
2

RN3905B RN3905A RN3906A RN3906B


2.2KOhm 2.2KOhm 2.2KOhm 2.2KOhm
CON3901

21
23
+3VS
3
1

HDMI_CLKP_CON

11KOhm HDMI_CLKN_CON
2

23 HDMI_DDC_CLK_PCH HDMI_SCL_PCH 1 6 HDMI_SCL


23 HDMI_DDC_DATA_PCH HDMI_SDA_PCH 4 3 HDMI_SDA
Q3904A
UM6K1N Q3904B
UM6K1N
5

11KOhm
C3903 C3902
+3VS 10PF/50V 10PF/50V
@ @
2

@
2

R39212
R3920
R1.0 0106
HDMI HPD Cost Reduced Level Shifter Design Recommendation

HDMI_HPD 1 2 HDMI_HPD_CON
23 HDMI_HPD_PCH R3902 4.7KOhm
EMI solution
3

D3901 R3918
1.25V/0.15A 10KOhm
2
2

A A

+3VS

Title : HDMI
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Wing_Cheng
Size Project Name Rev
Custom VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 39 of 96
5 4 3 2 1
5 4 3 2 1

From System's PCIE interface


PCIE_TXP1_CR +3VS
24 PCIE_TXP1_CR
16,17,20,21,22,23,25,26,27,28,30,33,37,38,39,41,43,47,48,49,53,55,60,63,65,66,91,92 +3VS
PCIE_TXN1_CR GND
24 PCIE_TXN1_CR CON4001

4
PCIE_RXP1_CR

NP_NC1

P_GND2
24 PCIE_RXP1_CR

24 PCIE_RXN1_CR PCIE_RXN1_CR
D D
CLK_PCIE_CR_PCH
21 CLK_PCIE_CR_PCH P20 P40
SD_D2
21 CLK_PCIE_CR#_PCH
CLK_PCIE_CR#_PCH R1.2 2012/11/08 P19 SD_DAT2 XD_GND2 P39 XD_CD#
MS_VSS(GND)2 XD_CD
CLK_REQ1_CR#
cost dwon 0ohm SD_D3 P18
P17 SD_DAT3/MMC_RSV XD_R/XD_B
P38
P37
XD_RDY
XD_RE#
21 CLK_REQ1_CR# SP4001 1 +3V_CARD MS_VCC XD_RE
MS_CLK 2 R0402 MS_CLK_R P16 P36 XD_CE#
BUF_PLT_RST# SD_CMD P15 MS_SCLK XD_CE P35 XD_CLE
23,30,33,43,47,53,55,70 BUF_PLT_RST# SD_CMD/MMC_CMD XD_CLE

1
C4013 C4011 MS_D3 P14 P34 XD_ALE
10PF/50V 10PF/50V MS_INS# P13 MS_DATA3 XD_ALE P33 XD_WE#
@ @
P12 MS_INS XD_WE P32 XD_WP#

2
MS_D2 P11 SD_VSS/MMC_VSS1 XD_WP P31
P10 MS_DATA2 XD_GND1 P30 XD_D0
+3V_CARD SD_VDD/MMC_VDD XD_D0
MS_D0 P9 P29 XD_D1
SD_CLK SP4002 1 2 R0402 SD_CLK_R P8 MS_SDIO/DATA0 XD_D1 P28 XD_D2
MS_D1 P7 SD_CLK/MMC_CLK XD_D2 P27 XD_D3
MS_DATA1 XD_D3

1
C4014 C4010 MS_BS P6 P26 XD_D4
10PF/50V 10PF/50V P5 MS_BS XD_D4 P25 XD_D5
@
@ SD_CD# P4 MS_VSS(GND)1 XD_D5 P24 XD_D6

2
SD_D0 P3 SD_CD XD_D6 P23 XD_D7
C4019 0.1UF/16V SD_D1 P2 SD_DAT0/MMC_DAT XD_D7 P22
SD_DAT1 XD_VCC +3V_CARD
2 1 SD_WP P1 P21
GND SD_WP SD_VSS/MMC_VSS2/GND_FOR_CD/WP
T4010

CLK_REQ1_CR#
BUF_PLT_RST#
GND 1 1% 2 T4009

P_GND1

NP_NC2
R4019 T4005
RES 6.2K OHM 1/16W (0402) 1% T4008

MS_INS#
SD_CD#
SP15
SP14
10V220000088

+3VS

1
1
1
1
CARD_READER_40P

2
12V34GBSM002

48
47
46
45
44
43
42
41
40
39
38
37
U4000

3V3_IN2
CLK_REQ#
PERST#

MS_INS#
SD_CD#
SP15
SP14
GPIO/EEDI
RREF

EEDO
EECS
EESK
PCIE_TXP1_CR 1 36 SP13 GND
PCIE_TXN1_CR 2 HSIP SP13 35 SP12 GND GND
CLK_PCIE_CR_PCH 3 HSIN SP12 34 SP11
C C
C4016 CLK_PCIE_CR#_PCH 4 REFCLKP SP11 33 SP10
4.7UF/6.3V 1 2 AV12 5 REFCLKN SP10 32 SP9
C4012 0.1UF/16V GND AV12 SP9
PCIE_RXP1_CR 1 2 HSOP_R 6 31 SP8 4.7UF/6.3V C4021
PCIE_RXN1_CR 1 2 HSON_R 7 HSOP SP8 30 SP7
HSON SP7 1 2
0.1UF/16V 8 29 SP6
C4009 GND
1 2 DV12 9 GND1 SP6 28 SP5
SD/MMC/MMC plus/MS/xD
0.1UF/16V 10 DV12 SP5 27 DV12_S 1 2
+3V_CARD C4007 GND
+3VS 11 Card1_3V3 DV12_S 26
12 3V3_IN1 GND3 25 SD_D2
trace width 40mils C4022 0.1UF/16V

SD_CMD
Card2_3V3 SD_D2
DV33_18
1

SD_CLK
xD_CD#

C4006
SD_D1
SD_D0

SD_D3
+3V_CARD
GND2

C4008
10UF/10V
SP1
SP2
SP3
SP4

0.1UF/16V C4008 C4002 SD CARD CAP


2

C4003 MS CARD CAP


RTS5209-GR C4004 XD CARD CAP
13
14
15
16
17
18
19
20
21
22
23
24

GND GND

1
Part number:020J-007D000 C4023
C4002 C4003 C4004
10UF/10V
0.1UF/16V 0.1UF/16V 0.1UF/16V
SD_CMD
DV33_18
XD_CD#

SD_CLK

2
SD_D1
SD_D0

SD_D3
SP1
SP2
SP3
SP4

AV12 1 2 DV12
R4001 0Ohm Close to connector
@ GND
C4024
C4020
2

@ Pin Name Description


4.7UF/6.3V

0.1UF/16V
1

SP1 SD_D7/XD_RDY SP1 SD_D7 XD_RDY

SP2 SD_D6/XD_RE# SP2 SD_D6 XD_RE#

SP3 SD_D5/XD_CE# SP3 SD_D5 XD_CE#

GND SP4 SD_D4/XD_WE# SP4 SD_D4 XD_WE#


B B

SP5 MS_BS/XD_CLE SP5 MS_BS XD_CLE

SP6 MS_D5/XD_ALE SP6 MS_D5 XD_ALE

SP7 MS_D1/XD_WP# SP7 MS_D1 XD_WP#

SP8 MS_D4/XD_D0 SP8 MS_D4 XD_D0

SP9 MS_D0/XD_D1 SP9 MS_D0 XD_D1

SP10 MS_D2/XD_D2 SP10 MS_D2 XD_D2

Remove Serial Flash SP11


SP12
MS_D6/XD_D3
MS_D3/XD_D4
SP11

SP12
MS_D6

MS_D3
XD_D3

XD_D4

SP13 MS_D7/XD_D5 SP13 MS_D7 XD_D5

SP14 MS_CLK/XD_D6 SP14 MS_CLK XD_D6


Reserve for BIOS boot function
SP15 SD_WP/XD_D7 SP15 SD_WP XD_D7

When EECS switch to be D3-Delink sideband signal, Serial Flash function is disabled. Share Pin
A A

Title : RTS5209
BG1/CSC/HW5 Engineer:
Wing_Cheng
Size Project Name Rev
C VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 40 of 96
5 4 3 2 1
5 4 3 2 1

+12VS +12VS +5VS +5VS 38,39,42,49,60,63,66,80,87,91


Intel 1.01 Design Guide update #440484
R1.3 use dual mosfet
+3VS +3VS 16,17,20,21,22,23,25,26,27,28,30,33,37,38,39,40,43,47,48,49,53,55,60,63,65,66,91,92

UM6K1N

2
@
Q4101A
Q4101B

5
6 1
UM6K1N
3 4
SP4104 1 2 R0402 ACZ_SYNC_AUD_R
20 ACZ_SYNC_AUD
SP4103 1 2 R0402 ACZ_SDOUT_AUD_R
20 ACZ_SDOUT_AUD

R1.2 2012/11/08
D R1.2 2012/11/08 cost dwon 0ohm D

cost dwon 0ohm


Moat
+5VS +5VS_AUDIO

B4102 1 2 80Ohm/100Mhz
Irat=2A vx_l0805_h43_small
+5VS +5VS_AMP

B4104 1 2 80Ohm/100Mhz
Irat=2A vx_l0805_h43_small
+3VS +3VS_DVDD >30 mil or shape
+5VS_AMP
B4101
1 2 Placement near audio codec
AVDD
120Ohm +5VS_AMP
Placement near audio codec
B4107

1
1 2 @ C4113
C4115 10UF/10V

H_SPKL+_M
H_SPKL-_M
H_SPKR+_M
H_SPKR-_M
+1.5VS
Moat
120Ohm 0.1UF/16V

2
1

2
C4108
B4108 10UF/10V C4102
1 2 0.1UF/16V

1
AVDD
120Ohm

1
C4103
C4101 10UF/10V
HeadPhone Out
0.1UF/16V

2
EXT MIC Vref.
42 MUTE_AMP#

LDO2_CAP
EXT MIC Vref.
GPIO COMBO MIC Vref.
A_GND INT MIC Vref.

+3VS_DVDD 1 2

C4118
2.2UF/10V

49
48
47
46
45
44
43
42
41
40
39
38
37
U4101A +3VS_DVDD
1

2
C4141

RSPDIF-OUT/GPIO2

PVDD2

PVDD1
AVDD2

AVSS2
SPK-OUT-R+

SPK-OUT-L+
GND

SPK-OUT-R-
SPK-OUT-L-
PDB

LDO2-CAP

CBP
10UF/10V C4110 C4111
C C4155 C
0.1UF/16V 0.1UF/16V
2

1
@ DIGITAL GND DIGITAL GND 1 2

0.1UF/16V
1 36
2 DVDD CPVDD 35 C4147
+3VS_DVDD 3 GPIO0/DMIC-DATA CBN 34 2.2UF/10V 1 2
4 GPIO1/DMIC-CLK CPVEE 33 AC_HP_R
5 DVSS HPOUT-R(PORT-I-R) 32 AC_HP_R 42
ACZ_SDOUT_AUD_R AC_HP_L
SDATA-OUT HPOUT-L(PORT-I-L) AC_HP_L 42
6 31
20 ACZ_BCLK_AUD 7 BCLK MIC1-VREFO-L 30 VREFOUT_A_E_L 42
LDO3-CAP MIC1-VREFO-R
1

C4126 1 R4105 2 22Ohm ACZ_SDIN0_R 8 29 MIC2_VREFO VREFOUT_A_E_R 42


20 ACZ_SDIN0_AUD 9 SDATA-IN MIC2-VREFO 28 C4116 1 2
A_GND
10UF/10V C4148 VREF_CODEC
10 DVDD-IO VREF 27 C4144 1 2
A_GND
0.1UF/16V ACZ_SYNC_AUD_R AUD_LDO_CAP 10UF/10V

LINE1-R(PORT-C-R)

LINE2-R(PORT-E-R)
2

SYNC LDO1-CAP

LINE1-L(PORT-C-L)
MIC1-R(PORT-B-R)

LINE2-L(PORT-E-L)
MIC2-R(PORT-F-R)
11 26 @ 10UF/10V

MIC1-L(PORT-B-L)
MIC2-L(PORT-F-L)
20,42 ACZ_RST#_AUD RESETB AVDD1 +5VS_AUDIO
12 25 @
PC_BEEP_R 1 R4103 2 PC_BEEP_C
C4114 2 1 1UF/6.3V PC_BEEP PCBEEP AVSS1

MONO-OUT
1

1
@ 47KOhm C4159 C4123 C4121 C4106 C4158
ANALOG GND
1

R4109 1 2 0Ohm C4150 22PF/50V 10UF/10V C4107 10UF/10V 0.1UF/16V C4104 10UF/10V

SenseA
SenseB
JDREF
R4106 0.1UF/16V 2.2UF/10V @
2

2
4.7KOhm 100PF/50V
2

D4101
ALC3225-CG
2

13
14
15
16
17
18
19
20
21
22
23
24
1
20 SB_SPKR
3 PC_BEEP_R
2 A_GND AUD_LDO_CAP
30 EC_SPKR 02V0J0000026

AUD_EXT_MIC_L
AUD_EXT_MIC_R
A_GND A_GND
R4104 1 1% 2 39.2KOhm
1V/0.2A HP Jack Detect 61 HP_JD#
R4101 1 1% 2 20KOhm
EXT MIC Detect 61 MIC_EXT_JD#

1
1 2 INT_MIC_AC_IN_L C4134 2 1 1UF/6.3V 2 R4114 1 1KOhm
R4108 0Ohm R4102 1 1% 2 20KOhm R4126
A_GND
@ 10KOhm
COMBO_MIC_IN_AC_E_L
COMBO_MIC_IN_AC_E_R
COMBO JACK MIC

2
INT_MIC_AC_IN_R C4135 2 1 1UF/6.3V 2 R4125 1 1KOhm
INT_MIC_AC_IN 37
JP4102 VREFOUT_A_E_L

1
1 2
VREFOUT_A_E_R C4136 @ C4154 @
SHORTPIN 1000PF/50V 1000PF/50V Frank

2
@ MIC2_VREFO 0503 Vender request
close codec IC
JP4101 AUD_LDO_CAP A_GND A_GND R1.2 2012/11/08
1 2 ACZ_BCLK_AUD
LDO2_CAP
cost dwon 0ohm R1.0 remove VG70 connector 0719
1

1
SHORTPIN C4105 C4145 C4142 C4117 R1.2 2012/12/18
1

B @ C4120 10UF/10V 10UF/10V 10UF/10V 10UF/10V B


22PF/50V @ @ @ U4101B short pin changed to 20 mil CON4101
2

2
1

C4160 50 6
2

@ 51 GND1 1 2 NB_R0402_20MIL_SMALL 1 GND2


JP4104 10UF/10V H_SPKL+_M SP4101 H_SPKL+
1 2 52 GND2 H_SPKL-_M 1
SP4102 2 NB_R0402_20MIL_SMALL
H_SPKL- 2 1
2

A_GND A_GND A_GND A_GND 53 GND3 H_SPKR+_M 1


SP4106 2 NB_R0402_20MIL_SMALL
H_SPKR+ 3 2
SHORTPIN 54 GND4 H_SPKR-_M 1
SP4105 2 NB_R0402_20MIL_SMALL
H_SPKR- 4 3
@ 55 GND5 4 5
A_GND 56 GND6 GND1
57 GND7
GND8 WTOB_CON_4P

C4131

C4109

C4112

C4143
ALC3225-CG 12V17ABSM000

1
A_GND 02V0J0000026

10PF/50V

10PF/50V

10PF/50V

10PF/50V
2

2
R4111 2.2KOhm
MIC2_VREFO 1 2

C4140 1 2 2.2UF/6.3V COMBO_MIC_IN_AC_E_R


R4112

AUD_EXT_MIC_L
AUD_EXT_MIC_R
1 2 C4139 1 2 2.2UF/6.3V COMBO_MIC_IN_AC_E_L
61 COMBO_MIC

1KOhm
2

R4124 22KOhm
GPIO 2 1 R4110
C4137 1000PF/50V
22KOhm 2 1
1

A_GND
C4156
1

10UF/6.3V
2

C4146 1 2 2.2UF/6.3V
MIC_IN_AC_E_R 42
A_GND A_GND C4119 1 2 2.2UF/6.3V
EXT MIC IN
MIC_IN_AC_E_L 42

C4138 1000PF/50V
2 1
A A_GND A

Title : CODEC-ALC3225
ASUSTeK COMPUTER INC. NB1
Engineer: Wing_Cheng
Size Project Name Rev
D VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 41 of 96

5 4 3 2 1
5 4 3 2 1

+5VS

+5VA

1
R4202
AMP De-Pop Control circuit

1
10KOhm
D D
R4201

2
100KOhm MUTE_AMP#
MUTE_AMP# 41
3

2
D
Q4201
1
G 2N7002
2 S

6
Q4202A
SP4201
UM6K1N
1 2 R0402 2
25 OP_SD#

1
3
Q4202B
SP4202
UM6K1N
20,41 ACZ_RST#_AUD 1 2 R0402 5

4
C C

GND

41 VREFOUT_A_E_R

41 VREFOUT_A_E_L

2
R4211 R4210
4.7KOhm 4.7KOhm

1
1 2
41 MIC_IN_AC_E_L MIC_IN_AC_E_L_J 61
R4207 1KOhm
1 2
41 MIC_IN_AC_E_R MIC_IN_AC_E_R_J 61
R4204 1KOhm

B B

R4205 1 2 51Ohm
41 AC_HP_R HP_JACK_R 61
R4206 1 2 51Ohm
41 AC_HP_L HP_JACK_L 61

A A

Title :AUDIO ALC269


BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
B VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 42 of 96
5 4 3 2 1
5 4 3 2 1

D D


R1.2 2012/11/30
follow MA50, 180
+3VS +3V +3VSUS

1
R4310 R4311
/TPM 0Ohm 0Ohm

PCH
12V162BSM003 @ /TPM
BTOB_CON_16P PCH

2
21,30,65 LPC_AD3 /TPM 2 0Ohm 1 R4307 LPC_AD3_TPM 8 9 /TPM 2 0Ohm
TPM_CLKRUN# 1 R4309 PM_CLKRUN# 22
/TPM 2 0Ohm 1 R4306 LPC_AD2_TPM 7 8 9 10 /TPM 2 0Ohm
TPM_RST# 1 R4308
21,30,65 LPC_AD2 7 10 BUF_PLT_RST# 23,30,33,40,47,53,55,70
21 LPCCLK 6 11
/TPM 2 0Ohm 1 R4305LPC_FRAME#_TPM 5 6 11 12
21,30,65 LPC_FRAME# 5 12
C
21,30,65 LPC_AD1 /TPM 2 0Ohm 1 R4304 LPC_AD1_TPM 4 13 C
/TPM 2 0Ohm 1 R4303 LPC_AD0_TPM 3 4 13 14
21,30,65 LPC_AD0 3 14
2 15
/TPM 2 0Ohm 1 R4302 INT_SERIRQ_TPM 1 2 15 16
21,30,65 INT_SERIRQ 1 16

LPCPDN_TPM
CON4301

1
C4301 C4302 C4303 C4304
@ @ @ @
GND
0.1UF/16V 1UF/6.3V 0.1UF/16V 1UF/6.3V

2
R4301
4.7KOhm
@
GND

+3VS

B B

A A

Title : TPM CONN


BG1-HW RD Div.2-NB RD Dept.5 Engineer: Wing_Cheng
Size Project Name Rev
B VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 43 of 96
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

SR-8
Del Entry audio circuit 0121-11

A A

Title : CODEC-ALC269
ASUSTeK COMPUTER INC. NB1
Engineer: Wing_Cheng
Size Project Name Rev
Custom VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 44 of 96
5 4 3 2 1
5 4 3 2 1

D D

C C

SR-8
Del Entry audio circuit 0121-11

B B

A A

Title : AUDIO ALC269


BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 45 of 96
5 4 3 2 1
5 4 3 2 1

Thermal Policy
+3VS
+3VS

D D

2
R4709
10KOhm R4706
@ 10KOhm

1
Q4703B Q4703A

6
UM6K1N UM6K1N
T4701
@ @
1 VGA_HOT# 5 2

1
R4705 1 /DGPU 2 0Ohm CPU_VGA_THERM#
74 VGA_OVERTEMP#

C C
R4702
49 PR_OVERTEMP# 1 2
0Ohm @

1 R4708 2
49 CPU_THERM#
0Ohm

+3VA_EC
NPCE795 has internal power-on reset circuit
Use 47k ohm to make sure that raising time of POR is less than 10us

1
2
UM6K1N R4704 2 1 47KOhm
Q4702A

6
D4702 2 1 1.2V/0.1A

1 R4703 2 2 1 1.2V/0.1A
92 FORCE_OFF# D4703 EC_RST# 30
0Ohm

1
B C4701 B
4.7UF/6.3V
3

Q4702B @

2
UM6K1N
5
4

23,30,33,40,43,53,55,70 BUF_PLT_RST#

+1.05VS +VCCIO_OUT 3
C
R4701 2 @ 1 330Ohm 1 B Q4701
PMBS3904
R4707 2 1 330Ohm E
2

4,25 H_THRMTRIP#

A A

+3VA_EC +3VA_EC 28,30

+3VS +3VS 16,17,20,21,22,23,25,26,27,28,30,33,37,38,39,40,41,43,48,49,53,55,60,63,65,66,91,92 Title : RST_Reset Circuit


BG1-HW RD Div.2-NB RD Dept.5 Engineer: Wing_Cheng
Size Project Name Rev
B VA70_HW 1.0
Date: Friday, January 25, 2013 Sheet 47 of 96
5 4 3 2 1
5 4 3 2 1

Touch Pad Button


Keyboard
12V18GWSM059 CON4801 N/A

C4818 1 2 10UF/10V FPC_CON_8P 1 KSO0


GND 1 KSO0 30
1 27 2 KSO1
+3VS 1 GND1 2 KSO1 30
TP_CLK 2 9 TP_CLK @ C4801 1 21000PF/50V 3 KSO2
30 TP_CLK 3 2 SIDE1 3 KSO2 30
TP_DAT TP_DAT @ C4802 1 21000PF/50V 4 KSO3
D 30 TP_DAT 4 3 4 KSO3 30 D
GND SMB_DAT_S @ C4803 1 21000PF/50V 5 KSO4
5 4 5 KSO4 30
SMB_CLK_S @ C4819 1 21000PF/50V 6 KSO5
16,17,28,53,55 SMB_DAT_S 6 5 6 7 KSO5 30
KSO6
16,17,28,53,55 SMB_CLK_S 7 6 10 7 8 KSO6 30
EXT_SCI#_R KSO7
7 SIDE2 8 KSO7 30
+3VS R4801 2 @ 1 10KOhm 8 GND 9 KSO8
8 9 10 KSO8 30
KSO9
CON4802 10 KSO9 30
+3VS 100KOhm 2 @ 1 R4802 11 KSO10


11 KSO10 30
R1.2
2012/11/08 12 KSO11

1
12 13 KSO11 30
R2.0 12/14 KSO12

G
GND
Q4801 TP 13 14 KSO13
KSO12 30
3

S 2
21 ELAN_ALERT# 14 KSO13 30
2N7002 15 KSO14
D

+3VS 15 16 KSO14 30
KSO15
16 KSO15 30
@ D4802 17 KSO16
17 18 KSO16 30
KSO17

SB5ELAN_ALERT#JM50EXT_SCI#
1 6 18 19 KSO17 30
TP_CLK TP_DAT KSI0
19 KSI0 30
I/O1 I/O4 20 KSI1
20 21 KSI2 KSI1 30
21 22 KSI2 30
KSI3
22 23 KSI3 30
KSI4
2 5 23 24 KSI4 30
KSI5
28 24 25 KSI5 30
GND VDD KSI6
GND2 25 26 KSI7 KSI6 30
26 KSI7 30

3 4 FPC_CON_26P
I/O2 I/O3 12V18ABSM001

CM1293_04SO
C
1218-00MW000 C

1 2 CN4801A KSO0
3 33PF/50V4
CN4801B KSO1
5 33PF/50V6
@ CN4801C KSO2
7 33PF/50V8 CN4801D KSO3
@
33PF/50V
1 @ 2 CN4802A KSO4
3 33PF/50V4 CN4802B
@ KSO5
5 33PF/50V6 CN4802C
@ KSO6
33PF/50V
7 @ 8 CN4802D KSO7
1 33PF/50V2 CN4803A
@ KSO8
33PF/50V4
3 @ CN4803B KSO9
5 33PF/50V6 CN4803C
@ KSO10
7 33PF/50V8 CN4803D
@ KSO11
33PF/50V
1 @ 2 CN4804A KSO12
3 33PF/50V4 CN4804B
@ KSO13
33PF/50V
5 @ 6 CN4804C KSO14
33PF/50V
7 @ 8 CN4804D KSO15
1 33PF/50V2 CN4805A
@ KSO16
33PF/50V
3 @ 4 CN4805B KSO17
5 33PF/50V6 CN4805C
@ KSI0
7 33PF/50V8 CN4805D
@ KSI1
B 33PF/50V B
1 @ 2 CN4806A KSI2
3 33PF/50V4
@ CN4806B KSI3
33PF/50V6
5 @ CN4806C KSI4
7 33PF/50V8 CN4806D
@ KSI5
33PF/50V
C4816 1@ 2 33PF/50V KSI6
C4817 1@ 2 33PF/50V KSI7
@
@

A A

Title : KB/ TP/ FLASH


BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 48 of 96

5 4 3 2 1
5 4 3 2 1

D D

Plam Rest Thermal Sensor +3VS_THEM +3VS


U5001 Close to CPU
PHILIP PMBS3904 R4901
+3VS 1 2
temp setting : 97 degree Pleace in the center

1
X5R is changed to X7R of Plamrest. 150Ohm
U4902 @ C4902
5 1 THERM_SET R4903 1 1% 2 17.4KOhm 0.1UF/16V

2
VCC SET 2 Palmrest_THRM_DA
GND @
1

C4904 4 3 CPU_THERM#
HYST OT# CPU_THERM# 47 @
0.1UF/10V R4906
G709T1UF U4903 1 R4908 2 0Ohm
SMB1_CLK 28,30,74
2

1 2 06V220000007 3 1 8 SMB1_CLK_Thermal
VCC SMBCLK

1
C 2 7 SMB1_DAT_Thermal 1 R4909 2 0Ohm
1 B DXP SMBDATA SMB1_DAT 28,30,74
Q4902 C4901 3 6 @
0Ohm PMBS3904 4 DXN ALERT# 5
2200PF/50V

2
E THERM# GND
Place near PCH 2 @
G781
@ @
Plamrest_THRM_DC
C C
PR_OVERTEMP# 47

U4903 under palmrest


SMBUS addr=1001100x (98)
U4903: Remote(Local) thermal sensor,use remote mode.

R1.2-10
R4907

FAN 2 1 0Ohm

2 1@
FAN0_TACH 30
1

D4901 SS0520 C4908


C4907
22PF/50V 100PF/50V
2

@
2

+5VS
B U4901 B
1 8
FON# GND4
4

CON4901 2 7
HOLD1 1 +5VS_FAN 3 VIN GND3 6
2 4 VO GND2 5
30 CTL_FAN VSET GND1
1

3
HOLD2 C4905 C4906 G991P11U
W TOB_CON_3P 2.2UF/10V 2.2UF/10V 06V520000001
5

12V17GISM046

A A

Title : THERMAL/ FAN


BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 49 of 96
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Realtek_RTS5138
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Wing_Cheng
Size Project Name Rev
C VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 50 of 96
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : USB3.0 uPD720200


BG1\HW1 Engineer: Wing_Cheng
Size Project Name Rev
C VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 51 of 96
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : PCIE NEW CARD


BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 52 of 96
5 4 3 2 1
5 4 3 2 1

PCIE/mSATA
Select PCIE or mSATA IF select mSATA(only +3VAUX)
R5320 1 @ 2 0Ohm PCIE_mSATA_C23 C5314 1 2 0.01UF/50V
24 PCIE_RXN6_mSATA SATA_RXP4 20
R5321 1 @ 2 0Ohm PCIE_mSATA_C25 C5315 1 2 0.01UF/50V
24 PCIE_RXP6_mSATA SATA_RXN4 20
D D
R5318 1 @ 2 0Ohm PCIE_mSATA_C31 C5316 1 2 0.01UF/50V
24 PCIE_TXN6_mSATA SATA_TXN4 20
R5319 1 @ 2 0Ohm PCIE_mSATA_C33 C5317 1 2 0.01UF/50V
24 PCIE_TXP6_mSATA SATA_TXP4 20

+3.3VS_mSATA

2
+3.3VS_mSATA H5301 H5302
R5315
Q5310 10KOhm
2N7002 @ +1.5VS_mSATA
@ HT-G4041M20TFE HT-G4041M20TFE
1

1
G

PCIE_W AKE#_mSATA
3

S 2

22,33 PCIE_W AKE#


D

CON5301
PCIE_W AKE#_mSATA 1 2
3 WAKE# 3.3V_1 4
5 Reserved1 GND7 6
7 Reserved2 1.5V_1 8
21 CLK_REQ2_PCIE_mSATA# CLKREQ# UIM_PWR
9 10
11 GND1 UIM_DATA 12
21 CLK_PCIE_mSATA#_PCH REFCLK- UIM_CLK
C 13 14 C
21 CLK_PCIE_mSATA_PCH REFCLK+ UIM_RESET
15 16
GND2 UIM_VPP

17 18
Reserved/UIM_C8 GND8
Follow SanDisk SSD U100 spec. 19
21 Reserved/UIM_C4W_DISABLE#
20
22 MINICARD_RST#_mSATA R5305 2 1 0Ohm
W LAN_ON 25,55
23 TXP PCIE_mSATA_C23
PCIE_mSATA_C25
23
25
GND3
PERn0
PERST#
+3.3Vaux
24
26
R5306 2
@
1 0Ohm
BUF_PLT_RST# 23,30,33,40,43,47,55,70
W LAN_RST#_PCH 25,55
25 TXN 27 PERp0
GND4
GND9
1.5V_2
28
29 30 SMBC_mSATA R5316 1 @ 2 0Ohm
31 RXN PCIE_mSATA_C31 31 GND5
PETn0
SMB_CLK
SMB_DATA
32 SMBD_mSATA R5317 1 @ 2 0Ohm
SMB_CLK_S
SMB_DAT_S
16,17,28,48,55
16,17,28,48,55
PCIE_mSATA_C33 33 34
33 RXP 35 PETp0
GND6
GND10
USB_D-
36 USBP11-
37 38 USBP11+
+3.3VS_mSATA 39 Reserved3 USB_D+ 40
41 Reserved4 GND11 42
43 Reserved5 LED_WWAN# 44
45 Reserved6 LED_WLAN# 46
47 Reserved7 LED_WPAN# 48
Reserved8 1.5V_3 RN5301B
49 50 USBP11- 3 4
Reserved9 GND12 0Ohm
51 52
Reserved10 3.3V_2
@

4
53 56 L5301
GND13 NP_NC2 USB_PN11 24
54 55 90Ohm/100MHz
GND14 NP_NC1 USB_PP11 24
09V090000002
MINI_PCI_LATCH_52P

1
12V44GISM005 @
B B
RN5301A
USBP11+ 1 2
0Ohm
+3.3VS_mSATA
@
R5308
1 2

0Ohm R5313
1

C5302 C5305 C5301 10V440000001 1 2


10UF/10V C5303 C5304 +3VS +3.3VS_mSATA
1AV500000008 0.1UF/16V 0.1UF/16V 0.01UF/50V 0.01UF/50V 0Ohm
2

10V440000001
@ @
+1.5VS +1.5VS_mSATA

+1.5VS_mSATA
1

C5307 C5310
10UF/10V C5308 C5309
1AV500000008 0.1UF/16V 0.1UF/16V 0.01UF/50V
2

@ @ @ @
A A

Title : WiFi/WiMAX
BU1-RD Div.1-HW RD Dept.1 Engineer:
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 53 of 96
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : MINICARD (WUSB /UPCONVERT)


BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 54 of 96
5 4 3 2 1
5 4 3 2 1

1215
R1.2 2012/12/13
wake+3VS_WLAN MOS
1 RN5501A 2
0Ohm
USBP5-

1
/IOAC +3VS_WLAN @

1
PCIE_WAKE#_WLAN

S 2
30 WLAN_WAKE# 09V090000002 USB_PN5 24

D
+1.5VS_WLAN 90Ohm/100MHz USB_PP5 24
D D
2N7002 R1.2 2012/12/05 L5501

4
Q5511 USBP5+
option changed from N/A
3 RN5501B 4
R5524 1
@
2 0Ohm WiFi/WiMAX 0Ohm

CON5501
1 2
R5509 3 WAKE# 3.3V_1 4
BT_ON/OFF#_R 2 0Ohm 1 BT_DISABLE_M5 5 Reserved1 GND7 6
21 CLK_REQ3_WLAN#
@ 7
9
Reserved2
CLKREQ#
GND1
1.5V_1
UIM_PWR
UIM_DATA
8
10
1215
11 12
21 CLK_PCIE_WLAN#_PCH 13 REFCLK- UIM_CLK 14 R5522 0Ohm
21 CLK_PCIE_WLAN_PCH REFCLK+ UIM_RESET RF_ON 30
15 16
GND2 UIM_VPP
R1.1 For IOAC, 10/31
17 18 @
19 Reserved/UIM_C8 GND8 20 WLAN_ON_C R5523 0Ohm
Reserved/UIM_C4 W_DISABLE# WLAN_ON 25,53
21 22 MINICARD_RST# R5505 2 @ 1 0Ohm
GND3 PERST# BUF_PLT_RST# 23,30,33,40,43,47,53,70
23 24 R5506 2 @ 1 0Ohm
24 PCIE_RXN2_WLAN 25 PERn0 +3.3Vaux 26 WLAN_RST#_PCH 25,53
R5507 2 1 0Ohm
24 PCIE_RXP2_WLAN PERp0 GND9 WLAN_RST#_EC 30
27 28
29 GND4 1.5V_2 30 SMBC R5516 1 @ 2 0Ohm
GND5 SMB_CLK SMB_CLK_S 16,17,28,48,53
31 32 SMBD R5517 1 @ 2 0Ohm
24 PCIE_TXN2_WLAN PETn0 SMB_DATA SMB_DAT_S 16,17,28,48,53
33 34
+3VS_WLAN 24 PCIE_TXP2_WLAN 35 PETp0 GND10 36 USBP5-
37 GND6 USB_D- 38 USBP5+
+3VS_WLAN Reserved3 USB_D+
39 40
Reserved4 GND11

2
41 42
R5518 43 Reserved5 LED_WWAN# 44
45 Reserved6 LED_WLAN# 46 LED_WLAN# 66
10KOhm Reserved7 LED_WPAN#
25 BT_ON_PCH R5530 @ 0Ohm 47 48
D5501 49 Reserved8 1.5V_3 50
1

R5531 0Ohm 2 1 BT_ON/OFF#_R SP5501 2 1 R0402 BT_DISABLE_M51 51 Reserved9 GND12 52


30 BT_ON_EC Reserved10 3.3V_2 +3VS_WLAN
RB751V-40
C 53 56 C
54 GND13 NP_NC2 55
GND14 NP_NC1 @

1
G
R5514 1 @ 2 0Ohm MINI_PCI_LATCH_52P 2N7002 Q5502

2 S

3
12V44GBSD000 RF_DET# 30

D
RF_DET#_R 1 2
R5501 0Ohm

+3VS_WLAN

R1.2
2012/11/06
+3VS_WLAN
T5501 T5502
1

+3VO
1

C5502 C5505 C5506 +1.5VS +1.5VS_WLAN


10UF/10V C5503 C5504 R5534 1 2 0Ohm
1AV500000008 0.1UF/16V 0.1UF/16V 0.01UF/50V 0.01UF/50V
2

+3VS /IOAC R5513 1 2 0Ohm


@ @
/non_IOAC
R5508 1 2 0Ohm R5528 1 2 0Ohm

/non_IOAC
+1.5VS_WLAN

2 S
D
3
SI2304BDS-T1-GE3

G
+AC_BAT_SYS +12VSUS Q5501

1
/IOAC
1

C5510 C5513

1
10UF/10V
1AV500000008
C5511 C5512
0.01UF/50V R5525 R5535
R1.2 2012/12/05
0.1UF/16V 0.1UF/16V
Add 5535
2

@ @ @ @ 180KOHM 560KOhm
B B
+3VO
@ vx_r0402_small 5% change R5525 and R5532 options

2
/IOAC

2
R5526 R5532
100KOhm 1MOhm
R1.2 2012/10/29 @

1
option changed from /AOAC
1

3
C5501
/IOAC UM6K1N 1UF/25V

2
@ 5 Q5513B
2 1 R5533 /IOAC
25 AOAC_ON 0Ohm

4
6

UM6K1N /IOAC
0Ohm 2 1 R5527 2 Q5513A
30,81 IOAC_EN
1

/IOAC
/IOAC
RF_ON 0Ohm 2 @ 1 R5529

A A

Title : WiFi/WiMAX
BU1-RD Div.1-HW RD Dept.1 Engineer:
Size Project Name Rev
C VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 55 of 96
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title :TP_M
BG1-HW RD Div.2-NB RD Dept.5 Engineer: Wing_Cheng
Size Project Name Rev
B VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 56 of 96
5 4 3 2 1
5 4 3 2 1

Screw G x 2 Fix Hole H x 1 Fix Hole I x 1

PWR_H1
1 PWR_H3
C276D110 1 PWR_H4
CT197D118N 1
PWR_H2 OT39DO142X118N
1
C276D110

D D

PWR_GND
+5VSUS_PWR

POWER Button LED

1
PWR_C01
@ 47PF/50V

2
1
PWR_LED01

+
BLUE
07V130000054
PWR_GND

2
2
PWR_R02
300Ohm

1
C
PWRLED_ON#_PWR C

R1.1 reverse PWR_CON01 and change pin 1~4 pin define 1024
+3VA_PWR +5VSUS_PWR

PWR_CON01
10
10 9 LID_SW#_PWR
9 8
8 7
7 6
6 5
5 4 PWRLED_ON#_PWR
LID Switch +3VA_PWR

4 3 PWR_SW#_PWR
3 2
2 1 PWR_C02 1 2 0.1UF/16V
1
HOTBAR_10P PWR_SW01

1
AH180-WG-7
6

SWITCH_4P PWR_R05
GND2

100KOhm 1
4 3 Vdd 3
GND
B B

2
2 1 LID_SW#_PWR 2
OUTPUT
GND1

PWR_U01
R1.2 2012/11/28
5

PWR_GND cost down


1

1
PWR_D4 PWR_D5

PWR_GND
1

PWR_GND PWR_C04

1
@ 1000PF/50V
2

1AV200000003 PWR_C03
AZ5123-01H AZ5123-01H @ 1000PF/50V
2

2
07V180000006 07V180000006 1AV200000003
@ @

PWR_GND PWR_GND
PWR_GND PWR_GND

A A

Title : PWR BTN


BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 57 of 96
5 4 3 2 1
5 4 3 2 1

+5VUSB0_IO
+5V_USB_DB_C
IOL1 1 2 0Ohm USB 2.0

0.01UF/16V 2 1 IOC12
R1.2 2012/11/20

1
IOCE1 +
IOCE1
IOC17
IOC18 12V13GBSD021
IOL1 layout 100UF/6.3V 0.1UF/16V 33PF/50V USB_CON_1x4P

2
layout MB P.61 1BV080000001 +5VUSB0_IO 1 5

2
0.01UF/16V 2 1 IOC13 IO_USB_PN2 2 1 P_GND1 6


R1.2 2012/11/20 IO_USB_PP2 3 2 P_GND2 7
4 3 P_GND3 8
layout D_GND_IO D_GND_IO
4 P_GND4
R1.3 2013/1/21 IOCON4

D
IOL1 is changed to 0ohm D
0.01UF/16V 2 1 IOC14 IOD4 @ D_GND_IO D_GND_IO

IO_USB_PP2 1 6 IO_USB_PN2
12V13GBSD021
+5V_USB_DB_C +5VUSB0_IO USB_CON_1x4P
0.01UF/16V 2 1 IOC11 +5VUSB0_IO 1 5
IO_USB_PN9 2 1 P_GND1 6
HOTBAR_20P 2 5 2 P_GND2
IO_USB_PP9 3 7
20 4 3 P_GND3 8
20 19 4 P_GND4
19 18 D_GND_IO IOCON3
D_GND_IO A_GND_IO
18 17
17 IO_USB_PN9 3 4 IO_USB_PP9
16
16 15 IO_USB_PN2
15 D_GND_IO D_GND_IO
14 IO_USB_PP2 CM1293_04SO
14 13
13 12 IO_USB_PN9
12
11
10
9
8
11
10
9
8
7
IO_USB_PP9

MIC_IN_AC_E_R_IO
D_GND_IO Moat
7 6 MIC_IN_AC_E_L_IO
6
5
4
5
4
3
MIC_EXT_JD#_IO
AC_HP_L_IO
AC_HP_R_IO
A_GND_IO
3 2 HP_JD#_IO
2 1 COMBO_MIC_IO
1
IOCON5

R1.2 2012/11/08
A_GND_IO
D_GND_IO
cost dwon 0ohm
R1.2 2012/12/04
Headphone & MIC combo Jack
change short pin size IOCON6
COMBO_MIC_IO 7
C 1 C

IOSP1 NB_R0402_20MIL_SMALL
AC_HP_L_IO 1 2 AU_HP_LL_JACK 2
6
IOSP2 1 2NB_R0402_20MIL_SMALL 3
AC_HP_R_IO AU_HP_RR_JACK
4
IOSP3 1 2NB_R0402_20MIL_SMALL 5 8
HP_JD#_IO HP_JD#_Jack P_GND1
P_GND2 9

1
IOC9 IOC6 IOC7 NP_NC1 10
Fix Hole F x 1 NP_NC2 11

MIC_IN_AC_E_R_JACK
AU_HP_RR_JACK

MIC_IN_AC_E_L_JACK
MIC_EXT_JD#_IO
AU_HP_LL_JACK

COMBO_MIC_IO
Screw L x 2 100PF/50V 100PF/50V 100PF/50V

2
PHONE_JACK_9P

HP_JD#_Jack
12V14GBSD006
IO_H3
IO_H1 1 A_GND_IO A_GND_IO A_GND_IO
1 OB291X283DO118X130N
C354D118
A_GND_IO A_GND_IO
R1.2 2012/12/05
IO_H2 options are chaned from Entry
1
C354D118
@ @ 2 AZ2025-01H.R7G @
1

2
AZ2025-02S AZ2025-02S AZ2025-02S
@

D_GND_IO
IOD1 IOD2 IOD5
3

3
IOD3
1

COMBO_MIC_IO

1
IOC10 IOC2
10PF/50V 33PF/50V

2
B B
Fix Hole E x 1 @ @
A_GND_IO A_GND_IO A_GND_IO A_GND_IO

IO_H4 A_GND_IO
1
CB276D118N

MIC JACK
IOCON2
R1.2 2012/11/08 8
8
cost dwon 0ohm 7
1 7
MIC_IN_AC_E_L_IO IOSP4 1 2 R0603 MIC_IN_AC_E_L_JACK 2 1
6 2
MIC_IN_AC_E_R_IO IOSP5 1 2 R0603 MIC_IN_AC_E_R_JACK 3 6
4 3
MIC_EXT_JD#_IO 5 4
5
9
NP_NC1
1

1
IOC8 IOC16 IOC15 10
NP_NC2
100PF/50V 100PF/50V 100PF/50V
2

2
PHONE_JACK_8P

A A
A_GND_IO A_GND_IO A_GND_IO A_GND_IO

R1.1 Add 2nd MIC schematic 0804

Title : IO
BG1-NB1-HW-NB5 Engineer: Wing_Cheng
Size Project Name Rev
C VA70_HW 1.0
Date: Monday, January 21, 2013 Sheet 58 of 96
5 4 3 2 1
5 4 3 2 1

HDD 1 9.5mm
HDD 2
CON6001
12.5mm
1 25 CON6002
C6001 2 1 0.01UF/50V SATA_TXP0_C 2 1 NP_NC3 S1 3
20 SATA_TXP0 2 S1 NP_NC3
C6002 2 1 0.01UF/50V SATA_TXN0_C 3 23 C6006 2 1 0.01UF/50V SATA_TXP5_C S2
20 SATA_TXN0 3 NP_NC1 20 SATA_TXP5 S2
4 C6008 2 1 0.01UF/50V SATA_TXN5_C S3 1
4 20 SATA_TXN5 S3 NP_NC1
D C6003 2 1 0.01UF/50V SATA_RXN0_C 5 S4 D
20 SATA_RXN0 5 S4
C6004 2 1 0.01UF/50V SATA_RXP0_C 6 C6005 2 1 0.01UF/50V SATA_RXN5_C S5
20 SATA_RXP0 6 20 SATA_RXN5 S5
7 C6007 2 1 0.01UF/50V SATA_RXP5_C S6
7 20 SATA_RXP5 S6
S7
S7
+3VS
+3VS
+3VS 8
9 8 +3VS P1
9 P1
1

C6018 C6017 10 P2
10 P2

1
@ @ 11 C6026 C6025 P3
10UF/6.3V 0.1UF/25V +5VS +5VS_HDD1 12 11 @ @ P4 P3
2

SP6001 13 12 10UF/6.3V 0.1UF/25V +5VS +5VS_HDD2 P5 P4

2
1 2 14 13 SP6002 P6 P5
15 14 1 2 P7 P6
SHORT_PIN 16 15 P8 P7
17 16 SHORT_PIN P9 P8
+5VS_HDD1 T6001 1 18 17 P10 P9
19 18 +5VS_HDD2 T6002 1 P11 P10
20 19 24 P12 P11
21 20 NP_NC2 P13 P12 2
22 21 26 P14 P13 NP_NC2
22 NP_NC4 P14
1

C6021 C6020 C6019 P15 4


P15 NP_NC4

1
@ @ SATA_CON_22P C6024 C6023 C6022
10UF/6.3V 10UF/6.3V 0.1UF/25V 12V241BRD010 @ @ SATA_CON_22P
2

10UF/6.3V 10UF/6.3V 0.1UF/25V 12V24GBRD019

2
C C

ZERO POWER ODD SUPPORT


ODD support Hokey turn off ODD power 1
R6003
2

0Ohm

+5VS /non_Zero_ODD +5VS_ODD

2 S
D
3
SI2304BDS-T1-GE3

G
Q6002

1
/Zero_ODD
+12VSUS
CON6003
4 S1
NP_NC4 S1 S2 SATA_ODD_TXP2 0.01UF/50V 1 2 C6011
S2 SATA_TXP2 20 +5VSUS

2
2 S3 SATA_ODD_TXN2 0.01UF/50V 1 2 C6012 +3VS
B NP_NC2 S3 SATA_TXN2 20 B
S4 R6004
S4 S5 SATA_ODD_RXN2 0.01UF/50V 1 2 C6013
S5 SATA_RXN2 20 100KOhm
S6 SATA_ODD_RXP2 0.01UF/50V 1 2 C6014

2
S6 SATA_RXP2 20

1
S7 /Zero_ODD
R6006

1
S7 R6007
0Ohm 1 2 R6001 100KOhm
SATA_ODD_PRSNT# 25 10KOhm
/Zero_ODD /Zero_ODD

1
+5VS_ODD /Zero_ODD

1
2
P1 UM6K1N R6011
P1 P2 0Ohm 1 2 R6005 5 Q6001B
P2 10KOhm
1 P3 /Zero_ODD C6010
/Zero_ODD

4
NP_NC1 P3
1

6
P4 /Zero_ODD 1UF/25V
+

2
P4
1

3 P5 CE5101 UM6K1N /Zero_ODD


NP_NC3 P5 P6 C6015 C6016 0Ohm 1 2 R6009 2 Q6001A
P6 100UF/6.3V 25 SATA_ODD_PW RGT
0.01UF/50V 10UF/10V 1BV170000001 /Zero_ODD
2

1
@ /Zero_ODD
SATA_CON_13P @
12V24GBRD020 0Ohm 1 2 R6002 SATA_ODD_DA# 23 3
D
/Zero_ODD Q6003
2N7002
1 /Zero_ODD
G
2 S

A A

Title : SATA HDD/ ODD


BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 60 of 96
5 4 3 2 1
A B C D E

MB USB +5VO

+5VO

1
R6125
R1.3 2013/1/21
L6110 is changed to 0ohm +5V_USB1

1
100KOhm C6107
0.1UF/16V +5VO

1
G
U6107

2
1 A 5 U6101

2 S

3
30 USBP0_EN /USBSLP VCC /USBSLP
1 8 1 2

D
L6110 0Ohm
USBCEN 2 B GND 2 GND OUT1 7
2N7002
Q6105 3
GND
4
3
4
IN1
IN2
OUT2
OUT/NC
EN#/EN OC#
6
5 USB_CHG_OC# 1
D6102

3
USB 3.0
/USBSLP Y USB_OC0# 24 CON6101
Vcc=2~5.5 G547E1P81U USB30_OC# 2

10
12
1
/USBSLP C6110 06V290000008
GND 1V/0.1A

P_GND1
P_GND3
Active High
1UF/6.3V 2.5A /USBSLP SSRN 5

2
4 SSRX-
+5V_USB1 GND PGND
1 SSRP 6 1
DPP0_CON_P 3 SSRX+
D+
R1.2 2012/11/20 GND
DPN0_CON_N
7
2 GND
Changed from 560UF/2.5V SSTN 8 D-

P_GND2
P_GND4
1 SSTX-
SSTP 9 VBUS
SSTX+

1
USB_CON_9P
CE6104 +

11
13
2
12V13GURD006
220UF/6.3V C6101
1BV090000003 0.1UF/25V

1
1AV200000041

GND

U6102
+3VSUS SSRN 1 10 SSRN
Sleep & Charge SSRP

SSTN
2
3
4
LINE_1
LINE_2
GND(Pin8)
NC4
NC3
9

7
SSRP

SSTN
LINE_3 NC2

1
SSTP 5 6 SSTP
LINE_4 NC1

1
R6116
RN6113B /USBSLP
C6116 100KOhm 4 0Ohm 3 AZ1045_04F
+5VO 0.1UF/25V @

2
/USBSLP

2
U6105
/USBSLP
5 4
VDD SELCDP SCLCDP_EC 30

3
6 3 USB_P0+ DPP0_CON_P
24 USB_PP0 TDP DP 90Ohm/100Mhz DPN0_CON_N
7 2 USB_N0-
24 USB_PN0 TDM DM
8 1 USBCEN 2 R6115 1 L6114 @
30 CHGCB0 CB CEN +5VO
9
10KOhm

2
GND
SLG55584AVTR /USBSLP
06V150000009
/USBSLP 2 0Ohm 1
RN6113A /USBSLP

RN6103B
0.1UF/25V 4 3
0Ohm
C6102 2 1 USB3_TX1_C_N SSTN
24 USB3_TX1_N
@
4

2
1 2 GND 2
L6101 @
90Ohm/100MHz C6119 10PF/50V
0.1UF/25V
1

C6104 2 1 USB3_TX1_C_P SSTP


24 USB3_TX1_P
2 1
0Ohm @
RN6103A
1 2

C6120 10PF/50V
GND
no sleep & charge
RN6111B
4 3
0Ohm @ +5V_USB1 +5V_USB2
SSRN D6101
24 USB3_RX1_N
4

DPP0_CON_P 1 6 DPN0_CON_N
@
L6102 @ R6120
90Ohm/100MHz +5V_USB1 1 2
C6111
1

SSRP 0Ohm
24 USB3_RX1_P
2 1 2 5 1 2 10V540000001
0Ohm
RN6111A
0.1UF/16V
1

C6121 C6122 @
10PF/50V 10PF/50V USB_PP1_R 3 4 USB_PN1_R
2

@ @
CM1293_04SO
R1.3 2013/1/21 07V000000006
L6111 is changed to 0ohm PLACE ESD Diodes 0700-0014000 near Connector
GND GND
+5V_USB2
+5VSUS
U6104
1 8 L6111 1 2 0Ohm
2 GND OUT1 7
3 IN1 OUT2 6 /USBSLP
30 USBP1_EN
4 IN2 OUT/NC
EN#/EN OC#
G547E1P81U
5 USB30_OC#
USB 3.0
1

C6109

10
12
06V290000008
CON6105
1UF/6.3V /USBSLP

P_GND1
P_GND3
2

Active High
2.5A SSRN1 5
/USBSLP SSRX-
GND 4
PGND
R1.2 2012/11/20 +5V_USB2 SSRP1
USB_PP1_R
6
3 SSRX+
Changed from 100UF/6.3V GND
7 D+
GND
R1.2 2012/11/23 USB_PN1_R
SSTN1
2
8 D-
changed from 220UF/6.3V

P_GND2
P_GND4
1 SSTX-
3 SSTP1 9 VBUS 3
SSTX+
1

RN6120A +
USB_CON_9P

11
13
2

1 2 CE6103
0Ohm 12V13GURD006
100UF/6.3V C6108
24 USB_PN1 0.1UF/25V
2

USB_PN1_R
4

L6109 @
90Ohm/100MHz
USB_PP1_R GND
24 USB_PP1
1

RN6120B
3 4
0Ohm
U6106
SSRN1 1 10 SSRN1
SSRP1 2 LINE_1 NC4 9 SSRP1
3 LINE_2 NC3
SSTN1 4 GND(Pin8) 7 SSTN1
RN6123B SSTP1 5 LINE_3 NC2 6 SSTP1
0.1UF/25V 4 3 LINE_4 NC1
0Ohm
C6115 2 1 USB3_TX_C_N SSTN1 AZ1045_04F
24 USB3_TX2_N
@ @
4

1 2 GND
L6104 @
90Ohm/100MHz C6123 10PF/50V
0.1UF/25V
1

C6112 2 1 USB3_TX_C_P SSTP1


24 USB3_TX2_P
2 0Ohm 1
@
1 2 GND
RN6123A
C6124 10PF/50V
RN6126B
4 0Ohm 3
SSRN1
24 USB3_RX2_N
4

L6108 @
90Ohm/100MHz
1

SSRP1
24 USB3_RX2_P
2 0Ohm 1

RN6126A
1

C6128 C6127
10PF/50V 10PF/50V
2

@ @
4 4

GND
GND

IO Board AUDIO BOARD/w USB2.0 x2


R1.2 2012/11/20
USB Power Switch for USB DB Main Add 560UF/2.5V for layout to estimate
R1.2 2012/11/23
+5VSUS +5V_USB_DB changed from 560/2.5V
U6103 N/A R1.2 2012/11/27
1 8
2 GND OUT1 7 L6115, CE6105 are removed
3 IN1 OUT2 6
4 IN2 OUT/NC 5
30 USBP2_EN EN#/EN OC# USB_OC1# 24
G547E1P81U
1

C6106 06V290000008 +5V_USB_DB


CON6104
1UF/6.3V 20
2

Active High 19 20 22
2.5A 18 19 SIDE2
17 18
16 17
USB_PN2_C 15 16
USB_PP2_C 14 15
13 14
1 2 USB_PN2_C USB_PN9_C 12 13
24 USB_PN2 0Ohm 12
RN6107A USB_PP9_C 11
10 11
10
4

9
L6107 @ 8 9
90Ohm/100Mhz 7 8

A_GND 42
42
MIC_IN_AC_E_R_J
MIC_IN_AC_E_L_J
6 7
1

5 6
41 MIC_EXT_JD# 5
3 0Ohm 4 USB_PP2_C 4
24 USB_PP2 RN6107B 42 HP_JACK_L 4
3
42 HP_JACK_R 3
2 21
41 HP_JD# 2 SIDE1
5 1 5
41 COMBO_MIC 1

BIOS debug port FPC_CON_20P


12V18AWSM019
A_GND A_GND

1 0Ohm 2 USB_PN9_C
24 USB_PN9 RN6106A
4

L6106 @
90Ohm/100Mhz
1

3 0Ohm 4 USB_PP9_C
24 USB_PP9 RN6106B
Title : USB PORTS/ eSATA
BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Monday, January 21, 2013 Sheet 61 of 96
A B C D E
5 4 3 2 1

D D

C C

B B

A A

Title : Camera/ BT/ FL CONN


BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 62 of 96
5 4 3 2 1
5 4 3 2 1

R1.3 2013/1/4
L6304 is changed to Irat=8A R1.2 2012/11/21
DC IN Battery ConnectorF6301 is removed
R1.2 2012/11/21 +BAT_CON

F6301 is removed
T6313 T6304 T6305 T6306 T6307 A/D_DOCK_IN_F +A/D_DOCK_IN
T6320 T6312 T6321 T6322 T6323
1

1
L6304

1
D_A/D_DOCK_IN 1 2
C6310
80Ohm/100Mhz T6301 T6302 T6303 0.1UF/25V
C6305 C6309 09V010000051 C6306 BATT_CON_8P 1AV300000007
0.1UF/25V 1000PF/50V 0.1UF/25V @

1
1AV300000024 1AV200000018 Irat=8A 1AV300000024 9
P_GND1 1 BAT_CON_F
1 2
2
1

1
3 PI
3 4 TS1#_C L6301 2 11kOhm/100Mhz Irat=300mA
D 4 TS1# 90 D
5 SMB0_CLK_C L6303 2 11kOhm/100Mhz Irat=300mA
T6308 T6309 T6310 T6311 5 SMB0_CLK 30,88
6 SMB0_DAT_C L6302 2 11kOhm/100Mhz Irat=300mA
6 7 SMB0_DAT 30,88
7 8

1AV300000024

100PF/50V

100PF/50V

100PF/50V
0.1UF/25V
10 8

C6302

C6303

C6304
WTOB_4P P_GND2

C6301
4 CON6301
3 D_A/D_DOCK_IN 12V20GBSD008

1
2 @ @ @
1 D6301
TS1#_C 1 5 SMB0_CLK_C

2
C6307 C6308
CON6302 0.1UF/25V 1UF/25V GND
12V17AISD002 1AV300000024 1AV300000031 1220-00FD000 2

PI
3 4 SMB0_DAT_C
+A/D_DOCK_IN T6319 T6314 T6317 T6318 T6315 T6316

2
DF5A6.8FU
R6315

1
@
1KOhm

BAT_CON_F

1
SR-5
0120-11 GND

Frank
Discharge Circuit 0505 Follow EVEREST

+0.675VS +3VS +1.5VS +VCORE +1.05VS +VCCIO_OUT +5VS +12VS

1
C C
1

1
+3VA R6314
R6303 R6304 R6305 330Ohm R6307 R6308 R6313 R6327
330Ohm 330Ohm 330Ohm @ 330Ohm 330Ohm 330Ohm 330Ohm
@ @ @ @ @

2
2

2
1

+VCC_CORE_DISCHRG
R6301 +0.675VS_DISCHRG +3VS_DISCHRG +1.5VS_DISCHRG +VTT_PCH_DISCHRG +VTT_CPU_DISCHRG +5VS_DISCHRG +12VS_DISCHRG
100KOhm
3

6
Q6301B Q6302A Q6302B Q6303A Q6303B Q6304A Q6304B Q6305A
UM6K1N UM6K1N UM6K1N UM6K1N UM6K1N UM6K1N UM6K1N UM6K1N
2

5 2 5 2 @ 5 @ 2 @ 5 @ 2 @
4

1
6

Q6301A
@ @ @
UM6K1N
22,23,30,91,92 SUSB_EC# 2
1

+1.35V
+3V
+5VSUS
1
1

1
R6328
R6311 330Ohm R6325
330Ohm +3VA 330Ohm
2

+3VA @
2

+1.35V_DISCHRG

2
1
+3V_DISCHRG @
1

@ R6324 +5VSUS_DISCHRG
R6302 100KOhm
3

3
100KOhm Q6305B @ Q6311B
3

Q6306B UM6K1N UM6K1N

2
UM6K1N 5 5
2

5
4

4
6
Q6311A @
4
6

Q6306A @ UM6K1N
UM6K1N @ 30,81,91,93 VSUS_ON 2
30,91 SUSC_EC# 2 @

1
B
@ B
1

@ R1.1 Mount SUSC_EC# discharge schematic for power timing 0808

VGA Discharge Circuit


R1.2 2012/12/10
changed to +1.35VS_VGA
R1.2 2013/01/02 R1.2 2013/01/02
changed to 124ohm from 330ohm changed to 124ohm from 330ohm

+3VS_VGA +VGA_VCORE +1.35VS_VGA +1.05VS_VGA

R1.2 2013/01/13
1

changed to 124ohm from +3VA


330ohm R6318 R6319 R6320 R6321
124Ohm 330Ohm 124Ohm 10Ohm
/DGPU /DGPU
10V320000071 10V320000071
1

/DGPU /DGPU
2

R6317
100KOhm +VGA_VCORE_DISCHRG +3VS_VGA_DISCHRG +1.35VS_VGA_DISCHRG +1.05VS_VGA_DISCHRG
/DGPU
6

6
2

Q6308A Q6309B Q6309A Q6310B Q6310A


VGA_DISCHRG_EN 2 UM6K1N 5 UM6K1N 2 UM6K1N 5 UM6K1N 2 UM6K1N
/DGPU /DGPU /DGPU /DGPU
1

1
3

R6316
Q6308B
23 DGPU_PWR_EN 1 2 VGA_DISCHRG_CTL 5 UM6K1N /DGPU
A
/DGPU A
4

/DGPU
100KOhm

Unmount +VGA_Vcore discharg

Title : DC-IN/ DISCHARGE


BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom
VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 63 of 96
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title :DC-IN/ DISCHARGE


BU1-RD Div.1-HW RD Dept.1 Engineer:Wing_Cheng
Size Project Name Rev
E VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 64 of 96

5 4 3 2 1
5 4 3 2 1

PWR BRD/ AMBIENT/ HALL CONN.

+5VSUS +3VA
12V18AWSM001
FPC_CON_10P

12
10 SIDE2
D D
9 10
30,37 LID_SW# 9


8
R1.2 2012/11/06 7 8
6 7
T6501 6
5
PWRLED_ON# 4 5
R6503 2 1 33Ohm PWR_SW#_S 3 4

1
30 PWR_SW#_M 3
2
1 2
11 1
SIDE1
R6509 2 1 0Ohm PWRLED_ON#
R1.2 2012/11/28 D6501 @ CON6504 30,66 PWR_BLUE_LED#
2

1
D6501 pin2 is connected 0.1UF/16V

2
R6510 2 1 0Ohm
C6504 10PF/50V 10PF/50V 0.1UF/25V 10PF/50V 30,66 PWR_AMBER_LED#

2
C6508 C6512 C6505 C6506 @

1
AZ2025-02S
3

R1.2-28
C change Power LED CON6503 circuit C

R1.0 remove VG70 POWER connector CON6503 0719

DEBUG CARD CONN. +3VS +3V

B B
1

R6506 R6505
0Ohm 0Ohm Debug port power is changed to +3VS
@
2

C6503 1 2 0.1UF/16V

@
CON6502
12 13
LPC_AD0 11 12 SIDE1
21,30,43 LPC_AD0 11
10
LPC_AD1 9 10
21,30,43 LPC_AD1 9
EXT_SMI#_C 8
LPC_AD2 7 8
21,30,43 LPC_AD2 7
INT_SERIRQ_C 6
LPC_AD3 5 6
21,30,43 LPC_AD3 5
4
LPC_FRAME# 3 4
21,30,43 LPC_FRAME# 3
2
CLK_DEBUG 1 2 14
21 CLK_DEBUG 1 SIDE2

A
FPC_CON_12P A
12V18GWSM045
21,30,43 INT_SERIRQ R6501 2 @ 1 0Ohm INT_SERIRQ_C Frank
0425_modify Debug port
R6502 2 @ 1 0Ohm EXT_SMI#_C
(add EXT_SMI#_C and INT_SERIRQ_C)
25,30 EXT_SMI#
CR R1.0 change part for EOL. Joyoung0803
PS. Pin define is reverse.
Title : MDC/ PWR SW/ Debug
BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
Custom VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 65 of 96
5 4 3 2 1
5 4 3 2 1

+5VA

+5VSUS
Power LED Charger LED

1
1
C6601
+5VSUS C6602 @ 47PF/50V

2
1
@ 47PF/50V SR-65
1AV200000015

2
1
SR-65 LED6602

A
1AV200000015

1
LED6601

A
R6608 BLUE&ORANGE
10KOhm BLUE&ORANGE 07V130000038
@ 07V130000038

C2

C1
C2

C1
2

2
D D

2
6

3
Q6602A @ Q6602B
UM6K1N UM6K1N

2
2 5
R6604 R6602

4
@ 360Ohm 560Ohm

R1.2 2012/11/29

1
2

2
R6607 R6606 +5VA cost dwon

6
360Ohm 0209 Q6601A

2
560Ohm
R1.2 2012/11/08 10V240000029
R6611 1
@
2 200KOhm
UM6K1N
2
@ R6619
cost dwon 0ohm

1
0Ohm

2
1

3
SP6601 1 2 R0402 Q6601B
R6620

1
30,65 PWR_BLUE_LED# UM6K1N

1
@ C6603 5@ 0Ohm
30,65 PWR_AMBER_LED# 1UF/6.3V

1
30 CHG_LED_BLUE#

R6617 1 @ 2 0Ohm
+5VA 30 BAT_ORG_LED#

R6618 1 2 0Ohm +5VS


WLAN LED +5VS

1
3

1
3
LED6605
AMBER LED6604
07V130000055 BLUE
2
HDD LED 07V130000017
C C

2
3
D
2

2
Q6604 R6616 R6605
1 499Ohm 300OHM
25 WLAN_LED 2N7002
G 10V220000076
2 S
1

1
R6613
100KOhm R6610 1 2 0Ohm
@
2

+3VS_WLAN +3VS
LED_WLAN#_C

@ +3VS_WLAN

Storage_LED#
1

1
R6614 R6612
100KOhm 100KOhm
1

R6615
2

2
10KOhm LED_WLAN
6

3
Q6605A Q6605B Q6603A @ Q6603B
2

UM6K1N UM6K1N UM6K1N UM6K1N


2 5 2 5
55 LED_WLAN# 20 SATA_LED#
1

4
@ @

Screw A x 4 (PTH)
CPU Screw B x 4 Screw hole R x 1 Screw hole Q x 6 WLAN NUT
B B

H6601 H6615 H6608 H6613


1
CRT276X315D157 1 1 1
NP_NC NP_NC NP_NC H6628 H6629
H6621 2 5 2 5 2 5
H6602 1 3 GND1 GND4 4 3 GND1 GND4 4 3 GND1 GND4 4
1 GND2 GND3 GND2 GND3 GND2 GND3
C354D126
CRT276X315D157
H6603 H6622 RT413X394CBD126N ST354CB354D126N ST354CB354D126N
1 1 A40M20-64AS A40M20-64AS
CRT276X315D157 C354D126 H6609 H6618
Screw hole S x 2
H6604
1 H6614 Screw hole T x 1 1 1
1 H6616 2 NP_NC 5 2 NP_NC 5
CRT276X315D157
C354D126 3 GND1 GND4
GND2 GND3
4 3 GND1 GND4
GND2 GND3
4 PCH Local Side Symbol
1
2 NP_NC 5
H6625 H6623 3 GND1 GND4 4
GND2 GND3 H6611 Screw hole V x 1
1 1
ST354CB354D126N ST354CB354D126N H6607
C354D126 C354D126 1
GPU Screw P x 2 H6610 H6619
P_GND
RT394x384CB354D126N 7 43
H6605 NP_NC1 NP_NC19
8 44
1 1 1 NP_NC2 NP_NC20
H6617 NP_NC NP_NC CT236B67ID47 9 45
CRT315x335CB236D138 2 5 2 5 NP_NC3 NP_NC21
GND1 GND4 GND1 GND4 10 46
3 4 3 4 NP_NC4 NP_NC22
GND2 GND3 GND2 GND3 11 47
H6606 1 NP_NC5 NP_NC23
NP_NC 12 48
1 2 5 NP_NC6 NP_NC24
GND1 GND4 H6612 13 49
CRT315x335CB236D138 3 4 NP_NC7 NP_NC25
GND2 GND3 14 50
ST354CB354D126N ST354CB354D126N 15 NP_NC8 NP_NC26 51
25 NP_NC9 NP_NC27 61
26 NP_NC10 NP_NC28 62
Screw A x 2 (NPTH) RT394x384CB354D126N 27 NP_NC11 NP_NC29 63
28 NP_NC12 NP_NC30 64
CT236B67ID47
29 NP_NC13 NP_NC31 65
A
30 NP_NC14 NP_NC32 66 A
Fix hole D x 1 H6620 31 NP_NC15 NP_NC33 67
32 NP_NC16 NP_NC34 68
H6624
33 NP_NC17 NP_NC35 69
H6633 1 S6635 NP_NC18 NP_NC36
1 2 NP_NC 5 1 1
3 GND1 GND4 4 2 NP_NC 5 1 RTCBD126
CB276D138N GND2 GND3 GND1 GND4
3 4 EMI_SPRING_PAD
GND2 GND3

/DGPU
C354D126N
Fix hole N x 1 C354D126N Title : LED/ CIR/ FN/ SCREW
H6634 BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
1 Size Project Name Rev
OB248x236DO150x138N Custom VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 66 of 96
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : TPM
Pegatron Corp. Engineer: Wing_Cheng
Size Project Name Rev
B VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 67 of 96
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A Title : Finger Printer A

Pegatron Corp. Engineer: Wing_Cheng


Size Project Name Rev
A VA70_HW 1.0
Date: Friday, January 18, 2013 Sheet 68 of 96

5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A
Title : G-Sensor TSH35TR
BU1-RD Div.1-HW RD Dept.1 Engineer: Wing_Cheng
Size Project Name Rev
A 1.0
Date: Friday, January 18, 2013 Sheet 69 of 96
5 4 3 2 1
5 4 3 2 1

3 PEG_TXP[15:0]
3 PEG_TXN[15:0] +1.05VS_VGA +1.05VS_VGA 63,71,72,91
3 PEG_RXP[15:0] +3VS_VGA +3VS_VGA +3VS_VGA 63,71,72,74,75,87,91
3 PEG_RXN[15:0]

GPU BOM Optional Definition


C7053

1
0.1UF/10V @ => Unmount.
10%
@ /DGPU => Optimus SKU.

2
U7002
1 A 5 /EGL => When N14E-GL is mounted, we need to mount this optional.
23 DGPU_HOLD_RST# VCC
2 B /PGV => When N14P-GV is mounted, we need to mount this optional.
23,30,33,40,43,47,53,55 BUF_PLT_RST#
D D
3 4 PEX_RST /EGL_PGV => When N14E-GL or N14P-GV are mounted, we need to mount this optional.
GND PEX_RST 74
Y
SN74LVC1G08DCKR
/DGPU

R7020 2 @ 1 0Ohm

2
R7009
+3VS_VGA +3VS_VGA 100KOhm U7001A
/DGPU +1.05VS_VGA
1/19 PCI_EXPRESS

1
2
Q7001 R7008 AJ11
2N7002 10KOhm PEX_WAKE_N AG19
/DGPU /DGPU AJ12 PEX_IOVDD1 AG21
1
PEX_RST_N PEX_IOVDD2

1
AG22 C7001 C7002 C7003 C7009 C7004 C7005 C7010
G

1
CLKREQ_PEG#_R AK12 PEX_IOVDD3 AG24
3

S 2

21 CLKREQ_PEG# PEX_CLKREQ_N PEX_IOVDD4 AH21 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 10UF/6.3V 10UF/6.3V 22UF/6.3V 22UF/6.3V
D

2
AL13 PEX_IOVDD5 AH25 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU
21 CLK_PCIE_PEG_PCH AK13 PEX_REFCLK PEX_IOVDD6
21 CLK_PCIE_PEG#_PCH PEX_REFCLK_N
/DGPU
PEG_RXP0 C7032 2 1 0.22UF/10V PEX_TX0+ AK14
PEG_RXN0 C7021 2 1 0.22UF/10V PEX_TX0- AJ14 PEX_TX0
/DGPU PEX_TX0_N
PEG_TXP0 AN12
PEG_TXN0 AM12 PEX_RX0 AG13
/DGPU PEX_RX0_N PEX_IOVDDQ1 AG15
PEX_IOVDDQ2

1
PEG_RXP1 C7018 2 1 0.22UF/10V PEX_TX1+ AH14 AG16 C7008 C7006 C7007 C7013 C7011 C7012 C7014
PEG_RXN1 C7019 2 1 0.22UF/10V PEX_TX1- AG14 PEX_TX1 PEX_IOVDDQ3 AG18
/DGPU PEX_TX1_N PEX_IOVDDQ4 AG25 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 10UF/6.3V 10UF/6.3V 22UF/6.3V 22UF/6.3V

2
PEG_TXP1 AN14 PEX_IOVDDQ5 AH15 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU
PEG_TXN1 AM14 PEX_RX1 PEX_IOVDDQ6 AH18
/DGPU PEX_RX1_N PEX_IOVDDQ7 AH26
PEG_RXP2 C7024 2 1 0.22UF/10V PEX_TX2+ AK15 PEX_IOVDDQ8 AH27 PLACE UNDER BGA PLACE NEAR BGA PLACE BETWEEN BGA AND POWER SUPPLY
PEG_RXN2 C7031 2 1 0.22UF/10V PEX_TX2- AJ15 PEX_TX2 PEX_IOVDDQ9 AJ27
/DGPU PEX_TX2_N PEX_IOVDDQ10 AK27
C C
PEG_TXP2 AP14 PEX_IOVDDQ11 AL27
PEG_TXN2 AP15 PEX_RX2 PEX_IOVDDQ12 AM28
/DGPU PEX_RX2_N PEX_IOVDDQ13 AN28
PEG_RXP3 C7020 2 1 0.22UF/10V PEX_TX3+ AL16 PEX_IOVDDQ14
PEG_RXN3 C7022 2 1 0.22UF/10V PEX_TX3- AK16 PEX_TX3
/DGPU PEX_TX3_N
PEG_TXP3 AN15
PEG_TXN3 AM15 PEX_RX3
/DGPU PEX_RX3_N
PEG_RXP4 C7023 2 1 0.22UF/10V PEX_TX4+ AK17
PEG_RXN4 C7028 2 1 0.22UF/10V PEX_TX4- AJ17 PEX_TX4
/DGPU PEX_TX4_N
PEG_TXP4 AN17
PEG_TXN4 AM17 PEX_RX4
/DGPU PEX_RX4_N
PEG_RXP5 C7036 2 1 0.22UF/10V PEX_TX5+ AH17 +3VS_VGA
PEG_RXN5 C7030 2 1 0.22UF/10V PEX_TX5- AG17 PEX_TX5
/DGPU PEX_TX5_N AH12
PEG_TXP5 AP17 PEX_PLL_HVDD
PEX_RX5

2
PEG_TXN5 AP18 AG12 C7016 C7017 C7015
/DGPU PEX_RX5_N PEX_SVDD_3V3
PEG_RXP6 C7026 2 1 0.22UF/10V PEX_TX6+ AK18 0.1UF/16V 4.7UF/6.3V 4.7UF/6.3V

1
PEG_RXN6 C7025 2 1 0.22UF/10V PEX_TX6- AJ18 PEX_TX6 /DGPU /DGPU /DGPU
/DGPU PEX_TX6_N
PEG_TXP6 AN18
PEG_TXN6 AM18 PEX_RX6
/DGPU PEX_RX6_N PLACE NEAR BGA
PEG_RXP7 C7029 2 1 0.22UF/10V PEX_TX7+ AL19
PEG_RXN7 C7027 2 1 0.22UF/10V PEX_TX7- AK19 PEX_TX7
/DGPU PEX_TX7_N
PEG_TXP7 AN20
PEG_TXN7 AM20 PEX_RX7
/EGL PEX_RX7N
PEG_RXP8 C7034 2 1 0.22UF/10V PEX_TX8+ AK20
PEG_RXN8 C7033 2 1 0.22UF/10V PEX_TX8- AJ20 PEX_TX8
0.2 mm
/EGL PEX_TX8_N L4
VDD_SENSE NVDD_SENSE 87
PEG_TXP8 AP20
B
PEG_TXN8 AP21 PEX_RX8 B
PEX_RX8_N
0.2 mm
/EGL L5
GND_SENSE NVDD_GND_SENSE 87
PEG_RXP9 C7046 2 1 0.22UF/10V PEX_TX9+ AH20
PEG_RXN9 C7035 2 1 0.22UF/10V PEX_TX9- AG20 PEX_TX9
/EGL PEX_TX9_N
PEG_TXP9 AN21
PEG_TXN9 AM21 PEX_RX9
/EGL PEX_RX9_N
PEG_RXP10 C7038 2 1 0.22UF/10V PEX_TX10+ AK21
PEG_RXN10 C7037 2 1 0.22UF/10V PEX_TX10- AJ21 PEX_TX10
/EGL PEX_TX10_N P8
PEG_TXP10 AN23 NC12
PEG_TXN10 AM23 PEX_RX10
/EGL PEX_RX10_N
PEG_RXP11 C7040 2 1 0.22UF/10V PEX_TX11+ AL22
PEG_RXN11 C7039 2 1 0.22UF/10V PEX_TX11- AK22 PEX_TX11
/EGL PEX_TX11_N
PEG_TXP11 AP23
PEG_TXN11 AP24 PEX_RX11
PEX_RX11_N AJ26 R7007 1 2 200Ohm 1%
PCIE Port /EGL
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT @
PEG_RXP12 C7042 2 1 0.22UF/10V PEX_TX12+ AK23 AK26 PEX_TSTCLK_OUT#
PEG_RXN12 C7041 2 1 0.22UF/10V PEX_TX12- AJ23 PEX_TX12 PEX_TSTCLK_OUT_N
PEX_TX12_N
EGL X16 Port 0~15 /EGL
PEG_TXP12 AN24
PEG_TXN12 AM24 PEX_RX12
PEX_RX12_N +1.05VS_VGA
PGV X8 Port 0~7 /EGL
PEG_RXP13 C7047 2 1 0.22UF/10V PEX_TX13+ AH23
PEG_RXN13 C7043 2 1 0.22UF/10V PEX_TX13- AG23 PEX_TX13 AG26 +PEX_PLLVDD R7022 2 /DGPU 1 0Ohm
/EGL PEX_TX13_N PEX_PLLVDD

2
PEG_TXP13 AN26 C7052 C7044 C7045
PEG_TXN13 AM26 PEX_RX13
/EGL PEX_RX13_N 0.1UF/16V 1UF/6.3V 4.7UF/6.3V

1
PEG_RXP14 C7049 2 1 0.22UF/10V PEX_TX14+ AK24 /DGPU /DGPU /DGPU
PEG_RXN14 C7048 2 1 0.22UF/10V PEX_TX14- AJ24 PEX_TX14 AK11 GPU_TESTMODE R7004 1 /DGPU 2 10KOhm
/EGL PEX_TX14_N TESTMODE PLACE NEAR BALL PLACE NEAR BGA
PEG_TXP14 AP26
PEG_TXN14 AP27 PEX_RX14
/EGL PEX_RX14_N
A A
PEG_RXP15 C7051 2 1 0.22UF/10V PEX_TX15+ AL25
PEG_RXN15 C7050 2 1 0.22UF/10V PEX_TX15- AK25 PEX_TX15
/EGL PEX_TX15_N
PEG_TXP15 AN27 AP29 PEX_TERMP R7003 1 /DGPU 2 2.49KOhm
PEG_TXN15 AM27 PEX_RX15 PEX_TERMP
PEX_RX15_N

N14P-GT1
/DGPU

Title : N14xxx-PCIE
PEGATRON COMPUTER INC Engineer: Panda_Wang
Size Project Name Rev
C
VA70_HW
P/N 1.3
Date: Friday, January 18, 2013 Sheet 70 of 99
5 4 3 2 1
5 4 3 2 1

76,77 FBAD[0..63] 78,79 FBBD[0..63] +1.05VS_VGA +1.05VS_VGA 63,70,72,91


76,77 FBA_DBI[0..7] 78,79 FBB_DBI[0..7] +1.35VS_VGA +1.35VS_VGA 63,75,76,77,78,79,84
76,77 FBA_EDC[0..7] 78,79 FBB_EDC[0..7] +3VS_VGA +3VS_VGA 63,70,72,74,75,87,91
76,77 FBA_CMD[0..31] 78,79 FBB_CMD[0..31]

U7001B U7001C
2/19 FBA 3/19 FBB

BOT SIDE
FBAD0 L28 E1 FB_CLAMP_R R7121 2 /DGPU 1 0Ohm FB_CLAMP FBBD0 G9
D FBA_D0 FB_CLAMP FB_CLAMP 30,74,84 FBB_D0 D
FBAD1 M29 FBBD1 E9
FBAD2 L29 FBA_D1 R7130 2 /DGPU 1 10KOhm FBBD2 G8 FBB_D1
FBAD3 M28 FBA_D2 +1.05VS_VGA FBBD3 F9 FBB_D2
FBAD4 N31 FBA_D3 /DGPU FBBD4 F11 FBB_D3
FBAD5 P29 FBA_D4 K27 +FB_DLL_AVDD_R GND L7102 1 2 30Ohm/100Mhz FBBD5 G11 FBB_D4
FBAD6 R29 FBA_D5 FB_DLL_AVDD FBBD6 F12 FBB_D5
FBA_D6 FBB_D6

1
FBAD7 P28 50mA C7115 C7121 FBBD7 G12
FBAD8 J28 FBA_D7 0.1UF/10V 22UF/6.3V FBBD8 G6 FBB_D7
FBAD9 H29 FBA_D8 10% /DGPU FBBD9 F5 FBB_D8

2
FBAD10 J29 FBA_D9 /DGPU FBBD10 E6 FBB_D9
FBAD11 H28 FBA_D10 FBBD11 F6 FBB_D10
FBAD12 G29 FBA_D11 FBBD12 F4 FBB_D11
FBAD13 E31 FBA_D12 FBBD13 G4 FBB_D12
FBAD14 E32 FBA_D13 FBBD14 E2 FBB_D13
F30 FBA_D14 F3 FBB_D14
FBAD15
FBA_D15 FB_DLL_AVDD GDDR5 CMD Mapping Table FBBD15
FBB_D15
FBAD16 C34 FBBD16 C2
FBAD17 D32 FBA_D16 FBBD17 D4 FBB_D16
B33 FBA_D17 D3 FBB_D17
FBAD18
FBA_D18 EGL 50mA <0..31> <32..63> MEMORY FBBD18
FBB_D18
FBAD19 C33 1.05V FBBD19 C1
FBAD20 F33 FBA_D19 FBBD20 B3 FBB_D19
FBAD21 F32 FBA_D20 FBBD21 C4 FBB_D20
FBA_D21 PGV 35mA 12 28 RAS* FBB_D21
FBAD22 H33 FBBD22 B5
FBAD23 H32 FBA_D22 FBBD23 C5 FBB_D22
FBAD24 P34 FBA_D23 FBBD24 A11 FBB_D23
FBA_D24 20121212(Eli) 15 31 CAS* FBB_D24
FBAD25 P32 FBBD25 C11
FBAD26 P31 FBA_D25 FB_DLL_AVDD table follow NV FBBD26 D11 FBB_D25
FBAD27 P33 FBA_D26 SPEC DG_06246_001_V04 5 21 WE* FBBD27 B11 FBB_D26
FBA_D27 FBB_D27
FBAD28 L31
FBA_D28
Page121 FBBD28 D8
FBB_D28
FBAD29 L34 FBBD29 A8
L32 FBA_D29 C8 FBB_D29 +1.35VS_VGA
FBAD30
FBA_D30 0 16 CS* FBBD30
FBB_D30
FBAD31 L33 FBBD31 B8
FBAD32 AG28 FBA_D31 FBBD32 F24 FBB_D31 FBB_CMD30 R7119 2 /DGPU 1 10KOhm
AF29 FBA_D32 U30 G23 FBB_D32 D13
FBAD33
FBA_D33 FBA_CMD0
FBA_CMD0 8 24 ABI* FBBD33
FBB_D33 FBB_CMD0
FBB_CMD0
FBAD34 AG29 T31 FBA_CMD1 FBBD34 E24 E14 FBB_CMD1 FBB_CMD14 R7122 2 /DGPU 1 10KOhm
FBAD35 AF28 FBA_D34 FBA_CMD1 U29 FBA_CMD2 +1.35VS_VGA FBBD35 G24 FBB_D34 FBB_CMD1 F14 FBB_CMD2
FBAD36 AD30 FBA_D35 FBA_CMD2 R34 FBA_CMD3 FBBD36 D21 FBB_D35 FBB_CMD2 A12 FBB_CMD3
FBA_D36 FBA_CMD3 10 26 A0_A10 FBB_D36 FBB_CMD3
FBAD37 AD29 R33 FBA_CMD4 FBA_CMD14 R7124 2 /DGPU 1 10KOhm FBBD37 E21 B12 FBB_CMD4
FBAD38 AC29 FBA_D37 FBA_CMD4 U32 FBA_CMD5 FBBD38 G21 FBB_D37 FBB_CMD4 C14 FBB_CMD5
C C
FBAD39 AD28 FBA_D38 FBA_CMD5 U33 FBA_CMD6 FBA_CMD30 2 /DGPU 1 10KOhm FBBD39 F21 FBB_D38 FBB_CMD5 B14 FBB_CMD6 FBB_CMD29 2 /DGPU 1 10KOhm
FBA_D39 FBA_CMD6
R7123 11 27 A1_A9 FBB_D39 FBB_CMD6
R7120
FBAD40 AJ29 U28 FBA_CMD7 FBBD40 G27 G15 FBB_CMD7
FBAD41 AK29 FBA_D40 FBA_CMD7 V28 FBA_CMD8 FBBD41 D27 FBB_D40 FBB_CMD7 F15 FBB_CMD8 FBB_CMD13 R7127 2 /DGPU 1 10KOhm
FBAD42 AJ30 FBA_D41 FBA_CMD8 V29 FBA_CMD9 FBBD42 G26 FBB_D41 FBB_CMD8 E15 FBB_CMD9
FBA_D42 FBA_CMD9 2 18 A2_BA0 FBB_D42 FBB_CMD9
FBAD43 AK28 V30 FBA_CMD10 FBBD43 E27 D15 FBB_CMD10
FBAD44 AM29 FBA_D43 FBA_CMD10 U34 FBA_CMD11 FBBD44 E29 FBB_D43 FBB_CMD10 A14 FBB_CMD11 GND
AM31 FBA_D44 FBA_CMD11 U31 2 /DGPU 1 10KOhm F29 FBB_D44 FBB_CMD11 D14
FBAD45
FBA_D45 FBA_CMD12
FBA_CMD12 FBA_CMD29 R7125 1 17 A3_BA3 FBBD45
FBB_D45 FBB_CMD12
FBB_CMD12
FBAD46 AN29 V34 FBA_CMD13 FBBD46 E30 A15 FBB_CMD13
FBAD47 AM30 FBA_D46 FBA_CMD13 V33 FBA_CMD14 FBA_CMD13 R7126 2 /DGPU 1 10KOhm FBBD47 D30 FBB_D46 FBB_CMD13 B15 FBB_CMD14
AN31 FBA_D47 FBA_CMD14 Y32 A32 FBB_D47 FBB_CMD14 C17
FBAD48
FBA_D48 FBA_CMD15
FBA_CMD15 3 19 A4_BA2 FBBD48
FBB_D48 FBB_CMD15
FBB_CMD15
FBAD49 AN32 AA31 FBA_CMD16 FBBD49 C31 D18 FBB_CMD16
FBAD50 AP30 FBA_D49 FBA_CMD16 AA29 FBA_CMD17 GND FBBD50 C32 FBB_D49 FBB_CMD16 E18 FBB_CMD17
FBAD51 AP32 FBA_D50 FBA_CMD17 AA28 FBA_CMD18 FBBD51 B32 FBB_D50 FBB_CMD17 F18 FBB_CMD18
FBA_D51 FBA_CMD18 4 20 A5_BA1 FBB_D51 FBB_CMD18
FBAD52 AM33 AC34 FBA_CMD19 FBBD52 D29 A20 FBB_CMD19
FBAD53 AL31 FBA_D52 FBA_CMD19 AC33 FBA_CMD20 FBBD53 A29 FBB_D52 FBB_CMD19 B20 FBB_CMD20
FBAD54 AK33 FBA_D53 FBA_CMD20 AA32 FBA_CMD21 FBBD54 C29 FBB_D53 FBB_CMD20 C18 FBB_CMD21
FBA_D54 FBA_CMD21 7 23 A6_A11 FBB_D54 FBB_CMD21
FBAD55 AK32 AA33 FBA_CMD22 FBBD55 B29 B18 FBB_CMD22
FBAD56 AD34 FBA_D55 FBA_CMD22 Y28 FBA_CMD23 FBBD56 B21 FBB_D55 FBB_CMD22 G18 FBB_CMD23
FBAD57 AD32 FBA_D56 FBA_CMD23 Y29 FBA_CMD24 FBBD57 C23 FBB_D56 FBB_CMD23 G17 FBB_CMD24
FBA_D57 FBA_CMD24 6 22 A7_A8 FBB_D57 FBB_CMD24
FBAD58 AC30 W31 FBA_CMD25 FBBD58 A21 F17 FBB_CMD25
FBAD59 AD33 FBA_D58 FBA_CMD25 Y30 FBA_CMD26 FBBD59 C21 FBB_D58 FBB_CMD25 D16 FBB_CMD26
AF31 FBA_D59 FBA_CMD26 AA34 B24 FBB_D59 FBB_CMD26 A18
FBAD60
FBA_D60 FBA_CMD27
FBA_CMD27 9 25 A12_RFU FBBD60
FBB_D60 FBB_CMD27
FBB_CMD27
FBAD61 AG34 Y31 FBA_CMD28 FBBD61 C24 D17 FBB_CMD28
FBAD62 AG32 FBA_D61 FBA_CMD28 Y34 FBA_CMD29 FBBD62 B26 FBB_D61 FBB_CMD28 A17 FBB_CMD29
AG33 FBA_D62 FBA_CMD29 Y33 C26 FBB_D62 FBB_CMD29 B17
FBAD63
FBA_D63 FBA_CMD30
FBA_CMD30 14 30 CKE* FBBD63
FBB_D63 FBB_CMD30
FBB_CMD30
V31 FBA_CMD31 E17 FBB_CMD31
FBA_CMD31 FBB_CMD31
FBA_DBI0 P30 R32 13 29 RESET* FBB_DBI0 E11 C12
FBA_DBI1 F31 FBA_DQM0 FBA_CMD_RFU0 AC32 FBB_DBI1 E3 FBB_DQM0 FBB_CMD_RFU0 C20
FBA_DBI2 F34 FBA_DQM1 FBA_CMD_RFU1 FBB_DBI2 A3 FBB_DQM1 FBB_CMD_RFU1
FBA_DBI3 M32 FBA_DQM2 FBB_DBI3 C9 FBB_DQM2
FBA_DBI4 AD31 FBA_DQM3 +1.35VS_VGA FBB_DBI4 F23 FBB_DQM3
FBA_DBI5 AL29 FBA_DQM4 FBB_DBI5 F27 FBB_DQM4 +1.35VS_VGA
FBA_DBI6 AM32 FBA_DQM5 FBB_DBI6 C30 FBB_DQM5
FBA_DBI7 AF34 FBA_DQM6 R28 FBA_DEBUG0 R7101 1 @ 2 60.4Ohm 1% FBB_DBI7 A24 FBB_DQM6 G14 FBC_DEBUG0 R7103 1 @ 2 60.4Ohm 1%
FBA_DQM7 FBA_DEBUG0 AC28 FBA_DEBUG1 R7102 1 @ 2 60.4Ohm 1% FBB_DQM7 FBB_DEBUG0 G20 FBC_DEBUG1 R7104 1 @ 2 60.4Ohm 1%
FBA_DEBUG1 FBB_DEBUG1
B B
FBA_EDC0 M31 FBB_EDC0 D10
FBA_EDC1 G31 FBA_DQS_WP0 FBB_EDC1 D5 FBB_DQS_WP0
FBA_EDC2 E33 FBA_DQS_WP1 R30 FBB_EDC2 C3 FBB_DQS_WP1 D12
M33 FBA_DQS_WP2 FBA_CLK0 R31 FBA_CLK0 76 B9 FBB_DQS_WP2 FBB_CLK0 E12 FBB_CLK0 78
FBA_EDC3 FBB_EDC3
FBA_DQS_WP3 FBA_CLK0_N FBA_CLK0# 76 FBB_DQS_WP3 FBB_CLK0_N FBB_CLK0# 78
FBA_EDC4 AE31 AB31 FBB_EDC4 E23 E20
FBA_DQS_WP4 FBA_CLK1 FBA_CLK1 77 FBB_DQS_WP4 FBB_CLK1 FBB_CLK1 79
FBA_EDC5 AK30 AC31 FBB_EDC5 E28 F20
AN33 FBA_DQS_WP5 FBA_CLK1_N FBA_CLK1# 77 B30 FBB_DQS_WP5 FBB_CLK1_N FBB_CLK1# 79
FBA_EDC6 FBB_EDC6
FBA_EDC7 AF33 FBA_DQS_WP6 FBB_EDC7 A23 FBB_DQS_WP6
FBA_DQS_WP7 FBB_DQS_WP7
+FB_PLL_AVDD +1.05VS_VGA
M30 K31 L7101 D9 F8
H30 FBA_DQS_RN0 FBA_WCK01 L30 FBA_WCK01 76 1 2 E4 FBB_DQS_RN0 FBB_WCK01 E8 FBB_WCK01 78
FBA_DQS_RN1 FBA_WCK01_N FBA_WCK01# 76 FBB_DQS_RN1 FBB_WCK01_N FBB_WCK01# 78
E34 H34 B2 A5
FBA_DQS_RN2 FBA_WCK23 FBA_WCK23 76 FBB_DQS_RN2 FBB_WCK23 FBB_WCK23 78
1

M34 J34 C7112 30Ohm/100Mhz C7113 A9 A6


FBA_DQS_RN3 FBA_WCK23_N FBA_WCK23# 76 FBB_DQS_RN3 FBB_WCK23_N FBB_WCK23# 78
AF30 AG30 1UF/6.3V /PGV 1UF/6.3V D22 D24
FBA_DQS_RN4 FBA_WCK45 FBA_WCK45 77 FBB_DQS_RN4 FBB_WCK45 FBB_WCK45 79
AK31 AG31 10% 10% D28 D25
FBA_WCK45# 77 FBB_WCK45# 79
2

AM34 FBA_DQS_RN5 FBA_WCK45_N AJ34 /DGPU /PGV A30 FBB_DQS_RN5 FBB_WCK45_N B27
FBA_DQS_RN6 FBA_WCK67 FBA_WCK67 77 FBB_DQS_RN6 FBB_WCK67 FBB_WCK67 79
AF32 AK34 B23 C27
FBA_DQS_RN7 FBA_WCK67_N FBA_WCK67# 77 FBB_DQS_RN7 FBB_WCK67_N FBB_WCK67# 79
J30 D6
FBA_WCKB01 J31 +3VS_VGA FBB_WCKB01 D7
FBA_WCKB01_N J32 L7103 FBB_WCKB01_N C6
FBA_WCKB23 J33 1 2 FBB_WCKB23 B6
FBA_WCKB23_N AH31 FBB_WCKB23_N F26
FBA_WCKB45 FBB_WCKB45
1

AJ31 +FB_PLL_AVDD 30Ohm/100Mhz C7122 E26 +FB_PLL_AVDD


FBA_WCKB45_N AJ32 FBB_WCKB45_N A26
FBA_WCKB67 FBx_PLL_AVDD /EGL 1UF/6.3V
FBB_WCKB67
AJ33 10% A27
2

FBA_WCKB67_N /EGL FBB_WCKB67_N


T7101 1 H26 U27 EGL 3.3V 120mA H17
FB_VREF FBA_PLL_AVDD FBB_PLL_AVDD
1

1
120mA C7109 C7119 20121214(Eli) 120mA
N14P-GT1 0.1UF/10V 22UF/6.3V PGV 1.05V 62mA R7129 change to bead type N14P-GT1 C7120
/DGPU /DGPU /DGPU /DGPU 0.1UF/10V
2

2
30ohm(ESR=0.01ohm) follow 10%
Place Close to BGA NV FAE recommend /DGPU

A Place Close to BALL Place Close to BGA Place Close to BALL A

Title : N14xxx BUFFER


PEGATRON COMPUTER INC Engineer: Panda_Wang
Size Project Name Rev
C
VA70_HW
P/N 1.3
Date: Friday, January 18, 2013 Sheet 71 of 99
5 4 3 2 1
5 4 3 2 1

VGA +1.05VS_VGA
+3VS_VGA
+1.05VS_VGA 63,70,71,91
+3VS_VGA 63,70,71,74,75,87,91

D D

20120731(Eli) +3VS_VGA
follow NV SPEC DG_06246_001_V03 page171
DAC didn't use
1.DACA_VDD floating
2.DAC I/O Pins floating

2
RN7201B RN7201A
2.2KOhm 2.2KOhm
/DGPU /DGPU
U7001N
4/19 DACA

1
20121214(Eli)
Modify RN7201 optional from @ to /DGPU and remove R7201 AG10 R4 DDC_CLK_VGA
follow NV FAE recommend DACA_VDD I2CA_SCL R5 DDC_DATA_VGA
AP9 I2CA_SDA
DACA_VREF
AP8 AM9
DACA_RSET DACA_HSYNC AN9
DACA_VSYNC

AK9
DACA_RED
AL10
DACA_GREEN
AL9
DACA_BLUE

N14P-GT1 /DGPU

C C

X'TAL

B B

+1.05VS_VGA

L7202 1 2 30Ohm/100Mhz
/DGPU U7001O
1

C7207 C7208 12/19 XTAL_PLL


22UF/6.3V 0.1UF/16V
/DGPU /DGPU 78 mA
2

+1.05VS_VGA +PLL_VDD AD8


AE8 PLLVDD
SP_PLLVDD
71 mA
L7203 1 2 180Ohm/100Mhz +SP_PLLVDD AD7
/DGPU VID_PLLVDD
41 mA
1

C7211 C7209 C7210 C7215


22UF/6.3V 4.7UF/6.3V 0.1UF/16V 0.1UF/16V
2

/DGPU /DGPU /DGPU /DGPU XTALSSIN H1 J4 XTAL_OUTB


XTAL_SSIN XTAL_OUTBUFF

Place Close to BALLS H3 H2


XTAL_IN XTAL_OUT
3

1
RN7203B N14P-GT1 /DGPU RN7203A
10KOhm 10KOhm
/DGPU VGA_XTALIN 1 3 VGA_XTALOUT /DGPU

C7212 C7213
4

2
8.2PF/50V X7201 8.2PF/50V
2

1AV200000082 27MHZ 1AV200000082


/DGPU /DGPU /DGPU

STUFF PDs on XTALSSIN and


XTALOUTBUFF WHEN EXT_SS IS NOT USED
A A

Title : N14xxx_RGB,XTAL
PEGATRON COMPUTER INC Engineer: Panda_Wang
Size Project Name Rev
C
VA70_HW
P/N 1.3
Date: Friday, January 18, 2013 Sheet 72 of 99
5 4 3 2 1
5 4 3 2 1

+3VS_VGA +3VS_VGA 63,70,71,72,74,75,87,91


LVDS DVI
U7001J
6/19 IFPAB 20121214(Eli) U7001M
9/19 IFPEF
Remove R7303, R7304, R7305, R7306, R7308, R7309, R7310,
R7312, RN7301, RN7302 follow NV FAE recommend
AN6
IFPA_TXC_N AM6
AJ8 IFPA_TXC
IFPAB_RSET
AN3
IFPA_TXD0_N AP3 AB4
IFPA_TXD0 IFPE_AUX_I2CY_SDA_N AB3
D
AH8 AB8 IFPE_AUX_I2CY_SCL D
IFPAB_PLLVDD AM5 IFPEF_PLLVDD
IFPA_TXD1_N AN5 AC5
IFPA_TXD1 AD6 IFPE_L3_N AC4
IFPEF_RSET IFPE_L3
AK6 AC3
IFPA_TXD2_N AL6 IFPE_L2_N AC2
IFPA_TXD2 IFPE_L2
AC1
AH6 IFPE_L1_N AD1
IFPA_TXD3_N
IFPA_TXD3
AJ6 IFPE IFPE_L1
AD3
IFPE_L0_N AD2
AH9 IFPE_L0
IFPB_TXC_N AJ9
IFPB_TXC
AG8
IFPA_IOVDD AP5
AG9 IFPB_TXD4_N AP6 R1
IFPB_IOVDD IFPB_TXD4 GPIO18

AL7
IFPB_TXD5_N AM7
IFPB_TXD5

AM8
IFPB_TXD6_N AN8 AC7
IFPB_TXD6 IFPE_IOVDD AF2
IFPF_AUX_I2CZ_SDA_N AF3
AL8 AC8 IFPF_AUX_I2CZ_SCL
IFPB_TXD7_N AK8 IFPF_IOVDD
IFPB_TXD7 AF1
IFPF_L3_N AG1
IFPF_L3
AD5
IFPF_L2_N AD4
N4 IFPF_L2
GPIO14 AF5
C
IFPAB IFPF IFPF_L1_N AF4
C

IFPF_L1
N14P-GT1 AE4
/DGPU IFPF_L0_N AE3
IFPF_L0

HDMI P3
U7001K GPIO19
7/19 IFPC

N14P-GT1
/DGPU
AF8 20121221(Eli)
IFPC_RSET
Remove T7301, T7302, T7303, T7304 follow NV FAE recommend
AF7 AG2
IFPC_PLLVDD IFPC_AUX_I2CW_SDA_N AG3
IFPC_AUX_I2CW_SCL

AG4
IFPC_L3_N AG5
IFPC_L3
AH4
IFPC IFPC_L2_N AH3
IFPC_L2 IFPX channel
AJ2
IFPC_L1_N AJ3
IFPC_L1
N14E-GL N14P-GV
AJ1
IFPC_L0_N AK1
Standard Mode Combined Mode
IFPC_L0

B
IFPA LVDS LVDS(DP/DVI) B
AF6 P2
IFPC_IOVDD GPIO15
IFPB LVDS LVDS(DP/DVI)
N14P-GT1
/DGPU IFPC DP/HDMI DP/HDMI

IFPD DP/eDP DP/eDP

IFPE DP/DVI X
eDP
IFPF DP/DVI X
U7001L
8/19 IFPD

AN2
IFPD_RSET
GPIO Definition
NV SPEC
AG7 AK2
IFPD_PLLVDD IFPD_AUX_I2CX_SDA_N AK3
Standard mode
IFPD_AUX_I2CX_SCL DG_06246_001_V03 VA70_HW

AK5
IFPD_L3_N AK4
IFPD_L3 GPIO14 IFPAB_HPD(LVDS) NC
AL4
IFPD IFPD_L2_N AL3
IFPD_L2 GPIO15 IFPC_HPD(HDMI) NC
AM4
IFPD_L1_N AM3
A
IFPD_L1 GPIO17 IFPD_HPD(eDP) NC A

AM2
IFPD_L0_N AM1
IFPD_L0 GPIO18 IFPE_HPD(DVI) NC

GPIO19 IFPF_HPD(DVI) NC
AG6 M6
IFPD_IOVDD GPIO17

N14P-GT1
/DGPU
Title : N14xxx_LVDS_HDMI
PEGATRON COMPUTER INC Engineer: Panda_Wang
Size Project Name Rev
C
VA70_HW
P/N 1.3
Date: Friday, January 18, 2013 Sheet 73 of 99
5 4 3 2 1
5 4 3 2 1

+3VS_VGA +3VS_VGA 63,70,71,72,75,87,91 N14E-GL/P-GV Strap Resistance Mapping to Hex Values

Resistor Values Pull-up to VDD33 Pull-down to GND

GPU DEVICE ID 4.99K 1000 0000

N14E-GL N14P-GV 10.0K 1001 0001

+3VS_VGA +3VS_VGA +3VS_VGA +3VS_VGA


0x11E3 0x1294 15.0K 1010 0010

20.0K 1011 0011

1
R7459 R7455 C7401 R7460 +3VS_VGA

1
1KOhm 10KOhm 0.1UF/16V 1KOhm
D
/EGL /EGL /EGL /EGL
VRAM CFG--ROM_SI 24.9K 1100 0100 D

2
64Mx32 30.1K 1101 0101

2
U7402
VGA_ROM_CS_R 1 8 R7410 R7412 R7414 R7417 R7418
ROM_SO 2 CE# VCC 7 VGA_HOLD# 45.3KOhm 34.8KOhm 30KOhm 45.3KOhm 45.3KOhm HYNIX 0x6
VGA_WP# 3 SO HOLD# 6 VGA_ROM_SCLK_R
34.8K 1110 0110
1% 1% 1% 1% 1%
4 WP# SCK 5 VGA_ROM_SI_R /DGPU @ @ @ @

1
GND SIO STRAP0
PM25LD010C-SCE STRAP1
45.3K 1111 0111
/EGL (2 Mb) STRAP2
STRAP3
STRAP4
N14E-GL/P-GV Multi-Level Mode Strapping

Resistor Values Bit3 Bit2 Bit1 Bit0

2
U7001P
13/19 MISC2 R7411 R7413 R7415 R7416 R7419
45.3KOhm 4.99KOhm 20KOhm 4.99KOhm 45.3KOhm STRAP0 USER[3] USER[2] USER[1] USER[0]
1% 1% 1% 1% 1%
@ /EGL_PGV /EGL_PGV /DGPU /DGPU

1
H6 ROM_CS_N R7454 2 /EGL 1 33Ohm VGA_ROM_CS_R
STRAP1 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0]
ROM_CS_N
H5 ROM_SI R7452 2 /EGL 1 33Ohm VGA_ROM_SI_R
ROM_SI H7 ROM_SO
STRAP2 PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]
STRAP0 J2 ROM_SO H4 ROM_SCLK R7453 2 /EGL 1 33Ohm VGA_ROM_SCLK_R
STRAP1 J7 STRAP0 ROM_SCLK +3VS_VGA
STRAP2 J6 STRAP1 STRAP3 SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED
STRAP3 J5 STRAP2
STRAP4 J3 STRAP3
STRAP4 STRAP4 RESERVED PCIE_SPEED_CHANGE_GEN3 PCIE_MAX_SPEED DP_PLL_VDD33V

2
10/17 Change R7402 optional from /DGPU to @ R7404 R7405 R7406
(NV FAE confirmed)(Panda) 5.1KOhm 4.99KOhm 4.99KOhm ROM_SCLK PCI_DEVICE[4] SUB_VENDOR PCI_DEVID[5] PEX_PLL_EN_TERM
1% 1% 1%
L2 VGA_BUFRST_N R7402 2 @ 1 10KOhm @ /DGPU /PGV

1
BUFRST_N ROM_SI
ROM_SO
ROM_SI RAM_CFG[3] RAM_CFG[2] RAM_CFG[1] RAM_CFG[0]
ROM_SCLK
STRAP_REFGND J1 L3 VGA_CEC 1 T7402 ROM_SO FB[1] FB[0] SMB_ALT_ADDR VGA_DEVICE

2
MULTI_STRAP_REF0_GND CEC
2

C R7407 R7408 R7409 C


R7401 34.8KOhm 10KOhm 34.8KOhm
40.2KOhm 1% 1% 1%
SUB_VRNDOR
B build N14E-GL N14P-GV
1% /DGPU @ /EGL

1
/DGPU N14E-GL N14P-GV
1

DEVICE ID 0x11E3 0x1294


N14P-GT1 1 0 STRAP0 45K PU 45K PU
/DGPU

+3VS_VGA
STRAP1 5K PD 45K PD
BIOS ROM is present No Video BIOS ROM
STRAP2 20K PD 25K PD
STRAP3 5K PD 5K PD
STRAP4 45K PD 45K PD

1
3
RN7422A RN7422B ROM_SCLK 35K PD 5K PU
10KOhm 10KOhm
/DGPU /DGPU ROM_SI 35K PD 35K PD
+3VS_VGA PEX_RST 70,74
ROM_SO 5K PU 5K PU

2
4
Q7403

1
G
2N7002
VGA_OVERTEMP#_R /DGPU
GPIO Definition

2 S

3
VGA_OVERTEMP# 47

D
NV SPEC
Standard mode
DG_06246_001_V03 VA70_HW
1

R7461 2 1 0OhmVGA_THERM_ALERT#_Q

S 2
VGA_THERM_ALERT# @

D
THERM_ALERT#_EC 30

3
R7441 R7442 +3VS_VGA
2.2KOhm 2.2KOhm /DGPU

G
1
/DGPU /DGPU Q7405A 2N7002 GPIO0 FB_CLAMP_MON FB_CLAMP_MON
UM6K1N AC_BATT# R7462 2 /DGPU 1 0Ohm Q7402
2

U7001Q /DGPU
11/19 MISC1 12/19 Add R7461, R7462 reserved for GPIO1 MEM_VDD_CTL NC
T4 SMB_CLK_VGA 1 6 protect battery(Eli)
I2CS_SCL T3 4 3 SMB1_CLK 28,30,49 +3VS_VGA
SMB_DAT_VGA
I2CS_SDA SMB1_DAT 28,30,49
GPIO2 LCD_BL_PWM NC
R2 RN7423B 4 3 /DGPU
I2CC_SCL 2.2KOhm
R3 RN7423A 2 1 /DGPU UM6K1N
2.2KOhm +3VS_VGA
5

B I2CC_SDA B
Q7405B GPIO3 LCD_VCC NC
R7 RN7415B 4 3 /DGPU /DGPU
I2CB_SCL 2.2KOhm
T7420 1 VGA_THERMDN K4 R6 RN7415A 2 1 /DGPU +3VS_VGA
THERMDN I2CB_SDA 2.2KOhm +3VS_VGA
GPIO4 LCD_BLEN NC
T7421 1 VGA_THERMDP K3 @
THERMDP +3VS_VGA R7450 2 1 0Ohm
GPIO5 Reserved Reserved
T7422 1 VGA_JTAG_TCK AM10
T7423 1 VGA_JTAG_TMS AP11 JTAG_TCK R7457 2 /DGPU 1 0Ohm
1 VGA_JTAG_TDI AM11 JTAG_TMS +3VS_VGA +3VS_VGA
T7424
JTAG_TDI GPIO6 FB_CLAMP_TGL_REQ FB_CLAMP_TGL_REQ#
T7425 1 VGA_JTAG_TDO AP12
T7426 1 VGA_JTAG_TRST_N AN11 JTAG_TDO P6 FB_CLAMP_MON R7458 2 @ 1 0Ohm U7401
PEX_RST 70,74
1

JTAG_TRST_N GPIO0 M3 5 A 1
GPIO1 VCC FB_CLAMP 30,71,84 GPIO7 3DVision NC
L6 R7448 Q7406
GPIO2
2

P5 10KOhm 2N7002 B 2
GPIO3 P7 DGPU_EN_PWR 84,87,91,93
R7440 /DGPU /DGPU GPIO8 OVERT VGA_OVERTEMP#
1

GPIO4 +3VS_VGA
G

10KOhm L7 GPIO5_PWM_VID_BOOT_EN 1 T7427 FB_CLAMP_MON 4 3


2

GPIO5 M7 GND
FB_CLAMP_TGL_REQ_R Y
2 S

/DGPU GPIO6 FB_CLAMP_TGL_REQ# 30


N8
D

SN74LVC1G08DCKR GPIO9 ALERT VGA_THERM_ALERT#


1

GPIO7
1

M1 VGA_OVERTEMP#_R 2 /DGPU
GPIO8 M2 VGA_THERM_ALERT# R7443 R7451
GPIO9 L1 GPIO10_FBVREF_ALTV
GPIO10 GPIO10_FBVREF_ALTV 76,77,78,79
10KOhm 10KOhm GPIO10 MEM_VREF_CTL MEM_VREF_CTL
M5 VGA_VID /DGPU @
GPIO11 N3 VGA_VID 87
AC_BATT#
2

GPIO12 M4 VGA_DPRSLPVR_GPIO16 R7444 2 /DGPU 1 0Ohm VGA_PSI#


GPIO13 VGA_PSI# 87 GPIO11 PWM_VID VGA_VID
R8
GPIO16 P4
GPIO20 P1
GPIO21 GPIO12 PWR_LEVEL AC_BATT#
GPIO10_FBVREF_ALTV R7456 1 /DGPU 2 100KOhm
GPIO13 PSI VGA_PSI#

GPIO16 FRM_LCK NC
12/12 Change R7456 from 10K to 100K follow NV
SPEC DG_06246_001_V04 Page185 (NV FAE confirmed)(Panda)
N14P-GT1 GPIO20 Reserved NC
/DGPU
+3VS_VGA +3VS_VGA
GPIO21 Reserved NC
2

A A
R7421 R7423
10KOhm 10KOhm
/DGPU @
1

AC_BATT#
Q7401B
3

UM6K1N
@
5
Q7401A
4

UM6K1N
@
Title : N14xxx_GPIO,STRAP
2
AC_IN_OC 30,88,90 PEGATRON COMPUTER INC Engineer: Panda_Wang
1

Size Project Name


A2
VA70_HW Rev
P/N 1.3
Date: Friday, January 18, 2013 Sheet 74 of 99
5 4 3 2 1
5 4 3 2 1

+3VS_VGA +3VS_VGA 63,70,71,72,74,87,91


+1.35VS_VGA +1.35VS_VGA 63,71,76,77,78,79,84
+VGA_VCORE +VGA_VCORE 63,87

+VGA_VCORE
U7001E +3VS_VGA
14/19 NVVDD 85mA XVDD
PLACE UNDER GPU U7001F +VDD33_GPU R7501 2 /DGPU 1 0Ohm
AA12 18/19 NC/VDD33
VDD1

2
AA14 C7507 C7501 C7504 C7502 C7503 EGL floating
VDD2

1
AA16 C7511 C7510 C7513 C7512 C7515 C7514 C7517 C7516 AC6 J8
VDD3 AA19 AJ28 NC1 3V3MISC_1 K8 0.1UF/16V 0.1UF/16V 0.1UF/16V 1UF/6.3V 4.7UF/6.3V

1
VDD4 AA21 AJ4 NC2 3V3MISC_2 L8
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V /DGPU /DGPU /DGPU /DGPU /DGPU PGV NC

2
D VDD5 AA23 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU AJ5 NC3 VDD33_1 M8 D
VDD6 AB13 AL11 NC4 VDD33_2
VDD7 AB15 C15 NC5 U7001H
VDD8 AB17 GND D19 NC6
10/19 XVDD
VDD9 NC7
AB18 D20 Place near BALLs Place near BGA GND
VDD10 NC8

1
AB20 C7518 C7519 C7520 C7521 C7522 C7523 C7524 C7530 D23 CONFIGURABLE
VDD11 AB22 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V D26 NC9
POWER
VDD12 AC12 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU H31 NC10
2 CHANNELS

2
VDD13 AC14 T8 NC11 U1
VDD14 AC16 V32 NC13 XVDD_1 U2
VDD15 AC19 NC14 XVDD_2 U3
VDD16 AC21 XVDD_3 U4
VDD17 AC23 XVDD_4 U5
VDD18 M12 GND XVDD_5 U6
VDD19 XVDD_6
1

1
M14 C7525 C7526 C7527 C7528 C7529 C7536 C7537 N14P-GT1 U7
VDD20 M16 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V /DGPU XVDD_7 U8
VDD21 M19 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU XVDD_8
2

2
VDD22 M21
VDD23 M23 V1
VDD24 N13 XVDD_9 V2
VDD25 N15 XVDD_10 V3
VDD26 N17 XVDD_11 V4
VDD27 N18 GND XVDD_12 V5
VDD28 N20 XVDD_13 V6
VDD29 XVDD_14
1

1
N22 C7531 C7532 C7533 C7535 C7534 C7552 C7553 CE7501 V7
VDD30 P12 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 22UF/6.3V 47UF/4V 330UF/2V XVDD_15 V8
VDD31 P14 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU @ /DGPU XVDD_16
2

2
VDD32 P16
VDD33 P19 W2
VDD34 P21 XVDD_17 W3
VDD35 P23 XVDD_18 W4
VDD36 R13 XVDD_19 W5
VDD37 R15 GND XVDD_20 W7
VDD38 R17 XVDD_21 W8
VDD39 XVDD_22
1

1
R18 C7547 C7566 C7567 C7568 C7569 C7570 C7571
VDD40 R20 4.7UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V
VDD41 R22 @ @ @ @ @ @ @
2

2
VDD42 T12
C C
VDD43 T14 Y1
VDD44 T16 XVDD_23 Y2
VDD45 T19 XVDD_24 Y3
VDD46 T21 GND XVDD_25 Y4
VDD47
PLACE NEAR GPU XVDD_26
T23 Y5
VDD48 U13 XVDD_27 Y6
VDD49 U15 XVDD_28 Y7
VDD50 U17 XVDD_29 Y8
VDD51 U18 XVDD_30
VDD52 U20
VDD53 U22 +1.35VS_VGA +1.35VS_VGA AA1
VDD54 V13 U7001G U7001D XVDD_31 AA2
VDD55 V15 XVDD_32 AA3
16/19 GND_1/2 15/19 FBVDDQ
VDD56 V17 A2 AM25 XVDD_33 AA4
VDD57 V18 AA17 GND1 GND73 AN1 AA27 XVDD_34 AA5
VDD58 GND5 GND74 FBVDDQ1 XVDD_35

1
V20 AA18 AN10 AA30 C7539 C7559 C7544 C7538 C7574 C7555 C7554 C7541 AA6
VDD59 V22 AA20 GND6 GND75 AN13 AB27 FBVDDQ2 XVDD_36 AA7
VDD60 W12 AA22 GND7 GND76 AN16 AB33 FBVDDQ3 0.1UF/16V 0.1UF/16V 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 10UF/6.3V 22UF/6.3V XVDD_37 AA8

2
VDD61 W14 AB12 GND8 GND77 AN19 AC27 FBVDDQ4 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU XVDD_38
VDD62 W16 AB14 GND9 GND78 AN22 AD27 FBVDDQ5
VDD63 W19 AB16 GND10 GND79 AN25 AE27 FBVDDQ6 N14P-GT1
VDD64 W21 AB19 GND11 GND80 AN30 AF27 FBVDDQ7 /DGPU
VDD65 W23 AB2 GND12 GND81 AN34 AG27 FBVDDQ8 GND
VDD66 Y13 AB21 GND13 GND82 AN4 B13 FBVDDQ9
VDD67 GND14 GND83 FBVDDQ10

1
Y15 A33 AN7 B16 C7551 C7556 C7545 C7560 C7575 C7562 C7550 C7557
VDD68 Y17 AB23 GND2 GND84 AP2 B19 FBVDDQ11
VDD69 Y18 AB28 GND15 GND85 AP33 E13 FBVDDQ12 0.1UF/16V 0.1UF/16V 1UF/6.3V 1UF/6.3V 4.7UF/6.3V 4.7UF/6.3V 10UF/6.3V 22UF/6.3V

2
VDD70 Y20 AB30 GND16 GND86 B1 E16 FBVDDQ13 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU
VDD71 Y22 AB32 GND17 GND87 B10 E19 FBVDDQ14
VDD72 AB5 GND18 GND88 B22 H10 FBVDDQ15
AB7 GND19 GND89 B25 H11 FBVDDQ16
AC13 GND20 GND90 B28 H12 FBVDDQ17
N14P-GT1 AC15 GND21 GND91 B31 H13 FBVDDQ18 GND
/DGPU AC17 GND22 GND92 B34 H14 FBVDDQ19
GND23 GND93 FBVDDQ20
Place Close to BALLs Place Under to BGA Place Close to BGA
AC18 B4 H15
AA13 GND24 GND94 B7 H16 FBVDDQ21
AC20 GND3 GND95 C10 H18 FBVDDQ22
U7001I GND25 GND96 FBVDDQ23

1
B B
17/19 GND_2/2
AC22 C13 H19 C7563 C7564 C7565
AE2 GND26 GND97 C19 H20 FBVDDQ24 @ @ @
N19 T28 AE28 GND27 GND98 C22 H21 FBVDDQ25 0.1UF/16V 0.1UF/16V 0.1UF/16V

2
N2 GND143 GND172 T32 AE30 GND28 GND99 C25 H22 FBVDDQ26
N21 GND144 GND173 T5 AE32 GND29 GND100 C28 H23 FBVDDQ27
N23 GND145 GND174 T7 AE33 GND30 GND101 C7 H24 FBVDDQ28
N28 GND146 GND175 U12 AE5 GND31 GND102 D2 H8 FBVDDQ29
N30 GND147 GND176 U14 AE7 GND32 GND103 D31 H9 FBVDDQ30
N32 GND148 GND177 U16 AH10 GND33 GND104 D33 L27 FBVDDQ31 GND
N33 GND149 GND178 U19 AA15 GND35 GND105 E10 M27 FBVDDQ32
N5 GND150 GND179 U21 AH13 GND4 GND106 E22 N27 FBVDDQ33 Add C7563,C7564,C7565 (0.1uF) at
N7 GND151 GND180 U23 AH16 GND37 GND107 E25 P27 FBVDDQ34 +1.35VS_VGA (EMI Recommend)
P13 GND152 GND181 V12 AH19 GND38 GND108 E5 R27 FBVDDQ35
P15 GND153 GND182 V14 AH2 GND39 GND109 E7 T27 FBVDDQ36
P17 GND154 GND183 V16 AH22 GND40 GND110 F28 T30 FBVDDQ37
P18 GND155 GND184 V19 AH24 GND41 GND111 F7 T33 FBVDDQ38
P20 GND156 GND185 V21 AH28 GND42 GND112 G10 V27 FBVDDQ39
P22 GND157 GND186 V23 AH29 GND43 GND113 G13 W27 FBVDDQ40
R12 GND158 GND187 W13 AH30 GND44 GND114 G16 W30 FBVDDQ41
R14 GND159 GND188 W15 AH32 GND45 GND115 G19 W33 FBVDDQ42
R16
R19
GND160
GND161
GND162
GND189
GND190
GND191
W17
W18
AH33
AH5
GND46
GND47
GND48
GND116
GND117
GND118
G2
G22
Y27 FBVDDQ43
FBVDDQ44 Check with NV T7508
R21 W20 AH7 G25
R23 GND163 GND192 W22 AJ7 GND49 GND119 G28 F1 FBVDDQ_SENSE 1
T13 GND164 GND193 W28 AK10 GND50 GND120 G3 FB_VDDQ_SENSE
GND165 GND194 GND51 GND121 T7509
T15 Y12 AK7 G30
T17 GND166 GND195 Y14 AL12 GND52 GND122 G32 F2 FBVDDQ_GND_SENSE 1
T18 GND167 GND196 Y16 AL14 GND53 GND123 G33 FB_GND_SENSE +1.35VS_VGA
T2 GND168 GND197 Y19 AL15 GND54 GND124 G5
T20 GND169 GND198 Y21 AL17 GND55 GND125 G7 J27 +FB_CAL_PD_VDDQ R7507 1 /DGPU 2 40.2Ohm 1%
T22 GND170 GND199 Y23 AL18 GND56 GND126 K2 FB_CAL_PD_VDDQ
GND171 GND200 AL2 GND57 GND127 K28
AL20 GND58 GND128 K30 H27 +FB_CAL_PU_GND R7509 1 /DGPU 2 40.2Ohm 1%
AL21 GND59 GND129 K32 FB_CAL_PU_GND CALIBRATION PIN DDR3 GDDR5
AL23 GND60 GND130 K33 FB_CALx_PD_VDDQ
AL24 GND61 GND131 K5 H25 +FB_CAL_TERM_GND R7510 /DGPU 60.4Ohm 40 40.2
AL26 GND62 GND132 K7 FB_CAL_TERM_GND
FB_CALx_PU_GND
AG11 AH11 AL28 GND63 GND133 M13 42.2 40.2
A A
GND34 GND36 AL30 GND64 GND134 M15 FB_CALx_TERM_GND
AL32 GND65 GND135 M17 N14P-GT1 GND 51.1 60.4
AL33 GND66 GND136 M18 /DGPU
GND67 GND137
Place Close to BALLs
GND AL5 M20
AM13 GND68 GND138 M22
AM16 GND69 GND139 N12
AM19 GND70 GND140 N14
C16 AM22 GND71 GND141 N16
GND_OPT1 W32 GND72 GND142
GND_OPT2
Optional CMD GNDs (2)
NC for 4-Lyr cards
Title : N14xxx_Power,GND
N14P-GT1 Engineer: Panda_Wang
GND GND /DGPU GND PEGATRON COMPUTER INC
N14P-GT1 Size Project Name Rev
/DGPU C
VA70_HW
P/N 1.3
Date: Friday, January 18, 2013 Sheet 75 of 99
5 4 3 2 1
5 4 3 2 1

FBA-Lower Half
71,77 FBAD[0..63]
71,77 FBA_CMD[0..31]
71,77 FBA_DBI[0..7] +1.35VS_VGA +1.35VS_VGA 63,71,75,77,78,79,84
71,77 FBA_EDC[0..7]
U7601C
Byte 0 Byte 2 FBA_CMD12 G3
RAS#
FBA_CMD15 L3
FBA_CMD5 L12 CAS# U7601D
U7601A U7601B FBA_CMD0 G12 WE#
CS# +1.35VS_VGA
FBA_CMD8 J4 FBA_SOE0 J1
FBAD0 A4 FBAD16 U11 ABI# B10 MF C10
DQ0 DQ16 VSS1 VDD1

2
FBAD1 A2 FBAD17 U13 FBA_CMD10 H4 B5 C5
FBAD2 B4 DQ1 FBAD18 T11 DQ17 FBA_CMD11 H5 A10/A0 R7609 D10 VSS2 VDD2 D11
FBAD3 B2 DQ2 FBAD19 T13 DQ18 +1.35VS_VGA FBA_CMD2 H11 A9/A1 1KOhm G10 VSS3 VDD3 G1
FBAD4 E4 DQ3 FBAD20 N11 DQ19 FBA_CMD1 H10 BA0/A2 5% G5 VSS4 VDD4 G11
D
FBAD5 E2 DQ4 FBAD21 N13 DQ20 FBA_CMD3 K11 BA3/A3 /DGPU H1 VSS5 VDD5 G14 D

1
DQ5 DQ21 BA2/A4 VSS6 VDD6

2
FBAD6 F4 FBAD22 M11 FBA_CMD4 K10 H14 G4
FBAD7 F2 DQ6 FBAD23 M13 DQ22 R7602 FBA_CMD7 K5 BA1/A5 K1 VSS7 VDD7 L1
DQ7 DQ23 549Ohm FBA_CMD6 K4 A11/A6 GND K14 VSS8 VDD8 L11
FBA_EDC0 C2 FBA_EDC2 R13 1% FBA_CMD9 J5 A8/A7 L10 VSS9 VDD9 L14
0.4 mm
FBA_DBI0 D2 EDC0 FBA_DBI2 P13 EDC2 /DGPU A12/RFU/NC L5 VSS10 VDD10 L4

1
DBI0# A10 FBA_VREFD_L DBI2# U10 FBA_VREFD_L P10 VSS11 VDD11 P11
VREFD1 VREFD2 T10 VSS12 VDD12 R10
VSS13 VDD13

2
C7663 T5 R5 +1.35VS_VGA
VSS14 VDD14

1
A11 820PF/50V U4 C7664 R7601 R7603
A13 DQ8 MLCC/+/-10% U2 DQ24 820PF/50V 1.33KOhm 931OHM FBA_CMD13 J2 A1 B1

2
B11 DQ9 /DGPU T4 DQ25 MLCC/+/-10% 1% 1% FBA_CMD14 J3 RESET# A12 VSSQ1 VDDQ1 B12

2
B13 DQ10 T2 DQ26 /DGPU /DGPU /DGPU CKE# A14 VSSQ2 VDDQ2 B14

1
E11 DQ11 GND N4 DQ27 J12 A3 VSSQ3 VDDQ3 B3
DQ12 DQ28 71,76 FBA_CLK0 CK VSSQ4 VDDQ4
E13 N2 J11 C1 D1
DQ13 DQ29 71,76 FBA_CLK0# CK# VSSQ5 VDDQ5
F11 M4 C11 D12
DQ14 DQ30 VSSQ6 VDDQ6

2
F13 M2 GND GND C12 D14
DQ15 DQ31 R7645 R7646 C14 VSSQ7 VDDQ7 D3
C13 R2 40.2Ohm 40.2Ohm C3 VSSQ8 VDDQ8 E10
D13 EDC1 P2 EDC3 1% 1% C4 VSSQ9 VDDQ9 E5
DBI1# DBI3# /DGPU /DGPU E1 VSSQ10 VDDQ10 F1

1
FBA_WCK01 D4 FBA_WCK23 P4 E12 VSSQ11 VDDQ11 F12
71,76 FBA_WCK01 WCK01 71,76 FBA_WCK23 WCK23 VSSQ12 VDDQ12
FBA_WCK01# D5 FBA_WCK23# P5 E14 F14
71,76 FBA_WCK01# WCK01# 71,76 FBA_WCK23# WCK23# VSSQ13 VDDQ13

1
C7603 A5 E3 F3
H5GQ2H24MFR-T2C H5GQ2H24MFR-T2C 0.01UF/50V U5 VPP/NC1 F10 VSSQ14 VDDQ14 G13
/DGPU /DGPU 10% VPP/NC2 F5 VSSQ15 VDDQ15 G2

2
GND /DGPU H13 VSSQ16 VDDQ16 H12
+1.35VS_VGA H2 VSSQ17 VDDQ17 H3
GND K13 VSSQ18 VDDQ18 K12
K2 VSSQ19 VDDQ19 K3
VSSQ20 VDDQ20

2
M10 L13
R7604 M5 VSSQ21 VDDQ21 L2
549Ohm N1 VSSQ22 VDDQ22 M1
1% N12 VSSQ23 VDDQ23 M12
/DGPU N14 VSSQ24 VDDQ24 M14
0.4 mm

1
FBA_VREFC0 J14 N3 VSSQ25 VDDQ25 M3
VREFC R1 VSSQ26 VDDQ26 N10
VSSQ27 VDDQ27

2
C FBA_ZQ0 J13 R11 N5 C
ZQ VSSQ28 VDDQ28

1
R7606 R7605 R12 P1
931OHM 1.33KOhm C7665 FBA_SEN0 J10 R14 VSSQ29 VDDQ29 P12
1% 1% SEN R3 VSSQ30 VDDQ30 P14
820PF/50V

2
VSSQ31 VDDQ31

2
/DGPU /DGPU MLCC/+/-10% R4 P3

1
FBA_VREF_FET_L /DGPU R7608 R7607 H5GQ2H24MFR-T2C U1 VSSQ32 VDDQ32 T1
121OHM 1KOhm /DGPU U12 VSSQ33 VDDQ33 T12
Q7601 3 1% 5% U14 VSSQ34 VDDQ34 T14
D VSSQ35 VDDQ35
2N7002 GND GND /DGPU /DGPU U3 T3

1
/DGPU VSSQ36 VDDQ36
1
74,77,78,79 GPIO10_FBVREF_ALTV
G GND GND H5GQ2H24MFR-T2C
2 S GND /DGPU

GND

+1.35VS_VGA

2
R7610
1KOhm
U7602C 5% U7602D
Mirrored /DGPU
FBA_CMD15 G3 CAS# +1.35VS_VGA +1.35VS_VGA

1
FBA_CMD12 L3 RAS# FBA_SOE1 J1
RAS#
FBA_CMD0 L12 CAS# B10 MF C10
WE#
CS# VSS1 VDD1
FBA_CMD5 G12 WE# B5 C5
CS# D10 VSS2 VDD2 D11
VSS3 VDD3

1
FBA_CMD8 J4 ABI# G10 G1 C7619 C7623 C7616 C7659 C7656 C7662 C7661 C7601
ABI# G5 VSS4 VDD4 G11 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/10V 1UF/10V 10UF/6.3V
FBA_CMD6 H4 H1 VSS5 VDD5 G14 10% 10% 10% 10% 10% 10% 10% 10%
A8/A7

2
FBA_CMD7 H5 A10/A0 H14 VSS6 VDD6 G4 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU
A11/A6
B
FBA_CMD3 H11 A9/A1 K1 VSS7 VDD7 L1 B
BA0/A2
BA2/A4 VSS8 VDD8
FBA_CMD4 H10 BA1/A5 K14 L11
FBA_CMD2 K11 BA3/A3 L10 VSS9 VDD9 L14
BA0/A2
FBA_CMD1 K10 BA2/A4 L5 VSS10 VDD10 L4 GND
BA1/A5
BA3/A3 VSS11 VDD11
FBA_CMD11 K5 A9/A1 P10 P11
FBA_CMD10 K4 A11/A6 T10 VSS12 VDD12 R10
A8/A7
A10/A0 VSS13 VDD13
FBA_CMD9 J5 A12/RFU T5 R5 +1.35VS_VGA
A12/RFU/NC VSS14 VDD14
Byte 3 Byte 1 A1
VSSQ1 VDDQ1
B1

1
A12 B12 C7614 C7615 C7618 C7617 C7620 C7621 C7622 C7602
A14 VSSQ2 VDDQ2 B14 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/10V 1UF/10V 10UF/6.3V
U7602A U7602B A3 VSSQ3 VDDQ3 B3 10% 10% 10% 10% 10% 10% 10% 10%

2
FBA_CMD13 J2 C1 VSSQ4 VDDQ4 D1 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU
FBA_CMD14 J3 RESET# C11 VSSQ5 VDDQ5 D12
FBAD24 A4 FBAD8 U11 CKE# C12 VSSQ6 VDDQ6 D14
FBAD25 A2 DQ0 FBAD9 U13 DQ16 J12 C14 VSSQ7 VDDQ7 D3
B4 DQ1 T11 DQ17 71,76 FBA_CLK0 J11 CK C3 VSSQ8 VDDQ8 E10
FBAD26 FBAD10 GND
DQ2 DQ18 71,76 FBA_CLK0# CK# VSSQ9 VDDQ9
FBAD27 B2 FBAD11 T13 C4 E5
FBAD28 E4 DQ3 FBAD12 N11 DQ19 E1 VSSQ10 VDDQ10 F1
FBAD29 E2 DQ4 FBAD13 N13 DQ20 E12 VSSQ11 VDDQ11 F12
FBAD30 F4 DQ5 FBAD14 M11 DQ21 E14 VSSQ12 VDDQ12 F14
FBAD31 F2 DQ6 FBAD15 M13 DQ22 E3 VSSQ13 VDDQ13 F3
DQ7 DQ23 VSSQ14 VDDQ14

1
F10 G13 C7655 C7660 C7657 C7658 C7654 C7653
FBA_EDC3 C2 FBA_EDC1 R13 F5 VSSQ15 VDDQ15 G2 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
FBA_DBI3 D2 EDC0 FBA_DBI1 P13 EDC2 H13 VSSQ16 VDDQ16 H12 10% 10% 10% 10% 10% 10%

2
DBI0# A10 FBA_VREFD_L DBI2# U10 FBA_VREFD_L A5 H2 VSSQ17 VDDQ17 H3 @ @ @ @ @ @
VREFD1 VREFD2 U5 VPP/NC1 K13 VSSQ18 VDDQ18 K12
0.4 mm VPP/NC2 VSSQ19 VDDQ19
K2 K3
A11 U4 M10 VSSQ20 VDDQ20 L13
A13 DQ8 U2 DQ24 M5 VSSQ21 VDDQ21 L2 GND
PLACE NEAR U7601/U7602
B11 DQ9 T4 DQ25 N1 VSSQ22 VDDQ22 M1
B13 DQ10 T2 DQ26 N12 VSSQ23 VDDQ23 M12
E11 DQ11 N4 DQ27 N14 VSSQ24 VDDQ24 M14
E13 DQ12 N2 DQ28 N3 VSSQ25 VDDQ25 M3
F11 DQ13 M4 DQ29 R1 VSSQ26 VDDQ26 N10
F13 DQ14 M2 DQ30 R11 VSSQ27 VDDQ27 N5
DQ15 DQ31 R12 VSSQ28 VDDQ28 P1
0.4 mm VSSQ29 VDDQ29
A C13 R2 FBA_VREFC0 J14 R14 P12 A
D13 EDC1 P2 EDC3 VREFC R3 VSSQ30 VDDQ30 P14
DBI1# DBI3# FBA_ZQ1 J13 R4 VSSQ31 VDDQ31 P3
FBA_WCK23 D4 FBA_WCK01 P4 ZQ U1 VSSQ32 VDDQ32 T1
71,76 FBA_WCK23 D5 WCK01 71,76 FBA_WCK01 P5 WCK23 J10 U12 VSSQ33 VDDQ33 T12
FBA_WCK23# FBA_WCK01# FBA_SEN0
71,76 FBA_WCK23# WCK01# 71,76 FBA_WCK01# WCK23# SEN VSSQ34 VDDQ34
U14 T14
VSSQ35 VDDQ35
2

H5GQ2H24MFR-T2C H5GQ2H24MFR-T2C U3 T3
GND /DGPU /DGPU R7613 H5GQ2H24MFR-T2C VSSQ36 VDDQ36
121OHM /DGPU
1% H5GQ2H24MFR-T2C
/DGPU GND /DGPU
1

Title : N14xxx_FBA LOWER


GND Engineer:
PEGATRON CORPORATION Panda Wang
Size Project Name Rev
C VA70_HW 1.3
Date: Friday, January 18, 2013 Sheet 76 of 99
5 4 3 2 1
5 4 3 2 1

71,76
71,76
71,76
71,76
FBAD[0..63]
FBA_CMD[0..31]
FBA_DBI[0..7]
FBA_EDC[0..7]
FBA-Upper Half FBA_CMD28 G3
U7701C
+1.35VS_VGA +1.35VS_VGA 63,71,75,76,78,79,84

FBA_CMD31 L3 RAS#
FBA_CMD21 L12 CAS# U7701D
FBA_CMD16 G12 WE#
CS# +1.35VS_VGA
Byte 4 Byte 6 FBA_CMD24 J4
ABI#
FBA_SOE2 J1
B10 MF
VSS1 VDD1
C10

2
FBA_CMD26 H4 B5 C5
U7701A U7701B FBA_CMD27 H5 A10/A0 R7705 D10 VSS2 VDD2 D11
FBA_CMD18 H11 A9/A1 1KOhm G10 VSS3 VDD3 G1
FBA_CMD17 H10 BA0/A2 5% G5 VSS4 VDD4 G11
FBAD32 A4 FBAD48 U11 FBA_CMD19 K11 BA3/A3 /DGPU H1 VSS5 VDD5 G14

1
FBAD33 A2 DQ0 FBAD49 U13 DQ16 FBA_CMD20 K10 BA2/A4 H14 VSS6 VDD6 G4
D
FBAD34 B4 DQ1 FBAD50 T11 DQ17 FBA_CMD23 K5 BA1/A5 K1 VSS7 VDD7 L1 D
FBAD35 B2 DQ2 FBAD51 T13 DQ18 +1.35VS_VGA FBA_CMD22 K4 A11/A6 GND K14 VSS8 VDD8 L11
FBAD36 E4 DQ3 FBAD52 N11 DQ19 FBA_CMD25 J5 A8/A7 L10 VSS9 VDD9 L14
FBAD37 E2 DQ4 FBAD53 N13 DQ20 A12/RFU/NC L5 VSS10 VDD10 L4
DQ5 DQ21 VSS11 VDD11

2
FBAD38 F4 FBAD54 M11 P10 P11
FBAD39 F2 DQ6 FBAD55 M13 DQ22 R7701 T10 VSS12 VDD12 R10
DQ7 DQ23 549Ohm T5 VSS13 VDD13 R5 +1.35VS_VGA
FBA_EDC4 C2 FBA_EDC6 R13 1% VSS14 VDD14
0.4 mm
FBA_DBI4 D2 EDC0 FBA_DBI6 P13 EDC2 /DGPU FBA_CMD29 J2 A1 B1

1
DBI0# A10 FBA_VREFD_H DBI2# U10 FBA_VREFD_H FBA_CMD30 J3 RESET# A12 VSSQ1 VDDQ1 B12
VREFD1 VREFD2 CKE# A14 VSSQ2 VDDQ2 B14
VSSQ3 VDDQ3

2
C7716 J12 A3 B3
71,77 FBA_CLK1 CK VSSQ4 VDDQ4

1
A11 820PF/50V U4 C7723 R7709 R7702 J11 C1 D1
A13 DQ8 U2 DQ24 71,77 FBA_CLK1# CK# C11 VSSQ5 VDDQ5 D12
MLCC/+/-10% 820PF/50V 1.33KOhm 931OHM

2
DQ9 DQ25 VSSQ6 VDDQ6

2
B11 /DGPU T4 MLCC/+/-10% 1% 1% C12 D14

2
B13 DQ10 T2 DQ26 /DGPU /DGPU /DGPU R7712 R7713 C14 VSSQ7 VDDQ7 D3

1
E11 DQ11 GND N4 DQ27 40.2Ohm 40.2Ohm C3 VSSQ8 VDDQ8 E10
E13 DQ12 N2 DQ28 1% 1% C4 VSSQ9 VDDQ9 E5
F11 DQ13 M4 DQ29 /DGPU /DGPU E1 VSSQ10 VDDQ10 F1

1
F13 DQ14 M2 DQ30 GND GND E12 VSSQ11 VDDQ11 F12
DQ15 DQ31 E14 VSSQ12 VDDQ12 F14
VSSQ13 VDDQ13

1
C13 R2 C7701 A5 E3 F3
D13 EDC1 P2 EDC3 0.01UF/50V U5 VPP/NC1 F10 VSSQ14 VDDQ14 G13
DBI1# DBI3# 10% VPP/NC2 F5 VSSQ15 VDDQ15 G2

2
FBA_WCK45 D4 FBA_WCK67 P4 /DGPU H13 VSSQ16 VDDQ16 H12
71,77 FBA_WCK45 WCK01 71,77 FBA_WCK67 WCK23 +1.35VS_VGA VSSQ17 VDDQ17
FBA_WCK45# D5 FBA_WCK67# P5 H2 H3
71,77 FBA_WCK45# WCK01# 71,77 FBA_WCK67# WCK23# K13 VSSQ18 VDDQ18 K12
GND
H5GQ2H24MFR-T2C H5GQ2H24MFR-T2C K2 VSSQ19 VDDQ19 K3
VSSQ20 VDDQ20

2
/DGPU /DGPU M10 L13
R7704 M5 VSSQ21 VDDQ21 L2
549Ohm N1 VSSQ22 VDDQ22 M1
GND 1% N12 VSSQ23 VDDQ23 M12
/DGPU N14 VSSQ24 VDDQ24 M14
0.4 mm

1
FBA_VREFC1 J14 N3 VSSQ25 VDDQ25 M3
VREFC R1 VSSQ26 VDDQ26 N10
VSSQ27 VDDQ27

2
FBA_ZQ2 J13 R11 N5
ZQ VSSQ28 VDDQ28

1
R7707 R7706 C7720 R12 P1
931OHM 1.33KOhm 820PF/50V FBA_SEN2 J10 R14 VSSQ29 VDDQ29 P12
C C
1% 1% MLCC/+/-10% SEN R3 VSSQ30 VDDQ30 P14

2
VSSQ31 VDDQ31

2
/DGPU /DGPU /DGPU R4 P3

1
FBA_VREF_FET_H R7708 R7710 H5GQ2H24MFR-T2C U1 VSSQ32 VDDQ32 T1
121OHM 1KOhm /DGPU U12 VSSQ33 VDDQ33 T12
1% 5% U14 VSSQ34 VDDQ34 T14
Q7701 3 GND GND /DGPU /DGPU U3 VSSQ35 VDDQ35 T3
D

1
2N7002 VSSQ36 VDDQ36
/DGPU
1 GND GND H5GQ2H24MFR-T2C
74,76,78,79 GPIO10_FBVREF_ALTV
G GND /DGPU
2 S

GND

+1.35VS_VGA

2
U7702C R7711
Mirrored 1KOhm U7702D
FBA_CMD31 G3 CAS# 5%
FBA_CMD28 L3 RAS# /DGPU +1.35VS_VGA +1.35VS_VGA
RAS#

1
FBA_CMD16 L12 CAS# FBA_SOE3 J1
CS#
FBA_CMD21 G12 WE# B10 MF C10
CS#
WE# VSS1 VDD1
B5 C5
B
FBA_CMD24 J4 D10 VSS2 VDD2 D11 B
ABI#
ABI# VSS3 VDD3
G10 G1
FBA_CMD22 H4 G5 VSS4 VDD4 G11
A8/A7
FBA_CMD23 H5 A10/A0 H1 VSS5 VDD5 G14
A9/A1
A11/A6 VSS6 VDD6

1
FBA_CMD19 H11 BA2/A4 H14 G4 C7710 C7708 C7713 C7705 C7711 C7704 C7712 C7702
FBA_CMD20 H10 BA0/A2 K1 VSS7 VDD7 L1 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/10V 1UF/10V 10UF/6.3V
BA3/A3
BA1/A5 VSS8 VDD8
FBA_CMD18 K11 BA0/A2 K14 L11 10% 10% 10% 10% 10% 10% 10% 10%
Byte 7 Byte 5

2
FBA_CMD17 K10 BA2/A4 L10 VSS9 VDD9 L14 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU
BA3/A3
FBA_CMD27 K5 BA1/A5 L5 VSS10 VDD10 L4
A11/A6
A9/A1 VSS11 VDD11
FBA_CMD26 K4 A10/A0 P10 P11
U7702A U7702B FBA_CMD25 J5 A8/A7 T10 VSS12 VDD12 R10
A12/RFU/NC
A12/RFU VSS13 VDD13
T5 R5 +1.35VS_VGA GND
VSS14 VDD14
FBAD56 A4 FBAD40 U11 A1 B1
FBAD57 A2 DQ0 FBAD41 U13 DQ16 A12 VSSQ1 VDDQ1 B12
FBAD58 B4 DQ1 FBAD42 T11 DQ17 A14 VSSQ2 VDDQ2 B14
FBAD59 B2 DQ2 FBAD43 T13 DQ18 FBA_CMD29 J2 A3 VSSQ3 VDDQ3 B3
DQ3 DQ19 RESET# VSSQ4 VDDQ4

1
FBAD60 E4 FBAD44 N11 FBA_CMD30 J3 C1 D1 C7707 C7709 C7706 C7715 C7725 C7719 C7718 C7703
FBAD61 E2 DQ4 FBAD45 N13 DQ20 CKE# C11 VSSQ5 VDDQ5 D12 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/10V 1UF/10V 10UF/6.3V
FBAD62 F4 DQ5 FBAD46 M11 DQ21 J12 C12 VSSQ6 VDDQ6 D14 10% 10% 10% 10% 10% 10% 10% 10%
71,77 FBA_CLK1

2
FBAD63 F2 DQ6 FBAD47 M13 DQ22 J11 CK C14 VSSQ7 VDDQ7 D3 /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU
DQ7 DQ23 71,77 FBA_CLK1# CK# C3 VSSQ8 VDDQ8 E10
FBA_EDC7 C2 FBA_EDC5 R13 C4 VSSQ9 VDDQ9 E5
FBA_DBI7 D2 EDC0 FBA_DBI5 P13 EDC2 E1 VSSQ10 VDDQ10 F1
DBI0# A10 FBA_VREFD_H DBI2# U10 FBA_VREFD_H E12 VSSQ11 VDDQ11 F12 GND
VREFD1 VREFD2 E14 VSSQ12 VDDQ12 F14
0.4 mm VSSQ13 VDDQ13
E3 F3
A11 U4 F10 VSSQ14 VDDQ14 G13
A13 DQ8 U2 DQ24 F5 VSSQ15 VDDQ15 G2
B11 DQ9 T4 DQ25 A5 H13 VSSQ16 VDDQ16 H12
DQ10 DQ26 VPP/NC1 VSSQ17 VDDQ17

1
B13 T2 U5 H2 H3 C7724 C7717 C7726 C7714 C7722 C7721
E11 DQ11 N4 DQ27 VPP/NC2 K13 VSSQ18 VDDQ18 K12 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
E13 DQ12 N2 DQ28 K2 VSSQ19 VDDQ19 K3 10% 10% 10% 10% 10% 10%

2
F11 DQ13 M4 DQ29 M10 VSSQ20 VDDQ20 L13 @ @ @ @ @ @
F13 DQ14 M2 DQ30 M5 VSSQ21 VDDQ21 L2
DQ15 DQ31 N1 VSSQ22 VDDQ22 M1
VSSQ23 VDDQ23
PLACE NEAR U7701/U7702
C13 R2 N12 M12 GND
D13 EDC1 P2 EDC3 N14 VSSQ24 VDDQ24 M14
A A
DBI1# DBI3# N3 VSSQ25 VDDQ25 M3
FBA_WCK67 D4 FBA_WCK45 P4 R1 VSSQ26 VDDQ26 N10
71,77 FBA_WCK67 WCK01 71,77 FBA_WCK45 WCK23 VSSQ27 VDDQ27
FBA_WCK67# D5 FBA_WCK45# P5 0.4 mm R11 N5
71,77 FBA_WCK67# WCK01# 71,77 FBA_WCK45# WCK23# J14 R12 VSSQ28 VDDQ28 P1
FBA_VREFC1
H5GQ2H24MFR-T2C H5GQ2H24MFR-T2C VREFC R14 VSSQ29 VDDQ29 P12
/DGPU /DGPU FBA_ZQ3 J13 R3 VSSQ30 VDDQ30 P14
ZQ R4 VSSQ31 VDDQ31 P3
FBA_SEN2 J10 U1 VSSQ32 VDDQ32 T1
SEN U12 VSSQ33 VDDQ33 T12
VSSQ34 VDDQ34
2

U14 T14
GND R7703
121OHM
H5GQ2H24MFR-T2C
/DGPU
U3 VSSQ35
VSSQ36
VDDQ35
VDDQ36
T3
Title : N14xxx_FBA UPPER
1% Engineer:
/DGPU H5GQ2H24MFR-T2C PEGATRON CORPORATION PANDA WANG
1

GND /DGPU Size Project Name Rev

GND
C VA70_HW 1.3
Date: Friday, January 18, 2013 Sheet 77 of 99
5 4 3 2 1
5 4 3 2 1
71,79 FBBD[0..63] +1.35VS_VGA +1.35VS_VGA 63,71,75,76,77,79,84
71,79 FBB_CMD[0..31]
71,79 FBB_DBI[0..7]
U7801C
71,79 FBB_EDC[0..7]
FBB_CMD12 G3
FBB_CMD15 L3 RAS#
FBB_CMD5 L12 CAS#
FBB_CMD0 G12 WE#
CS# U7801D
FBB_CMD8 J4
ABI# +1.35VS_VGA
FBB_CMD10 H4 FBB_SOE0 J1
FBB_CMD11 H5 A10/A0 B10 MF C10
A9/A1 VSS1 VDD1

2
FBB_CMD2 H11 B5 C5
FBB_CMD1 H10 BA0/A2 R7805 D10 VSS2 VDD2 D11
FBB_CMD3 K11 BA3/A3 1KOhm G10 VSS3 VDD3 G1

D Byte 0 Byte 2 FBB_CMD4


FBB_CMD7
K10
K5
BA2/A4
BA1/A5
5%
/EGL
G5
H1
VSS4
VSS5
VDD4
VDD5
G11
G14 D

1
FBB_CMD6 K4 A11/A6 H14 VSS6 VDD6 G4
U7801A U7801B FBB_CMD9 J5 A8/A7 K1 VSS7 VDD7 L1
A12/RFU/NC GND K14 VSS8 VDD8 L11
L10 VSS9 VDD9 L14
FBBD0 A4 FBBD16 U11 L5 VSS10 VDD10 L4
FBBD1 A2 DQ0 FBBD17 U13 DQ16 P10 VSS11 VDD11 P11
FBBD2 B4 DQ1 FBBD18 T11 DQ17 T10 VSS12 VDD12 R10
FBBD3 B2 DQ2 FBBD19 T13 DQ18 +1.35VS_VGA FBB_CMD13 J2 T5 VSS13 VDD13 R5 +1.35VS_VGA
FBBD4 E4 DQ3 FBBD20 N11 DQ19 FBB_CMD14 J3 RESET# VSS14 VDD14
FBBD5 E2 DQ4 FBBD21 N13 DQ20 CKE# A1 B1
DQ5 DQ21 VSSQ1 VDDQ1

2
FBBD6 F4 FBBD22 M11 J12 A12 B12
F2 DQ6 M13 DQ22 71,78 FBB_CLK0 J11 CK A14 VSSQ2 VDDQ2 B14
FBBD7 FBBD23 R7801
DQ7 DQ23 71,78 FBB_CLK0# CK# VSSQ3 VDDQ3
549Ohm A3 B3
VSSQ4 VDDQ4

2
FBB_EDC0 C2 FBB_EDC2 R13 0.4 mm 1% C1 D1
FBB_DBI0 D2 EDC0 FBB_DBI2 P13 EDC2 /EGL R7812 R7813 C11 VSSQ5 VDDQ5 D12

1
DBI0# A10 FBB_VREFD_L DBI2# U10 FBB_VREFD_L 40.2Ohm 40.2Ohm C12 VSSQ6 VDDQ6 D14
VREFD1 VREFD2 1% 1% C14 VSSQ7 VDDQ7 D3
VSSQ8 VDDQ8
1

2
C7824 /EGL /EGL C3 E10

1
VSSQ9 VDDQ9

1
A11 820PF/50V U4 C7826 R7809 R7802 C4 E5
A13 DQ8 MLCC/+/-10% U2 DQ24 820PF/50V 1.33KOhm 931OHM E1 VSSQ10 VDDQ10 F1
2

DQ9 DQ25 VSSQ11 VDDQ11

1
B11 /EGL T4 MLCC/+/-10% 1% 1% C7801 A5 E12 F12

2
B13 DQ10 T2 DQ26 /EGL /EGL /EGL 0.01UF/50V U5 VPP/NC1 E14 VSSQ12 VDDQ12 F14

1
E11 DQ11 GND N4 DQ27 10% VPP/NC2 E3 VSSQ13 VDDQ13 F3

2
E13 DQ12 N2 DQ28 /EGL F10 VSSQ14 VDDQ14 G13
F11 DQ13 M4 DQ29 +1.35VS_VGA F5 VSSQ15 VDDQ15 G2
F13 DQ14 M2 DQ30 GND GND GND H13 VSSQ16 VDDQ16 H12
DQ15 DQ31 H2 VSSQ17 VDDQ17 H3
VSSQ18 VDDQ18

2
C13 R2 R7804 K13 K12
D13 EDC1 P2 EDC3 549Ohm K2 VSSQ19 VDDQ19 K3
DBI1# DBI3# 1% M10 VSSQ20 VDDQ20 L13
FBB_WCK01 D4 FBB_WCK23 P4 /EGL M5 VSSQ21 VDDQ21 L2
71,78 FBB_WCK01 D5 WCK01 71,78 FBB_WCK23 P5 WCK23 N1 VSSQ22 VDDQ22 M1
FBB_WCK01# FBB_WCK23# 0.4 mm
71,78 FBB_WCK01# 71,78 FBB_WCK23#

1
WCK01# WCK23# FBB_VREFC0 J14 N12 VSSQ23 VDDQ23 M12
H5GQ2H24MFR-T2C H5GQ2H24MFR-T2C VREFC N14 VSSQ24 VDDQ24 M14
VSSQ25 VDDQ25

2
/EGL /EGL FBB_ZQ0 J13 N3 M3
ZQ VSSQ26 VDDQ26

1
R7807 R7806 C7825 R1 N10
GND 931OHM 1.33KOhm 820PF/50V FBB_SEN0 J10 R11 VSSQ27 VDDQ27 N5
C 1% 1% MLCC/+/-10% SEN R12 VSSQ28 VDDQ28 P1 C

2
VSSQ29 VDDQ29

2
/EGL /EGL /EGL R7808 R14 P12

1
FBB_VREF_FET_L 121OHM R7810 H5GQ2H24MFR-T2C R3 VSSQ30 VDDQ30 P14
1% 1KOhm /EGL R4 VSSQ31 VDDQ31 P3
Q7801 3 /EGL 5% U1 VSSQ32 VDDQ32 T1
D VSSQ33 VDDQ33
2N7002 GND GND /EGL U12 T12

1
/EGL U14 VSSQ34 VDDQ34 T14
1 U3 VSSQ35 VDDQ35 T3
74,76,77,79 GPIO10_FBVREF_ALTV VSSQ36 VDDQ36
G GND GND
2 S
H5GQ2H24MFR-T2C
GND /EGL

GND

+1.35VS_VGA

2
R7811
1KOhm
5% U7802D
/EGL
+1.35VS_VGA +1.35VS_VGA

1
U7802C FBB_SOE1 J1
B10 MF C10
Mirrored VSS1 VDD1
FBB_CMD15 G3 CAS# B5 C5
RAS# VSS2 VDD2

1
FBB_CMD12 L3 RAS# D10 D11 C7810 C7808 C7813 C7805 C7812 C7804 C7811 C7802
FBB_CMD0 L12 CAS# G10 VSS3 VDD3 G1 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/10V 1UF/10V 10UF/6.3V
WE#
CS# VSS4 VDD4
FBB_CMD5 G12 WE# G5 G11 10% 10% 10% 10% 10% 10% 10% 10%

2
CS# H1 VSS5 VDD5 G14 /EGL /EGL /EGL /EGL /EGL /EGL /EGL /EGL
FBB_CMD8 J4 H14 VSS6 VDD6 G4
ABI#
B FBB_CMD6 H4
ABI#
A8/A7
K1
K14
VSS7
VSS8
VDD7
VDD8
L1
L11
B
FBB_CMD7 H5 A10/A0 L10 VSS9 VDD9 L14 GND
A11/A6
FBB_CMD3 H11 A9/A1 L5 VSS10 VDD10 L4
BA0/A2
BA2/A4 VSS11 VDD11
FBB_CMD4 H10 BA1/A5 P10 P11
FBB_CMD2 K11 BA3/A3 T10 VSS12 VDD12 R10
BA0/A2
FBB_CMD1 K10 BA2/A4 T5 VSS13 VDD13 R5 +1.35VS_VGA
BA1/A5
BA3/A3 VSS14 VDD14
FBB_CMD11 K5 A9/A1
A11/A6

1
FBB_CMD10 K4 A10/A0 A1 B1 C7807 C7809 C7806 C7816 C7822 C7818 C7817 C7803
Byte 3 Byte 1 FBB_CMD9 J5 A8/A7
A12/RFU/NC
A12/RFU A12
A14
VSSQ1
VSSQ2
VDDQ1
VDDQ2
B12
B14
0.1UF/10V
10%
0.1UF/10V
10%
0.1UF/10V
10%
0.1UF/10V
10%
0.1UF/10V
10%
1UF/10V
10%
1UF/10V
10%
10UF/6.3V
10%

2
A3 VSSQ3 VDDQ3 B3 /EGL /EGL /EGL /EGL /EGL /EGL /EGL /EGL
U7802A U7802B C1 VSSQ4 VDDQ4 D1
C11 VSSQ5 VDDQ5 D12
C12 VSSQ6 VDDQ6 D14
FBBD24 A4 FBBD8 U11 FBB_CMD13 J2 C14 VSSQ7 VDDQ7 D3 GND
FBBD25 A2 DQ0 FBBD9 U13 DQ16 FBB_CMD14 J3 RESET# C3 VSSQ8 VDDQ8 E10
FBBD26 B4 DQ1 FBBD10 T11 DQ17 CKE# C4 VSSQ9 VDDQ9 E5
FBBD27 B2 DQ2 FBBD11 T13 DQ18 J12 E1 VSSQ10 VDDQ10 F1
E4 DQ3 N11 DQ19 71,78 FBB_CLK0 J11 CK E12 VSSQ11 VDDQ11 F12
FBBD28 FBBD12
DQ4 DQ20 71,78 FBB_CLK0# CK# VSSQ12 VDDQ12
FBBD29 E2 FBBD13 N13 E14 F14
DQ5 DQ21 VSSQ13 VDDQ13

1
FBBD30 F4 FBBD14 M11 E3 F3 C7821 C7815 C7823 C7814 C7820 C7819
FBBD31 F2 DQ6 FBBD15 M13 DQ22 F10 VSSQ14 VDDQ14 G13 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
DQ7 DQ23 F5 VSSQ15 VDDQ15 G2 10% 10% 10% 10% 10% 10%

2
FBB_EDC3 C2 FBB_EDC1 R13 H13 VSSQ16 VDDQ16 H12 @ @ @ @ @ @
FBB_DBI3 D2 EDC0 FBB_DBI1 P13 EDC2 H2 VSSQ17 VDDQ17 H3
DBI0# A10 FBB_VREFD_L DBI2# U10 FBB_VREFD_L K13 VSSQ18 VDDQ18 K12
VREFD1 VREFD2 K2 VSSQ19 VDDQ19 K3
0.4 mm
A5 M10 VSSQ20 VDDQ20 L13 GND
A11 U4 U5 VPP/NC1 M5 VSSQ21 VDDQ21 L2
DQ8 DQ24 VPP/NC2 VSSQ22 VDDQ22
PLACE NEAR U7801/U7802
A13 U2 N1 M1
B11 DQ9 T4 DQ25 N12 VSSQ23 VDDQ23 M12
B13 DQ10 T2 DQ26 N14 VSSQ24 VDDQ24 M14
E11 DQ11 N4 DQ27 N3 VSSQ25 VDDQ25 M3
E13 DQ12 N2 DQ28 R1 VSSQ26 VDDQ26 N10
F11 DQ13 M4 DQ29 R11 VSSQ27 VDDQ27 N5
F13 DQ14 M2 DQ30 R12 VSSQ28 VDDQ28 P1
DQ15 DQ31 R14 VSSQ29 VDDQ29 P12
A C13
D13 EDC1
R2
P2 EDC3
0.4 mm
R3
R4
VSSQ30
VSSQ31
VDDQ30
VDDQ31
P14
P3
A
DBI1# DBI3# FBB_VREFC0 J14 U1 VSSQ32 VDDQ32 T1
FBB_WCK23 D4 FBB_WCK01 P4 VREFC U12 VSSQ33 VDDQ33 T12
71,78 FBB_WCK23 WCK01 71,78 FBB_WCK01 WCK23 VSSQ34 VDDQ34
FBB_WCK23# D5 FBB_WCK01# P5 FBB_ZQ1 J13 U14 T14
71,78 FBB_WCK23# WCK01# 71,78 FBB_WCK01# WCK23# ZQ VSSQ35 VDDQ35
U3 T3
H5GQ2H24MFR-T2C H5GQ2H24MFR-T2C FBB_SEN0 J10 VSSQ36 VDDQ36
/EGL /EGL SEN
2

R7803 H5GQ2H24MFR-T2C
121OHM H5GQ2H24MFR-T2C GND /EGL
GND 1%
/EGL
/EGL Title : N14xxx_FBB LOWER
Engineer: PANDA WANG
1

PEGATRON CORPORATION
Size Project Name Rev
GND C VA70_HW 1.3
Date: Friday, January 18, 2013 Sheet 78 of 99
5 4 3 2 1
71,78 FBBD[0..63]
71,78 FBB_CMD[0..31] +1.35VS_VGA +1.35VS_VGA 63,71,75,76,77,78,84
71,78 FBB_DBI[0..7]
71,78 FBB_EDC[0..7]
U7901C

FBB_CMD28 G3
FBB_CMD31 L3 RAS#
FBB_CMD21 L12 CAS#
FBB_CMD16 G12 WE#
CS# U7901D
FBB_CMD24 J4
ABI# +1.35VS_VGA
FBB_CMD26 H4 FBB_SOE2 J1
FBB_CMD27 H5 A10/A0 B10 MF C10
A9/A1 VSS1 VDD1

2
FBB_CMD18 H11 R7905 B5 C5
FBB_CMD17 H10 BA0/A2 1KOhm D10 VSS2 VDD2 D11
FBB_CMD19 K11 BA3/A3 5% G10 VSS3 VDD3 G1
D Byte 4 Byte 6 FBB_CMD20
FBB_CMD23
K10
K5
BA2/A4
BA1/A5
/EGL G5
H1
VSS4
VSS5
VDD4
VDD5
G11
G14
D

1
FBB_CMD22 K4 A11/A6 H14 VSS6 VDD6 G4
U7901A U7901B FBB_CMD25 J5 A8/A7 K1 VSS7 VDD7 L1
A12/RFU/NC GND K14 VSS8 VDD8 L11
L10 VSS9 VDD9 L14
FBBD32 A4 FBBD48 U11 L5 VSS10 VDD10 L4
FBBD33 A2 DQ0 FBBD49 U13 DQ16 P10 VSS11 VDD11 P11
FBBD34 B4 DQ1 FBBD50 T11 DQ17 T10 VSS12 VDD12 R10
FBBD35 B2 DQ2 FBBD51 T13 DQ18 +1.35VS_VGA FBB_CMD29 J2 T5 VSS13 VDD13 R5 +1.35VS_VGA
FBBD36 E4 DQ3 FBBD52 N11 DQ19 FBB_CMD30 J3 RESET# VSS14 VDD14
FBBD37 E2 DQ4 FBBD53 N13 DQ20 CKE# A1 B1
DQ5 DQ21 VSSQ1 VDDQ1

2
FBBD38 F4 FBBD54 M11 J12 A12 B12
DQ6 DQ22 71,79 FBB_CLK1 CK VSSQ2 VDDQ2
FBBD39 F2 FBBD55 M13 R7902 J11 A14 B14
DQ7 DQ23 71,79 FBB_CLK1# CK# VSSQ3 VDDQ3
549Ohm A3 B3
VSSQ4 VDDQ4

2
FBB_EDC4 C2 FBB_EDC6 R13 0.4 mm 1% R7907 R7910 C1 D1
FBB_DBI4 D2 EDC0 FBB_DBI6 P13 EDC2 /EGL 40.2Ohm 40.2Ohm C11 VSSQ5 VDDQ5 D12

1
DBI0# A10 FBB_VREFD_H DBI2# U10 FBB_VREFD_H 1% 1% C12 VSSQ6 VDDQ6 D14
VREFD1 VREFD2 /EGL /EGL C14 VSSQ7 VDDQ7 D3
VSSQ8 VDDQ8
1

2
C7901 C3 E10

1 1
VSSQ9 VDDQ9

1
A11 820PF/50V U4 C7904 R7911 R7903 C4 E5
A13 DQ8 MLCC/+/-10% U2 DQ24 820PF/50V 1.33KOhm 931OHM C7903 E1 VSSQ10 VDDQ10 F1
2

B11 DQ9 /EGL T4 DQ25 MLCC/+/-10% 1% 1% 0.01UF/50V A5 E12 VSSQ11 VDDQ11 F12

2
B13 DQ10 T2 DQ26 /EGL /EGL /EGL 10% U5 VPP/NC1 E14 VSSQ12 VDDQ12 F14

2
E11 DQ11 GND N4 DQ27 /EGL VPP/NC2 E3 VSSQ13 VDDQ13 F3
E13 DQ12 N2 DQ28 F10 VSSQ14 VDDQ14 G13
F11 DQ13 M4 DQ29 +1.35VS_VGA GND F5 VSSQ15 VDDQ15 G2
F13 DQ14 M2 DQ30 GND GND H13 VSSQ16 VDDQ16 H12
DQ15 DQ31 H2 VSSQ17 VDDQ17 H3
VSSQ18 VDDQ18

2
C13 R2 R7904 K13 K12
D13 EDC1 P2 EDC3 549Ohm K2 VSSQ19 VDDQ19 K3
DBI1# DBI3# 1% M10 VSSQ20 VDDQ20 L13
FBB_WCK45 D4 FBB_WCK67 P4 /EGL M5 VSSQ21 VDDQ21 L2
71,79 FBB_WCK45 WCK01 71,79 FBB_WCK67 WCK23 VSSQ22 VDDQ22
FBB_WCK45# D5 FBB_WCK67# P5 0.4 mm N1 M1
71,79 FBB_WCK45# 71,79 FBB_WCK67#

1
WCK01# WCK23# FBB_VREFC1 J14 N12 VSSQ23 VDDQ23 M12
H5GQ2H24MFR-T2C H5GQ2H24MFR-T2C VREFC N14 VSSQ24 VDDQ24 M14
VSSQ25 VDDQ25

2
/EGL /EGL FBB_ZQ2 J13 N3 M3
ZQ VSSQ26 VDDQ26

1
R7908 R7906 C7902 R1 N10
C 931OHM
1%
1.33KOhm
1%
820PF/50V
MLCC/+/-10%
FBB_SEN2 J10
SEN
R11
R12
VSSQ27
VSSQ28
VDDQ27
VDDQ28
N5
P1
C

2
VSSQ29 VDDQ29

2
/EGL /EGL /EGL R14 P12

1
FBB_VREF_FET_H R7909 R7912 H5GQ2H24MFR-T2C R3 VSSQ30 VDDQ30 P14
GND 121OHM 1KOhm /EGL R4 VSSQ31 VDDQ31 P3
Q7901 3 1% 5% U1 VSSQ32 VDDQ32 T1
D VSSQ33 VDDQ33
2N7002 GND GND /EGL /EGL U12 T12

1
/EGL U14 VSSQ34 VDDQ34 T14
1 U3 VSSQ35 VDDQ35 T3
74,76,77,78 GPIO10_FBVREF_ALTV VSSQ36 VDDQ36
G GND GND
2 S
H5GQ2H24MFR-T2C
GND /EGL

GND

+1.35VS_VGA

2
R7913
1KOhm
5% U7902D
U7902C /EGL
Mirrored +1.35VS_VGA +1.35VS_VGA

1
FBB_CMD31 G3 CAS# FBB_SOE3 J1
FBB_CMD28 L3 RAS# B10 MF C10
CAS#
RAS# VSS1 VDD1
FBB_CMD16 L12 CS# B5 C5
WE# VSS2 VDD2

1
FBB_CMD21 G12 WE# D10 D11 C7917 C7912 C7924 C7908 C7919 C7905 C7918 C7916
CS# G10 VSS3 VDD3 G1 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/10V 1UF/10V 10UF/6.3V
FBB_CMD24 J4 G5 VSS4 VDD4 G11 10% 10% 10% 10% 10% 10% 10% 10%
ABI#

2
ABI# H1 VSS5 VDD5 G14 /EGL /EGL /EGL /EGL /EGL /EGL /EGL /EGL
B FBB_CMD22
FBB_CMD23
H4
H5 A10/A0
A8/A7
A11/A6
H14
K1
VSS6
VSS7
VDD6
VDD7
G4
L1
B
FBB_CMD19 H11 A9/A1 K14 VSS8 VDD8 L11
BA2/A4
FBB_CMD20 H10 BA0/A2 L10 VSS9 VDD9 L14 GND
BA3/A3
BA1/A5 VSS10 VDD10
FBB_CMD18 K11 BA0/A2 L5 L4
FBB_CMD17 K10 BA2/A4 P10 VSS11 VDD11 P11
BA3/A3
FBB_CMD27 K5 BA1/A5 T10 VSS12 VDD12 R10
A9/A1
Byte 7 Byte 5 FBB_CMD26
FBB_CMD25
K4
J5
A11/A6
A8/A7
A12/RFU/NC
A10/A0
A12/RFU
T5 VSS13
VSS14
VDD13
VDD14
R5 +1.35VS_VGA

1
A1 B1 C7909 C7913 C7907 C7911 C7925 C7915 C7914 C7922
U7902A U7902B A12 VSSQ1 VDDQ1 B12 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/10V 1UF/10V 10UF/6.3V
A14 VSSQ2 VDDQ2 B14 10% 10% 10% 10% 10% 10% 10% 10%

2
A3 VSSQ3 VDDQ3 B3 /EGL /EGL /EGL /EGL /EGL /EGL /EGL /EGL
FBBD56 A4 FBBD40 U11 C1 VSSQ4 VDDQ4 D1
FBBD57 A2 DQ0 FBBD41 U13 DQ16 FBB_CMD29 J2 C11 VSSQ5 VDDQ5 D12
FBBD58 B4 DQ1 FBBD42 T11 DQ17 FBB_CMD30 J3 RESET# C12 VSSQ6 VDDQ6 D14
FBBD59 B2 DQ2 FBBD43 T13 DQ18 CKE# C14 VSSQ7 VDDQ7 D3 GND
FBBD60 E4 DQ3 FBBD44 N11 DQ19 J12 C3 VSSQ8 VDDQ8 E10
DQ4 DQ20 71,79 FBB_CLK1 CK VSSQ9 VDDQ9
FBBD61 E2 FBBD45 N13 J11 C4 E5
F4 DQ5 M11 DQ21 71,79 FBB_CLK1# CK# E1 VSSQ10 VDDQ10 F1
FBBD62 FBBD46
FBBD63 F2 DQ6 FBBD47 M13 DQ22 E12 VSSQ11 VDDQ11 F12
DQ7 DQ23 E14 VSSQ12 VDDQ12 F14
VSSQ13 VDDQ13

1
FBB_EDC7 C2 FBB_EDC5 R13 E3 F3 C7923 C7910 C7926 C7906 C7921 C7920
FBB_DBI7 D2 EDC0 FBB_DBI5 P13 EDC2 F10 VSSQ14 VDDQ14 G13 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
DBI0# A10 FBB_VREFD_H DBI2# U10 FBB_VREFD_H F5 VSSQ15 VDDQ15 G2 10% 10% 10% 10% 10% 10%

2
VREFD1 VREFD2 H13 VSSQ16 VDDQ16 H12 @ @ @ @ @ @
0.4 mm
H2 VSSQ17 VDDQ17 H3
A11 U4 A5 K13 VSSQ18 VDDQ18 K12
A13 DQ8 U2 DQ24 U5 VPP/NC1 K2 VSSQ19 VDDQ19 K3
B11 DQ9 T4 DQ25 VPP/NC2 M10 VSSQ20 VDDQ20 L13 GND
B13 DQ10 T2 DQ26 M5 VSSQ21 VDDQ21 L2 PLACE NEAR U7901/U7902
E11 DQ11 N4 DQ27 N1 VSSQ22 VDDQ22 M1
E13 DQ12 N2 DQ28 N12 VSSQ23 VDDQ23 M12
F11 DQ13 M4 DQ29 N14 VSSQ24 VDDQ24 M14
F13 DQ14 M2 DQ30 N3 VSSQ25 VDDQ25 M3
DQ15 DQ31 R1 VSSQ26 VDDQ26 N10
C13 R2 R11 VSSQ27 VDDQ27 N5
D13 EDC1 P2 EDC3 R12 VSSQ28 VDDQ28 P1
A FBB_WCK67 D4
DBI1#
FBB_WCK45 P4
DBI3#
FBB_VREFC1
0.4 mm
J14
R14
R3
VSSQ29
VSSQ30
VDDQ29
VDDQ30
P12
P14
A
71,79 FBB_WCK67 WCK01 71,79 FBB_WCK45 WCK23 VREFC VSSQ31 VDDQ31
FBB_WCK67# D5 FBB_WCK45# P5 R4 P3
71,79 FBB_WCK67# WCK01# 71,79 FBB_WCK45# WCK23# J13 U1 VSSQ32 VDDQ32 T1
FBB_ZQ3
H5GQ2H24MFR-T2C H5GQ2H24MFR-T2C ZQ U12 VSSQ33 VDDQ33 T12
/EGL /EGL FBB_SEN2 J10 U14 VSSQ34 VDDQ34 T14
SEN U3 VSSQ35 VDDQ35 T3
VSSQ36 VDDQ36
2

R7901
121OHM H5GQ2H24MFR-T2C
1% /EGL H5GQ2H24MFR-T2C
/EGL GND /EGL Title : N14xxx_FBB UPPER
1

GND Engineer:
PEGATRON CORPORATION PANDA WANG
GND Size Project Name Rev
C VA70_HW 1.3
Date: Friday, January 18, 2013 Sheet 79 of 99
5 4 3 2 1

Icc_TDC: Icc_Max
Shark bay SV-QC 27A SV-QC 95A
SV-DC 21A SV-DC 55A

2
R8028 R8027 R8026
102KOhm 3.24KOhm 49.9KOhm
121017 +AC_BAT_SYS
10V220000007 10V220000057 10V220000078

1
C8030 C8029 C8051 +

1
Q8003 CE8000
10UF/25V 10UF/25V 10UF/25V

1
5 D
6
7
8
SIRA14DP-T1-GE3 C8031 100UF/25V
1000PF/50V MLCC/+/-10% MLCC/+/-10% MLCC/+/-10% @

2
07V040000100 1AV500000015 1AV500000015 1AV500000015

2
SR8012

S
D D
1 2

G
6 VR_SVID_DATA T8095

4
3
2
1
R0402
SR8013

VRM_ALERT#

VRM_PROG1
VRM_PROG3
VRM_PROG2
Pull high to 5V
1 2 T8096 VRM_HG1 T8092 TPC28T L8001

VRM_BST2
6 VR_SVID_ALERT#

VRM_SDA

VRM_HG2
VRM_LX2
0.24uH
R0402 VRM_LX1 1 2
Disable PWM3 R8029

1
SR8014 T8094
1 2 Irat=25A
6 VR_SVID_CLK

2
DCR=1.0mohm

5
R0402 R8029 1
VRM_BST1 2VRM_BST1_R 1 2 Q8004 Q8005 R8047 @ 09V030000069
121017 SR8006

SIRA10DP-T1-GE3

SIRA10DP-T1-GE3
U8000A

VRM_RC1
0Ohm CE8002

33
32
31
30
29
28
27
26
25
93 CPU_VRON_PWR 2.2Ohm

2
ISL95812HRTZ

5 D
6
7
8

5 D
6
7
8
1 2 +5VS_VRM 2 1 R8050 C8026 @ 0.05 560UF/2.5V
SR8004 +5VS 0Ohm 0.22UF/16V 1BV090000002

GND

SDA
ALERT#

SLOPE/PROG1
PROG3
PROG2
BOOT2
UGATE2
PHASE2

SHORT_PIN

SHORT_PIN
1
1 2 10V340000001 MLCC/+/-10% ESR=16mOHM

JP8000

JP8001
30 CPU_VRON R0603 1AV200000091

1
30,92 VRM_PWRGD

G
R0402 VRM_SCLK 1 24 VRM_LG2 C8012 @
R8001 1% VRM_ON 2 SCLK LGATE2 23 0.1UF/25V

4
3
2
1

4
3
2
1

1
30,92 VR_IMON 100KOhm VRM_PWRGD 3 VR_ON VDDP 22 VRM_PWM3 1AV300000007 R8032 1%

2
1 2 VRM_IMON 4 PGOOD PWM3 21 VRM_LG1 10% 10KOhm R8035 1% @
VRM_HOT# 5 IMON LGATE1 20 VRM_LX1 ISEN1 1 2 10KOhm
C8001 VRM_NTC 6 VR_HOT# PHASE1 19 VRM_HG1 VRM_LG1 1 2 ISEN2
NTC UGATE1

30pcs
0.01UF/16V VRM_COMP 7 18 VRM_BST1 R8033 1%
COMP BOOT1

FB2/VSEN
11AV200000019
2 VRM_FB 8 17 VRM_VIN 2 1 3.65KOhm R8036 1% @
FB VIN +AC_BAT_SYS

2
C8025 VSUM+ 1 2 10KOhm 22UF/6.3V total

ISUMN
ISUMP
ISEN3
ISEN2
ISEN1
C8001Change to 0.01uF R8003 @ 1% SR8007 1UF/6.3V 1 2 ISEN3

VDD
RTN

1
499Ohm C8024 R0603 1 2 10% R8034 1%

1
1 2 0.1UF/25V 1Ohm
+1.05VS +VCORE

1
10% C8023 R8024 1% VSUM- 1 2

9
10
11
12
13
14
15
16

2
SR8005 1AV300000007 1UF/6.3V 1Ohm
1 2 1 2VRM_FB2 10%
4 VR_HOT#

2
T8005
06V070000048 TPC28T T8008
R0402 R8014 1% VRM_VDD

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V
5.9KOHM TPC28T

C8041

C8042

C8043

C8044

C8045
1

1
Close to phase1 Mosfet R8004 @ 5% 10V220000244 VSUM+ VSUM+

1
470KOHM
+AC_BAT_SYS

1
1
C R8006 @ 1% 1 2 C

2
2
3.83KOhm R8022

5
1 2 R8005 1% R8015 @ Ci C8033 C8032 C8052
2.61KOhm

1
27.4KOhm 0Ohm C8019 C8020 R8021 Q8000
10UF/25V 10UF/25V 10UF/25V +

1
5 D
6
7
8
@ 1 2 VRM_FB2_R 0.22UF/10V 0.022UF/16V SIRA14DP-T1-GE3 C8034 CE8006

2
10% 1AV200000027 11KOhm 1% 1000PF/50V MLCC/+/-10% MLCC/+/-10% MLCC/+/-10% 100UF/25V

2 1

2
VRM_COMP 07V040000100 1AV500000015 1AV500000015 1AV500000015 @
121017 1AV200000050

2
1%

S
1

G
VRM_FB Ri R8030 R8023 5%

ISEN3
C8008 @ R8020 0Ohm 10KOHM

4
3
2
1
0.22UF/16V 499Ohm 10V240000001
1 2 1AV200000091 10V220000076 T8091

1
C8003 MLCC/+/-10% VRM_ISUMN 1 2 VSUM- VRM_HG2 TPC28T L8002

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V
1
390PF/50V C8009 MLCC/+/-10% 0.24uH
121017

ISEN2

C8050

C8046

C8047

C8048

C8049
1

1
R8007 1AV200000080 0.22UF/16V 1AV200000091 set OCP=120A 10VS40000002 VRM_LX2 1 2

1
1 2 1 2 VSUM- 1 2 R8023 Close to phase1 L8001
T8006 Irat=25A

2
1

2
1KOhm TPC28T DCR=1.0mohm @ @ @ @

1
10V220000002 C8013 C8011 MLCC/+/-10% C8018 R8019 VRM_BST2 1 2VRM_BST2_R 1 2 Q8001 Q8002 R8048 @ 09V030000069

ISEN1

SIRA10DP-T1-GE3

SIRA10DP-T1-GE3
+ CE8005

2
VRM_RC2
0.1UF/10V 0.22UF/16V 1AV200000091 2 1 1 2 2.2Ohm
2

5 D
6
7
8

5 D
6
7
8
10% 1 2 R8051 C8027 MLCC/+/-10% @ 0.05
121017 330UF/2V

SHORT_PIN

SHORT_PIN
R8009 2KOhm 0Ohm 0.22UF/16V 1BV080000033

JP8002

JP8003
1AV200000024 2200PF/50V

2
1 2 10V340000001 1AV200000091 ESR=9mOHM
1.65KOhm 1AV200000026 10V220000035

1
G

G
10V220000276 C8010 @ 10%
121017

1
0.1UF/25V

4
3
2
1

4
3
2
1
For DC LL 1.5mOHM Check 3.01KOHM OK 1AV300000007 R8037 R8040 @ 1%

2
1 2 2 1 1 2 VRM_RTN 10KOhm 1% 10KOhm
121017
2

R8017 ISEN2 1 2 1 2 ISEN1


R8012 R8010 C8006 100Ohm VRM_LG2
4.02KOhm 2KOhm 330PF/50V 8 VSSSENSE C8016 10% R8038 1% R8041 @ 1%
10V220000069 1% @ @ 0.01UF/50V 1AV200000021 3.65KOhm 10KOhm
2 1 VSUM+ 1 2 1 2 ISEN3
1

C8040 R8039 1%
56PF/50V R8025 1Ohm
1
2

For IFDIM 100Ohm VSUM- 1 2


5%
B C8054 @ C8039 @ B
1AV200000047 10V220000001
1000PF/50V 3300PF/25V
1

1 2 T8000 T8001 T8002 T8003 T8004


Check 10% 1AV200000030
1% TPC28T TPC28T TPC28T TPC28T TPC28T
121017 C8015 @
390PF/50V +VCORE

1
6 VCCSENSE MLCC/+/-10%
1 2
+VCORE
T8064 T8042 T8043 T8044 T8045
VRM_FB2_R

R8018
100Ohm TPC28T TPC28T TPC28T TPC28T TPC28T

1
U8000B
34 38
35 GND1 GND5 39
36 GND2 GND6 40
37 GND3 GND7 41
GND4 GND8

ISL95812HRTZ
06V070000048

A A

<Variant Name>

Title : POWER_VCORE
Engineer: Alex
Size Project Name Rev
Custom VP70HW 1.2
Date: Friday, January 18, 2013 Sheet 80 of 94
5 4 3 2 1
5 4 3 2 1

+5VO & +3VO POWER SUPPLY


T8108
TPC28T T8114 T8151
JP8110 TPC28T TPC28T
D Input Current 5.46 A 1MM_OPEN_M1M2
D

+AC_BAT_SYS Input Current 2.34A

1
1 2 +5VAO +AC_BAT_SYS
+5VA +AC_BAT_SYS

1
C8143 C8148 1 2

1
10UF/25V 10UF/25V C8134 @ (0.1A)

1
vx_c0805_h57_small vx_c0805_h57_small 0.1UF/25V C8135 C8118

1
MLCC/+/-10% MLCC/+/-10% vx_c0603_small C8150 1UF/25V 10UF/25V C8139 @

2
@ 10% 1UF/6.3V vx_c0603_small vx_c0805_h57_small 0.1UF/25V

2
vx_c0402_small 10% MLCC/+/-10% vx_c0603_small

2
10%
10%

Q8100

1
IRFHS8342TRPBF 6 5 2 2 5 6
07V040000087 D 5V_LG 3V_LG D Q8111
IRFHS8342TRPBF
G 3 3 G 07V040000087

+5VO

15
14
13
12
11
U8100A
S S

VIN
DRVL1
VO1
VREG5

DRVL2
T8111
C8142
+3VO

7
L8100 0.1UF/25V TPC28T
3.3UH SR8103 SR8102 T8149 L8101
+5VO= 6.263A Irat=6.6A R0603 16 10 R0603 3V_HG
C8138 TPC28T 3.3UH JP8107
+3VO=5.585A

1
1 2 1 2 5V_BST_R
1 25V_BST 17 DRVH1 DRVH2 9 1
3V_BST 2 3V_BST_R 1 2 Irat=6.6A 1MM_OPEN_M1M2
5V_LX 18 VBST1 VBST2 8 3V_LX 1 2 1 2
+3VSUS

1
VCLK 19 SW1 SW2 7 1 2
VCLK PGOOD 0.1UF/25V

1
Enable1 20 6
EN1 EN2 0.954A
1

1
R8126 @ 6 5 2 21
+ 121108 GND + CE8103
2

2
C8146 CE8100 2.2Ohm 6 5 2 2 5 6 R8121 @ C8141 @

VREG3
D
0.1UF/25V C8155 220UF/6.3V vx_r0805_h24_small 2.2Ohm C8156 0.1UF/25V

VFB1

VFB2
D D 220UF/6.3V
121108

CS1

CS2

2
@ 10UF/6.3V EL/Lf_T=2000hrs_105c/+/-20% 0.05 G 3 vx_r0805_h24_small 10UF/6.3V 1BV090000004
1

15V_RC 2

1
3V_RC
1BV090000003 G 3 3 G 0.05
1AV300000018 1AV300000018

2
TPS51225CRUKR Q8104

1
2
3
4
5
S
06V950000017 IRFHS8342TRPBF JP8112
S SUS_PWRGD 30,92 S
@ 07V040000087 SHORT_PIN

4
1

1
C8145 @ Q8101 C8133 @

1
1

0.1UF/25V Q8102 IRFHS8342TRPBF Enable2 0.1UF/25V


vx_c0603_small IRFHS8342TRPBF 07V040000087 R8103 R8122 vx_c0603_small

2
JP8114 10%
1AV300000007 07V040000087 130KOHM 130KOHM 10%
JP8113 SHORT_PIN 10V220000227 10V220000227
C SHORT_PIN 121015 1AV300000007
C
2

IRFHS8342 RDSON=25mOHM
2

5V_FB_R 1 2 5V_FB 3V_FB 2 1 3V_FB_R

R8119 R8118
SIR166 RDSON=4mOHM

2
15.4KOHM 6.65KOHM
vx_r0402_small R8106 R8105 vx_r0402_small
1% 10KOhm 10KOhm 1%
1 2 vx_r0402_small vx_r0402_small 1 2
1% 1%

1
C8149 @ 10% C8137 10% @
U8100B
Enable1 Enable2 39PF/50V 39PF/50V
6

1 2 vx_c0402_small vx_c0402_small 1 2
22
FORCE_OFF_PWR 2 C8130 @ 10% C8144 10% @ 23 GND1
Q8109A 0.1UF/25V 0.1UF/25V 1AV300000007 GND2
1

UM6K1N vx_c0603_small vx_c0603_small


2

SR8104 SR8105 TPS51225CRUKR


T8145 06V950000017
R0402 R0402
TPC28T R8134 5% JP8111
1KOhm D8104 1MM_OPEN_M1M2 Q8110
+3VO
1

30,52 USBCHG_EN 1 2 1 +3VA 2 1 +3VAO +AC_BAT_SYS SSM3K315T


+3VSUS
1

3 2 1 @
VSUS_ON_EN 2
3

2 S
D
1

3
0.8V/0.2mA

1
5 07V030000001 R8128 C8140

G
[32,92] FORCE_OFF_PWR
Q8109B 560KOhm R8132 1%

1
1UF/6.3V
4

2
UM6K1N 5% vx_c0402_small 110KOHM
vx_r0402_small
2

10% @

2
D8111
1.2V/0.1A T8117
+5VO

1
VSUS_ON_EN 1 2 D8100 TPC28T R8142 1%
+5VA

6
1V/0.2A R8133 5% 100KOhm Q8112A

1
1 560KOhm @ UM6K1N C8153

1 1
1

R8143 5% D8112 +5VO_1_1 3 20mil @ 1 2 2 @ 0.1UF/25V


B 1KOhm 1.2V/0.1A R8112 2 @ B
[30,53] IOAC_EN

2
1 2 1 2 560KOhm C8131 @ 10% 1AV300000007
vx_r0402_small 5% 0.1UF/25V

2
1

1
@ @ vx_c0603_small Q8112B C8152
2

C8147 1AV300000007 UM6K1N 1500PF/50V


T8152 0.1UF/25V T8118 T8143 T8144 5 @ @

2
TPC28T TPC28TTPC28TTPC28T

4
VCLK +10VO
1

1
20mil

1
R8127 5%
C8151 1KOhm
1

0.1UF/25V 30,91,93 VSUS_ON 1 2 VSUS_ON_EN

2
C8136
0.1UF/25V
2

T8150 T8119 T8120 T8121

1
TPC28T TPC28T TPC28T TPC28T

@
1 JP8106 C8154
+5VO_2_2 3 1MM_OPEN_M1M2 0.1UF/25V

2
2 +12VO 1 2 +12VSUS 1AV300000007

1 1

1
1 2
20mil
D8103
1V/0.2A C8132
11.47V-14.37V (0.01A)
0.1UF/25V

2


Support ACOC =>AOAC_@ nonAOAC_@
nonsupport AOAC=>nonAOAC_@ AOAC_@

A A
T8122 T8123 T8124 T8133 T8134 T8135 T8132 T8141 T8142
TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T

+5VO +3VSUS

1
T8125 T8126 T8127 T8131 T8136 T8137
TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
<Variant Name>
+5VA
1

1
T8128 T8129 T8130 T8138 T8139 T8140 T8146 T8147 T8148 Title : POWER_SYSTEM
TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
Engineer: Alex
+3VA +3VO Size Project Name Rev
1

1
Custom VP70HW 1.1
Date: Friday, January 18, 2013 Sheet 81 of 99
5 4 3 2 1
5 4 3 2 1

+1.05VS POWER SUPPLY

SR8200
1.05V_VDD 2 1
+5VO

1
R0402 TRIP OCL
C8206
2.2UF/6.3V 10% TPS51362 GND 8A

2
D vx_c0603_small D
1AV300000020 TPS51367 5V 12A

1
C8208
0.01UF/50V 10% TPS51367 Float 16A
vx_c0402_small

2
1AV200000021

1.05V_VSNS
1.05V_GSNS

+AC_BAT_SYS
Input Current 0.75A

Vref = 2.0V
8/7 +1.05VO enable from Susb change to Vsus_on; U8200A
REFIN = GND , Vout = 1.05V

23
22
21
20
19
18
17
16
15
+1.05VUSU&PGD is for intel XDP/debug

1
TPS51363RVET_7VIA C8234 @ C8225 C8222 C8223
REFIN = FLOAT ,Vout = 1.2V 1500PF/50V 10UF/25V 10UF/25V 10UF/25V

GND1
V5
VIN3
VIN2
VIN1
SLEW
GSNS
VSNS

TRIP
MLCC/+/-10% MLCC/+/-10%

2
D8200 @ @
1.2V/0.1A
2 1 R8203 R8204
0Ohm 0Ohm 24 14 JP8202 JP8200
@ 25 REFIN2 PGND5 13 SHORT_PIN SHORT_PIN
1 2 1 2 26 REFIN PGND4 12

1
27 VREF PGND3 11
1 2 28 RA PGND2 10
46,82,84,91,93 SUSB#_PWR EN PGND1
29
GND2

PGOOD
R8200

MODE
1

1
10KOhm 1% C8217

SW1
SW2
SW3
SW4
BST
LP#

NC
0.1UF/25V C8207 10%
1AV300000007 0.1UF/10V
2

2
vx_c0402_small

1
2
3
4
5
6
7
8
9
T8234 +1.05VO
1AV200000024 TPC28T
L8200
C R8208 (5.993A) JP8201 C
0Ohm 1.05V_LX 1 2 1 2
+1.05VS

1
1 2 1 2

1.05V_BST
10,92 +1.05VS_PWRGD
C8235 10% (3.328A)
0.1UF/25V 0.68UH 3mm_open_5mil_m1m2

2
R8209 (0603) X7R 10%
1 21.05V_BST_R 2 1 R8201

11.05V_RC
2.2Ohm
4.7Ohm @
R8202 10V340000013

1
0Ohm
@

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V
1 2 C8231
+5VO

C8205

C8202

C8200

C8203

C8204

C8201
1

1
1500PF/50V

2
@

2
MODE Fsw
GND 400KHz
@ @ @
Float 800KHz
5V 1MHz

U8200B
30 36
31 GND3 GND9 35
32 GND4 GND8 34
33 GND5 GND7
GND6
TPS51363RVET_7VIA

B B

T8201 T8202 T8203 T8205 T8206 T8207


TPC28TTPC28TTPC28T TPC28TTPC28TTPC28T

+1.05VS +1.05VO

1
T8209 T8210 T8211 T8213 T8214 T8215
TPC28TTPC28TTPC28T TPC28TTPC28TTPC28T

1
GND GND

A A

<Variant Name>

Title : POWER_+1.05VS
Engineer: Alex
Size Project Name Rev
Custom VP70HW 1.1
Date: Friday, January 18, 2013 Sheet 82 of 94
5 4 3 2 1
5 4 3 2 1

DDR & VTT POWER SUPPLY


R8303
68KOhm 1%
1 2 Input Current 1.42A
D D
+AC_BAT_SYS

1
C8316 @ C8311 @ C8312 C8313
R8304
T8304 1 2 1500PF/50V 0.1UF/25V 10UF/25V 10UF/25V
+0.675VO TPC28T 1 2 +5VSUS vx_c0402_small vx_c0603_small vx_c0805_h57_small
vx_c0805_h57_small

2
(Max:1.2A) SR8300 MLCC/+/-10% 10% MLCC/+/-10% MLCC/+/-10%

DDR_MODE
120KOhm 1% Q8300 1AV500000015 @

DDR_TRIP
92 DDR_PWRGD 1AV200000095 1AV300000007

1
C8309 IRFHS8342TRPBF
JP8303 +DDR_O

1
1UF/6.3V 2 5 6 07V040000087
1 2 DDR_VTTSNS GND_TPS51216 vx_c0402_small D

S3
S5

2
R0603 10%
JP8301 @ 1 2 VLDOIN 3 G
1MM_OPEN_M1M2 SHORT_PIN +1.35V GND_TPS51216

21
20
19
18
17
16
2 1 SR8304 U8300A JP8305
+0.675VS 2 1 S

1
C8300 @ 1 2

MODE
TRIP
PGOOD
GND2

S3
S5
10UF/6.3V SR8301 C8310 1 2
(Max:1.2A)

7
1

1
C8301 C8302 @ C8303 @ vx_c0603_small R0603 0.1UF/25V T8307 3mm_open_5mil_m1m2

2
10UF/6.3V 10UF/6.3V 0.1UF/25V 20% 1 15 DDR_BST 1 2DDR_BST_R
1 2 TPC28T L8300
vx_c0603_small vx_c0603_small vx_c0603_small 2 VTTSNS VBST 14 DDR_HG 1.5UH 09V030000030 JP8300
(9.1A)
2

2
20% 20% 10% 3 VLDOIN DRVH 13 DDR_LX 1 2 1 2
VTT SW 1 2 +1.35V

1
VDDQSNS
1AV300000007 4 12 DDR_VDD
1 2 5 VTTGND V5IN 11 DDR_LG 10% Q8302 Q8303 R8302 @ 3mm_open_5mil_m1m2
VTTREF DRVL 9.1A

REFIN

PGND
M_VREF

GND1
VREF
vx_c0603_small IRFHS8342TRPBF IRFHS8342TRPBF 2.2Ohm

1
2 5 6 07V040000087 2 5 6 07V040000087

1DDR_RC
SR8305 C8304 1AV300000007 vx_r0805_h24_small JP8304
C C
R0603 0.22UF/16V D D 0.05 1 2

2
vx_c0402_small TPS51216RUKR 10V440000006 1 2

6
7
8
9
10
3 G 3 G 3mm_open_5mil_m1m2

1
GND_TPS51216 C8307 @ C8317 C8318 C8308

SHORT_PIN
F=300KHz +
DDR_REF 0.1UF/25V CE8300 10UF/6.3V 10UF/6.3V 1UF/6.3V
S S

JP8302
vx_c0603_small 560UF/2.5V 20% 20% 10% @

2
10% 1BV090000002
Close Pin 6

2
1AV300000007

DDR_REFIN
1
C8305

2
0.1UF/25V

DDR_FB
1
vx_c0603_small

2
R8300 10%
10KOhm
1%

DDR_FB
RDSon=25mOHM

2
GND_TPS51216 SR8303 U8300B
R0603 TPS51216RUKR
1 2 22
GND3
23
R8301 GND4

1
32.4KOhm
C8306
0.01UF/50V

2
B 10% GND_TPS51216 B

1AV200000021

2 1

D8300 @
1.2V/0.1A
SR8302 vx_sod323_h37
1 2 1 2 S3 GND_TPS51216
82,84,86,91,93 SUSB#_PWR
R8305
39KOhm
1

1 2 vx_r0402_small C8314
91,93 SUSC#_PWR 1% 0.1UF/25V
R8307 vx_c0603_small
2

0Ohm 10%
vx_r0402_small 1AV300000007 EN/DEM Function
@
T8308 T8310 T8305
2 1 VDD Diode-emulation TPC28T TPC28T TPC28T

D8301 @ T8314 T8313 T8309

1
1.2V/0.1A GND CCM TPC28T TPC28T TPC28T
A A
vx_sod323_h37
1 2 S5
<Variant Name>
1

1
+1.35V
R8306
10KOhm T8302 T8301 T8303 T8315 T8311 T8306
Title : POWER_DDR & VTT
1

vx_r0402_small C8315 TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T


1% 0.1UF/25V Engineer: Alex
vx_c0603_small
2

1
10% +0.675VS Size Project Name Rev
1AV300000007 Custom VP70HW 1.1
Date: Friday, January 18, 2013 Sheet 83 of 94
5 4 3 2 1
5 4 3 2 1

+1.35VS POWER SUPPLY

SR8402
1.35V_VDD 2 1
+5VO

1
/VGA TRIP OCL
C8401 R0402
2.2UF/6.3V 10% TPS51362 GND 8A

2
vx_c0603_small
D D
1AV300000020 TPS51367 5V 12A

1
C8415 /VGA
0.01UF/50V 10% TPS51367 Float 16A
vx_c0402_small

2
1AV200000021

1.35V_VSNS
1.35V_GSNS

+AC_BAT_SYS
Input Current 0.94A

Vref = 2.0V
U8400A
REFIN = GND , Vout = 1.05V

23
22
21
20
19
18
17
16
15

1
TPS51362RVET_7VIA C8410 @ C8416 C8413 C8404
REFIN = FLOAT ,Vout = 1.2V 1500PF/50V 10UF/25V 10UF/25V 10UF/25V

GND1
V5
VIN3
VIN2
VIN1
SLEW
GSNS
VSNS

TRIP
MLCC/+/-10% MLCC/+/-10%

2
/VGA /VGA /N14E-GL

121226 24 14 JP8402 JP8400


R8408 REFIN2 PGND5
R8402 25 13 SHORT_PIN SHORT_PIN
1 2 2 1 26 REFIN PGND4 12

1
R8414 27 VREF PGND3 11
2 1 105KOhm 47.5KOhm 28 RA PGND2 10
+3VO 29 EN PGND1
10V220000008 10V220000250
/VGA GND2

PGOOD
82KOhm /VGA

MODE
3

1
/VGA

SW1
SW2
SW3
SW4
R8415

BST
1

LP#
C8414 10%

NC
1 2 5 C8407 0.1UF/10V
+5VA

2
Q8400B 0.1UF/25V vx_c0402_small
4

1
2
3
4
5
6
7
8
9
UM6K1N /VGA /VGA
560KOhm /VGA 1AV300000007 T8409
6

D8400 /VGA 5% 1AV200000024 TPC28T


/VGA L8400
C 1 /VGA Q8400A C
87 FB_CLAMP 3 2 1 2
UM6K1N 1.35V_LX
+1.35VS_VGA

1
2 /VGA
87 DGPU_EN_PWR
1
1

1.5V_BST
T8414 C8409 10% (8A)
R8416 TPC28T 0.1UF/25V 0.68UH
0.8V/0.2mA

1 11.35V_RC 2
07V030000001 560KOhm R8409 (0603) X7R 10% /VGA
5% 1 21.35V_BST_R 2 1 R8401

1
/VGA 2.2Ohm
2

4.7Ohm /VGA @
R8407 10V340000013
0Ohm /VGA
@

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V
1 2 C8412
+5VO

C8406

C8411

C8408

C8403

C8405

C8402
1

1
1500PF/50V

2
@

2
MODE Fsw /N14E-GL /N14E-GL /VGA /VGA /VGA
/N14E-GL
GND 400KHz
Float 800KHz
U8400B
5V 1MHz 30 36
31 GND3 GND9 35
32 GND4 GND8 34
33 GND5 GND7
GND6
TPS51362RVET_7VIA
/VGA

T8407 T8408 T8406


1 2 TPC28TTPC28TTPC28T
92 +1.5VS_PWRGD
R8411 +1.35VS_VGA

1
B B
0Ohm
vx_r0402_small T8403 T8404 T8405
TPC28TTPC28TTPC28T

+1.5VO_LDO

1
+5VO
JP8403
1MM_OPEN_M1M2 GND
1

+3VO 2 1
R8413 2 1 +1.5VS
1

2 1 2.2Ohm
Input current=0.353A 0.353A
1

0.05 R8410 C8400 @ C8418 1 C8421 @


D8401 @ vx_r0805_h24_small 9.31KOhm 56PF/50V 10UF/6.3V 10UF/6.3V
2

1.2V/0.1A 1.5V_LDO_VDD 4 5 vx_r0402_small vx_c0402_small vx_c0603_small vx_c0603_small


2

3 VDD NC 6 1% 5% 20% 20%


2

1 2 2 VIN VOUT 7
EN ADJ 10V220000171
82,83,86,91,93 SUSB#_PWR 1 8
PGOOD GND1
1

R8404 9
GND2
1

30KOhm 1% C8420 C8417 C8419 R8412


vx_r0402_small 0.1UF/25V 10% 1UF/25V 10UF/6.3V U8401 10.5KOHM T8411 T8413 T8410 T8412
vx_c0603_small vx_c0603_small vx_c0603_small RT9042-25GSP GND vx_r0402_small TPC26T TPC26T TPC26T TPC26T
2

1AV300000007 10% 20% 1%


2

Vref=0.8V 10V220000238
1

1
+1.5VS

A A

<Variant Name>

Title : POWER_1.5VS
Engineer: Alex
Size Project Name Rev
C VP70HW 1.1
Date: Friday, January 18, 2013 Sheet 84 of 94
5 4 3 2 1
5 4 3 2 1

VGA_VREF
VGA_CORE POWER SUPPLY

1
R8721 /VGA one two
20KOhm 1% R8723 /VGA
vx_r0402_small 20KOhm 1% phase phase
vx_r0402_small

2
2 1 VGA_REFADJ
R8723 39K 20K

1
D D
R8716 /VGA
R8721 30K 20K
2KOhm 1% R8716 3K 2K
121030 vx_r0402_small
R8713 27K 18K

2
VGA_REFIN

1
C8720
C8703 >1.8nF 2.7nF +AC_BAT_SYS
+3VS_VGA

2
2700PF/50V

2
X7R/+/-10% R8713 /VGA
/VGA 18KOhm 1% Vmin 0.65V 0.6V VGA Input current=9.37A
vx_c0402_small vx_r0402_small R8724 @
Vmax 1.15V 1.2V 100Ohm 1%

1
vx_r0402_small
VGA_PSI# 2 1
Vboot 0.9V 0.9V C8717 C8718

1
1

5
10UF/25V 10UF/25V
optional Q8701 Q8706 C8702 C8710
naming /N14M-GL /N14P-GV2 R8725 @ SIRA14DP-T1-GE3 SIRA14DP-T1-GE3 1500PF/50V MLCC/+/-10% 0.1UF/25V MLCC/+/-10%

2
5 D
6
7
8

5 D
6
7
8
GND_RT8812A GND_RT8812A 100Ohm 1% 07V040000100 07V040000100 1AV200000095 1AV500000015 @ 1AV500000015
vx_r0402_small @ /VGA /VGA
/VGA @

S
G

G
121024

4
3
2
1

4
3
2
1
121015
T8711
R8708 /VGA C8701 /VGA T8709 TPC28T
0Ohm 0 0.22UF/16V MLCC/+/-10% TPC28T L8701
121016 vx_r0603_h28_small vx_c0402_small 0.36UH
121017

1
D8700 @ 1 2 VGA_BST1_R 1 2 1 2 +VGA_VCORE_O
+VGA_VCORE

1
1.2V/0.1A
2 1 Irat=24A
91 DGPU_EN_PWR

1
/VGA
EDP=50A

1
R8705

VGA_RC1
VGA_VRON
C8713 /VGA
OCP:60A

VGA_BST1
2.2Ohm

5
VGA_HG1
1 2 0.1UF/10V Q8702 Q8703

SIRA10DP-T1-GE3

SIRA10DP-T1-GE3
10V440000006

1
C8727 C8728
1AV200000024 121016 TDC=35A

2
/VGA

5 D
6
7
8

5 D
6
7
8
C R8722 1% CE8701 @ CE8700 10UF/6.3V 10UF/6.3V C
10KOhm 330UF/2V 560UF/2.5V 20% 20%

2
1
SR8701 /VGA 1BV080000033 1BV090000002 /VGA /VGA
1 2 C8712 /VGA

S
VGA_PSI#

G
SR8703 1500PF/50V

2
nb_r0402_short_5mil_small 1 2 1AV200000095
VGA_VID

4
3
2
1

4
3
2
1
/VGA /N14E-GL /VGA
nb_r0402_short_5mil_small

U8700A /VGA
R8718 /VGA +AC_BAT_SYS RT8812AGQW

5
4
3
2
1
100Ohm 1%
vx_r0402_small

UGATE1
BOOT1
VID
PSI
EN
2

2 1
R8700 /VGA
499KOhm 1%
121030 vx_r0402_small
GND
21 R8710 /VGA +AC_BAT_SYS
VGA_REFADJ 6 20 VGA_LX1 0Ohm 0
NVDD_GND_SENSE
1

R8728 VGA_REFIN 7 REFADJ PHASE1 19 VGA_LG1 vx_r0603_h28_small


1

C8723 /VGA 1 43KOhm 2 VGA_VREF 8 REFIN LGATE1 18 VGA_VDD 1 2


100PF/50V 9 VREF PVCC 17 VGA_LG2 +5VS
vx_c0402_small 10 TON LGATE2 16 VGA_LX2
@
2

5% RGND PHASE2
NVDD_SENSE 121030

UGATE2

5
PGOOD
VGA_PSI# VO_action Q8704 Q8708

BOOT2
NB_R0402_20MIL_SMALL
2

1
VSNS
SIRA14DP-T1-GE3 SIRA14DP-T1-GE3 C8719 C8716
1

1
5 D
6
7
8

5 D
6
7
8
R8729 C8721 /VGA C8703 @ R8727 07V040000100 07V040000100 C8715 C8714
SR8705

~ 0.8V 1 Phase DEM 130115

SS

1
+VGA_VCORE 2 1 80.6KOhm 0.1UF/10V 2700PF/50V 15KOhm @ 10UF/25V 10UF/25V
1500PF/50V 0.1UF/25V

2
10V220000098 vx_c0402_small MLCC/+/-10% /VGA C8709 /VGA MLCC/+/-10% MLCC/+/-10%
1.2 ~ 1.8V 1 Phase FCCM 121009 /VGA 1AV200000095 @
2

11
12
13
14
15

2
R8720 /VGA @ 10% vx_c0402_small 10V220000023 1UF/10V 1AV500000015 1AV500000015

S
1

G
100Ohm 1% 1AV300000025 @ /VGA /VGA
2.4V ~ 2 Phase FCCM vx_r0402_small

4
3
2
1

4
3
2
1
121015
1

1
R8730
16KOHM

390PF/50V

GND_RT8812A VGA_HG2
C8711

GND_RT8812A T8712
2

R8711 /VGA C8704 /VGA TPC28T


121206 @ 0Ohm 0 0.22UF/16V MLCC/+/-10% L8700
1 2

@ vx_r0603_h28_small vx_c0402_small 0.36UH

1
VGA_BST2 1 2 VGA_BST2_R 1 2 1 2
10%
4700PF/25V

B B
C8724

Irat=24A
2

/VGA

1
Q8705 Q8707

SIRA10DP-T1-GE3

SIRA10DP-T1-GE3
@ R8715

VGA_RC2
5 D
6
7
8

5 D
6
7
8
2.2Ohm

1
10V440000006 C8725 C8726
SR8700 10UF/6.3V 10UF/6.3V CE8702

2
1 2 /VGA

/VGA
/N14E-GL 20% 20% 560UF/2.5V

S
91,92 DGPU_PWROK

2
G

G
/VGA /VGA 1BV090000002

1
nb_r0402_short_5mil_small /VGA

4
3
2
1

4
3
2
1
C8705
1500PF/50V

2
1AV200000095
/VGA

T8703 T8707 T8708


TPC28T TPC28T TPC28T
U8700B /VGA
1

22
23 GND1 +VGA_VCORE
GND2

RT8812AGQW

A T8704 T8701 T8702 A


TPC28T TPC28T TPC28T
1

<Variant Name>

Title : POWER_VGACORE
Engineer: Alex
Size Project Name Rev
Custom VA70HW 1.1
Date: Friday, January 18, 2013 Sheet 87 of 99
5 4 3 2 1
5 4 3 2 1

BATTERY CHARGER

Adapter 120W=6.32A
Adapter 90W=4.74A
D Adapter 65W=3.42A Q8806
D

Q8800 Q8802
T8818 T8814 T8815 T8816 T8817 8 D S 1
TPC28T TPC28T TPC28T TPC28T TPC28T 8 D S 1 +A/D_DOCK_IN_Q 1 S D 8 R8808 7 2 JP8800
7 2 2 7 RES 10m OHM 1W (1206) 1% 6 3 3MM_OPEN_5MIL
6 3 3 6 +A/D_DOCK_IN_Q_Q 1 2 +AC_BAT_SYS 5 4 +BAT 1 2 +BAT_CON
60 +A/D_DOCK_IN G +BAT_CON
1

1
5 4 4 5 1 2
G G
+A/D_DOCK_IN 10mOhm
IRF8707PBF
2

2
BATG @ JP8801
IRF8707PBF IRF8707PBF

2
R8801 C8802 C8803 SR8804 SR8805 07V040000099 C8827 3MM_OPEN_5MIL

2
2.2ohm 2200PF/50V 07V040000099 0.1UF/25V 07V040000099 R0603 R0603 C8828 C8813 1500PF/50V 1 2

1
1 2 X7R 10%

2
4/24 C8830 RES FILM 2.2 ohm 1/2W 1206 5% MLCC 0.1UF/25V(0603) X7R 10% 1500PF/50V 1500PF/50V R8818 MLCC 1500PF/50V(0402)

1
1

10UF/25V 1AV300000007 MLCC 1500PF/50V(0402) X7R 10% C8816 560KOhm 1AV200000095


1

1
MLCC/+/-10% ACG 1AV200000095 1AV200000095 0.01UF/50V 10V240000037 EMI Request,Close Q8806

1
@ 1AV200000021 @
@ @
2

1
C8806 EMI Request,Close Q8806
1

2
C8801 1 2 T8800 T8801 TPC28T T8803 T8813

2
2.2UF/25V R8806 TPC28T TPC28T T8802 TPC28T TPC28T

2
MLCC/+/-10% 4.02KOhm C8814 0.1UF/25V
2

2
MLCC 2.2UF/25V (1206) X7R 10% RES 4.02K OHM 1/10W(0603)1% 0.1UF/25V MLCC 0.1UF/25V(0603) X7R 10% C8805 +BAT_CON

1
R8802 10V320000061 MLCC 0.1UF/25V(0603) X7R 10% 1AV300000007 0.1UF/25V

1
CHG_LDO 4.02KOhm 1AV300000007 MLCC 0.1UF/25V(0603) X7R 10%
1%
RES 4.02K OHM 1/10W(0603)1% 1AV300000007
+AC_BAT_SYS

CHG_ACP
10V320000061 T8804 T8805 TPC28T T8807 T8812

1
TPC28T TPC28T T8806 TPC28T TPC28T
2

R8803 +AC_BAT_SYS +BAT

1
2

432KOhm CHG_ACN
10V220000320 R8813 1%
10KOhm ACDRV T8808 T8809 TPC28T T8811 T8819
1

1
C8822 C8817 C8818 C8823 @ TPC28T TPC28T T8810 TPC28T TPC28T
30,74,90 AC_IN_OC 1/16W (0402) 1% 10UF/25V 10UF/25V 0.1UF/25V
1

8
7
6
5
MLCC/+/-10% MLCC/+/-10% 10%

1
U8800A Q8804 1500PF/50V @ 1AV300000007

D
BQ24735RGRR IRF8707PBF 1AV200000095
06V370000005 T8825

G
07V040000099

S
C TPC28T C
T8822 T8821 TPC28T T8824 T8823

1
2
3
4
AD_IINP 30 TPC28T TPC28T T8820 TPC28T TPC28T

1
2

5
4
3
2
1
121015
2

1
C8820 +AC_BAT_SYS

CMSRC

ACN
ACOK
ACDRV

ACP

1
R8804 C8825 R8814 100PF/50V C8819 R2.0

1
68KOhm 0.1UF/10V 12.4KOHM (0402) NPO 5% 0.47UF/25V L8800
1

2
RES 68K OHM 1/16W (0402) 1% 1% 21 MLCC 0.47UF/25V (0603) X5R 10% 4.7UH
10V220000168 1AV200000024 RES 12.4K OHM 1/16W(0402) 1% R0603 6 GND2 20 CHG_VCC Irat=5.5A R8810
1AV300000032
1

SR8802 7 ACDET VCC 19 CHG_LX 1 2 +BAT_R 1 2 +BAT


10V220000278
+3VA
30,60 SMB0_DAT
1 2 8 IOUT PHASE 18 CHG_HG +BAT
SDA HIDRV

1
9 17 CHG_BST 1 2CHG_BST_R 2 1 10mOhm
R0603 10 SCL BTST 16 R8819 @ (1206) 1%
ILIM REGN

8
7
6
5

1
SR8803 SR8801 C8810 10% 2.2Ohm C8811 C8812 C8815 @

CHG_RC
BATDRV
2

3
1 2 R0603 0.047UF/16V Q8805 10V440000006 10UF/25V 10UF/25V 10UF/25V

LODRV

D
30,60 SMB0_CLK

1
GND1
R8815 C8824 1AV200000048 IRF8707PBF MLCC/+/-10% MLCC/+/-10% MLCC/+/-10%

SRN
SRP

2
560KOhm 1UF/25V JP8802 JP8803

G
D8801 07V040000099

S
5% (0603) X5R 10% D8800 SHORT_PIN SHORT_PIN

1
1 R8817 RES 560K OHM 1/16W(0402)5% 0.8V/0.2mA C8826 @
1

11
12
13
14
15

1
2
3
4

2
3CHG_VCC_R 1 2CHG_VCC 10V240000037 T8826 TPC28T 0.1UF/25V

2
+BAT 2 CHG_LDO 1AV300000007 MLCC 0.1UF/25V(0603) X7R 10%
R8809

2
22Ohm CHG_LG C8807

1
2

RES 22 OHM 1/8W(0805)5% BATG 2 1 CHG_SRP_R 1 2 CHG_SRN_R


0.8V/0.2mA
1

10V440000007 R8816

2
@ 150KOhm C8821 0.1UF/25V
1% 4.02KOhm C8808 1AV300000007 C8809
0.01UF/50V
2

RES 150K OHM 1/16W (0402)1% RES 4.02K OHM 1/10W(0603)1%


10% @ 0.1UF/25V SR8806 SR8807 0.1UF/25V
1

1
1AV200000021 10V320000061 MLCC 0.1UF/25V(0603) X7R 10% R0603 R0603 MLCC 0.1UF/25V(0603) X7R 10%
1AV300000007 1AV300000007

2
CGH_SRP

CGH_SRN

B B

AC_IN_OC
1

R8820
U8800B
100KOhm
1% 25 1 2
GND6 24
2

SR8808 BAT_LEARN GND5 23 SR8800


1 2 GND4 22 R0603
GND3
R0402
R8807 5% 3 BQ24735RGRR
D 06V370000005
2MOHM
(0402)5% Q8803
1

ACDRV 2 1 1 C8829
G 2N7002 0.022UF/16V
2 S
2

10%
2

R8805 5% 1AV200000027
1MOhm

RES 1M OHM 1/16W (0402) 5% R2.0


1

A A

<Variant Name>

Title : POWER_CHARGER
Engineer: Alex
Size Project Name Rev
Custom VP70HW 1.1
Date: Friday, January 18, 2013 Sheet 88 of 15
5 4 3 2 1
5 4 3 2 1

P.90

ADAPTER IN DETECT

D D

30,74,88 AC_IN_OC

BATTERY IN DETECT

1
TPC28T
T9018 R9008
100KOhm
AC_IN_OC#

1
2 1 @
60 TS1# BAT1_IN_OC# 30

2
3
C @
JP9024 B 1
SHORT_PIN Q9006
PMBS3904 E

2
2 C9001
0.1UF/25V
10%

1
@
1AV300000007

C C

B B

A A

<Variant Name>

Title : POWER_DETECT
Engineer: Alex
Size Project Name Rev
Custom VP70HW 1.1
Date: Friday, January 18, 2013 Sheet 90 of 99
5 4 3 2 1
5 4 3 2 1

SUSB#_PWR POWER SUSC#_PWR POWER T9103 T9107 T9121


T9101 T9115 T9106 TPC26T TPC26T TPC26T
TPC26T TPC26T TPC26T

2 S
+3V

D
+3VO

1 1

1
3
2 S
+3VS

D
+3VO

1 1

1
C9109 @ Q9103 @ VGS= 4.5V , Rdson = 41mOhm C9114 @

3
(Max:1.3875A)

G
1
C9100 @ Q9100 VGS= 4.5V , Rdson = 41mOhm C9108 47PF/50V IRFML8244TRPBF VGS= 10V , Rdson = 24mOhm 0.1UF/25V

1
(Max:3.973A)

G
47PF/50V IRFML8244TRPBF VGS= 10V , Rdson = 24mOhm 0.1UF/25V vx_c0402_small vx_c0603_small

2
vx_c0402_small vx_c0603_small 5% +3V_SW_1 2 1 10%
2

2
5% +3VS_SW_R 2 1 10% 1AV300000007

1
1AV300000007 C9115 @ R9104

1
C9101 R9105 0.1UF/25V 22KOhm
0.1UF/25V 47KOhm vx_c0603_small vx_r0402_small

2
vx_c0603_small vx_r0402_small 10% 1%

2
10% 1% T9119 T9123 T9102 1AV300000007 @
1AV300000007 TPC26T TPC26T TPC26T
D D

2 S
+5VO D +5VS

1 1

1
3
1

C9116 @ Q9101 VGS= 4.5V , Rdson = 41mOhm C9103


(Max:2.263A)
G
47PF/50V IRFML8244TRPBF VGS= 10V , Rdson = 24mOhm
1 0.1UF/25V
vx_c0402_small vx_c0603_small
2

2
5% +5VS_SW_R 2 1 10%
1AV300000007

1
C9107 R9106
0.033UF/16V 47KOhm 121015
vx_c0402_small vx_r0402_small
10% 2 1%

T9113 T9114 T9117


TPC26T TPC26T TPC26T
T9108 T9124 T9111
R9126 5% TPC26T TPC26T TPC26T 1 2
+12VSUS +12V

1
560KOhm
1 2 R9103 @
+12VSUS +12VS (Max:0.005A)

1
560KOhm
vx_r0402_small
(Max:0.01A)
3

3
5%
R9125
1 2 5 1 2 5
+5VO T9142 Q9107B
+5VO Q9106B
4

4
6

TPC28T UM6K1N R9124 @ UM6K1N


560KOhm Q9107A T9120 560KOhm @

6
SUSB#_PWR 5% 2 UM6K1N TPC26T vx_r0402_small
1

5%
1

SUSC#_PWR 2

1
Q9106A

1
UM6K1N
@

C C

DSC#_PWR POWER(dGPU) T9130 T9129 T9136


TPC26TTPC26TTPC26T
Q9116
8 1
+1.05VS_VGA

1 1

1
7 2 D9102 1.2V/0.1A /VGA
6 S 3 1 2 C9102 @
5 5 D 4 R9113
0.1UF/25V
(Max:2.665A)
+1.05VO 1 2 10%
G

2
SIRA10DP-T1-GE3

1
C9119
/VGA 0.1UF/25V 200KOhm
VGS= 10V , Rdson = 3.2mOhm vx_c0402_small 10V220000037

2
10%
Q9115 /VGA /VGA
/VGA
121028 T9126 T9132 T9138
IRFML8244TRPBF TPC26TTPC26TTPC26T
121016
2 S
+3VS_VGA
D

+3VO

1 1

1
3

C9122 @ (Max:0.543A)
G

R9114 /VGA 0.1UF/25V


1

VSUS_ON POWER 2 1 10%

2
1
C9118 10KOhm
JP9101 0.1UF/25V
1 2 vx_c0402_small 10V220000003 121023

2
1 2 10%
3mm_open_5mil_m1m2 T9139 T9141 T9140 /VGA
Q9112 @ TPC26T TPC26T TPC26T
B IRFML8244TRPBF B
2 S

+5VSUS
D

+5VO
1 1

1
3
1

C9128 @ C9127 @
(Max:4A)
G

47PF/50V 0.1UF/25V
1

vx_c0402_small vx_c0402_small
121206
2

5% VGS= 4.5V , Rdson = 22mOhm 10%


VGS= 10V , Rdson = 17mOhm

+5VSUS_SW_R
1

C9129 @ R9115 1 2
0.1UF/25V 1KOhm
+12VSUS
vx_c0402_small vx_r0402_small R9129 @
2

10% 1% 560KOhm
@ vx_r0402_small
3

5%
@
1 2 5
+5VA Q9113B
4

R9128 @ UM6K1N
560KOhm
vx_r0402_small
6

5%
@
30,57,81,93 VSUS_ON 2
Q9113A T9125 T9143 T9144
1

UM6K1N TPC26TTPC26TTPC26T
Q9111
+12VSUS +12VS_VGA
E

1
4
3

(Max:0.01A)
47K

2
B

DGPU_EN_PWR
87 DGPU_EN_PWR
R9111
2

B
47K

10K
47K

10KOhm
10V220000003
/VGA
121028
1

T9122 T9109 68@-5mA/Vceo=+/-50V


TPC26T SP9100@ TPC26T SP9101@ /VGA
nb_r0402_short_5mil_small nb_r0402_short_5mil_small
1 2 1 2
22,23,30,57,92 SUSB_EC# 30,50,57 SUSC_EC#
1

T9118 T9116
A A
TPC26T TPC26T

82,83,84,86,93 SUSB#_PWR 83,93 SUSC#_PWR


1

DSC_VGA_PWR POWER Control


TPC26T
R1.0 0103 T9135
SR9123
<Variant Name>
1 2
VGA_PWRON
1

TPC26T
T9149 R0603(1KOhm) Title : POWER_LOAD SWITCH
87 DGPU_EN_PWR Engineer: Alex
1

Size Project Name Rev


Custom VP70HW 1.1
Date: Friday, January 18, 2013 Sheet 91 of 94
5 4 3 2 1
5 4 3 2 1

+3VS

POWER GOOD DETECTER

1
R9205
100KOhm
1%

2
T9203
D D
TPC28T

1 2
84 +1.5VS_PWRGD

1
SR9204
R0402
T9202
TPC28T +3VSUS
1 2 1 A 5
83 DDR_PWRGD

1
VCC
T9200
SR9200 2 B TPC28T
R0402
3 4
ALL_SYSTEM_PWRGD 10,30

1
GND
T9210 Y T9204
TPC28T U9200 @ TPC28T
Vcc=2~5.5
1 2 1 2 1 2
82 +1.05VS_PWRGD PM_PWROK 10,22,30

1
SR9201 SR9203 R9202 @
R0402 R0402 0Ohm

C T9207 C
TPC26T

1 2
87,91 DGPU_PWROK

1
R9208 @
0Ohm
vx_r0402_small

+3VSUS

1
R9206
100KOhm
T9206 1%
TPC28T

2
2 1
30,81 SUS_PWRGD
1

D9201
1.2V/0.1A

B B

1 2
DELAY_VR_AND_ALL_SYS 22
SR9202
R0402
T9201
TPC28T
+3VS SUSB_EC#
22,23,30,57,91 SUSB_EC#
FORCE_OFF# 32,50,81

1
1

1
Change to 1.91K R9204 R9201
100KOhm D9200 560KOhm
T9208 1% 1.2V/0.1A 5%

3
TPC28T +3VSUS
2

2
FORCE_OFF_PWR 81
1 A 5 5
30,80 VRM_PWRGD
1

VCC
Q9200B

4
6
A 1 2 ALL_SYSTEM_PWRGD 2 B UM6K1N A

1
Q9200A C9200
<Variant Name>
D9202 3 4 2 UM6K1N 4.7UF/6.3V
GND
1.2V/0.1A Y 10%
1

2
U9201 @
Vcc=2~5.5
Title : POWER_PROTECT
Engineer: Alex
Size Project Name Rev
Custom VP70HW 1.1
Date: Friday, January 18, 2013 Sheet 92 of 94
5 4 3 2 1
5 4 3 2 1

FOR POWER TEST


+AC_BAT_SYS +AC_BAT_SYS 45,80,81,82,83,86,87,88

+BAT_CON +BAT_CON 60,88


T9300
D JP9300 @ TPC28T D

+5VA SGL_JUMP
+5VA 50,52,81,91
1 2
+3VA CPU_VRON_PWR 80

1
1 2
+3VA +3VA 20,27,30,52,56,57,65,81,88
T9301
JP9301 @ TPC28T
SGL_JUMP
1 2
SUSB#_PWR 82,83,84,86,91

1
1 2
+5VO +5VO 81,84,91
T9302
+3VO JP9302 @ TPC28T
+3VO 37,81,84,91
SGL_JUMP
+1.05VS +1.05VS 86,91 1 2
SUSC#_PWR 83,91

1
1 2
T9303
JP9303 @ TPC28T
+1.05VO +1.05VO 82,91 SGL_JUMP
1 2
VSUS_ON 30,81,91

1
1 2
+12VSUS T9304
+12VSUS 22,28,53,81,91
JP9304 @ TPC28T
+5VSUS SGL_JUMP
+5VSUS 22,25,52,53,81,82,83,86,91
C 1 2 C
DGPU_EN_PWR 84,87,91

1
1 2
+3VSUS +3VSUS 4,10,22,23,27,28,30,33,53,81,92

+12V +12V 91

+3V +3V 4,23,31,40,55,57,91

+12VS +12VS 20,28,48,91

+5VS +5VS 25,30,31,36,37,46,48,50,51,56,57,58,80,87,91

+3VS +3VS 16,17,20,21,22,23,25,26,27,28,30,32,33,36,37,44,45,46,48,50,51,53,57,58,91,92

+1.5VS +1.5VS 20,21,22,24,26,27,53,57,84,86,91


B B
+1.05VS +1.05VS 4,10,26,27,57,82,87

A A
<Variant Name>
+VCORE +VCORE 6,9,57,80

Title : POWER_SIGNAL
Engineer: Alex
Size Project Name Rev
Custom VP70HW 1.1
Date: Friday, January 18, 2013 Sheet 93 of 94
5 4 3 2 1

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