ap

Ch ter
10 Memory Devices

10.1 Introduction
A Digital Processor generally requires the storage of data used in a program as
well as the storage of instruction for execution of a program. Hence, digital sys-
tems require memory facilities for temporary as well as permanent storage of data.
Thus, a memory stores data for processing & instructions for execution.
memory

primary magnetic
semiconductor or storage

RAM secondary backup

ROM storage storage

Static dynamic
RAM RAM
semirandom serial
access access
erasable permanent e.g., magnetic
e.g. flopydisk
tapes,
CD-ROM
CCD
hard disk
masked PROM

EPROM EEPROM flash

memory

Fig. 10.1 Classification of memory

10.2 Digital Electronics, an easy approach to learn

Information from magnetic & optical storage devices such as hard disk, read
only Memory (CD-ROM) and digital tape must be accessed sequentially, starting
at the beginning of a data file or track. In contrast, data stored in an electronic
memory cell can be accessed at random and on demand using direct addressing.
Direct addressing eliminates the need to process a large stream of irrelevant data
in order to find the desired data word.

10.2 Basics of Memory

To understand the internal construction of a random access memory we have to
understand first how basic memory cell functions.
A 1-bit binary storage cell is the building block of a memory unit.

Logic diagram
select line FACT:
The human brain can
i/p o/p
D Q probably store up to one
> billion, trillion bits of in-
formation.
Flip-flop stores one bit of
read/write
information.
Register stores a word.
select line
Register file stores a num-
i/p M o/p ber of words information
The very first computer
read/write
memory consisted of a
Fig.10.2 Binary cell that stores 1-bit of in- minute magnetic toroid,
formation called core memory.

Operation
The binary cell showed in the figure 10.2 stores 1-bit of information in its internal
latch. The select input enables the cell for reading or writing and the read/write
input determines the cell operation, when it is selected. A 1 in the read/write
input provides the read operation by forming a path from the latch to the output
terminal, where as a 0 in the read/write input provides the write operation by
forming a path from the input terminal to the latch.
 Memory Devices 10.3

Construction of a memory units and its decoding

In addition to the storage component in a memory unit, there is a need for decod-
ing circuits to select the memory word specified by the input address.
The construction and operation of a memory unit can be explained by taking
an example of a small RAM (44). 44, depicts that the RAM consists of 4
words of 4-bits each, and has a total number of 16 basic binary cells.
A memory with 4 words needs two address lines. To access 4 words using 2
address lines we need a 24 decoder
D0 D1 D3
D2

word 0
M M M M

word 1
address
i/p
M M M M

memory word 2
enable
M M M M

word 3

M M M M
read/write

output data Q0 Q1 Q2 Q3

Fig. 10.3 Memory unit organization

Operation
The decoder is enabled with memory enable input. When the memory enable
is 0, all the outputs of the decoder are 0 and none of the memory words are
selected (that is contents of all the cells remain unchanged regardless of the value
of the read/write input). With the memory enable at 1, one of the four words
are selected dictated by the value in the two address lines. Once a word has been
selected, the read/write input determines the operation.
During the read operation, the 4-bit of the selected word go through OR gates
to the output terminals. During the write operation, the data available in the input
10.4 Digital Electronics, an easy approach to learn

lines are transferred into the four binary cells of the selected words. The binary
cells which are not selected are disabled, and their previous binary value remain
unchanged.
Note: A memory with 2K words of n-bits per words requires K-address lines that
requires a K 2K decoders. Each one of the decoder outputs selects one
word of n-bits, for reading or writing.

Example 10.1 How many address inputs data outputs are required for a
16 K 12 memory?
I Solution
We know that,
A memory with 2K words requires K-address line.
Number of words = 16K = 24 210 = 214
Number of address = 14
Number of output lines = 12

Example 10.2 The following memory units are specified by the number of words
times the number of bits per word. How many address line and output data lines
are needed in each of the following cases,
1. 4K 16
2. 4M 8
3. 8G 4
I Solution
A memory with the form
2K N depicts
K is the number of address lines and N is the output lines

1. 4K 16
= (22 210 ) 16
= 212 16
Hence, number of address lines = 12
number of data output lines = 16
 Memory Devices 10.5

2. 4M 8
= (22 220 ) 8
= 222 8
Hence, number of address lines = 22
number of data output lines = 8
3. 8G 4
= (23 230 ) 4
= 233 4
Hence Number of address lines = 33
Number of data output lines = 4

Coincident Decoding
A decoder with K inputs and 2K outputs requires 2K numbers of AND gates with
K inputs per gate. The total number of gates and the number of input per gate can
be reduced by employing two decoders in a two dimensional selection scheme.
In this configuration, two K/2 input decoders are used, instead of one K input
decoder. One decoder performs the row selection and other the column selection
in a 2D matrix configuration as shown in Fig.10.4.

532 decoder
0 1 2 20 31

0
1
532 2 binary
A decoder address
12 01100 10100
A B
31

Fig. 10.4 Memory decoding

Figure 10.4, shows a 1K- word memory. So instead of using a single 10

1024 decoder, we have used two 5 32 decoders which reduces the usage of 1024
10.6 Digital Electronics, an easy approach to learn

number of AND gates with 10 inputs in each to 64 numbers of AND gates with
5 inputs in each. Each word within the memory is selected by the coincidence
between 1 of 32 rows and 1 of 32 columns for a total of 1024 words.
For example, consider the word whose address is 404. The 10-bit binary
equivalent of 404 is 01100 10100. This makes A = 01100 (binary 12) and B =
10100 (binary 20). So the coincidence of binary 12 and binary 20 outputs gives
the n-bit word that is selected.

10.3 Programmable Logic Devices (PLDS)

PLDs are ICs with a large number of gates and flip-flops that can be configured
with basic software to perform a specific logic function or perform the logic for
a complex circuit. Unlike a logic gate which has a fixed function, a PLD has an
undefined function at the time of manufacture. Before the PLD can be used in a
circuit, it must be programmed, i.e., configured.

Advantages of PLDS
Programmable logic devices offer a number of advantages over fixed logic de-
vices, including:
Design flexibility:
PLDs offer customers much more flexibility during the design cycle be-
cause design intentions are simply a matter of changing the programming
file and the results of design changes can be seen immediately in working
parts.
Improved reliability:
Lower power plus fewer interconnections and packages translate into greatly
improved system reliability.
Lower power:
CMOS and fewer packages combine to reduce power consumption.
Reduced complexity:
Since PLDs consume lower power, requirements are less board space and
simple testing procedures.
PLDs are field programmable, i.e., can be programmed outside the manu-
facturing environment.
 Memory Devices 10.7

PLDs are erasable and re-programmable logic device, i.e. they allow cor-
rection of errors, updating, and reuse of the device for a different design its
ultimate aim is reusability.
There are three fundamental types of standard PLDs:
1. PROM (Programmable Read only Memory)
2. PAL (Programmable Array Logic)
3. PLA (Programmable Logic Array)
Other PLDs are also there like Complex Programmable Logic Device (CPLD),
for example Field Programmable Gate Array (FPGA).
In order to show the internal logic diagram for such technologies in a concise
form, it is necessary to have special symbols for array logic. The Fig.10.5 shows
the conventional and array logic symbols for a multiple input AND gate and a
multiple input OR gate.

XX X X X

XX X X X

Conventional symbol Array logic symbol

Fig. 10.5 Special symbol for array logic

10.3.1 PROM (Programmable Read Only Memory)

A Programmable Read Only Memory (PROM) or Field Programmable Read Only
Memory (FPROM) or One Time Programmable Non-Volatile Memory (OTP NVM)
is a form of digital memory where the setting of each bit is locked by a fuse or
anti-fuse. Such PROMs are used to store program permanently. The key differ-
ence from a strict ROM is that the programming is applied after the device is
constructed.

i/p fixed AND o/p

programmable
array
OR array
(decoder)

Fig. 10.6(a) Programmable read only memory

These types of memories are frequently seen in video game consoles, mo-
bile phones, Radio-Frequency Identification (RFID) tags, implantable medical
10.8 Digital Electronics, an easy approach to learn

devices, High-Definition Multimedia Interfaces (HDMI) and in many other con-

sumer and automotive electronic products.
The PROM has a fixed AND array (constructed as a decoder) and a pro-
grammable connections for outputs OR gates array. The PROM implements Boolean
functions in sum of min-terms form.

Fig. 10.6(b) Process of data storage in PROM

10.3.2 Programmable Array Logic (PAL)

PAL is used to describe a family of programmable logic devices semiconduc-
tors used to implement logic functions in digital circuit introduced by Monolithic
Memories Incorporation (MMI) in March 1978.
PAL devices consisted of a small PROM core and additional output logic used
to implement particular desired logic functions with few components.
PAL devices has a programmable AND array and fixed connections for the
OR array. As only AND gates are programmable, the PAL device is easier to
program and flexible.

i/p programmable fixed OR o/p

AND array array

Programmable Array Logic (PAL) device

Example 10.3 Implement the following Boolean functions using the PAL de-
vice X
f (A, B, C, D) = m(2, 12, 13)
 Memory Devices 10.9

I Solution
X
f (A, B, C, D) = m(2, 12, 13)
f = A BCD + ABC D + ABCD
f = A BCD + ABC(D + D)
f = A BCD + ABC

Fig. 10.7 Implementation of Boolean expression using PAL logic

10.3.3 Programmable Logic Array (PLA)

PLA is a kind of programmable logic device used to implement combinational
logic circuits. The PLA has a set of programmable AND gate planes, which link
to a set of programmable OR gate planes, which can then be conditionally com-
plemented to produce output

i/p programmable o/p

AND array
OR array

Fig. 10.8(a) Programmable logic array (PLA) device

Each of the AND gates can be programmed to generate a product term of the
input variable and does not generate all the min terms as in the ROM.
The AND gate and OR gate inside the PLA are initially fabricated with the
links (fuses) among them.
The specific Boolean functions are implemented in sum of products form by
opening appropriate links and leaving the desired connections.

Example 10.4 Implement the combinational circuit having the truth table as
given below using PLA.
10.10 Digital Electronics, an easy approach to learn

Table 10.1 Truth table

A B C f1 f2
0 0 0 0 0
0 0 1 1 0
0 1 0 0 0
0 1 1 1 0
1 0 0 1 1
1 0 1 0 0
1 1 0 0 0
1 1 1 0 1
I Solution
From the truth table,
f1 = A B C + A B C + AB C
f2 = ABC + AB C
The outputs f1 and f2 can be implemented using PLA logic as shown in Fig.10.8.
buffer and
NOT gate
X X A
A X X A
X X B
B X X B

X C
C X X X C

Programmable
AND gate
f1
X X X X

f2
X X
Programmable
OR gate

Fig. 10.8(b) Implementation of expression using PLA logic

10.4 CPLD (Complex Programmable Logic Device)

A complex Programmable logic device (CPLD) is just a collection of individual
PLD on a single chip, accompanied by a programmable interconnection structure.
 Memory Devices 10.11

It has the complexity between that of PALs and FPGAs and architectural features
of both.
I/O

PLD PLD
I/O
GLOBAL
INTERACTION
I/O MATRIX PLD
PLD I/O

Fig. 10.9 CPLD

The CPLD has two levels of programmability, each PLD block can be pro-
grammed and then the inter connection between the PLDs can be programmed.

10.5 FPGA (Field Programmable Gate Array)

A FPGA is an integrated circuit designed to be configured by the customer or
designer after manufacturing, hence field-programmable. The FPGA configu-
ration are generally specified using a Hardware Description Language (HDL)

FPGA structure

configurable
logic block
i/o
block

horizontal routing
channel

vertical routing
channel

Fig. 10.10 Basic structure of FPGA

Xilinx is one of the biggest FPGA manufacturers. A Xilinx FPGA is made of

three basic blocks:
10.12 Digital Electronics, an easy approach to learn

1. CLB : The configurable logic block are

user-specific functions
2. IOB : The input/output blocks make it
possible to connect the FPGA to the other FACT: In 1985, Xilinx in-
elements of application troduced FPGA.
3. Interconnect : Interconnect is essential
for writing between CLB and from IOBs
to CLB.

10.6 RAM (Random Access Memory)

Random Access Memory is a type of computer memory that can be accessed
randomly, i.e., any byte of the memory can be accessed without touching the
preceding bytes. RAM is the most common type of memory found in computers
& other devices such as printers etc. Unlike ROM, RAM is volatile memory and
requires power (that is if power is lost, all data is also lost)
There are two different types of RAM:
1. DRAM (Dynamic Random Access Memory)
2. SRAM (Static Random Access Memory)
The two types differ in the technology they use to hold data.

10.6.1 DRAM (Dynamic Random Access Memory)

DRAM is a type of random access memory that stores each bit of data in a separate
capacitor within an integrated circuit. The capacitor can be either charged or
discharged, these two states are taken to represent the values of bit, conventionally
called 0 & 1.

Logic diagram
WL word line

M1

storage
capacitor

B
bit line

Fig. 10.11 One bit DRAM cell

 Memory Devices 10.13

Advantages
1. The primary advantage of DRAM is its structural simplicity: only one tran-
sistor and capacitor are required per bit, compared to 4 or 6 transistors in
SRAM. This allows DRAM to reach very high densities.
2. DRAM chip is used in personal & mainframe computers & in engineering
applications.

Limitations
1. Due to the presence of junction leakage current across the storage node, the
chip information is degraded periodically
2. A refresh operation is required periodically even when the memory arrays
are not accessed (that is cell data must be read & rewritten periodically)

10.6.2 SRAM (Static Random Access Memory)

SRAM is a type of semiconductor memory where the word static indicates that,
unlike DRAM, it does not need to be periodically refreshed, as SRAM use bi-
stable latching circuitry to store each bit. SRAM exhibits data reminisce, but
is still volatile in the conventional sense that data is eventually lost, when the
memory is not powered.
WL

VDD

M2 M4
M5 M6

Q
Q

M1 M3
BL BL

Fig. 10.12 1-bit memory unit of SRAM

Each bit in an SRAM is stored in four transistors that form two cross coupled
inverters. This storage cell has two stable states which are used to denote 0 &
1. Two additional access transistors serve to control the access to a storage cell
10.14 Digital Electronics, an easy approach to learn

during read & write operations. A typical SRAM uses six MOSFETS to store
each memory bit, as shown in Fig.10.12.

Comparison between SRAM and DRAM

DRAM SRAM
1) Minimum number of transistors 1) Minimum number of transistors
required for 1-bit storage: only required for 1-bit storage is six.
one transistor.
2) DRAM memory can be deleted 2) Refreshing option is not avail-
and refreshed while running the able.
program.
3) Data is stored as a charge in a ca- 3) Data is stored in flip flop level.
pacitor
4) Possess less spaces in the chip 4) Possess comparably more
spaces in the chip.
5) Consumes less power 5) Comparably consumes more
power.
6) Less costly 6) Four times more expensive than
DRAM.
7) Has higher storage capacity 7) Comparably less storage capac-
ity
8) For accessing data or informa- 8) For accessing a data or informa-
tion DRAM takes more time tion less time is needed.

2 Concept:
General difference between DDR RAM & SDRAM
DRAM is used temporarily to store information in computers. It is made up of many
cells & each cell is referred to as bit. A cell contains a capacitor & a transistor. Since,
computer machine language is made up of 1s and 0s, it has the value of one when
active & zero when inactive.
SDRAM or Synchronous Random Access Memory is the result of DRAM evolution.
This type of memory synchronizes the input and output signals with the system board.
Its speed rating are in MHz. SDRAM transmits every clock count at a specific time.
DDR-RAM (Double Data Rate Random Access Memory) does the same but it does so,
twice every clock count. This makes DDR RAM twice as fast as SDRAM. Over the
years, RAM has become very fast & efficient.
 Memory Devices 10.15

10.7 ROM (Read Only Memory)

ROM is class of storage medium used in computers and other electronic devices.
Data stored in ROM cannot be modified or can be modified only slowly or with
difficulty. So it is mainly used to distribute firmware (software that is very closely
tied to specific hardware and unlikely to need frequent updates).
There are basically two types of ROM:
1. Erasable ROM
2. Permanent ROM

10.7.1 Erasable ROM

The data of this type of ROM can be erased or modified.
Depending on the process by which data can be erased it can be classified into:
1. EPROM FACT: EPROM was in-
2. EEPROM vented by Dov Frohman
3. FLASH Memory of Intel in 1971.

10.7.2 EPROM (Erasable Programmable Read Only Memory)

An EPROM is a type of memory chip that retains its data when its power supply is
switched OFF. In other words, it is non-volatile. It is an array of floating-gate tran-
sistors individually programmed by an electronic device that supplies higher volt-
ages than those normally used in digital circuits. Once programmed, an EPROM
can be erased by exposing it to strong ultraviolet light from mercury vapor light
source. EPROM are easily recognizable by the transparent fused quartz window in
the top of the package through which the silicon chip is visible and which permits
exposure to UV light for erasing.

10.7.3 EEPROM (Electrically Erasable Programmable Read Only Mem-

ory)
An EEPROM is a type of non volatile memory used in computers and other elec-
tronic devices to store small amounts of data that must be saved when power is
removed. For example, calibration table or device configuration.
EEPROM is user modifiable read only memory (ROM) that can be erased
& reprogrammed (written to) repeatedly through the application of higher than
normal electrical voltage generated externally or internally in the case of modern
EEPROMs. EPROM usually, must be removed from the device for erasing and
10.16 Digital Electronics, an easy approach to learn

programming, whereas EEPROMs can be programmed & erased in circuit. Orig-

inally EEPROM were limited to single byte operations which made them slower,
but modern EEPROMS allow multi-byte page operation. It also has a limited life,
i.e., the number of times it could be reprogrammed was limited to tens or hun-
dreds of thousands of times. That limitation has been extended to a million write
operations in modern EEPROMs.

10.8 Flash Memory

Flash memory is a non-volatile computer storage chip that can be electrically
erased and reprogrammed. It was developed from EEPROM (Electrically Erasable
Programmable read only memory).
Although flash memory is technically a type of EEPROM, the term EEP-
ROM is generally used to refer specifically to non flash EEPROM which is
erasable in small blocks, typically bytes. Flash memory now costs far less than
byte programmable EEPROM and has become the dominant memory type wher-
ever a significant amount of non-volatile, solid state storage is needed.
FLASH Memory is of two types:

1. NOR based FACT: Flash memory (both NOR and NAND

2. NAND based types) was inverted by Dr. Fujio Masuoka

10.9 Magnetic Memory

Magnetic memory is a system of storing information through alignment of small
grains in a magnetic material. Once the grains have been aligned by an external
magnetic field, the information remains stored for long periods of time. This is
the technique used in the hard drives of computers as well as in magnetic tape.
Note: Magnetic storage is the stor-
FACT: Magnetic storage is the form
age of data on a magnetized
of audio recording on a wire was pub-
medium & the storage is not
lished by Obertin Smith in 1888
volatile.

Brain Teasers
1. A certain memory chip is specified as 2K8. How many words can be
stored on this chip? How many total bits can this chip store?
 Memory Devices 10.17

I Solution
Here, 1 word = 8-bit
2K word can be stored
=21024 words
=2048 words
The total number of bits stored in the chip
=20488
=16384 bits

2. How many 32K8 RAM chips are needed to provide a memory capacity
of 256K bytes?

I Solution
1K 8 = 1K byte
32K 8 = 32K byte
So, number of chips required = 256/32 = 8

3. Find the size of decoder required for a 8K 8 memory.

I Solution
8k 8 = (23 210 ) 8 = 213 8
Number of address line = 13
Number of decoder input line = 13
Number of decoder output line = 213 = 8K
Size of the decoder = 13 213

Objective Questions
1. The difference between a PLA and a PAL is:

A. The PLA has a programmable OR plane and a programmable AND

plane, while the PAL only has a programmable AND plane.
B. The PAL has a programmable OR plane and a programmable AND
plane, while the PLA only has a programmable AND plane.
10.18 Digital Electronics, an easy approach to learn

C. The PAL has more possible product terms than the PLA.
D. PALs and PLAs are the same.

2. PALs tend to execute logic.

A. SAP B. SOP C. PLA D. SPD

3. What is the other name for digital circuitry called sequential logic?

A. Logic macro cell C. Flip-flop memory circuitry

B. Logic array D. Inverter

4. SPLDs, CPLDs, and FPGAs are all which type of device?

A. PAL B. PLD C. EPROM D. SRAM

5. The final step in the device programming sequence is .

A. Compiling C. Simulation
B. Downloading D. Synthesis

6. Field-Programmable Gate Arrays (FGPAs) use memory tech-

nology, which is .

A. DRAM, nonvolatile C. SRAM, volatile

B. SRAM, nonvolatile D. RAM, volatile

7. The Complex Programmable Logic Device (CPLD) features a(n)

type of memory.

A. Volatile C. EPROM
B. Nonvolatile D. Volatile EPROM

8. Which of the following items are examples of storage devices?

A. Floppy / hard disks C. Tape devices

B. CD-ROMs D. All of the above
 Memory Devices 10.19

9. The Width of a processors data path is measured in bits. Which of the

following are common data paths?

A. 8 bits B. 12 bits C. 16 bits D. 32 bits

10. Which is the type of memory for information that does not change on your
computer?

A. RAM C. ERAM RW/RAM

B. ROM D.

11. Symbolic logic was discovered by

A. George Boole C. Van Neumann

B. Herman Hollerith D. Basic Pascal

12. The word length of a computer is measured in

A. Bytes C. Meters
B. Millimeters D. Bits

13. Which computer memory is used for storing programs and data currently
being processed by the CPU?

A. Mass memory C. Non-volatile memory

B. Internal memory D. PROM

Answers for objectives

1. A 2. B 3. C 4. B 5. B 6. C
7. B 8. D 9. A 10. B 11. a 12. D
13. B

Exercises
10.1 Which of the following memories uses a MOSFET and a capacitor as its
memory cell?

(a) DRAM
(b) ROM
10.20 Digital Electronics, an easy approach to learn

(c) SRAM
(d) DROM

10.2 Find out the difference between RAM and ROM.

10.3 Find the basic difference between Static RAM and Dynamic RAM.
10.4 How many address inputs, data outputs are required for a 32K4 Memory?
10.5 Implement the following Boolean function using the PAL device,
X
f (A, B, C, D) = m(1, 4, 12, 13)

10.6 Implement the Boolean function using PLA device

X
f (A, B, C) = m(1, 3, 4, 7)

Answers for exercises

10.1 (a) DRAM

10.4 15, 4

10.5
A B C D A B CD

X X XX

X X X X
f

X X X

10.7
A B C A B C

X X X

X XX X

X X X X