8086 Microprocessor

8088/8086 Microprocessor
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Table of Contents
Microprocessor...........................................................................................................................................................................8
Block Diagram of a Mirco-computer.........................................................................................................................8
Architecture of 8086/8088 Microprocessor...............................................................................................................8
Execution Unit (EU)..................................................................................................................................................9
Bus Interface Unit (BIU)............................................................................................................................................9
8088/8086 Register Set............................................................................................................................................10
General Registers.....................................................................................................................................................10
Register AX..................................................................................................................................10
Register BX..................................................................................................................................11
Register CX..................................................................................................................................11
Register DX..................................................................................................................................11
Register SI....................................................................................................................................11
Register DI...................................................................................................................................11
Register SP...................................................................................................................................11
Register BP...................................................................................................................................11
Segment Registers........................................................................................................................11
Register CS.......................................................................................................................11
Register SS........................................................................................................................11
Register DS.......................................................................................................................12
Register ES.......................................................................................................................12
Register IP....................................................................................................................................12
Flag Register................................................................................................................................12
Carry Flag.........................................................................................................................13
Parity Flag.........................................................................................................................13
Auxillary Carry Flag.........................................................................................................13
Zero Flag...........................................................................................................................13
Sign Flag...........................................................................................................................13
Trap Flag...........................................................................................................................13
Interrupt Flag....................................................................................................................13
Direction Flag...................................................................................................................13
Overflow Flag...................................................................................................................13
Addressing Modes (AM).........................................................................................................................................14
Immediate Addressing Mode...................................................................................................................................14
Register Addressing Mode (or) Register Direct Addressing Mode.........................................................................14
Direct Addressing Mode..........................................................................................................................................14
Indirect Addressing Mode........................................................................................................................................14
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Register Indirect Addressing Mode..............................................................................................14
Index Addressing Mode...............................................................................................................15
Base Addressing Mode.................................................................................................................15
Base and Indexed Addressing Mode............................................................................................15
Base and Indexed with displacement Addressing Mode..............................................................15
Assembly Directives................................................................................................................................................15
DB directive.............................................................................................................................................................15
DW directive............................................................................................................................................................16
DD directive.............................................................................................................................................................16
DQ directive.............................................................................................................................................................16
DT directive.............................................................................................................................................................16
EQU directive..........................................................................................................................................................16
= directive (IS EQUAL TO directive)......................................................................................................................16
Radix directive.........................................................................................................................................................16
IFENDIF directive...............................................................................................................................................17
IFELSEENDIF directive..................................................................................................................................17
IFDEFENDIF directive........................................................................................................................................17
IFNDEFENDIF directive.....................................................................................................................................17
SEGMENTENDS directive.................................................................................................................................18
Operators..................................................................................................................................................................18
Arithmetic Operators................................................................................................................................................18
Logical Operators.....................................................................................................................................................18
Relational Operators................................................................................................................................................18
SEG Operator...........................................................................................................................................................18
OFFSET Operator....................................................................................................................................................18
LENGTH Operator..................................................................................................................................................18
SIZE Operator..........................................................................................................................................................19
TYPE Operator........................................................................................................................................................19
Instruction Set..........................................................................................................................................................19
Data Transfer Instructions........................................................................................................................................19
MOV............................................................................................................................................19
XLAT (Translate).........................................................................................................................20
XCHG (Exchange).......................................................................................................................21
LEA (Load Effective Address).....................................................................................................21
LDS (Load Data Segment)...........................................................................................................21
LES (Load Extra Segment)..........................................................................................................22
Arithmetic Instructions............................................................................................................................................22
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INC...............................................................................................................................................22
DEC..............................................................................................................................................22
NEG.............................................................................................................................................23
ADDITION..................................................................................................................................23
SUBTRACTION..........................................................................................................................23
MULTIPLICATION.....................................................................................................................24
DIVISION....................................................................................................................................24
Bit Manipulation Instructions..................................................................................................................................25
Logical Instructions......................................................................................................................25
Rotation Instructions....................................................................................................................25
ROL..................................................................................................................................25
ROR..................................................................................................................................26
RCL...................................................................................................................................26
RCR..................................................................................................................................27
Shift Instructions..........................................................................................................................27
SAL...................................................................................................................................27
SAR...................................................................................................................................28
SHL...................................................................................................................................28
SHR...................................................................................................................................28
Compare Instructions...................................................................................................................29
CMP..................................................................................................................................29
TEST.................................................................................................................................29
Jump Instructions.........................................................................................................................29
Unconditional JUMP........................................................................................................29
Conditional JUMP............................................................................................................30
Loop Instructions.........................................................................................................................30
LOOP................................................................................................................................30
LOOPE / LOOPZ.............................................................................................................31
LOOPNE / LOOPNZ........................................................................................................31
Stack Instructions.........................................................................................................................31
PUSH................................................................................................................................31
POP...................................................................................................................................32
PUSHF..............................................................................................................................32
POPF.................................................................................................................................32
Input Output (I/O) Instructions....................................................................................................32
IN......................................................................................................................................32
OUT..................................................................................................................................32
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INS / INSB / INSW..........................................................................................................33
OUTS / OUTSB / OUTSW..............................................................................................33
String Instructions........................................................................................................................33
REP...................................................................................................................................33
REPE.................................................................................................................................33
MOVS, MOVSB, MOVSW.............................................................................................33
CLD..................................................................................................................................34
STD...................................................................................................................................34
CMPS, CMPSB, CMPSW................................................................................................34
I/O Transfers............................................................................................................................................................34
Isolated I/O...............................................................................................................................................................34
Memory Mapped I/O...............................................................................................................................................35
Data Transfers..........................................................................................................................................................35
Programmed Data Transfer (Polling).......................................................................................................................35
Interrupt data transfer...............................................................................................................................................36
DMA (Direct Memory Access)................................................................................................................................37
8237 DMA Controller..............................................................................................................................................38
Programs..................................................................................................................................................................38
Sum of two 8-bit numbers........................................................................................................................................38
Difference of two 8-bit numbers..............................................................................................................................39
Average of two 8-bit numbers..................................................................................................................................39
Multiply two 8-bit numbers.....................................................................................................................................39
Divide two 8-bit numbers........................................................................................................................................40
Sum of two 16-bit numbers......................................................................................................................................41
Multiply two 16-bit numbers...................................................................................................................................41
Addition of double precision numbers.....................................................................................................................42
Block Transfer..........................................................................................................................................................43
Block Transfer Reverse Order.................................................................................................................................44
ASCII to Unpacked BCD.........................................................................................................................................44
ASCII to Packed BCD.............................................................................................................................................45
MAXIMUM.............................................................................................................................................................45
MINIMUM..............................................................................................................................................................47
READ from Keyboard and DISPLAY on the screen...............................................................................................47
Addition of n numbers without carry.......................................................................................................................48
Addition of n numbers with carry............................................................................................................................49
SORT in ascending order.........................................................................................................................................49
SORT in descending order.......................................................................................................................................50
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STRING COPY.......................................................................................................................................................51
STRING COMPARE...............................................................................................................................................52
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Microprocessor
Block Diagram of a Mirco-computer
A micro computer consists of 3 components. They are
o CPU
o Memory
o I/O subsystem
These components are connected to a Bus system which is nothing but a set of parallel wires over which digital
data is transmitted. The system includes
o Address Bus
o Data Bus
o Control Bus
Diagram1
The CPU of a micro-computer is also known as a microprocessor. It includes three components they are
o ALU
o CU
o Register Set
The ALU performs arithmetic and logical operations on direction from the CU.
The CU interprets the machine language instructions of the program and generates control signals in order to
execute the instructions.
The register set provides the capability for temporary storage of numeric data within the CPU itself.
In order to fetch a copy of the content in the memory cell the microprocessor puts the address of the necessary cell
on the address bus and then sends a 'Read' control signal via the control bus. Then a copy of the memory cell
content is placed on data bus and transferred to microprocessor.
To store a new content in the memory cell the microprocessor puts the address on the address bus, the data on the
data bus and issues a 'Write' control signal which then writes the contents in the memory.
The I/O subsystem contains a set of I/O ports which are similar to memory locations. These I/O ports are
connected to the Bus system as in the case of memory. To select the specific I/O code its address is placed on the
address bus, the data can be transmitted or received from the selected code via the data bus.
Architecture of 8086/8088 Microprocessor

The 8086 is a 16 bit microprocessor which is available as a 40 pin integrated circuit. It consists of two separate
processing units they are.
o Execution Unit (EU)
o Bus Interface Unit (BIU)
Diagram 2
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The BIU performs all the bus operations including generation of memory addresses, I/O port addresses for transfer
of data. The EU receives the program instructions from the BIU, executes them and stores the result in the general
registers.
The first difference between a 8088 microprocessor and 8086 microprocessor is in the BIU. In 8088
microprocessor the data bus of the BIU is 8 bits wide whereas in 8086 microprocessor it is 16 bits wide.
Another difference is the 8088 microprocessor instruction queue length is 4 bytes instead of 6 bytes in 8086
microprocessor.
Programs that are developed for 8086 can be read on 8088 without any change, because the EU is same for both
the microprocessors and the program instructions are also same.
Diagram 3
Execution Unit (EU)

The EU contains the following
o Control Logic for decoding and execution of instructions/
o ALU
o A set of general purpose registers and a flag register.
The EU receives the instructions bytes from the instruction queue, the control logic interprets them and executes .
When the EU needs some data from the memory or it has to store a result in thememory then it directs the BIU to
perform the required operation. The ALU can receive the operands (data) from the general registers through the
internal busor from BIU through the instruction queue.
Bus Interface Unit (BIU)

The BIU contains the following
o Control Logic to control external bus operations.
o Instruction Queue to hold instruction bytes.
o An adder for generation of memory addresses
o A set of registers
The BIU fetches the instruction bytes from the memory and puts them into the instruction queue. The BIU can
prefetch upto 4 bytes in 8088 microprocessor while the EU is processing one of the instruction byte, the BIU is free to
prefetch another instruction byte. The instruction prefetch allows the BIU and EU to work in parallel and thus
increases the performance of the microprocessor. This form of computer architecture is known as PIPELINE
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Architecture.
As long as the EU is not requesting for a data fetch or a data store operation, the BIU is free to prefetch
instruction bytes. The data fetch and data store operations take priority over the instructions prefetch operation.
8088/8086 Register Set

The 8088/8086 microprocessor contains fourteen 16 bit registers.
o The BIU contains 4 segment registers and an instruction pointer.
o The EU contains 8 general purpose registers and a flag register.
Diagram 4
General Registers
There are 8 general registers in the EU.
These registers are classified into 3 groups.
o Four data registers (AH, BH, CH, DH)
o Two index registers (DI, SI)
o Two pointer registers (BP, SP)
Each of these registers can be used for data storage. However they also have their specific purpose.
Register AX
It is also known as accumulator. It can be used for data storage. The two 8 bit registers that
make up AX are AH, AL. AH refers to the most significant byte, AL refers to the least
significant byte of AX. Accumulator is generally used to receive the final result of arithmatic or
logical operations.
2. Register BX
It is also known as the Base register. It is used to access any element in a data structure such as
an array. The two 8 bit registers of BX are BH, BL. The registers are primarly used as a pointer,
but it can also be used for data storage.
3. Register CX
It is also known as count register. It is used in looping operations as a counter. It can also be
used for data storage. The two 8 bit registers of CX are CH, CL.
4. Register DX
It is also known as a data register. The two 8 bit registers of DX are DH, DL. It holds the port
addresses during I/O operations. It is often used for double word arithmatic operations.
However, it can also be used for data storage.
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5. Register SI
It is also known as source index register. It is used as a source pointer during string operations.
6. Register DI
It is known as destination index register. It is used as a destination pointer during string
operations. It can also be used for data storage.
7. Register SP
It is known as a stack pointer. It specifies the offset within the stack segment (SS). The SS:SP
pair always specifies the 20 bit memory address of a 16 bit memory word which is currently on
top of the stack. The SS contains the segment origin of the stack and SP contains the offset
within that segment i.e. SS:SP indicates top of the stack.
8. Register BP
It is known as base pointer. It is used as secondary stack segment pointer. However, it can also
be used for data storage.
9. Segment Registers
The 8088/8086 microprocessor contains four segment registers . They are
CS
SS
DS
ES
An assembly language program is divided into segments. Each segment can be as large as 64 K-
bytes. A program can have any number of segments, but only 4 segments can be active at any
time during the execution of the program. The starting address (origin) of each active segment is
specified by the contents of one of the 4 segment registers.
1. Register CS
It is known as code segment register. The CS specifies the address of the origin of the
currently active code segment in the memory. A code segment is the one which
contains executable program instructions.
2. Register SS
It is known as a stack segment register. The register SS specifies the address of the
origin of the currently active stack segment in the memory.
A stack segment contains a dynamic data whose storage is allocated and de-allocated
during execution.
3. Register DS
It is known as a data segment register. It specifies the address of the origin of the
currenly active data segment. A data segment contains static data whose allocation is
done during compile time.
4. Register ES
It is known as extra segment register. It specifies the address of the origin of the
currently active extra segment. An extra segment is like a data segment which usually
contains static data such as strings.
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Register IP
It is known as instruction pointer. It contains a 16 bit offset within the currently active code
segment It specifies the next instruction to be fetched in the code segment. The CS:IP pair
specifies a 20 bit memory address of the next instruction to be fetched from the memory. The
CS:IP pair is similar to a program counter.
11. Flag Register

The flag register is a 16 bit register where each bit has a special meaning. Only 9 out of the 16
bits are implemented as shown below.
Diagram 6
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
OF DF IF TF SF ZF AF PF CF
CF - Carry Flag ZF - Zero Flag IF - Interrupt Flag

PF - Parity Flag SF - Sign Flag DF - Direction Flag
AF - Auxillary Carry Flag TF - Trap Flag OF - Overflow Flag
Based on the usage of the flags they are classified into 2 categories as shown below.
Control Flags (DF, IF, TF)
Status Flags (CF, PF, AF, ZF, SF, OF)
5. Carry Flag
It indicates the carry out of the the MSB (Most Significant Bit) or borrow into the MSB
during addition, subtraction operations. [This flag is set to 1 when there is a carry or
borrow into the MSB]
6. Parity Flag
This flag is set to 1, if the result of the operation has an even number of ones (1's). It is
used to detect single bit errors in the transmission of binary data.
7. Auxillary Carry Flag
It is used to indicate the carry or borrow during addition or subtraction with BCD
arithmatic from bit position 3. [This flag is set to 1 when there is a carry or borrow from
the third bit to the fourth bit].
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8. Zero Flag
It is used to indicate whether or not the result of an arithmatic or logical opertion is

zero. [This flag is set to 1 if the result is zero and reset to 0 if the result is not zero].
9. Sign Flag
It holds the copy of the MSB of the result after an arithmatic or logical operation. When
the result is being interpreted as a signed number then the result is taken as negative
when this flag is set to 1.
10. Trap Flag
The microprocessor has a single step mode that allows for the program to be interrupted
after execution of each instruction. When the trap flag is set, a single step interrupt can
be generated. By using this flag, a debugger can single step to a program. [This flag is
used to interrupt the execution when the flag is set to "1" and ignore if the flag is set to
"0"].
11. Interrupt Flag
When this flag is set (1), the microprocessor recognizes and allows all the maskable
interrupts such as keyboard interrupt, printer interrupt, etc.
When the flag is 0, the maskable interrupts are ignored.
12. Direction Flag
The string instructions automatically update the registers SI, DI to point to the next or
previous positions in a string.
The direction flag is used to control the direction of increment.
When the direction flag is equal to zero, it is an increment and
when the direction flag is equal to one, it is a decrement.
13. Overflow Flag
It is used to indicate whether or not the result of an operation is too large to be stored in
a register or in a memory location.
When it is set (1) it indicates that there is a overflow in the result.
Addressing Modes (AM)

An instruction is made up of 2 parts.
OPCODE OPERAND
o The OPCODE identifies the operation to be performed, where as
o The OPERAND may specify the data or address of data.
The OPERAND may be specified in different ways.
The different ways in which the microprocessor generates the OPERAND is called Addressing
Modes.
The following is the list of addressing modes supported by 8088/8086
Immediate Addressing Mode
Register Addressing Mode
Direct Addressing Mode
Indirect Addressing Mode
o Register Indirect Addressing Mode
o Index or Base Indirect Addressing Mode
o Base & Indexed Indirect Addressing Mode
o Base & Indexed with displacement Addressing Mode
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Immediate Addressing Mode
In this mode the operand part of the instruction specifies directly the data which is to be used in the operation.
This mode represents a special case in which the data is also stored in the code segment part of memory instead of
the data segment.
Eg.
o 1. MOVE AX, 1000h (AX 10h, AL 00h)
o 2. SUB CX, 6678h (CX CX 6678h)
Register Addressing Mode (or) Register Direct

Addressing Mode
In this mode the operand part of the instruction specifies a register name and this register holds the data to be used
in the operation.
Eg., 1) MOV AX, BX (AX BX)
Direct Addressing Mode

In this mode the operand part of the instruction specifies the memory address of the data item.
Eg.,
o MEMDS dw 1000h
MOV AH, MEMDS (AH [1000h])
o In the above example, MEMDS is defined as a memory location in the data segment.
o Then the instruction indicates the transfer of the content of the memory at location MEMDS into the
register AH.
Indirect Addressing Mode

When a memory location must be accessed several times within a program then, for repeated fetching the direct
addressing mode becomes inefficient.
The indirect addressing mode solves this problem by storing the memory address in a Pointer register or in an
Index register and by adding an offset to it, in order to access the location.
There are 4 types of Indirect Addressing Modes
Register Indirect Addressing Mode

According to this mode, the effective address is supplied through an Index or a Pointer register.
Eg.,
1. MOVE AX, [SI] (AX M[SI])
2. ADD [BX], AL (M[BX] M[BX] + AL)
13. Index Addressing Mode

According to this mode, the effective memory address is nothing but the sum of the Index
register plus a displacement value within the instruction.
The displacement is limited to one single byte (+127 to -128) from the base.
Eg., MOVE AX, [SI+6] (AL M[SI+6], AH M[SI + 7])
14. Base Addressing Mode

According to this mode, the effective memory address is nothing but the sum of the Base register
plus a displacement value within the instruction.
Eg.
1. MOVE AX, [BX+6] (AL M[BX+6], AH M[BX+7])
2. MOVE BL, 6[DI] (BL M[DI+6])
15. Base and Indexed Addressing Mode.

According to this mode, the effective address is nothing but the sum of an Index and a Base
register.
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Eg.,
1. MOVE AX, [BX][SI] (AL M[BX+SI], AH M[BX+SI+1])
2. MOVE DX, [BX+DI] (DX DX+ M[BX+DI])
16. Base and Indexed with displacement Addressing Mode.

According to this mode, the effective address is the sum of an Index register and a Base register
and a displacement value.
Eg.,
1. MOVE AX, [BX+SI+5] (AL M[BX+SI+5], AH M[BX+SI+6])
2. MOVE DX, 10[BP][DI] (DX DX+ M[BP+DI+10])
Assembly Directives
Assembly directives directs the assembler to take an action at the time of assembly but not during runtime.
The directives are classified as follows
o Data storage directives
o Data assignment directives
o Conditional directives
The directives are used not to generate any CPU instructions, but they are used for
o Creating constants
o Reserving memory locations
o Defining macros
o Display of information on the screen during assembly time
DB directive
It directs the assembler to reserve one memory byte (8 bits) and initialize it with a specified value.
The syntax of the DB directive is as follows ::-
o LABEL db initializer, initializer, initializer.
The range of values that can be stored are
o from 0 to 255 as unsigned integers
o from -128 to +127 as signed integers
Eg.,
o 1. a db -112
o 2. k db 250
o 3. Name db PASCAL
o 4. P db 10 dup(0) initialize the array of 10 locations with zero.
o 5. Q db 20 dup ? array of 20 locations each of 1 byte.
o 6. c db x
DW directive
It is similar to DB except that it reserves a memory word (16 bits) and initializes it that with a specified value.
Its syntax is as follows
o LABEL dw initializer, initializer, initializer
The range of values that can be stored are
o from 0 to 65,545 as unsigned integers
o from -32,768 to +32,767 as signed integers
Eg.,
o 1. Q dw 0FFFFh
o 2. R dw 10000h
DD directive
It reserves a double word of memory (32 bits) and initializes that with a specified value.
o LABEL dd initializer, initializer, initializer.
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DQ directive
It directs the assembler to reserve a quad word of memory (64 bits) and initializes it that with a specified value.
Such words are used to store floating point values.
o LABEL dq initializer, initializer, initializer
DT directive
It directs the assembler to reserve 10 bytes of memory (80 bits) and the initializes it that with a specified value.
o LABEL dt initializer, initializer, initializer
EQU directive
It directs the assembler to assign the result of an integer expression, or a previously defined symbol or an
assembler symbol to a symbolic name.
o LABEL equ value.
Eg.,
o 1. length equ 3*55
o 2. R equ [BP+2]
o 3. COPY equ MOV
When an assembler symbol is assigned to a symbolic name (eg 3) then the assembler replaces the symbolic name
with its assigned value in the program.
= directive (IS EQUAL TO directive)

It is almost similar to EQU directive but with a difference.
The value that is assigned by equ directive cannot be changed whereas the value that is assigned by = directive
can be changed in the program.
The syntax is as follows
o LABEL = VALUE
Radix directive
It directs the assembler to change from the default decimal radix to any other number system.
The syntax of this directive is as follows
o RADIX expression
Where expression is always in decimal.
The radix specifiers are shown below
RADIX SPECIFIER
Binary B, b
Octal O, Q, q
Hexadecimal H, h
Decimal D, d
IFENDIF directive
It is the simplest form of a conditional directive.
Its syntax is as shown below
o IF expression
Statement
Statement
.
.
.
Statement
ENDIF
This directive directs the assembler to execute the statements only if the expression is true.
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IFELSEENDIF directive
This is an extension of the previous directive. It has an ELSE clause.
o IF expression
Statement
Statement
.
.
.
Statement
ELSE
Statement
Statement
.
.
.
Statement
ENDIF
IFDEFENDIF directive
It directs the assembler to execute a group of statements only when the specified label or a symbol has been
defined.
o IFDEF name
Statement
Statement
.
.
.
Statement
ENDIF
IFNDEFENDIF directive
It directs the assembler to assemble a group of statements only when the specified label or symbol has not been
defined.
o IFNDEF name
Statement
Statement
.
.
.
Statement
ENDIF
SEGMENTENDS directive
This directive is used to enclose a group of data items or a group of instructions that are placed in a particular
segment.
Such group of data items or instructions that are placed in between SEGMENT...ENDS directive is known as
logical segment.
When a logical segment is setup a name should be given to it.
Later on, such logical segments will be referred throughout the remaining program only by the name given to
them.
The ENDS directive instructs the assembler to stop reading any instructions placed after the END directive, and
they will be ignored by the assembler.
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Operators
Arithmetic Operators
The arithmetic operators include +, -, *, /, mod.
Eg.
o 1. a db 33+16
o 2. k db 2*4
Logical Operators
The logical operators include AND, OR, XOR, NOT.
They are used to perform bitwise operations.
Eg.
o 1. a db not 3
o 2. b db 46 and 35
Relational Operators
The operators eq, ne, lt, le gt, ge can be used as relational operators.
These operators evaluate two expressions and returns a value true (1) or false (0).
Eg.
o 1. a db 43 eq 41
o 2. k db 43 gt 41
SEG Operator
This directive returns the segment address of an operand.
o SEG expression
o Where expression can be a variable, a label or any other operand.
Eg. a db ?
mov ax, seg a; (AX segment address of a)
OFFSET Operator
This directive returns the offset address of an operand within a segment.
o OFFSET expression
Eg. a db ?
mov ax, offset a; (AX offset address of a)
LENGTH Operator
This directive returns the number of data objects for a variable (number of locations).
o LENGTH expression
Eg. a db 50 dup(?)
b dw 100 dup(0)
c db 15
MOV ax, length a; (ax 50)
MOV bx, length c; (bx 1)
MOV dx, length b; (dx 100)
SIZE Operator
This directive returns the number of bytes alloted for a variable (number of bytes).
o SIZE expression
Eg. a db 50 dup(?)
b dw 100 dup(0)
c db 15
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MOV ax, size a; (ax 50)
MOV bx, size c; (bx 1)
MOV dx, size b; (dx 200)
TYPE Operator
This directive returns the number of bytes for each data object.
o TYPE expression
Eg. a db 50 dup(?)
b dw 100 dup(0)
c db 15
MOV ax, type a; (ax 1)
MOV bx, type b; (bx 2)
MOV dx, type c; (dx 4)
Instruction Set
The instruction set of 8088/90-86 includes the following
o Data Transfer instructions
o Arithmetic instructions
o Bit manipulation instructions
o String instructions
o Program control and iteration instructions
o Flag instructions
o Miscellaneous instructions
Data Transfer Instructions

The 8088 microprocessor has a group of data transfer instructions that are used to move data either between its
registers or between a register and a memory location. They include
o MOV
o XCHG
o XLAT
o LEA
o LDS
o LES
17. MOV
It is used to transfer one byte or one word of data from a source to the destination.
MOV destination, source
Where source can be REG8, REG16, SREG, MEM8, MEM16, IMM
Destination can be REG8, REG16, SREG, MEM8, MEM16.
REG8 8 bit register
REG16 16 bit register
SREG Segment Register
MEM8 8 bit memory location (1 byte)
MEM16 16 bit memory location (1 word)
IMM Immediate value
The CS register cannot be used as destination, and
A memory location cannot be both source and destination.
An immediate value cannot be used when the destination is a segment register.
Eg.,
1. MOV ax, 4; ax 4
2. MOV SI, dx; SI dx
3. a db 16
MOV bh, a (bh 16 (or) bh M[a])
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XLAT (Translate)
This instruction is used to simplify the table operations.
It is used to move an element in an array into register AL.
Before this instruction is called the register BX must hold the starting address of the array and
register AL holds the offset from the beginning of the array.
Diagram
Eg., a db 3,4,6,7,8
.
.
mov al, 3; specify 4th element.
mov bx, offset a; BX array starting address
XLAT; al 7
Once the execution of the instruction is complete the required element from the array is
transferred to register AL.
19. XCHG (Exchange)

This instruction performs a register to register or a register to memory swap, which otherwise
takes 3 MOV instructions.
XCHG operand, operand
Where operand can be Reg8, Reg16, mem8, mem16
Eg., k db 20;
xchg bh, k; bh k
xchg ah, bh; ah bh
LEA (Load Effective Address)

The instruction is used to load a specified destination register with a 16 bit offset address of a
label.
LEA Reg16, Mem16
Where Reg16 is a 16 bit destination which gets the offset address .
Mem16 is a memory address of the label to be loaded.
Eg., a db 45
.
.
LEA BX, a; BX as address
This instruction is similar to an offset directive
Eg., MOV BX, offset a; BX offset address of a
21. LDS (Load Data Segment)

The instruction is used to load a 16 bit destination register and a register DS with the contents of
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a double word memory operand.
LDS Reg16, Mem32
Where Reg16 is a destination register
Mem32 is the memory location of a double word.
Diagram
Eg., LDS BX, [DI]
22. LES (Load Extra Segment)

The instruction is used to load a 16 bit destination register and a register ES with the contents of
a double word memory operand.
LES Reg16, Mem32
Where Reg16 is a destination register
Mem32 is the memory location of a double word.
Diagram
Eg., LES BX, [DI]
Arithmetic Instructions
The arithmetic instructions include operations for
o increment
o decrement
o negation
o addition
o subtraction
o multiplication
o division
23. INC
This instruction increments the content of a register or the content of memory by one.
INC operand
Where operand can be Reg8, Reg16, Mem8, Mem16
Eg., a db 3;
b dw 40;
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inc cl; cl cl + 1
inc a ; a a + 1, a 4
inc b; b b + 1, b 41
inc DX; DX DX + 1
DEC
This instruction decrements the content of a register or the content of memory by one.
DEC operand
Eg., a db 3;
b dw 40;
dec cl; cl cl - 1
dec a ; a a - 1, a 2
dec b; b b - 1, b 39
dec DX; DX DX - 1
NEG
This instruction inverts the sign of an operand by doing the twos compliment on it.
NEG operand
Eg., 1. a db -3;
b dw +45; /* in memory */
neg a; a3
neg b; b -45
2. MOV CX, 45; /* in register */
NEG CX; CX -45
ADDITION
There are 2 forms of addition instructions.
One includes the CF (carry flag) and the other does not.
The two forms of addition instructions are
ADD (Add without carry)
ADC (Add with carry)
ADD destination, source
ADC destination, source
Where destination can be Reg8, Reg16, Mem8, Mem16
Source can be Reg8, Reg16, Mem8, Mem16, Imm8, Imm16
Eg.,
1. ADD CX, AX; CX CX + AX
2. ADD CX, 45; CX CX + 45
3. a db 40;
ADD ax, a; ax ax + 40
4. ADC CX, AX; CX CX + AX + CF
5. a dw 4500;
ADC BX, a; BX BX + 4500 + CF
The ADC instruction allows addition of multiple precision numbers.
27. SUBTRACTION
There are 2 forms of subtraction instructions.
One includes the CF (carry flag) and the other does not.
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The two forms of subtraction instructions are
SUB (Subtraction without borrow)
SBB (Subtraction with borrow)
SUB destination, source
SBB destination, source
Where destination can be Reg8, Reg16, Mem8, Mem16
Source can be Reg8, Reg16, Mem8, Mem16, Imm8, Imm16
Eg.,
1. SUB CX, AX; CX CX - AX
2. SUB CX, 45; CX CX - 45
3. a db 40;
SUB ax, a; ax ax - 40
4. SBB CX, AX; CX CX - AX - CF
5. a dw 4500;
SBB BX, a; BX BX - 4500 - CF
The SBB instruction allows subtraction of multiple precision numbers.
28. MULTIPLICATION
The multiplication operations can be performed using signed or unsigned numbers.
The source can be a register or a memory location but the destination must be only a register AX
or AX, DX.
The multiplication instructions are of two types
MUL
IMUL
MUL
The MUL multiples an unsigned byte or an unsigned word with another unsigned byte
or word.
o MUL operand;
o Where operand can be Reg8, Reg16, Mem8, Mem16
When multiplying unsigned bytes the content of AL are multiplied with the operand and
the result is stored in AX. (AX AL * 8 bit operand)
When multiplying unsigned words the content of AX are multiplied with the 16 bit
operand and the result is stored in DX, AX. (DX AX * 16 bit operand)
IMUL
The IMUL instruction is used for signed integer multiplication.
It multiplies a signed byte or a signed word by another signed byte or word.
o IMUL operand;
When multiplying signed bytes the content of AL are multiplied with the operand and
the result is stored in AX. (AX AL * 8 bit operand)
When multiplying signed words the content of AX are multiplied with the 16 bit
operand and the result is stored in DX, AX. (DX AX * 16 bit operand)
29. DIVISION
The division operations can be performed using signed or unsigned numbers.
The source can be a register or a memory location but the destination must be only a register AX
or AX, DX.
The division instructions are of two types
DIV
IDIV
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DIV
The DIV instruction is used to divide an unsigned word by an unsigned byte or an
unsigned double word by an unsigned word.
o DIV operand;
The operation of division is as follows
o When an unsigned word is to be divided by an unsigned byte
Then the word must be stored in AX before the division operation.
After the division the quotient is returned to register AL and the
remainder to register AH.
o When an unsigned double word is to be divided by an unsigned word
The double word must be stored in DX:AX.
Upon completion of the division operation the quotient is stored in
AX and the remainder in DX.
IDIV
The IDIV instruction is used for signed integer division.
It is used to divide a signed word by a signed byte or a signed double word by a signed
word.
o IDIV operand;
Bit Manipulation Instructions

The bit manipulation instructions include the following
o Logical instructions
o Rotation instructions
o Shift instructions
30. Logical Instructions

The 8088 microprocessor includes the following four logical instructions
AND
OR
XOR
NOT
The AND, OR, XOR, NOT perform the respective operations bit by bit and stores the final result
in the destination.
The syntax of these instructions are shown below
AND destination, source;
OR destination, source;
XOR destination, source;
Where destination can be Reg8, Reg16 Mem8, Mem16
Source can be Reg8, Reg16 Mem8, Mem16, Imm8, Imm16
The NOT instruction differs from the others in that it operates on a single operand.
The syntax is as follwos
NOT operand;
31. Rotation Instructions

The 8088 microprocessor supports the following four rotate instructions
ROL (Rotate Left)
ROR (Rotate Right)
RCL (Rotate carry left)
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RCR (Rotate carry right)
14. ROL
The ROL is a rotate left instruction.

It rotates the bits of an operand for a specified number of times towards left.
During the rotation the MSB (Most significant bit) is shifted to carry flag and also into
the LSB (Least significant bit) of the operand.
o ROL operand, count;
o Count can be register CL or an immediate value of one.
Eg.,
o 1. ROL AL, 1
o 2. MOV CL, 4
ROL AL, CL
The ROL can be indicated by means of the following diagram
ROR
The ROR is a rotate right instruction.

It rotates the bits of an operand for a specified number of times towards right.
During the rotation the LSB (Least significant bit) of the operand is rotated into the
carry flag as well as into the MSB (Most significant bit) of the operand.
o ROR operand, count;
Eg.,
o 1. ROR AL, 1
o 2. MOV CL, 4
ROR AL, CL
The ROR can be indicated by means of the following diagram
RCL
The RCL is a rotate carry left instruction.

It rotates the bits of an operand for a specified number of times towards the left.
During the rotation the MSB (Most significant bit) of the operand is rotated to the carry
flag , while the content of the carry flag is rotated to the LSB (Least significant bit) of
the operand.
o RCL operand, count;
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Eg.,
1. RCL AL, 1
o
2. MOV CL, 4
o
RCL AL, CL
The RCL can be indicated by means of the following diagram
RCR
The RCR is a rotate carry right instruction.

It rotates the bits of an operand for a specified number of times towards the right.
During the rotation the LSB (Least significant bit) of the operand is rotated to the carry
flag , and the content of the carry flag is rotated to the MSB (Most significant bit) of
the operand.
o RCR operand, count;
Eg.,
o 1. RCR AL, 1
o 2. MOV CL, 4
RCR AL, CL
The RCR can be indicated by means of the following diagram
Shift Instructions
The 8088 microprocessor supports the following four shift instructions
SAL
SAR
SHL
SHR
18. SAL
This instruction is known as shift arithmetic left.

It shifts the bits towards the left for a specified number of times.
During a shift the zero is shifted to LSB and MSB is shifted to carry flag.
o SAL operand, count;
Eg.,
o 1. SAL AL, 1
o 2. MOV CL, 2
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SAL AL, CL
The SAL can be indicated by means of the following diagram
SAR
This instruction is known as shift arithmetic right.

It shifts the bits towards the right for a specified number of times.
During a shift the MSB (sign bit) is preserved and the LSB is shifted to carry flag.
o SAR operand, count;
Eg.,
o 1. SAR AL, 1
o 2. MOV CL, 2
SAR AL, CL
The SAR can be indicated by means of the following diagram
SHL
This instruction is known as shift left

It is exactly similar to SAL.
o SHL operand, count;
Eg.,
o 1. SHL AL, 1
o 2. MOV CL, 2
SHL AL, CL
The SHL can be indicated by means of the following diagram
SHR
This instruction is known as shift right instruction.

It shifts the bits towards the right for a specified number of times.
During a shift the zero is shifted to MSB and the LSB is shifted into carry flag.
o SHR operand, count;
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Eg.,
1. SHR AL, 1
o
2. MOV CL, 2
o
SHR AL, CL
The SHR can be indicated by means of the following diagram
Compare Instructions
The 8088 microprocessor provides the following two compare instructions.
CMP
TEST
22. CMP
This instruction is used for comparing the value of two operands.

o CMP destination, source;
o Where destination can be Reg8, Reg16, Mem8, Mem16
o Source can be Reg8, Reg16, Mem8, Mem16, Imm8, Imm16
Essentially this instruction is similar to a SUBTRACT (SUB) instruction but the
destination is not affected.
After comparison the flags are set accordingly.
Then these flags can be used by branching instructions.
23. TEST
This instruction performs a logical AND operation on the two operands.

But it does not affect the destination.
o TEST destination, source;
o Where destination can be Reg8, Reg16, Mem8, Mem16
o Source can be Reg8, Reg16, Mem8, Mem16, Imm8, Imm16
After testing the status flags are set accordingly.
These flags can then be used by branching instructions.
34. Jump Instructions

The 8088 microprocessor supports the following two types of jump instructions.
Unconditional jump
Conditional jump
24. Unconditional JUMP
The JMP instruction is used for unconditional jumping.

This instruction moves the program control to transfer to any other point in the program
without testing for any condition.
o JMP label;
Eg., next :
------------------------
------------------------
------------------------
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JMP next; /* transfer control to next */
Conditional JUMP
The conditional jump instructions are used to test for the presence or absence of certain
status conditions and based on that it takes decisions about program control.
Usually these instructions are placed after arithmetic or logical instructions.
The following table gives the list of conditional jump instructions.
Sl. Instruction Test Condition Comment
No.
1. JA C = 0 and Z = 0 Jump Above
2. JAE C=0 Jump Above or Equal
3. JB C=1 Jump Below
4. JBE C = 1 or Z = 1 Jump Below or Equal
5. JC C=1 Jump if carry set
6. JE / JZ Z=1 Jump if equal or jump if zero
7. JG Z = 0 and S = 0 Jump if greater than
8. JGE S=0 Jump if greater than or equal to
9. JL S <> 0 Jump if less than
10. JLE Z = 1 or S <> 0 Jump if less than or equal to
11. JNC C=0 Jump if no carry
12. JNE / JNZ Z=0 Jump if not equal
Jump if not zero
13. JNO OF = 0 Jump if no overflow
14. JNS S=0 Jump if no sign (+ve)
15. JNP / JPO P=0 Jump if no parity
Jump if parity odd
16. JO OF = 1 Jump if overflow
17. JS S=1 Jump if Sign (-ve)
18. JP / JPE P=1 Jump if parity or
Jump if parity even
19. JCXZ CX = 0 Jump if CX = 0
All the instructions such as JG, JE JL, JGE, etc. are used for signed numbers, i.e. the
term > / = / < are used with signed numbers.
The instructions JA, JB are used for unsigned numbers i.e. the term above/below/equal
are used for unsigned numbers.
35. Loop Instructions

The 8088 microprocessor supports the following 5 loop instructions.
LOOP
LOOPE (Loop if equal)
LOOPZ (Loop if zero)
LOOPNE (Loop if not equal)
LOOPNZ (Loop if not zero)
26. LOOP
This instruction loops to a specific memory location as long as CX<>0.

Each time the loop is repeated the contents of register CX are decremented by one.
o LOOP label
Eg., next :
------------------------
------------------------
------------------------
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LOOP next; /* loop while CX <> 0 */
LOOPE / LOOPZ
The loope, loopz instructions are similar.

These instructions loop to a specific memory location as long as CX<>0 and the zero
flag is set.
Each time the loop is repeated the contents of register CX are decremented by one.
o LOOP2 label
Eg.,
o LOOPE Example
next :
------------------------
------------------------
------------------------
CMP AX, 45;
LOOPE next; /* loop while CX <> 0 and Z = 1 */
o LOOPZ Example
next :
------------------------
------------------------
------------------------
CMP AX, 45;
LOOPZ next; /* loop while CX <> 0 and Z = 1 */
LOOPNE / LOOPNZ
The loopne, loopnz instructions are similar.

These instructions loop to a specific memory location as long as CX<>0 and the zero
flag is not set (Z = 0).
o LOOPN3 label
Eg.,
o LOOPNE Example
next :
------------------------
------------------------
------------------------
CMP AX, 45;
LOOPNE next; /* loop while CX <> 0 and Z = 0 */
o LOOPNZ Example
next :
------------------------
------------------------
------------------------
CMP AX, 45;
LOOPNZ next; /* loop while CX <> 0 and Z = 0 */
Stack Instructions
The 8088 microprocessor supports the following stack instructions.
PUSH
POP
PUSHF
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POPF
29. PUSH
This instruction is used to insert 16 bit data on the top of the stack.
o PUSH operand
o Where operand is any 16 bit register or MEM 16.
Eg., PUSH AX
30. POP
This instruction is used to remove 16 bit data from the top of the stack.
o POP operand
o Where operand is any 16 bit register or MEM 16.
Eg., POP BX
31. PUSHF
This instruction is used to transfer 16 bit flag register contents onto the top of the stack.
o PUSHF
Eg., PUSHF
32. POPF
This instruction is used to delete 16 bit data from the top of the stack and load them into
FLAG register
o POPF
Eg., POPF
37. Input Output (I/O) Instructions

The I/O instructions are used to transfer data between the microprocessor and the connected I/O
units.
The 8088 microprocessor provides the following list of I/O instructions.
IN
OUT
INS
INSB
INSW
OUTS
OUTSB
OUTSW
33. IN
This instruction is used to read a byte or a word from a specified port and stores it in the
accumulator.
o IN accumulator, port
o Where accumulator is register AX and port can be register DX or Imm8
Eg.,
o 1. IN AX, DX
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o 2. IN AX, 258
34. OUT
This instruction is used to send a byte or a word from the accumulator onto a port.
o OUT port, accumulator
o Where accumulator is register AX and port can be register DX or Imm8
Eg.,
o 1. OUT DX, AX
o 2. OUT 258, AX
35. INS / INSB / INSW
The INS is used to input a string from a port.

The INSB is used to input a string byte from a port.
The INSW is used to input a string word from a port.
o INS destination
o INSB destination
o INSW destination
36. OUTS / OUTSB / OUTSW
The OUTS is used to output a string onto a port.

The OUTSB is used to output a string byte onto a port.
The OUTSW is used to output a string word onto a port.
o OUTS destination
o OUTSB destination
o OUTSW destination
38. String Instructions

The 8088 microprocessor provides the following list of string instructions.
REP
REPE
MOVS, MOVSB, MOVSW
CLD
STD
CMPS, CMPSB, CMPSW
37. REP
This is a repeat prefix, it should be used along with string instructions only.
Whenever a string instruction is presided by REP it repeats that instruction by
decrementing CX. It continues the same instruction as long as CX <> 0. This
instruction eliminates a loop.
Eg., MOV CX, 10
CLD
REP MOVSB
REPE
This instruction is known as repeat if equal.

It is similar to repeat if zero (REPZ).
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Whenever an 8088 instruction is preceded by REPE then it repeats that instruction as
long as CX <> 0 and the source and destination contents are equal.
Each time of its repetition it decrements CX by one.
39. MOVS, MOVSB, MOVSW
These instructions are used for string movements.

The MOVS transfers the content of source to destination one byte at a time.
The MOVSB transfers the content of source to destination one byte at a time.
The MOVSW transfers the content of source to destination one word at a time.
o MOVS destination, source
o MOVSB
o MOVSW
o The MOVSB and MOVSW do not require operands.
o The destination is pointed by DI and the source is pointed by SI.
40. CLD
This instruction clears the direction flag.

When the direction flag (DF = 0) the contents of SI, DI are incremented in each string
move.
When (DF = 1) the contents of SI, DI are decremented with each string move.
41. STD
This instruction sets the direction flag.
42. CMPS, CMPSB, CMPSW
These instructions are used for string comparison.

The CMPS compares one byte at at time.
o CMPS destination, source
The CMPSB compares one byte at a time
The CMPSW compares one word at a time.
These instructions affect the zero flag appropriately.
I/O Transfers
The 8088/8086 microprocessor can employ two types of input/output interfaces.
They are
o Isolated I/O
o Memory Mapped I/O
Isolated I/O
It is also known as I/O mapped I/O.
The term isolated indicates that the I/O locations are separated from memory locations.
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o The memory address space contains 1MB of memory in the range of 00000h to FFFFFh.
o The I/O address space contains 64KB in the range of 0000h to FFFFh.
o The I/O locations are also known as ports.
Advantage
o The advantage of this technique is that the complete 1MB of memory space is available only for memory
use only.
o But in order to perform I/O operations the special instructions such as IN, OUT INS, OUTS are needed.
Memory Mapped I/O

In a computer with memory mapped I/O some of the memory space is dedicated to I/O ports.
In such a case the microprocessor looks at the I/O ports as if they were memory locations.

o In this technique the special instructions are not needed for I/O operations, instead any instruction that is
used for memory transfer can also be used for I/O transfers.
Disadvantage
o But the main disadvantage is that as some portion of the memory is given for I/O locations, it reduces the
total available memory space for applications.
Advantage
o Since the I/O locations reside in the memory and the I/O transfers and Memory transfers are similar, no
special circuits are required for I/O transfers.
Data Transfers
The 8088/8086 microprocessor supports the following methods of data transfer.
They are
o Programmed data transfer (Polling)
o Interrupt
o DMA (Direct Memory Access)
Programmed Data Transfer (Polling)

It is also known as programmed controlled data transfer.
This type of transfer is used when small amount of data is to be transferred using slow I/O devices.
The data transfer is done completely under the control of the microprocessor.
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According to this transfer
o The microprocessor issues a get ready signal for the I/O device.
o It then waits until the device is ready, by checking the busy flag of the device.
o After finding that the device is not busy it performs the data transfer.
Flow chart
o
o This method is also known as polling, as the microprocessor repeatedly checks the busy flag.
Disadvantage
o The drawback of this method is that the microprocessor devotes all its time without doing any other task
just by waiting for the ready flag to set.
A better approach than this method is to interrupt the microprocessor when the device gets ready. Such a
technique is called Interrupt driven data transfer.
Interrupt data transfer

The interrupt data transfer is used when relatively small amount of data is to be transferred using slow I/O
devices. An interrupt is nothing but a signal to the microprocessor informing that the connected I/O device is ready for
data transfer. Unlike the polling technique the interrupt transfer allows the microprocessor to execute other software.
When an interrupt signal occurs the microprocessor must suspend what it is doing, and then transfer the control to
a special routine which performs the required functions by the I/O device. This special routine is also known as
Interrupt Service Routine (ISR).
o The above diagram illustrates the response of a microprocessor when an interrupt occurs.
When the microprocessor is executing a normal program an interrupt occurs
then the microprocessor first finishes the current instruction and
then pushes the status onto a stack
then it transfers the control to the ISR
once the ISR is executed the microprocessor returns back to the normal processing by popping
its status from the stack.
Interrupts
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o The 8088 microprocessor is capable of implementing a combination of 256 interrupts.
o These interrupts are classified into 4 categories
Internal interrupts
Non maskable interrupts
Software interrupts
External hardware interrupts
o When more than one interrupt occurs the microprocessor services them on a priority basis.
o First the interrupts are given a priority group-wise according to the above shown order.
o Within a group the priorities are given by a type number.
o Type 0 identifies the highest priority and Type 255 identifies the lowest priority.
o Types of interrupts
The 8088 microprocessor supports the following interrupt instructions.
CLI This instruction clears the interrupt flag (IF=0)
STI -- This instruction sets the interrupt flag (IF=1)
INT n This instruction is used to generate a software interrupt of type n.
IRET This instruction is used at the end of ISR in-order to return the control back to
the normal program..
DMA (Direct Memory Access)

The DMA provides rapid data transfer between two sections of memory or in between memory and I/O device.
The DMA transfer is supported on a PC by means of 8237 DMA controller. When data transfer is required
between the selected I/O device and the memory, the DMA controller takes over the system bus from the
microprocessor and then directly performs the data transfer. The microprocessor is not involved in the data transfer and
the data need not pass through it.
The DMA transfer is classified into following categories
o Single transfer
o Burst/demand transfer
o Continuous /Block transfer.
In a single transfer mode the bus control is returned to the microprocessor after every byte of data is transferred
so that the microprocessor can also perform a bus cycle of its own.
When n bytes of data is to be transferred then the demand/burst transfer is used, in such a case the bus control is
returned to the microprocessor only after the entire data is transferred, or the device is not ready.
In continuous transfer the burst mode is used but the buses are released only after the entire
data is transferred.
(Single) Byte Transfer Demand/Burst Transfer Continuous/Block Transfer
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In DMA DMA WRITE operation transfers the data from I/O device to memory, whereas ;the instruction
DMA READ transfers the data from memory to I/O device.
In both of these operations the I/O devices as well as the memory are to be controlled simultaneously.
Hence the system should contain separate memory and I/O control signals.
8237 DMA Controller

An 8237 controller is a four channel device which can support upto 4 I/O devices in a DMA operation.
8237 DMA controller is a special purpose processor whose job is to perform only data transfer.
o The DMA transfer is requested by an I/O device through the signal DRQ.
o In response the 8237 requests the microprocessor to release the system bus by sending a signal HOLD.
o The microprocessor releases the bus and then acknowledges to the 8237 through a signal HLDA (Hold
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acknowledge).
o Then the 8237 sends a signal AEN to the microprocessor indicating that it is taking control of the bus at
this stage.
o After that the 8237 puts the address of the memory location on the address bus and sends a signal
DACK (DMA acknowledge) to the I/O device indicating that a DMA cycle is granted so that I/O
transfer can be done.
o This process of taking over the control of system bus by the DMA from the microprocessor is also known
as Cycle stealing.
Programs
Sum of two 8-bit numbers
Develop an assembly language program to determine the sum of two 8-bit numbers.
NAME ADD
ASSUME CS: CODE_HERE, DS: DATA_HERE
DATA_HERE SEGMENT
ORG 1000H
A DB 45H
B DB 40H
C DB ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
MOV DS, AX
MOV AL, A
ADD AL, B
MOV C, AL
INT 27h /* Interrupt Stop */

CODE_HERE ENDS
END
Difference of two 8-bit numbers

Develop an assembly language program to determine the difference of two 8-bit numbers.
NAME SUB
DATA_HERE SEGMENT
ORG 1000H
A DB 45H
B DB 40H
C DB ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
START: MOV AX, DATA_HERE
MOV DS, AX
MOV AL, A
SUB AL, B
MOV C, AL

CODE_HERE ENDS
END START
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Average of two 8-bit numbers
Develop an assembly language program to determine the average of two 8-bit numbers.
NAME AVG
DATA_HERE SEGMENT
ORG 1000h
A db 45h
B db 60h
C db ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000h
START: MOV AX, DATA_HERE
MOV DS, AX
MOV AL, A
ADD AL, B
MOV AH, 00h
ADC AH, 00h
MOV BL, 02h
DIV AL
MOV C, AL

CODE_HERE ENDS
END START
Multiply two 8-bit numbers

Develop an assembly language program to determine the multiplication of two 8-bit numbers.
NAME MULTIPLICATION
DATA_HERE SEGMENT
ORG 1000h
A db 40h
B db 45h
C dw ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000h
MOV AX, DATA_HERE
MOV DS, AX
MOV AL, A
MUL B
MOV C, AX

CODE_HERE ENDS
END
Diagram
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Divide two 8-bit numbers
NAME DIVIDE
DATA_HERE SEGMENT
ORG 1000h
A db 90h
B db 45h
C db ?
D db ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000h
MOV AX, DATA_HERE
MOV DS, AX
MOV AH, 00h

MOV AL, A
DIV B
MOV C, AL
MOV D, AH

CODE_HERE ENDS
END
Diagram
Sum of two 16-bit numbers

Develop an assembly language program to perform the addition of two 16-bit numbers.
NAME SADD
DATA_HERE SEGMENT
ORG 1000H
A DW 145H
B DW AOFCH
C DW ?
DATA_HERE ENDS
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CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
MOV DS, AX
MOV AX, A
ADD AX, B
MOV C, AX

CODE_HERE ENDS
END
Diagram
1010
1000F
.
.
100A
1005
C 1004
AO 1003
B FC 1002
01 1001
A 45 1000
o
Multiply two 16-bit numbers

NAME SMULTIPLICATION
DATA_HERE SEGMENT
ORG 1000h
A dw 145H
B dw AOFCH
C dw 2dup(0)
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000h
MOV AX, DATA_HERE
MOV DS, AX
MOV AX, A
MUL B
MOV C+2, DX

CODE_HERE ENDS
END
Diagram
Page 41 of 53
Addition of double precision numbers
Develop an assembly language program to perform addition of double precision numbers (Double word addition)
NAME ADD
DATA_HERE SEGMENT
ORG 1000H
A DD 1111 1111H
B DD AOFC B111H
C DD ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
MOV DS, AX
MOV AX, A
ADD AX, B
MOV C, AX
MOV AX, A+2
ADC AX, B+2
MOV C+2, AX

CODE_HERE ENDS
END
Diagram
Page 42 of 53
Block Transfer
Develop an assembly language program to perform BLOCK TRANSFER
NAME BTRANSFER
DATA_HERE SEGMENT
ORG 1000H
N DB 5H
ARR1 DB 10h, 40h, 35h, 16h, 14h
ORG 1010h
ARR2 DB ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
MOV DS, AX
MOV CX, N
MOV SI, OFFSET ARR1
MOV DI, OFFSET ARR2
NEXT: MOV AL, [SI]

MOV [DI], AL
INC SI
INC DI
LOOP NEXT

CODE_HERE ENDS
END
Diagram
Page 43 of 53
Block Transfer Reverse Order
Develop an assembly language program to perform BLOCK TRANSFER in reverse order.
NAME BTRANSFERREV
DATA_HERE SEGMENT
ORG 1000H
N DB 5H
ARR1 DB 10h, 40h, 35h, 16h, 14h
ORG 1014h
ARR2 DB ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
MOV DS, AX
MOV CX, N
MOV SI, OFFSET ARR1
MOV DI, OFFSET ARR2
NEXT: MOV AL, [SI]

MOV [DI], AL
INC SI
DEC DI
LOOP NEXT

CODE_HERE ENDS
END
ASCII to Unpacked BCD

Develop an assembly language program to convert ASCII to unpacked BCD.
NAME ASCII_UNPACKEDBCD
DATA_HERE SEGMENT
ORG 1000H
A DB 5H
B DB ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
Page 44 of 53
MOV DS, AX
MOV AL, A
AND AL, 0FH
MOV B, AL
INT 27h
CODE_HERE ENDS
END
Diagram
B 0000 0101
A 0011 0101
AND OPERATION
0011 0101
0000 1111
ASCII to Packed BCD

Develop an assembly language program to convert ASCII to packed BCD.
NAME ASCII_PACKEDBCD
DATA_HERE SEGMENT
ORG 1000H
A DB 5H
B DB 9H
C DB ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
MOV DS, AX
MOV AL, A
AND AL, 0FH
MOV BL, B
AND BL, 0FH
MOV CL, 04H; /* LOAD CL with 4 */
ROL AL, CL; /* ROTATE left 4 times */
ADD AL, BL; /* ADD BL and make packed BCD */
MOV C, AL
INT 27h
CODE_HERE ENDS
END
Diagram
1010
1000F
.
# .
C 0101 1001 1002
B 0011 1001 1001
A 0011 0101 1000
MAXIMUM
Develop an assembly language program to determine maximum of n numbers.
NAME NMAXIMUM
Page 45 of 53
DATA_HERE SEGMENT
ORG 1000H
N DB 8H
ARR1 DB 14H, 27H, 13H, 91H, 44H, 16H, 71H, 11H
MAX DB ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
MOV DS, AX
MOV CL, N
MOV BX, OFFSET ARR1
MOV AL, [BX]
DEC CL
NEXT: ADD BX, 01H

CMP [BX], AL
JLE P
MOV AL, [BX]
P: LOOP NEXT
(OR)
NEXT: ADD BX, 01H
CMP [BX], AL
JS P; /* if comparison is greater then sign is positive, */
/* if comparison is lesser then sign is negative */
MOV AL, [BX]
P: LOOP NEXT
(OR)
NEXT: ADD BX, 01H
CMP AL, [BX]
JGE P
MOV [BX], AL
P: LOOP NEXT
MOV MAX, AL
INT 27h
CODE_HERE ENDS
END
Diagram
Page 46 of 53
MINIMUM
Develop an assembly language program to determine minimum of n numbers.
NAME NMINIMUM
DATA_HERE SEGMENT
ORG 1000H
N Dw 8H
ARR1 DW 14H, 27H, 13H, 91H, 44H, 16H, 71H, 11H
MIN DW ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
MOV DS, AX
MOV CL, N
MOV BX, OFFSET ARR1
MOV AL, [BX]
DEC CL
NEXT: ADD BX, 01H

CMP [BX], AL
JGE P
MOV AL, [BX]
P: LOOP NEXT
MOV MIN, AL
INT 27h
CODE_HERE ENDS
END
READ from Keyboard and DISPLAY on the screen

Develop an assembly language program to read from the keyboard and display it on the screen.
NAME READ_DISPLAY
ASSUME CS: CODE_HERE
CODE_HERE SEGMENT
ORG 2000H
NEXT: IN 100H /* Port address of keyboard */

OUT 105H /* Port address of display unit */
LOOP NEXT /* This code block is the simplest method */
(OR)
NEXT: MOV AH, 08H
INT 21H
MOV DL, AL
MOV AH, 02H
INT 21H
CMP AL, 1AH

JNZ NEXT
INT 27h
CODE_HERE ENDS
Page 47 of 53
END
An INT 21H can be used for reading from the keyboard and displaying on the screen.
When AH=08h the INT 21h reads the character from the keyboard and stores it in register AL.
When the content of AH=02h the interrupt 21h displays the value in DL on the screen.
The above procedure repeats until the character pressed from keyboard is CONTROL+Z (1A). [ASCII value of
CONTROL+Z is 1A]
Diagram
Addition of n numbers without carry

Develop an assembly language program to sum n numbers where each number is one byte in size.
NAME SUMWITHOUTCARRY
DATA_HERE SEGMENT
ORG 1000H
N DB 4H
ARR1 DB 14H, 21H, 26H, 34H
SUM DB ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
MOV DS, AX
MOV CL, N
MOV AL, 00H
MOV BX, OFFSET ARR1
DEC CL
NEXT: MOV AL, [BX]

ADD BX, 01H
LOOP NEXT
MOV SUM, AL
INT 27h
CODE_HERE ENDS
END
Page 48 of 53
Addition of n numbers with carry
Develop an assembly language program to determine the sum of n numbers considering the carry.
NAME SUMWITHCARRY
DATA_HERE SEGMENT
ORG 1000H
N DB 4H
ARR1 DB 91H, 42H, 57H, 16H
SUM DW ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
MOV DS, AX
MOV CX, N
MOV DX, 00H
MOV BX, OFFSET ARR1
DEC CL
NEXT: MOV AL, [BX]

CBW /* Convert byte to word */
ADD DX, AX
ADD BX, 01H
LOOP NEXT
MOV SUM, AX
INT 27h
CODE_HERE ENDS
END
Diagram
SORT in ascending order

Develop an assembly language program to sort n numbers.
NAME SORTASC
DATA_HERE SEGMENT
ORG 1000H
Page 49 of 53
N DB 8H
ARR1 DB 91H, 42H, 58H, 16H,47H,51H,71H,100H
ARR2 DB ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
MOV DS, AX
MOV CX, N
DEC CX
MOV SI, OFFSET ARR1
FIRST: MOV DI, SI

MOV AH, 00H
MOV AX, [SI]
MOV BX, CX
SECOND: ADD DI, 01H

CMP AX, [DI]
JLE NEXT
XCHG AX, [DI]
MOV [SI], AX
NEXT: LOOP SECOND

ADD SI, 01H
MOV CX, BX
LOOP FIRST
INT 27h
CODE_HERE ENDS
END
Diagram.
1010
1000F
.
.
100A
1009
1008
1007
1006
1005
1004
1003
1002
ARR1 1001
N 8 1000
SORT in descending order

Develop an assembly language program to sort n numbers in descending order, where each number is one word
in size.
NAME SORTDES
Page 50 of 53
DATA_HERE SEGMENT
ORG 1000H
N DW 8H
ARR1 DW 91H, 42H, 58H, 16H,47H,51H,71H,100H
ARR2 DW ?
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
MOV DS, AX
MOV CX, N
DEC CX
MOV SI, OFFSET ARR1
FIRST: MOV DI, SI

MOV AH, 00H
MOV AX, [SI]
MOV BX, CX
SECOND: ADD DI, 01H

CMP AX, [DI]
JGE NEXT
XCHG AX, [DI]
MOV [SI], AX
NEXT: LOOP SECOND

ADD SI, 01H
MOV CX, BX
LOOP FIRST
INT 27h
CODE_HERE ENDS
END
STRING COPY
Develop an assembly language program to copy a string.
NAME COPYSTRING
ASSUME CS: CODE_HERE, DS: DATA_HERE, ES: EXTRA_HERE
DATA_HERE SEGMENT
ORG 1000H
A DB HELLO# /*# indicates end of string, is should be a b with a | on it */
B DB 6DUP(?)
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
MOV DS, AX
MOV ES, AX
LEA SI, A
LEA DI, B
MOV CX, 6H
CLD /* Clear direction flag = 0 */
NEXT: MOVS B, A /* Moves A to B */

(OR)
Page 51 of 53
NEXT: MOVSB /* Considers register SI as source and register DI as destination by default */
(OR)
NEXT: MOVSW /* CX=3; Transfers one byte at a time*/
(OR)
NEXT: REP MOVSB
(OR)
NEXT: REP MOVS B, A
LOOP NEXT
INT 27h
CODE_HERE ENDS
END
Diagram.
1010
1000F
.
# .
O 100A
L 1009
L 1008
E 1007
H 1006
# 1005
O 1004
L 1003
L 1002
E 1001
A H 1000
o
STRING COMPARE
Develop an assembly language program to compare two strings.
NAME COMPARESTRINGS
ASSUME CS: CODE_HERE, DS: DATA_HERE, ES: EXTRA_HERE
DATA_HERE SEGMENT
ORG 1000H
A DB HELLO# /*# indicates end of string, is should be a b with a | on it */
B DB HELLO# /*# indicates end of string, is should be a b with a | on it */
DATA_HERE ENDS
CODE_HERE SEGMENT
ORG 2000H
MOV AX, DATA_HERE
MOV DS, AX
MOV ES, AX
LEA SI, A
LEA DI, B
MOV CX, 6H
CLD /* Clear direction flag = 0 */
NEXT: CMPS A, B
JNE 11
LOOP NEXT
(OR)
Page 52 of 53
NEXT: CMPS B
JNE 11
LOOP NEXT
(OR)
REPE CMPSB
JNE 11
(OR)
NEXT: CMPSW
JNE 11
LOOP NEXT (HERE CX=3)
MOV RES, 01H

INT 27H
11: MOV RES, 00H

INT 27h
CODE_HERE ENDS
END
Page 53 of 53

8086 Microprocessor

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8086 Microprocessor

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8088/8086 Microprocessor

Architecture of 8086/8088 Microprocessor

Execution Unit (EU)

Bus Interface Unit (BIU)

8088/8086 Register Set

11. Flag Register

CF - Carry Flag ZF - Zero Flag IF - Interrupt Flag

7. Auxillary Carry Flag

It is used to indicate whether or not the result of an arithmatic or logical opertion is

10. Trap Flag

11. Interrupt Flag

12. Direction Flag

13. Overflow Flag

Addressing Modes (AM)

Register Addressing Mode (or) Register Direct

Direct Addressing Mode

Indirect Addressing Mode

Register Indirect Addressing Mode

13. Index Addressing Mode

14. Base Addressing Mode

15. Base and Indexed Addressing Mode.

16. Base and Indexed with displacement Addressing Mode.

= directive (IS EQUAL TO directive)

Data Transfer Instructions

19. XCHG (Exchange)

LEA (Load Effective Address)

21. LDS (Load Data Segment)

Eg., LDS BX, [DI]

22. LES (Load Extra Segment)

Eg., LES BX, [DI]

Bit Manipulation Instructions

30. Logical Instructions

31. Rotation Instructions

The ROL is a rotate left instruction.

The ROR is a rotate right instruction.

The RCL is a rotate carry left instruction.

The RCR is a rotate carry right instruction.

This instruction is known as shift arithmetic left.

This instruction is known as shift arithmetic right.

This instruction is known as shift left

This instruction is known as shift right instruction.

This instruction is used for comparing the value of two operands.

This instruction performs a logical AND operation on the two operands.

34. Jump Instructions

24. Unconditional JUMP

The JMP instruction is used for unconditional jumping.

35. Loop Instructions

This instruction loops to a specific memory location as long as CX<>0.

The loope, loopz instructions are similar.

The loopne, loopnz instructions are similar.

37. Input Output (I/O) Instructions

35. INS / INSB / INSW

The INS is used to input a string from a port.

36. OUTS / OUTSB / OUTSW

The OUTS is used to output a string onto a port.

38. String Instructions

This instruction is known as repeat if equal.

39. MOVS, MOVSB, MOVSW

These instructions are used for string movements.

This instruction clears the direction flag.

This instruction sets the direction flag.

42. CMPS, CMPSB, CMPSW

These instructions are used for string comparison.

Memory Mapped I/O