LCD RS232 Interface

Simple RS232 Interface for Microchip PIC16F84
Simple RS232 Interface

fully software controlled RS232 transmission and reception for PIC16F84
Table of Contents [Toc]
Concept
Project Resources
Available Microchip PIC Assembler Source Code
Schematic, Data Sheets, Pinout
Concept [Toc] [Top]
Fully software controlled RS232 reception and transmission for PIC16F8x. The microcontroller echoes every received RS232 character back to the
RS232 terminal window on the host (i.e. the computer). The HyperTerminal program (Win9x, WinXP) is configured to use the standard settings as
shown below.
PCB test board for PIC16F84 PIC16F84 test board with MAX232
using a dot matrix LCD display and a MAX232 for RS232 Test setup using asynchronous RS232 connection (RX on PortB0, TX on
transmission. PortA0). RS232 to USB1.1 connector in the back.
http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.html (1 of 3)12/02/2008 17:12:28

Screen shot of the HyperTerminal Program

showing the start-up message of this RS232 test routine. Standard RS232 ComPort settings
(9600-8-N-1)
Project Resources [Toc] [Top]
Available Microchip PIC Assembler Source Code [Toc] [Top]
Main File HEX Files
Download assembler source code: Download Hex File:

rs_test.asm rs_test.hex
The above program needs additional include files (modules) to get successfully assembled: m_bank.asm, m_wait.asm, m_rs096.
asm
For those, who are not familiar with interfacing a PIC to the RS232 using a MAX232: RS232-Interface.pdf (9.7 kB)
Schematic, Data Sheets and Pinout [Toc] [Top]
RS232 terminology about DTE and DCE: DTE_DCE_FAQ.pdf
Download ASCII Character Map: ASCII-Map.pdf
You can get the pinout and a description of the various keyboard connectors <here>.
Last updated: 16.01.2005
[Toc] [Top]

If you see only this page in your browser window,

click here
to get the entire site.

http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.asm
;***************************************************************************
;
; RS232 Test Interface V1.02
; ==========================
;
; written by Peter Luethi, 26.03.1999, Dietikon, Switzerland
; http://www.electronic-engineering.ch
; last update: 16.01.2005
;
; V1.02: Fixed copy/paste issue of ISR context store/restore
; (nobody is perfect): Erroneously erased INTCON,INTF
; clearing, resulting in endless ISR calling...
; Re-structured entire ISR and RS232 echo sub-routines
; (11.04.2004)
;
; V1.01: ISR context restore improvements (21.11.1999)
;
; V1.00: Initial release (26.3.1999)
;
; This code and accompanying files may be distributed freely and
; modified, provided this header with my name and this notice remain
; intact. Ownership rights remain with me.
; You may not sell this software without my approval.
;
; This software comes with no guarantee or warranty except for my
; good intentions. By using this code you agree to indemnify me from
; any liability that might arise from its use.
;
;
; SPECIFICATIONS:
; ===============
; Processor: Microchip PIC 16F84A
; Clock Frequency: 4.00 MHz XT
; Throughput: 1 MIPS
; Baud Rate: depends on the module included
; Code Size of entire Program: approx. 235 instruction words
; Required Hardware: MAX 232
;
;
; DESCRIPTION:
; ============
; Developed and tested on PIC 16F84A, executeable on all interrupt
http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.asm (1 of 7)12/02/2008 17:12:29

; featured PICs.
; Program handles all aspects of RS232
; Transmission (Register TXD) and
; Reception (register RXD) through interrupts (PortB0 IRQ).
; The microcontroller sends feedback of received characters back to
; the terminal window.
;
; Program shows the implementation and function of the modules
; m_bank.asm, m_wait.asm, and m_rs096.asm on the PIC16F84A.
;
;***************************************************************************
;***** COMPILATION MESSAGES & WARNINGS *****
ERRORLEVEL -207 ; found label after column 1

ERRORLEVEL -302 ; register in operand not in bank 0
;***** PROCESSOR DECLARATION & CONFIGURATION *****
PROCESSOR 16F84A
#include "p16f84a.inc"
; embed Configuration Data within .asm File.

__CONFIG _CP_OFF & _WDT_OFF & _PWRTE_ON & _XT_OSC
;***** MEMORY STRUCTURE *****
ORG 0x00 ; processor reset vector

goto MAIN
ORG 0x04 ; interrupt vector

goto ISR ; Interrupt Service Routine (ISR)
;***** PORT DECLARATION *****
#define TXport PORTA,0x00 ; RS232 output port, could be

#define TXtris TRISA,0x00 ; any active push/pull port
;***** CONSTANT DECLARATION *****
CONSTANT BASE = 0x0C ; base address of user file registers
;***** REGISTER DECLARATION *****

FLAGreg equ BASE+d'7'

#define RSflag FLAGreg,0x00 ; RS232 data reception flag
TXD equ BASE+d'8' ; TX-Data register

RXD equ BASE+d'9' ; RX-Data register
W_TEMP equ BASE+d'10' ; context register (ISR)

STATUS_TEMP equ BASE+d'11' ; context register (ISR)
PCLATH_TEMP equ BASE+d'12' ; context register (ISR)
FSR_TEMP equ BASE+d'13' ; context register (ISR)
;***** INCLUDE FILES *****
#include "..\..\m_bank.asm"
#include "..\..\m_wait.asm"
#include "..\..\m_rs096.asm" ; specify desired RS232 module
;***** MACROS *****
;***** SUB-ROUTINES *****
RSservice
SEND TAB
SEND 'E'
SEND 'c'
SEND 'h'
SEND 'o'
SEND ':'
SEND TAB
movfw RXD ; get RS232 data
SENDw ; transmit across RS232
SEND CR ; Carriage Return
SEND LF ; Line Feed
; end of RS232 service (echo & display)
bcf RSflag ; reset RS232 data reception flag
bsf INTCON,INTE ; re-enable RB0/INT interrupt
RETURN
;***** INTERRUPT SERVICE ROUTINE *****
ISR ;************************
;*** ISR CONTEXT SAVE ***

;************************
bcf INTCON,GIE ; disable all interrupts

btfsc INTCON,GIE ; assure interrupts are disabled
goto ISR
movwf W_TEMP ; context save: W
swapf STATUS,W ; context save: STATUS
movwf STATUS_TEMP ; context save
clrf STATUS ; bank 0, regardless of current bank
movfw PCLATH ; context save: PCLATH
movwf PCLATH_TEMP ; context save
clrf PCLATH ; page zero, regardless of current page
bcf STATUS,IRP ; return to bank 0
movfw FSR ; context save: FSR
movwf FSR_TEMP ; context save
;*** context save done ***
;**************************
;*** ISR MAIN EXECUTION ***
;**************************
;*** check origin of interrupt ***

btfsc INTCON,INTF ; check for RB0/INT interrupt
goto _ISR_RS232 ; if set, there was a keypad stroke
; catch-all
goto ISRend ; unexpected IRQ, terminate execution of ISR
;******************************
;*** RS232 DATA ACQUISITION ***
;******************************
_ISR_RS232
; first, disable interrupt source
bcf INTCON,INTE ; disable RB0/INT interrupt
; second, acquire RS232 data
RECEIVE ; macro of RS232 software reception
bsf RSflag ; enable RS232 data reception flag
goto _ISR_RS232end ; terminate RS232 ISR properly
;***********************************
;*** CLEARING OF INTERRUPT FLAGS ***
;***********************************
; NOTE: Below, I only clear the interrupt flags! This does not

; necessarily mean, that the interrupts are already re-enabled.

; Basically, interrupt re-enabling is carried out at the end of
; the corresponding service routine in normal operation mode.
; The flag responsible for the current ISR call has to be cleared
; to prevent recursive ISR calls. Other interrupt flags, activated
; during execution of this ISR, will immediately be served upon
; termination of the current ISR run.
_ISR_RS232error
bsf INTCON,INTE ; after error, re-enable IRQ already here
_ISR_RS232end
bcf INTCON,INTF ; clear RB0/INT interrupt flag
;goto ISRend ; terminate execution of ISR
;*****************************************
;*** ISR TERMINATION (CONTEXT RESTORE) ***
;*****************************************
ISRend movfw FSR_TEMP ; context restore

movwf FSR ; context restore
movfw PCLATH_TEMP ; context restore
movwf PCLATH ; context restore
swapf STATUS_TEMP,W ; context restore
movwf STATUS ; context restore
swapf W_TEMP,F ; context restore
swapf W_TEMP,W ; context restore
RETFIE ; enable global interrupt (INTCON,GIE)
;***** END OF INTERRUPT SERVICE ROUTINE *****
;************** MAIN **************
MAIN
clrf INTCON ; reset interrupts (disable all)
RS232init ; RS232 initialization
clrf FLAGreg ; initialize all flags

SEND LF ; Line Feed
SEND 'R'
SEND 'S'
SEND '2'
SEND '3'

SEND '2'
SEND ''
SEND 'T'
SEND 'e'
SEND 's'
SEND 't'
SEND ''
SEND 'I'
SEND 'n'
SEND 't'
SEND 'e'
SEND 'r'
SEND 'f'
SEND 'a'
SEND 'c'
SEND 'e'
SEND ':'
SEND ''
SEND 'P'
SEND 'I'
SEND 'C'
SEND '1'
SEND '6'
SEND 'F'
SEND '8'
SEND '4'
SEND ''
SEND 'c'
SEND 'o'
SEND 'n'
SEND 'n'
SEND 'e'
SEND 'c'
SEND 't'
SEND 'e'
SEND 'd'
SEND '.'
SEND '.'
SEND '.'
SEND LF ; Line Feed
SEND LF ; Line Feed

LOOP btfsc RSflag ; check RS232 data reception flag

call RSservice ; if set, call RS232 echo & LCD display routine
goto LOOP
END

http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.hex
:020000040000FA
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:080008004F288C0081018316D2
:100010000313C030810508008C008101831603138F
:10002000C030810501308104831203130B110B1DB5
:1000300017288C0B162808009400051008308C0037
:100040002D2014180514141C0510940C2D208C0B55
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:100090000D301C200A301C2013100B1608008B1387
:1000A0008B1B4F289600030E970083010A089800C7
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:1000C00030200618362808308C002D200618951789
:1000D000061C95130C0B950C8C0B65282D20061C0B
:1000E0003628131474280B168B101908840018086E
:1000F0008A00170E8300960E160E09008B018316D8
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:100110000B168B1793010D301C200A301C20523017
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:100140001C2074301C2020301C2049301C206E30B4
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:100170001C2020301C2050301C2049301C204330D3
:100180001C2031301C2036301C2046301C203830DA
:100190001C2034301C2020301C2063301C206F3089
:1001A0001C206E301C206E301C2065301C206330FB
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:1001C0001C202E301C202E301C200D301C200A300C
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:02400E00F13F80
:00000001FF
http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.hex12/02/2008 17:12:29
Microchip PIC microcontroller assembler modules
PIC Assembler Modules

For Non-Commercial Use Only
I would appreciate to be credited within your project, if you use any of the source code below. If you have an interesting project going on, I'll be glad about
feedback.
The software below comes with no guarantee or warranty except for my good intentions. Further the use of this code implies that the user has a fundamental
understanding of electronics and its risks. I'm not responsible for any harm or damage, caused by inproper use of any of the code below.
Any commercial use of parts or all of this code requires the permission of the author.
General
Standard Modules
Dot Matrix LCD Modules
LCD Display Driver Routines
LCD Display Conversion Routines
RS232 Modules
Notes on Modules
General Recommendations
Known Limitations of MPLAB IDE
Technical Hints
General [Toc] [Top]
Modules are source code blocks, which can be included in the MAIN PROGRAM by simply adding the command line:
#include "C:/ (...) m_bank.asm"
The code will be inline expanded. All you need is to specify the necessary registers in front of the include statement in the main program, e.g.
http://www.trash.net/~luethi/microchip/modules/modules.html (1 of 16)12/02/2008 17:12:31

LCDtris equ TRISB

LCDport equ PORTB
CONSTANT BASE = 0x0C ; 16F84 base address of user file registers
#include "..\m_bank.asm"
#include "..\m_wait.asm"
#include "..\m_lcd.asm"
Standard Modules [Toc] [Top]
Assembler include files: General macros to ease assembler handling, e.g. macros BANK0, BANK1
V2.00 (17.08.2004)
Bank & page handling: Bank0, Bank1,...
Branch macros (to simplify 'IF THEN ELSE' queries):

m_bank.asm BEQ val: branch on equal w and val
BNE val: branch on not equal w and val
BREG val: branch on equal or greater w than val
...
V1.02 (20.08.2004)
Parameterizable wait function, which performs a "busy" wait.
Implemented standard delay (@ 4 MHz):
WAIT 0x01 is equal to 1 unit == 1.02 ms
The assigned standard prescaler for TMR0 is PRESCstd = b'00000001'
Relationship between TMR0 prescaler and unit delay (WAIT 0x01):

b'00000000' == 1:2 ==> 0.512 ms
b'00000001' == 1:4 ==> 1.02 ms (standard)
b'00000111' == 1:256 ==> 65.3 ms
m_wait.asm Declarations needed in main program:

; Call of implemented procedures with:

; WAIT 0x01 ; standard delay, 1.02 ms
; WAITX d'16',d'7' ; 1.045 s @ 4 MHz, extended with specific prescaler
V1.00 (16.02.2003)
Beep function on parameterizable output port.
Declarations needed in main program:
#define BEEPport PORTA,0x00

#define BEEPtris TRISA,0x00
m_beep.asm CONSTANT BASE = 0x0C ; 16F84 base address of user file registers
#include "..\m_beep.asm"

; BEEPinit ; initialization to set output port
; BEEP 0xFF,0x02
For demo-programs or complete applications, refer to 'Projects' [click here]
Dot Matrix LCD Modules [Toc] [Top]
Assembler include files: Display drivers for dot matrix LCD displays. (Hitachi HD44780 compatibles)

Dot Matrix LCD Display

2 lines x 40 characters
LCD Display Driver Routines [Toc] [Top]
Download the PDF schematic to illustrate the connectivity of both 'classes' of LCD driver routines:
Modules m_lcd.asm, m_lcdx.asm, m_lcd_bf.asm, m_lcdxbf.asm: working only on entire ports ([1..7], without [0]),
e.g. PortB[1..7] on PIC16F84,
or PortB[1..7], PortC[1..7], PortD[1..7] on PIC16F77
Modules m_lcde.asm, m_lcde_bf.asm, m_lcdexbf.asm: working on separate, customizable ports,
e.g. PortB[0..2] for control lines & PortA[0..3] for data lines on PIC16F84, PIC16F7x,
or PortC[5..7] for control lines & PortD[0..3] for data lines on PIC16F77, or ...
Note that the data lines have to be on the low nibble of the port.

V2.06 (26.12.2004)
7 wires, 4 bit LCD interface
Based on timing constraints, no busy flag check. So if LCD fails, system is still running stable. Higher reliability, because less
critical system components.
No portable code for higher clock frequencies.
R/W connection to LCD supported for compatibility to m_lcd_bf.asm, but can be put to GND at LCD side => You'll get one
interrupt pin more on the processor side.
Schematic of LCD connection (PDF)
m_lcd.asm LCDtris equ TRISB ; could also be PORTC, PORTD on 16F77

LCDport equ PORTB
; LCD data ports D4-D7 are on LCDport,0x1-0x4
; LCD_EN is on LCDport,0x05 ; Enable
; LCD_RW is on LCDport,0x06 ; Read/Write
; LCD_RS is on LCDport,0x07 ; Register Select
V2.26 (26.12.2004)
Extended m_lcd.asm with the ability to define your own characters (max. 8) in macro LCDspecialChars. Based on timing
constraints, specifications as m_lcd.asm.
m_lcdx.asm
LCDtris equ TRISB ; could also be PORTC, PORTD on 16F77

LCDport equ PORTB
; complete/replace macro LCDspecialChars to define your own characters

#include "..\m_lcdx.asm"
V3.09 (26.12.2004)
Extended m_lcd.asm which reads busy flag of LCD (bi-directional communication between controller and LCD)
R/W connection to LCD needed for hand shaking.
Clock independent program code, successfully tested up to 10 MHz on PIC 16F84 and up to 20 MHz on PIC 16C74A!
Gives the best performance, but system fails, if LCD (-connection) fails, because processor is waiting for ready signal from LCD
to send next character. => Deadlock, but should not occur under normal circumstances!
Solution:
Connect an auxilliary 10k resistor from DB7 to GND, so if the LCD is disconnected, the microprocessor will read an inactive
busy flag. (That's needed because of the internal weak pull ups of the microprocessor ports. Maybe also needed if you switch
them off.)
m_lcd_bf.asm

LCDtris equ TRISB ; could also be PORTC, PORTD on 16F77

LCDport equ PORTB

FLAGreg equ BASE+d'7' ; general flag register
#define LCDbusy FLAGreg,0x00 ; LCD busy flag declared within flag register
#define LCDcflag FLAGreg,0x01
#include "..\m_lcd_bf.asm"
V3.29 (26.12.2004)
Basically the same as m_lcd_bf.asm, but with the ability to define your own characters (max. 8) in macro LCDspecialChars. Bi-
m_lcdxbf.asm directional communication, reads busy flag of LCD.
V2.12e (17.08.2004)
Basically as m_lcd.asm, but with the ability to independently configure LCD control and data lines, i.e. LCD data on low nibble
of any port, LCD command lines on any port bits (even different port).
m_lcde.asm

LCDtris equ TRISA ; LCD data on low nibble of portA

LCDport equ PORTA
#define LCD_ENtris TRISB,0x01 ; EN on portB,1
#define LCD_EN PORTB,0x01
#define LCD_RStris TRISB,0x02 ; RS on portB,2
#define LCD_RS PORTB,0x02
#define LCD_RWtris TRISB,0x03 ; RW on portB,3
#define LCD_RW PORTB,0x03
#include "..\m_lcde.asm"
V4.03e (17.08.2004)
Extended m_lcde.asm which reads busy flag of LCD (bi-directional communication between controller and LCD)
LCDtris equ TRISA ; LCD data on low nibble of portA

LCDport equ PORTA
#define LCD_ENtris TRISB,0x01 ; EN on portB,1
#define LCD_EN PORTB,0x01
m_lcde_bf.asm #define LCD_RStris TRISB,0x02 ; RS on portB,2
#define LCD_RS PORTB,0x02
#define LCD_RWtris TRISB,0x03 ; RW on portB,3
#define LCD_RW PORTB,0x03

#define LCDcflag FLAGreg,0x07 ; LCD command/data flag
#include "..\m_lcde_bf.asm"
V4.23e (17.08.2004)
Basically the same as m_lcde_bf.asm, but with the ability to define your own characters (max. 8) in macro LCDspecialChars. Bi-
m_lcdexbf.asm directional communication, reads busy flag of LCD.
LCD Display Conversion Routines [Toc] [Top]
V1.02 (20.08.2004)
8 bit binary to decimal conversion routine for LCD output, stringent for any numeric display output or
interaction.

LO equ BASE+d'5'
m_lcdv08.asm LO_TEMP set BASE+d'6'
#define BCflag FLAGreg,0x00 ; blank checker for preceding zeros
#include "..\m_lcdv08.asm"
; Call of implemented procedure with:

LCDval_08 ; result is stored in register LO

V1.02 (20.08.2004)
16 bit binary to decimal conversion routine for LCD output, stringent for any numeric display output or
interaction.

LO equ BASE+d'5'
HI equ BASE+d'6'
m_lcdv16.asm LO_TEMP set BASE+d'7'
HI_TEMP set BASE+d'8'
#include "..\m_lcdv16.asm"

LCDval_16 ; result is stored in registers HI, LO
V1.00 (20.08.2004)
8 bit binary LCD output routine for debugging of registers and bitstreams, e.g. to visualize the binary output of
an A/D converter to check the magnitude of its LSB toggling due to digital quantization and/or noise.
m_lcdb08.asm


b08_cnt equ BASE+d'4' ; counter
LO equ BASE+d'5'
LO_TEMP set BASE+d'6'
#include "..\m_lcdb08.asm"

LCDbin_08 ; value in register LO, output to LCD
V1.00 (20.08.2004)
16 bit binary LCD output routine for debugging of registers and bitstreams, e.g. to visualize the binary output of
an A/D converter to check the magnitude of its LSB toggling due to digital quantization and/or noise.

LO equ BASE+d'5'
HI equ BASE+d'6'
m_lcdb16.asm LO_TEMP set BASE+d'7'

LCDbin_16 ; values in register HI, LO, output to LCD

RS232 Modules [Toc] [Top]
For external interrupts, such as the RB0/INT pin or PORTB change interrupt, the latency will be three to four instruction cycles. The exact latency depends
on when the interrupt occurs. The latency is the same for both one and two cycle instructions.
(=> see Microchip PIC16/17 Microcontroller Databook.)
For those, who are not familiar with interfacing a PIC to the RS232 using a MAX232 : RS232-Interface.pdf (9.7 kB)
V1.02 (11.04.2004)
Completely software handled RS232 Interface for interrupt featured PICs (PIC16C84, PIC16F84,...).
Specifications: 2400 baud, 8 bit, no parity, 1 stopbit (@ 4 MHz / 1 MIPS)

; RS232 input port is RB0, because of its own interrupt flag

m_rs024.asm TXD equ BASE+d'7' ; TX data register, for transmission
RXD equ BASE+d'8' ; RX data register, for storage
#include "..\m_rs024.asm"

; RS232init ; initialization
; SEND 'c' ; sends character 'c'
; SENDw ; sends content of working register
; RECEIVE ; macro in ISR: receive from RS232,
; store in register RXD

V1.02 (11.04.2004)
m_rs048.asm Functionality as m_rs024.asm
V1.02 (11.04.2004)
V1.02 (11.04.2004)
V1.02 (11.04.2004)
Functionality as m_rs024.asm
m_rs7n1.asm
Developed for an old and heavy matrix needle printer with RS232 Interface.
Notes on Modules [Toc] [Top]
Code is optimized for 1. small memory, and 2. optimal execution time.

If extern sources are called from within modules, set absolute pathes. Please refer to Known Limitations of MPLAB IDE below.
Declare and define the required registers and statements in the MAIN.
Declarations of constants and registers need to be listed in the MAIN before the '#include' statement of the modules, since most modules are
referencing specific constants and registers (therefore they need to be defined at that time).
General Recommendations [Toc] [Top]
Manage the used registers in a clear structured way.

For prototyping, it is recommended to introduce temporarily dedicated registers for each new code segment. At the end, when everything runs
properly, you can start to optimize the design in order to share as much registers as possible to save memory space. Otherwise, you run the risk of
getting data consistency problems - bugs, which are really hard to solve!
Provide dedicated registers for interrupt handling! Do not call subroutines from the interrupt service routine (ISR), which are executed during normal
operation. If so, ensure to perform a complete context save of all registers being used within this subroutine.
Interrupt flags have to be cleared by software before re-enabling the 'global interrupt enable bit' (GIE) and exiting the ISR. Otherwise, recursive ISR
calling occurs.
At the beginning of the ISR, disable the 'global interrupt enable bit' (GIE). In case different interrupt sources have to be served, it may be necessary
to disable also the related 'interrupt source enable bit' (e.g. INTF of RB0/INT pin). See next recommendation
On ISR exit, make sure to reset the interrupt flag of the source, which triggered the interrupt. But perform re-enabling of the corresponding 'interrupt
source enable bit' at the end of the corresponding service routine:
- If the interrupt service is entirely completed within the ISR, re-enabling is suitable at the end of the ISR. This applies only, if disabling of the
interrupt source has been carried out at the beginning of the ISR.
- If parts of the interrupt service are carried out during normal operation, re-enabling the interrupt source is most suitable at the end of the external
code part. In this case, disabling the specific interrupt source at the beginning of the ISR is stringent, otherwise we face lost of data or a system crash
due to return address stack overflow. This method owns a further advantage: A subsequent interrupt already having been triggered before re-
activation and originating from the same source is not omitted and will immediately be served. (This is because the interrupt flag bit gets still set,
when the interrupt is temporarily disabled. When unmasking this interrupt source, the interrupt is immediately triggered.)
Known Limitations of MPLAB IDE [Toc] [Top]
Previously MPLAB worked with the old MS DOS 8.3 name convention (so set paths with old notation).
With the recent MPLAB versions beyond 6.30 (I use currently 6.40 and PICstart Plus), it seems they accept also longer file names. That's while my
include files sometimes have strange names. There is also an upper limitation on the amount of characters in an absolute file name including path.
'#include' - commands in the MAIN could be relative (..\..\xyz.asm) or absolute paths (C:\abc\xyz.asm).
'#include' - commands in extern source have to be absolute paths (if extern source is called with relative path).
Technical Hints [Toc] [Top]
If you use 'set' instead of 'equ', you can assign different labels to the same register. This is very useful, if you need temporary registers in different
modules. But be careful that you do not write and access the same register alternating in 2 different procedures. This results in nice bugs or possibly
endless loops.
'equ' is exclusive, i.e. it accepts only one label for each register.
If you want to create a 16 bit assembler look-up table very quickly, have a look at the
Automatic Table Generator for MPLAB Assembler.
To specify exact periods (e.g. with busy wait module m_wait.asm), I use quite often the MPLAB stopwatch. This is a very convenient cycle-accurate
timer, which takes both 1 cycle (e.g. incf) and 2 cycle instructions (e.g. goto) as well as special instruction mnemonics (e.g. bnc, subcf) into account.
I just let the simulator run to the wait statement or loop to be measured, reset the stopwatch, and let it again simulate until after the wait statement:

The Stopwatch
having been reset at 'bsf TXport' and run to the 'nop' statement. The latency of the 'WAITX d73,d2'
statement within this setup (4 MHz clock, PIC16F84) turns out to be approximately 150 ms.
[Toc] [Top]

click here

1 2 3 4
PIC16F84 MAX232
D (Direction seen from controller) D
VDD
VDD
R1 XT1 VSS
C4
16k C3
4.000 MHz 10u
C1 C2 10u
S1 10p VDD 10p
16
2
6
SW-PB VSS VSS
14
U1
C5 13 12
V+
VCC
V-
IC_PIC1 RS232 TXD R1 IN R1 OUT PIC RXD
RS232 8 9 5V
16 15 RS232 DTR R2 IN R2 OUT 5V DTR
VDD
VSS 4n7 OSC1/CLKIN OSC2/CLKOUT 11 14
4 7 PIC TXD T1 IN T1 OUT RS232 RXD
MCLR RB1 5V 10 7 RS232
17 8 5V DSR T2 IN T2 OUT RS232 DSR
C PIC TXD RA0 RB2 1 4 C
GND
18 9 C1+ C2+
RA1 RB3 3 5
5V DSR 1 10 C1 - C2 -
RA2 RB4
2 11
RA3 RB5 C6 MAX232CPE(16) C7
5V DTR 3 12
RA4/T0CKI RB6 10u 10u
VSS
15
6 13
PIC RXD RB0/INT RB7
PIC16F84-04/P(18)
5
VSS
VDD
VDD VSS
VDD
C8
DSR and DTR signals are not used in
100n
B VSS RS232 my RS232 routines, but are drawn for
completion. These signals are necessary C9
B
VSS
(Direction seen from host) for hardware handshaking, whilst my 100n
routines perform no handshaking. The
RS232 DTR MAX232 has two output and two input VSS
RS232 TXD VSS channels, specified to transmit up to 120
kbps depending on the type used.
RS232 RXD
RS232 DSR
1
6
2
7
3
8
4
9
5
Title
PIC-RS232 Interface using MAX232
A A
Written by Date
SUB1 20-Aug-2003
Peter Luethi
DB9 Revision Page
Dietikon, Switzerland 1.01 1 of 1
1 2 3 4
RS-232 CONNECTIONS THAT WORK!
DTE & DCE FAQ
PAGE 1 OF 5
RS-232 CONNECTIONS THAT WORK! - Connecting Devices or Converters

Connecting two devices using RS-232 sounds simple, but nearly every day we help a customer
get a converter, isolator or other RS-232 device working by helping correct the RS-232 cabling
connections. This FAQ will help you troubleshoot and correct such problems.
Usually inputs are connected to inputs and outputs to outputs. People don't realize that there are
two types of RS-232 ports, DTE and DCE type, and that the signal names and pin numbers are
the same, but signal flow is opposite! The pin labeled Tx can be input, and Rx the output.
The two ports types are complementary, the Output signals on a DTE port are Inputs to a DCE
port, and Output signals on a DCE port are Inputs to a DTE port. The signal names match each
other and connect pin for pin. Signal flow is in the direction of the arrows. (see figures below)
How Can I Identify DTE or DCE Type Connections?
What devices have DTE type RS-232 ports? A DTE device is "Data Terminal Equipment", this
includes Computers, Serial Printers, PLC's, Video Cameras, Video Recorders, Video Editors, and
most devices which are not used to extend communications. Think COMPUTER for DTE.
What devices have DCE type RS-232 ports? A DCE device is "Data Communications
Equipment", this includes devices intended to plug directly into a DTE port, PDA cables, Modems
and devices that extend communications like a modem, such as RS-422, RS-485, or Fiber Optic
converters or Radio Modems. Think MODEM for DCE
B&B Electronics Mfg. Co. http://www.bb-elec.com 29Apr03

DTE & DCE FAQ
PAGE 2 OF 5
Rule of Thumb: When connecting a DTE device to a DCE device, match the signal names. When
connecting two DTE or two DCE devices together, use a Crossover cable. (TD crosses to RD,
RTS to CTS, DTR to DSR as shown in Modem to Modem connections. (see 9PMMNM) The
cable for two computers (DTE) also simulates modem connections to CD/DSR, so it is commonly
called a "Null Modem" cable. (see 232DTE or 232NM9)

DTE & DCE FAQ
PAGE 3 OF 5
Are My Devices Wired As DTE or DCE? - How to Check
1. Use Rule of Thumb - If the device plugs into the computer serial port and works normally, the
device is wired as DCE (or the connection cable is a crossover type that makes it work as a
DCE). If the device connects to the computer port using a "null modem" crossover cable, it is
wired as DTE.
2. Use RS-232 Line Tester - A quick and easy way to determine the DTE/DCE port type is to
use a RS-232 line tester such as the 9PMTT. The tester can show the signal state of any
active RS-232 data lines using LED's lighting Red or Green. Active data lines are output from
a device, they may be either High or Low.
Continued next page

DTE & DCE FAQ
PAGE 4 OF 5
Just plug the tester into either of the two devices, see which lines are lit, unplug it, then plug it in
to the other device, see which lines are lit. (see figures).
If the same light (TD or RD) is lit, use a crossover cable or null modem connector that swaps the
connections for pins #2 and #3 and other pins as needed.
If the device is "port powered" check the active side, then plug in the port powered device and
see if other (TD or RD) LED is lit. If not, try swapping the leads with a null modem cable, see if
the other LED now lights. If not, you may not have enough voltage on the handshaking lines of
the port to steal power from.

DTE & DCE FAQ
PAGE 5 OF 5
3. Use a DC Voltmeter Technicians with a DC voltmeter can use it to measure the DC level
from signal ground (pin#5 on DB9, pin#7 on DB25) on the connector to pin #2 or pin #3.
When the unit is powered and not sending data, the output line will have a DC voltage of
minus polarity, 3 volts to 11 volts will be typical. The other pin will have little or no voltage.
For example, we measure -11 volts on pin#2 of a DB9 connector and the line is labeled RD
or Rx, then the device is wired as DCE. If we measure the voltage on pin#3, it is DTE.
Measure pin #2 and pin #3 to ground (pin # 5 - DB9) (pin #7 -- DB25) on the on the cable
from the first device, the on the device you want to connect. If the cable and device have
voltage on the same pin, you need to use a crossover or null modem connector that swaps
pins #2 & #3 and the other pins. (For DB9 see model 9PMMNM, for DB25 see 232DTE)
Electrically active handshaking lines will be negative when not asserted or positive when
asserted. (for reference, see line tester figures). Active handshaking lines can be found by
measuring each pin for voltage. Output lines will have voltage. On a DTE, DTR and RTS will
have voltage if used. On a DCE, DSR and CTS will have voltage, and if a modem with CD
(Carrier Detect) and RI (Ring Indicator) these last two will be low until Ring is detected or a
Carrier connection is made. If handshaking lines don't have voltage when the device is
powered on and ready, the device doesn't output them, they may be looped back, RTS to
CTS and DTR to DSR. You can turn off the device power and measure for continuity (zero
ohms) between pins to confirm if they are looped back.
Other RS-232 Connection Problems
1. Handshaking lines RTS and CTS not interconnected, DTR and DSR not interconnected.
Swap as needed.
2. Programs may use the RTS/CTS connection to check that a device is ready to receive data
and respond. If there is No CTS connection, the program will never send data, but wait a
long time or timeout with an error. The RTS line may need to be looped back to the CTS
input. Data errors can occur if the device actually requires handshaking.
3. Programs may also use the DTR/DSR line connection to check that a cable is connected or
that the device is turned on. If there is No DSR signal, the DTR line may need to be looped
back to the DSR input. Some devices use DTR handshaking.
4. Each signal required for unit operation must be carried through by the isolator, modem or RS-
422 or fiber optic converter. The primary "2 Channels" for RS-232 are Receive & Transmit.
There are 2 data flow control channels, RTS and CTS. If these are missing, data is lost,
characters missing, or files scrambled.
5. Connections to Telephone Modem/FAX modem - Make sure CD & RI lines are connected.
Recommended Accessories for Connections

232CAM - DB9F to DB25M conversion cable - 6 ft. (1.8 m)
232CAMS - DB9F to DB25M conversion/strain relief cable - 6 inches (15 cm)
232CAMR - DB9M to DB25F conversion/stain relief cable - 12 inches (30 cm)
RS232 Null Modem Connectors
232DTE - DB25F to DB25M - 25 pin female/male
PMMNM - DB9M to DB9M - 9 pin male/male
RS232 Line Testers
9PMTT - DB9F to DB9M - 9 pin female/male
232BOB1 - Breakout Box DB25F to DB25M with switches & jumpers
Jumper Boxes
Please refer to our catalog or website for jumper boxes for DB9, DB25, DB9/25, M/F, F/F, & M/M and
DB9 or DB25 to RJ11/RJ12 or RJ45 connectors.
-twr

ASCII Character Map
32 00100000 20 90 Z 01011010 5A
33 ! 00100001 21 91 [ 01011011 5B
34 " 00100010 22 92 \ 01011100 5C
35 # 00100011 23 93 ] 01011101 5D
36 $ 00100100 24 94 ^ 01011110 5E
37 % 00100101 25 95 _ 01011111 5F
38 & 00100110 26 96 ` 01100000 60
39 ' 00100111 27 97 a 01100001 61
40 ( 00101000 28 98 b 01100010 62
41 ) 00101001 29 99 c 01100011 63
42 * 00101010 2A 100 d 01100100 64
43 + 00101011 2B 101 e 01100101 65
44 , 00101100 2C 102 f 01100110 66
45 - 00101101 2D 103 g 01100111 67
46 . 00101110 2E 104 h 01101000 68
47 / 00101111 2F 105 i 01101001 69
48 0 00110000 30 106 j 01101010 6A
49 1 00110001 31 107 k 01101011 6B
50 2 00110010 32 108 l 01101100 6C
51 3 00110011 33 109 m 01101101 6D
52 4 00110100 34 110 n 01101110 6E
53 5 00110101 35 111 o 01101111 6F
54 6 00110110 36 112 p 01110000 70
55 7 00110111 37 113 q 01110001 71
56 8 00111000 38 114 r 01110010 72
57 9 00111001 39 115 s 01110011 73
58 : 00111010 3A 116 t 01110100 74
59 ; 00111011 3B 117 u 01110101 75
60 < 00111100 3C 118 v 01110110 76
61 = 00111101 3D 119 w 01110111 77
62 > 00111110 3E 120 x 01111000 78
63 ? 00111111 3F 121 y 01111001 79
64 @ 01000000 40 122 z 01111010 7A
65 A 01000001 41 123 { 01111011 7B
66 B 01000010 42 124 | 01111100 7C
67 C 01000011 43 125 } 01111101 7D
68 D 01000100 44 126 ~ 01111110 7E
69 E 01000101 45 127 01111111 7F
70 F 01000110 46 128 10000000 80
71 G 01000111 47 129 10000001 81
72 H 01001000 48 130 10000010 82
73 I 01001001 49 131 10000011 83
74 J 01001010 4A 132 10000100 84
75 K 01001011 4B 133 10000101 85
76 L 01001100 4C 134 10000110 86
77 M 01001101 4D 135 10000111 87
78 N 01001110 4E 136 10001000 88
79 O 01001111 4F 137 10001001 89
80 P 01010000 50 138 10001010 8A
81 Q 01010001 51 139 10001011 8B
82 R 01010010 52 140 10001100 8C
83 S 01010011 53 141 10001101 8D
84 T 01010100 54 142 10001110 8E
85 U 01010101 55 143 10001111 8F
86 V 01010110 56 144 10010000 90
87 W 01010111 57 145 10010001 91
88 X 01011000 58 146 10010010 92
89 Y 01011001 59 147 10010011 93
148 10010100 94 202 11001010 CA
149 10010101 95 203 11001011 CB
150 10010110 96 204 11001100 CC
151 10010111 97 205 11001101 CD
152 10011000 98 206 11001110 CE
153 10011001 99 207 11001111 CF
154 10011010 9A 208 11010000 D0
155 10011011 9B 209 11010001 D1
156 10011100 9C 210 11010010 D2
157 10011101 9D 211 11010011 D3
158 10011110 9E 212 11010100 D4
159 10011111 9F 213 11010101 D5
160 10100000 A0 214 11010110 D6
161 10100001 A1 215 11010111 D7
162 10100010 A2 216 11011000 D8
163 10100011 A3 217 11011001 D9
164 10100100 A4 218 11011010 DA
165 10100101 A5 219 11011011 DB
166 10100110 A6 220 11011100 DC
167 10100111 A7 221 11011101 DD
168 10101000 A8 222 11011110 DE
169 10101001 A9 223 11011111 DF
170 10101010 AA 224 11100000 E0
171 10101011 AB 225 11100001 E1
172 10101100 AC 226 11100010 E2
173 - 10101101 AD 227 11100011 E3
174 10101110 AE 228 11100100 E4
175 10101111 AF 229 11100101 E5
176 10110000 B0 230 11100110 E6
177 10110001 B1 231 11100111 E7
178 10110010 B2 232 11101000 E8
179 10110011 B3 233 11101001 E9
180 10110100 B4 234 11101010 EA
181 10110101 B5 235 11101011 EB
182 10110110 B6 236 11101100 EC
183 10110111 B7 237 11101101 ED
184 10111000 B8 238 11101110 EE
185 10111001 B9 239 11101111 EF
186 10111010 BA 240 11110000 F0
187 10111011 BB 241 11110001 F1
188 10111100 BC 242 11110010 F2
189 10111101 BD 243 11110011 F3
190 10111110 BE 244 11110100 F4
191 10111111 BF 245 11110101 F5
192 11000000 C0 246 11110110 F6
193 11000001 C1 247 11110111 F7
194 11000010 C2 248 11111000 F8
195 11000011 C3 249 11111001 F9
196 11000100 C4 250 11111010 FA
197 11000101 C5 251 11111011 FB
198 11000110 C6 252 11111100 FC
199 11000111 C7 253 11111101 FD
200 11001000 C8 254 11111110 FE
201 11001001 C9 255 11111111 FF
Pinouts of various connectors
Pinout of most common Connectors

originally written by Deceed, adopted and translated by P. Luethi with permission
Serial 9 Pin (PC)

Serial 25 Pin (PC)
Parallel (PC)
Centronics (Printer)
PC Gameport / MIDI
Keyboard 5 Pin (PC)
Keyboard 6 Pin (PS/2)
VGA
SCART
Serial 9 Pin (PC)

Back to Contents
(9p D-SUB male at PC (DTE))
(9p D-SUB female at cable / mouse (DCE))
Pin Name Dir Description

1 CD Carrier Detect
2 RXD Receive Data
3 TXD Transmit Data
4 DTR Data Terminal Ready
5 GND System Ground
http://www.trash.net/~luethi/microchip/datasheets/pinout/pinout.html (1 of 11)12/02/2008 17:12:37

6 DSR Data Set Ready

7 RTS Request to Send
8 CTS Clear to Send
9 RI Ring Indicator
Direction seen from PC (TX/RX)
Serial 25 Pin (PC)

Back to Contents
(25p D-SUB male at PC (DTE))
(25p D-SUB female at cable / modem (DCE))

1 SHIELD Shield Ground
2 TXD Transmit Data
3 RXD Receive Data
4 RTS Request to Send
5 CTS Clear to Send
6 DSR Data Set Ready
7 GND System Ground
8 CD Carrier Detect
9 n/c
10 n/c

11 n/c
12 n/c
13 n/c
14 n/c
15 n/c
16 n/c
17 n/c
18 n/c
19 n/c
20 DTR Data Terminal Ready
21 n/c
22 RI Ring Indicator
23 n/c
24 n/c
25 n/c

DO NOT connect SHIELD (1) with GND (7) !
Parallel (PC)
Back to Contents
(25p D-SUB female at PC)
(25p D-SUB male at parallel-cable)

Pin Name Dir Description Register Bit in Register (7=MSB, 0=LSB)

1 STR Strobe BASE+2 0 (inverted)
2 D0 Data Bit 0 BASE 0
10 ACK Acknowledge BASE+1 6
11 BUSY Busy BASE+1 7 (inverted)
12 PE Paper Empty BASE+1 5
13 SEL Select BASE+1 4
14 AUTFD Autofeed BASE+2 1 (inverted)
15 ERR Error BASE+1 3
16 INIT Initialize / Reset BASE+2 2
17 SEL IN Select Input BASE+2 3
18 GND Signal Ground

BASE means the base-address of the connection ( normally 378h for LPT1 and 278h for LPT2 ).
BASE+1 is known as status-register, BASE+2 as control-register.
Above address 0000:0408h there is a WORD-value for each installed parallel-port.
Centronics (Printer)
Back to Contents
(36p Centronics female at printer)
(36p Centronics male at printer cable)

1 STR Strobe
2 D0 Data Bit 0
3 D1 Data Bit 1
4 D2 Data Bit 2
5 D3 Data Bit 3
6 D4 Data Bit 4
7 D5 Data Bit 5
8 D6 Data Bit 6
9 D7 Data Bit 7
10 ACK Acknowledge
11 BUSY Busy
12 PE Paper Empty
13 SEL Select

14 AUTFD ? Autofeed
15 n/c
16 0V
17 CHASSIS GND
18 +5 V PULL UP +5 V DC (50 mA max)
30 GNDRESET Reset Ground
31 RESET Reset
32 ERROR Low when offline
33 0V Signal Ground
34 n/c
35 +5 V +5 V DC
Select In (Taking low or high sets printer on line or off line
36 SEL IN
respectively)
Direction seen form Printer.
PC Gameport / MIDI

Back to Contents
(15p D-SUB female at PC)
(15p D-SUB male at cable / joystick)

1 +5V +5 VDC
2 B1 Button 1
3 X1 Joystick 1 - X
4 GND Ground
5 GND Ground
6 Y1 Joystick 1 - Y
7 B2 Button 2
8 +5V +5 VDC
9 +5V +5 VDC
10 B4 Button 4
11 X2 Joystick 2 - X
12 MIDI_TXD MIDI Transmit
13 Y2 Joystick 2 - Y
14 B3 Button 3
15 MIDI_RXD MIDI Receive

Keyboard 5 Pin (PC)

Back to Contents
(5p DIN 41524 female at PC)
(5p DIN 41524 male at cable / keyboard)
Pin Name Description Comment

1 CLOCK Clock CLK/CTS, Open-collector
2 DATA Data RxD/TxD/RTS, Open-collector
3 n/c Not connected Reset on some very old keyboards.
4 GND Ground
5 VCC +5 VDC
Keyboard 6 Pin (PS/2)

Back to Contents
(6p Mini-DIN female (PS/2) at PC)
(6p Mini-DIN male at cable / keyboard)

1 DATA Key Data

2 n/c Not connected

3 GND Gnd
4 VCC Power , +5 VDC
5 CLK Clock
6 n/c Not connected
VGA
Back to Contents
(15p HIGH DENSITY D-SUB female at videocard)
(15p HIGH DENSITY D-SUB male at cable / monitor)

1 RED Red Video (75 Ohm, 0.7 V p-p)
2 GREEN Green Video (75 Ohm, 0.7 V p-p)
3 BLUE Blue Video (75 Ohm, 0.7 V p-p)
4 ID2 Monitor ID Bit 2
5 GND Ground
6 RGND Red Ground
7 GGND Green Ground
8 BGND Blue Ground
9 KEY Key (No pin)

10 SGND Sync Ground

11 ID0 Monitor ID Bit 0
12 ID1 or SDA Monitor ID Bit 1
13 HSYNC or CSYNC Horizontal Sync (or Composite Sync)
14 VSYNC Vertical Sync
15 ID3 or SCL Monitor ID Bit 3
Direction seen from PC / Videocard (TX/RX)
SCART
Back to Contents
(21p SCART female at TV / Video)
(21p SCART male at cable)
Pin Name Description Signal Level Impedanz

1 AOR Audio Out Right 0.5 V RMS <1k Ohm
2 AIR Audio In Right 0.5 V RMS >10k Ohm
3 AOL Audio Out Left + Mono 0.5 V RMS <1k Ohm
4 AGND Audio Ground
5 B GND RGB Blue Ground
6 AIL Audio In Left + Mono 0.5 V RMS >10k Ohm
7 B RGB Blue In 0.7 V 75 Ohm
8 SWTCH Audio/RGB switch / 16:9
9 G GND RGB Green Ground

10 CLKOUT Data 2: Clockpulse Out (Unavailable ??)

11 G RGB Green In 0.7 V 75 Ohm
12 DATA Data 1: Data Out (Unavailable ??)
13 R GND RGB Red Ground
14 DATAGND Data Ground
15 R RGB Red In / Chrominance 0.7 V (Chrom.: 0.3 V burst) 75 Ohm
1-3 V = RGB, 0-0.4 V =
16 BLNK Blanking Signal 75 Ohm
Composite
17 VGND Composite Video Ground
18 BLNKGND Blanking Signal Ground
19 VOUT Composite Video Out 1V 75 Ohm
20 VIN Composite Video In / Luminance 1V 75 Ohm
21 SHIELD Ground/Shield (Chassis)

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Microchip PIC
This website provides you helpful information about Microchip PIC 8 Bit
RISC microcontrollers. Several assembler source code listings are
available for non-commercial use. There are also tools for using your PC
for measuring or regulating electronic applications. I'm working on
several projects, e.g. a precision digital altimeter to use in my radio
controlled airplanes.
I have been working at the AMD Dresden Design Center, Germany on
RTL-based block- and system-level verification and performance analysis
for next-generation HyperTransport chipsets for AMDs x86-64 CPUs.
After having been abroad for nearly 3 years, I am now back in
Switzerland to pursue my Ph.D. thesis in the area of fourth generation
(4G) wireless communication with multi-user MIMO systems at the
Integrated Systems Laboratory of the Swiss Federal Institute of
Technology (ETH Zrich).
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http://www.trash.net/~luethi/microchip/modules/source/m_bank.asm
;***************************************************************************
;
; Standard Macros for PIC 16XXX V2.00
; ====================================
;
;
;***************************************************************************
#DEFINE M_BANK_ID dummy
BANK0 macro ; select register bank 0

bcf STATUS,RP0
bcf STATUS,RP1
endm

bsf STATUS,RP0
bcf STATUS,RP1
endm

bcf STATUS,RP0
bsf STATUS,RP1
endm

bsf STATUS,RP0
bsf STATUS,RP1
endm
;*** Conditional branching ***

; Macros to simplify 'IF THEN ELSE' queries
; Pre: valid w
; Post: compare w vs. m_val, branch to m_target or not
;branch on equal w and m_val

BEQ macro m_val, m_target
sublw m_val
bz m_target ; zero bit set, branch
http://www.trash.net/~luethi/microchip/modules/source/m_bank.asm (1 of 3)12/02/2008 17:12:41

endm
;branch on 0 value in register m_file, jump to m_target

BZF macro m_file, m_target
tstf m_file ; check register (Z)
bz m_target ; zero bit set, branch
endm
;branch on not equal w and m_val

BNEQ macro m_val, m_target
sublw m_val
bnz m_target ; zero bit not set, branch
endm
;branch on not 0 value in register m_file, jump to m_target

BNZF macro m_file, m_target
tstf m_file ; check register (Z)
bnz m_target ; zero bit set, branch
endm
;branch on greater w than m_val

BRG macro m_val, m_target
sublw m_val ; result = m_val - w
bnc m_target ; no carry if result negative, branch
endm
;branch on equal or greater w than m_val

BREG macro m_val, m_target
sublw m_val-0x1 ; result = (m_val-1) - w
bnc m_target ; no carry if result negative, branch
endm
;branch on smaller w than m_val

BRS macro m_val, m_target
sublw m_val-0x1 ; result = (m_val-1) - w
bc m_target ; carry if result zero or positive, branch
endm
;branch on equal or smaller w than m_val

BRES macro m_val, m_target
sublw m_val ; result = m_val - w
bc m_target ; carry if result zero or positive, branch
endm

;*** Microchip Tips'n Tricks ***

; swaps the contents of W and REG without using a second register
; from 'Microchip Tips'n Tricks'
SWAPWF macro REG

XORWF REG,F
XORWF REG,W
XORWF REG,F
endm

http://www.trash.net/~luethi/microchip/modules/source/m_wait.asm
;***************************************************************************
;
; Wait Routine for PIC 16XXX V1.02
; =================================
;
;
; V1.02: In case of 'WAIT 0x00' or 'WAITX 0x00, 0x0F', the wait
; statement (macro) is ignored, no delay is executed
; (05.06.2004)
; V1.01: Correction of a severe mistake: Programming of the prescaler
; affected the entire OPTION_reg including PORTB pullups and
; INTEDGE configuration. Now only the least significant 6 bits
; of OPTION_reg are configured, the upper 2 bits are preserved.
; (16.02.2003)
;
;
;
;
; SPECIFICATIONS:
; ===============
; Processor: Microchip PIC 16X84, 16F7X, 16F87X
; Clock: 4.00 MHz XT
;
;
; DESCRIPTION:
; ============
; Developed on PIC 16C84, but executeable on all PIC 16X84, 16C7X, etc.
;
; Routine performs a "busy" wait.
; Implemented standard delay (@ 4 MHz):
http://www.trash.net/~luethi/microchip/modules/source/m_wait.asm (1 of 3)12/02/2008 17:12:41

; "WAIT 0x01" is equal to 1 Unit == 1.02 ms

; The assigned standard prescaler for TMR0 is "PRESCstd = b'00000001'"
; The prescaler is activated by clearing bit 3 of the OPTION register
;
; Prescalers:
; b'00000000' == 1:2 ==> 0.512 ms
; b'00000001' == 1:4 ==> 1.02 ms (standard)
; b'00000111' == 1:256 ==> 65.3 ms
; Waittime = WCYCLE (= timeconst) * prescaler
;
; "WAIT xxx" ; standard
; "WAITX xxx, yyy" ; extended with specific prescaler
; ; WAITX d'16',d'7' = 1.045 s @ 4 MHz
;
;
; DECLARATIONS needed in MAIN PROGRAM:
; ====================================
; "CONSTANT BASE = 0x0C" Base address of user file registers
;
;
; REQUIRED MEMORY:
; ================
; 1 register: @ BASE+0
; needs itself 1 stack level
;
;***************************************************************************
#DEFINE M_WAIT_ID dummy
IFNDEF M_BANK_ID
ERROR "Missing include file: m_bank.asm"
ENDIF
CONSTANT PRESCstd = b'00000001' ; standard prescaler for TMR0
WCYCLE set BASE+d'0' ; wait cycle counter

;***** MACROS *****
WAIT macro timeconst_1

IF (timeconst_1 != 0)
movlw timeconst_1
call WAITstd
ENDIF
endm
WAITX macro timeconst_2, prescaler

IF (timeconst_2 != 0)
movlw timeconst_2
call _Xsetup
movlw prescaler ; assign prescaler for TMR0
call _Xwait
ENDIF
endm
;***** SUBROUTINES *****
_Xsetup movwf WCYCLE ; assign wait cycle duration

clrf TMR0
BANK1
movlw b'11000000' ; set up mask
andwf OPTION_REG,f ; clear corresponding bits
RETURN
WAITstd movwf WCYCLE ; assign wait cycle duration

clrf TMR0
BANK1
movlw b'11000000' ; set up mask
andwf OPTION_REG,f ; clear corresponding bits
movlw PRESCstd ; load standard prescaler
_Xwait iorwf OPTION_REG,f ; assign prescaler to TMR0
BANK0
_WAITa bcf INTCON,T0IF ; clears TMR0 overflow flag

_WAITb btfss INTCON,T0IF ; checks TMR0 overflow flag, skip if set
goto _WAITb ; this is the wait-loop
decfsz WCYCLE,f ; repeats the loop according to the
goto _WAITa ; assigned wait cycles
RETURN

http://www.trash.net/~luethi/microchip/modules/source/m_beep.asm
;***************************************************************************
;
; Beep Routine for PIC 16XXX V1.00
; =================================
;
;
;
;
;
;
; SPECIFICATIONS:
; ===============
; Processor: Microchip PIC 16XXX
; Required Hardware: Piezo beeper with decoupling capacitor
;
;
; DESCRIPTION:
; ============
; Developed on PIC 16C84, but executeable on all PIC 16X84, 16C7X, ...
;
; "BEEPinit" initialization to set output port
; "BEEP xxx yyy" normal usage
; "BEEPX xxx yyy zzz" extended usage
; xxx is frequency-related
; yyy is duration according to PRESCbeeb, TMR0
; zzz is user-defined TMR0 prescaler setting
;
; i.e. 3-Tone-Melody: BEEP 0xFF, 0x02
http://www.trash.net/~luethi/microchip/modules/source/m_beep.asm (1 of 4)12/02/2008 17:12:42

; BEEP 0x90, 0x05

; BEEP 0xC0, 0x03
;
;
; ====================================
; CONSTANT BASE = 0x0C Base address of user file registers
; #define BEEPport PORTA,0x00
; #define BEEPtris TRISA,0x00
;
;
; REQUIRED MEMORY:
; ================
; 3 registers: @ BASE+0 - BASE+2
;
;***************************************************************************
#DEFINE M_BEEP_ID dummy
IFNDEF M_BANK_ID
ENDIF
;***** HARDWARE DECLARATION *****
IFNDEF BEEPport
ERROR "Define BEEPport in MAIN PROGRAM"
ENDIF
IFNDEF BEEPtris
ERROR "Define BEEPtris in MAIN PROGRAM"
ENDIF
;***** PARAMETERIZATION *****
IFNDEF PRESCbeep
#define PRESCbeep b'00000111' ; 65,3 ms per Cycle
ENDIF
TEMP1 set BASE ; universal temporary register

TEMP2 set BASE+1

TEMP3 set BASE+2
;***** MACROS *****
BEEP macro freq, duration

movlw freq ; assign frequency
movwf TEMP1
movlw duration ; assign duration
call BEEPsub
endm
BEEPX macro freq, duration, prescaler

movlw freq ; assign frequency
movwf TEMP1
movlw duration ; assign duration
movwf TEMP2
clrf TMR0
BANK1
movlw prescaler ; assign prescaler for TMR0
call BEEPsub2
endm
BEEPinit macro
bcf BEEPport
BANK1
bcf BEEPtris
BANK0
endm
BEEPsub movwf TEMP2 ; assign duration

clrf TMR0
BANK1
movlw PRESCbeep ; assign prescaler for TMR0
BEEPsub2 movwf OPTION_REG ; assign W to OPTION
BANK0
BEEPa bcf INTCON,T0IF ; clear TMR0 Overflow Flag
BEEPb bsf BEEPport
call B_Wait
bcf BEEPport
call B_Wait
btfss INTCON,T0IF ; check TMR0 Overflow Flag, skip if set

goto BEEPb
decfsz TEMP2,1 ; repeat subroutine
goto BEEPa
RETURN
B_Wait movfw TEMP1

movwf TEMP3
B_Waita decfsz TEMP3,1
goto B_Waita
RETURN

Microchip PIC microcontroller projects
PIC Microcontroller Projects

For Non-Commercial Use Only
I would appreciate to be credited within your project, if you use any of the source code below. If you have an interesting
project going on, I'll be glad about feedback.
The software below comes with no guarantee or warranty except for my good intentions. Further the use of this code implies
that the user has a fundamental understanding of electronics and its risks. I'm not responsible for any harm or damage,
caused by inproper use of any of the code below.
Any commercial use of parts or all of this code requires the permission of the author.
"Design and test of electronic circuits are 1% inspiration and 99% perspiration."
(Freely derived from Thomas Alva Edison's famous phrase: "Genius is 1% inspiration and 99% perspiration.")
PIC Projects
Precision Digital Altimeter
AT Keyboard Interface V1.xx
AT Keyboard Box V2.xx
AT Keyboard Interface with Morse Code Support V1.xx
AT Keyboard Interface with Morse Code Support V2.xx
PIC Test Routines

RS232 Test Programs
Simple RS232 Interface
RS232 Communication Test Routine with LCD (1)
RS232 Communication Test Routine with LCD (2)
Dual RS232 Communication Routine with LCD
RS232 Scope V1.02 Test Interface
LCD Test Programs
LCDx Test Routine
Binary to Decimal Test Routine
Debugging Routine / Bitstream Visualization
AT Keyboard Test Programs
AT Keyboard Scan Code Debug Routine
Numeric Foil-Keypad Calibration Routine
ADC Test Programs
NSC ADC12130 Test Interface
DCF77 Test Programs
DCF77 Test Interface
http://www.trash.net/~luethi/microchip/projects/projects.html (1 of 6)12/02/2008 17:12:43

PIC Projects [Toc] [Top]
Precision Digital Altimeter [Toc] [Top]

MPXS4100 absolute pressure sensor, PIC16F84 and wireless transmitter & receiver
Altimeter for my radio controlled modelplanes, but can also be used for hiking, climbing, mountaineering and other outdoor
activities. Has an excellent resolution of 1 meter and a range of 4100 meters. I still work on it.
AT Keyboard Interface V1.04 [Toc] [Top]

AT keyboard interface with RS232 link using PIC16F84
AT keyboard to RS232 interface for the personal computer or RS232 compatible devices. This routine converts AT
keyboard scan patterns to ASCII characters and sends them afterwards to the target device by using the RS232 transmission
protocol. Support of english (QWERTY) and modified swiss-german (QWERTZ) 'codepages'. There is no visual interface at
the terminal like a LCD display. Unidirectional data flow: keyboard to RS232 target device.

RS232 terminal with LCD display using PIC16F84
keyboard scan patterns to ASCII characters and transmits them afterwards to the target device by using the RS232
transmission protocol. Support of english (QWERTY) and modified swiss-german (QWERTZ) 'codepages'. This
implementation features a LCD display as visual interface, but only for transmitted characters typed on the local keyboard
(unidirectional data flow). RS232 data transmission is carried out using a software routine. No reception of characters sent
from RS232 target device, because no RS232 modules with preemptive data reception available yet.


Fully operating RS232 terminal with LCD display using PIC 16C74A
keyboard scan patterns to ASCII characters and transmits them afterwards to the target device by using the RS232
transmission protocol. Support of english (QWERTY) and modified swiss-german (QWERTZ) 'codepages'. This
microcontroller application features a dot matrix LCD display, and makes best use of the microcontroller-internal USART, i.
e. completely hardware-based RS232 data transmission and reception. Reception of external serial data is done using an
interrupt-based acquisition scheme. Visualization of received data on the first line, user-entered data on the second line of
the dot matrix LCD display. This application is best used with a 2 line by 20 or 40 characters LCD display.
AT Keyboard Box V2.05 [Toc] [Top]

Fully operating RS232 terminal with LCD display and numeric foil-keypad using PIC16F77
AT keyboard to RS232 interface with completely bi-directional communication capabilities. Multiple input devices are
attached, such as an AT keyboard and a small numeric foil-keypad. The application features a dot matrix LCD display to
visualize the data received from the RS232 client on the first line, and the characters typed on the locally attached keyboard
on the second line. There is also a piezo-beeper for acoustic feedback. This program converts AT keyboard scan patterns to
ASCII characters and transmits them afterwards to the target device by using the RS232 transmission protocol. RS232
communication is carried out by the microcontroller-internal USART, i.e. completely hardware-based RS232 data
transmission and reception.
Dynamic configuration of RS232 baud rate setting at start-up (user-customization with 1200 baud - 115200 baud), with
12 seconds inactivity time-out. In case the time-out applies, the user-customization process terminates with the current
setting. Default setting after power-up is 9600 baud.
Support of english (QWERTY) and modified swiss-german (QWERTZ) 'codepages'. This application is best used with a 2
line by 20 or 40 characters LCD display.
AT Keyboard Interface with Morse Code Support V1.02 [Toc] [Top]

AT keyboard interface with RS232 link and Morse code PWM output using PIC16F84
Technical data as AT Keyboard Interface V1.03 above. Additional pulse-width modulated (PWM) Morse code output.
Further parameterizable acoustic Morse code feedback through Piezo beeper.
AT Keyboard Interface with Morse Code Support V2.02 [Toc] [Top]

AT keyboard interface with LCD display, RS232 link and Morse code PWM output using PIC16F84
Technical data basically as AT Keyboard Interface V2.03 above (except direct Ctrl-Hex and Alt-Dec entry). Additional pulse-
width modulated (PWM) Morse code output. Further parameterizable acoustic Morse code feedback through Piezo beeper.
PIC Test Routines [Toc] [Top]
RS232 Test Programs [Toc] [Top]
Simple RS232 Interface [Toc] [Top]

Shows briefly the use of the various RS232 modules (m_rs048, m_rs096, m_rs192). It is more or less the same as the RS232
Communication Test Routine (1), without LCD display. The controller sends approximately every 10 seconds a stand-by
statement to the terminal screen and echoes to every character the device gets. RS232 reception is based on PortB0 interrupt.
RS232 Communication Test Routine with LCD (1) [Toc] [Top]

Fully software controlled reception & transmission on interrupt featured PICs
Complete RS232 communication routine for PIC16F84, which allows to display sent characters from the PC on a dot matrix
LCD Display and send an acknowledge back to the PC. RS232 reception is based on PortB0 interrupt.
Shows the implementation and function of the modules m_rs232.asm, m_wait.asm, m_lcd.asm and m_lcdv08.asm on the
PIC16F84.
RS232 Communication Test Routine with LCD (2) [Toc] [Top]

Fully hardware controlled reception & transmission on PIC16F77 (PIC16C74A)
Complete RS232 communication routine using hardware USART of PIC16F7x, which allows to display sent characters from
the PC on a dot matrix LCD Display and sends an acknowledge back to the PC.
Shows the implementation and function of the modules m_wait.asm, m_lcd.asm and m_lcdv08.asm on the PIC16F77
(PIC16C74A).
Dual RS232 Communication Routine with LCD [Toc] [Top]

Dual RS232 reception & transmission on PIC16F77
Microcontroller terminal featuring two independent RS232 interfaces: One RS232 link uses the hardware USART and
interrupts, the other one is software-based using only interrupts on PortB0. Display of received ASCII characters and
corresponding decimal values on LCD. ASCII values entered on one terminal window are transmitted by RS232 to the
controller, displayed on the LCD, and further transmitted to the other terminal window.
Shows the simultaneous use of both hardware- and software-based RS232 communication on the PIC16F77.
RS232 Scope V1.02 Test Interface [Toc] [Top]

This is the test routine for the serial 16 bit data capture from an Excel 97 worksheet.
It shows the implementation of a 16 bit table read in both directions (top-down and bottom-up) to save space. The Excel
worksheet visualizes the received data using graphs.
This test program implements one building block of the digital altimeter.
LCD Test Programs [Toc] [Top]
LCDx Test Routine [Toc] [Top]

Demonstrates the implementation of self-defined characters on a dot matrix LCD display with the module m_lcdx.asm.

Binary to Decimal Test Routine [Toc] [Top]

A counter from 0 to 65'535 on a dot matrix LCD display demonstrates the function of the m_lcdv16.asm module on the
PIC16C84.
Debugging Routine / Bitstream Visualization [Toc] [Top]

Demonstrates the 16 bit binary debugging routine with the module m_lcdb16.asm. Requires a dot matrix LCD display.
I've written it to debug the SSP (Synchronous Serial Port) interface to the NSC ADC12130 for my altimeter.
AT Keyboard Test Programs [Toc] [Top]
AT Keyboard Scan Code Debug Routine [Toc] [Top]

RS232 based scan pattern debug routine for PIC16F84
AT keyboard test routine to visualize and verify scan patterns sent by the keyboard. The scan patterns are fetched by the
controller and afterwards sent to the RS232 target device, in this case the PC and an Excel 97 worksheet programmed with
Visual Basic to visualize the scan patterns.
Numeric Foil-Keypad Calibration Routine [Toc] [Top]

RS232 based debug and calibration routine for PIC16F77
AT keyboard test routine to visualize and verify the analog values acquired by the PIC microcontroller to convert the
numeric foil-keypad entries to decimal values. The setup is basically the same as the AT Keyboard Box V2.05 above.
ADC Test Programs [Toc] [Top]
NSC ADC12130 Test Interface [Toc] [Top]

Serial interface to 12 bit A/D Converter
Shows the implementation of the synchronous serial connection to the A/D Converter. Auto-Calibration, Auto-Zero and
Status Read are made as initial procedures, afterwards the unsigned 12 bit data will be fetched and displayed on the LCD
display in binary format.
DCF77 Test Programs [Toc] [Top]
DCF77 Test Interface [Toc] [Top]

Software-based PWM decoding on PIC16F84 of DCF77 time information.
Incorporates standard DCF77 RF to PWM decoder unit based on Temic 4224. Visualization and translation of DCF77 data
is done using an Excel 97 work sheet with the ability to acquire and log RS232 data.
[Toc] [Top]


click here

1 2 3 4
LCD connection for: LCD connection for:

VDD VDD m_lcde.asm (std. char set, delay-based) m_lcd.asm (std. char set, delay-based)
VSS VSS m_lcdebf.asm (std. char set, busy-flag based) m_lcdx.asm (ext. char set, delay-based)
D m_lcdexbf.asm (ext. char set, busy-flag based) m_lcd_bf.asm (std. char set, busy-flag based) D
m_lcdxbf.asm (ext. char set, busy-flag based)
CON1_3 CON2_3
LCD_CON14 LCD_CON14
(HD44780 compatible)
VDD
Contrast
Contrast
VDD
VDD
R1_3
R/W
R/W
VSS
VSS
RS
RS
D0
D1
D2
D3
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
10k
E
C C
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
10
11
12
13
14
VSS VSS
1
VDD VDD RD4

POT1_3
Contrast Contrast
RD3
RB1 RA3
2
Contrast
RD2
RB2 RA2
5k RD1
RB3 RA1
3
Example for customized connectivity,

RD5
RA0
B e.g. PortA & PortB on PIC16F84 or similar, B
or PortA, PortB, PortC, PortD on PIC16F77, PIC16F877 or similar RD6
VSS Separate control lines
RB[3..1]
RB[7..0] RD7
Data lines on low nibble

RA[3..0]
RA[5..0]
Data & control lines on

RD[7..1]
RD[7..0]
a single port
Title
Example connectivity for a single port,
e.g. PortB on PIC16F84 or similar, HD44780 Dot Matrix LCD Connectivity
A or PortB, PortC, PortD on PIC16F77, PIC16F877 or similar A
Written by Date
Peter Lthi 5-Jun-2005
www.electronic-engineering.ch Revision Page
Urdorf, Switzerland 1.00 1 of 1
1 2 3 4
http://www.trash.net/~luethi/microchip/modules/source/m_lcd.asm
;***************************************************************************
;
; LCD INTERFACE V2.06 for PIC 16XXX
; =================================
;
;
; V2.06: Added new parameters: (26.12.2004)
; - LCDLINENUM: (default: 0x2) # of LCD lines (affects LCDL2/3)
; - LCDTYPE: type of LCD/controller:
; - 0x0: (default) standard LCD (w/ HD44780)
; - 0x1: EA DIP204-4 (w/ KS0073, white chars, blue bg)
; V2.05: Changed LCDinit and constants (24.06.2004)
; V2.04: Clean-up and general improvements, added
; parameter LCDSPEED (10.04.2004)
; V2.03: Improved masking of LCD data outputs,
; reduced code size, added parameter LCDWAIT
; (16.02.2003)
; V2.02: LCDinit coded as macro instead of procedure
; V2.01: LCDinit with "andwf" instead of "movwf"
; V2.00: With constant timing delays (No busy flag check)
;
;
;
;
; SPECIFICATIONS:
; ===============
; Clock: 4.00 MHz XT - 10.00 MHz HS Mode (tested)
; Throughput: 1 - 2.5 MIPS
; LCD Transmission Mode: 4 bit on high nibble of LCD port
; (MSB D7-D4)
; LCD Connections: 7 wires (4 data, 3 command),
http://www.trash.net/~luethi/microchip/modules/source/m_lcd.asm (1 of 9)12/02/2008 17:12:45

; LCD data on low nibble of any port,

; LCD command on any port bits
; Total: 10 wires
; (4 data, 3 command, 1 Vdd, 1 GND, 1 contrast)
;
;
; DESCRIPTION:
; ============
; Developed on PIC 16F84, but executeable on all PIC 16XXX.
; Program handles all aspects of setup and display on a dot matrix LCD
; display. Routines are provided to allow display of characters,
; display shifting and clearing, cursor setup, cursor positioning and
; line change.
;
; Program calls module m_wait.asm with implemented standard delay:
;
; "LCDinit" (macro)
; "LCDchar 'c'" display ascii character
; "LCDw" display char in working register
; "LCDcmd xxx" e.g. "LCDcmd LCDCLR"
; "LCD_DDAdr xxx" set cursor to explicit address
; --> REFER TO LCD DOCUMENTATION
; "LCDline x" set cursor to the beginning of line 1/2
;
; To display decimal-values, please include the following binary to
; decimal conversion modules:
; for 8 Bit: m_lcdv08.asm
;
;
; DEFAULT TIMING PARAMETERS:
; ==========================
; CONSTANT LCDLINENUM = 0x02 ; LCD display has two lines (e.g. 2x20)
; CONSTANT LCDTYPE = 0x00 ; standard HD44780 LCD
; CONSTANT LCDSPEED = 0x01 ; affecting LCD_EN 'clock': high speed PIC clock
; CONSTANT LCDWAIT = 0x01 ; for Tosc <= 5 MHz
; CONSTANT LCDCLRWAIT = 0x08 ; wait after LCDCLR until LCD is ready again
;
; To maintain proper timing (setup time, wait time, LCD initialization),
; adjust the parameter LCDWAIT as follows:

; if Tosc <= 5 MHz: LCDWAIT = 0x01

; else LCDWAIT = floor(0.25 * clock frequency[MHz])
; To comply with manufacturer specifications (Enable High Time >= 450 ns),
; add a "nop" to the procedure LCDclk, if using this module with clock
; rates higher than 9 MHz. Therefore, define in your main program:
; CONSTANT LCDSPEED = 0x00 ; clk in [0..9] MHz
; CONSTANT LCDSPEED = 0x01 ; clk in [9..20] MHz, default
;
;
; ====================================
; LCDtris equ TRISB
; LCDport equ PORTB
;
; LCD port connections: B0: not used, still available for INTB
; B1: D4
; B2: D5
; B3: D6
; B4: D7
; B5: E
; B6: R/W
; B7: RS
;
; REQUIRED MEMORY:
; ================
;
;***************************************************************************
#DEFINE M_LCD_ID dummy
IFNDEF M_BANK_ID
ENDIF
IFNDEF M_WAIT_ID
ERROR "Missing include file: m_wait.asm"
ENDIF
IFNDEF LCDLINENUM ; use default value, if unspecified

CONSTANT LCDLINENUM = 0x02 ; by default, 2 lines

ENDIF
IFNDEF LCDTYPE ; use default value, if unspecified
CONSTANT LCDTYPE = 0x00 ; standard HD44780 LCD
;CONSTANT LCDTYPE = 0x01 ; EADIP204-4 (w/ KS0073)
ENDIF
IFNDEF LCDSPEED ; use default value, if unspecified
;CONSTANT LCDSPEED = 0x00 ; clk in [0..9] MHz
CONSTANT LCDSPEED = 0x01 ; clk in [9..20] MHz, default
ENDIF
IFNDEF LCDWAIT ; use default value, if unspecified
CONSTANT LCDWAIT = 0x01 ; for Tosc <= 5 MHz
ENDIF
IFNDEF LCDCLRWAIT ; use default value, if unspecified
CONSTANT LCDCLRWAIT = 0x08 ; wait after LCDCLR until LCD is ready again
ENDIF
IFNDEF LCDtris
ERROR "Declare LCDtris in MAIN PROGRAM"
ENDIF
IFNDEF LCDport
ERROR "Declare LCDport in MAIN PROGRAM"
ENDIF
; LCD data ports D4 - D7 == 0x01 - 0x04

#define LCD_EN LCDport,0x05 ; Enable Output / "CLK"
#define LCD_RW LCDport,0x06 ; Read/Write
#define LCD_RS LCDport,0x07 ; Register Select
IFNDEF BASE
ERROR "Declare BASE (Base address of user file registers) in MAIN PROGRAM"
ENDIF
LCDbuf set BASE+d'2' ; LCD data buffer

LCDtemp set BASE+d'3' ; LCD temporary register
;***** LCD COMMANDS *****
;*** Standard LCD COMMANDS for INIT *** ( HI-NIBBLE only )

; for 4 bit mode: send only one nibble as high-nibble [DB7:DB4]

CONSTANT LCDEM8 = b'0011' ; entry mode set: 8 bit mode, 2 lines
CONSTANT LCDDZ = b'1000' ; set Display Data Ram Address to zero
;*** Standard LCD COMMANDS *** ( HI- / LO-NIBBLE )

; USE THESE COMMANDS BELOW AS FOLLOW: "LCDcmd LCDCLR"
CONSTANT LCDCLR = b'00000001' ; clear display: resets address counter & cursor
CONSTANT LCDCH = b'00000010' ; cursor home
CONSTANT LCDCR = b'00000110' ; entry mode set: cursor moves right, display auto-shift off
CONSTANT LCDCL = b'00000100' ; entry mode set: cursor moves left, display auto-shift off
CONSTANT LCDCONT = b'00001100' ; display control: display on, cursor off, blinking off
CONSTANT LCDMCL = b'00010000' ; cursor/disp control: move cursor left
CONSTANT LCDMCR = b'00010100' ; cursor/disp control: move cursor right
CONSTANT LCDSL = b'00011000' ; cursor/disp control: shift display content left
CONSTANT LCDSR = b'00011100' ; cursor/disp control: shift display content right
CONSTANT LCD2L = b'00101000' ; function set: 4 bit mode, 2 lines, 5x7 dots
IF (LCDLINENUM == 0x2)
CONSTANT LCDL1 = b'10000000' ; DDRAM address: 0x00, selects line 1 (2xXX LCD)
CONSTANT LCDL3 = b'10010100' ; (DDRAM address: 0x14, fallback)
ELSE
ENDIF
; special configuration for EA DIP204-4
CONSTANT LCDEXT = b'00001001' ; extended function set EA DIP204-4
CONSTANT LCD2L_A = b'00101100' ; enter ext. function set: 4 bit mode, 2 lines, 5x7 dots
CONSTANT LCD2L_B = b'00101000' ; exit ext. function set: 4 bit mode, 2 lines, 5x7 dots
;***** MACROS *****
LCDinit macro
BANK1
movlw b'0000001' ; set to output
andwf LCDtris,f
BANK0
bcf LCD_EN ; clear LCD clock line
bcf LCD_RW ; set write direction
bcf LCD_RS ; clear command/data line

clrLCDport ; reset LCD data lines

WAIT 4*LCDWAIT ; >= 4 ms @ 4 MHz
; LCD INITIALIZATION STARTS HERE

; start in 8 bit mode
movlw LCDEM8 ; send b'0011' on [DB7:DB4]
call LCDxmit ; start in 8 bit mode
call LCDclk ; That's while:
WAIT LCDWAIT ; On POWER UP, the LCD will initialize itself,
; but after a RESET of the microcontroller without
; POWER OFF, the 8 bit function mode will reboot
; the LCD to 4 bit mode safely.
movlw LCDDZ ; set DDRAM to zero

call LCDxmit
call LCDclk
WAIT LCDWAIT ; ~1 ms @ 4 MHz

call LCDxmit ; change to 4 bit mode
call LCDclk
; now in 4 bit mode, sending two nibbles

IF LCDTYPE == 0x00
LCDcmd LCD2L ; function set: 4 bit mode, 2 lines, 5x7 dots
LCDcmd LCDCONT ; display control: display on, cursor off, blinking off
LCDcmd LCDCLR ; clear display, address counter to zero
WAIT LCDCLRWAIT ; wait after LCDCLR until LCD is ready again
ELSE
IF LCDTYPE == 0x01
; for LCD EA DIP204-4 (white chars, blue backlight)
LCDcmd LCD2L_A ; switch on extended function set
LCDcmd LCDEXT ; 4 lines
LCDcmd LCD2L_B ; switch off extended function set
ELSE
ERROR "Unsupported parameter"
ENDIF
ENDIF
endm

LCDchar macro LCDarg ; write ASCII argument to LCD

movlw LCDarg
call LCDdata
endm
LCDw macro ; write content of w to LCD

call LCDdata
endm
LCDcmd macro LCDcommand ; write command to LCD

movlw LCDcommand
call LCDcomd
endm
LCDline macro line_num

IF (line_num == 1)
LCDcmd LCDL1 ; first line
ELSE
IF (line_num == 2)
LCDcmd LCDL2 ; second line
ELSE
IF (line_num == 3)
LCDcmd LCDL3 ; third line
ELSE
IF (line_num == 4)
LCDcmd LCDL4 ; fourth line
ELSE
ERROR "Wrong line number specified in LCDline"
ENDIF
ENDIF
ENDIF
ENDIF
endm
LCD_DDAdr macro DDRamAddress

Local value = DDRamAddress | b'10000000' ; mask command
IF (DDRamAddress > 0x67)
ERROR "Wrong DD-RAM-Address specified in LCD_DDAdr"
ELSE
movlw value
call LCDcomd
ENDIF

endm
LCD_CGAdr macro CGRamAddress

Local value = CGRamAddress | b'01000000' ; mask command
IF (CGRamAddress > b'00111111')
ERROR "Wrong CG-RAM-Address specified in LCD_CGAdr"
ELSE
movlw value
call LCDcomd
ENDIF
endm
clrLCDport macro ; clear/reset LCD data lines

movlw b'11100001' ; get mask
andwf LCDport,f ; clear data lines only
endm
; transmit only lower nibble of w

LCDxmit movwf LCDbuf ; store command/data nibble
; first, clear LCD data lines
clrLCDport
; second, move data out to LCD data lines
rlf LCDbuf,w ; get data
andlw b'00011110' ; extract only valid part
iorwf LCDport,f ; put to LCD data lines
RETURN
; transmit command to LCD

LCDcomd bcf LCD_RS ; select command registers
goto _LCD_wr
; transmit data to LCD

LCDdata bsf LCD_RS ; select data registers
_LCD_wr bcf LCD_RW ; set write direction
movwf LCDtemp ; store command/data to send
; send hi-nibble
movfw LCDtemp ; get data
swapf LCDtemp,w ; swap hi- and lo-nibble, store in w
call LCDxmit ; transmit nibble
call LCDclk
; send lo-nibble


call LCDclk
; reset LCD controls
bcf LCD_RS ; reset command/data register
;bcf LCD_RW ; reset to write direction
RETURN
; clocks LCD data/command

LCDclk WAIT LCDWAIT
bsf LCD_EN ; set LCD enable
; insert LCDSPEED x nops to comply with manufacturer
; specifications for clock rates above 9 MHz
VARIABLE CNT_V ; declare intermediate variable
CNT_V = LCDSPEED ; assign pre-defined constant
WHILE (CNT_V > 0x0) ; perform while loop to insert 'nops'
nop ; insert 'nop'
CNT_V -= 1 ; decrement
ENDW
bcf LCD_EN
WAIT LCDWAIT ; clocks LCD data/command
RETURN

http://www.trash.net/~luethi/microchip/modules/source/m_lcdx.asm
;***************************************************************************
;
; =================================
;
;
; V2.24: Clean-up and general improvements, added
; (16.02.2003)
; With constant timing delays (No busy flag check)
; Ability to define your own characters for the LCD
; (=> see macro LCDspecialChars)
;
;
;
;
; SPECIFICATIONS:
; ===============
; Clock: 4.00 MHz - 10.00 MHz XT (tested)
http://www.trash.net/~luethi/microchip/modules/source/m_lcdx.asm (1 of 10)12/02/2008 17:12:45


; (MSB D7-D4)
; LCD Connections: 7 wires on any portX (4 data, 3 command)
; X0: unused, X1-X7: D4-D7, E, R/W, RS
; Total: 10 wires
;
;
; ADDITIONAL PROGRAM CODE:
; ========================
; macro LCD_CGAdr
; macro LCDspecialChars
;
;
; DESCRIPTION:
; ============
; Developed and tested on PIC 16C84 @ 4 MHz, but executeable on all PIC 16XXX.
; line change.
; NEW: Allows to define your own characters (5x7 dots)
;
;
; "LCDinit" (macro)
; "LCDcmd xxx"
;
;
;

; ==========================
;
;
;
; ====================================
; LCDtris equ TRISB
; LCDport equ PORTB
;
; B1: D4
; B2: D5
; B3: D6
; B4: D7
; B5: E
; B6: R/W
; B7: RS
;
; REQUIRED MEMORY:
; ================
; 2 registers: @ BASE+2, BASE+3
;
;***************************************************************************
IFNDEF M_BANK_ID


ENDIF
IFNDEF M_WAIT_ID
ENDIF

ENDIF
ENDIF
ENDIF
ENDIF
ENDIF
IFNDEF LCDtris
ENDIF
IFNDEF LCDport
ENDIF

IFNDEF BASE

ENDIF



ELSE
ENDIF
;***** MACROS *****

LCDinit macro
BANK1
andwf LCDtris,f
BANK0


call LCDxmit
call LCDclk

call LCDclk

IF LCDTYPE == 0x00
ELSE
IF LCDTYPE == 0x01


ELSE
ENDIF
ENDIF
LCDspecialChars ; insert special character setup macro
endm
LCDspecialChars macro ; max. 8 self-defined chars

; *** first self-defined character "Delta" at position 0x00 ***
; *** call by "LCDchar 0x00" ***
LCD_CGAdr 0x00 ; send CGRamAddress
LCDchar b'00000110' ; write data to CGRamAddress
LCD_CGAdr 0x01
LCDchar b'00001000'
LCD_CGAdr 0x02
LCDchar b'00000100'
LCD_CGAdr 0x03
LCDchar b'00001010'
LCD_CGAdr 0x04
LCDchar b'00010001'
LCD_CGAdr 0x05
LCDchar b'00010001'
LCD_CGAdr 0x06
LCDchar b'00001110'
LCD_CGAdr 0x07
LCDchar b'00000000'
; *** second self-defined character "Big Omega" at position 0x01 ***

LCD_CGAdr 0x09
LCDchar b'00010001'
LCD_CGAdr 0x0A
LCDchar b'00010001'
LCD_CGAdr 0x0B
LCDchar b'00010001'
LCD_CGAdr 0x0C
LCDchar b'00010001'

LCD_CGAdr 0x0D
LCDchar b'00001010'
LCD_CGAdr 0x0E
LCDchar b'00011011'
LCD_CGAdr 0x0F
LCDchar b'00000000'
LCD_DDAdr 0x00 ; reset DDRam for proper function

endm

movlw LCDarg
call LCDdata
endm

call LCDdata
endm

movlw LCDcommand
call LCDcomd
endm

IF (line_num == 1)
ELSE
IF (line_num == 2)
ELSE
IF (line_num == 3)
ELSE
IF (line_num == 4)
ELSE
ENDIF
ENDIF
ENDIF
ENDIF
endm


ELSE
movlw value
call LCDcomd
ENDIF
endm

ELSE
movlw value
call LCDcomd
ENDIF
endm

endm

clrLCDport
RETURN

goto _LCD_wr


; send hi-nibble
call LCDclk
; send lo-nibble
call LCDclk
RETURN

LCDclk WAIT LCDWAIT
nop ; insert 'nop'
ENDW
bcf LCD_EN
RETURN

http://www.trash.net/~luethi/microchip/modules/source/m_lcd_bf.asm
;***************************************************************************
;
; =================================
;
;
; - LCDBUSYWAIT: (default: 0x18) wait before LCD busy flag
; is available
; V3.08: Fixed high-speed timing issue in busy flag part
; (24.06.2004)
; V3.06: Clean-up and general improvements, added flag
; LCDcflag, removed register LCDtemp2 (10.04.2004)
; V3.05: Added parameter LCDSPEED (04.01.2004)
; reduced code size, added parameter LCDWAIT (16.02.2003)
; V3.03: Replaced LCDtemp3 register used for busy flag with
; define statement: #define LCDbusy FLAGreg,0x06
; V3.00: Reads busy flag of LCD, minimum waittime,
; 4.00 - 20.00 MHz clock (15.05.1999)
; Clock independent portable code!
;
;
;
;
http://www.trash.net/~luethi/microchip/modules/source/m_lcd_bf.asm (1 of 10)12/02/2008 17:12:46

; SPECIFICATIONS:
; ===============
; Throughput: 1 - 5 MIPS
; (MSB D7-D4)
; Total: 10 wires
;
;
; ========================
; procedure CheckBusy
; procedure LCDbusyloop
;
;
; DESCRIPTION:
; ============
; Developed and tested on PIC 16F84 @ 4 MHz, tested on 16F84 @ 10 MHz
; and 16C74A/16F77 @ 20 MHz, but executeable on all PIC 16XXX.
; line change.
;
; "WAIT 0x01" is equal to 1 Unit == 1.04 ms (@ 4 MHz)
;
; "LCDinit" (macro)
;


;
;
; ==========================
; CONSTANT LCDBUSYWAIT = 0x18 ; wait before LCD busy flag is available
;
;
;
; ====================================
; LCDtris equ TRISB
; LCDport equ PORTB
; #define LCDbusy FLAGreg,0x06 ; LCD busy flag declared within flag register
; #define LCDcflag FLAGreg,0x07 ; LCD command/data flag
;
; B1: D4
; B2: D5
; B3: D6
; B4: D7
; B5: E
; B6: R/W
; B7: RS
;
; REQUIRED MEMORY:
; ================


; 2 flags: LCDbusy, LCDcflag
;
;***************************************************************************
IFNDEF M_BANK_ID
ENDIF
IFNDEF M_WAIT_ID
ENDIF

ENDIF
ENDIF
ENDIF
ENDIF
ENDIF
IFNDEF LCDBUSYWAIT ; use default value, if unspecified
CONSTANT LCDBUSYWAIT = 0x18 ; wait before LCD busy flag is available
ENDIF
IFNDEF LCDtris
ENDIF

IFNDEF LCDport
ENDIF
IFNDEF LCDbusy
ERROR "#define LCDbusy FLAGreg,0x00 in MAIN PROGRAM"
ENDIF
IFNDEF LCDcflag
ERROR "#define LCDcflag FLAGreg,0x01 in MAIN PROGRAM"
ENDIF

D7 equ 0x04 ; LCD data line 7, for busy flag
IFNDEF BASE
ENDIF

LCDtemp2 set BASE+d'2' ; busy wait loop (re-use LCDbuf)




ELSE
ENDIF
;***** MACROS *****
LCDinit macro
BANK1
andwf LCDtris,f
BANK0


call LCDxmit
call LCDclk

call LCDclk

IF LCDTYPE == 0x00
ELSE
IF LCDTYPE == 0x01
ELSE
ENDIF
ENDIF
endm

movlw LCDarg
call LCDdata
endm

call LCDdata
endm

movlw LCDcommand
call LCDcomd
endm


IF (line_num == 1)
ELSE
IF (line_num == 2)
ELSE
IF (line_num == 3)
ELSE
IF (line_num == 4)
ELSE
ENDIF
ENDIF
ENDIF
ENDIF
endm

ELSE
movlw value
call LCDcomd
ENDIF
endm

endm

clrLCDport


RETURN

LCDcomd bsf LCDcflag ; set command
goto _LCD_wr

LCDdata bcf LCDcflag ; set data
_LCD_wr movwf LCDtemp ; store command/data to send
call CheckBusy ; check, if ready for next character
btfss LCDcflag ; skip if LCD command has been sent
bsf LCD_RS ; select data registers
; send hi-nibble
call LCDclk
; send lo-nibble
call LCDclk
bcf LCD_RW ; reset to write direction
RETURN

LCDclk bsf LCD_EN ; set LCD enable
nop ; insert 'nop'
ENDW
bcf LCD_EN
RETURN

; busy wait loop, makes busy flag signalling safe

LCDbusyloop
movlw LCDBUSYWAIT ; pre-defined constant
movwf LCDtemp2
_LCDbusyloop
decfsz LCDtemp2,f
goto _LCDbusyloop ; busy loop
RETURN
; routine to poll busy flag from LCD

CheckBusy
bcf LCD_RS ; select command registers
bsf LCDbusy ; init LCD busy flag
BANK1
movlw b'00011110'
iorwf LCDtris,f ; set corresponding ports to inputs
BANK0
bsf LCD_RW ; apply read direction
nop ; additional safety
_LCDbusy bsf LCD_EN ; set enable
; the following busy wait code makes busy flag signalling safe
call LCDbusyloop ; (timing relaxation)
; poll now LCD busy flag
btfss LCDport,D7 ; check busy flag, skip if busy
bcf LCDbusy ; set register flag if not busy
bcf LCD_EN
; get low nibble, ignore it
call LCDclk
btfsc LCDbusy ; skip if register flag is not yet cleared
goto _LCDbusy
bcf LCD_RW ; re-apply write direction
BANK1
movlw b'11100001'
andwf LCDtris,f ; set ports to output again
BANK0
RETURN

http://www.trash.net/~luethi/microchip/modules/source/m_lcdxbf.asm
;***************************************************************************
;
; =================================
;
;
; is available
; V3.28: Fixed high-speed timing issue in busy flag part
; (24.06.2004)
; V3.26: Clean-up and general improvements, added flag
; LCDcflag, removed register LCDtemp2 (10.04.2004)
; V3.25: added parameter LCDSPEED (04.01.2004)
; reduced code size, added parameter LCDWAIT (16.02.2003)
; V3.23: Replaced LCDtemp3 register used for busy flag with
; define statement: #define LCDbusy FLAGreg,0x06
; V3.20: Reads busy flag of LCD, minimum waittime,
; 4.00 - 20.00 MHz clock (15.05.1999)
; (=> see macro LCDspecialChars)
;
;
http://www.trash.net/~luethi/microchip/modules/source/m_lcdxbf.asm (1 of 12)12/02/2008 17:12:47

;
;
; SPECIFICATIONS:
; ===============
; (MSB D7-D4)
; Total: 10 wires
;
;
; ========================
; macro LCD_CGAdr
;
;
; DESCRIPTION:
; ============
; Developed and tested on PIC 16C84 @ 4 MHz, tested on 16F84 @ 10 MHz
; and 16C74A @ 20 MHz, but executeable on all PIC 16XXX.
; line change.
;
;
; "LCDinit" (macro)


;
;
;
; ==========================
;
;
;
; ====================================
; LCDtris equ TRISB
; LCDport equ PORTB
;
; B1: D4
; B2: D5
; B3: D6
; B4: D7
; B5: E
; B6: R/W

; B7: RS
;
; REQUIRED MEMORY:
; ================
;
;***************************************************************************
IFNDEF M_BANK_ID
ENDIF
IFNDEF M_WAIT_ID
ENDIF

ENDIF
ENDIF
ENDIF
ENDIF
ENDIF
ENDIF

IFNDEF LCDtris
ENDIF
IFNDEF LCDport
ENDIF
IFNDEF LCDbusy
ENDIF
IFNDEF LCDcflag
ENDIF

IFNDEF BASE
ENDIF




ELSE
ENDIF
;***** MACROS *****
LCDinit macro
BANK1
andwf LCDtris,f
BANK0




call LCDxmit
call LCDclk

call LCDclk

IF LCDTYPE == 0x00
ELSE
IF LCDTYPE == 0x01
ELSE
ENDIF
ENDIF
endm

LCD_CGAdr 0x01
LCDchar b'00001000'
LCD_CGAdr 0x02

LCDchar b'00000100'
LCD_CGAdr 0x03
LCDchar b'00001010'
LCD_CGAdr 0x04
LCDchar b'00010001'
LCD_CGAdr 0x05
LCDchar b'00010001'
LCD_CGAdr 0x06
LCDchar b'00001110'
LCD_CGAdr 0x07
LCDchar b'00000000'

LCD_CGAdr 0x09
LCDchar b'00010001'
LCD_CGAdr 0x0A
LCDchar b'00010001'
LCD_CGAdr 0x0B
LCDchar b'00010001'
LCD_CGAdr 0x0C
LCDchar b'00010001'
LCD_CGAdr 0x0D
LCDchar b'00001010'
LCD_CGAdr 0x0E
LCDchar b'00011011'
LCD_CGAdr 0x0F
LCDchar b'00000000'

endm

movlw LCDarg
call LCDdata
endm

call LCDdata
endm


movlw LCDcommand
call LCDcomd
endm

IF (line_num == 1)
ELSE
IF (line_num == 2)
ELSE
IF (line_num == 3)
ELSE
IF (line_num == 4)
ELSE
ENDIF
ENDIF
ENDIF
ENDIF
endm

ELSE
movlw value
call LCDcomd
ENDIF
endm

ELSE
movlw value
call LCDcomd
ENDIF

endm

endm

clrLCDport
RETURN

goto _LCD_wr

; send hi-nibble
call LCDclk
; send lo-nibble
call LCDclk
RETURN


nop ; insert 'nop'
ENDW
bcf LCD_EN
RETURN

LCDbusyloop
movwf LCDtemp2
_LCDbusyloop
decfsz LCDtemp2,f
RETURN

CheckBusy
BANK1
movlw b'00011110'
BANK0
bcf LCD_EN

call LCDclk
goto _LCDbusy
BANK1
movlw b'11100001'
BANK0
RETURN

http://www.trash.net/~luethi/microchip/modules/source/m_lcde.asm
;***************************************************************************
;
; LCD INTERFACE V2.12e for PIC 16XXX
; ==================================
;
;
; V2.12e: Added new parameters: (17.08.2004)
; V2.11e: Changed LCDinit and constants (24.06.2004)
; V2.10e: Clean-up and general improvements, added
; V2.03e: Improved masking of LCD data ouputs,
; (16.02.2003)
; V2.02e: LCDinit coded as macro instead of procedure
; V2.01e: LCDinit with "andwf" instead of "movwf"
; V2.00e: Initial release (20.01.2003)
; With constant timing delays (No busy flag check)
;
;
;
;
; SPECIFICATIONS:
; ===============
; Processor: Microchip PIC 16X84, 16F7X
; (MSB D7-D4)
http://www.trash.net/~luethi/microchip/modules/source/m_lcde.asm (1 of 9)12/02/2008 17:12:48


; Total: 10 wires
;
;
; DESCRIPTION:
; ============
; line change.
;
;
; "LCDinit" (macro)
;
;
;
; ==========================
;


;
;
; ====================================
;
; LCDtris equ TRISA ; LCD data on low nibble of portA
; LCDport equ PORTA
; #define LCD_ENtris TRISB,0x01 ; EN on portB,1
; #define LCD_EN PORTB,0x01
; #define LCD_RStris TRISB,0x02 ; RS on portB,2
; #define LCD_RS PORTB,0x02
; #define LCD_RWtris TRISB,0x03 ; RW on portB,3
; #define LCD_RW PORTB,0x03
;
;
; REQUIRED MEMORY:
; ================
;
;***************************************************************************
IFNDEF M_BANK_ID
ENDIF
IFNDEF M_WAIT_ID
ENDIF


ENDIF
ENDIF
ENDIF
ENDIF
ENDIF
IFNDEF LCDport
ENDIF
IFNDEF LCDtris
ENDIF
IFNDEF LCD_EN
ERROR "Declare LCD_EN in MAIN PROGRAM"
ENDIF
IFNDEF LCD_ENtris
ERROR "Declare LCD_ENtris in MAIN PROGRAM"
ENDIF
IFNDEF LCD_RS
ERROR "Declare LCD_RS in MAIN PROGRAM"
ENDIF
IFNDEF LCD_RStris
ERROR "Declare LCD_RStris in MAIN PROGRAM"
ENDIF
IFNDEF LCD_RW
ERROR "Declare LCD_RW in MAIN PROGRAM"
ENDIF
IFNDEF LCD_RWtris
ERROR "Declare LCD_RWtris in MAIN PROGRAM"
ENDIF

IFNDEF BASE
ENDIF



ELSE
ENDIF

;***** MACROS *****
LCDinit macro
BANK1
bcf LCD_ENtris ; set command lines to output
bcf LCD_RStris
bcf LCD_RWtris
movlw b'11110000' ; data output on low nibble
andwf LCDtris,f
BANK0


call LCDxmit
call LCDclk

call LCDclk

IF LCDTYPE == 0x00


ELSE
IF LCDTYPE == 0x01
ELSE
ENDIF
ENDIF
endm

movlw LCDarg
call LCDdata
endm

call LCDdata
endm

movlw LCDcommand
call LCDcomd
endm

IF (line_num == 1)
ELSE
IF (line_num == 2)
ELSE
IF (line_num == 3)
ELSE
IF (line_num == 4)

ELSE
ENDIF
ENDIF
ENDIF
ENDIF
endm

ELSE
movlw value
call LCDcomd
ENDIF
endm

endm

clrLCDport
movfw LCDbuf ; get data
RETURN

goto _LCD_wr


; send hi-nibble
call LCDclk
; send lo-nibble
call LCDclk
RETURN

LCDclk WAIT LCDWAIT
nop ; insert 'nop'
ENDW
bcf LCD_EN
RETURN

http://www.trash.net/~luethi/microchip/modules/source/m_lcde_bf.asm
;***************************************************************************
;
; ==================================
;
; written by Peter Luethi, 09.04.2004, Urdorf, Switzerland
;
; is available
; V4.02e: Fixed high-speed timing issue in busy flag part
; (24.06.2004)
; Added flag LCDcflag, removed register LCDtemp2
; Reads busy flag of LCD, minimum waittime.
; 4.00 - 20.00 MHz clock
;
;
;
;
; SPECIFICATIONS:
; ===============
; Processor: Microchip PIC 16X84, 16F7X
; (MSB D7-D4)
http://www.trash.net/~luethi/microchip/modules/source/m_lcde_bf.asm (1 of 11)12/02/2008 17:12:51


; Total: 10 wires
;
;
; ========================
;
;
; DESCRIPTION:
; ============
; line change.
;
;
; "LCDinit" (macro)
;
;
;
; ==========================

;
;
;
; ====================================
;
; LCDport equ PORTA
;
;
; REQUIRED MEMORY:
; ================
;
;***************************************************************************

IFNDEF M_BANK_ID
ENDIF
IFNDEF M_WAIT_ID
ENDIF

ENDIF
ENDIF
ENDIF
ENDIF
ENDIF
ENDIF
IFNDEF LCDport
ENDIF
IFNDEF LCDtris
ENDIF
IFNDEF LCD_EN
ENDIF
IFNDEF LCD_ENtris


ENDIF
IFNDEF LCD_RS
ENDIF
IFNDEF LCD_RStris
ENDIF
IFNDEF LCD_RW
ENDIF
IFNDEF LCD_RWtris
ENDIF
IFNDEF LCDbusy
ENDIF
IFNDEF LCDcflag
ENDIF

IFNDEF BASE
ENDIF




ELSE
ENDIF
;***** MACROS *****
LCDinit macro
BANK1
bcf LCD_RStris
bcf LCD_RWtris
andwf LCDtris,f
BANK0



call LCDxmit
call LCDclk

call LCDclk

IF LCDTYPE == 0x00
ELSE
IF LCDTYPE == 0x01
ELSE
ENDIF
ENDIF
endm

movlw LCDarg

call LCDdata
endm

call LCDdata
endm

movlw LCDcommand
call LCDcomd
endm

IF (line_num == 1)
ELSE
IF (line_num == 2)
ELSE
IF (line_num == 3)
ELSE
IF (line_num == 4)
ELSE
ENDIF
ENDIF
ENDIF
ENDIF
endm

ELSE
movlw value
call LCDcomd
ENDIF
endm


ELSE
movlw value
call LCDcomd
ENDIF
endm

endm

clrLCDport
RETURN

goto _LCD_wr

; send high nibble
swapf LCDtemp,w ; swap high and low nibble, store in w
call LCDclk
; send low nibble


call LCDclk
RETURN

nop ; insert 'nop'
ENDW
bcf LCD_EN
RETURN

LCDbusyloop
movwf LCDtemp2
_LCDbusyloop
decfsz LCDtemp2,f
RETURN

CheckBusy
BANK1
movlw b'00001111'
BANK0


bcf LCD_EN
call LCDclk
goto _LCDbusy
BANK1
movlw b'11110000'
BANK0
RETURN

http://www.trash.net/~luethi/microchip/modules/source/m_lcdexbf.asm
;***************************************************************************
;
; ==================================
;
;
; is available
; V4.22e: Fixed high-speed timing issue in busy flag part
; (24.06.2004)
; Reads busy flag of LCD, minimum waittime,
; 4.00 - 20.00 MHz clock
; ( => see macro LCDspecialChars )
;
;
;
;
; SPECIFICATIONS:
; ===============
; (MSB D7-D4)
http://www.trash.net/~luethi/microchip/modules/source/m_lcdexbf.asm (1 of 11)12/02/2008 17:12:52


; Total: 10 wires
;
;
; ========================
; macro LCD_CGAdr
;
;
; DESCRIPTION:
; ============
; line change.
;
;
; "LCDinit" (macro)
;
;
;
; ==========================

;
;
;
; ====================================
;
; LCDport equ PORTA
;
;
; REQUIRED MEMORY:
; ================
; needs itself 3 stack levels
;
;***************************************************************************
IFNDEF M_BANK_ID
ENDIF
IFNDEF M_WAIT_ID

ENDIF

ENDIF
ENDIF
ENDIF
ENDIF
ENDIF
ENDIF
IFNDEF LCDport
ENDIF
IFNDEF LCDtris
ENDIF
IFNDEF LCD_EN
ENDIF
IFNDEF LCD_ENtris
ENDIF
IFNDEF LCD_RS
ENDIF
IFNDEF LCD_RStris
ENDIF
IFNDEF LCD_RW


ENDIF
IFNDEF LCD_RWtris
ENDIF
IFNDEF LCDbusy
ENDIF
IFNDEF LCDcflag
ENDIF

IFNDEF BASE
ENDIF




ELSE
ENDIF
;***** MACROS *****
LCDinit macro
BANK1
bcf LCD_RStris
bcf LCD_RWtris
andwf LCDtris,f
BANK0


call LCDxmit
call LCDclk


call LCDclk

IF LCDTYPE == 0x00
ELSE
IF LCDTYPE == 0x01
ELSE
ENDIF
ENDIF
endm

LCD_CGAdr 0x01
LCDchar b'00001000'
LCD_CGAdr 0x02
LCDchar b'00000100'
LCD_CGAdr 0x03
LCDchar b'00001010'
LCD_CGAdr 0x04
LCDchar b'00010001'
LCD_CGAdr 0x05
LCDchar b'00010001'
LCD_CGAdr 0x06
LCDchar b'00001110'
LCD_CGAdr 0x07

LCDchar b'00000000'

LCD_CGAdr 0x09
LCDchar b'00010001'
LCD_CGAdr 0x0A
LCDchar b'00010001'
LCD_CGAdr 0x0B
LCDchar b'00010001'
LCD_CGAdr 0x0C
LCDchar b'00010001'
LCD_CGAdr 0x0D
LCDchar b'00001010'
LCD_CGAdr 0x0E
LCDchar b'00011011'
LCD_CGAdr 0x0F
LCDchar b'00000000'

endm

movlw LCDarg
call LCDdata
endm

call LCDdata
endm

movlw LCDcommand
call LCDcomd
endm

IF (line_num == 1)
ELSE
IF (line_num == 2)
ELSE
IF (line_num == 3)


ELSE
IF (line_num == 4)
ELSE
ENDIF
ENDIF
ENDIF
ENDIF
endm

IF ((DDRamAddress > 0x67 && LCDTYPE == 0x0) || (DDRamAddress > 0x73 && LCDTYPE == 0x1))
ELSE
movlw value
call LCDcomd
ENDIF
endm

ELSE
movlw value
call LCDcomd
ENDIF
endm

endm

clrLCDport


RETURN

goto _LCD_wr

; send high nibble
swapf LCDtemp,w ; swap high and low nibble, store in w
call LCDclk
; send low nibble
call LCDclk
RETURN

nop ; insert 'nop'
ENDW
bcf LCD_EN
RETURN

LCDbusyloop
movwf LCDtemp2
_LCDbusyloop

decfsz LCDtemp2,f
RETURN

CheckBusy
BANK1
movlw b'00001111'
BANK0
bcf LCD_EN
call LCDclk
goto _LCDbusy
BANK1
movlw b'11110000'
BANK0
RETURN

http://www.trash.net/~luethi/microchip/modules/source/m_lcdv08.asm
;***************************************************************************
;
; BINARY to DECIMAL CONVERSION for LCD Display for PIC 16XXX V1.02
; ================================================================
;
;
; V1.02: Changed labels such as to be able to use both, m_lcdv08.asm
; and m_lcdv16.asm simultaneously (24.06.2004)
; V1.01: Replaced register with #define statement for flag
; (16.02.2003)
;
;
;
;
; SPECIFICATIONS:
; ===============
; Decimal Range: 0 - 255 unsigned
; Binary Range: 8 Bit unsigned
;
;
; DESCRIPTION:
; ============
; Developed and tested on PIC 16C84, but executeable on all PICs.
; Evaluates from 8 bit Binary Data in LO the equivalent
; decimal output for the LCD-Display. Preceeding zeros are
; not displayed.
;
; "LCDval_08", value in LO
;
http://www.trash.net/~luethi/microchip/modules/source/m_lcdv08.asm (1 of 4)12/02/2008 17:12:53

; LO is not altered or cleared during operation and is

; still valid after termination of this routine.
; During the whole routine, LO_TEMP, BCflag must NOT be used
; by other routines ! ========
; TEMP1 - TEMP2 can be used by the LCD routine during conversion
; (call of LCDw), because they will be re-defined again.
;
;
; DECLARATIONS needed in MAIN PROGRAM :
; =====================================
; CONSTANT BASE = 0x0C ; Base address of user file registers
; LO equ BASE+?
; LO_TEMP set BASE+?
; #define BCflag <reg_name>,0x00 ; blank checker for preceeding zeros
; ; <reg_name> can be any register, containing also
; ; other flags
;
;
; REQUIRED MEMORY:
; ================
; 2 registers: @ BASE+0 - BASE+1 (temporary registers)
; 2 registers: LO, LO_TEMP
; 1 flag: BCflag
; needs itself 2 stack levels, but LCDw needs some more
;
;***************************************************************************
IFNDEF M_LCD_ID
ERROR "Missing include file: m_lcd.asm or similar"
ENDIF
IFNDEF BASE
ERROR "ModuleError: Declare BASE (Base address of user file registers) in MAIN PROGRAM"
ENDIF
IFNDEF LO
ERROR "ModuleError: Declare LO in MAIN PROGRAM"
ENDIF
IFNDEF LO_TEMP
ERROR "ModuleError: Declare LO_TEMP in MAIN PROGRAM"

ENDIF
IFNDEF BCflag
ERROR "ModuleError: #define BCflag FLAGreg,0x05 (Blank checker) in MAIN PROGRAM"
ENDIF
; *** Universal Temporary Register ***

TEMP1 set BASE ; Counter
TEMP2 set BASE+1 ; Sub-LO
;***** MACROS *****
LCDval_08 macro
call LCDval08
endm
LCDval08
movfw LO
movwf LO_TEMP ; LO -> LO_TEMP
bcf BCflag ; blank checker for preceeding zeros
movlw d'100' ; check amount of 100s

movwf TEMP2 ; ==> Decimal Range 0 - 255 <=> 8 bit
call _VALcnv08 ; call conversion sub-routine
LCDw ; call LCD sub-routine with value stored in w

movwf TEMP2

movwf TEMP2
bsf BCflag ; remove blank checker in case of zero
RETURN
_VALcnv08
clrf TEMP1 ; counter
movfw TEMP2 ; decrement-value
_V08_1 subwf LO_TEMP,0 ; TEST: LO_TEMP-TEMP2 >= 0 ?

skpc ; skip, if true

goto _V08_LCD ; result negativ, exit
incf TEMP1,1 ; count
movfw TEMP2 ; decrement-value
subwf LO_TEMP,1 ; STORE: LO_TEMP = LO_TEMP - TEMP2
bsf BCflag ; invalidate flag
goto _V08_1 ; repeat
_V08_LCD
movlw '0' ; writes Number to LCD
addwf TEMP1,0 ; '0' is ascii offset, add counter
btfss BCflag ; check flag
movlw ' ' ; clear preceeding zeros
; return with data in w
RETURN

;***************************************************************************
;
; BINARY to DECIMAL CONVERSION for LCD-Display for PIC 16XXX V1.02
; ================================================================
;
;
; V1.02: Changed labels such as to be able to use both, m_lcdv08.asm
; and m_lcdv16.asm simultaneously (24.06.2004)
; V1.01: Replaced register with #define statement for flag
; (16.02.2003)
;
;
;
;
; SPECIFICATIONS:
; ===============
; Decimal Range: 0 - 65'535 unsigned
; Binary Range: 16 Bit unsigned
;
;
; DESCRIPTION:
; ============
; Developed and tested on PIC 16C84, but executeable on all PICs.
; Evaluates from 16 bit Binary Data in HI,LO the equivalent
; decimal output for the LCD-Display. Preceeding zeros are
; not displayed.
;
; "LCDval_16", value in HI & LO
;

; LO & HI are NOT altered or cleared during operation and are

; During the whole routine, LO_TEMP, HI_TEMP & BCflag must NOT
; be used by other routines ! ========
; TEMP1 - TEMP3 can be used by the LCD routine during conversion
; (call of LCDw), because they will be re-defined again.
;
;
; =====================================
; LO equ BASE+?
; HI equ BASE+?
; LO_TEMP set BASE+?
; HI_TEMP set BASE+?
; #define BCflag <reg_name>,0x00 ; blank checker for preceeding zeros
; ; <reg_name> can be any register, containing also
; ; other flags
;
;
; REQUIRED MEMORY:
; ================
; 3 registers: @ BASE+0 - BASE+2 (temporary registers)
; 4 registers: LO, LO_TEMP, HI, HI_TEMP
; 1 flag: BCflag
; needs itself 2 stack levels, but LCDw needs some more
;
;***************************************************************************
IFNDEF M_LCD_ID
ENDIF
IFNDEF BASE
ERROR "ModuleError: Declare BASE (Base address of user file registers) in MAIN PROGRAM"
ENDIF
IFNDEF LO
ENDIF

IFNDEF HI
ERROR "ModuleError: Declare HI in MAIN PROGRAM"
ENDIF
IFNDEF LO_TEMP
ENDIF
IFNDEF HI_TEMP
ERROR "ModuleError: Declare HI_TEMP in MAIN PROGRAM"
ENDIF
IFNDEF BCflag
ERROR "ModuleError: #define BCflag FLAGreg,0x05 (Blank checker) in MAIN PROGRAM"
ENDIF
; *** Universal Temporary Register ***

TEMP1 set BASE+d'0' ; counter
TEMP2 set BASE+d'1' ; Sub-LO
TEMP3 set BASE+d'2' ; Sub-HI
;***** MACROS *****
LCDval_16 macro
call LCDval16
endm
LCDval16
movfw LO ; LO -> LO_TEMP
movwf LO_TEMP
movfw HI ; HI -> HI_TEMP
movwf HI_TEMP
bcf BCflag ; Blank checker for preceeding zeros
movlw b'00010000' ; check amount of 10000s

movwf TEMP2 ; Sub-LO
movlw b'00100111'
movwf TEMP3 ; Sub-HI

movlw b'00000011'

movwf TEMP3 ; Sub-HI


clrf TEMP3 ; Sub-HI is zero


bsf BCflag ; remove blank checker in case of zero
RETURN
_VALcnv16
clrf TEMP1 ; clear counter
_V16_1 movfw TEMP3
subwf HI_TEMP,w ; TEST: HI_TEMP-TEMP3 >= 0 ?
bnz _V16_2 ; test zero, jump if result > 0
movfw TEMP2 ; Precondition: HI-TEST is zero
subwf LO_TEMP,w ; TEST: LO_TEMP-TEMP2 >= 0 ?
_V16_2
movfw TEMP3
subwf HI_TEMP,f ; STORE: HI_TEMP = HI_TEMP - TEMP3
movfw TEMP2
subwf LO_TEMP,f ; STORE: LO_TEMP = LO_TEMP - TEMP2
decf HI_TEMP,f ; decrement HI
incf TEMP1,f ; increment counter

bsf BCflag ; invalidate flag

goto _V16_1
_V16_LCD
movlw '0' ; writes number to LCD
addwf TEMP1,w ; '0' is ascii offset, add counter
btfss BCflag ; check flag
movlw ' ' ; clear preceeding zeros
; return with data in w
RETURN

http://www.trash.net/~luethi/microchip/modules/source/m_lcdb08.asm
;***************************************************************************
;
; 8 Bit Binary Output on LCD Display for PIC 16XXX
; ================================================
;
;
;
;
;
;
; SPECIFICATIONS:
; ===============
; Binary Range: 8 Bit
;
;
; DESCRIPTION:
; ============
; Developed on PIC 16C84, but executeable on all PIC 16XXX.
; Displays the 8 bit binary value stored in LO on the
; LCD display in binary format.
; This routine is only used for debugging registers and bit-
; streams.
;
;
; NOTE:
; =====
; "LCDbin_08", value in LO
;
; LO is not altered or cleared during operation and is
http://www.trash.net/~luethi/microchip/modules/source/m_lcdb08.asm (1 of 3)12/02/2008 17:12:54


; During the whole routine, LO_TEMP and b08_cnt must NOT be
; used by other routines ! ========
;
;
; =====================================
; b08_cnt equ BASE+? ; counter
; LO equ BASE+?
; LO_TEMP equ BASE+?
;
;
; REQUIRED MEMORY:
; ================
; 3 registers declared in main program.
; needs itself 1 stack level, but LCDw needs some more
;
;***************************************************************************
IFNDEF M_LCD_ID
ENDIF
IFNDEF b08_cnt
ERROR "ModuleError: Declare b08_cnt in MAIN PROGRAM"
ENDIF
IFNDEF LO
ENDIF
IFNDEF LO_TEMP
ENDIF
;***** MACROS *****
LCDbin_08 macro
call LCDbin08
endm

LCDbin08
movfw LO
movwf LO_TEMP
movlw d'8'
movwf b08_cnt
bin_loop08
movlw '0'
btfsc LO_TEMP,7 ; check if bit is set, skip if cleared
movlw '1'
LCDw ; call LCD sub-routine with data stored in w
rlf LO_TEMP,1
decfsz b08_cnt,1
goto bin_loop08
RETURN

;***************************************************************************
;
; 16 Bit Binary Output on LCD Display for PIC 16XXX
; =================================================
;
;
;
;
;
;
; SPECIFICATIONS:
; ===============
; Binary Range: 16 Bit
;
;
; DESCRIPTION:
; ============
; Displays the 16 bit binary value stored in HI & LO on the
; LCD display in binary format (consecutive order).
; This routine is only used for debugging registers and bit-
; streams.
;
;
; NOTE:
; =====
; "LCDbin_16", value in HI & LO
;
; HI & LO are not altered or cleared during operation and are


; During the whole routine, LO_TEMP, HI_TEMP and b16_cnt must NOT
; be used by other routines ! ========
;
;
; =====================================
; b16_cnt equ BASE+? ; counter
; LO equ BASE+?
; LO_TEMP equ BASE+?
; HI equ BASE+?
; HI_TEMP equ BASE+? ; is only used for flag bit
;
;
; REQUIRED MEMORY:
; ================
; 5 registers declared in main program.
; needs itself 1 stack level, but LCDw needs some more
;
;***************************************************************************
IFNDEF M_LCD_ID
ENDIF
IFNDEF b16_cnt
ERROR "ModuleError: Declare b16_cnt in MAIN PROGRAM"
ENDIF
IFNDEF LO
ENDIF
IFNDEF LO_TEMP
ENDIF
IFNDEF HI
ERROR "ModuleError: Declare HI in MAIN PROGRAM"
ENDIF
IFNDEF HI_TEMP

ERROR "ModuleError: Declare HI_TEMP in MAIN PROGRAM"

ENDIF
;***** MACROS *****
LCDbin_16 macro
call LCDbin16
endm
LCDbin16
bsf HI_TEMP,0 ; set flag for first run with HI
movfw HI ; upper 8 bit to display = HI
bin_16 movwf LO_TEMP
movlw d'8'
movwf b16_cnt
bin_loop16
movlw '0'
btfsc LO_TEMP,7 ; check if bit is set, skip if cleared
movlw '1'
LCDw ; call LCD sub-routine with data stored in w
rlf LO_TEMP,1
decfsz b16_cnt,1
goto bin_loop16
btfss HI_TEMP,0 ; check flag, skip if set

RETURN
bcf HI_TEMP,0 ; clear flag: second run with LO
movfw LO ; lower 8 bit to display = LO
goto bin_16 ; re-enter for the second run

http://www.trash.net/~luethi/microchip/modules/source/m_rs024.asm
;***************************************************************************
;
; RS232 Software Interface for PIC 16XXX
; ======================================
;
;
; V1.02: Changed error handling to dedicated ISR termination label
; _ISR_RS232error required at the end of the ISR
; (11.04.2004)
; V1.01: Clean-up and improvements (30.12.2000)
;
;
;
;
; SPECIFICATIONS:
; ===============
; Processor: Microchip PIC 16F84
; Serial Rate: 2400 baud, 8 bit, no parity, 1 stopbit
; Required Hardware: RS232 level shifter (MAX232)
;
;
; DESCRIPTION:
; ============
; Developed and tested on PIC 16F84, executeable on all interrupt
; featured PICs.
; Program handles all aspects of
; Reception (Register RXD) through interrupt.
;
http://www.trash.net/~luethi/microchip/modules/source/m_rs024.asm (1 of 7)12/02/2008 17:12:55

; Waitcycle for 2400 baud ==> 416 us each bit

;
; "RS232init" Initialization
; "SEND 'c'" sends character 'c'
; "SENDw" sends content of working register
; "RECEIVE" macro in ISR: receive from RS232, store in RXD
;
;
; ====================================
; ORG 0x00 ; processor reset vector
; goto MAIN ; main program
;
; ORG 0x04 ; interrupt vector
; goto ISR ; Interrupt Service Routine (ISR)
;
; CONSTANT BASE = 0x0C ; base address of user file registers
; TXD equ BASE+? ; TX-Data register
; RXD equ BASE+? ; RX-Data register
;
; #define TXport PORTA,0x00 ; RS232 output port, could be
; #define TXtris TRISA,0x00 ; any active push/pull port
; ; RS232 input port is RB0, because of its own interrupt flag
;
; Example code snippet of main program:
; -------------------------------------
; FLAGreg equ BASE+d'7'
; #define RSflag FLAGreg,0x00 ; RS232 data reception flag
;
; RSservice ; RS232 service sub-routine
; movfw RXD ; get received RS232 data
; <do whatever you want...>
; bcf RSflag ; reset RS232 data reception flag
; bsf INTCON,INTE ; re-enable RB0/INT interrupt
; RETURN
;
; MAIN RS232init ; RS232 Initialization
; clrf FLAGreg ; initialize all flags
;
; LOOP btfsc RSflag ; check RS232 data reception flag
; call RSservice ; if set, call RS232 echo & LCD display routine
; goto LOOP

;
; END
;
; Example code snippet of ISR (to be implemented in main program):
; ----------------------------------------------------------------
; ;***** INTERRUPT SERVICE ROUTINE *****
; ISR <... context save ...>
;
; ;*** determine origin of interrupt ***
; btfsc INTCON,INTF ; check for RB0/INT interrupt
; goto _ISR_RS232 ; if set, there was a keypad stroke
;
; <... check other sources, if any ...>
;
; ; catch-all
; goto ISRend ; unexpected IRQ, terminate execution of ISR
;
; ;*** RS232 DATA ACQUISITION ***
; _ISR_RS232
; ; first, disable interrupt source
; bcf INTCON,INTE ; disable RB0/INT interrupt
; ; second, acquire RS232 data
; RECEIVE ; macro of RS232 software reception
; bsf RSflag ; enable RS232 data reception flag
; goto _ISR_RS232end ; terminate RS232 ISR properly
;
; <... other ISR sources' handling section ...>
;
; ;*** ISR Termination ***
; ; NOTE: Below, I only clear the interrupt flags! This does not
; ; necessarily mean, that the interrupts are already re-enabled.
; ; Basically, interrupt re-enabling is carried out at the end of
; ; the corresponding service routine in normal operation mode.
; ; The flag responsible for the current ISR call has to be cleared
; ; to prevent recursive ISR calls. Other interrupt flags, activated
; ; during execution of this ISR, will immediately be served upon
; ; termination of the current ISR run.
; _ISR_RS232error
; bsf INTCON,INTE ; after error, re-enable IRQ already here
; _ISR_RS232end
; bcf INTCON,INTF ; clear RB0/INT interrupt flag
; goto ISRend ; terminate execution of ISR
;

; <... other ISR sources' termination ...>

;
; ISRend <... context restore ...> ; general ISR context restore
; RETFIE ; enable INTCON,GIE
;
;
; REQUIRED MEMORY:
; ================
;
;***************************************************************************
IFNDEF M_BANK_ID
ENDIF
IFNDEF TXport
ERROR "Define TXport in MAIN PROGRAM."
ENDIF
IFNDEF TXtris
ERROR "Define TXtris in MAIN PROGRAM."
ENDIF
MESSG "Default RS232 RXport is PORTB,0x00."
#define RXport PORTB,0x00 ; Needs to be an interrupt supervised

#define RXtris TRISB,0x00 ; port! When modify, set adequate
; flags in INTCON register.
CONSTANT LF = d'10' ; Line Feed

CONSTANT CR = d'13' ; Carriage Return
CONSTANT TAB = d'9' ; Tabulator
CONSTANT BS = d'8' ; Backspace
IFNDEF BASE

ENDIF
TEMP1 set BASE+d'0' ; universal temporary register

TEMP2 set BASE+d'1'
IFNDEF TXD
ERROR "Declare TXD register in MAIN PROGRAM"
ENDIF
IFNDEF RXD
ERROR "Declare RXD register in MAIN PROGRAM"
ENDIF
;***** MACROS *****
RS232init macro
BANK1
bcf TXtris ; set output
bsf RXtris ; set input with weak pull-up
bcf OPTION_REG,INTEDG ; RS232 interrupt on falling edge
BANK0
bsf TXport ; set default state: logical 1
bcf INTCON,INTF ; ensure interrupt flag is cleared
bsf INTCON,INTE ; enable RB0/INT interrupt
bsf INTCON,GIE ; enable global interrupt
endm
SEND macro S_string ; "SEND 'X'" sends character to RS232

movlw S_string
call SENDsub
endm
SENDw macro
call SENDsub
endm
RECEIVE macro
call SB_Wait ; first wait sub-routine
btfsc RXport
goto _RSerror ; no valid start bit
movlw 0x08
movwf TEMP1 ; number of bits to receive, 9600-8-N-1
_RECa call T_Wait ; inter-baud wait sub-routine

btfsc RXport
bsf RXD,0x07
btfss RXport
bcf RXD,0x07
decfsz TEMP1,w ; skip if TEMP1 == 1
rrf RXD,f ; do this only 7 times
decfsz TEMP1,f
goto _RECa
call T_Wait ; inter-baud wait sub-routine
btfss RXport ; check if stop bit is valid
goto _RSerror ; no valid stop bit
endm
SENDsub movwf TXD ; store in data register

bcf TXport ; start bit
movlw 0x08
movwf TEMP1 ; number of bits to send, 9600-8-N-1
call T_Wait
_SENDa btfsc TXD,0x00 ; send LSB first !
bsf TXport
btfss TXD,0x00
bcf TXport
rrf TXD,f
call T_Wait
decfsz TEMP1,f
goto _SENDa
bsf TXport ; stop bit
call T_Wait
call T_Wait ; due to re-synchronization
RETURN
T_Wait movlw 0x86 ; FOR TRANSMISSION & RECEPTION

movwf TEMP2 ; total wait cycle until next
goto X_Wait ; bit: 2400 baud ==> 416 us
;*** When entering this subroutine, ISR context restore has already consumed some cycles ***
SB_Wait movlw 0x3C ; FOR RECEPTION of start bit
movwf TEMP2 ; total wait cycle : 208 us
goto X_Wait ; (=> sampling in the center of each bit)
X_Wait decfsz TEMP2,1 ; LOOP

goto X_Wait
RETURN
_RSerror clrf RXD ; invalid data

goto _ISR_RS232error ; goto RS232 error handling in ISR

;***************************************************************************
;
; ======================================
;
;
; (11.04.2004)
;
;
;
;
; SPECIFICATIONS:
; ===============
;
;
; DESCRIPTION:
; ============
; featured PICs.
;


;
; "SEND 'c'" send character
; "SENDw" send content of working register
;
;
; ====================================
;
;
;
;
; -------------------------------------
;
; RETURN
;
;
; goto LOOP

;
; END
;
; ----------------------------------------------------------------
;
;
;
; ; catch-all
;
; _ISR_RS232
;
;
; _ISR_RS232error
; _ISR_RS232end
;


;
;
;
; REQUIRED MEMORY:
; ================
;
;***************************************************************************
IFNDEF M_BANK_ID
ENDIF
IFNDEF TXport
ENDIF
IFNDEF TXtris
ENDIF


IFNDEF BASE

ENDIF

TEMP2 set BASE+d'1'
IFNDEF TXD
ENDIF
IFNDEF RXD
ENDIF
;***** MACROS *****
RS232init macro
BANK1
BANK0
endm

movlw S_string
call SENDsub
endm
SENDw macro
call SENDsub
endm
RECEIVE macro
btfsc RXport
movlw 0x08

btfsc RXport
bsf RXD,0x07
btfss RXport
bcf RXD,0x07
decfsz TEMP1,f
goto _RECa
endm

movlw 0x08
call T_Wait
bsf TXport
btfss TXD,0x00
bcf TXport
rrf TXD,f
call T_Wait
decfsz TEMP1,f
goto _SENDa
call T_Wait
RETURN
T_Wait movlw 0x41 ; FOR TRANSMISSION & RECEPTION

SB_Wait movlw 0x18 ; FOR RECEPTION of start bit
X_Wait decfsz TEMP2,1 ; LOOP

goto X_Wait
RETURN


;***************************************************************************
;
; ======================================
;
;
; (11.04.2004)
;
;
;
;
; SPECIFICATIONS:
; ===============
;
;
; DESCRIPTION:
; ============
; featured PICs.
;


;
;
;
; ====================================
;
;
;
;
; -------------------------------------
;
; RETURN
;
;
; goto LOOP

;
; END
;
; ----------------------------------------------------------------
;
;
;
; ; catch-all
;
; _ISR_RS232
;
;
; _ISR_RS232error
; _ISR_RS232end
;


;
;
;
; REQUIRED MEMORY:
; ================
;
;***************************************************************************
IFNDEF M_BANK_ID
ENDIF
IFNDEF TXport
ENDIF
IFNDEF TXtris
ENDIF


IFNDEF BASE

ENDIF

TEMP2 set BASE+d'1'
IFNDEF TXD
ENDIF
IFNDEF RXD
ENDIF
;***** MACROS *****
RS232init macro
BANK1
BANK0
endm

movlw S_string
call SENDsub
endm
SENDw macro
call SENDsub
endm
RECEIVE macro
btfsc RXport
movlw 0x08

btfsc RXport
bsf RXD,0x07
btfss RXport
bcf RXD,0x07
decfsz TEMP1,f
goto _RECa
endm

movlw 0x08
call T_Wait
bsf TXport
btfss TXD,0x00
bcf TXport
rrf TXD,f
call T_Wait
decfsz TEMP1,f
goto _SENDa
call T_Wait
RETURN
T_Wait movlw 0x1D ; FOR TRANSMISSION & RECEPTION

movwf TEMP2 ; total wait cycle: 52 us
X_Wait decfsz TEMP2,f ; WAIT LOOP

goto X_Wait
RETURN


;***************************************************************************
;
; ======================================
;
;
; (11.04.2004)
;
;
;
;
; SPECIFICATIONS:
; ===============
;
;
; DESCRIPTION:
; ============
; featured PICs.
;


;
;
;
; ====================================
;
;
;
;
; -------------------------------------
;
; RETURN
;
;
; goto LOOP

;
; END
;
; ----------------------------------------------------------------
;
;
;
; ; catch-all
;
; _ISR_RS232
;
;
; _ISR_RS232error
; _ISR_RS232end
;


;
;
;
; REQUIRED MEMORY:
; ================
;
;***************************************************************************
IFNDEF M_BANK_ID
ENDIF
IFNDEF TXport
ENDIF
IFNDEF TXtris
ENDIF


IFNDEF BASE

ENDIF

TEMP2 set BASE+d'1'
IFNDEF TXD
ENDIF
IFNDEF RXD
ENDIF
;***** MACROS *****
RS232init macro
BANK1
BANK0
endm

movlw S_string
call SENDsub
endm
SENDw macro
call SENDsub
endm
RECEIVE macro
btfsc RXport
movlw 0x08

btfsc RXport
bsf RXD,0x07
btfss RXport
bcf RXD,0x07
decfsz TEMP1,f
goto _RECa
endm

movlw 0x08
call T_Wait
bsf TXport
btfss TXD,0x00
bcf TXport
rrf TXD,f
call T_Wait
decfsz TEMP1,f
goto _SENDa
call T_Wait
RETURN
T_Wait movlw 0x0C ; FOR TRANSMISSION & RECEPTION

X_Wait decfsz TEMP2,1 ; WAIT LOOP

goto X_Wait
RETURN


http://www.trash.net/~luethi/microchip/modules/source/m_rs7n1.asm
;***************************************************************************
;
; ======================================
;
;
; (11.04.2004)
;
;
;
;
; SPECIFICATIONS:
; ===============
; Required Hardware: MAX 232
;
;
; DESCRIPTION:
; ============
; featured PICs.
;
http://www.trash.net/~luethi/microchip/modules/source/m_rs7n1.asm (1 of 7)12/02/2008 17:12:57


;
; "SEND 'c'" send character
; "SENDw" send content of working register
;
;
; ====================================
;
;
;
;
; -------------------------------------
;
; RETURN
;
;
; goto LOOP

;
; END
;
; ----------------------------------------------------------------
;
;
;
; ; catch-all
;
; _ISR_RS232
;
;
; _ISR_RS232error
; _ISR_RS232end
;


;
;
;
; REQUIRED MEMORY:
; ================
;
;***************************************************************************
IFNDEF M_BANK_ID
ENDIF
IFNDEF TXport
ENDIF
IFNDEF TXtris
ENDIF


IFNDEF BASE

ENDIF

TEMP2 set BASE+d'1'
IFNDEF TXD
ENDIF
IFNDEF RXD
ENDIF
;***** MACROS *****
RS232init macro
BANK1
BANK0
endm

movlw S_string
call SENDsub
endm
SENDw macro
call SENDsub
endm
RECEIVE macro
btfsc RXport
movlw 0x07

btfsc RXport
bsf RXD,0x07
btfss RXport
bcf RXD,0x07
rrf RXD,f ; do this 7 times
decfsz TEMP1,f
goto _RECa
bcf RXD,0x07 ; clear MSB since only 7 bits arrived
endm

movlw 0x07
call T_Wait
bsf TXport
btfss TXD,0x00
bcf TXport
rrf TXD,f
call T_Wait
decfsz TEMP1,f
goto _SENDa
call T_Wait
RETURN
T_Wait movlw 0x1D ; FOR TRANSMISSION & RECEPTION

movwf TEMP2 ; total wait cycle: 52 us
X_Wait decfsz TEMP2,f ; WAIT LOOP

goto X_Wait
RETURN


Automatic Table Generator for MPLAB Assembler with Excel 97
Automatic Table Generator

Excel 97 work sheet for MPLAB Assembler
Concept
Available resources
Concept [Toc] [Top]
http://www.trash.net/~luethi/microchip/software/tablegenerator.html (1 of 2)12/02/2008 17:12:58

Automatic Table Generator for MPLAB Assembler with Excel 97
This Excel Worksheet has been designed to speed-up the implementation of 16 bit assembler look-up tables.
There are the following advantages:
Visualization of table data.

Quick changes on table data possible.
Data exchange with standard data format.
Easy adaptable for project specific requirements.
The Worksheet activates a Visual Basic macro, which fetchs the hexadecimal blocks from the table.
The "Analyse-Function" Excel Add-In needs to be switched on to calculate the 8 bit hexadecimal blocks from the
decimal values.
The software has been tested under Windows 95 and Excel 97 on a Pentium 166.
The assembler source code, which shows the implementation of the table read is available under :
projects / 16 bit table read.
Available Resources [Toc] [Top]
Item Size File
Automatic Table Generator (Excel 97 Worksheet) 20 kB TableGenerator.zip
[Toc] [Top]

click here
http://www.trash.net/~luethi/microchip/software/tablegenerator.html (2 of 2)12/02/2008 17:12:58

how to build a teleclub decoder
Teleclub-Decoder
Update August 2002: Teleclub wird digital! Wirklich? In vielen Gemeinden ist der Teleclub weiterhin analog zu
empfangen. Hier kann dieser Decoder immernoch funktionieren!
Update Mai 2000: Bestellnummern berprft und angepasst. Der Decoder luft auch im sterreichischen Wien fr den
Sender TELEKINO!
ACHTUNG: Der Nachbau und Betrieb dieser Schaltung zum Empfangen von "Teleclub" ist verboten!
Die hier zu findenden Informationen sind ausschliesslich zur Information und Weiterbildung gedacht!
Sie arbeiten fr Teleclub? Dann hier klicken!
Inhalt:
Luft der Decoder bei mir berhaupt?
Layout
Bestckungsplan
Schema
Stckliste
Bauanleitung
Abgleichanleitung
FAQ
Links zum Thema
http://www.goldfuss.de/deceed/index.html (1 of 5)12/02/2008 17:13:00

Layout:
zurck...
download, anzeigen
Bestckungsplan:
zurck...
download, anzeigen

Schema:
zurck...
Fr die technisch interessierten Leute hier das genaue Schema des Decoders. Zum Anschauen am Bildschirm oder zum
downloaden und ausdrucken...
Stckliste:
zurck...
Anzahl Pos. Bezeichnung Wert Lieferant Preis

2 R1, R6 Widerstand 100k Distrelec 71 41 48 -.08
1 R2 Widerstand 10k Distrelec 71 41 15 -.08
1 R7 Widerstand 6.2k Distrelec 71 41 10 -.08
1 R8 Widerstand 22k Distrelec71 41 32 -.08
1 R9 Widerstand 47 Distrelec71 40 49 -.08
1 C1 Drehkondensator 1.6p - 15p Conrad 48 30 28-11 1.35
1 C2 Kondensator 1000p Distrelec 82 05 80 -.25
3 C3, C4, C7 Kondensator 100p Distrelec 82 05 74 -.45
2 C5, C8 Kondensator 2200p Distrelec 82 05 82 -.30
1 C6 Kondensator 68p Distrelec 83 13 24 -.20
1 IC1 Dual Monoflop 4538 Distrelec 64 21 03 -.90
1 IC2 Hex-Inverter 4069 Distrelec 64 60 45 1.40
5 D1 - D5 Diode 1N4148 Distrelec 60 30 16 -.20
2 P1, P3 Potentiometer 25k Distrelec 74 01 08 1.10
1 P2 Potentiometer 10k Distrelec 74 01 07 1.10
1 P4 Potentiometer 100k Distrelec 74 01 10 1.10
1 P5 Potentiometer 2M (2.5M) *Distrelec 74 22 30 2.50
1 P6 Potentiometer 100 *Distrelec 74 22 08 2.50
*=Ersatztypen. Die ursprnglich von mir verwendeten Bauteile sind leider nicht mehr von mir erhltlich.
Das sind die Bauteile die unbedingt bentigt werden. Wer den Decoder mit Batterie betreiben will oder schon ein Netzteil besitzt,
und wer die Antennenkabel direkt auf den Print lten will, kann sich damit einen fertigen, perfekt funktionierenden Decoder
bauen. Fr alle die etwas hhere Ansprche haben, hier noch einige Bauteile fr die "Luxus-Ausfhrung"...
Anz. Pos. Bauteil Wert Lieferant Preis

1 X1 Antennenbuchse Conrad 73 97 15-11 1.70
1 X2 Antennenstecker Conrad 73 96 85-11 1.70

1 X3 SCART-Stecker Conrad 74 17 87-11 2.50

1 S1 Schalter Distrelec 20 20 70 2.00
1 HF Gehuse 105x25x49 Conrad 52 16 39-11 13.95
z.B.: Distrelec 92 00 27 19.00
1 Steckernetzgert 9V
oder: Distrelec 92 06 10 14.60
Bauanleitung:
zurck...
1. Layout, Bestckungsplan und Stckliste am Besten gleich ausdrucken.

2. Leiterplatte mit Layout herstellen. (siehe FAQ)
3. Lcher fr Bauteile bohren. (0.8mm, Lcher fr Potis 1.3mm)
4. Bauteile bestcken und einlten.
5. Notwendige Drahtbrcken (orange eingezeichnet) nicht vergessen!
6. Scart- und Antennenstecker anschliessen.
7. Speisung anschliessen. (ca. 6-12V)
8. Decoder nach Abgleichanleitung einstellen.
Abgleichanleitung:
zurck...
Der Abgleich erfordert einiges an Gedult. Also nicht gleich aufgeben bevor man nicht mindestens 20min an den Potis
herumgeschraub hat. Grundstzlich lsst sich sagen: Wenn sich das Bild eines uncodierten Senders durch Einschalten des
Decoders irgendwie verndert, dann funktioniert er auch.
1. Decoder in die Antennenleitung des Fernsehers oder Videos schalten. Scart Strecker anschliessen. (WICHTIG: Scart- und
Antennenstecker mssen am selben Gert angeschlosen werden!)
2. Potentiometer wie folgt einstellen: P1 ganz nach rechts, P2 in Mittelstellung, P3 Mittelstellung, P4 ganz nach rechts, P5 ganz
nach links, P6 ganz nach links, C1 auf maximale Kapazitt.
Die Stellungen "links" und "rechts" bei den stehend montierten Potentiometern sind wie folgt definiert:
Die Potentiometer P5, P6 und P3 knnen normalerweise in dieser Stellung belassen werden. Fr die Einstellung des Decoders
sind vorallem P1, P2 und P4 von Bedeutung.
3. Einen uncodierten Sender einstellen. Solange der Decoder ausgeschalten ist, sollte das Bild absolub normal erscheinen. Sobald

der Decoder aber eingeschalten wird, erscheinen helle, horizontale Streifen und das Bild ist unruhig.
4. Bild mit P2 stabilisieren. Die Streifen bleiben, das Bild sollte aber ruhiger werden.
5. P1 langsam nach links drehen, bis die Streifen pltzlich verschwinden und das Bild gleichmssig hell erscheint.
6. Auf Teleclub umschalten. P4 langsam nach links drehen bis das decodierte Bild erscheint.
7. Eventuell P2 etwas nachstellen um die Bildqualitt zu verbessern.
8. Mit P4 kann die horizontale Position des Bildes so eingestellt werden, dass keine flimmernden Kanten an den Bildrndern
links und rechts zu sehen sind.
9. Mit P5 knnen, falls vorhanden, Verzerrungen am oberen Bildrand ausgeglichen werden.
10. Mit C1 und P6 die Bildhelligkeit ev. etwas dunkler einstellen.
11. Je nach verwendetem Fernsehgert oder Videorecorder kann es sein dass der Eingangspegel des SCART-Signals mit P3
nachgestellt werden muss.
Nichts funktioniert? Oder sonstige Probleme mit dem Ablgeich? Vielleicht steht was im FAQ...
teleclub.html, last modified: 15.08.2002 zurck zu 'deceed's homeplace'

Electronic Circuits & Radio Controlled Modeling
Electronic
Circuits &
Radio Controlled
Modeling
Microchip PIC
Microcontrollers
PIC Assembler Projects

PIC Assembler Modules
Electronic Circuits
Student Projects
Data Sheets
R/C Modeling
Photo Gallery
Electronic Circuits
Servo Checker
http://www.electronic-engineering.ch/index.html12/02/2008 17:13:01
Guestbook of www.electronic-engineering.ch
Guestbook
Thank you for stopping by my website.

Please take a moment and sign the guestbook.
The following e-mail addresses may not be abused by spam!

Entries to increase Google ranking by adding URL and senseless comment will be erased.
Tuesday, 12th February 2008, 14:03 R/C & Electronics

Great... You know, it's very great to see your web site. I really want to use keyboard as the input of PIC.
Now I see what to do. It's very interesting..... Thanks a lot
Sai Seng Lynn Pyin Oo Lwin Myanmar no URL given
Tuesday, 12th February 2008, 07:52 Electronics

Nice web site, and many usefull contents
Salah Algiers Algeria no URL given
Monday, 11th February 2008, 17:36 Electronics

Zrya ti tak webmaster@excellservices.com zrya ti tak
Ahz Texas USA http://goglya.com/
Thursday, 29th November 2007, 22:28 Electronics

Nice site, great to see you spending time to write about your experiences. It is a great help to others. Thanks.
D Cummings UK no URL given
Monday, 26th November 2007, 09:08 Electronics

Nice!!
Xaivier Chia Johor Malaysia no URL given
http://www.electronic-engineering.ch/guestbook/guestbook.html (1 of 29)12/02/2008 17:13:06

Wednesday, 21st November 2007, 10:37 Electronics

Please help me convert the .asm code for the LCD to Basic codes because I'm using the PIC Basic Pro
Compiler to program PIC16F877A. Please send it by email at ria_river@yahoo.com. Thank you.
Ria Gudito Bohol Philippines no URL given
Wednesday, 31st October 2007, 18:58 Electronics

Muito bom, com circuitos elaborados com o PIC 16F que jamais pensei que podia existir, tal como: Teclado
AT com LCD
Jos Carlos Santa
Cruz Braslia Brasil no URL given
Monday, 24th September 2007, 06:51 Electronics

Good site.
Gaiya Memphis USA no URL given
Friday, 17th August 2007, 03:54 R/C Modeling

Hello, I'm a man try to be a engineerer just like you. You are my role model. I'm a student, and 16 years old.
My hobby is assembly programming. I want you never shut down this site until I can overcome you. You
give me the future I want to be. Thanks very much! Danke shun(?). Anyway thanks very much, teacher!!!
Ghil Seoul Korea, South no URL given
Sunday, 5th August 2007, 16:24 Electronics

Is it possible to build a PIC Micro controller to command a radio to do a self test and then receive and
display the test result at the controller via RS 232?
John Seah Singapore Singapore no URL given
Thursday, 14th June 2007, 20:31 Electronics

Hi, I liked much your web site. I think, it is full of data about PIC. Thanks a lot for this work...
Mresat Konya Turkey http://www.pic-proje.page.tl

Friday, 30th March 2007, 08:48 Electronics

How should I start with the initialization process incase of interfacing LCD GDM160 1C with the PIC
16F84A? Thanks.
Debabrata Bhaskar Haldia India no URL given
Friday, 23rd March 2007, 11:42 Electronics

Hi, On the section about making a peripheral set-up using a keyboard and LCD; what do the .hex files do in
the project resources section? Many Thanks
Tom Birmingham no URL given
Friday, 23rd February 2007, 12:33 Just came over

Excuses my English. it is really an interesting site for the one who programs pic microcontroller if you want
you can insert the site of picforge (pic basic compiler) it is free hi
Gabriele Milano Italy http://picforge.interfree.it
Tuesday, 30th January 2007, 15:01 Electronics

I'm highly impressed by your records and the many works you've done. Your model plane project and your
biodata are great inspiration to me. I once built an LED moving character display using digital logic ics,
EEPROM, and Qbasic program. Now, i have rebuilt it with PIC16F84 and a self made PIC programmer.
(thanks to the internet). You've inspired me. I must do more. THANK YOU
Kayode Olagunju Lagos Nigeria no URL given
Tuesday, 23rd January 2007, 14:09 Electronics

It worked direct, great, but i need Timer0 for a other application. Can we deal with the delay's in a other way.
Harry H. Arends Netherlands http://www.harry-arends.nl
Saturday, 16th December 2006, 16:31 Electronics

Congratulations, I have never seen a web page like this where you can find a lot of projects and they work.
Luck Diego.
Diego Bernal Argentina no URL given

Tuesday, 14th November 2006, 06:51 R/C & Electronics

Great site! I didn't even hear about RC modelling before coming to this site. The site triggers a lot of
inspiration and a lot of help. Good luck to all those fellows maintaining this site.
J. Gab Cochin India no URL given
Tuesday, 10th October 2006, 15:48 Just came over

Great site for electronic engineers! You have done a great job! Keep it continue men...
Sharad P.
Bhadouria Indore India no URL given
Saturday, 30th September 2006, 22:07 R/C Modeling

Dear Sir, finay i found wat i am looking for, the size of the Nomad that you are, ore made. Sinds 10 years i
am looking there for, i got the plan of the GAF factory on A4 paper from the serie of the flying dockters and
finaly i found the plan in FMT but a size off 1,50 meter span, can you please help me on a plan your size
plan off the NOMAD N22 I am retierd now so i have got the time to build it. Thank you very mutch. Sorry
for my English.
Jo Van Weert Sint Oedenrode Netherlands no URL given
Tuesday, 26th September 2006, 21:55 R/C & Electronics

Nice page! The models gallery is amazing! Can't wait until I start a project of mine.
Ncolas C.
Lebedenco Rio de Janeiro Brazil no URL given
Tuesday, 26th September 2006, 21:46 Electronics

Hello brothers!! Your website is very intersting, and itve helped me a lot.Im working on a CPU project,
using 16F88, and I need use a AT keyboard.So Im starting test your keyboard routines.I hope those ones
work propely on my project. Be sure that your name will be noticed, and Ill indicate your website as
reference for microcontrollers profesional and hobbyst desings. Bye!!!
Genival Santos
Filho Rio de Janeiro Brasil no URL given
Sunday, 7th May 2006, 11:07 Electronics

Hallo peter jan, 17 juni a.s is er op vliegbasis leeuwarden de jaarlijkse open dag van de kon. luchtmacht. er
komen alle bekende stuntteams van de navo, vooral de blue angels uit de usa zijn bijzonder zij zullen
eenmalig in europa optreden. het volledige programma vind je op google :kon.luchtmacht, open dagen 2006.
belangstelling?? groeten uit nijverdal.
Hans Voortman Nijverdal Nederland no URL given
Monday, 6th March 2006, 10:29 R/C & Electronics

Hello all , anybody help me infor idea about firmwave in PIC, to simulate Windows Termial. I just want
load telephone number from PIC to modem by USART. In Windows, it is not problem, because we have
Windows Hyperterminal. But if the naked PIC, we must simulate this Hyperterminal in firmwave of PIC.
Please send me your advice to ilike_thursday@yahoo.com, TRI from Vietnam
Superwanderman Nha Trang Vietnam no URL given
Sunday, 5th March 2006, 15:45 Electronics

Well... thanks for the modules offered here. It has been a great help for me in my final year project. Well I
have a question to ask you: I am using the m_lcdv16.asm module and the counter.asm sample in my project.
My question is how can I modify the counter.asm file so that it stops counting at decimal 2000 times or
4000 times or 6000 times? Thank you if you can have a couple of minutes into my question. Thanks again.
Karkeong Yeoh Penang Malaysia no URL given

I search for friends which have the same aim and field.
Muhammad
Abassery Arafa Alexandria Egypt no URL given
Wednesday, 22nd February 2006, 11:55 R/C Modeling

Hello, I want to say that your page is great. I came to your Website when I was looking for pictures of the
GAF N22 Nomad. Ive seen your model and I like it. Ive got a smaller plan of this aircraft with a wingspan
of 1.50 meters, but its just semi scale. So the Rudders are a little bit bigger than in the original. So could
you send me your construction plans to my e-mail adress?
Thomas Pilot Cottbus Germany no URL given

Thanks for the oportunity to tell you what a great site this is. Many thanks, johneiderton@gmail.com
John Eiderton Nanjing China no URL given
Saturday, 11th February 2006, 00:45 Electronics

This is a great website!
Mike Smith Toledo USA no URL given
Friday, 10th February 2006, 01:28 Electronics

Great site, very comprehensive.... many thanks!
Bradley Macinnis Toronto Canada no URL given
Thursday, 9th February 2006, 17:42 R/C & Electronics

I would like if you can send me tips on the basics of microcontrollers programming especially on
PIC16F84A.
Mpuoane Alfred Bloemfontein South Africa http://www.webmail.co.za
Tuesday, 7th February 2006, 23:23 Just came over

Best regards to all of my engineering friends. Engineers are great!
Richard Nacamuli California USA no URL given
Saturday, 14th January 2006, 02:43 Electronics

Absolutely excellent site, thank you very much for your kindliness. Best wishes to you.
Apisart Chanpuang Bangkok Thailand no URL given
Sunday, 25th December 2005, 01:25 Electronics

I used your commtest1.hex file to make connecting between pc and pic but I couldn't succeed it. Anyway
your projects and studying are very nice. I am master student in Turkey and my thesis about "Control
System with Microcontroller without cable". In 15 days I have to finish my thesis but I have some problems
about projects. When I finish it I will go to Germany to apply Duisburg Uni for doctorate program. Nice site
really, take it easy...

Cem Kara stanbul Turkey no URL given
Thursday, 8th December 2005, 21:07 Electronics

Hello! My final year project is USB Radio, i.e. I need to play FM radio in computer and controlled (tunning
etc) from its application (software). I still in problem of the USB Controller what I should I use and how to
interface it in C#.NET as I suggested C#.NET in my proposal. Kindly can any one help me. Email me at
khurramkazim@gmail.com. Thanks.
Khurram Kazim Sindh Pakistan http://www.ssuet.edu.pk/~khurama
Wednesday, 23rd November 2005, 12:45 Electronics

Great site! Guyman
Yalah Guyman London England no URL given
Sunday, 11th September 2005, 09:42 Electronics

Great site! Very interesting.
Alan Winnipeg Canada http://www.alan-parekh.webhop.net
Friday, 5th August 2005, 22:10 Electronics

I am interested how is used graphic LCD, and I found that information on this site. But my display is 3x40
with no purshase on it. Where I can find that information? Thanks, Djordje
Djordje Herceg-Novi SCG no URL given
Sunday, 24th July 2005, 05:12 Electronics

Very impressed.
K.Thiru Petaling Jaya Malaysia no URL given
Friday, 22nd July 2005, 03:16 Electronics

Nice site, LCD displays have always been a problem for me, but you make it so simple, thanks.
Steve Burlington Canada no URL given

Tuesday, 19th July 2005, 12:40 R/C Modeling

Hi, I saw that cool n-22 model.I have the plans for it but i got only one part of the plans.:( I wanted to ask
you could someone mail me a link of plans for n-22. or mail me scanned plans.
Andrew Kaunas Lithuania no URL given
Monday, 11th July 2005, 09:59 R/C & Electronics

I am a neophyte in the field of pic micro... I would like to solicite your idea on how to use 4x7 dot matrix as
output for my pic project... my project is to build a road construction notice system. The project will
produce several pre programmed text such as.... road construction ahead,,,, detour,,,,bridge under
construction...and the like... i would appreciate any word from you then...
Vicente Y
Buenconsejo Jr. Bacolod City Philippines no URL given
Wednesday, 6th July 2005, 12:16 Just came over

I was just surfing, BTW good website.
27 IDX 106 - Odinn Iceland http://www.dxman.com
Wednesday, 6th July 2005, 12:15 Just came over

Very good website, Best 73s folks....
TF2CT - Aegir Iceland http://www.simnet.is/aolafs/
Friday, 1st July 2005, 09:57 Electronics

I'm looking for a pressure sensor Motorola MPX4100, but I cannot find any vendors. Do you know where I
could purchase it? thanks
Alessandro Ascanio Spello Italy http://www.deltavolo.com
Friday, 10th June 2005, 23:25 Electronics

Dear Sir, This Site is Great I am a Newer to Electronics and Try my best to become a Good Designer, But In
my country resources are not enough to reach us. but in your site i got lots of info. Thank you very much for
you SIR, for you honest effort. I like to very much to stay in touch woth you sir, U can mail my address.
Thanks Sharanga Thilina

Sharanga Thilina Sri Lanka no URL given
Monday, 6th June 2005, 20:26 Electronics

A very nice site! Excellent layout. Excellent graphics. Excellent material. thanks for your time and effort.
Wayne Cummins
Wayne Cummins Pisgah, Alabama USA no URL given
Thursday, 2nd June 2005, 21:22 R/C Modeling

Can any body please answer to my enq? how to develop RF Transciever using 16F84A
Velmurugan Udumalpet India no URL given
Friday, 27th May 2005, 20:13 Electronics

I am interested how is used MCP3304/08 with PIC16F877-SPI hardware modul & LCD...... well i hope that
in this page can help me in it. I used An703,719 but...nothing Sorry for my English. It is not a native
language for me.
Stoyan Rousse Bulgaria no URL given
Friday, 29th April 2005, 07:04 R/C & Electronics

I am interested how is used graphic lcd in drawing signals like the sine wave.... well i hope that in this page
can help me in it
Fernando
Raymundo Lima Peru no URL given
Sunday, 27th March 2005, 21:27 R/C & Electronics

I am very interested in the robots i made a lot of them since i am a kid the best one is a hoovercraft and its
amazing but i think your robot is a lot more sofisticated than mine anyway i would like to get email from
your new inventions
Christopher Sakr Beirut Lebanon no URL given
Wednesday, 23rd March 2005, 17:47 R/C & Electronics

What an incredible source for pic users!!! It's a very very impressive work you have done here!! Probably
the best on those topics we can find on the web! Crystal clear informations!!! Thanks a lot for such a
synthetic view of the lcd, RS232 and RC program using PIC micro!!! Thanks a lot!
Vincent Paris France no URL given
Monday, 14th March 2005, 01:26 R/C & Electronics

Great info, looking at using the simple rs232 interface for the 16f84a in my final year uni project, really
appreciate this being available as it saves me time having to develop one myself leaving me to worry about
the core of my project.
Ben Wiseman Melbourne Australia no URL given
Friday, 25th February 2005, 10:31 Electronics

Very Good Job!! Well done 2 u.
Harun Usm Penang Malaysia no URL given
Thursday, 24th February 2005, 15:15 Electronics

I really like finding these sites. You also provided all the necessary information for other people to build on.
Thank you for all the effort and place the information on web.
Srinivas Hyderabad India no URL given
Sunday, 20th February 2005, 12:49 Electronics

Very cool, I really like finding these sites! Thank you very much! Mi ingles es malo asi que tambien en
espaol, gracias. Esteban
Esteban Gruccos Buenos Aires Argentina no URL given
Monday, 7th February 2005, 01:01 R/C & Electronics

You have done a good job in low cost inertial navigation system. You also provided all the necessary
information for other people to build on. Thank you for all the effort and place the information on web. Best
Regard,
Wen-Hwa Chu Plano TX no URL given

Friday, 14th January 2005, 09:44 Electronics

Found the program for PIC 16F84 for running messages using Dot Matrix LCDs.
Abu Bakar Gombak Kuala Lumpur no URL given
Sunday, 9th January 2005, 18:26 R/C & Electronics

Very cool, I really like finding these sites! Thank you very much! Sonny
Sonny Jeffers Rosman USA no URL given

EXCELLENT - enough praise cannot be heaped upon this site: so much work by the author, not just that all
these projects actually work, but are very well presented. Well Done.
Nigel Spinney Gillingham UK no URL given
Sunday, 26th December 2004, 18:10 Electronics

Nice job!
Lauren Campbell no URL given
Saturday, 6th November 2004, 12:46 Electronics

Hallo Peter! Gratuliere zu einer sehr informativen und hilfreichen Website. Bin gerade dabei zu versuchen
einen PIC16F84 mit einer RS232-Schnittstelle zum Laufen zu bekommen und Deine Routinen sind mir
dabei eine grosse Hilfe. Nicht zuletzt wegen den ausfhrlichen Kommentaren! Alles Gute! Michael
Michael Aach-Linz Deutschland http://www.qsl.net/df1zn
Thursday, 28th October 2004, 14:34 R/C & Electronics

Hello Peter. Nice site! I came across it Googling for a servo driver circuit and selected your 2.7v Servo
Checker. I built it last night and it works great! Thanks! Now to explore your site further...
Klaus Wolter Dexter, MI USA no URL given
Thursday, 14th October 2004, 23:08 Electronics

Excellent website! I have tried a lot of your serial LCD modules, adapting them to 20 Mhz instead of 4 Mhz,
using PIC16F84A and PIC16F877A and 4x20, 2x12, 2x16 and 2x40 LCD's. I also slowed down the
animation when first connecting to the serial port. At 20 Mhz it was running really fast! Your assembler
modules have worked smoothly. Thanks again... I really do appreciate your hard work!
Mark Zembal Town of York Canada no URL given
Wednesday, 1st September 2004, 02:22 Electronics

Hey !!! Great site. Actually found you on Google! I'm working for a precision instruments company using
many PICs as the main microcontroller in their meters (TACHs, Speedo's, Sounders, etc.). If anyone is into
USB for these little micros, post a message. The new 18Cxxxx supports USB 2.0 but I'm looking for USB
1.1 stuff right now. I know the 16C745/765 support USB 1.1 but is there anybody out there doing this stuff?
Happy happy... John ( SicMan )
SicMan CT. Wolcott USA no URL given
Tuesday, 24th August 2004, 14:04 R/C Modeling

Grezi Herr Luethi Ich befasse mich mit dem Bau einer Cherokee. Knnen Sie mir sagen wo man gute
Unterlagen (Seitenrisse, Querschnitte) bekommt? Gibt es evt sogar Plne von Ihrer Maschine, die man
kaufen knnte? Freundliche Grsse Martin Waser
Martin Waser Neerach CH no URL given
Thursday, 19th August 2004, 21:49 Electronics

Congratulations, Mr. Peter Luethi! Your site is really usefull. Very good designs, excellent source of
research. Thanks a lot!!
Ricardo Sao Paulo Brazil no URL given
Tuesday, 13th July 2004, 17:28 Electronics

Hi, thanks for making this page. It gives many informations to its readers! Yesterday I came in first contact
with PICs while I was building an interface for an old PC in school. And it's very interesting! Greetz
Winburner
Winburner Germany no URL given
Thursday, 3rd June 2004, 20:14 R/C & Electronics

I'm also a radio modeler like you with prefers into giant scale models. I 'm a mechanical engineer but I'm
new in PICs and I found your site very helpful. You have done a nice work! It will help me to begin more
easy with PICs. Thank you, Prodromos
Prodromos Kavala Greece no URL given
Friday, 14th May 2004, 21:58 R/C & Electronics

GREAT SITE !!! All of your information is very well organized. Many of your ideas have helped me on my
own projects. Ill be sure to come back.
Christopher
Placentile Toronto Canada no URL given
Tuesday, 4th May 2004, 20:07 R/C Modeling

Is there a set plans for the GAF Nomad suitable for electric propulsion? Thanks for your help.
Greg USA no URL given
Tuesday, 27th April 2004, 18:01 Electronics

Very good web site for PICs & very good routines and examples. Dani
Daniel Burgues Lleida Spain no URL given
Thursday, 15th April 2004, 22:39 R/C & Electronics

Just starting out in PIC programming and have found it difficult to find some good examples in asm not
basic. Thanks a lot and i'll be sure to come back here again... Cheers!
Rawstar Sheffield UK no URL given
Tuesday, 13th April 2004, 02:20 R/C & Electronics

Interesting page. Lots of PIC related Projects (currently adapting USART of PIC16f628 to PC). Found true
assembler projects that are helpful to implement them in PIC BASIC.
Mario Alberto
Camarillo Ramos Mexicali, Baja California Mexico no URL given

Sunday, 29th February 2004, 13:33 Electronics

Your site is wonderful, especially PIC routine section. I used your hardware controlled USART routine in
my school project, it works fine. Meanwhile I converted some assembly routines to Hitech C PIC compiler
routines. Thanks for all.
Engin Karabulut Kayseri Turkey http://technogate.tripod.com
Wednesday, 11th February 2004, 18:27 R/C & Electronics

I really like your web site. Great detail on your projects. I plan to try some of your routines. Dennis Koroluk
Dennis Koroluk Winnipeg, Manitoba Canada no URL given
Sunday, 23rd November 2003, 03:58 Electronics

Fantastic PIC Projects site. Went through the entire PIC Web ring, but found this site through electronics
Web ring only.
Warner Li Ontario Canada no URL given
Wednesday, 19th November 2003, 10:46 Electronics

Great thanx for a nice asm modules. Very,very useful for studying. Found one error in comtest.asm in
ending of ISR need to clear interrupt flag RB0/INT (as u write in comm9600 asm module) once again great
thanx!
Gleb Ashdod Israel http://www.dynaco.h10.ru
Friday, 19th September 2003, 20:47 R/C & Electronics

Need to implement a low cost navigational circuit to pilot an unmanned aerial vehicle in a 360 degree
pattern 100-1000 feet in air. Any ideas. I am kind of stuck at the moment on how to? Feel free to contact me
here @ work 724-589-1586 w/ any ideas or contact via email jconn#AT#kent.edu jconn#AT#vectechnology.
com
Jason Conn Austintown USA no URL given
Thursday, 4th September 2003, 03:49 R/C & Electronics

I think your model plane is awesome, as is your website. Thanks for posting so much information. - William
Miller

William Miller Douglas,Georgia USA no URL given
Wednesday, 3rd September 2003, 13:02 R/C & Electronics

Hi Peter, I'm a last year student at the Scheppers-Istitute in Belgium (studying electricity-electronics). I have
an RC plane and I was thinking to install your designed altimeter (as my final). But I'm only 17 years old,
low on cash, and I noticed that the receiver and transmitter are very expensive (+/- 250 dollars). So I
wondered: Is it possible to make my own transceiver??? At school we've got good facilities, but do you
think it's possible? Well, thanks in forward and good luck with your site! Thomas
ThomASSHOLE Belgium http://www.thomasshole.tk
Sunday, 10th August 2003, 04:32 Electronics

I want to know how if to project AT Keyboard Interface xxx podria to communicate by radio frequency, you
or alquien you have a scheme of circuit of communication RS232 by FSK or another one, serious a new idea
for this project. From me already many thanks.
Facundo Cabezudo Uruguay no URL given
Friday, 2nd May 2003, 20:13 R/C Modeling

Schne Seite. Ich bin auch dabei eine Nomad zu bauen, aber noch lange nicht so weit wie Sie. Gre aus
dem Mnsterland Jrgen Hartog
Jrgen Hartog Sdlohn Deutschland no URL given
Saturday, 26th April 2003, 20:38 Electronics

Congrats on the site Peter, a job well done. I'm doing the same degree as you in Ireland.
Barry Belfast Ireland no URL given
Friday, 18th April 2003, 16:12 Electronics

Congratulations for your home page!
Alexandre Nolasco Ipatinga Brazil no URL given
Wednesday, 16th April 2003, 04:56 Electronics

Hola! Enhorabuena por tu pgina, los contenidos que tienes en ella son muy buenos y me estan sirviendo
mucho para el proyecto que estoy desarrollando. Gracias !! Y saludos desde Espaa !! Byez...
Charly Zaragoza Espaa no URL given
Tuesday, 15th April 2003, 13:22 Electronics

I agree with the some of the other comments in this guestbook: This site is nicely made - congratulations on
a job well done!
BT Germany no URL given
Tuesday, 18th February 2003, 12:53 Electronics

I was looking for PC oscilloscope software and found your software page with some useful links, thanks !
We're writing a DSO application (in preview release) for BitScope, our open design PIC based mixed signal
capture engine for PCs.
Bruce Tulloch Sydney Australia http://www.bitscope.com

Hi, nice info. I also work on a jumper channels with PIC from a 2.4GHz wireless receiver VR31 (X10
protocol) to be able to work with 4 wireless cameras WBR
Sica Zaletchi Rm Valcea Romania no URL given
Tuesday, 4th February 2003, 14:57 R/C & Electronics

I am currently an electronics student and I want to make it begin this field of engineering. I need your
assistance , I wonder if you could send me some of your projects for my own experiments.
Adams Uganda no URL given
Saturday, 1st February 2003, 06:46 Electronics

Hello Peter, I'm a student of University Technology MARA, Faculty of Electrical Engineering, Electronics.
Nothing to say...very interesting website!! I've learned a lot. Actually I'm doing my final year project in PIC
microcontroller. I'm interested with your PIC project. Could u please help me, to send a full schematic
diagram of the AT Keyboard interface with RS232 link using PIC 16F84 and other requirements need. I
really hope to hear from u. TQ.
Al-Fahmi Al-Azmi Kuala Lumpur Malaysia http://www.uitm.edu.my

Tuesday, 28th January 2003, 06:04 R/C & Electronics

You are starting to be known all around the world... I would really like be in touch with you. Nice site.
Alfonso Perez
Garcia San Luis Potosi Mexico no URL given
Saturday, 18th January 2003, 09:00 R/C & Electronics

Very good pages for my students. Thanks for sources.
Francomme Paris France http://francomme.fr.fm
Sunday, 5th January 2003, 14:40 Electronics

Hi, a very good homepage. I was searching for sourcecode for PIC microcontroller when I came to your
page. I am working (private for fun) on a project to use a accelerometercircuit to find the best acceleration
on a car and at which RPM. For that I will use a microcontroller (maybe 2) with RS232
serialcommunication. I saw in your code that you used interrupt, I don't know if I should use interrupt. The
PIC will just fetch data and deliver to the serialinterface so I don't see any need to use interrupt. But I will
for sure look a little in your code. Regards Bengt
Bengt Sweden no URL given
Tuesday, 31st December 2002, 14:43 Electronics

I'm programming Smartcard applications by Visual C++ 6 and microcontrollers as well, i have made a
project for image data compresion also by Visual C++.
Hakiem Misurata Libya no URL given
Monday, 30th December 2002, 11:02 Electronics

Great work!!! Your projects are very helpful for my work, I will waiting for your projects in TCP/IP. Tanks
for your information and wait news about my projets. SALUDOS. :-)
Hugo Retana Distrito Federal Mexico no URL given
Tuesday, 17th December 2002, 13:31 R/C & Electronics

Excellent , impressive and one of the best sites I visited. Will be back again. Balki

Balki Chennai India no URL given
Saturday, 2nd November 2002, 16:23 R/C & Electronics

Woopy you are good influence on me. I can really use your prog & scheme but i want to make a 433 Mhz
transmitting keyboard so i can receive ascii on rotating parts. or make a school cheat application. Industrie
standards (rs232) are useful. But for people there are no standards :) hi hi I must go. My compliments for
your clear presentation of your work! Ciao
Lauris Arnheim Holland no URL given
Friday, 11th October 2002, 04:01 Electronics

Soy Latino y no se mucho ingles, si tienen mandenmen algun circuito de para hacer un proyecto para la
Escuela Superior de Electronica
Santiago Rizzo Montevideo Uruguay no URL given
Wednesday, 2nd October 2002, 10:50 R/C & Electronics

Like your great PIC projects your keyboard project just helped me around a lot of errors I am trying to
develop a wheelchair controller for a handicapped friend. I also love your Nomad model I have been
building models since about 1958 once again thanks for a great site cheers Geoff Quinn
Coffs Harbour NSW
Geoff Quinn 2450 Australia no URL given
Tuesday, 13th August 2002, 16:41 R/C & Electronics

I am interested in Electronic Engineer. I need more information from outside. I hope that you can help me.
Thank you!
Pan Yuanliang Chongqing China no URL given
Monday, 22nd July 2002, 07:41 Electronics

Peter, as the Microchip Representative of Switzerland I am more than happy to have found your page. You
did a excellent job. It is the kind of sense we all working for Microchip are looking for. If you need any
help, any support or just a sample we will be more than happy to support you. Thank you for promoting
Microchip and its product in this manner, if it is with the digital or the analog product portfolio. Roland
Ruetimann

Roland Ruetimann Dottikon Switzerland http://www.mero.ch
Thursday, 27th June 2002, 22:43 R/C Modeling

Peter, First of all I'd like to mention a coincidence that happened when I found your page and read about
you. I lived with a German guy named Peter and he's from Dresden too. Peter Eisentraut, is a Computer
Science major and currently lives back in Dresden. I lived with him here in the Michigan a few years ago.
We still keep in touch. Now to the important stuff. I'm just starting flying my first RC trainer and would like
to include an altimeter inside my plane. I would like to be able to know how high the plane flies. I have a
degree in Mechanical Engineering, so my knowledge in electronics is somewhat limited. I was wondering if
you knew anywhere I could buy a setup similar to yours. Small precise, inexpensive, etc. Or maybe if you
could write an instructions manual for people to buy the components and assemble it. Thanks Roberto
Roberto Crescencio Grand Rapids, Michigan USA http://www.me.mtu.edu/~rdcresce
Thursday, 30th May 2002, 18:57 Electronics

Excellent site. I found an interesting project based on the 16F84 so wait for my comments on it soon.
Thanks!
Aaron Benitez Veracruz Mexico http://ab.netfirms.com
Monday, 20th May 2002, 21:25 Electronics

This a perfect page. Thanks.
Lucho Bogota Colombia http://www.geocities.com/grupo2dos
Tuesday, 30th April 2002, 06:29 R/C Modeling

That drawing of your GAF-Nomad ? Is it possible to get a copy of the drawing ? I started awhile ago to
build the same aircraft but I didn't finnished it. I build a tripple engine airplane instead, but now i have
planes to start over with my "Baby". Send me a mail, and plase visit our clubsite on the adress above, it is
unfortunetly in swedish but the pictures in "BILDDAGBOK" (Picture diary) is universal. Fly safe ! (slow
and low...)
Jan Hedstrm Nrpes Finland http://www.narpes.fi/~portomrc

Great work, it's one of the best homepage I have ever seen. Some of your designs are helpful for me. Many
thanks to you.

Shalk Young Jinan China http://www.exingye.com
Monday, 22nd April 2002, 17:06 Electronics

Is it possible that I can send since for e-mail the file rs 232 debug interface the discharge in your it page it
doesn't work. Regards Reynaldo
Reynaldo Berrios no URL given
Tuesday, 16th April 2002, 18:35 R/C & Electronics

Hi, congratulations..! Your web page is very nice. Specially PIC-Excel scope. Bye...
Oktay Sirrik Istanbul Turkey http://www.turkengineers.com
Thursday, 11th April 2002, 20:47 Just came over

Dear Peter I am a longtime friend of your father. We worked together at BBC in the early 70-ties and after
that at Motor Columbus. We still are in touch now and then and he told me proudly about your homepage.
He can be proud of you and you of your achievements I am impressed. I especially enjoyed the picture of
the DeHavilland DC2 Beaver. My first job was at De Havilland in Canada where the Beaver was designed
and produced. I even did some work on the Beaver: the engineering of repairs. All the best Theo schotten
Theo Schotten Wermatswil Switzerland no URL given
Monday, 8th April 2002, 09:15 R/C Modeling

Firstly, a very nice web page. A friend spotted your altimeter project a forwarded your URL. I look yours
over with great interest as I too have built one and used it quite a lot from about a year and a half ago. My
prototype is based on the MPX5100 (a temperature compensated sensor) and an Atmel AT89c4052 with 12
bit Max ADC. I amplify the sensor output and achieved a resolution of 30 -50cm between ADC bits The RF
link consists of a synthesizers for the TX and RX running at 433 MHz. I wanted to use the higher 800-
900MHz ISM band, but that has been trashed by local cell phone operators. I used a slightly more powerful
output device to achieve around 19dbm of output power. The 10mW RF (10dbm) will not get reliable data
the range when aircraft exceeds a few hundred meters. Yes I have been sending data from a thermal plane
that achieved more than 800 meters of height gain!! (Not too mention that I also ran out of ADC bits!!) The
RX outputs the data on a fairly large LCD that shows temperature, battery voltages, sink/climb rates and of
course altitude. An audio vario output is also available. (calculated from the sink/climb digital data). The
entire flight is recorded (on the airborne unit) to a serial memory devices that is later dumped to a PC for
further analysis.. The entire system is all SMD technology and works very well. My next generation system
is using the new micros for Analogue Devices with built in ADC. RF link is based on a RF Micro Devices
IC that allows for 28K data rates. Sensor used is now similar to yours .. the MPX4100 (no S version?) I have
also acquired a small GPS PCB that will dump data to the onboard micro as well. The resolution will be

down graded to 1 meter steps (atmospheric variations mess things up a bit) The RX will also have a sensor
(the reference pressure at ground level) to help eliminate the atmospheric variations. I hope to have this
system up and running in about a month's time. I hope this lot will provide you with some further ideas. The
use of such a device in a model glider is unbelievable. You learn so much form it. You can also set up/trim a
competition plane for minimum sink quite easily with such an instrument. Good luck
Brian Mulder Cape Town South Africa no URL given
Saturday, 30th March 2002, 14:07 Just came over

I love the low cost inertial navigation system. I ordered an evaluation ADXL150 from Analog.com. Then
looked at Crossbow.com and their stuff. Then found your site. Maybe I will be able to make something with
it- but I doubt it. Even your rig had errors you pointed out. The crossbow site has some nice free software
for logging graphing the results. Anyway well done on the website.
Quinny no URL given
Sunday, 24th March 2002, 19:18 R/C & Electronics

Wonderful page, I have been looking for a working keyboard to RS232 routine and have finally found one.
Thanks you.
Harrison no URL given
Saturday, 16th March 2002, 20:27 R/C & Electronics

Hello Peter!! Great work, good job you have here. You build systems for your RC, I build them for high-
altitude baloons !!! Keep it real! Sena
Antonio Sergio
Sena Lisboa Portugal http://www.qsl.net/ct2gpw
Monday, 11th March 2002, 22:23 Electronics

Great stuff, made bookmark and for sure be back soon.
Lodie Johannesburg South africa no URL given
Monday, 4th February 2002, 22:43 Just came over

Excellent work, Peter. Sudhir
Sudhir Gupta London Canada http://mcjournal.com

Monday, 12th November 2001, 05:37 Electronics

Hello Peter. I just wanted to thank you for such an informative and well designed site. I am doing some
research for a future project and stumbled across your site. I don't usually sign guestbooks but your site is
one of those gems you find every now and again while searching the net and will certainly find it's way into
my bookmark list. Very impressive. Shane Ely http://www.serialgrafix.com
Shane Granville, NY USA http://www.serialgrafix.com
Friday, 9th November 2001, 21:51 Electronics

Thanks, thanks, infinite thanks, Peter for your Keyboard to PIC program. Im a electronics student in
Cartagena (Murcia, Spain), ending my studies. Im developing a PIC-based text-video system at the end of
my studies, and Im interested to include a keyboard input in it. I hope your code will help me, Ive only just
read it now. The fact is "nowhere" else I found Keyboard to PIC16F84 protocol implemented so natural as
here (to Motorola ucontrolers in other sites). Thanks again. By the way, your page is great. HIP HOP non
stop!!!!!
Alberto B Murcia Espaa no URL given
Tuesday, 16th October 2001, 13:50 Electronics

The microcontroller PIC is fantastic... That's all!!!
Edilson Campinas Brazil no URL given
Saturday, 13th October 2001, 15:49 Electronics

This site is excellent. Thank you for sharing your knowledge. I work on INUs, to avoid temperature
problems the instruments are heated to a constant temperature. This way they maintain a constant
tempurature regardless of the ambient temperature. I guess you have already considered this method. I am
very impressed with your work.
Gavin Sydney Australia no URL given

Ah si tous les utilisateurs de PIC povaient en faire autant... Felicitations pour la clartee et le
professionalisme de votre site. ;=)
Philippe de
Chaponnire Nimes France no URL given

Tuesday, 4th September 2001, 17:06 R/C Modeling

Hello, Through a search looking for R/C Piper Cherokee's I came accross yours. Very nice. Many R/C
planes are modeled of Cessna's. I'm a student pilot of the full size Cherokee and have been looking for a R/C
version. Top Flight makes the Bonanza.......but prefer the Cherokee. I'm taking it that yours is built from
scratch. Looks Great! Brad
Brad P Grosse Pointe, Michigan USA no URL given
Monday, 6th August 2001, 11:31 R/C & Electronics

I'm recently engaged with a project usig pic micro-controller and found whatever I'ld need in this regards.
Superb and nothing else I've to say about the collection being stuffed on this site. At least every Electronic
Engineer must add this URL to his Favourites.
Majdi Farooq Karachi Pakistan no URL given
Tuesday, 24th July 2001, 15:43 R/C Modeling

Very nice site mate gud luck with it :-)
http://www.geocities.com/rc_raceruk/
Scott Gloucester United Kingdom rchomepageenter.html
Monday, 23rd July 2001, 04:41 Electronics

I was just looking for info on RS232-based Keyboard Interface, and it is quite nicely explained...Thanks
K.Mahabala Shetty Singapore no URL given
Wednesday, 18th July 2001, 23:44 Electronics

Hallo! Zuerst Gratulation zu Deinen gelungenen Projekten und der super Homepage! Ich bin Automech,
Modellbauer und Hobbyelektroniker(oder Bastler). Die KFZ Steuergerte in unseren Autos (Airbag, Motor,
Klimaanlage usw.)verfgen ber einen Fehlerspeicher, der mit einem Gert ausgelesen wird. Die vom
Steuergert gesendeten Daten werden Bitseriell bertragen. Nun suche ich einige Links
(Programmbeispiele, am besten in Qbasic /Visual Basic) um diese Daten zu erfassen, darzustellen und
auszuwerten. Mein Ziel wre es dann diese Daten mit dem PC/Laptop am /im Fahrzeug zu erfassen. Httest
Du einige Ideen und Links? Die meisten Programmierhomepages enthalten leider nur Spiele und andere
Programme usw. Ich ich wrde mich riesig auf eine Antwort freuen und hoffe Du findest etwas Zeit dafr.
Guido Wger

Stadel / Perth Switzerland /

Guido Wger Australia no URL given
Sunday, 17th June 2001, 15:31 R/C & Electronics

Nice page, it's nice to see someone willing to share their work progress. I am just about to start designing
my own altimeter for my RC aircraft, the ultimate aim is to make an UAV, if you are interested, check out
www.silvertone.com.au, they have great stuff. I will post my work on my own webpage. Your skills are
advantageous to this type off work, keep up the good work. I will shore to drop past and check it out from
time to time
Colin Conrick Adeladie Australia no URL given
Friday, 15th June 2001, 08:23 Just came over

This is good idelism site. Thanks for making it easy to access. I need a hand, I also want to make an
altimeter digital for my last project on campus. Because I don't know much - still learning - about
microcomputer applications, I need to ask a few questions. 1. what is the basic theory of altimeter ? 2. what
other theory and concepts that I have to know to make an altimeter digital ? 3. what are the components ?
That's all for today. I'm looking forward for your reply. Thanks a lot.
Henry Jakarta Indonesia no URL given
Tuesday, 5th June 2001, 22:25 R/C & Electronics

Quite impressive.
Edgar Allan
Policarpio Philippines no URL given
Wednesday, 16th May 2001, 16:10 Just came over

I happened across your page while looking for a keyboard/barcode slot reader. I was looking for a way to
interpret RS232 input into keyboard input for a time keeping system. Very interesting site. The robots are
very cool.
Curt Sandberg Pottstown, PA USA no URL given
Friday, 4th May 2001, 19:53 R/C & Electronics

Very good work !

Murary Kottayam India http://vetcross.com
Wednesday, 11th April 2001, 20:18 R/C & Electronics

Nice site...
Michel Bruxelles Belgium http://www.viralex.be
Friday, 19th January 2001, 19:29 R/C Modeling

Hello everybody, I have some time now so I would like to share some tips to all those budding pic
programmers that frequent this site. Using the Pic 16F84 and the Microchip MPLAB development software
I have managed to get myself started interfacing with a LCD. At first I had less than overwhelming results
trying to do this via shift registers and other added componantry. The lessons I have learnt are as follows: 1.
Beware of static when dealing with 74HC595s. It's all too easy to destroy them without knowing. :) 2.
Unbranded "blob based" LCDs do work! Remember to have larger delay routines to get them working, you
can always optimise later. Also be sure that your circuit has enough power to start up, otherwise the PIC can
be sending wasted commands to other devices that haven't initialised (or worse). 3. Make sure you
understand the way "banks" operate in the PIC16F84s. You will need to switch between them when
choosing TRISA and TRISB options. I suggest you download the 150 page (or so) datasheet, it will explain
things fairly clearly. 4. Have fun and learn from your mistakes. Until next time, happy programming!
Zare Zarev no URL given
Tuesday, 16th January 2001, 20:08 R/C & Electronics

Great site. Best wishes for your studies, and for your future career.
Zare Zarev Perth Australia http://web.one.net.au/~zarevz/index.htm

Awsome site very well done, GREAT info. I've just begun learning PIC stuff and am always looking for
pages like yours, wish there were more. Thanx Shawn
Shawn Kelly Kirkland, WA USA no URL given
Monday, 18th December 2000, 12:38 R/C & Electronics

Great work! Tell us more about RC flying in Switzerland. In Singapore most people fly power planes. The
club is called Radio Modellers Singapore. A few (your fellow countrymen) do aerotowing of 1/4 scale
gliders.

Jim Singapore no URL given
Sunday, 10th December 2000, 16:22 R/C & Electronics

I'm hoping that your Keyboard and RS232 routines are just what I need at home. They are the best laid out
pages that I have come across and you have explained them very well. Thank you for sharing them and the
effort you have put into your site.
Ian Hunaban Malvern England no URL given

Great site. Nice, clear structure, and very good electronics. I've already bookmarked it. I really liked your
guestbook. Keep on like this!
Fabian Pedrosa Tucuman Argentina no URL given
Wednesday, 27th September 2000, 09:57 Electronics

An excellent site and very interesting. Keep up your good work.
Dariusz Kudala Poland no URL given
Monday, 4th September 2000, 18:30 Electronics

Very good work, keep up them.
Sergio Vidales Argentina no URL given
Friday, 25th August 2000, 23:15 Electronics

I came across looking about PICs, and I found your very good works. Keep on.
Stefano Melis Uras italy no URL given
Friday, 28th July 2000, 01:49 Electronics

The Excel based RS-232 debug interface is something I have wanted to write for some time now. You have
saved me a week of my life. Thank you......
Nigel Somerville Brisbane Australia no URL given

Thursday, 13th July 2000, 04:50 Electronics

Impressive work, both with the web page and the PIC projects you have done.
Chris Chin Darwin Australia no URL given
Sunday, 2nd July 2000, 11:01 Electronics

Very good indeed. Keep up your good work.
Robert Yan Singapore Singapore http://www.wkc.com.sg
Monday, 26th June 2000, 14:41 R/C & Electronics

Very nice job and a very good page. Hope to see more of your projects in the future. Billy
Vassios Vassilis Thessaloniki Greece no URL given
Tuesday, 6th June 2000, 13:52 R/C & Electronics

Very nice. I will book mark your page and hope you continue to improve it. Thank You.
Nestor Cotelo Rio de Janeiro Brazil no URL given
Tuesday, 6th June 2000, 02:56 Electronics

Very nice, clean and fast just the way we like them. I will book mark it in case I need some of your
modules. Keep at it. Dave
David Friedeck Valinda USA no URL given

I like your page. Very tidy. I have made a timer to control a cassette recorder and control my Awai
Minidisc recorder. I have also used LCD devices. I have hacked my web pages together to share some
of the ideas. Best wishes, Doug Rice
Doug Rice Ipswich, Suffolk UK http://www.doug.h.rice.btinternet.co.uk
Friday, 14th April 2000, 10:18 R/C & Electronics

An excellent site, well presented, with excellent PIC routines.

Andy Holdaway Stourbridge United Kingdom no URL given
Tuesday, 28th March 2000, 16:05 Electronics

Hi, nice pages indeed ! You are an example of what it means youthfull years... I like too your
guestbook, maybe I will inspire from it. Vasile
Surducan Vasile Cluj-Napoca Romania http://geocities.com/vsurducan/vasile.htm
Sunday, 5th March 2000, 20:17 Electronics

I just wanted to tell you that you are my hero! Thank you for your excellent job with your PIC site! It is by
far the best site of it's kind I have ever seen. For over 2 months I've been looking for a 4-bit LCD interface
but on all of the pages I looked at, there was always information missing or the code didn't work. Now, I
don't know much about assembly, so I am very grateful at how well you documented all of your work. I'm
an amateur radio operator and I am trying to build a ham radio pager that works using DTMF tones for my
personal use (not commercial). Now that I found your routines, I can finally move away from the LCD stage
and work on the DTMF decoder stage. Thanks a lot for a job well done!
Adam Porr no URL given
Saturday, 4th March 2000, 16:28 Electronics

I came accross your site whilst trying to find code and a circuit diagram for a dot matrix LCD voltmeter.
You have some very impressive projects on the go at the moment and the site is laid out excellently to see
them all - well done on the design !
James Gaylard United Kingdom no URL given
Friday, 3rd March 2000, 13:47 Electronics

I like your page a lot, it's very OK, well then one of the better electronics pages... I will set up a link to your
site with my next update... I've also written a small program called IPCOMServer that you might find
useful. It's FREE and enables you to control RS232 devices over the Internet with TELNET.
Rudolph Thomas South Africa http://www.iox.co.za

Very very interesting. Lovely layout.
Bert Kimpe Ooigem Belgium no URL given

Saturday, 8th January 2000, 15:30 R/C & Electronics

Final test from home ... Just have a look, if it still works.
Peter Luethi Dietikon Switzerland no URL given
Wednesday, 5th January 2000, 10:28 R/C & Electronics

Wow, my self-written guestbook works ! Perl is really nice, but not that easy. It's now up to you to fill in my
guestbook. Thank you in advance.
Peter Luethi Dietikon Switzerland http://www.electronic-engineering.ch
[Top]

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About me
About Me
General
Welcome at my website. My name is Peter Luethi. After having been working abroad at AMD Dresden Design Center for nearly 3
years, I have moved back from Dresden, Germany to Urdorf, Switzerland. At November 1, 2003, I have started my Ph.D. thesis back
at the Integrated Systems Laboratory of the Swiss Federal Institute of Technology (ETH Zurich) in Switzerland.
My favourite hobbies are scuba diving, playing volleyball (Height: 1.98m, so do not ask on which position ...), creating convenient
electronic circuits and building and building and building and finally flying RC model airplanes. Take a glance at my "baby"...
I hope you've got some inspiration, useful information or applications to develop your own electronic circuits.
During my study...
In 1999, I have been working for 3 months at Philips Semiconductors Zurich. I have updated and built new cell libraries (pcells) for
the Cadence Design Framework. I was busy with creating Parametrizable on-chip CMOS decoupling Capacitors and
Parametrizable high-voltage CMOS Transistors (0 - 16 V). The aim of my project was to get easy drag and drop cells with
automatic DRC-compliant layout generation, so that the analog design engineers do not have to draw (and match) the layout all the
time by hand. The process was a single poly, 2 metal, 0.6 um CMOS process.
These parametrizable cells are used in CMOS LCD driver chips for mobile phones. The chips are sold as ASSPs (application
specific standard product). Note: In almost every Nokia mobile is a Philips LCD driver chip, and maybe today some of my
parametrizable on-chip capacitors...
I have also participated in a robot contest at our university. Our team consisted of 5 students, 3 electrical engineers and 2 mechanical
engineers. Here are some pictures of the Swiss SmartROB Championships at the Swiss Federal Institute of Technology in Zurich.
We have finished our students project "Parametrizable Hybrid Stack-Register Processor as VHDL Soft Intellectual Property
Module". The processor is designed to handle medium to high interrupt rates very efficiently. Therefore our processor architecture is
based on a mixture between stack and register-based architecture to merge the advantages of both of them. I've written a scientific
paper about this project and presented it at the 13th Annual IEEE International ASIC/SOC Conference, September 2000,
Washington D.C., USA.
We have also finished our second project, a "Low Cost Inertial Navigation System" based on piezo acceleration sensors and piezo
gyros. Our task was to find out, how precise navigation is possible and where the bottle-neck will be. The whole system consists of
three acceleration sensors, three gyros, some filter stages, a PCMCIA data acquisition card and a portable computer. It worked quite
well: The current setup is suitable for measuring and controlling the spatial representation (that means the acceleration and the
angles), but is not able to trace the actual position. First, the accuracy of the sensors have to be improved by a factor of 10 to be able
to calculate a reliable position. And also some more sophisticated algorithms like kalman filters and suitable position feedback/
update mechanisms are necessary, maybe in conjunction with additional GPS data.
At home, when time comes by, I'm busy with the Motorola MPXS4100A absolute pressure sensor.
I try to build a precision digital altimeter with the NSC ADC12130 12 bit A/D converter, two PIC 16F84 microcontroller, a Dot-
LCD display and a wireless transmitter and receiver. The aim is to get the actual altitude of my airplanes in real time, providing the
base for further enhancements such as a variometer,...
When this circuit is working well, I'll maybe interface a Microchip 24C65 IC-EEPROM to get an autonomous data-logger.
Afterwards the logged data will be transmitted to a PC into an Excel worksheet to visualize the route flown.
At the end of my study...
http://www.electronic-engineering.ch/aboutme/me.html (1 of 4)12/02/2008 17:13:08

About me
I have successfully finished my M.Sc. diploma thesis in electrical engineering on the Southbridge of the chipset for the next-
generation AMD 64 bit "hammer series" processors (the powerful "Sledgehammer" and his smaller counterpart, the "Clawhammer")
at AMD Dresden Design Center, Germany.
AMD Fab30 Saxony, Dresden, Germany
My task was to setup a performance analysis, which is capable of revealing possible performance bottlenecks already during
implementation time and addressing solutions to cope with these problems. The performance analysis should cover the entire
Southbridge with all its specific protocols, also the new Lightning Data Transport" (LDT) bus* specified to transmit up to 1600 mtps
(million transactions per second). The LDT bus developed and standardized by a special interest group including AMD is
implemented between North- and Southbridge and will serve the 64 bit / 66 MHz PCI bus bridges and the devices attached to the
Southbridge. So there was and still is enough work to be done...
Preview: AMD Fab30 & Fab36 Saxony, Dresden, Germany
* renamed to official name "HyperTransport" (HT)
After the study...
I have been working at the AMD Dresden Design Center, Germany on RTL-based block- and system-level verification and
performance analysis for next-generation HyperTransport" chipsets for AMDs x86-64 CPUs (see picture of AMD 8111 x86-64
Southbridge "Thor" below).
I checked the correct functionality and interoperability of next-generation HyperTransport" chipsets for AMD's hammer series. I
also received the "AMD Fab 30 Vice President's Award" for outstanding achievements in conjunction with my diploma thesis
"Performance Analysis of AMD Southbridge Zorak". In March 2003, I got the Best Paper Award at "Verisity's Club Verification" for
"Verification Glue: How to compose system-level environments".

About me
AMD x86-64 Server Setup

AMD x86-64 CPU "Hammer"
consisting of "Hammer" CPU AMD 8111 x86-64 Southbridge
with 2nd level cache on the left side,
and "Thor" Southbridge "Thor"
processing units and 1st level cache
HyperTransport" IO-hub
on the right side
Today...
After having been abroad for nearly 3 years, I have moved back from Dresden, Germany to Urdorf/Zurich, Switzerland in September
2003.
At November 1, 2003, I have started my Ph.D. thesis back at the Integrated Systems Laboratory of the Swiss Federal Institute of
Technology (ETH Zurich) in Switzerland.
My project is in the area of MU-MIMO (Multi-User Multiple Input Multiple Output) for fourth generation (4G) wireless systems.
The main objective of MIMO is to increase the overall data rate by using the same bandwidth but multiple antennas to transmit
multiple data streams simultaneously. MIMO technology allows for significant increase in throughput, range and quality of service
(QoS) at the same overall transmit power and without additional bandwidth expenditure.
MIMO-based communication is only highly beneficial if we have a so-called rich-scattering environment, i.e. numerous signal
reflections, for instance in a large open indoor office environment. When radio signals are travelling across such an environment,
they get their independent spatial signature imposed by different wave reflections and absorbtions. The spatial signatures are affected
by the frequency of the signal, the environment (channel), but very important, also by the location of transmit and receive antennas.
In the case of MIMO communication, we are transmitting different signals from spatially different transmit antennas to spatially
different receive antennas, therefore every received signal has obtained its independent spatial signature. Since all radio signals are
transmitted simultaneously in the same frequency band, the receiver gets a superposition of all signals. The task of the MIMO
receiver is to separate this superposition into different data streams. The spatial signatures can be measured in the receiver (channel
estimation), and afterwards inverted (channel inversion). The subsequent equalization of the received signal is carried out to split the
received signal into different data streams originally sent by the MIMO transmitter. The complexity and performance of channel
inversion and data equalization are heavily related to the underlying MIMO detection algorithm.
Some sophisticated algorithms, demanding data processing, and high-performance digital integrated circuits behind the radio-
frequency (RF) front-end are the pre-requisites for this wireless acquisition methodology. The research focus of our team starts with
algorithm analysis (select suitable candidate algorithms with respect to a subsequent hardware implementation) and MATLAB
programming (assess reduced precision effects, i.e. fixed-point evaluation), includes VHDL coding, synthesis and functional
verification, and finally needs also integration on FPGA prototyping hardware or ASICs. The goal is to demonstrate a dedicated
subset of algorithms (e.g. linear, pseudo-linear or non-linear MIMO detection) on an OFDM based MU-MIMO hardware testbed
with wireless links in real-time. The work serves as assessment of algorithmic- and/or hardware-related issues regarding possible
future industrial high-density integration.

About me
If you have any comments, hints or suggestions, or even improvements of the provided circuits,
you may contact me at web@electronic-engineering.ch (not to be abused by spam)
Please be aware that it may take some time until I answer the question.
In case of too many requests, I won't be able to answer all of them due to limited time.
This site was checked by SiteInspector and, with the exception of popularity, excellent rated !
Last update: 07.05.2006
[Top]

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Study projects
Theses, Publications & Awards

Study theses
Publications
Awards
Study Theses [Toc] [Top]
Swiss SmartROB Championships
Autonomous mail-collecting robot

The robot contest I've participated in during the
summer semester 1999 at the Swiss Federal Institute
of Technology, Zurich, Switzerland.
Project duration: April 1999 - July 1999
The task was to develop an autonomously navigating robot, which had to be able to detect and collect
letters - also autonomously. The letters were distributed in a square area of 7.9 x 7.9 meters, which
was designed as a labyrinth.
Enhanced RISC Processor "SILVERBIRD"
http://www.electronic-engineering.ch/study/study.html (1 of 5)12/02/2008 17:13:09

Study projects
Parametrizable Hybrid Stack-Register Processor as

VHDL Soft IP-Module
Students project at the Integrated Systems Laboratory
of the Swiss Federal Institute of Technology, Zurich,
Switzerland.
Project duration: October 1999 - July 2000
The aim was to develop a highly parametrizable RISC processor as soft IP (Intellectual Property)
module based on VHDL (Very high speed integrated circuits Hardware Description Language) for
embedded systems.
Features:
Parametrizable hybrid stack-register processor for system-on-a-chip (SOC) applications

Parametrizable RISC instruction set
Special architecture to meet the requirements of efficient interrupt handling without any
pipeline flushs or no-operation cycles
Possibility to easily implement high-level language compiler due to register-bank-like random-
access registers
The processor is designed to manage medium to high interrupt loads easily
Low Cost Inertial Navigation System
Design and characterization of a strapdown inertial

navigation system based on low cost sensors
The students project I've participated in during the
summer semester 2000 at the Swiss Federal Institute
of Technology, Zurich, Switzerland.
Project duration: April 2000 - July 2000
The aim of the project was first to design a complete inertial navigation system and second to find out,
how precise such a platform built from low cost sensors is and how its performance can be improved.
Performance Analysis of next-generation AMD Southbridge "Zorak"

Study projects
Implementation of a performance test environment

capable of revealing possible performance
bottlenecks already during design time
My diploma thesis at AMD Dresden Design Center,
Dresden, Germany in order to get my master degree
in electrical engineering from the Swiss Federal
Institute of Technology, Zurich, Switzerland.
Project duration: October 2000 - March 2001
The "Zorak" Southbridge is a prototype part of the chipset for the next-generation AMD 64 bit
"hammer series" processors (the powerful "Sledgehammer" and his smaller counterpart, the
"Clawhammer"). My task was to setup a performance analysis environment for the "Zorak"
Southbridge, which is capable of revealing possible performance bottlenecks already during
implementation time in RTL design. The performance analysis covers the entire Southbridge with all
its specific protocols, also the new Lightning Data Transport (LDT)* bus specified to transmit up to
1600 mtps (million transactions per second). One transaction could be done on various data widths: If
we take one byte at maximum clock rate, the resulting bandwidth will be 1.6 GB/s, but allowing for
even more by using larger data widths. The LDT bus developed and standardized by a special
interest group (SIG) including AMD is implemented between North- and Southbridge and will serve
the 64 bit / 66 MHz PCI bus bridges (and other bridges) and the devices attached to the Southbridge.
So there was and still is enough work to be done...
* renamed to the official name HyperTransport
< This project is confidential, therefore no more information available. >
I am now with AMD Dresden Design Center, Germany, working on RTL-based block- and system
level verification and performance analysis. I check the correct functionality and interoperability of
next-generation HyperTransport chipsets for AMD's hammer series.
Publications [Toc] [Top]
Parametrizable Hybrid Stack-Register Processor as Soft Intellectual Property

Module

Study projects
Paper about our "SILVERBIRD" Processor Soft IP-

Module, Swiss Federal Institute of Technology,
Zurich, Switzerland
written for the 13th Annual IEEE International ASIC/
SOC Conference 2000,
Washington D.C., Virginia USA,
13th - 16th September, 2000
Verification Glue: How to compose system-level environments

Presentation about the verification concept at AMD
Dresden Design Center, Dresden, Germany
written for "Verisity's Club Verification"
3rd Annual European Specman User Group
Conference,
DATE03, Munich, Germany,
3rd March, 2003
Awards [Toc] [Top]
AMD Fab 30 Vice President's Award
Acknowledgment for outstanding achievements at

AMD Fab 30 Saxony
"... for your excellent diploma thesis 'Performance Analysis of AMD Southbridge Zorak' and extensive
documentation of the software structure and its internal blocks - the prerequisite for further usage and
development ..."
Dresden - May 30, 2001

Hans Deppe, Vice President and General Manager AMD Fab 30 Saxony

Study projects
Best Paper Award "Verisity's Club Verification"
Best Paper Award at "Verisity's Club Verification" for

"Verification Glue: How to compose system-level
environments"
Peter Lthi, Ulrich Hensel
AMD Dresden Design Center, Dresden, Germany
Verisity's Club Verification

3rd Annual European Specman User Group Conference,
DATE03, Munich, Germany,
3rd March, 2003
[Toc] [Top]

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Links to electronic sites
Links
Electronic Links
Microchip PIC Links
R/C Links
GPS Links
Data Sheets & Application Notes
Colleague's Sites
Electronic Links [Toc] [Top]
Electronics Engineering WebRing

Electronic ressources.
Interfacing the PC (beyondlogic.org)
Craig Peacock's must-known website, if electronics engineering is your business.
The RS232 Standard
Excellent RS232 utorial and data sheet.
How to control HD44780 based LCDs
Describes the basics of the HD44780 based character LCDs.
IP & Ethernet Interfaces
About selfmade Ethernet Interfaces.
CircuitDesign RF devices
Several wireless transmitter and receiver products. Circuit Design specializes in design and
manufacturing of low power radio transmitter, receiver and transceiver modules and modems in the
category of Short Range Devices (SRD) in the license exempt free band.
RF Micro Devices
Several wireless transmitter and receiver products.
Modtronix.com
Modular PIC based hardware and software, e.g. embedded ethernet solutions.
http://www.electronic-engineering.ch/microchip/links.html (1 of 4)12/02/2008 17:13:10

Xsens.com
Embedded inertial navigation solutions.
IO.DLL
Universal Windows I/O driver, IO.DLL allows seamless port I/O operations for Windows 95/98/
NT/2000/XP using the same library
Wireless World AG
Swiss distributor for various wireless components
Microchip PIC Links [Toc] [Top]
The PICmicro WebRing

Collection of PIC resources.
Embedded 10BaseT Ethernet
Excellent page about connecting a PIC to the Ethernet.
PIC Frequency Meter
Frequency measurement up to 80 MHz with PIC16F84.
EEPROM 24LC16
Serial EEPROM routine & various PIC stuff.
PIC Propeller Clocks
Bob Blick's "Propeller Clock" page.
The Embedded WebRing
Collection of PIC and other embedded controller applications.
Microchip Net Ressources
Huge PIC ressource page.
R/C Links [Toc] [Top]
RC data logger with altitude capture

German page about a self-made RC data logger using PIC 16F84 and MPXS 4100A absolute pressure
sensor.

CLONEPACs for Futaba Radios (16 kB CAMPAC)

Self-made memory extension modules for Futaba R/C transmitters. They do work and are currently in
service in my Futaba FC18 V3 Plus radio. One 16 kB CAMPAC clone provides storage capacity for
11 models within the FC18 transmitter. See my own 16 kB ClonePacs here.
Considering more than 16 kB? Then have a look at Model-Gadget's Ultra-PAC-II.
Autonomous Unmanned Aircraft Vehicle (AUAV)

Dave Jones impressive experiences with installing GPS receiver and gyroscopes on a model airplane
to fly autonomously 48 miles or 1 hour 8 min. It worked, although it was very adventurously...
GPS Links [Toc] [Top]
u-blox GPS
Swiss miniature MCM* 12 channel GPS receiver.
* Multi-Chip-Module
Larry's Garmin connector
Interface your GPS to a computer using the RS232 port.
Peter Bennett's GPS and NMEA Site - Garmin Support
Data Sheets & Application Notes [Toc] [Top]
National Semiconductors
Philips Semiconductors Search
Freescale Semiconductors (formerly Motorola Semiconductors)
Freescale Semiconductors Sensor Index (Pressure,...)

Sensor Selector Guide, data sheets and application notes about pressure sensors.
TI Semiconductors Search
TI Product Information & Document Search
Infineon
Maxim Semiconductors
Linear Technology

QuestLink
Free subscription, very good for everything!
Microchip PIC Microcontroller
Manufacturer of my micro-controllers. You can get there all PIC data sheets, many application notes
and the MPLAB Integrated Development Environment for free.
Fairchild Semiconductor
Chip directory
Colleague's Sites [Toc] [Top]
www.tmoser.ch
Thomas Moser has studied electrical engineering together with me. He worked with me on the Swiss
SmartROB Contest and the Low Budget Inertial Navigation System. He is interested in network and
distributed computing, and embedded systems engineering.
www.lka.ch
Lukas Karrer has also studied electrical engineering with me. We did not work together on any
projects, but we had a great time. He is interested in network computing (founder of swiss non-
commercial Unix-dedicated website www.trash.net), and web content usability (start-up www.stimmt.
ch).
www.zwickers.ch
Thomas Zwicker, another study colleague, is interested in network computing and image processing
algorithms. He is busy with developing an autonomous flying radio controlled helicopter.
[Toc] [Top]

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Free software for electronic applications - for Windows 95/98/ME/NT/XP
Software
Electronics
Item Size File
RS232 Scope V1.02 (Excel 97 Worksheet with Visual Basic Macro)
RS232 Debug Interface (Excel 97 Worksheet with Visual Basic Macro)
DCF77 Capture & Visualization (Excel 97 Worksheet with Visual Basic Macro)
Automatic Table Generator for MPLAB Assembler (Excel 97 Worksheet with Visual Basic Macro)
AudioAnalyser: It is a realtime audio analyser, the opposite

program to the signal generator below. Works with your PC
soundcard.
Sebastian Dunst, Windows XP
MultiSine: It is an audio signal generator for your PC in

combination with your soundcard.
Sebastian Dunst, Windows XP
Windows 95 HyperTerminal
because Windows 98 HyperTerminal does not echo locally typed 153 kB HyperTerminal95.zip
characters.
2-Channel AC-Oscilloscope for your PC soundcard, that means

20 - 20'000 Hz
68.4 kB scope.zip
Windows 95/98
http://www.electronic-engineering.ch/microchip/software/soft.html (1 of 2)12/02/2008 17:13:10

Free software for electronic applications - for Windows 95/98/ME/NT/XP
Improved 2-Channel AC-Oscilloscope for your PC soundcard,

that means 20 - 20'000 Hz
Windows 95/98
88.4 kB osc251.zip
implemented by a student at Moscows State University, Physic
Dep., Homepage with Versions for Win3.x/Win95
Frequency Analyzer for your PC soundcard, that means 20 -

20'000 Hz
31.9 kB freq.zip
Windows 95/98
Collection of nice Windows Tools
Item Size File
This page has been created using HomeSite V1.2, an excellent HTML source
503 kB hs12.exe
code editor implemented by Nick Bradbury. Windows 95/98
Virtual desktop for Windows 95/98 (to get several desktops like in Unix/
Linux systems, crucial for convenient programming, but presumes enough
234 kB sDesk.zip
RAM for smooth operation, works fine with 128 MB RAM and 500 MHz
CPU)
For Windows XP, use the Microsoft PowerToys to get multiple desktops.
Terragen: A tool to create fascinating pictures of artificial sceneries and

landscapes, ability to create movies of a collection of artificial landscapes
(with additional tool), excellent to unleash the full power of your PC (I have Link: Terragen
made a movie, for which the calculation of all 700 images took 3 days on a
700 MHz Athlon...)
[Toc] [Top]

click here
http://www.electronic-engineering.ch/microchip/software/soft.html (2 of 2)12/02/2008 17:13:10

Data Sheets: PIC instruction set, LCDs, RS232, AT keyboard, DCF77, pressure sensors,...
Data Sheets
Microchip PIC Controllers

Dot Matrix LCD Displays
Graphic LCD Displays
RS232 Drivers
Connectors
Miscellaneous
Microchip PIC Controllers [Toc] [Top]
PIC Instruction Set Quick Reference Quick reference of all PIC instructions, including special
instruction mnemonics. This data sheet was extracted with
GhostView directly from document DS33014G, MPASM
User's Guide, pp. 196-209.
(PDF, 116 kB)
Dot Matrix LCD Displays [Toc] [Top]


http://www.electronic-engineering.ch/microchip/datasheets/datasheets.html (1 of 4)12/02/2008 17:13:11

This is the standard connection for dot matrix LCD displays. It

fits perfectly and easiest with a 2 x 7 press connector for 14
rods flat band wire.
Hitachi HD44780 Data Sheet Everything about the dot matrix LCD controller IC Hitachi
HD44780.
(PDF, 389 kB)
Samsung KS0073 Data Sheet Everything about the dot matrix LCD controller IC Samsung
KS0073.
(PDF, 673 kB)
HD44780 Controller: Brief overview HTML Webpage (local)

Describes all important commands not explained in "The
Extended Concise LCD Data Sheet":
The standard character set, the programming of the self-defined
characters and the software reset.
The Extended Concise LCD Data Sheet Describes all commands for the Dot Matrix LCD Display.
This document is based on the earlier version "The Concise
LCD Data Sheet" written by Craig Peacock, Australia. Thanks
also to Craig Peacock, who made a smaller PDF 1.2 file with
an original Acrobat PDF Writer.
(PDF, 44 kB)
As Word-Doc 7.0 file, 66 kB

The file has been written by myself and contains NO macro
virus.
As PostScript file, 274 kB
EA-DIP204-4 with KS0073 (PDF, 248 kB, english)

Product specification of 4x20 LCD. Lists the Extended
EA-DIP204-6 with KS0073 (PDF, 182 kB, german only)
Function Set of the Samsung KS0073 LCD controller.
or go directly to the german site Electronic Assembly
Link: How to control HD44780 based LCDs Describes the basics of the Hitachi HD44780 based character
LCDs.
(Peer Ouwehand's LCD pages)
Graphic LCD Displays [Toc] [Top]

Principles of Operation Explains the principles of graphic LCD modules, graphic

controllers and shows timing diagrams.
(PDF, 87.5 kB)
Application Notes Application notes concerning contrast regulation, temperature

dependency and compensation.
(PDF, 47 kB)
RS232 Drivers [Toc] [Top]
Max232 Data Sheet RS232 line driver (serial communication)

(PDF, 320 kB)
RS232 terminology of DTE and DCE

RS232 DTE/DCE FAQ
(PDF, 144 kB)
Connectors [Toc] [Top]
Pinout of various Connectors HTML Webpage (local)
Link: The RS232 Standard HTML Webpage (link)

Excellent RS232 Tutorial and Data Sheet !
Miscellaneous [Toc] [Top]
ASCII Character Map ASCII map containing representations in range 33 - 255 of

decimal, binary, hexadecimal, and characters
(PDF, 18.9 kB)
AT Keyboard Specification (PDF, 189 kB)
DCF77 Time and Standard Frequency Station HTML Webpage (local)
MPX4100A Motorola Absolute Pressure Sensor Series MPX4100A

(PDF, 117 kB)
Motorola SensorSelectorGuide Motorola Sensor Selector Guide

(PDF, 166 kB)
AN1646 Noise considerations for integrated pressure sensors

(PDF, 153 kB)
[Toc] [Top]


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FAQ for Microchip PIC 8 bit microcontroller programming
PIC FAQ Section

Frequently asked questions for Microchip PIC 8 bit microcontroller programming
How I started microcontroller programming

Why I use PIC microcontrollers
How to start with PIC microcontrollers?
PIC16F84
PIC16F77
PIC16F877
Which development environment do I use?
First steps in PIC programming
Common programming questions
How to assemble PIC code in MPLAB
Advanced steps in PIC programming
General
Paging - large code considerations
High level languages
C
Debugging hints
General
RS232 communication issues
LCD communication issues
In case of errors
Compile errors
Page crossings
PIC History
Call it RISC...
Scientific curiosity
From I/O handling to RISC controller
How I started microcontroller programming [Toc] [Top]
I first entered the microcontroller world with a proprietary, mask-programmed controller kit bought from Conrad Electronics, a german electronics distributor. It was a Conrad C-Control Basic kit, a
68HC05B based controller board with RS232 link and an external serial EEPROM as program memory. The user develops its application in a kind of BASIC programming language, which is
afterwards translated by the development software into byte-tokens. The byte tokens are then loaded into the serial EEPROM. During execution, the controller reads these byte-tokens from the
external EEPROM and interprets them using the internal, pre-programmed routines. For first contact with microcontrollers, it was a good approach, although there were some unsatisfying facts:
proprietary solution using mask-programmed routines in the controller

rather slow execution and low performance
very limited data RAM
http://www.electronic-engineering.ch/microchip/faq/faq.html (1 of 12)12/02/2008 17:13:14
no tight control of hardware resources and its capabilities

an expensive solution if used in pervasive computing (a single and simple mask-programmed controller unit costs about 25 US-$)
These reasons have lead me to change to another controller solution. Finally, I decided to change to the Microchip PIC controllers.
Why I use PIC microcontrollers [Toc] [Top]
The Microchip PIC microcontrollers are a convenient and cost-effective solution for a lot of home-made applications, because:
PIC microcontrollers are widely available (Farnell, Conrad, Disterelec,...)

PIC controllers are cheap and do not require a lot of prerequisites before running in an application (i.e. additional HW blocks such as external EPROM for program memory, external A/D
converter,...)
the PIC development environment is freely available and up-to-date
there is a broad range of different PIC microcontrollers, very likely to fit into your target application
the hardware programming itself is easy and does not require a lot of additional equipment (like JTAG programmer, EPROM/flash programmer)
the various packages available (DIP, SSOP, SOIC, TQFP, PLCC,...), even with low pin counts, allow for convenient prototyping without big initial efforts
Although I use PIC microcontrollers often, I would not consider the PIC microcontroller as high-performance RISC controller - as claimed by the manufacturer. High-performance - compared to
what? There is no reference for comparison given...
On the other hand, I personally would implement a more sophisticated architecture based on one instruction per oscillator cycle, i.e. 1 MIPS @ 1 MHz. This is more power-efficient and would at least
indicate that there is best use made of every clock cycle when using a single execution pipeline. For the core, I would check the requirements carefully and decide whether to use a two, three or four
stage pipeline. And for not loosing any performance, additional delayed-branching would be introduced. A deeper stack for the program counter may also be suitable, especially when serving a lot of
interrupt sources and doing prioritized interrupt handling in software (i.e. another high-priority ISR call during a low-priority ISR call). Finally, an ability to check the stack levels used would also be
welcome, as well as hardware-based context save on entrance and exit of the interrupt service routine.
How to start with PIC microcontrollers? [Toc] [Top]
I started with the PIC16C84 (an early EEPROM version of today's standard flash version 16F84).
Today, I would say, the PIC16F84 is the best-suited Microchip RISC controller to start with:
PIC16F84
reasonable hardware complexity for beginners

only 35 RISC instructions
easy to program, even with self-made PIC programmers (search the web)
sufficient performance for ordinary controller-applications, up to 5 MIPS @ 20 MHz
8-level deep hardware stack (for calling sub-routines)
has internal and external interrupt support (e.g. timers, port change), total of 4 interrupt sources
ability to store non-volatile data in internal EEPROM (64 bytes)
18 pin package (DIP18)
Once you have acquired some experience in PIC programming and you are familiar with the PIC architecture, I suggest to switch to the PIC16F77 (that's what I did also). It offers a lot of peripheral
hardware blocks, so that you don't have to handle this in software (e.g. RS232 transmission and reception):
PIC16F77

instruction set is the same as for the PIC16F84

much larger instruction memory (8k words) and data RAM (368 bytes), but no internal EEPROM (non-volatile data storage)
provides many additional hardware resources, e.g.
- universal synchronous asynchronous receiver transmitter (USART) for RS232 or similar interfaces
- synchronous serial port (SPI) with SPI master mode and IC slave mode
- parallel slave port
- capture/compare/PWM blocks
- 8 bit A/D converter (8 channels)
total of 12 interrupt sources (internal and external interrupts)
You can also switch directly to the PIC16F877, which offers additional peripheral interfaces, especially if you want to connect some IC peripheral components:
PIC16F877
same pin-out as the PIC16F77

superior features compared to PIC16F77:
- 10-bit A/D converter (8 channels)
- IC master mode
- internal EEPROM (256 bytes non-volatile memory)
- analog comparators
total of 15 interrupt sources (internal and external interrupts)
self-reprogrammable under software control (boot-loader)
Get the latest data sheets at www.microchip.com
Which development environment do I use? [Toc] [Top]
I started with the PICSTART Plus development programmer from Microchip in 1998, and I still use the same programmer today:
PICSTART Plus Programmer: with firmware v4.30.04 (software-upgradable), RS232,

costs about 200.00 US-$, ordering information
In-Circuit Debugger 2: (ICD2) bought recently, USB1.1 & RS232,
costs about 200.00 US-$ with 40 pin ICD header and power supply, ordering information
Microchip MPLAB IDE v7.10: free development environment using PIC assembler

PICSTART Plus Programmer In-Circuit Debugger 2 (ICD2)

from Microchip, incorporates the flash-upgrade kit from Microchip, allowing to debug the current processor state, internal
and latest firmware registers and EEPROM data by setting breakpoints in the program code
(#DV003001, ~200.00 US-$) within the MPLAB IDE development environment
(#DV164005 or #DV164007, #AC162051, ~200.00 US-$)
This setup programs most PIC microcontrollers (PIC12xxx, PIC16xxx, PIC17xxx, PIC18xxx), and allows firmware updates whenever new PIC controllers come out. I have never experienced any
issues using this commercially available programmer with the Windows operating system (Win95, Win98, WinXP). You just have to ensure that the intended RS232 port to use is in the range of
Com1 to Com4.
The latest version of the PICSTART Plus programmer allows instant software-based firmware updates to the internal flash controller. See buy.microchip.com for ordering details.
PICSTART Plus Processor Upgrade Kit

from Microchip, includes flash-based microcontroller for
firmware upgrades
(#UK003010, ~29.00 US-$) PICSTART Plus Programmer PICSTART Plus Programmer
before installing the upgrade kit, just with after installing the PICSTART Plus Processor Upgrade Kit
PIC17C44JW and firmware v3.11
Years ago, I had to buy an extra PIC controller (UV-erasable PIC17C44JW) and had to burn the corresponding firmware to it (HEX-file supplied with MPLAB IDE). But Microchip abandoned this
re-programming procedure of the 17C44JW some times ago. Today, the firmware upgrade of the programmer is performed directly from MPLAB IDE, but only if you have one of the lastest flash-
based PICSTART Plus programmer, or installed the PICSTART Plus Processor Upgrade Kit (containing a PIC18F6720) in your elderly programmer (#UK003010, costs about 29.00 US-$, ordering
information).
For ambitious starters, I recommend to order:
In-Circuit Debugger 2 (ICD2): #DV164005 or #DV164007 (additional RS232 cable & power supply)
40 pin ICD header: #AC162051
optional: Universal Programming Module for ICD2: #AC162049
Note that with ICD2:
the PIC16F87x can be both, in-circuit debugged and programmed

the PIC16F7x can only be programmed
the PIC16F84A can only be programmed
Please see also the latest* README text files for PICSTART Plus (17 kB) & ICD2 (32 kB)
* by 19.06.2005
Citing Microchip's readme.txt of PICSTART Plus programmer:
"Program and read problem of PIC16F87X
PIC16F87X devices are shipped with low-voltage programming enabled. PICSTART Plus programmer uses
the high-voltage programming method. Some devices do not exit programming mode properly if low-voltage
programming is enabled, resulting in invalid read and programming operations.
Place a 10 Kohm resistor between the RB3 pin and one of the ground pins on the programming socket. Refer
to the device datasheet for the pinout of the specific device."
First steps in PIC programming [Toc] [Top]
As first step, read the documentation of your controller, especially the memory and register architecture, the instruction set (PIC Instruction Set Quick Reference) and the I/O port section. Then try to
implement a blinking LED application using the PIC16F84 and a busy loop for waiting (you can also use my assembler module m_wait.asm).
If your LEDs are blinking, you certainly want to connect your controller to your PC to exchange some data. Build a RS232 hardware setup with a MAX232 level shifter and a PIC. If you use the
PIC16F84, the RS232 communication must be done by software. You can use the 'Simple RS232 interface'. Try first to burn the provided HEX-file onto the PIC16F84 to check for proper HW-setup.
Once everything is working well, you can get the assembler source code and change the content according to your needs.
Common programming questions [Toc] [Top]
Question: What kind of instructions are BANK1 and BNEQ?
Answer: These are my standard macro definitions declared in the module file m_bank.asm. If you include this module file in your main program, you can make use of these instruction macros. For
instance, the macro BANK1 performs a memory bank change to bank 1. Further, the macro BNEQ 0x23,LAB1 translates to 'branch on not equal w and 0x23' and performs a jump to label LAB1, if
the working register w does not match the value 0x23.

Question: What kind of instructions are BNZ and SKPNZ, since they are not listed in the Instruction Set Chapter of my PIC controller?
Answer: These are 'Special Instruction Mnemonics' listed in Table B.11 in the PIC Instruction Set Quick Reference, i.e. built-in mini-macros of the MPLAB assembler. For instance, SKPNDC
translates as 'Skip on no digit carry' and simply assembles BTFSC 3,1.
How to assemble PIC code in MPLAB [Toc] [Top]
Only declare the main assembler file as source file in the MPLAB project. For instance, this is the file PIC_Test.asm in the project PIC_Test.mcp below on the picture. It will generate a HEX-file
named PIC_Test.hex when you execute 'build' or 'build all'. Ensure that the pathes to the include files exist - or remove the pathes and copy the include files to the directory of the main source.
The include files must not be listed for separate compilation under the MPLAB Project. They are just included in the main source through include statements. During assembly time (MPASM), these
files are just inline expanded and treated as normal assembler code. Separate compilation is neither needed nor possible, since I've written the module code for inline compilation (and initially for
simplicity) with no object or linker directives.
Of course, when project size and complexity increases, one may consider to rewrite the code to object-based sources...
MPLAB IDE
showing the project source file (PIC_Test.asm)
to be assembled by MPASM.
Advanced steps in PIC programming [Toc] [Top]

General [Toc] [Top]
Once the communication between the PIC controller and the PC is running successfully, I suggest to implement a visual interface on your peripheral device (the PIC controller). This can be done
easiest by using a commonly available dot matrix LCD and one of my LCD assembler modules.
If more sophisticated I/O functionality is desired, you can consider to attach a standard AT keyboard (ordinary PS/2 PC keyboard) to the microcontroller. Look therefore at the AT keyboard projects.
Paging - large code considerations [Toc] [Top]
When your code grows, you will run into the architectural issues of the PIC microcontroller. The PIC instruction set has been defined - in early days - as a natural engineering trade-off between
functionality and program memory requirements. One advantage of a larger instruction word width is the increase in direct addressable space for immediate instructions, e.g. 'CALL Label' with Label
resolved to a program memory location by the linker/assembler. On the contrary, larger instruction word width require more program memory, what results in larger chip area and therefore higher
manufacturing costs.
The PIC16xxx microcontroller series features immediate address instructions (e.g. 'CALL' or 'GOTO'), which support 11 bit immediate values. Using 11 bits for immediate addressing, we can only
address 2k words in the program memory. But what if we want to support larger memory space? One possibility to work around this limitation is to introduce a new instruction in order to jump
between the different 2k memory blocks. That's why we need to deal with the upper two bits ([4:3]) of the PCLATH register. These bits cannot be altered with 'CALL' or 'GOTO' instructions, but
need to be set manually before the jump.
There is quite a good discussion and elaboration of methods to deal with paging for the PIC16xxx microcontrollers on this site.
High-level languages [Toc] [Top]
C [Toc] [Top]
There exist several commercial solutions to program the PIC microcontroller in C. Unfortunately, little of them are available for free.
If you know other free C compilers, you are kindly requested to email me. I will add it to the list below.
List of free C compilers (not exhaustive):
A limited edition of HI-TECH's PIC C compiler is available for free on this site. It is intended to be used with PIC16F84 and 16F877, although with limitations in memory usage and/or code
size. (No personal experience with this compiler so far.)
Debugging hints [Toc] [Top]
General [Toc] [Top]
Write only small pieces of new code, whenever possible within a simplified test program.
Most hobby-developers have no expensive in-circuit debugger tool (real-time debugging in the target application using specific software, with breakpoints and register watches). Use therefore
dot matrix LCD and/or RS232 interface for debugging.
Use encapsulated well-verified blocks, which you put together as parameterizable building blocks in the target application.
For large projects, try to use object code and the linker provided by Microchip MPASM IDE.

RS232 communication issues [Toc] [Top]
In case you have built a PIC application including serial communication (RS232), but it does not work properly, try to debug it the following way:
1. Write a simple PIC assembler program for the PIC16F84 @ 4 MHz using the module m_rs096.asm. The program keeps transmitting a dedicated character every second, e.g. something like:
LOOP SEND '@'

WAITX d'16',d'7' ; 1.045 s @ 4 MHz, extended with specific prescaler
goto LOOP
You may also use one of the communication test programs, commtest1.asm or commtest2.asm, which transmit constantly status messages '@' and echo on every received character.
2. Setup the HyperTerminal program (Win9x, WinXP) using the standard settings as follows:
Standard RS232 ComPort settings

(9600-8-N-1)
Start the HyperTerminal application using the standard settings. It should now receive a '@' every second from the PIC microcontroller. If not, check the MAX232 and the RS232 connectors, until
you receive the characters...

LCD communication issues [Toc] [Top]
Question: I can not figure out the connection between dot matrix LCD and PIC microcontroller. Do you have a schematic?
Answer: Basically, there is a text description in the header section of each LCD assembler module file. But here is also a PDF schematic to illustrate the connection between display and controller.
Question: I have downloaded from your site the assembler module file 'm_lcd_bf.asm' for my PIC project. The LCD display I use is a 20x4 (CrystalFontz CFAH2004A-TMI-JP), but it does not
work. I dont see any character and the problem is not the contrast
Answer: I've recently adapted some parts of the initialization section of the LCD module files (longer wait delay after display clear). I assume you have a newer type of display controller than the
traditional Hitachi HD44780 (PDF data sheet, 389 kB). In case you have the LCD controller Samsung KS0073 (PDF data sheet, 673 kB), you have to set the constant 'LCDTYPE' to 0x1 in your main
program. This adds specific configuration commands of the new controller type, i.e. the extended function set to set up the line count (PDF data sheet, 186 kB). You may have to adapt the line count
to your KS0073-type display in the extended function set part of the LCD initialization section of the LCD module file (e.g. m_lcde.asm).
If this does not help, try to use longer delays for the initialization procedure.
Below the declarations for the module file m_lcde.asm. First try the circuit with a 4 MHz crystal, later on with 20 MHz. If this does not work, you may have to adapt the initialization section to your
specific display controller (latency, commands). But first try with the standard settings for PIC16F7x and 4 MHz:
LCDtris equ TRISD ; LCD data on low nibble of portD

LCDport equ PORTD
#define LCD_ENtris TRISE,0x00 ; EN on portE,0
#define LCD_EN PORTE,0x00
#define LCD_RStris TRISE,0x01 ; RS on portE,1
#define LCD_RS PORTE,0x01
#define LCD_RWtris TRISE,0x02 ; RW on portE,2
#define LCD_RW PORTE,0x02
CONSTANT BASE = 0x20 ; base address of user file registers
#include "..\m_lcde.asm"
In case of failure, ensure that you do not use the temporary registers at BASE+0 - BASE+3 elsewhere in your code, especially not in your interrupt service routine (ISR)! If this setup works perfectly,
you may upgrade to the more efficient LCD modules m_lcde_bf.asm or m_lcdexbf.asm (busy flag instead of wait loop).
In case of errors [Toc] [Top]
Compile errors [Toc] [Top]
If you cannot compile the projects and errors like below appear, you did not specify the path to your include files correctly. Check the '#include' statements:

The errors generated by wrong '#include'-pathes look like:
Executing: "C:\Tools\Electronics\MPLAB_64\MCHIP_Tools\mpasmwin.exe" /q /p16F84 "LCDx_test.asm" /

l"LCDx_test.lst" /e"LCDx_test.err"
Error[101] ..\..\M_LCD.ASM 113 : ERROR: (Missing include file: m_bank.asm)
Error[101] ..\..\M_LCD.ASM 116 : ERROR: (Missing include file: m_wait.asm)
Error[113] ..\..\M_LCD.ASM 279 : Symbol not previously defined (LCDclk)
Error[122] ..\..\M_LCD.ASM 290 : Illegal opcode (WAIT)
Error[122] ..\..\M_LCD.ASM 296 : Illegal opcode (LCDWAIT)
Error[116] ..\..\M_LCD.ASM 184 : Address label duplicated or different in second pass (BANK0)
Error[108] ..\..\M_LCD.ASM 189 : Illegal character (4)
Page crossings [Toc] [Top]
Although most of my code is below the critical size of 2k instruction words, page crossings may occur if you extend the assembler source code to your needs. Please read the recommendations about
paging above.
PIC history [Toc] [Top]
Below are some interesting text snippets found on the web about the history of Microchip PIC controllers.
Call it RISC... [Toc] [Top]
Citing John Bayko (Tau), <john.bayko@sk.sympatico.ca>:
A complete version of John Bayko's interesting 'Great Microprocessors of the Past and Present' may be retrieved at http://www.sasktelwebsite.net/jbayko/cpu.html.
The roots of the PIC originated at Harvard university for a Defense Department project, but was beaten by a simpler (and more reliable at the time) single memory design from Princeton. Harvard
Architecture was first used in the Signetics 8x300, and was adapted by General Instruments for use as a peripheral interface controller (PIC) which was designed to compensate for poor I/O in its 16
bit CP1600 CPU. The microelectronics division was eventually spun off into Arizona Microchip Technology (around 1985), with the PIC as its main product.
The PIC has a large register set (from 25 to 192 8-bit registers, compared to the Z-8's 144). There are up to 31 direct registers, plus an accumulator W, though R1 to R8 also have special functions -
R2 is the PC (with implicit stack (2 to 16 level), and R5 to R8 control I/O ports. R0 is mapped to the register R4 (FSR) points to (similar to the ISAR in the F8, it's the only way to access R32 or
above).
The PIC16x is very simple and RISC-like (but less so than the RCA 1802 or the more recent 8-bit Atmel AVR microcontroller which is a canonical simple load-store design - 16-bit instructions, 2-
stage pipeline, thirty-two 8-bit data registers (six usable as three 16-bit X, Y, and Z address registers), load/store architecture (plus data/subroutine stack)). It has only 33 fixed length 12-bit
instructions, including several with a skip-on-condition flag to skip the next instruction (for loops and conditional branches), producing tight code important in embedded applications. It's marginally
pipelined (2 stages - fetch and execute) - combined with single cycle execution (except for branches - 2 cycles), performance is very good for its processor catagory.
The PIC17x has more addressing modes (direct, indirect, and relative - indirect mode instructions take 2 execution cycles), more instructions (58 16-bit), more registers (232 to 454), plus up to 64K-
word program space (2K to 8K on chip). The high end versions also have single cycle 8-bit unsigned multiply instructions.
The PIC16x is an interesting look at an 8 bit design made with slightly newer design techniques than other 8 bit CPUs in this list - around 1978 by General Instruments (the 1650, a successor to the
more general 1600). It lost out to more popular CPUs and was later sold to Microchip Technology, which still sells it for small embedded applications. An example of this microprocessor is a small
PC board called the BASIC Stamp, consisting of 2 ICs - an 18-pin PIC16C56 CPU (with a BASIC interpreter in 512 word ROM (yes, 512)) and 8-pin 256 byte serial EEPROM (also made by
Microchip) on an I/O port where user programs (about 80 tokenized lines of BASIC) are stored.
Scientific curiosity [Toc] [Top]
Citing Len Umina <umina@kirk.mchip.com> from http://www.brouhaha.com/~eric/pic/faq.txt:
Actually, the PIC architecture was first integrated by Signetics for a company in San Jose (Scientific Memory Systems as I recall) using Bipolar technology and dubbed the 8X300. Prior to that, the
architecture had been a scientific curiosity since its invention by Harvard University in a Defense Department funded competition that pitted Princeton against Harvard.
Princeton won the competition because the mean time between failure (MTBF) of the simpler single memory architecture was much better, albeit slower, than the Harvard submission. With the
development of the transistor and IC's, the Harvard Architecture is finally coming into its own.
Microchip has made a number of enhancements to the original architecture, and updated the functional blocks of the original design with modern advancements that are in concert with existing
architectural processes and
enabled by the low cost of semiconductors.
From I/O handling to RISC controller [Toc] [Top]
Citing Alex R. Baker <alex@microchp.demon.co.uk> from http://www.brouhaha.com/~eric/pic/faq.txt:
Back in 1965, General Instruments (GI) formed a Microelectronics Division, and indeed used this division to generate some of the earliest viable EPROM and EEPROM memory architectures. As
you may be aware, the GI Microelectronics Division were also responsible for a wide variety of digital and analog functions, in the AY3-xxxx and AY5-xxxx families.
GI also generated a 16 bit microprocessor, called the CP1600, in the early 70s. This was a reasonable microprocessor, but not particularly good at handling I/Os. For some very specific applications
where good I/O handling was needed, GI designed a Peripheral Interface Controller (or PIC for short), in around 1975. It was designed to be very fast, since it was I/O handling for a 16 bit machine,
but didn't need a huge amount of functionality, so its microcoded instruction set was small. Hopefully, you can see what's coming....yes, the architecture designed in '75 is substantially the PIC16C5x
architecture today. Granted, the1975 version was manufactured in NMOS, and was only available in masked ROM versions, but still a good little uC. The market, however, didn't particularly think
so, and the PIC remained designed in at a handful of large customers only.
During the early 80s, GI took a long hard look at their business, and restructured, leaving them to concentrate on their core activities, which is essentially power semiconductors. Indeed they are still
doing this very successfully now. GI Microelectronics Division became GI Microelectronics Inc. (a wholly owned subsidiary), which in 85% was finally sold to venture capital investors, including
the fab in Chandler, Arizona. The venture capital people took a long hard look at the products in the business, and got rid of most of it - all the AY3- and AY5- parts and a whole bunch of other stuff,
leaving the core business of the PIC and the serial and parallel EEPROMs. A decision was taken to restart the new company, named Arizona Microchip Technology, with embedded control as its
differentiator from the rest of the pack.

As part of this strategy, the PIC165x NMOS family was redesigned to use one of the other things that the fledgling company was good at, i.e. EPROM - the concept of the CMOS based, one-time-
programmable (OTP) and eraseable EPROM program memory PIC16C5x family was born.
[Toc] [Top]

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MIDI related hardware applications, based on PIC mcu's (in 'Hardware' section). Luminary Micro Stellaris
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Homepage of Johan Granzier

Jal Editor, Pic16F84 projects made with Jal, Electronics, Etching
Nyholms PIC Site!!

Take a look at my Car Alarm with a PIC16F84 microcontroller.
Dincer's PIC Page

Using Z80 like mnemonics to write PIC programs.
microelectronics info for hobbyist

Informations about microelectronics, microcontrollers and other stuff I found interesting.
Andy Programming
View and get updates of current and future projects, download source code for both windows and dos.
Mat's electronics corner

Place for the electronics enthusiast.
Robotics UK
Welcome to robotics UK, i'll show you how to use a PIC in robotics
Picl by EarthLCD.com "We Make LCD's Work"

The PicL by EarthLCD.com is a low cost PIC16F877 Based 240 x 64 Monochrome - Also ezLCD-001 is the
only COLOR graphic LCD that will work with the Basic Stamp!!! IT features a COLOR 2.7" reflective 256
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jonathan's PIC ASM and PC Programming Project

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Davshomepage
Back to Last update:
homepage 9/1/2006
Welcome to my site
Decode IR
RC5 code PICmicro Sites
Panasonic code Get this free Prev | Ring Hub | Join | Rate|
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Daewoo protocol
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Sony code
Pic sourcecode for
You can find on my site:
Sony IR protocol
JVC protocol Information about infrared light:
Tinyserir-RC5
Decode ir: On this page you can find a description about the basics of using infrared light for remote control,
RC5 receiver
what you need to decode it and what you can do with it: for example control you pc, windows, winamp or mp3
pic18f bootloader player.
PIC sourcecodes
Detailed description of the folowing different remote protocols:
Leds
Constant current RC5 protocol: Originally developed by Phillips and the most popular for hobby projects.
source for Leds Sony SIRC protocol:Also popular for hobby but less than the rc5 protocol
Always winning with Panasonic protocol
roulette JVC protocol
Daewoo protocol
Datasheets
Links
Who am I
http://users.telenet.be/davshomepage/ (1 of 3)12/02/2008 17:13:55

Davshomepage
Control your pc with an infrared remote protocol, Pic sourcecodes and hobby projects:
Pic sourcecode for sony ir protocol: Here you can find the sourcecode and hexfiles to decode infrared signals of
a sony remote control with a pic microcontroller. With the buttons 0..9 you can control the output pins of the
controller.
The code is also serial transmitted on an output pin you can directly connect it to a pc and control windows or
mediaplayer and etc..
Pic sourcecodes:Here you can find different source codes for the microchip pic microcontrollers like the
pic16f84,pic16f628,pic12f629,pic12f675.
Tinyserir chip: A preprogrammed pic microcontroller for decoding RC5 infrared remote controls.
Tinyserirchip: Here you can find the description, the testprogram and datasheets of the tinyserirchip. You can
use this cheap and easy to use chip to control your pc, plc, robot and everything with a serial port. Because
windows is not realtime it can be hard to decode the fast ir signals. Because you need to sample many times it can
also slow down your system many times. But with the use of the tinyserirchip you can solve all these problems.
A microchip pic18f bootloader: The easy way to program your pics.
Bootloader page Yep here you can find how to make your own simple bootloader based on the application note
00851 of microchip, but I changed this a little bit.
Leds and constant current source information.
Leds: On this page you can find out what leds are, how you can connect it properly without troubles. How you
need to calculate the right value of the series resistor.
Constant current source: Here a detailed descripton of a constant current source with a LM317, how to use and
calculate them and of course the schematic (circuit). You can use it to connect white or blue leds, Luxeon
lumileds

Davshomepage
Always winning in the casino with roulette: it's not about cheating or other illegal actions but a simple trick.
Allways winning with roulette: Here you can read a tip for free how you can allways win with a roulette game
in a casino or online casino's. It's simple and pure mathematical not difficult to understand how it works.
Links and datasheets:
Links: A page with links of other electronic related pages.

Datasheets: Here you can some datasheets of electronic components.

Talking Electronics Home Page
Click HERE to buy the CD for $9.95 posted!
Our PIC Logic Probe with Pulser is ready!!!

5x7 Display is ready!!!
Multi-Chip Programmer is ready!!!
NEW! Dis-assembler for PIC16F84
NEW! "In-Circuit" Electrolytic Tester - is ready!!
NEW! Dial Alarm-1 - not ready a complete dialing alarm
the size of a pack of cigarettes!
NEW! TAXI PHONE - not ready auto dialing project.
NEW! PICF84 Data!
NEW!
NEW! Testing Transistors Diodes, Zeners, SM database!!
NEW! Circuit Symbols!
Latest News (newsletter) This is where all the latest news is placed.
NEW! 500 Pages of Theory! More than 500 pages of
electronics theory brought to you by Integrated Publishing.
(read 10 pages each time you visit and it will only take 2 months!)
(Do not click the "Message Alert" sign on this site - it is very annoying!)
Welcome to Talking Electronics PIC Programming Course.

This course covers the exciting world of programming PIC microcontrollers.
(Programmable Interface Chips). The two devices we are covering are PIC 12c508A and PIC
16F84.
Before starting this course you should have a good knowledge of basic electronics - especially
Play this game of 21 and see if connecting pick-up devices to the input of a microcontroller.
you win!! If you are starting-out, you should go to our BASIC ELECTRONICS course. It covers the design of
transistor stages (Interface Stages) needed to connect transducers (pick-up devices such as coils,
microphones, glass breakage detectors, etc) to PIC micro-controllers.
Once you know about Interfacing, you can go to PIC Theory section (covers the programming of
the two PIC chips), then the PIC Projects section, where you will find lots of applications for these
amazingly versatile chips. The first PIC project in this section is a Logic Probe with Pulser and
then a 5x7 Display project. You will also need our Multi-Chip Programmer to burn a PIC12c508A
for the Logic Probe. We have just designed an "add-on" for the 5x7 Display, an "In-Circuit"
Electrolytic Tester and are presently in the process of preparing the article for a '508A Dialing
Alarm. All the software for the projects can be downloaded via .zip files: 5x7 Display
Start New Game Experiments. The software for the multi-Chip programmer is: IC-PROG, (it's 500k!) see also: IC-
The dealer
Prog help-line and IC-Prog message Board To compile your .asm files to .hex you will need:
Deal me! MPASM.
always wins!!
Stand All our projects are designed to teach you both the theory of how the circuit works and how the
program for the microcontroller works. Never before has so much detail gone into a set of
projects. After you build a few of them you will have a good grounding in the basics of designing
and programming. Kits are available for everything and it's just a matter of getting started.
NEW BOOK 15th July
http://users.tpg.com.au/users/talking/ (1 of 3)12/02/2008 17:14:23

I am in the process of putting all the theory in the Library of Terms and Routines into a 400
page book with 4 main projects plus a number of other articles. This is a major undertaking and
although most of the information is available on the website, the convenience of having it in a
single reference source is driving me to complete the task - mainly because I want to have it as a
reference source myself. In the process, the work is being revised, updated and corrected.
The book will be published by TAB books and will cost US$24.95 It is still 2 months from
completion, then two more months for publishing and printing.
I will let you know when the release date comes closer.
New Things have happened! 30th September 2001

Some radical changes have occurred recently. I have been asked to start a new e-magazine for
POPTRONICS called POPTRONICS Interactive Edition. Read the full details in the
Newsletter.
After one year of writing for the site, I have removed my services and started my own interactive
site: TALKING ELECTRONICS Interactive.
The arrangement was quite simple. I was to provide an interactive site for the largest paper
magazine in the USA - POPTRONICS. All they had to do was put an article in their magazine
each month with a link to the site so the remainder of my detailed projects could be downloaded
from the web.
I sent them an article and waited. I sent them another article and waited. I sent them another
article and waited. I waited one year for a response! Not once did they reply!
The next thing I heard was the collapse of the magazine POPTRONICS!
How could you fail to be successful in the largest country IN THE WORLD?
Since I have not had a reply from the projects manager or the CEO of POPTRONICS, I have
decided to put all my projects on my own site: TALKING ELECTRONICS Interactive.
I have finally taken my own advice. Do everything yourself and don't rely on anyone to
do anything for you.
I think you will like my new site.
All the best

Colin.
100,000
hits plus:
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If you like this site, please recommend it!
Colin Mitchell
To (email): Talking Electronics
PO Box 486
Your e-mail:
Cheltenham,
Victoria, 3192
You can add your comments TOO! Australia
Talking Electronics,
Take a look at Talking Electronics 35 Rosewarne Avenue,
site: http://www4.tpg.com.au/users/ Cheltenham 3192
talking/index.html It has PICF84 Victoria Australia
micro programming and lots of Basic
Electronics Theory, with circuits that Tel: (03) 9584 2386
"move" on thesend
page! Also try their Fax: (03) 9583 1854
"easy" address: http://all.at/te
Website address: www4.tpgi.com.au/users/talking/ email: talking@tpg.com.au
Not Copyright 2003 Colin Mitchell - you can copy anything - in fact you should copy all the projects and data
sheets.

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USB PC Scopes, Logic Analyzers Data Loggers, Waveform
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Hytronic Electronics Easy to navigate with OK sites.
Electronic Transformer Various Ballasts and Motion Sensors. www.
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Data Acquisition, Signal Generation and Digital I/O with Matlab driver. hard to navigate with OK sites.
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PC Oscilloscope for $495
80 Ms/s oscope, logic analyzer, and waveform generator via USB for
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Technical Homepage of Mike Ellis
Office Cam The Multimedia Electronic Literature & Learning Internet Site Cam Page
This web site is dedicated to the advancement of electronic engineering skills.
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roboDNA - Robotic modules and software - Free Lego NXT PC Remote Software - Lego NXT Direct Commands
Version 2.0 Released!
RoboDNA's Dashboard Designer allows you to quickly and easily

build PC Dashboard Interfaces to remotely operate and monitor
robotic type devices over RS-232, USB, TCP-IP and 802.11.
It provides a visual drag-and-drop environment using Dashboard

Controls such as gauges, buttons and sliders, and provides the
following functions:
Drive-by-wire Operations
Autonomous State Operations
Piloted-Autonomous Operations
Telemetry Feedback
Monitoring Sessions
Beta Testers Sign-Up Here
RoboDNA's iRobot Create

Workspace allows you to
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you to quickly and easily build
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operate your Lego NXT robot over
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and WiFi from your PC.
Send Lego NXT Direct Commands to
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operate all of your robot designs.
commands to operate all
of Create's sensors and actualtors.
http://robodna.com/roboDNA/ (1 of 2)12/02/2008 17:15:13

roboDNA - Robotic modules and software - Free Lego NXT PC Remote Software - Lego NXT Direct Commands
RoboDNA's Dashboard Designer allows engineers and robot builders to quickly and easily build libraries
of Dashboard Interfaces to remotely operate prototypes from a PC.
The PicDem 2 Sample Workspace provides sample C code and a dashboard to interact with 8 bit PIC
parts.
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Flowchart from C/C++ code

Visual browser, Cross reference For the new member of software team.
www.sgvsarc.com
Manufacturers RFID Reader
Leader in embedded RFID for OEMs. reader modules, antennas &
more. www.skyetek.com
Bluetooth Serial Modules
Wireless Cable Replacement for Industrial & Medical Applications. www.
sena.com
TDI Power Systems

Global Supplier of AC and DC Power Conversion Products for OEMs.
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Rugged Quad Core Xeon
SBC for telco medical &
RISC processors & Microcontrollers industrial communication
1) Embedded Technology - RTOS, Real-time Single-chip solutions, Telecom protocols & Virtual Peripherals www.menmicro.com
2) Microcontrollers - ARM, MIPS, MCS-51/251, PIC 12/14/16, SX, AVR,... Embedded Tech Journal
Be the Embedded Expert
AVR Microcontroller Resources
Free Subscription
A list of links to Atmel AVR information on the web that also includes some projects of my own. www.embeddedtechjournal.com
Sage Telcommunications Electronic India

Sage Telecommunications ( Hardware / Software Engineers and distributers of Dontronic's SimmStick Custom electronic design
products )and Sage Pages Republishers of Fred Hoinville's classic 'Halfway to Heaven' ) and development service in
India.
PMB Electronics www.mansi.ws
Embedded micros and electronic component supply. x86 Embedded uControllers
ADC/DAC, motion, LCD, I/O,
Embedded Systems Development Nexus Ethernet Low-Cost, Flexible,
A resource for embedded systems developers. C/C++ Program
www.tern.com
Welcome to Aru's Abode
Has lots of learning stuff.
Make MONEY!
Ben's HobbyCorner
A home-made 80C535/C515/AT89C2051/ AT89C4051 microcontroller system on single sided PCB's, with Add
LCD-display, keyboard, steppermotors, I2c etc. Pay-Per-Play
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Jesstec Micros Website
Jesstec Micros are manufacturers of low cost 8032/80320 based credit card sized controller boards. Make MONEY!
The world according to I.R.Bot Add

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Complete resources for 8-bit Microcontrollers - I/O interface Circuits, sample C code, C compilers tools,
programmers, resources and info.

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Bamberg & Monsees GbR

Bamberg & Monsees GbR develops and produces Microcontrollerboards and tools for the ATMEL AVR-
series and other Controller like the 80C5x and Microchip PIC.
Celestial Horizons
Basic Compilers for PIC microcontrollers.
Electronic Circuits & Radio Controlled Modeling

PIC Microcontroller page about: RS232 (software- & hardware-) communication routines, Dot matrix LCD
driver routines , LCD data sheets & references, AT keyboard interface.
Innovative Design Solutions

IDS manufactures 8051 based microcontroller development products (both hardware and software), and
provides complete electronic design services.
Bamberg&Monsees GbR Systeme fuer Wissenschaft u.Technik

Development and production of microcontroller-modules, embedded applications, power-supplies, battry-
chargers and programmers
PIC Ethernet Web Server

Information on web-enabling your PIC by using a standard NE2000 ethernet card as the physical interface.
Pic 12c508 programmer

En esta pgina aprenderas a como fabricar tu propio programador de pics y como programar tu pic.
Berty's Home Page

Just some projects and pinouts for mobile phone lcd.
Beginners PIC and AVR page

A useful PIC and AVR microcontroller starting place containing simple code examples, hardware setup and
tools to use and the virtual notebook
optiCompo Electronics - ATmega based boards

We produce an ethernet add-on for the Agenda VR3 PDA , an ATmega 103 mikroboard with RESET IC,
STK300 compatible ISP etc. In cooperation with egnite we work on the EtherNut.

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Flowchart from C/C++ code
Visual browser, Cross reference For the new member of software team.
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Sage Telcommunications
x86 Embedded uControllers
Sage Telecommunications ( Hardware / Software Engineers and distributers of Dontronic's SimmStick
products )and Sage Pages Republishers of Fred Hoinville's classic 'Halfway to Heaven' )
Ethernet Low-Cost, Flexible,
PMB Electronics C/C++ Program
www.tern.com
Embedded micros and electronic component supply.
Embedded System Design
Embedded Systems Development Nexus Intrinsyc Customizable
A resource for embedded systems developers. Solutions - Embedded
Reference Devices
Welcome to Aru's Abode www.Intrinsyc.com
Has lots of learning stuff. Electronic India
Custom electronic design
Ben's HobbyCorner and development service in
A home-made 80C535/C515/AT89C2051/ AT89C4051 microcontroller system on single sided PCB's, with India.
LCD-display, keyboard, steppermotors, I2c etc. www.mansi.ws
Jesstec Micros Website
Jesstec Micros are manufacturers of low cost 8032/80320 based credit card sized controller boards. Make MONEY!
The world according to I.R.Bot Add
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programmers, resources and info.
Add
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series and other Controller like the 80C5x and Microchip PIC.

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Links to websites related to microcontrollers, IT and other technologies.
PICmicro and Atmel hardware & Software.
PIC programmers, compilers, robotics projects.
PIC Micro kits and components.
Versatile group of well trained experts in different fields:

computer science, computer modeling, electronics,
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Active Robots - Educational and Amateur Robotics
CCS offers optimized Microchip PICmicro C compilers for Windows and

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This web site is dedicated to the memory of James Leonard Callaghan (Cal)
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Microchip PIC Project resource and guide page
April 1st, 2006
Object Detector, PIC16F877
Project description:
This is a very small program to try the Sharp GP2Y0D340K infrared object detector.
Electronics used:
Sharp GP2Y0D340K
Link: Object Detector
hrefik | Uncategorized | No Comments | #
April 1st, 2006
A system to record and/or play sound in a bit stream format, PIC16F877
http://www.picguide.org/ (1 of 18)12/02/2008 17:16:00

This is a sound playback system for a PIC or any other microcontroller. It uses a clever encoding system
to mathematically model the actual performance of the RC filter when the signal is encoded. This allows
playback of good quality sound with the absolute minimum software and hardware. The RC filter
modeling (encoding algorithm) has been refined to be PIC friendly in binary math, giving the ability to
playback AND RECORD in real time even on a PIC, even with high rates up to 150+ kbit/sec.
Electronics used:
LM741
Link: A system to record and/or play sound in a bit stream format
April 1st, 2006
Ultrasonic Radar, PIC16F877

The Devantech SFR04 Ultrasonic Range Finder indicates the distance to the closest object within range.
Echos that arrive later are received and processed, but subsequently ignored. For a true radar all signals
should be taken into account.
Electronics used:
Devantech SFR04
Link: Ultrasonic Radar, PIC16F877
April 1st, 2006
Climate Controller, PIC16F873

Climate Controller. This controller uses the Sensirion SHT11 combined temperature and humidity
sensor. Measurement and Display:
Scale selectable between Centigrade and Fahrenheit
Humidity 0 - 100% temperature compensated
Temperature -40 to 123 C (-40 to- 254 F)
Electronics used:
SHT11
Link: Climate Controller, PIC16F873
March 31st, 2006
PIC based guitar tuner and preamp, PIC16F73

I recently had to make a guitar amplifier and thought it would be cool to include a PIC based guitar
tuner. I had an AIWA 3-disc stereo lying around with a non-functioning CD player. The tuner and tape
deck still worked fine, and it was rated for I think 30 watts/channel.
Electronics used:
AD620
LM10
Link: PIC based guitar tuner and preamp
March 31st, 2006
Nixie clock, PIC16F73

These tubes were originally in a Wang desktop calculator, manufactured in 1969. A PIC16F73 is the
only IC used, although it was a stretch with all 22 IO being used. The timing reference is obtained from
the 60 HZ AC line, although during a power outtage a 9 volt NiCad keeps the CPU powered and the
timing is generated by an interrupt routine (10 MHZ clock crystal). A 5 pin header on the main circuit
board is used for ISP and allowed for easy debugging.
Link: Nixie clock, PIC16F73
March 31st, 2006
8-PIN PONG, PIC12F675

This project is based on ideas from Rickards electronic projects page and David B. Thomas VCR Pong.
However, I have developed the simplicity even further, eliminating most of the external components.
Using microcontrollers with internal 4MHz clock generator there is no need for the xtal. The 12f675 part
also operates on wide voltage range, and the regulator can be removed. For game controller, I plan on
using the old Commodore 64 style paddless. They include firing buttons, which I plan on using as power
switch and game reset. 16F675 has a low power sleep mode with 1nA current consumption, so I plan on
using that to switch off.
Link: 8-PIN PONG
March 31st, 2006
DCF controlled time switch, PIC16F876
I needed a way to automatically control the main heating of our house. The basic idea is to start the
heating at a certain time in the morning, and to switch it off at night. The switching points are different
on various weekdays.
Link: DCF controlled time switch

March 29th, 2006
Dual Thermometer with serial output, PIC16F876
This one is using a 16F876 PIC, MCP1047A temperature sensor ( X2 ), MCP1541 voltage reference and
MCP6022A opamp. The display is a 2 row HD74780 based 2X16 char, SII L1652BIJ2 but any other
display based on HD74780 can be used.
Electronics used:
MCP1047A
MCP6022A
MCP1541
HD74780
Link: Dual Thermometer with serial output
March 29th, 2006
The Internet Plug II, PIC16F877

Some time ago I use to create an Internet Plug - it was useful except one aspect - no password
protection was available for the Site Player. In order to solve this problem I have attached a 16F877
processor to the Site Player. Now the Internet Plug is Password Protected and also the status of the exits
is saved in EEPROM so is not lost in case of a power failure. One of the simplest applications will be to
control the lights from the distance, meaning from any computer connected to the Internet.
Electronics used:
SitePlayer Moule
Link: The Internet Plug II
March 29th, 2006
DTMF Remote control, PIC16F87X

This project is a simple DTMF Remote control. The DTMF detector is integrated in software. All the
logic requested to receive and decode DTMF Commands over the phone line is integrated in the 16F877
chip, only few external components are used.
Electronics used:
MCP6022
Link: DTMF Remote control
March 29th, 2006
Rocket timer, PIC16F84

A co-worker of mine wanted a small timer that ranged from 1s to 15s depending on what the user
selected. They wanted to use a set of 4 dip switches to select the time. Needed to be as small as possible
(weight being very critical) and run off of a 9V battery. Needed 2 failsafes to prevent accidental ignition
of the second stage of the rocket.
Electronics used:
TC4422
Link: Rocket timer
hrefik | Uncategorized | 1 Comment | #
March 28th, 2006
Temperature recoding device, PIC16F628A

This project uses 16F628A as the microprocessor, TC-77 for temperature sensing and 24LC64 as storage
device. The objective is to create a low power temperature recoding device. The entire device consumes
400uA of current. The power is supplied by a standard battery pack (3.6V) for cordless phone. Lower
power comsumption is possible if the shutdown code is implemented for the TC-77 temperature sensor,
however, due to the time limitation, it is not available in this version of the code.
Electronics used:
TC-77
24LC64
Link: Temperature recoding device
March 27th, 2006
Palm <-> PIC bidirectional IR communication, PIC16f877

The main thing I want to do in this bit is build a data communication system from a Palm to a PIC using
IRDA (Infra Red). At first I was going to use just raw IR transmission with no protocol, so all the error
correction would have to be taken care of by the software -no real problem there- but I found out than
the newer Palms dont support raw IR mode, apparently they are hard wired that way, the other option
was to use the IRcomm protocol, it acts like a virtual serial port -you send a in you get a out.
Electronics used:
Palm Pilot
Link: Palm & PIC bidirectional IR communication
March 22nd, 2006
SED1300 LCD, PIC16F628

Project descrition:
Description how to use the PIC microcontroller to control a LCD with the SED 1300 controller.
Link: SED 1300 LCD
March 22nd, 2006
Timer, PIC16F628
This is a cyclic timer (24 hours clock) which may be programmed to turn on and off some device at
programmed time. I made it because Im too lazy to turn light in my aquarium in the morning and turn it
off in the evening.
Electronics used:
74164N
Link: Timer
March 21st, 2006
Ethernet to Serial module, EM202, PIC16F628

This is a how-to project that shows you how to connect your PIC to the EM202, ethernet to serial
module. Now you can communicate over the ethernet to serial port.
Electronics used:
EM202
Link: Ethernet to Serial module, EM202, PIC16F628
March 21st, 2006
IR Remote Control Repeater, PIC12F675 and PIC12F629

This circuit receives the signal from a IR remote control, like those used to control your TV or DVD
player and allows the signal to be repeated in another location.
Electronics used:
TSUS5400 Vishay
Link: IR Remote Control Repeater
March 21st, 2006
RGB LED Colour wash light, PIC12F675
This PIC based circuit uses Red, Green and Blue high brightness LEDs that are pulse width modulated
(PWM) to vary the intensity of each colour LED. This allows effectively any colour to be generated. The
circuit is designed to fit into a low voltage Halogen light fitting.
Link: RGB LED Colour wash light

March 15th, 2006
CPU Cooler Fan Speed Tester, PIC16F627
The main reason I built this is because someone I knew wanted a stand alone device that is capable of
measuring/test CPU Cooler Fans independent of the computer. And here it is, a PIC16F627 based CPU
Cooler Fan Speed Tester. The speed is displayed on 4 units of 7 segment display as shown.
Link: CPU Cooler Fan Speed Tester
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Precision Digital Altimeter using Motorola MPXS4100 and Microchip PIC16F84
Precision Digital Altimeter

with Motorola MPXS4100 A and PIC16F84
Concept
Transmitter
Resolution
Note
So far...
Documents
Receiver
Components
Technical Data of Wireless Transmitter and Receiver
Remarks
Evaluation Board
Initial Test Setup
PCB Evaluation Board
Schematics of Evaluation Board
Available PIC Assembler Code
Software
Measurements
Further Information
Documents
Sensor Ordering Information
Other Circuits and Utilities
Links
Future Steps
Concept [Toc] [Top]
The current concept incorporates a wireless transmitter and receiver and is thought to be used for remote controlled airplanes or
appliances with two seperate parts. In other words, we have one dedicated transmitter (acquisition, filtering) and one dedicated
receiver part (user-interface, look-up table, calibration, storage), capable of being connected together with any physical layer, e.g.
wired, wireless, infrared. If you want to build a standalone altimeter/variometer just for hiking or mountaineering, this setup can
obviously be simplified by omitting the wireless components.
So far, only the transmitter part with all its analog circuitry has been completed entirely - the digital receiver part has still to be done,
but does not necessarily have to be a PIC microcontroller. For instance, it could also be a personal computer, connected through the
standardized RS232 protocol and a wired/wireless interface to the transmitter part.
The (pending) challenge of the receiver implementation is the field evaluation of the most suitable and accurate temperature and non-
linear pressure-altitude correction algorithms. There is maybe need for adding a temperature sensor to the transmitter part.
http://www.trash.net/~luethi/microchip/projects/alti/alti.html (1 of 11)12/02/2008 17:16:05

Transmitter [Toc] [Top] Resolution [Toc] [Top]
I reached 56 cm per unit, so the whole range is :
2270 meters using a 12 bit A/D converter

142 meters using an 8 bit A/D converter
Increase the range by taking a better A/D converter or decrease the Amplifier-
Gain (reduction of resolution).
In practice, I'll set the resolution to 1 meter, so a total range of 4096 meters will
be available. This is enough precise for my R/C models, but allows to use this
altimeter also for hiking and mountaineering.
Note [Toc] [Top]
The microcontroller builds an average value of 64 A/D samples to reduce any

noise to a minimum.
So far ... [Toc] [Top]
I've developed the following routines in PIC Assembler code:
RS 232 Interrupt handled interface for PICs without USART. I like a

clean design, so I take an interrupt capable PIC microcontroller !
Although the PIC 16C73 has one USART, this routine is necessary
because the USART is already used for the AD Converter and the
EEPROM. Because the RS 232 interface is not used during data logging
operation, the performance of the USART is completely present to the
communication with the AD Converter.
Serial 4 Bit standard Dot-LCD interface
8 Bit & 16 Bit binary to decimal conversion routine for LCD output.
NSC ADC12130 test interface with Auto-Calibration, Auto-Zero and
Data-Fetch
Data Capture from an Excel Worksheet.
Documents [Toc] [Top]
See related stuff at the document section below.

Receiver [Toc] [Top]
Components [Toc] [Top]
The following components have been used: Analog to digital converter NSC ADC12130, a Microchip PIC16F84 controller, a quad
op-amp NSC LMC660, a Maxim MAX232 RS232 level shifter, and the Motorola MPXS4100A absolute pressure sensor.
Circuit Design CDP-RX-01 wireless

receiver, 434 MHz, up to 7.5 kb/s, uni-
Removable module containing Motorola absolute directional
pressure sensor MPXS 4100A, 10nF and 100nF
ceramic and 10uF tantalum capacitors.

Top view of removable pressure sensor module. Circuit design CDP-TX-01 wireless
transmitter, 434 MHz, up to 7.5 kb/s, uni-
directional
Technical Data of Wireless Transmitter and Receiver [Toc] [Top]
Manufacturer: Circuit Design Inc.

Very small and compact integrated device with robust metal housing.
Low current consumption, ideal for mobile, battery-powered applications.
Filter technique using Super-SAW filters.
Additional information is available at Circuit Design Inc. -> Products
Data sheets of wireless transmitter and receiver:
previous version CDP-TX01 (PDF) discontinued

current version CDP-TX02 (PDF)
General
Oscillator type: Crystal
Frequency: 433.920 MHz, 434.075 MHz (Europe)
458.650 MHz (United Kingdom)
Frequency stability: +/- 2.5 kHz (-10 up to +55 C)
HF channels: single (fixed channel)
Range: up to 1000 m (free distance, line of sight)
Baud rate (specified): 300 - 4800 baud
Bit rate (measured at short up to 7500 bits/s
distance):
Operating conditions: -10 up to +60 C
Type approval: I-ETS 300 220 / Germany, France, Switzerland, Sweden, UK, Holland, Austria, EMC
Transmitter
HF power output: 10 mW +/- 3 dB @ 50 Ohm
Modulation: FM narrow band
Start-up time: 30 ms
Input signal type: digital, 5 Volt
Deviation: 2.5 kHz
Supply voltage: 5.5 - 10 Volt
Power consumption: 18 mA typ.
Dimensions: 36 x 26 x 10 mm
Weight: 9.8 g

Receiver
Type: double superheterodyne, crystal oscillator
Sensitivity: -120 dBm (12 dB/SINAD, CCITT filter)
Selectivity: +/- 5 kHz @ -6 dB
Demodulation: FM narrow band
Distortion: < 5 % @ 1 kHz
Output signal type: digital, open collector
Other outputs: RSSI and AF
Supply voltage: 4.5 - 14 Volt
Power consumption: 10 mA typ.
Dimensions: 50 x 30 x 7.5 mm
Weight: 19 g
Remarks [Toc] [Top]
A lot of people have asked me where I got the Motorola absolute pressure sensor from.
Please see the section Sensor Ordering Information below.
By the way, Motorola distinguishes the sensor characteristics, feature set and package type by the sensor name, so you can also get
4100 sensor types similar to mine with different naming, e.g. MPXT 4100A or PPXA 4100A:
M Qualified standards
PX Pressure sensor
S Small outline package
See Motorola Sensor Selector Guide at the section Documents below.
Evaluation Board [Toc] [Top]
The Circuit Design wireless transmitter and receiver are not necessary to use the evaluation board, since there exists a direct RS232
link to the PC.
Initial Test Setup [Toc] [Top]

Test setup to check the initial concept
An initial test setup for checking the mixed signal design: A significant problem was the digital noise in the analog circuitry supply
voltages. Finally the noise could be minimized by splitting up the power supplies to three independent sources: one digital power
supply voltage, one for the sensor and A/D converter, and one supply with slightly higher voltage for the operational amplifiers of
the filter stages. The above test setup contains no wireless transmitter, the data is directly transmitted to the computer using the
RS232 protocol and a MAX232 level shifter.
In this setup, I have used the LMC660 / LMC662 low-power rail-to-rail quad operational amplifiers for the fourth order Chebyshev
filter stages.
PCB Evaluation Board [Toc] [Top]
Moving from the test board to the first PCB, I have only made slight adaptations in the analog part of my design: I have altered the
filter characteristics from Chebyshev to Butterworth - but as a consequence, I had to replace the LMC660 operational amplifier by a
LM324 type, due to oscillating filters. Conclusion: In the analog world, nothing runs properly if it has not been tested.
If someone knows a good single supply, low-power, rail-to-rail operational amplifier with clean and linear output characteristics in
the entire input range, please let me know! The LMC660 is exactly specified this way, but showed up a really bad non-linear
characteristic in the upper input range. Bob Krech suggested the LMC6064 precision quad OP amplifier with pin-for-pin
replacement for the LM324.

PCB-based evaluation board suitable for first field measurements
Description of the above PCB layout
The PCB-based evaluation board consists of analog circuitry at the left side and digital components at the right side of the board. In
the upper left corner are the three independent power supplies (5 V analog, 6.8 V analog, 5 V digital), all served from one battery
(8 - 10 V). The evaluation board contains further the active Butterworth filter stages built of one LM324 (left side), the NSC
ADC12130 A/D converter (center), the PIC 16F84 microcontroller (at right from A/D converter), a dot LCD display and a PORTB
connector (lower right corner), a direct RS232 interface with MAX232 level shifter (upper right corner), and an interface for the
wireless transmitter allowing for first field measurements (bottom center). The system owns two oscillators. A 4 MHz crystal
oscillator provides the conversion clock for the A/D converter, and a separate 4 MHz crystal for the microcontroller allows to
increase processor performance easily if necessary. This setup provides two A/D converter input channels: Channel 0 is already used
for the pressure sensor, but channel 1 can be used freely, e.g. for voltage surveillance of the R/C receiver battery. If two channels are
not sufficient, this system can easily be upgraded to eight channels by integrating the NSC ADC12138 A/D converter. The LCD
connector and the RS232 interface serve only for evaluation and debugging purposes in this setup. Finally, the noise characteristics
of my approach are very promising!
Although this board is now ready, a suitable R/C plane - my Piper Cherokee - has to be finished first for 'air evaluation'...
Schematics of Evaluation Board [Toc] [Top]
Latest version 1.03 from April 23rd, 2001:
Top.pdf (8.5 kB)

Sensor.pdf (4.0 kB)
Filter1.pdf (6.5 kB) (replaced LMC660 with LM324, due to oscillating filters)
Filter2.pdf (6.3 kB) (replaced LMC660 with LM324, due to oscillating filters)
Digital.pdf (12.6 kB)
LCD.pdf (4.6 kB) (corrected some errors)
RS232.pdf (7.7 kB)
PowerSupply.pdf (8.9 kB)
Available Microchip PIC Assembler Code [Toc] [Top]
Main File HEX Files

View assembler source code: alti_tx.html alti_tx.hex

Download assembler source code: alti_tx.asm (16.7 kB)
asm
Software [Toc] [Top]
An Excel worksheet has been used to visualize the captured data.

With the NSC ADC12130 A/D converter, there are two channels available.
Download Excel worksheet and drivers: alti_2channel.zip (203 kB)
Measurements [Toc] [Top]
I've done some measurements to see whether LSB toggling is sufficient low using the Excel RS232 data capture interface. All
measurements have been carried out at room temperature (without any temperature compensation) and without moving the test
board. The test period has been one hour with adequate warm-up time for the sensitive analog circuitry (pressure sensor, A/D
converter and op-amp).
Note: Because the entire design is laid out very sensitive in order to get a high resolution (in the range of one meter), the
accumulated drift could also originate from natural barometric variations.

Test setup: Drift of 2 bits during one hour (with a single spike).
Test setup: Drift of 4 bits during one hour.
Test setup: Drift of 3 bits during half an hour. The strange curve comes
possibly from temperature variations.

PCB-based evaluation board: The yellow curve represents the pressure

sensor, the blue curve is only a test voltage for comparision purposes. The
pressure sensor behaves quite stable in conjunction with the PCB setup, only
LSB toggling during one hour. The comparision voltage - originating from a
simple voltage divider - is even more toggling. This toggling may result from a
voltage just reaching the A/D converter LSB threshold.
Further Information [Toc] [Top]
Documents [Toc] [Top]
Data sheet of Motorola Absolute Pressure Sensor Series MPX4100A: MPX4100A (PDF, 117 kB)
Motorola Sensor Selector Guide (Acceleration, Pressure, and Smoke): SensorSelectorGuide (PDF, 166 kB)
Noise considerations for integrated pressure sensors: AN1646 (PDF, 153 kB)
Data sheets of wireless transmitter and receiver:
previous version CDP-TX01 (PDF) discontinued

current version CDP-TX02 (PDF)
Sensor Ordering Information [Toc] [Top]
A lot of people have asked me, where they could get the Motorola absolut pressure sensor from. I bought it from www.conrad.com
years ago, but now, these sensors may occassionally not be available there. Don't ask me where you can get them elsewhere, I don't
know...
As of 08.04.2005, there was one pressure sensor model from Motorola available at www.conrad.com:
Item: SMD-DRUCKSENSOR MPXA4100A6U

Ordering#: 150110 - 13
Price: about 25.00 Euro/pc.
Other Circuits and Utilities [Toc] [Top]


Dot LCD Interface
RS232 Interface
Excel Data Capture
Automatic Table Generator for MPLAB Assembler
Links [Toc] [Top]
RC data logger V2.5 with altitude capture

German page about a self-made RC data logger using PIC 16F84 and MPXS 4100A absolute pressure sensor.
Previous version with nice Palm interface pictures: RC data logger V1.x
Future Steps [Toc] [Top]
Field measurements and evaluation of the most suitable temperature and non-linear pressure-altitude correction algorithms,
maybe with portable computer to be ready for quick alterations.
Design of the microcontroller-based receiver circuit.
Put all code together and create user-interface and calibration menu with liquid crystal display.
If applicable, a 24C65 EEPROM interface for storage.
If having not enough challenges, real time clock interface to Dallas DS1302.
This work is currently on hold due to limited time.
[Toc] [Top]

click here

AT Keyboard Interface V1.04 for Microchip PIC 16F84 Microcontroller
AT Keyboard Interface V1.04

for Microchip PIC16F84 (without LCD)
Introduction
Possible Applications
Concept
How it works
Specifications
Features
Limitations
AT Keyboard Theory
Keyboard Scan Codes
Keyboard to Host Protocol
Keyboard Commands
Host to Keyboard Protocol
Host Commands
Project Resources
User-specific Customization / FAQ
How do I use the AT Keyboard Input?
How does the Scan Pattern Decoding work exactly?
My own Key Customization
My own Key Sequence
Confusion about Sweden and Switzerland...?
Introduction [Toc] [Top]
Sometimes you only need a simple and cheap RS232 terminal to get sufficient control over a PC or a RS232 device. There is no need, no space or even no power
to place a monitor, a computer case and a keyboard. Maybe there exists also the problem, that the PC or the device is located somewhere else and you want to
interact with it over a short distance.
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/keyboard_v1xx.html (1 of 18)12/02/2008 17:16:09

The cheapest way to obtain a complete user interface is the use of standard components, such as LCD modules and PC keyboards. A standard PC keyboard (PS/2
type) costs about US-$ 12, a 2 lines by 40 characters dot matrix LCD module around US-$ 20.
To connect these items to the serial port by cable, a microcontroller and a RS232 level shifter are necessary. For longer distance control, there exists also the
possibility to interconnect the terminal with the other device by a wireless physical transmission layer.
Possible Applications [Toc] [Top]
The RS232 terminal for instance is very convenient in conjunction with a PC based Juke-Box playing MP3 files. You only need a command line programmable
MP3 player (or a player with a supplied Active-X interface) and a software-based connection between player and RS232 port. This software 'connection' could be
realized using Visual Basic and the often supplied Active-X interfaces of the various Windows based MP3 players.
Another possible area for applications is PC observed access control. Therefore, the RS232 terminal is placed at the entrance to the supervised area.
A further enhancement to be able to satisfy todays needs for network-based communication would be a complete TCP/IP based communication layer together with
an Ethernet front-end. Then it would be possible to control simple Ethernet appliances, e.g. your coffee maker, electrical rolling shutters, autonomous net-based
lawn mower,... ;-) by this remote terminal. Brave new world ...

Concept [Toc] [Top]
The routine below contains no support for an LCD display. It only shows the complete fetch and decoding of AT keyboard scan patterns and RS232 transmission
of ASCII characters to the RS232 client. If you want a PIC 16F84 based solution with additional LCD, have a look at the keyboard v2xx project.
The problem with the PIC 16F84 is the lack of RS232 hardware. The whole keyboard scan pattern fetch, decode and RS232 data transmission is done by software.
Additional RS232 data reception has also to be carried out by software - based on interrupts - but is not implemented within this project. The current
implementation features a preemptive interrupt-based keyboard scan pattern acquisition.

A recent picture of my workplace connecting a Microsoft PS/2 AT An elderly picture of my workplace, at which the initial
keyboard to the PIC16F84. development took place.
How it works [Toc] [Top]
Any key stroke on the local keyboard will send the corresponding scan patterns from the keyboard to the PIC microcontroller. Afterwards, the microcontroller
converts the keyboard scan patterns to ASCII characters and transmits them to the RS232 target device.
The keyboard scan code capture is done by an interrupt service routine (ISR). The event, which triggers the interrupt is a falling edge on the keyboard clock line
(PORTB,0). Keyboard scan pattern acquisition takes place at the keyboard data line (PORTA,4). After 11 clocks (i.e. 11 external interrupts on RB0/INT), the
interrupt service routine has completely captured an 8 bit element of the entire scan pattern and sets a ready flag. The decoding of this 8 bit element is then carried
out during normal operation mode, activated by a valid ready flag whilst keeping the keyboard stalled (keyboard clock line low).
The fact, that the scan pattern acquisition is carried out using an interrupt service routine and the decoding thereof is done during normal operation mode allows for
performing other tasks concurrently: That's why I call the acquisition methodology preemptive, it does not block the processor in the main loop while acquiring
keyboard data - therefore passing processing resources to other services. Explicitely, it works as follows:
After proper acquisition, the corresponding flag KBDflag is set (at the end of the ISR) and the decoded keyboard character resides in the register KBD. The
KBDflag is cleared at the end of the service routine KBDdecode.
Infinitive main loop to acquire keyboard input (keyboard_v1xx.asm), keyboard data is in register KBD:
;******************************
_MLOOP btfsc KBDflag ; check scan pattern reception flag
call KBDdecode ; if set, call decoding routine
;btfsc your_other_flag
;call your_other_service
goto _MLOOP
;******************************
Only RS232 transmission is supported by this program, since PORTB,0 interrupt is already used by the keyboard clock line. There exists no possibility to
implement also RS232 reception using my modules m_rsxxx.asm, because they require PORTB,0 as well and are laid out as non-preemptive data acquisition
routines (see also 'Limitations').
For dedicated code adaptations, please refer to the section 'User-specific Customization' below.
Specifications [Toc] [Top]

Processor: Microchip PIC 16F84

Clock Frequency: 4 MHz crystal
Throughput: 1 MIPS
RS232 Baud Rate: 9600 baud, 8 bit, no parity, 1 stopbit
Code Size of entire Program: 523 instruction words
Keyboard Routine Features: Capability of uni-directional communication between microcontroller and keyboard
Acquisition Methodology: Preemptive, interrupt-based keyboard scan pattern acquisition, decoding to ASCII characters
during normal operation mode activated by ready flag
Required Hardware: AT keyboard, PS/2 connector, MAX232
Required Software: RS232 terminal software (or Excel 97 RS232 Debug Interface)
Features [Toc] [Top]
Uni-directional communication between microcontroller application and remote RS232 client.

Uni-directional communication between microcontroller and keyboard.
Support for all keyboard characters typed with shift button active and inactive.
English and modified Swiss-German 'codepages' available (QWERTY and QWERTZ)
Caps Lock implemented
Num Lock always active
Possibility to implement short-cuts or user defined characters for 'Esc', 'Num Lock', 'Scroll Lock' and 'F1' - 'F12' keys.
Further enhancement, not implemented: Support of ASCII conversion from direct ALT-DEC and CTRL-HEX entries, e.g. ALT + 6 + 4 = @ or CTRL + 3 +
F=?
To visualize the ASCII data sent by this microcontroller application, use a terminal program like the Windows Hyperterminal. Below an example session, which
proves the correct functionality of the keyboard interface. This terminal program and the Excel 97 RS232 Debug Interface have been used to debug the interface
during implementation time.

Example of a session using the Windows HyperTerminal. The entire contents was sent by the PIC controller.
Limitations [Toc] [Top]
In case you want RS232 reception and keyboard decoding simultaneously on a single PIC 16X84, you'll have to configure either the keyboard clock line or the
RS232 reception data line (both targeting PORTB,0 interrupt) to another separate interrupt source (e.g. PORTB,4 - PORTB,7 change interrupt) and to alter the
RS232 data fetch routine to a preemptive one. But then you'll also run into troubles by using the LCD modules, because they are written to work on entire 8 bit
ports (such as PORTB on 16X84, and PORTC & PORTD on 16X74).
So if you really appreciate to run the RS232 terminal entirely on a PIC 16X84 - from a technical perspective it is possible - you'll have to rewrite the LCD modules
and the software RS232 reception routine. Be aware that there won't be a lot of code space remaining for other enhancements after putting all terminal related stuff
onto the 16X84.
A workaround to get RS232 reception on the PIC 16X84 using this software could be a solution based on polling. But make sure you are polling fast enough, also
in worst case.

Important note from Jason Plumb:
Hey,
First, lemme say that I like your site and thank you for providing excellent reference material for us home-hobbyist microcontroller geeks. I am currently
working on a music/noise project that uses a PS/2 keyboard interfaced to a PIC16F84, and I used your page at http://www.electronic-engineering.ch/microchip/
projects/keyboard/v1xx/keyboard_v1xx.html heavily as a reference when designing hardware and writing code. Anyway, I just thought that I would mention
that I ran into a problem that I have since solved. The problem involved sending bytes *TO* the keyboard from the PIC (in order to light NumLock and
ScrollLock). Your "Host To Keyboard Protocol" section indicates that the keyboard will take the data line low for a clock after the byte is sent to create an ACK
bit. Apparently, the PS/2 keyboard that I have (generic $10 comp-USA brand) doesn't send an ACK bit, but rather sends a whole byte. If my code attempted to
wait for the ACK bit, it hung indefinitely. I changed the wait to look for a byte (by calling my existing function) and everything worked perfectly. I stumbled on
this idea by looking at other online references (most notably, some Linux kernel code at http://www.mscs.mu.edu/~georgec/Classes/207.1998/14Minix_book/S/
src%20kernel%20keyboard.c.html#307). I have seen this ACK *byte* mentioned elsewhere too. I *think* the keyboard sends back 0xFA as an ACK byte, but I
have not personally confirmed this. Perhaps your excellent documentation could just use a quick note of clarification so that other don't run into the same
problem. Maybe something as simple as: "NOTE: Some keyboards send an ACK byte (value 0xFA) instead of an ACK bit.".
Thanks again,
Jason
Note from the author:
The comment above refers to bi-directional communication between PIC microcontroller and AT keyboard, i.e. to the source code of the AT Keyboard Interface
V2.xx and higher versions. The bi-directional communication between host and keyboard is designed to support both Ack bits and Ack bytes.
Every command sent from the host to the keyboard needs to have an Odd Parity bit and an Ack bit at the end.
Every command received by the keyboard from the host needs to be acknowledged by the keyboard by sending an Ack byte (0xFA) to the host. See also
section 'Host to Keyboard Protocol'.
A corresponding PIC assembler code example is shown below:
;*** switch keyboard LEDs on (default status) ***

KBDcmd 0xED ; keyboard LEDs' control command
KBDexp 0xFA ; expect keyboard acknowledge (FA)
movfw KBDleds ; load keyboard LEDs' status
KBDcmdw ; send keyboard LEDs' control data

However, some AT keyboards may behave different and may need code adaptations to get bi-directional communication working properly.
AT Keyboard Theory [Toc] [Top]
A complete functional description and timing diagram of the AT keyboard is available at Craig Peacock's website. Please refer to his website Interfacing the PC's
Keyboard for an excellent and comprehensive description of all features and commands of the AT keyboard. At this place, I want to thank Craig Peacock for his
outstanding work with his website.
Below I only want to sketch the most important technical aspects to be known when interfacing a PC's keyboard. Small parts of the introduction below are more or
less copied from Craig Peacock's tutorial.
Keyboard Scan Codes [Toc] [Top]
The diagram below shows the scan codes assigned to the individual keys for the english keyboard layout. The keys' corresponding scan codes are the numbers on
the keys, for example the scan code of the ESC key is 0x76. All scan codes are shown in hexadecimal representation.
The scan code assignments are quite random (thanks to IBM and other early computer manufacturers) and appear to be really weird sometimes, for instance the
break key. In many cases the easiest way to convert the scan code to ASCII characters would be to use a lookup table. Below are the scan codes shown for the
extended part of the keyboard and the numeric keypad.

Cite of Craig Peacock: "How about E1,14,77,E1,F0,14,F0,77! Now that can't be a valid scan code? Wrong again. It happens to be sent when you press the pause/
break key. Don't ask me why they have to make it so long! Maybe they were having a bad day or something?"
By the way, AT stands for Advanced Technology...
The AT keyboard sends different scan codes on pressing, holding and releasing of each button. An example is given at the table below:
Press & Hold Down Scan Code Release Scan Code
Normal Scan Code 73 F0 73
Extended Scan Code E0 4A E0 F0 4A
All scan patterns can easily be visualized and verified with the AT Scan Code Debug Routine and the RS232 Debug Interface.
Keyboard to Host Protocol [Toc] [Top]
The data transfer is implemented as bi-directional protocol: The keyboard can send data to the host (microcontroller) and the host can send commands and data to
the keyboard. The host has the ultimate priority over the direction. It can at anytime (although not recommended) send a command to the keyboard.

The keyboard is free to send data to the host when both KBD data and KBD clock lines are high (idle). The serial clock is generated by the keyboard, but the host
can also use it as a clear-to-send line: If the host takes the KBD clock line low, the keyboard will buffer any data until the KBD clock is released, i.e. goes high.
Should the host take also the KBD data line low, then the keyboard will prepare to accept a command from the host.
The transmission of data in the forward direction, i.e. keyboard to host, is done with a frame of 11 bits. The first bit is a start bit (logic 0) followed by 8 data bits
(LSB first), one parity bit (odd parity) and a stop bit (logic 1). Each bit has to be read on the falling edge of the clock.
AT keyboard to host protocol, with odd parity bit
Keyboard Commands [Toc] [Top]
Once the host commands are sent from the host to the keyboard, the keyboard commands must be
sent from the keyboard to the host. If you think this way, you must be correct. Below details of some of
the commands which the keyboard is able to send.
FA Acknowledge
AA Power on self test passed (BAT completed)
EE See echo command (host commands)
FE Resend - upon receipt of the resend command the host should re-transmit the last byte sent.
00 Error or buffer overflow
FF Error or buffer overflow
Host to Keyboard Protocol [Toc] [Top]

The host to keyboard protocol is initiated by taking the KBD data line low. However to prevent the keyboard from sending data at the same time that you attempt
to send the keyboard data, it is common to take the KBD clock line low for more than 60 us. This is more than one bit length. Then the KBD data line is taken low,
while the KBD clock line is released. The keyboard will start generating a clock signal on its KBD clock line. This process can take up to 10 ms. After the first
falling edge has been detected, you can load the first data bit on the KBD data line. This bit will be read into the keyboard on the next falling edge, after which you
can place the next bit of data. This process is repeated for all 8 data bits. After the data bits comes an odd parity bit.
Host to AT keyboard protocol, with odd parity bit and acknowledge
Odd parity = NOT(XOR(bits[0..7]))
Once the parity bit has been sent and the KBD data line is in a idle state (high) for the next clock cycle, the keyboard will acknowledge the reception of the new
data. The keyboard does this by taking the KBD data line low for the next clock transition. If the KBD data line is not idle after the 10th bit (start, 8 data bits, and
parity bit), the keyboard will continue to send a KBD clock signal until the KBD data line becomes idle (Note: see also Limitations).
Host Commands [Toc] [Top]
These commands are sent by the host to the keyboard. The most common command would be the setting/resetting of the status indicators (i.e. the Num lock, Caps
Lock & Scroll Lock LEDs). The more common and useful commands are shown below.
ED Set status LED's - This command can be used to turn on and off the Num Lock, Caps Lock & Scroll Lock LED's. After sending ED, keyboard will reply
with ACK (FA) and wait for another byte which determines their status. Bit 0 controls the Scroll Lock, bit 1 the Num Lock and bit 2 the Caps lock. Bits 3
to 7 are ignored.
EE Echo - upon sending an echo command to the keyboard, the keyboard should reply with an echo (EE).
F0 Set scan code set. Upon sending F0, keyboard will reply with ACK (FA) and wait for another byte, 01-03 which determines the scan code used. Sending 00
as the second byte will return the scan code set currently in use.
F3 Set typematic repeat rate. Keyboard will acknowledge command with FA and wait for a second byte, which determines the typematic repeat rate.

F4 Keyboard enable - clears the keyboard's output buffer, enables keyboard scanning and returns an acknowledgment.
F5 Keyboard disable - resets the keyboard, disables keyboard scanning and returns an acknowledgment.
FE Resend - upon receipt of the re-send command, the keyboard will re-transmit the last byte sent.
FF Reset - resets the keyboard.
Please refer to Craig Peacock's website for more information: Interfacing the PC's Keyboard
Main File Main Keyboard Decode Lookup Table SHIFT Keyboard Decode Lookup Table HEX Files
Latest version: English 'codepage' (QWERTY) English 'codepage' (QWERTY) QWERTY 'codepage':
kbd_1xx.asm View: eng_main.html View: eng_shif.html kbd_104_eng.hex
Download: eng_main.asm Download: eng_shif.asm
QWERTZ 'codepage':
Modified Swiss German Modified Swiss German kbd_104_sg.hex
'codepage' (QWERTZ) 'codepage' (QWERTZ)
View: ger_main.html View: ger_shif.html
Download: ger_main.asm Download: ger_shif.asm
The above programs need additional include files (modules) to get successfully assembled: m_bank.asm, m_wait.asm, m_rs096.asm
The schematic of the AT keyboard interface using the PIC 16F84: Keyboard_V1xx.pdf.
You don't know how a dot matrix LCD is working? Have a look at my data sheets page.

You can get the pinout and a description of the various keyboard connectors <here>.
User-specific Customization / FAQ [Toc] [Top]
This section covers important details of the code structure. For a high level view, please refer to the section 'How it works' above. Basically, I have written this
keyboard project in such a way that it is completely customizable depending on your programming/PIC assembler skills.
How do I use the AT Keyboard Input? [Toc] [Top]
Question: I'm running your AT Keyboard code. But how do I use the decoded input of the AT keyboard...?
Answer: The decoded content resides usually in the register KBD. You can use the content of this register in the main routine in the infinitive loop. Please see the
section 'How it works' above.
How does the Scan Pattern Decoding work exactly? [Toc] [Top]
Question: How does your AT scan pattern decoding work exactly? You are using two strange look-up tables...
Answer: Have a look at some parts of the 'AT Keyboard Lookup Table', e.g. the eng_main.asm (QWERTY):
The simple lookup table decoding is done with retlw x and DT x. These directives just return the corresponding ASCII character. The more sophisticated decoding
is done with subroutines, i.e. goto _XYZ. This means for instance that for a ENTER/RETURN key hit on the keyboard, the subroutine _CRLF is executed (carriage
return, line feed) and for ALT, CTRL, SHIFT and CAPS_LOCK, the corresponding flags are set in their corresponding subroutines.
goto _ALT ; ALT (set/clear ALT flag)

goto _SHIFT ; SHIFT (set/clear SHIFT flag)
retlw 0 ;
goto _CTRL ; CTRL (set/clear CTRL flag)
DT "q1" ; DT: MPASM directive to create a table (retlw x)
goto _CRLF ; CR, LF 0x5A
Because the keyboard sends slightly different scan patterns for both, key hit and key release, there is need for a key release handling. This is done with the so-
called release flag. So for every single character typed, the interrupt service routine is called twice (due to two different scan codes for hit and release) and the scan
pattern decoding routine is executed twice.
#define RELflag FLAGreg,0x00 ; release flag (0xF0)

#define SHIflag FLAGreg,0x01 ; shift flag (0x12 / 0x59)
#define SPEflag FLAGreg,0x02 ; special code flag (0xE0)
#define CAPflag FLAGreg,0x03 ; caps lock flag (0x0D)
#define ALTflag FLAGreg,0x04 ; ALT flag (0x11)
#define CTRLflag FLAGreg,0x05 ; CTRL flag (0x14)
#define KBDflag FLAGreg,0x06 ; keyboard data reception flag
There are these four main code blocks in the keyboard assembler source:
1. Interrupt based keyboard scan pattern acquisition

2. Keyboard scan code pre-decoding, set / clear flags
3. Scan code range checking (consistency checks)
4. Scan code decoding (look-up tables) & ASCII character conversion and output (LCD, RS232)
To save code space, I've implemented the two look-up tables (main and shift) as follows:
Small letters (a-z) are translated directly with the main look-up table, capital letters (A-Z) are obtained by simply adding d'224' (8 bit unsigned wrap-
around) to the main look-up table results of small letters. Active shift button of the keyboard is only tracked by the shift flag.
Shift table is only used for special character conversion, e.g. +, %, &, (, ), ?
Compression is also applied to lookup sections, where scan patterns are quite distant, e.g. for the entire keyboard num-block (keypad).
If you apply changes to the existing code, you may need to change the ORG directives in order to realign the assembler code properly, due to the different lookup
tables and the PIC page boundaries.
My own Key Customization [Toc] [Top]
Question: I have built successfully your AT keyboard project and it is running very well.
Now I want to customize my code such as to print out a predefined phrase e.g. 'Hello World' whenever I hit a specific key...?
Answer: This is not a difficult task, if you just use one specific key, for instance F9.
(For sequences like 'asdf', you must write your own detection routine for the main loop by checking the values in register KBD.) First look at the look-up tables
(LUT), for instance the eng_main.asm (QWERTY):

It is essentially a LUT which performs the decoding of the acquired keyboard scan codes into characters. At the top, the entries for the F1-F12 function keys are
located.
If you want a specific text to be displayed by pressing F9, change the line
retlw A'9' ; F9 -> 9 0x01
KBDtable ; (not used for characters typed with shift button active)
addwf PCL,F
retlw 0 ; invalid entry
retlw A'9' ; F9 -> 9 0x01
retlw 0 ;
retlw A'5' ; F5 -> 5
to
goto _MyRoutine
addwf PCL,F
goto _MyRoutine ; NEW: user-specific decoding for F9
retlw 0 ;
retlw A'5' ; F5 -> 5
Then you implement your own key-specific handler/subroutine _MyRoutine in the main file (section sub-routines), which displays your string, e.g. something like:
_MyRoutine
SENDw 'H' ; send to RS232
SENDw 'e'
SENDw 'l'
SENDw 'l'
SENDw 'o'
SENDw ' '
SENDw 'W'
SENDw 'o'
SENDw 'r'
SENDw 'l'
RETLW 'd' ; return with last character in w
; alternative termination:
; SENDw 'd'
; RETLW 0 ; clear w to obtain invalid entry
You can do anything in this routine, just terminate with a RETLW 0 and ensure not to change any reserved registers...
If you want to alter the output for the keyboard characters in general, look at the the '_OUTP' section in the assembler source file kbd_1xx.asm:
_OUTP ;*** RS232 ***

movfw KBD
SENDw ; send actual pressed keyboard character
goto _ClrStall
There, the acquired keyboard character (in KBD) is sent to the RS232 interface.
If having a LCD display, the value of KBD might also be displayed using:
_OUTP ;*** LCD & RS232 ***

movfw KBD
LCDw ; display keyboard character on LCD
movfw KBD
goto _ClrStall
This is roughly what is done in the '_OUTP' section in the assembler source file kbd_2xx.asm.
My own Key Sequence [Toc] [Top]
Question: I have built successfully your AT keyboard project and it is running very well.
Now I want to customize my code such as to detect a specific key sequence, e.g. 'asdf'. Is this feasible...?
Answer: This is a more challenging task. (Alternatively, consider to just use one specific key e.g. F9 as described above.)
You need to write your own subroutine in the main loop in order to detect the desired character sequence. The keyboard character is usually passed within the
register KBD.

;******************************
;btfsc your_other_flag
;call your_other_service
goto _MLOOP
;******************************
Confusion about Sweden and Switzerland...? [Toc] [Top]
Do you know Microsoft? Are you a global player, too? Or do you travel sometimes to Europe?
Did it happen to you, that you ended up in Stockholm instead of Zurich?
Don't worry, even Microsoft is confused by the two european countries, Sweden and Switzerland.
You are excused as well if you mix this up...
Microsoft Wired Keyboard 500

I recently bought two cheap, but nice Microsoft PS/2 keyboards - before PS/2 products are fading out. Microsoft obviously does not know the
difference between Sweden and Switzerland: They supplied a skandinavian manual (swedish, norwegian, danish, finnish) instead of a central
europe one (german, french, italian, english). Ok, it could have been worse: they could have shipped a japanese keyboard layout...

[Toc] [Top]

click here

AT Keyboard Interface V2.04 for Microchip PIC16F84 Microcontroller

with Dot-Matrix LCD Display for Microchip PIC16F84
Concept
How it works
Specifications
Features
Limitations
Project Resources
User-specific Customization
Concept [Toc] [Top]
This implementation contains the complete fetch and decoding of AT keyboard scan patterns as well as RS232 transmission of ASCII characters to the RS232
target device. It also features an interface to a dot matrix LCD display to visualize the characters typed on the locally attached keyboard.

An elderly picture of my workplace, at which the initial

A recent picture of my workplace connecting a Microsoft
development took place.
PS/2 AT keyboard to the PIC16F84.
converts the keyboard scan patterns to ASCII characters, shows them on the LCD display and transmits them to the RS232 target device.
The keyboard scan code capture is done by an interrupt service routine. The event, which triggers the interrupt is a falling edge on the keyboard clock line
performing other tasks concurrently: That's why I call the acquisition routine preemptive. It does not block the processor while acquiring data.
Only RS232 transmission is supported by this program, since PORTB,0 interrupt is already used by the keyboard clock line. There exists no possibility to
implement also RS232 reception using my modules m_rsxxx.asm, because they require PORTB,0 as well and are laid out as non-preemptive data acquisition
routines (see also 'Limitations').
If you don't know the theory of AT keyboards, have a look at my short introduction or at Craig Peacocks tutorial about Interfacing the PC's Keyboard.

Processor: Microchip PIC16F84

Throughput: 1 MIPS
Keyboard Routine Features: Capability of bi-directional communication between microcontroller and keyboard
Required Hardware: AT keyboard, PS/2 connector, MAX232, HD44780 compatible dot matrix LCD (2x16, 2x20 or
2x40 characters)

Bi-directional communication between microcontroller and keyboard.
Bi-directional communication between microcontroller and LCD display.
Visualization of transmitted characters on local LCD.
Parametrizable LCD display width: constant 'LCDwidth'
Support of ASCII conversion from direct ALT-DEC entries, e.g. ALT + 6 + 4 = @ (ALT + [1..3] numbers)
Support of ASCII conversion from direct CTRL-HEX entries, e.g. CTRL + 3 + F = ? (CTRL + [1..2] letters/numbers)
ALT-DEC and CTRL-HEX features work for both, keypad and keyboard numbers, as well as with upper and lower case letters [a..f]

Basically the same limitations as for AT Keyboard Interface V1.xx.
kbd_2xx.asm View: eng_main.html View: eng_shif.html kbd_204_eng.hex
Slim version without ALT- QWERTZ 'codepage':
DEC & CTRL-HEX feature: Modified Swiss German Modified Swiss German kbd_204_sg.hex
kbd_202b.asm 'codepage' (QWERTZ) 'codepage' (QWERTZ)
The above programs need additional include files (modules) to get successfully assembled: m_bank.asm, m_wait.asm, m_rs096.asm, m_lcd_bf.asm
Important: Due to bi-directional communication between controller and keyboard as well as between controller and LCD display, the above programs only
work if both components are connected and are working properly!
The schematic of the AT keyboard interface using the PIC 16F84: Keyboard_V2xx.pdf.

You can get the description of the various keyboard connectors <here>.
User-specific Customization [Toc] [Top]
For a high level view, please refer to the section 'How it works' above.
Basically the same customization as for AT Keyboard Interface V1.xx applies to this implementation.
If you apply changes to the existing code, you may need to change the ORG directives in order to realign the assembler code properly.
[Toc] [Top]

click here

AT Keyboard Interface V3.05 for Microchip PIC 16C74A Microcontroller

with LCD Display for Microchip PIC16F77 / PIC16C74A
Concept
How it works
Specifications
Features
Limitations
Project Resources
Concept [Toc] [Top]
This implementation contains the complete fetch and decoding of AT keyboard scan patterns as well as RS232 transmission and reception of ASCII characters to
and from the remote RS232 client. This microcontroller application also features an interface to a dot matrix LCD display to visualize the the data received from
the RS232 client on the first line, and the characters typed on the locally attached keyboard on the second line.

converts the keyboard scan patterns to ASCII characters, shows them on the LCD display and transmits them to the RS232 target device.
The keyboard scan code capture is done by an interrupt service routine. The event, which triggers the interrupt is a falling edge on the keyboard clock line

performing other tasks concurrently: That's why I call the acquisition routine preemptive. It does not block the processor while acquiring data.
This program features also the capability of bi-directional communication between controller and keyboard for configuration purposes and to control the keyboard
LEDs. RS232 data exchange is carried out by using the internal USART of the PIC 16C74A. RS232 data reception is done on an interrupt-based acquisition
scheme, provided by the USART.
If you don't know the theory of AT keyboards, have a look at my short introduction or at Craig Peacocks tutorial about Interfacing the PC's Keyboard.
Processor: PIC16C74 A
Clock Frequency: 4.00 / 8.00 MHz crystal
Throughput: 1 / 2 MIPS
RS232 Baud Rate: 9600 / 19200 baud with BRGH = 1
Keyboard Routine Features: Capability of bi-directional communication between controller and
keyboard
Acquisition Methodology: Preemptive, interrupt-based keyboard scan pattern acquisition,
decoding to ASCII characters during normal operation mode
activated by ready flag
Required Hardware: AT keyboard, PS/2 connector, MAX232, HD44780 compatible dot
matrix LCD (2x16, 2x20 or 2x40 characters)
Bi-directional communication between microcontroller application and remote RS232 client.

Visualization of received and transmitted characters on local LCD.


Important note from Jason Plumb:
Hey,
First, lemme say that I like your site and thank you for providing excellent reference material for us home-hobbyist microcontroller geeks. I am currently
working on a music/noise project that uses a PS/2 keyboard interfaced to a PIC16F84, and I used your page at http://www.electronic-engineering.ch/microchip/
projects/keyboard/v1xx/keyboard_v1xx.html heavily as a reference when designing hardware and writing code. Anyway, I just thought that I would mention
that I ran into a problem that I have since solved. The problem involved sending bytes *TO* the keyboard from the PIC (in order to light NumLock and
ScrollLock). Your "Host To Keyboard Protocol" section indicates that the keyboard will take the data line low for a clock after the byte is sent to create an ACK
bit. Apparently, the PS/2 keyboard that I have (generic $10 comp-USA brand) doesn't send an ACK bit, but rather sends a whole byte. If my code attempted to
wait for the ACK bit, it hung indefinitely. I changed the wait to look for a byte (by calling my existing function) and everything worked perfectly. I stumbled on
this idea by looking at other online references (most notably, some Linux kernel code at http://www.mscs.mu.edu/~georgec/Classes/207.1998/14Minix_book/S/
src%20kernel%20keyboard.c.html#307). I have seen this ACK *byte* mentioned elsewhere too. I *think* the keyboard sends back 0xFA as an ACK byte, but I
have not personally confirmed this. Perhaps your excellent documentation could just use a quick note of clarification so that other don't run into the same
problem. Maybe something as simple as: "NOTE: Some keyboards send an ACK byte (value 0xFA) instead of an ACK bit.".
Thanks again,
Jason
Note from the author:
The comment above refers to bi-directional communication between PIC microcontroller and AT keyboard, i.e. to the source code of the AT Keyboard Interface
V2.xx and higher versions. The bi-directional communication between host and keyboard is designed to support both Ack bits and Ack bytes.
Every command sent from the host to the keyboard needs to have an Odd Parity bit and an Ack bit at the end.
Every command received by the keyboard from the host needs to be acknowledged by the keyboard by sending an Ack byte (0xFA) to the host. See also
section 'Host to Keyboard Protocol' at the AT Keyboard Interface V1.xx page.
A corresponding PIC assembler code example is shown below:

However, some AT keyboards may behave different and may need code adaptations to get bi-directional communication working properly.
kbd_3xx.asm View: eng_main.html View: eng_shif.html kbd_3xx_eng.hex
Slim version without ALT- QWERTZ 'codepage':
DEC & CTRL-HEX feature: Modified Swiss German Modified Swiss German kbd_3xx_sg.hex
kbd_301.asm 'codepage' (QWERTZ) 'codepage' (QWERTZ)
The above programs need additional include files (modules) to get successfully assembled: m_bank.asm, m_wait.asm, m_lcd_bf.asm

The schematic of the AT keyboard interface using the PIC 16C74A: Keyboard_V3xx.pdf.
[Toc] [Top]

click here

AT Keyboard Box V2.05 for Microchip PIC 16C74A Microcontroller
AT Keyboard Box V2.05

with LCD Display for Microchip PIC16F77
Concept
How it works
Specifications
Parts order information
Features
Limitations
Project Resources
Available PIC Assembler Source Code
Schematics, Data Sheets, Pinout
Concept [Toc] [Top]
This implementation contains the complete fetch and decoding of AT keyboard scan patterns as well as RS232 transmission and reception of ASCII characters to
and from the remote RS232 client. This microcontroller application also features an interface to a dot matrix LCD display to visualize the the data received from
the RS232 client on the first line, and the characters typed on the locally attached keyboard on the second line. Further, the application has also a small numeric
foil-keypad and a piezo-beeper for acoustic feedback.
Dynamic configuration of RS232 baud rate setting at start-up (user-customization with 1200 baud - 115200 baud), with 12 seconds inactivity time-out. In case the
time-out applies, the user-customization process terminates with the current setting. Default setting after power-up is 9600 baud.
http://www.trash.net/~luethi/microchip/projects/keyboard/kbd_box/kbd_box.html (1 of 10)12/02/2008 17:16:14

PIC16F77 development board

with MAX232, serial port (and RS232 to USB1.1 Workplace
connector) and dot matrix LCD connection with numeric foil-keypad, interrupt generation circuit,
PIC16C74A development board, and laptop
Interrupt generator
for numeric foil-keypad: Whenever a key is hit, a key-
specific analog voltage is put on the first line to the A/
AT Keyboard Box V2.05 setup D converter. At the same time an interrupt is
with numeric foil-keypad, dot matrix LCD display and generated by this comparator circuit and put on the
AT keyboard second IRQ line.
Front view
Numeric foil-keypad Microchip PIC16C74A microcontroller and piezo-
Connection topology: 1x12 beeper on the left side.

showing the start-up message of the AT Keyboard Box V2.05
and some keyboard and keypad entries
Basically it works in the same way as the AT Keyboard Interface V3.xx.

Here is only the description of the additional small numeric foil-keypad. The numeric foil-keypad is equipped with a specific resistor cascade to decode the values
through direct 8 bit A/D conversion using the PIC-internal A/D converter. The advantage is a very low pin usage: Only two pins are necessary for proper detection
and decoding of all keypad entries. One pin provides the analog value, the other pin serves for interrupt generation whenever a key of the keypad is touched. The
interrupt is used to start the A/D conversion.
During the interrupt service routine, only a short busy wait (analog settling time) and the A/D conversion - using the internal RC oscillator - is carried out. Before
leaving the ISR, the 8 bit A/D result is stored in a specific register and a dedicated flag is set.
Decoding of the A/D value is done during normal operation (activated by the flag) using two look-up tables. The first look-up table (LUT1) contains the expected
8 bit values of the keypad to check for valid entries. A numeric window of 3 allows for slight analog deviations during matching. The matching algorithm just
scans the entire LUT1 until the received keypad A/D result matches a LUT1 entry. The amount of loops carried out in LUT1 determines the position of the
corresponding symbol/character in LUT2. At the end, RS232 transmission and LCD display update are carried out.
Dynamic configuration of RS232 baud rate setting at start-up (user-customization with 1200 baud - 115200 baud). A watchdog timer implemented using TMR1
checks for inactivity during the customization process. After 12 seconds of inactivity, the user-customization process terminates with the current setting. At power-
up, the default setting is 9600 baud, which will be configured after the time-out - unless no user-customization takes place.
This setup works also without attached foil-keypad, even if the corresponding code is assembled and loaded into the microcontroller.
LCD display after power-up, ready for customization of RS232

User customization is done by pressing 'a' on the AT keyboard
or '*' on the numeric foil-keypad

LCD display after first alteration

(pressed button 'a' or '*' once)
LCD display after third alteration

(pressed again button 'a' or '*')
LCD display with completed user customization of RS232

(pressed button 's' or '#' once)

LCD display showing locally entered data on second line

(i.e. entered on local AT keyboard or foil-keypad)
LCD display showing both remote and locally entered data

(upper line was entered on remote host, lower line was entered
on local AT keyboard or foil-keypad)
Processor: PIC16F77 (PIC16C74A)

Clock Frequency: 14.745600 MHz (HS mode)
Throughput: 3.7 MIPS
RS232 Baud Rate: Customizable by user (BRGH = 0),
any setting from 1200 baud - 115200 baud
Serial Output: default setup: 9600 baud, 8 bit, no parity, 1 stopbit
keyboard
Numeric Keypad Features: Interrupt-based acquisition, direct 8 bit A/D conversion
activated by ready flag (including LCD display and RS232
activities)
Required Hardware: AT keyboard, PS/2 connector, MAX232 level shifter, dedicated

foil-keypad, LM393 comparator circuity for interrupt generation,
HD44780 compatible dot matrix LCD (2x16, 2x20 or 2x40
characters)
Optional Hardware: Piezo beeper with decoupling capacitor
Note that every change in microprocessor clock frequency needs a re-calibration and/or re-design of the analog foil-keypad decoding circuitry.
Parts order information [Toc] [Top]
Numeric foil-keypad order information and technical specifications:

www.conrad.de: FOLIENTASTATUR 1x12, Part-Nr. 709948-14
Dynamic configuration of RS232 baud rate setting at start-up.

Bi-directional communication between microcontroller application and remote RS232 client.
Supports foil-keypad input through direct 8 bit A/D conversion and look-up table.
Piezo-beeper for acoustic feedback of keypad entries.
Visualization of received and transmitted characters on local LCD.

Basically the same limitations as for AT Keyboard Interface V3.xx.
The analog foil-keypad decoding approach deserves dedicated design and calibration: If a key on the keypad is hit, an interrupt is generated to start the A/D
conversion. The analog value built by the keypad resistor cascade needs some settling time until stable and reproduceable A/D values can be read out by the PIC
microprocessor (overshoots, undershoots).
This means that the PIC microprocessor clock frequency (related to the A/D conversion speed), output drive strength of the keypad resistor cascade and both
debounce capacitors on IRQ line and analog value pin affect the proper function of the keypad circuit. Whenever the PIC clock frequency is changed, (slight)
adaptations on the analog circuitry may have to be expected.
For calibration of the numeric foil-keypad, please refer to the page 'Numeric Foil-Keypad Calibration V0.04'.
Fully functional version English 'codepage' (QWERTY) English 'codepage' (QWERTY) QWERTY 'codepage':
V2.05: View: eng_main.html View: eng_shif.html kbd_box_eng.hex
kbd_box.asm Download: eng_main.asm Download: eng_shif.asm
QWERTZ 'codepage':
See also 'Numeric Foil- Modified Swiss German Modified Swiss German kbd_box_sg.hex
Keypad Calibration V0.04' 'codepage' (QWERTZ) 'codepage' (QWERTZ)

Schematics, Data Sheets and Pinout [Toc] [Top]
The schematics of the AT Keyboard Box using the PIC16F77:
Top view: kbd_box_top.pdf (with outdated 4 MHz crystal, now 14.7456 MHz)
LCD connection: kbd_box_lcd.pdf
Numeric foil-keypad: kbd_box_keypad.pdf
RS232 circuitry: kbd_box_max232.pdf
Power supply: kbd_box_power.pdf
Simulation of interrupt generation circuit (positive IRQ pulses): kbd_box_sdf.pdf

[Toc] [Top]

click here

AT Keyboard Interface with Morse Code Support V1.02 for Microchip PIC16F84 Microcontroller
AT Keyboard Interface with Morse Code Support V1.02

for Microchip PIC16F84
Concept
How it works
Specifications
Supported Morse Alphabet
Features
Limitations
Project Resources
Concept [Toc] [Top]
target device.
Additional Morse port for pulse-width modulated (PWM) Morse code output. Further, there is also the ability to enable acoustic Morse code feedback through a
Piezo beeper (parameterizable feature).
Basically, it works in the same way as the AT Keyboard Interface V1xx.
Morse code feature:

All legal ASCII characters specified within the Morse alphabet are translated to a 16 bit pattern through a look-up table. Within these bit patterns, two consecutive
ones followed by a zero indicate a dash, a dot is encoded as single one followed by a zero.
The Morse code has different lengths for encoding, e.g. e = . b = -... 1 = .---- ? = ..--.. therefore 16 bits are necessary to support all of them. For
instance, 'b' is encoded in 16 bits as b'1101_0101_0000_0000'. Subsequent zeros at the end within a pattern are considered as termination and are ignored. The
Morse pattern is signaled as pulse-width modulated stream at the Morse port, active high.
http://www.trash.net/~luethi/microchip/projects/keyboard/morse_1x/morse_1x.html (1 of 6)12/02/2008 17:16:15
Parameterization of Piezo beeper support (acoustic Morse code feedback) with constant BEEP_ENABLE within section 'Parameterization' in program code.
Customization of Morse code speed at assemble time (length of dot, length of dash, wait period in between dash and dot, wait period in between two characters)
can be done using constants within section 'Constant declaration' in program code. No dynamic speed control during run time (not yet).
Since Morse code transmission needs some time for each character - especially numbers - multiple typed characters at the AT keyboard are stalled within the
keyboard internal TX buffer whenever the PIC microcontroller pulls down the open-collector clock line (between keyboard and PIC) for stalling. With this
scheme, up to 7 keyboard characters can be queued up without data loss (in my no-name 10$ keyboard). This queuing mechanism is maybe keyboard-dependent.
Translation from keyboard ASCII characters to Morse code is done using a look-up table. The look-up table for the ASCII to 16 bit Morse pattern conversion has
been created using an Excel 97 work sheet (MorseTableGenerator.zip) and Visual Basic macros. The supported Morse alphabet is listed in this table below.
The 16 bit Morse code look-up table for Microchip PIC assembler has been
created automatically using an Excel 97 work sheet and Visual Basic macros.

Throughput: 1 MIPS
Keyboard Routine Features: Capability of uni-directional communication between microcontroller and keyboard
Required Hardware: AT keyboard, PS/2 connector, MAX232
Required Software: RS232 terminal software
Supported Morse Alphabet [Toc] [Top]
Char Morse code Char Morse code Char Morse code Char Morse code
A .- N -. 0 ----- " .-..-.
B -... O --- 1 .---- ' .----.
C -.-. P .--. 2 ..--- () -.--.-
D -.. Q --.- 3 ...-- , --..--
E . R .-. 4 ....- - -....-
F ..-. S ... 5 ..... . .-.-.-
G --. T - 6 -.... : ---...
H .... U ..- 7 --... ? ..--..
I .. V ...- 8 ---..
J .--- W .-- 9 ----.

K -.- X -..-
L .-.. Y -.--
M -- Z --..
Supported Morse alphabet within this Microchip PIC project.

Morse code translation and PWM output at Morse port, active high
Acoustic feedback through Piezo beeper, default enabled
Same as within AT Keyboard Interface V1.03.
morse_1x.asm View: eng_main.html View: eng_shif.html morse_1x_eng.hex
QWERTZ 'codepage':
Modified Swiss German Modified Swiss German
morse_1x_sg.hex
The above programs need additional include files (modules) to get successfully assembled: m_bank.asm, m_wait.asm, m_rs096.asm, m_lcd_bf.asm.
Basically, the schematic of the AT Keyboard Interface with Morse Code Support V1.02 is the same as the AT Keyboard Interface V1.04: Keyboard_V1xx.pdf
The only additional features:
PWM Morse code output at PortA1 (RA1), active high

Acoustic feedback through Piezo beeper at PortA3 (RA3)
The 16 bit Morse code look-up table for Microchip PIC assembler as Excel 97 work sheet with Visual Basic macros: MorseTableGenerator.zip
Basically the same customization as for AT Keyboard Interface V1xx applies to this implementation.

[Toc] [Top]

click here

AT Keyboard Interface with Morse Code Support V2.02

with dot matrix LCD Display for Microchip PIC16F84
Concept
How it works
Specifications
Supported Morse Alphabet
Features
Limitations
Project Resources
Concept [Toc] [Top]
target device. It also features an interface to a dot matrix LCD display to visualize the characters typed on the locally attached keyboard.
Additional Morse port for pulse-width modulated (PWM) Morse code output. Further, there is also the ability to enable acoustic Morse code feedback through a
Piezo beeper (parameterizable feature).
Basically, it works in the same way as the AT Keyboard Interface V2.03, although this program does not support direct Ctrl-Hex and Alt-Dec entry, and no bi-
directional communication between keyboard and PIC microcontroller. Further, there is also no RS232 data reception.
Morse code feature:

All legal ASCII characters specified within the Morse alphabet are translated to a 16 bit pattern through a look-up table. Within these bit patterns, two consecutive
ones followed by a zero indicate a dash, a dot is encoded as single one followed by a zero.
The Morse code has different lengths for encoding, e.g. e = . b = -... 1 = .---- ? = ..--.. therefore 16 bits are necessary to support all of them. For
instance, 'b' is encoded in 16 bits as b'1101_0101_0000_0000'. Subsequent zeros at the end within a pattern are considered as termination and are ignored. The
Morse pattern is signaled as pulse-width modulated stream at the Morse port, active high.
Parameterization of Piezo beeper support (acoustic Morse code feedback) with constant BEEP_ENABLE within section 'Parameterization' in program code.
Customization of Morse code speed at assemble time (length of dot, length of dash, wait period in between dash and dot, wait period in between two characters)
can be done using constants within section 'Constant declaration' in program code. No dynamic speed control during run time (not yet).
Since Morse code transmission needs some time for each character - especially numbers - multiple typed characters at the AT keyboard are stalled within the
keyboard internal TX buffer whenever the PIC microcontroller pulls down the open-collector clock line (between keyboard and PIC) for stalling. With this
scheme, up to 7 keyboard characters can be queued up without data loss (in my no-name 10$ keyboard). This queuing mechanism is maybe keyboard-dependent.
Translation from keyboard ASCII characters to Morse code is done using a look-up table. The look-up table for the ASCII to 16 bit Morse pattern conversion has
been created using an Excel 97 work sheet (MorseTableGenerator.zip) and Visual Basic macros. The supported Morse alphabet is listed in this table below.

The 16 bit Morse code look-up table for Microchip PIC assembler has been
created automatically using an Excel 97 work sheet and Visual Basic macros.

Throughput: 1 MIPS
Required Hardware: AT keyboard, PS/2 connector, MAX232, HD44780 compatible dot matrix LCD (2x16, 2x20 or
2x40 characters)
Required Software: RS232 terminal software
Supported Morse Alphabet [Toc] [Top]
Char Morse code Char Morse code Char Morse code Char Morse code
A .- N -. 0 ----- " .-..-.
B -... O --- 1 .---- ' .----.
C -.-. P .--. 2 ..--- () -.--.-
D -.. Q --.- 3 ...-- , --..--
E . R .-. 4 ....- - -....-
F ..-. S ... 5 ..... . .-.-.-
G --. T - 6 -.... : ---...
H .... U ..- 7 --... ? ..--..
I .. V ...- 8 ---..

J .--- W .-- 9 ----.

K -.- X -..-
L .-.. Y -.--
M -- Z --..
Supported Morse alphabet within this Microchip PIC project.

Visualization of transmitted characters on local LCD.
Morse code translation and PWM output at Morse port, active high
Acoustic feedback through Piezo beeper, default enabled
Same as within AT Keyboard Interface V1xx.

morse_2x.asm View: eng_main.html View: eng_shif.html morse_2x_eng.hex
QWERTZ 'codepage':
Modified Swiss German Modified Swiss German morse_2x_sg.hex
The above programs need additional include files (modules) to get successfully assembled: m_bank.asm, m_wait.asm, m_rs096.asm, m_lcd_bf.asm
Important: Due to bi-directional communication between controller and LCD display, the above programs only work if both components are connected and
are working properly!
Basically, the schematic of the AT Keyboard Interface with Morse Code Support V2.02 is the same as the AT Keyboard Interface V2.04: Keyboard_V2xx.pdf
The only additional features:
PWM Morse code output at PortA1 (RA1), active high

Acoustic feedback through Piezo beeper at PortA3 (RA3)
The 16 bit Morse code look-up table for Microchip PIC assembler as Excel 97 work sheet with Visual Basic macros: MorseTableGenerator.zip

[Toc] [Top]

click here

Fully software controlled RS232 communication test routine for PIC16F84
RS232 Communication Test Routine (1)

fully software controlled RS232 transmission and reception for PIC16F84
Concept
Specifications
Project Resources
Concept [Toc] [Top]
Fully software controlled RS232 reception and transmission for PIC16F8x.

Display of received ASCII characters sent from PC via RS232 and their corresponding decimal value on the LCD. Microcontroller sends
feedback of received characters back to the terminal window. When the PIC terminal is idle, it sends a status message '@' to the PC every
2.75 seconds.
Shows the implementation and function of the modules m_wait.asm, m_rs096.asm, m_lcd.asm and m_lcdv08.asm on the PIC 16F84.
PCB test board for PIC16F84 PIC16F84 test board with MAX232
using a dot matrix LCD display and a MAX232 for RS232 Test setup using LCD display on PortB and asynchronous RS232
transmission. connection (RX on PortB0, TX on PortA0). RS232 to USB1.1
connector in the back.
http://www.trash.net/~luethi/microchip/projects/rs232/commtest1/commtest1.html (1 of 3)12/02/2008 17:16:17

LCD display after reset LCD display output during operation

shows welcome screen of this program. after sending 'A' from the PC across the RS232 line. The
character sent is echoed back to the PC by the microcontroller.

showing the start-up message of this RS232 test routine.

Throughput: 1 MIPS


Code Size of entire Program: approx. 566 instruction words
Acquisition Methodology: Interrupt-based RS232 data acquisition, with LCD display output and RS232 echo during normal
operation
Required Hardware: MAX 232, dot matrix LCD display
Main File HEX Files

commtest1.asm commtest1.hex
asm
[Toc] [Top]

click here

Fully hardware controlled RS232 communication test routine for PIC16F77
RS232 Communication Test Routine (2)

with LCD display and MAX232 for PIC16F77 / PIC16C74A
Concept
Specifications
Project Resources
Concept [Toc] [Top]
Fully hardware controlled RS232 reception and transmission for PIC16F7x.

Display of received ASCII characters sent from PC via RS232 and their corresponding decimal value on the LCD. Microcontroller
sends feedback of received characters back to the terminal window. When the PIC terminal is idle, it sends a status message '@' to
the PC every 2.75 seconds.
Shows the implementation and function of the modules m_wait.asm, m_lcd.asm and m_lcdv08.asm on the PIC16F77 (or
PIC16C74A).
Dot matrix LCD display

LCD display output after sending '@' from the PC
across the RS232 line. The character sent is echoed PIC16F77 test board with MAX232
by the microcontroller. Test setup using LCD display on PortB and RS232
connection (built-in HW USART of PIC16C74A in
asynchronous mode).


HyperTerminal output using this RS232 test routine.
The four consecutive letters 'asfd' at the end shows the
successful RX FIFO buffering in the microcontroller.

Throughput: 1 MIPS
RS232 Configuration: 9600 with BRGH = 1
Acquisition Methodology: Preemptive, interrupt-based RS232 data acquisition, with LCD display output and
RS232 echo during normal operation
Required Hardware: MAX 232, dot matrix LCD display
Main File HEX Files


commtest2.asm commtest2.hex
The above program needs additional include files (modules) to get successfully assembled: m_bank.asm, m_wait.asm, m_lcd.asm
[Toc] [Top]

click here

Dual RS232 communication routine for PIC16F77
Dual RS232 Communication Routine

with LCD display and two MAX232 for PIC16F77
Concept
Specifications
Project Resources
Concept [Toc] [Top]
Two independent RS232 interfaces, with display of received ASCII characters and corresponding decimal values on the dot matrix LCD.
ASCII values entered on one terminal window are transmitted by the first RS232 link to the controller, displayed on the LCD, and further
transmitted across the second RS232 link to the other terminal window. The microcontroller sends feedback of received characters back to
the issueing terminal window. When the PIC terminal is idle, it sends a status message '@' to both terminals every 2.75 seconds.
This program incorporates two independent RS232 interfaces, one hardware-based and one software-based. The HW-based RS232
interface uses the PIC-internal USART (and interrupts), configured to standard 9600 baud @ 4 MHz PIC clock. The SW-based RS232
interface is based on the module file m_rs096.asm, which performs interrupt-based RS232 reception on PortB0 (INTCON,INTF) at 9600
baud @ 4 MHz PIC clock.
The program shows the implementation and function of the modules m_bank.asm, m_wait.asm, m_lcd.asm, m_lcdv08.asm, and m_rs096.
asm on the PIC16F77.
Dot matrix LCD display

showing output after having received 'a' from the first RS232
terminal and 'b' from the second RS232 terminal. Every
character received is displayed in both ASCII and decimal
value, and then transmitted to the other RS232 terminal across
the second communication link. PIC16F77 test board with two MAX232
Test setup using onboard MAX232 and additional external
MAX232 to serve both RS232 links. The PIC controller now serves
two asynchronous RS232 connections, one in software mode using
interrupts and one using the hardware USART of the PIC16F77.
http://www.trash.net/~luethi/microchip/projects/rs232/dual_rs232/dual_rs232.html (1 of 3)12/02/2008 17:16:19

Screen shot of the two HyperTerminal Programs

using the dual RS232 communication routine. The left window configured to ComPort 5 represents the first link, the right window
configured to ComPort 7 represents the second link. After power-up and welcome message, the message 'Hello World' was entered at the
left terminal window, then the message 'I say also hello' was transmitted using the right terminal window.

Throughput: 1 MIPS
RS232 Configuration: 9600 with BRGH = 1
Acquisition Methodology: SW-based RS232: Interrupt-based RS232 data acquisition
HW-based RS232: Preemptive, interrupt-based RS232 data acquisition,
LCD display output and RS232 echo during normal operation
Required Hardware: two MAX 232 for two RS232 interfaces, dot matrix LCD display

Main File HEX Files

16F77dual.asm 16F77dual.hex
[Toc] [Top]

click here


with 16 bit Table Read, for Excel 97
Concept
Project Resources
Concept [Toc] [Top]
This routine has been written to check the Excel Worksheet RS232scopeV102.xls.
It reads 16 bit values from a table, proceeds framing and sends the data to the PC.
The table was built with the "Automatic Table Generator for MPLAB Assembler"
http://www.trash.net/~luethi/microchip/projects/rs232/scope/scope.html (1 of 2)12/02/2008 17:16:20

Main File HEX Files

scope.asm scope.hex
[Toc] [Top]

click here
http://www.trash.net/~luethi/microchip/projects/rs232/scope/scope.html (2 of 2)12/02/2008 17:16:20

Dot matrix LCD test routine for Microchip PIC16F84
LCD Test Routine

with user-defined characters and LCD display animation for PIC16F84
Concept
Specifications
Project Resources
Schematics
Concept [Toc] [Top]
This test application demonstrates the usage of the LCD assembler module files for dot matrix LCDs. It works for LCD controllers such
as Hitachi HD44780 (PDF data sheet, 389 kB), Samsung KS0073 (PDF data sheet, 673 kB), and compatibles.
It initializes the LCD display to the 4 bit transfer mode, loads two user-defined characters to the CGRAM,
and displays both of them together with some other special characters. Afterwards, an animation using
stars is shown, followed by a forth-and-back shift animation of a 'Hello World' string.
Shows the implementation and functionality of the modules m_wait.asm and m_lcd.asm on the PIC16F84. For the Samsung KS0073
controller type, the constant 'LCDTYPE' must be set to 0x1 to include also the extended function set features for configuration. If this
does not help, see also the FAQ section concerning LCD communication issues.
To see a schematic of the connection between LCD and PIC microcontroller, please refer to the schematic section below. Basically, the
connection is described in the header section of each LCD assembler module file.
LCD display after reset

shows two user-defined characters and other special characters of
the LCD
PCB test board for PIC16F84

using a dot matrix LCD display and a MAX232 for RS232
transmission
http://www.trash.net/~luethi/microchip/projects/LCDx_test/LCDx_test.html (1 of 3)12/02/2008 17:16:21

LCD display output during operation LCD display output during operation
shows animation with stars shows forth-and-back shifting 'Hello World'

Clock Frequency: 4 MHz crystal (HS mode)
Throughput: 1 MIPS
LCD Transmission Mode: 4 Bit on D4 - D7 (MSB), uses high nibble of the LCD port
LCD Connections: 7 wires (4 Data, 3 Command)
Total LCD Connections: 10 wires (4 Data, 3 Command, 1 Vdd, 1 GND, 1 Contrast)
Required Hardware: HD44780 compatible dot matrix LCD (2x16, 2x20 or 2x40 characters)
Main File HEX Files

LCDx_test.asm LCDx_test.hex
Specifications:
- used module m_lcdx.asm for building HEX-file with portB as LCD port
LCD port connections:
B0: not used, still available for INTB
B1: D4
B2: D5
B3: D6
B4: D7
B5: E
B6: R/W
B7: RS

Schematics [Toc] [Top]
Download the PDF schematic to illustrate the connectivity of both 'classes' of LCD driver routines:
Modules m_lcd.asm, m_lcdx.asm, m_lcd_bf.asm, m_lcdxbf.asm: working only on entire ports ([1..7], without [0]),
e.g. PortB[1..7] on PIC16F84,
or PortB[1..7], PortC[1..7], PortD[1..7] on PIC16F77
Modules m_lcde.asm, m_lcde_bf.asm, m_lcdexbf.asm: working on separate, customizable ports,
e.g. PortB[0..2] for control lines & PortA[0..3] for data lines on PIC16F84, PIC16F7x,
or PortC[5..7] for control lines & PortD[0..3] for data lines on PIC16F77, or ...
Note that the data lines have to be on the low nibble of the port.
[Toc] [Top]

click here

Binary to Decimal Test Routine for PIC16F84
Binary to Decimal Test Routine

shows the output of 16 bit binary to decimal conversion on a dot matrix LCD
Concept
Specifications
Project Resources
Concept [Toc] [Top]
This test application demonstrates the usage of the LCD assembler module files m_lcdv16.asm and m_lcdb16.asm on a PIC 16F84. These
module files are suitable for displaying decimal and binary information on a dot matrix LCD. Together with the module file m_lcd.asm,
they work with LCD controllers such as Hitachi HD44780 (PDF data sheet, 389 kB), Samsung KS0073 (PDF data sheet, 673 kB), and
compatibles.
The program initializes the LCD display to 4 bit transfer mode, clears two 8 bit registers (LO, HI) for the 16 bit counter, and displays
every counter step as decimal and binary value on the LCD display.
Shows the implementation and functionality of the modules m_wait.asm, m_lcd.asm, m_lcdv16.asm and m_lcdb16.asm on the PIC16F84.
For the Samsung KS0073 controller type, the constant 'LCDTYPE' must be set to 0x1 to include also the extended function set features for
configuration. If this does not help, see also the FAQ section concerning LCD communication issues.
LCD display PCB test board for PIC16C84/PIC16F84

shows the use of the binary to decimal conversion module with attached dot matrix LCD display on PortB
(m_lcdv16asm) and the bitstream visualization module (m_lcdb16.
asm)

Clock Frequency: 4 MHz crystal (XT mode)
http://www.trash.net/~luethi/microchip/projects/counter/counter.html (1 of 2)12/02/2008 17:16:22

Binary to Decimal Test Routine for PIC16F84
Throughput: 1 MIPS
Main File HEX Files

counter.asm counter.hex
Specifications:
- used module m_lcd.asm for building HEX-file with portB as LCD port
B1: D4
B2: D5
B3: D6
B4: D7
B5: E
B6: R/W
B7: RS
The above program needs additional include files (modules) to get successfully assembled: m_bank.asm, m_wait.asm, m_lcd.
asm, m_lcdb16.asm
[Toc] [Top]

click here
http://www.trash.net/~luethi/microchip/projects/counter/counter.html (2 of 2)12/02/2008 17:16:22

Debugging Routine / Bitstream Visualization for PIC16F84
Debugging Routine / Bitstream Visualization

shows 16 bit binary output on a dot matrix LCD
Concept
Specifications
Project Resources
Concept [Toc] [Top]
This test application demonstrates the usage of the LCD assembler module file m_lcdb16.asm on a PIC 16F84. This module file is
suitable for displaying binary information on a dot matrix LCD. Together with the module file m_lcd.asm, it works with LCD controllers
such as Hitachi HD44780 (PDF data sheet, 389 kB), Samsung KS0073 (PDF data sheet, 673 kB), and compatibles.
The program initializes the LCD display to 4 bit transfer mode, clears two 8 bit registers (LO, HI) for the 16 bit counter, and displays
every counter step as binary value on the LCD display.
Shows the implementation and functionality of the modules m_wait.asm, m_lcd.asm, and m_lcdb16.asm on the PIC16F84. For the
Samsung KS0073 controller type, the constant 'LCDTYPE' must be set to 0x1 to include also the extended function set features for
configuration. If this does not help, see also the FAQ section concerning LCD communication issues.
LCD display PCB test board for PIC16C84/PIC16F84

shows the use of the bitstream visualization module m_lcdb16.asm with attached dot matrix LCD display on PortB

Clock Frequency: 4 MHz crystal (XT mode)
Throughput: 1 MIPS
http://www.trash.net/~luethi/microchip/projects/debug/debug.html (1 of 2)12/02/2008 17:16:23

Debugging Routine / Bitstream Visualization for PIC16F84
Main File HEX Files

debug.asm debug.hex
Specifications:
- used module m_lcd.asm for building HEX-file with portB as LCD port
B1: D4
B2: D5
B3: D6
B4: D7
B5: E
B6: R/W
B7: RS
The above program needs additional include files (modules) to get successfully assembled: m_bank.asm, m_wait.asm, m_lcd.
asm, m_lcdb16.asm
[Toc] [Top]

click here
http://www.trash.net/~luethi/microchip/projects/debug/debug.html (2 of 2)12/02/2008 17:16:23

AT Keyboard Scan Code Debug Routine for Microchip PIC16F84 Microcontroller
AT Keyboard Scan Code Debug Routine

RS232 based Scan Code Debugging for Microchip PIC16F84
Concept
Project Resources
Concept [Toc] [Top]
The Scan Code Debug Routine provides the ability to verify the scan patterns sent by the keyboard. The visualization can be done
with the RS232 Debug Interface, an Excel 97 Worksheet.
A screen shot from a debugging session is given below:
http://www.trash.net/~luethi/microchip/projects/keyboard/scan_deb/scan_deb.html (1 of 2)12/02/2008 17:16:24

AT Keyboard Scan Code Debug Routine for Microchip PIC16F84 Microcontroller
At the picture above, you can see the strange scan pattern sent by the
AT keyboard when pushing the Pause/Break key:
E1 14 77 E1 FO 14 FO 77
Available Microchip PIC Assembler Source Code [Top]
Main File HEX Files

scan_deb.asm scan_deb.hex
asm
[Toc] [Top]

click here
http://www.trash.net/~luethi/microchip/projects/keyboard/scan_deb/scan_deb.html (2 of 2)12/02/2008 17:16:24

AT Keyboard Box V0.04 - Debug and Calibration for Microchip PIC 16C74A Microcontroller
Numeric Foil-Keypad Calibration V0.04

with LCD Display for Microchip PIC16F77
Concept
How the numeric foil-keypad works
Specifications
Parts order information
Project Resources
Schematics, Data Sheets, Pinout
Concept [Toc] [Top]
This application has entirely the same setup as the AT Keyboard Box V2.05.
This program refers to the calibration of the numeric foil-keypad of the AT Keyboard Box. The analog foil-keypad decoding approach deserves dedicated design
and calibration: If a key on the foil-keypad is hit, an interrupt is generated to start the A/D conversion. The analog value built by the keypad resistor cascade needs
some settling time until stable and reproduceable A/D values can be read out by the PIC microprocessor (overshoots, undershoots). For a detailed description,
please refer to the section 'How the numeric foil-keypad works' and the schematics below.
AT Keyboard Box V0.04 - Debug and Calibration

Debug and calibration for numeric foil-keypad on PIC16F77. Dedicated
output on the second line: Acquired A/D value from numeric foil-keypad and
corresponding symbol from look-up table (# has been hit).
http://www.trash.net/~luethi/microchip/projects/keyboard/box_dbg/box_dbg.html (1 of 7)12/02/2008 17:16:25
Numeric foil-keypad
Connection topology: 1x12
Interrupt generator
for numeric foil-keypad: Whenever a key is hit, a key-
specific analog voltage is put on the first line to the A/
AT Keyboard Box V0.04 setup D converter. At the same time an interrupt is
with numeric foil-keypad, dot matrix LCD display and generated by this comparator circuit and put on the
AT keyboard second IRQ line.

AT Keyboard Box V0.01 Front view

(initial version with PIC16C74A) Microchip PIC16C74A microcontroller and piezo-
beeper on the left side.

showing the start-up message of the AT Keyboard Box V0.04
and some keyboard and keypad entries
How the numeric foil-keypad works [Toc] [Top]

Here is the description of the additional small numeric foil-keypad. The numeric foil-keypad is equipped with a specific resistor cascade to decode the values
through direct 8 bit A/D conversion using the PIC-internal A/D converter. The advantage is a very low pin usage: Only two pins are necessary for proper detection
and decoding of all keypad entries. One pin provides the analog value, the other pin serves for interrupt generation whenever a key of the keypad is touched. The
interrupt is used to start the A/D conversion.
During the interrupt service routine, only a short busy wait (analog settling time) and the A/D conversion - using the internal RC oscillator - is carried out. Before
leaving the ISR, the 8 bit A/D result is stored in a specific register and a dedicated flag is set.
Decoding of the A/D value is done during normal operation (activated by the flag) using two look-up tables. The first look-up table (LUT1) contains the expected
8 bit values of the keypad to check for valid entries. A numeric window of 3 allows for slight analog deviations during matching. The matching algorithm just
scans the entire LUT1 until the received keypad A/D result matches a LUT1 entry. The amount of loops carried out in LUT1 determines the position of the
corresponding symbol/character in LUT2. At the end, RS232 transmission and LCD display update are carried out.
Dynamic configuration of RS232 baud rate setting at start-up (user-customization with 1200 baud - 115200 baud). A watchdog timer implemented using TMR1
checks for inactivity during the customization process. After 12 seconds of inactivity, the user-customization process terminates with the current setting. At power-
up, the default setting is 9600 baud, which will be configured after the time-out - unless no user-customization takes place.
This setup works also without attached foil keypad, even if the corresponding code is assembled and loaded into the microcontroller.
Note that every change in microprocessor clock frequency needs a re-calibration and/or re-design of the analog foil-keypad decoding circuitry. This means that
the PIC microprocessor clock frequency (related to the A/D conversion speed), output drive strength of the keypad resistor cascade and both debounce capacitors
on IRQ line and analog value pin affect the proper function of the keypad circuit. Whenever the PIC clock frequency is changed, (slight) adaptations on the analog
circuitry may have to be expected.
Processor: PIC16F77 (PIC16C74A)

Clock Frequency: 14.745600 MHz (HS mode)
Throughput: 3.7 MIPS
RS232 Baud Rate: Customizable by user (BRGH = 0),
any setting from 1200 baud - 115200 baud
Serial Output: default setup: 9600 baud, 8 bit, no parity, 1 stopbit
keyboard
Numeric Keypad Features: Interrupt-based acquisition, direct 8 bit A/D conversion
activated by ready flag (including LCD display and RS232
activities)

Required Hardware: AT keyboard, PS/2 connector, MAX232 level shifter, dedicated
foil-keypad, LM393 comparator circuity for interrupt generation,
HD44780 compatible dot matrix LCD (2x16, 2x20 or 2x40
characters)
Parts order information [Toc] [Top]
Numeric foil-keypad order information and technical specifications:

www.conrad.de: FOLIENTASTATUR 1x12, Part-Nr. 709948-14
Debug and calibration English 'codepage' (QWERTY) English 'codepage' (QWERTY) QWERTY 'codepage':
version for numeric foil- View: eng_main.html View: eng_shif.html box_dbg_eng.hex
keypad V0.04: Download: eng_main.asm Download: eng_shif.asm
box_dbg.asm QWERTZ 'codepage':
box_dbg_sg.hex

Modified Swiss German Modified Swiss German

Schematics, Data Sheets and Pinout [Toc] [Top]
The schematics of the AT Keyboard Box using the PIC16F77:
Top view: kbd_box_top.pdf (with outdated 4 MHz crystal, now 14.7456 MHz)
LCD connection: kbd_box_lcd.pdf
Numeric foil-keypad: kbd_box_keypad.pdf
RS232 circuitry: kbd_box_max232.pdf
Power supply: kbd_box_power.pdf
Simulation of interrupt generation circuit (positive IRQ pulses): kbd_box_sdf.pdf
[Toc] [Top]

click here


with dot matrix LCD Display
Overview
Specifications
Project Resources
Overview [Toc] [Top]
The output data format can be chosen from 8 different configurations.

I finally arrived to get some status data out of the converter, I had so much trouble, because the data sheet is not very convenient to
read and so I made a mistake. The bad representation of the data sheet is confusing: They describe all different types of the 1213x
series together in one data sheet, you have to be careful to get the right commands for the 12130 type.
To get rid of crosstalk, separate every data wire from each other with an extra ground wire between them (ADC to PIC interface).
At the beginning I got really confusing results because of crosstalk due to the high frequency parts of the very short clock pulses.
I use now flat band wire, each data (and clock) connection is isolated with a ground connection.
The data from the AD converter is now pretty clean and consistent.
National Semiconductors ADC12130 A/D Converter

Resolution: 12 bit + sign
Max. conversion clock frequency: 5 MHz
Max. serial clock frequency: 5 MHz
Min. conversion time: 8.8 us
Min. throughput time: 14 us
Integral linearity error: 2 LSB max
Single supply: 3.3 - 5.0 V 10 %
Hint
Do not try to connect the NSC ADC12130 to the PIC SSP interface of some more sophisticated PICs, eg. PIC 16C74. I've spent a
complete weekend trying to do that until I finally found out that the PIC SSP is not compatible with the one of the NSC ADC12130.
The clock and the data specifications of the PIC does not match with the ones of the ADC, there's an incompatible "skew" between
them.
http://www.trash.net/~luethi/microchip/projects/adc_test/nsc12130.html (1 of 2)12/02/2008 17:16:25

Main File HEX Files

nsc12130.asm nsc12130.hex
Schematic of the interface: NSC_ADC12130.pdf (12.8 KB)
[Toc] [Top]

click here
http://www.trash.net/~luethi/microchip/projects/adc_test/nsc12130.html (2 of 2)12/02/2008 17:16:25


with Excel 97 Work Sheet for Visualization
Concept
Components
Test Setup
Software
Project Resources
Concept [Toc] [Top]
Precise time is always a nice feature. In Europe, we have a public RF transmitter located in Mainflingen, Germany, providing
standardized time information at 77.5 kHz. A cheap DCF77 receiver unit translates the RF data into PWM. A PIC 16F84
microcontroller performs software-based PWM decoding and transmits the data through RS232 to a PC with dedicated Excel 97
work sheet. The Excel 97 work sheet is able to acquire and log RS232 data, and also visualizes and translates complete DCF77
frames. A complete DCF77 evaluation setup is created.
See also the short technical introduction to DCF77.
Components [Toc] [Top]
The receiver has been ordered by Conrad Electronics, 92240 Hirschau, Germany (www.conrad.de)
Component:
Ordering number: #641138
Description: DCF77-Empfnger BN 641138
Price: Euro 9.95, December 2002
based on Temic 4224 DCF77 IC

Data sheet (167 kB)
This unit performs the translation from 77.5 kHz RF to DCF77 PWM data. The information is encoded as follows: Pulse of 0.1s = 0,
0.2s = 1, numbers are encoded in BCD (binary coded decimal)
For detailed information, please refer to this document or the data sheet section.
http://www.trash.net/~luethi/microchip/projects/dcf77_test/dcf77_test.html (1 of 4)12/02/2008 17:16:27

Schematic:
Outputs need pull-up resistors (open collector) which have to draw
less than 1 mA.
1 - GND
2 - VDD, 1.5 V up to 15 V
3 - DCF77 PWM output, default active low, high pulses
4 - DCF77 PWM output, default active high, low pulses
For best reception, the Ferrit-antenna should be positioned rectangular to the direction of Mainflingen, Germany, the location of the
DCF77 transmitter.
Test Setup [Toc] [Top]
This picture shows the test setup with DCF77 receiver unit at the lower right corner. The LCD display serves only for debugging
purposes and is not used within this project. This setup consists of DCF77 PWM bit stream decoder, PIC 16F84 microcontroller,
and MAX232 level shifter for serial transmission.

A second view on my standard PIC 16F84 test board. On this setup, I only use serial transmission, no reception. At the upper left
corner of the picture, you can see the RS232 to USB1.1 converter, which I bought because my Laptop has only a single serial port. It
works astonishingly well and entirely transparent to all my software. That's what I like - and expect from quality HW-SW co-design.
Software [Toc] [Top]
Screen shot of Excel 97 based DCF77 Visualizer
This is the graphical user interface of my Excel 97 work sheet designed to visualize and translate received serial DCF77 data from

the PIC microcontroller. You can see two valid DCF77 data frames, each of them containing 59 bits of information. Every frame is
enclosed with marks of value 2. Reception and decoding is done using Visual Basic macros. I used serial port 2, provided by the
USB1.1 serial converter, configured to 19200 baud, 8 data bits, no parity, 1 stop bit. The entire chart is setup to display 150 samples.
This is normally carried out within 150 seconds, assuming a clean DCF77 data reception containing a single PWM pulse every
second.
The bit streams of the two consecutive valid frames are displayed within the two large text boxes below the chart. The Visual Basic
code carries out a simple frame consistency check (59 data bits, no marks inside) automatically every complete frame and displays
the translation of the last valid frame in the three smaller text boxes at right. To keep it simple, there is neither DCF77 parity bit
checking nor any error handling implemented in the software.
Main File HEX Files

dcf_test.asm dcf_test.hex
Technical introduction to DCF77
Download Excel 97 work sheet (DCF77 data visualization and translation): DCF77_Visualizer.zip (155 kB)
[Toc] [Top]

click here

jacOS
V1.06.0
jacOS
jacOS . ,
. jacOS event-driven priority-based RTOS. 1.06.0
, , , . .
.
.
: .
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jacOS 1.06.0 12- , 14- 16- PIC, AVR , MSP430 51.
. , 41- , , , .
18- . , "" .
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http://technogate.tripod.com/ (1 of 36)12/02/2008 17:19:07

jacOS
PIC 12 SMALL
H-T
256 ROM. .
PIC 14 COMPACT + TCB + 4 8

H-T ECB bank0 (TCB).
bank1
(ECB)
2-4 .
2
3 .
PIC18 COMPACT 1. , TCB TCB 4 8- .
H-T ECB near, ECB - 3 4-.
,
128 RAM. (96
) ~=24
2.
64Kb(32)
PIC18 NORMAL 1. , TCB
Code model = Static overlay.
IAR ECB TCB 5 9- .
__bank1 (256 ). ECB - 4 5-.
AVR GCC NORMAL TCB 5 9- .
WINAVR ECB - 4 6-.
AVR COMPACT 1.
IAR __tiny. ~=30.

2. Cross Call tiny small
v0,v1,v3.
TCB 4 8- .
ECB - 2 5-.
1. Cross Call
NORMAL small
v3.
TCB - 5 12- .
ECB - 3 6-.
MSP430 NORMAL TCB 6 12- .
IAR ECB - 4 6-.
x51 NORMAL 1. 64Kb TCB 4 8- .
Keil ECB - 3 5-.
.

PIC12 , PIC16 HI-TECH PICC v8.05 Produce assembler list file
PIC18 HI-TECH PICC-18 v8.35
PIC18 IAR C/EC++ Compiler for , XLINK

Microchip PIC18 2.12A/W32 (Diagnostics -> No global type checking).
AVR WinAVR 20040404

jacOS
AVR IAR C/EC++ Compiler for AVR Code motion (?)

3.20C/W32 Cross Call (?) .
MSP430 IAR C/EC++ Compiler for MSP430 : Size - High.
V3.20A/W32
x51 Keil Cx51 v7.04 , BL51 Misc
Warning L15 (Disable Warning Number: = 15)
jacOS . "" PIC18 (,

HT-PICC18). V1.06.0 .
, .
. , PIC16 PIC12
"" HI-TECH PICC.
.
, path info .
.
.
.
. , .
, , "" ADC, , -
. , "", RTOS. ""
. "" , . ,
( ), , . .
, . , " " ,
.
jacOS . ,
. , ,
... . , .
OST_TASK task_1; //1
__task void Task1( void )

{
static int counter; //2
for(;;) { //3
counter++; //4
OS_Cooperate(); //5
counter++; //6
}
}
IAR __task.
, , . (TCB).
//1 task_1 OST_TASK, TCB. jacOS
TCB. OST_TASK, - OST_TASK_T, .
TCB bank1. , . jacOS bank2
bank3. , , .

jacOS
, .
bank1 OST_TASK task_1; // bank1
OS_Cooperate() //5 .
. . , , OS_Cooperate() jacOS
.
, //2. static ,
. , static,
. PIC,
.
, . OS_Cooperate() ,
. , ? jacOS
, , .

, . . ,
your_func() , .
, . , .
your_func().
, , ,
. , .
C:, c:\jacos\prim
jacOS. PIC IDE - MPLAB 5.7x MPLAB 6.. .
, .
. , ,
, .
counter++ . , counter
. , IDE , counter++ .
/********************************************/
__task void TaskABC(void)

{
char loc_var,
static char sta_var;
for(;;) {
loc_var = PORTA;
. . .
sta_var = 45;
OS_Cooperate(); //1
loc_var = PORTB; //2
. . .
OS_Cooperate();
}
}
OS_Cooperate() , . //1
, //2. , //2 loc_var , sta_var,

jacOS
, 45-.
- , .
/***** c:\jacos\prim\prim1*****************/
#define OS_MAIN
#include <jacos.h>
OST_TASK task1;
OST_TASK task2;
unsigned char counter;
__task void T1( void )

{
while(1) {
counter++; //3 //8
OS_Cooperate(); //4 //9
counter++; //7 //13
}
}

{
while(1) {
counter++; //5 //11
OS_Cooperate(); //6 //12
counter++; //10 //
}
}
void main(void)
{
OS_Init();
OS_Task_Create(T1,&task1); //1
OS_Task_Create(T2,&task2);
while(1) {
OS_Scheduler(); //2
}
}
/**** 1*******************************/
#define OS_MAIN
, main() , OS_MAIN.
#include <jacos.h>
.
.
OS_Init();
. .
OS_Task_Create(
OST_ADDRESS __,
OST_TASK_P __TCB,
OST_U8 );

jacOS
. prim1 , OS_Task_Create() . - ,
- TCB.
, prim1 . , .
. ,
, , .
OS_Scheduler();
OS_Scheduler() .
. , OS_Scheduler() , .
. , OS_Scheduler() - ,
. , . , WDT, .
c:\jacos\prim\prim1.
, jacOS ? , .
"jacnfg.h". prim1 :
#define OS_Lib_Type OS_ntn

/**** jacnfg.h ****************************/
PIC12F675 :
main.c -
40Antln.lib -
:
1) jacnfg.h.
2) head ( \jacos\incl ).
prim1 MPLAB 6.2x :

Project->Build Options->Project->General->Include Path = \jacos\prim\prim1;\jacos\incl
, . PICC , Produce assembler

list file ON. , PIC12 PIC16 . , "",
.
.
. .
. ? , ,
100 150? OS_Delay().
/***** c:\jacos\prim\prim2*****************/
#define OS_MAIN
#include <jacos.h>
OST_TASK_T task1;
OST_TASK task2;

jacOS

{
while(1) {
counter++; //1 //N+1
OS_Delay(10); //2 //N+2
counter++; //N //
}
}

{
while(1) {
counter++; //3 //6 . . .
OS_Cooperate(); //4 //7 //N-1
counter++; //5 //8 //N+3
}
}
void main(void)
{
OS_Init();
PR2 = OS_TMR_TICK;
TMR2 = 0;
INTCON = 0b11000000;
TMR2IE = 1;
TMR2IF = 0;
T2CON = 0x05;
while(1) {
OS_Scheduler();
}
}
interrupt void intr(void)

{
if ( OS_Is_Timer()) {
OS_Timer_Tick_Set();
OS_Timer();
}
}
/******************************************/
#define OS_Lib_Type OS_dtn
#define OS_Timer_Tick_Set() { TMR2IF = 0; }

#define OS_Is_Timer() TMR2IF
#define OS_TMR_TICK 249
/**** jacnfg.h ****************************/
T1 TCB - OST_TASK_T. 1-2 ,

OST_TASK, . ,
OST_TASK_T. , .
, . , . ,

jacOS
OST_TASK_T OST_TASK, .
OS_Delay() ( ).
- , . ,
. . . ,
, . .
, .
jacOS 1000- . 4 PIC 1.
, 1000- , .
, . , , ,
PIC16 1000- . , . , .
PIC . AVR MSP430 - 2000 .
OS_Delay(OST_TIMER __);
OS_Delay() "" , . ""?

. :
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. TMR2 . ,
(4). OS_Timer() . OS_Timer(),
. OS_Delay(10) 1 10 , 9
+ 10+ . ? , , ,
, . .
, EEPROM 8-9 = 5.
while ( EECR & (1 << EEWE) ) OS_Delay(5ms); // :)
, EEPROM
10.
OS_Delay(10ms); // :(
, , , OS_Delay()
. OS_Delay(),
. ,
"" . , , .
jacOS V1.06.0, , OS_Timer_Tick_Set() OS_Is_Timer() Timer0 PIC12

jacOS
PIC16, Timer2 PIC18. jacnfg.h .

, , .
__task void __( void )

{
static char __ = 0;
while(1) {
if ( == 0) {
if (__ == 0) {
OS_Delay(120_ms);
} else {
__--;
}
} else {
if (++__ == 4) {
__ = 0;
__();
}
}
if (__ != 0) {
OS_Delay(10_ms);
}
}
}
, , . . . ,
. .
, OS_Delay .
.
/***** c:\jacos\prim\prim3*****************/
. . .
{
while(1) {
counter++;
OS_Cooperate();
OS_Task_Stop();
counter++;
}
}
. . .
{
while(1) {
counter++;
OS_Cooperate();
if (counter > 15) {
if (OS_Task_Resume(&task1) == OS_ERROR) {
counter = 0;
}
}
counter++;
}
}

jacOS
OS_Task_Stop "" "". jacOS

. , , , - ,
. , .
OST_ERR_MSG OS_Task_Resume(OST_TASK_P __);
OS_Task_Stop OS_Task_Resume. TCB.

OS_Task_Resume , TCB "". ,
"". , . , ""
. , ,
. . ,
, V1.06.0 . " " -
"". .
.
"" .
. . jacOS : . ,
, . - 0 1.
. - , - , - , .. , -
, , , .
, , .
, . , 0, , .
/***** c:\jacos\prim\prim4*****************/
#define OS_MAIN
#include <jacos.h>
OST_TASK_T task1;
OST_TASK task2;
OST_TASK task3;
OST_SEMAPHORE event1;

{
OST_ERR_MSG y;
while(1) {
counter++; //0 //N+2
OS_Delay(10); //1 //N+3
OS_Post_BSemR(&event1,y); //N
counter++; //N+1
}
}

{
while(1) {
counter++; //2
OS_Wait_Sem(&event1); //3

jacOS
counter++; //N+4
}
}

{
while(1) {
counter++; //4 //7
OS_Cooperate(); //5 //8 . . . //N-1
counter++; //6
}
}
void main(void)
{
OS_Init();
OS_Sem_Create(&event1,0);
PR2 = OS_TMR_TICK;
TMR2 = 0;
INTCON = 0b11000000;
TMR2IE = 1;
TMR2IF = 0;
T2CON = 0x05;
while(1) {
OS_Scheduler();
}
}

{
OS_Timer();
}
}
/***** c:\jacos\prim\prim4*****************/
#define OS_Lib_Type OS_ctn


/**** jacnfg.h ****************************/
OST_SEMAPHORE event1;
(ECB) c OST_SEMAPHORE.
bank1.
OS_Sem_Create(
OST_SEMAPHORE_P __,
OST_SEM __

jacOS
);
OS_Sem_Create . ECB, -
. 0 1. , .
, , , .
OS_Post_BSemR(
OST_SEMAPHORE_P __,
OST_ERR_MSG _
);
OS_Post_BSemR , ECB , .
OS_ERROR - , , . . OS_NOERR -
. , . (
), .
OS_Wait_Sem(OST_SEMAPHORE_P __ );
OS_Wait_Sem , , , OS_Wait_Sem 0
. , . , .
, FIFO. .
OS_Wait_Sem . . ,
, .
, OS_Wait_Sem 0, .
.
__task void _( void )

{
for(;;) {
OS_Wait_Sem(&); // ,
__(); //
OS_Post_BSem(&); //
OS_Cooperate(); //
}
}
OS_Cooperate(), . , jacOS
, , , .
, . , , ,
, "" . OS_Cooperate.
jacOS OS_Post_BsemR: OS_Post_BSem - , .
OS_Post_BSemI - .
. .
"" . , .
, V1.06.0 .
.
/***** c:\jacos\prim\prim5*****************/
. . .
OST_MESSAGE event1;

jacOS
unsigned char * msg;

{
while(1) {
counter++;
OS_Delay(10);
OS_Post_Msg(&event1,&counter);
counter++;
}
}

{
while(1) {
counter++;
OS_Wait_Msg(&event1,msg);
counter++;
}
}
. . .
OS_Msg_Create(&event1,0);
. . .
OST_MESSAGE event1;
OST_MESSAGE - ECB .
OS_Post_Msg(
OST_MESSAGE_P ___,
OST_MSG_P __
);
, . .
. , , - .
, . jacOS V1.06.0 ,
, . , ,
.
OS_Wait_Msg(
OST_MESSAGE_P ___,
OST_MSG_P __
);
OS_Wait_Msg lvalue, .
OS_Msg_Create(
OST_MESSAGE_P ___,
OST_MSG_P __
);
OS_Msg_Create. , .
(void*)0, HT PICC 0.

jacOS
.
, , - . ? jacOS V1.06.0
, .
/***** c:\jacos\prim\prim6*****************/
#define OS_MAIN
#include <jacos.h>
OST_TASK_T task1;
OST_TASK_T task2;
OST_TASK task3;
OST_MESSAGE event1;
unsigned char even;
unsigned char odd;

{
OST_ERR_MSG y;
unsigned char * tx;
while(1) {
counter++;
OS_Delay(20);
if (counter & 1) {
tx = &odd;
} else {
tx = &even;
}
OS_Post_MsgR(&event1,tx,y);
if (y == OS_ERROR) {
counter = 0;
}
}
}

{
OST_MSG_P rx;
while(1) {
counter++;
OS_Wait_MsgT(&event1,rx,15);
if (! OS_Timeout() ) {
(*(unsigned char *)rx)++;
}
}
}

{
while(1) {
counter++;
OS_Delay(2);
counter++;
}

jacOS
void main(void)
{
OS_Init();
OS_Task_Create(T1,&task1,1);
PR2 = OS_TMR_TICK;
TMR2 = 0;
INTCON = 0b11000000;
TMR2IE = 1;
TMR2IF = 0;
T2CON = 0x05;
while(1) {
OS_Scheduler();
}
}

{
OS_Timer();
}
}
void OS_Idle(void)
{
counter--;
}
/***** c:\jacos\prim\prim6*****************/
#define OS_Lib_Type OS_tt


#define OS_MAX_PRIO 1
/**** jacnfg.h ****************************/
OS_Task_Create . 16, 0 15-. ,

. , ,
. , , , , .
, . ,
.
OS_Wait_MsgT(
OST_MESSAGE_P ___,
OST_MSG_P __
OST_TIMER __
);

jacOS
, OS_Wait_Msg .
, .
OS_Timeout().
OST_ERR_MSG OS_Timeout(void);
1- .
, .
OS_Task_Status(). :
OST_TASK_STS OS_Task_Status( OST_TASK_P __TCB);
OSS_TIMER_Q - (delayed)
OSS_EVENT_Q - (, , )
OSS_STOPPED -
OS_STS_PRIO_MASK -
prio = OS_Task_Status(&task) & OS_STS_PRIO_MASK;

notready = OS_Task_Status(&task) & (OSS_TIMER_Q + OSS_EVENT_Q + OSS_STOPPED);
, , . ,
. , ,
.
.
, . . OS_Idle(), .
.
, ,
, .
{
while(1) {
counter++;
OS_Wait_SemT(&event1,5);
if ( OS_Timeout() ) {
counter++;
OS_Cooperate();
}
}
}
, "" .
.
jacOS . -
, . (), .
, .
, .
OS_Wait_Sem(&ev1); //1

jacOS
OS_Wait_Sem(&ev2);
OS_Wait_Sem(&ev3);
. . .
#define flag1 0x01

#define flag2 0x02
#define flag3 0x04
#define mask (flag1 + flag2 + flag3)
OS_Wait_Flag(&event1,mask); //2
, : ev1, ev2, ev3. , :

flag1,flag2,flag3. "" , . //1, , 0.
//2, , . , . ,
. ,
, , . .
/***** c:\jacos\prim\prim7*****************/
#define OS_MAIN
#include <jacos.h>
OST_TASK task1;
OST_TASK task2;
OST_TASK task3;
OST_FLAGS event1;
unsigned char counter = 0;

{
while(1) {
counter++;
OS_Set_Flag(&event1,0x01); //4
OS_Cooperate(); //5
counter++;
}
}

{
while(1) {
counter++;
if (counter > 17) {
OS_Set_Flag(&event1,0x02); //2
OS_Task_Stop(); //3
}
counter++; //9
}
}

{
while(1) {
counter++;
OS_Wait_Flag(&event1,0x03); //1 //8

jacOS
OS_Clear_Flag(&event1,0x03); //6
OS_Task_Resume(&task2); //7
counter = 0;
}
}
void main(void)
{
OS_Init();
OS_Flag_Create(&event1,0);
while(1) {
OS_Scheduler();
}
}
/***** c:\jacos\prim\prim7*****************/
#define OS_Lib_Type OS_et
/**** jacnfg.h ****************************/
3 . .
OST_FLAGS event1;
OST_FLAGS - ECB .
OS_Flag_Create(
OST_FLAGS_P ___,
OST_FLG __);
OS_Wait_Flag(
OST_FLAGS_P ___,
OST_FLG _);
OS_Set_Flag(
OST_FLAGS_P ___,
OST_FLG __);
OS_Clear_Flag(
OST_FLAGS_P ___,
OST_FLG ___);
, . , - jacOS V1.06.0
8- 16- .
, - . , :
#define task1_run 0x01

OS_Flag_Create(&event1,0xFF); // 8-
. . .
{
static counter = 0;
while(1) {

jacOS
while(1) {
// ROM 2-3
// PIC16.
if (!(OS_Read_Flag(&event1) & task1_run)) break;
counter++;
if (!(OS_Read_Flag(&event1) & task1_run)) break;
OS_Cooperate();
counter++;
}
OS_Task_Stop();
}
}

{
while(1) {
// Task1
OS_Clear_Flag(&event1,task1_run);
OS_Cooperate();
// "" Task1
if (OS_Task_Resume(&task1_tcb) != OS_ERROR) {
OS_Task_Restart(Task1,&task1_tcb);
}
OS_Set_Flag(&event1,task1_run);
OS_Cooperate();
}
}
, OS_Task_Stop() .
( ) call goto, .
OS_Task_Resume OS_Task_Restart , , OS_Task_Create.
, . , OS_Task_Create , TCB ,
OS_Task_Resume "". TCB
- , .
OS_Task_Resume , . OS_Task_Restart
Task1.
.
, . , .
: OS_Post_CSemI(), OS_Post_BSemI(), OS_Post_MsgI(),
OS_Set_FlagI(), OS_Clear_FlagI(), OS_Accept_MsgI(), OS_Accept_SemI(). jacOS
.
, , . ,
( AVR , , OS_Timer()) .
.
. , ,
, . (background) . ,
, , .
/***** c:\jacos\prim\prim8*****************/
#define OS_MAIN
#include <jacos.h>

jacOS
OST_TASK task1;
OST_TASK task2;
OST_TASK task3;
OST_MESSAGE event1;
char * msg;
char st1 = 'A';

char st2 = 'B';

{
OST_ERR_MSG y;
while(1) {
counter++;
OS_Post_MsgR(&event1, &st1,y );
if (y) {
y = 0;
}
OS_Cooperate();
counter++;
}
}

{
while(1) {
counter++;
OS_Cooperate();
}
}

{
while(1) {
counter++;
OS_Wait_Msg(&event1,msg);
if(*msg == 'B') {
counter = 0;
} else if (*msg == 'A') {
counter = 1;
} else {
counter--;
}
}
}
void main(void)
{
OS_Init();

jacOS
PR2 = OS_TMR_TICK;
TMR2 = 0;
INTCON = 0b11000000;
TMR2IE = 1;
TMR2IF = 0;
T2CON = 0x05;
while(1) {
OS_Scheduler();
}
}
#pragma interrupt_level 0
{
char i;
if (OS_Post_MsgI(&event1,&st2) == OS_ERROR) {
i--;
}
}
}
/***** c:\jacos\prim\prim8*****************/
#define OS_Lib_Type OS_ein2
#define OS_USE_MSG_I
/**** jacnfg.h ****************************/
OST_ERR_MSG OS_Post_MsgI(
OST_MESSAGE_P ___,
OST_MSG_P __);
OS_ERROR , , , ,
. OS_NOERR . OS_Post_MsgI OS_Post_MsgR.
#pragma interrupt_level 0
H-T PIC PICC18,

.
#define OS_USE_MSG_I
OS_USE_MSG_I OS_Post_MsgI() .
3 . . 1.
, 1, . .
, . ,
. , . , V1.06.0
( OS_Post_MsgQ(), OS_Post_MsgQI(), OS_Post_MsgQR(), OS_Wait_MsgQ, OS_Wait_MsgQT,
OS_MsgQ_Create(), OS_Accept_MsgQ(), OS_Accept_MsgQI() ).

jacOS
OS_Timer() .
. , , OS_Timer 12- PIC.
/***** c:\jacos\prim\prim9*****************/
. . .
while(1) {
OS_Scheduler();
if (OS_Is_Timer()) {
OS_Timer();
}
}
. . .
OS_Is_Timer() OS_Timer_Tick_Set() :
// 12- PIC.
#define OS_Is_Timer() TMR0 & 0x80
#define OS_Timer_Tick_Set() TMR0 -= OS_TMR_TICK/2
// 14- PIC.
#define OS_Is_Timer() T0IF
#define OS_Timer_Tick_Set()\
{\
TMR0 -= OS_TMR_TICK;\
T0IF = 0;\
}
// PIC18.
#define OS_Timer_Tick_Set() TMR2IF = 0
// AVR.
#define OS_Is_Timer() (TIFR & (1 << TOV0))
#define OS_Timer_Tick_Set() {TCNT0 -= OS_TMR_TICK;}
// MSP 8051 -
//. ,
// .
#define OS_Is_Timer() (1)
#define OS_Timer_Tick_Set() {}
.
, .
. , , , , , .
:
, . (. 1)

jacOS
:
n- round robin, delays,
d- delays
e-
c- delays
t- delays
:
t-
i-
:
n-
-
:
- , delays .
2- , delays .
. 2.
1. .
PIC (HI-TECH)
211 12C(R)509(A,AF,AG), 12CE519, 12F509
212 16C505
222 16C(R)57(A,B,C), 16C(R)58(A,B), 16F57
401 16C554(A), 16C556(A), 16C558(A), 16C(R)62(A,B), 16C620, 16C621, 16C622, 16C(R)64(A),
16C712, 16C715, 16C716, 16C(R)72(A)
40A 12F629, 12F675, 16C71, 16C710, 16C711, 16C(R)84, 16F630, 16F676, 16F84(A)
40B 12C671, 12C672, 12CE673, 12CE674, 12F683, 16C432, 16C433, 16C620A, 16C621A, 16C622A,
16C641, 16C661, 16CE623, 16CE624, 16CE625, 16F684, 16F716
40C 12F635, 16C717, 16C770, 16C781, 16C782, 16F72, 16F627(A), 16F628(A), 16F636, 16F818,
16F819, 16F870, 16F871, 16F872
411 16C(R)63(A), 16C(R)65(A,B), 16C73(A,B), 16(L)C74(A,B)
412 16F73, 16F74, 16F737, 16F747, 16F873(A), 16F874(A)
41B 16C642, 16C662
41C 16C771, 16C773, 16C774, 16C923, 16C924, 16C925, 16F648A, 16F688, 16F87, 16F88
42C 16C66, 16C67, 16C745, 16C76, 16C765, 16C77, 16F76, 16F77, 16F767, 16F777, 16F876(A),
16F877(A)
800 PIC18
80E PIC18 errata (18F5x)
PIC (IAR)
I18 Target: PIC18, Code model - Static overlay
AVR GCC WINAVR
A20 Target: Instruction set - avr2 (MCU types: at90s2313, at90s2323, attiny22, at90s2333,
at90s2343, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534, at90s8535)
A30 Target: Inst. set - avr3 (MCU types: atmega103, atmega603, at43usb320, at76c711)
A40 Target: Inst. set - avr4 (MCU types: atmega8, atmega83, atmega85)
A50 Target: Inst. set - avr5 (MCU types: atmega16, atmega161, atmega163, atmega32, atmega323,
atmega64, atmega128, at43usb355, at94k)
AVR (IAR)

jacOS
At0 Target: Processor configuration -v0 ; Memory model - Tiny

As1 Target: Processor configuration -v1 ; Memory model - Small
Ns1 Target: Processor configuration -v1 ; Memory model - Small
, tiny_* . (mega48, mega88, ...)
:
#define OS_MEM_MODEL NORMAL
As3 Target: Processor configuration -v3 ; Memory model - Small
ELPM ( --64k_flash).
, RAM tiny_* .
Ns3 Target: Processor configuration -v3 ; Memory model - Small
ELPM ( --64k_flash).
:
Es3 Target: Processor configuration -v3 ; Memory model - Small
c ELPM RAMPZ (mega128, mega64 ..).
:
MSP430
430 Target: msp430xx
x51
S51 Target: Memory Model - Small
C51 Target: Memory Model - Compact
L51 Target: Memory Model - Large
2. .

PIC 12, 14 (void const *)
2
800, 80E (void far *)
2
I18 (void __dptr *)
3
A20, A30, A40, A50 (void *)
2
At0, At1, As1, (void __generic *)
2
At3, As3, Ns3, Es3 (void __generic *)
3
430 (void *)
2
S51, C51, L51 (void *)
3
.
jacnfg.h . , 800ctun.lib,

jacOS
:
#define OS_Lib_Type OS_ctun
, OS_Lib_Type, OS_ .
, . , 0,1,2 3,
:
,
.
, .
.
#define OS_USE_CSEM_I // OS_Post_SemI()
#define OS_USE_BSEM_I // OS_Post_BSemI()
#define OS_USE_MSG_I // OS_Post_MsgI()
#define OS_USE_FLAGS_I // OS_Set_FlagI()
#define OS_USE_MSGQ_I // OS_Post_MsgQI()
OS_Timer_Tick_Set() OS_Is_Timer() , , ,
.
, , ,
:
#define OS_OPTI_SEMT // OS_Wait_Sem() OS_Wait_SemT()
#define OS_OPTI_MSGT // OS_Wait_Msg() OS_Wait_MsgT()
#define OS_OPTI_MSGQT // OS_Wait_MsgQ() OS_Wait_MsgQT()
#define OS_OPTI_DELAY // OS_Delay()
, . ,
Es3, Ns3 Ns1 :
.
OS_Accept_Msg()
OS_Accept_Msg(
OST_MESSAGE_P ___,
OST_MSG_P __);
, . , NULL.
OS_Wait_Msg(), , .
: , background
OS_Accept_MsgI()
OS_Accept_MsgI(
OST_MESSAGE_P ___,
OST_MSG_P __);
, . , NULL.
.
:

jacOS
OS_Accept_MsgQ()
OS_Accept_MsgQ(
OST_MSGQUEUE_P ____,
OST_MSG_P __);
. , NULL. OS_Wait_MsgQ(), ,
.
: , background
OS_Accept_MsgQI()
OS_Accept_MsgQI(
OST_MSG_P __);
. , NULL. OS_Wait_MsgQ(), ,
. .
:
OS_Accept_Sem()
OS_Accept_Sem(OST_SEMAPHORE_P ___);
0, . OS_Wait_Sem(),
.
: , background
OS_Accept_SemI()
OS_Accept_SemI(OST_SEMAPHORE_P ___);
0, . OS_Wait_Sem(),
, . .
:
OS_Clear_Flag()
OS_Clear_Flag(
OST_FLAGS_P ___,
OST_FLG ___)
.
: , background
OS_Clear_FlagI()
OS_Clear_FlagI(
OST_FLAGS_P ___,

jacOS
OST_FLG ___)
. .
:
OS_Cooperate()
OS_Cooperate()
.
:
OS_Cur_Delay
OST_TIMER OS_Cur_Delay
. ,
sleep OS_Cur_Delay. : {OS_Cur_Delay = 1; OS_Timer();}
OS_Cur_Delay . , sleep
.
: , background
OS_Cur_Task()
OST_TASK_P OS_Cur_Task()
(TCB) .
:
OS_Delay()
OS_Delay(OST_TIMER __)
. 0.
:
OS_Flag_Create()
OS_Flag_Create(
OST_FLAGS_P ___,
OST_FLG __)
.
: , background
OS_Init()
OS_Init()
. .

jacOS
: background
OS_Msg_Create()
OS_Msg_Create(
OST_MESSAGE_P ___,
OST_MSG_P __)
.
: , background
OS_MsgQ_Create()
OS_MsgQ_Create(
OST_MSGQ_DESCR_P ___,
OST_U8 _,
OST_MSG_P *_____)
. . , ,
. ( , ,
, ). ECB
RAM. _ , .
: , background
:
OST_MSGQUEUE msgq;
bank1 OST_MSGQ_DESCR mqdscr;
bank1 OST_MSG_P mbuff[5];
__task void T_2( void )

{
OST_ERR_MSG y;
OS_MsgQ_Create(&msgq, &mqdscr, 5, mbuff);
while(1) {
counter++;
OS_Post_MsgQR(&msgq, rx, y);
}
}
OS_Post_BSem()
OS_Post_BSem(OST_SEMAPHORE_P ___);
1 0.
.
: , background
OS_Post_BSemI()
OST_ERR_MSG OS_Post_BSemI(OST_SEMAPHORE_P ___);

jacOS
1 0.
. .
OS_USE_BSEM_I .
:

OS_ERROR - ,
OS_NOERR -
OS_Post_BSemR()
OS_Post_BSemR(
OST_SEMAPHORE_P ___,
OST_ERR_MSG _)
1 0.
.
: , background

OS_ERROR - ,
OS_NOERR
OS_Post_CSem()
OS_Post_CSem(
OST_SEM __);
.
. 0, 255 (65535) 8- (16) .
: , background
OS_Post_CSemI()
OST_ERR_MSG OS_Post_CSemI(
OST_SEM __);
.
. . 0, 255 (65535) 8-
(16) . OS_USE_CSEM_I
.
:

OS_ERROR - , .
OS_NOERR -
OS_Post_CSemR()
OS_Post_CSemR(

jacOS
OST_SEM __,
OST_ERR_MSG _)
.
. 0, 255 (65535) 8- (16) .
: , background

OS_ERROR - , .
OS_NOERR -
OS_Post_Msg()
OS_Post_Msg(
OST_MESSAGE_P ___,
OST_MSG_P __);
, , .
.
: , background
OS_Post_MsgI()
OST_ERR_MSG OS_Post_MsgI(
OST_MESSAGE_P ___,
OST_MSG_P __)
, , .
. .
OS_USE_MSG_I .
:

OS_ERROR - ,
OS_NOERR -
OS_Post_MsgQ()
OS_Post_MsgQ(
OST_MSG_P __);
. .
: , background
OS_Post_MsgQI()
OST_ERR_MSG OS_Post_MsgQI(
OST_MSG_P __);
. .
.

jacOS
OS_USE_MSGQ_I .
:
OS_ERROR - . , .
OS_NOERR -
OS_Post_MsgQR()
OS_Post_MsgQR(
OST_MSG_P __,
OST_ERR_MSG _);
. .
: , background

OS_ERROR - . , .
OS_NOERR -
OS_Post_MsgR()
OS_Post_MsgR(
OST_MESSAGE_P ___,
OST_MSG_P __,
OST_ERR_MSG _)
, , .
.
: , background

OS_ERROR - ,
OS_NOERR -
OS_Post_MsgRI()
OS_Post_MsgRI(
OST_MESSAGE_P ___,
OST_MSG_P __,
OST_ERR_MSG _)
, , .
. .
:

OS_ERROR - ,
OS_NOERR -
OS_Read_Flag()
OST_FLG OS_Read_Flag(OST_FLAGS_P ___)
. .
:

jacOS
OS_Read_Msg()
OST_MSG_P OS_Read_Msg(OST_MESSAGE_P ___)
. .
:
OS_Read_Sem()
OST_SEM OS_Read_Sem(OST_SEMAPHORE_P ___);
. .
:
OS_Scheduler()
OS_Scheduler()
. .
: background
OS_Sem_Create()
OS_Sem_Create(
OST_SEM __);
, ECB, .
: , background
OS_Set_Flag()
OS_Set_Flag(
OST_FLAGS_P ___,
OST_FLG __)
. , ,
.
: , background
OS_Set_FlagI()
void OS_Set_FlagI(
OST_FLAGS_P ___,
OST_FLG __)
. .
OS_USE_FLAGS_I .

jacOS
OS_Status()
OS_Status()
.
:

OSS_EVENT - ,
OSS_IDLE -
OS_Task_Create()
OS_Task_Create(
OST_ADDRESS __,
OST_TASK_P __TCB,
OST_U8 );
, .
: , background
OS_Task_Restart()
OS_Task_Restart(
OST_ADDRESS ___,
OST_TASK_P __TCB);
( ) .
:
OS_Task_Resume()
OST_ERR_MSG OS_Task_Resume(OST_TASK_P __TCB);
, . .
: , background

OS_ERROR - , ""
OS_NOERR -
OS_Task_Status()
OS_Task_Status(OST_TASK_P __TCB,)
.
:

:
OSS_TIMER_Q -
OSS_EVENT_Q -
OSS_STOPPED -

jacOS
OS_STS_PRIO_MASK -
OS_Task_Stop()
OS_Task_Stop()
"". ,
.
:
OS_Ticks()
OS_Ticks()
, . OS_Timer()
1-, , . ,
. OS_Ticks() >= 2 , , ,
.
:
OS_Timeout()
OST_ERR_MSG OS_Timeout(void)
OS_Wait_SemT(), OS_Wait_MsgT(),
OS_Wait_MsgQT().
:

OS_ERROR - .
OS_NOERR - .
OS_Timer()
OS_Timer()
.
:
OS_Timer_Queue()
OST_TASK_P OS_Timer_Queue()
TCB , . , NULL.
:
OS_Wait_Flag()
OS_Wait_Flag(

jacOS
OST_FLAGS_P ___,
OST_FLG _)
, , ,
.
:
OS_Wait_Msg()
OS_Wait_Msg(
OST_MESSAGE_P ___,
OST_MSG_P __);
, , .
. lvalue.
:
OS_Wait_MsgQ()
OS_Wait_MsgQ(
OST_MSG_P __)
, , . ,
, . lvalue.
:
OS_Wait_MsgQT()
OS_Wait_MsgQT(
OST_MSG_P __,
OST_TIMER __)
, , . ,
, . .
NULL. lvalue.
OS_Timeout().
:
:
bank1 OST_TASK_T task3;

OST_MSGQUEUE msgq;
OST_MSG_P xx;
__task void T_3( void )

{
while(1) {
counter++;
OS_Wait_MsgQT(&msgq, xx, 3);
if (! OS_Timeout() ) {
*(int *)xx = -18;
} else {

jacOS
counter = 0;
}
counter++;
}
}
OS_Wait_MsgT()
OS_Wait_MsgT(
OST_MESSAGE_P ___,
OST_MSG_P __,
OST_TIMER __);
, , . .
. . lvalue.
0. OS_Timeout().
OS_Wait_Sem()
OS_Wait_Sem(OST_SEMAPHORE_P ___);
, , .
:
OS_Wait_SemT()
OS_Wait_SemT(
OST_TIMER __)
, , .
. 0.
OS_Timeout().
:
_____________________________________________________________________
http://jacos.narod.ru
jacos_post@mtu-net.ru

BITSCOPE = PC OSCILLOSCOPES AND ANALYZERS
Login BITSCOPE = PC OSCILLOSCOPES AND ANALYZERS
Affordable High Performance PC Oscilloscope Logic Analyzers

BitScopes are USB or Ethernet connected PC Based Mixed Signal Oscilloscopes.
PRODUCTS
This means they capture and display one, two or
four analog signals and eight logic or timing
signals, simultaneously.
Any BitScope can be used as a:
Digital Storage Oscilloscope

SOFTWARE
Logic State Analyzer
MY ACCOUNT Spectrum Analyzer
Data Recorder
Some models include an Arbitrary Waveform

Generator (AWG) and all of them have a Smart
POD expansion connector on the front for logic probes and external signal processing modules.
If you design, test or repair embedded systems, work with microcontrollers, robotics, sensors and
servos, or modern automotive, avionic or other control systems you'll inevitably find you need to see
BUY ONLINE
analog and digital or logic signals simultaneously and time synchronized.
And this of course is precisely what all BitScopes are designed to do !
Product News & Releases Earlier News | Contact Us
DESIGNS
2007-10-01 USB BitScope 100 Release
Opto-Isolated USB BitScope Released
Meet the new opto-isolated BS100U BitScope.
BS100U is unique among USB connected PC based

scopes because like our Network models it is
ACCESSORIES electrically isolated from the PC.
You can ground reference it independently so USB
drop-outs due to ground-loops or glitches when
looking at high power electrical or automotive systems
are never a problem.
Another feature to make its debut in BS100U is a
powerful flash programmable DSP waveform
generator option. Operating independently of the
scope's capture engine it allows complex waveforms to
be synthesised concurrently with waveform capture
and display.
And BS100U is very power efficient with a standby mode designed for long life on battery power.
DOWNLOADS
Also included is an adjustable external trigger input in addition to its 2 analog and 8 logic channels and it
supports a wide range of crystal accurate capture rates, especially useful for RF work.
2007-05-25 BitScope Application Library

BitLib Application Programming Library
BitScope has always been programmable but now there is an easier
way to write BitScope software applications.
BitLib is a dynamic runtime library that takes care of all the low level
details of BitScope programming. To get you started it comes with
three new BitScope software applications:
Digital Storage Oscilloscope with diagnostics.
http://www.bitscope.com/ (1 of 4)12/02/2008 17:20:39

4 Channel Digital Multimeter with large displays.
Data Acqusition Spreadsheet with live updates.
They're all BitLib based and include source so you can see exactly how they work. You can also modify them
to suit your needs or use them as a starting point for your own BitScope software.
BitLib is also ideal when integrating BitScope with third party software tools. The DAQ spreadsheet provides
one example but we'll be releasing a number of others over the coming months based on your feedback.
Email us at projects and send us your requests.
2006-11-03 BitScope Product Review

USB BitScope 310 and DSO Product Review
Silicon Chip Magazine, Australia's world class electronics magazine, has
conducted an independent review of BitScope BS310U and the new BitScope
DSO software for their November 2006 edition.
If you're in Australia, you can pick up a copy at most newsagents now.

Silicon Chip is aimed at professionals, trades people and enthusiasts in the
electronics, electrical, computer and related fields. Each month they add to their
huge collection of electronics projects and articles which are now all available
globally via online subscription.
You can download a PDF copy of the review Silicon Chip have kindly sent us here.
2006-10-13 DSO Version 1.3 Online Guide

BitScope DSO 1.3 Online Guide
The Online Guide has been completely updated for DSO Version 1.3.
We've also added an interactive offline replay DSO Tutorial.
In addition to Replay and Export features announced already, this new release
includes user interface improvements such as auto range, normalize, input offset
control and channel calibration.
There are also numerous small changes like context menus for fast parameter entry,
live waveform generator previews, intelligent parameter "toggle on click" as well as
various small bug fixes.
To upgrade to DSO Version 1.3, simply download the archive, unpack and install.
2006-10-01 BitScope DSO Version 1.3 Release

DSO 1.3 Offline Replay & Display Export
Using the newly released DSO Data Recorder Version 1.3 it is now possible
replay, inspect and analyse waveforms and logic previously captured with BitScope
on a PC which has no BitScope connected.
It's ideal for sharing information with colleagues, students or customers.
Send data recordings as DDR files to others and they can replay and analyse them
"live". It's as if your BitScope is connected to their PC.
Alternatively use your own reference recordings for comparison or benchmarking new test results.
Export your data as images and embed them in word or other documents, post them on the web or send
them as email attachments. You can even sequence exported images to create animations.
Download DSO Version 1.3 and try it yourself. We've posted a set of example files to explore.
For what you can expect to see, check out Display Export and the offline replay DSO tutorial.
2006-08-01 Network BitScope 442 Release

New Multichannel Network BitScope
Meet the new 4 + 8 channel BS442N Network BitScope.
This brand new BitScope replaces BS440N as our top of the range 12

channel networked MSO and Data Acquisition System.

Like other network models it is fully isolated and networked which
means you can use it in the same room on a local network or half way around the world via the Internet.
Updated BitScope DSO software is included supporting the additional channels and new features.
2006-05-25
DDR for Pocket Analyzer

The BitScope DSO Data Recorder is now available for Pocket Analyzer.
You can now use this diminutive BitScope in PC based Data Acquistion just like its
larger brethren.
About the same size and weight as a Pocket PC, the USB powered Pocket Analyzer needs no bulky
accessories. With the same mixed signal, analog and logic capture capabilities as all BitScopes, Pocket
Analyzer sets the standard for portable PC based test gear.
2006-03-24
BitScope DSO Data Recorder

The BitScope DSO Data Recorder (DDR) is now in production release !
Whether saving a single waveform to disk or logging frames continuously 24x7, DDR is the tool for the job
and now it's a standard part of BitScope DSO.
DDR listens to all enabled channels, recording waveform and logic data to a buffer or files. DDR files may be
loaded for replay and comparison with new data or reviewed with another BitScope DSO or even loaded into
a numerical analysis tools like Microsoft Excel or Mathworks MatLab.
DDR works with all current BitScopes and may be downloaded as part of the latest DSO release.
2005-05-25
BitScope DSO 1.2 Online Guide

The brand new BitScope DSO 1.2 Online Guide is now published.
This all new guide is a comprehensive online reference to the BitScope DSO
software with numerous examples showing how to get the very best results from
your BitScope.
Learn how to use the built-in waveform generator for transfer function analysis or the cursors to measure
slew rates. Or maybe you're working with very low level signals and need to know how to optimize your
waveform resolution. It's all here.
Also, for all those people how have been asking us - the new BS310N is shipping now !
2005-05-05
New Network BitScope released

Our new Network BitScope BS310N is now available.
This new model which replaces BS300N has the same high performance
specifications to our popular USB model BS310U, but with ethernet UDP/IP connectivity this model is fully
networkable which means you can use it in the same room on a local network or half way around the world
via the Internet !
If you're after a USB model, BS310U and BS50U are also both available.
2004-07-01
New USB BitScope available in-store now

Launched today is the new USB BitScope BS310U, the successor to our very popular
BS300U. BS310U offers 4X more capture memory, built-in double speed USB and new features including a

x10 and x50 gain input multiplier, software switchable AC/DC coupling, 50 ohm termination all in a package
about 2/3 the size and weight of BS300U.
Read older news here.
Where did BitScope come from ?

The original award winning BitScope design was published in Circuit Cellar in 1998.
This classic BitScope is published here so you can learn how it works.
BitScope has evolved a long way since 1998 but all BitScopes are still based on
the same Analog + Digital concept of the original design.
Released as kits, BitScope BS220 and BS300 became very popular with
electronics enthusiasts the world over. We have since been forced to discontinue
the kits as some through-hole parts used are obsolete.
The current models BS310, BS50 and BS442 are now all SMT designs and
have become very popular with professional engineers in design and
development, manufacture, testing and service fields.
Now all models are available as manufactured products but the core design at
the heart of all these BitScopes remains the same and is published at this website.
Likewise the BitScope Virtual Machine programming API is explained and its specifications published so
anyone can write software for BitScope or build their own add-on modules.
Still not sure what BitScope is ? BitScope is a built and tested (and previously build it yourself DIY), open design, digital storage
oscilloscope and logic analyzer (also, digital sampling oscilloscope, mixed signal oscilloscope, DSO) based on the MicroChip PIC which
can be used as a PC oscilloscope, multi-purpose portable test instrument, or networked remote data acquisition device (ie DAQ), that
uses open source software and commercial software for Windows, Linux and Macintosh with drivers for numerical analysis tools such
as Mathworks MatLab or National Instruments LabVIEW that connects to your PC via ethernet (using UDP/IP) or USB (or RS-232 in
older models). Also included as part of some BitScope models is an arbitrary waveform generator (AWG) aka user programmable
function generator, an analog oscilloscope emulation (CRO) and powerful spectrum analyzer (FFT).
Google Search
WWW www.bitscope.com
Products | Software | Downloads | Online Store | My Account | Login | Contact Us

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Beyond Logic
Tuesday, February
12th, 2008
Universal Serial Bus Embedded Internet Legacy Ports Device Drivers Miscellaneous
Ring Tones for your uC Universal Serial Bus
Generate Ring Tones on your USB in a Nutshell - Making sense of

PIC16F87x Microcontroller
Using only a speaker and decoupling the USB standard
capacitor it is possible to generate USB in a Nutshell is a six part article
tunes or melodies from your Microchip detailing the Universal Serial Bus. It
PIC16F87x processor. This code currently provides details on the
supports the RTTTL ringtone format connectors, electrical, suspend
used with mobile phones such as currents, speed identification, USB
Nokia to easily port thousands of packet types, endpoints, pipes,
catchy ring tones into your embedded endpoint/transfer types including
applications. Control, Interrupt, Isochronous and
Bulk Transfers, USB descriptors
CMOS Image Sensors including Device, Configuration,
Interface, Endpoint and String
CMOS Digital Image Sensors & descriptors, the USB Setup Packet
Lenses and Standard Device, Standard
Adding vision to your projects need not Interface and Standard Endpoint
be difficult. Whether its machine vision Requests.
for robot control or the sampling and Now includes an example -
storage of images for security, CMOS PDIUSBD11 connected to a
images sensors can offer many PIC16F87x
advantages over traditional CCD
sensors. This article explores some of USB1.1 Integrated Circuits
the CMOS image sensors and lenses / We look at some of the USB1.1
lens assemblies on the market. Add Microcontrollers and I.C's on the
Image Capture to your uCLinux market today along with some cheap
Systems. yet nifty development boards. This
includes the Cypress EZ-USB Family,
Ethernet & TCP/IP Interfaces Philip's PDIUSBD11, PDIUSBD12 &
PDIUSBP11, FTDI's FT8U232AM and
Ethernet & TCP/IP Interfaces - FT8U245AM, Motorola 68HC705JB3
Updated with Digi WiFi Modules . & 68HC705JB4, National
Embedded Internet Solutions are Semiconductor's USBN9602 and
becoming more and more popular. We Microchip's PIC16C745 & PIC16C765
look at the common ethernet MACs with links to the USB USB-IF
such as the RTL8019AS and CS8900 Developers Discussion Forum and
plus popular development boards and other informative sites.
http://www.beyondlogic.org/ (1 of 8)12/02/2008 17:25:55

Beyond Logic
explore Hardware based TCP/IP

stacks from Ipsil, Connect One, USB 2 Integrated Circuits - Updated
WIZnet and Sekio along with some with the Opal Kelly XEM3001
nifty products such as the Lantronix Experimentation Module
XPort. USB 2.0 with a maximum speed of
480Mb/s is getting closer to reality.
Unique and Innovative Detailed here are some of the more
Software Solutions popular USB 2.0 silicon devices and a
status on how Microsoft is going with
PortTalk - A Windows NT/2000/XP I/O their EHCI USB2 drivers for Windows
XP and Windows 2000 operating
Port Device Driver Version 2.2
systems.
A problem that plagues Windows
NT/2000/XP, is it's strict control over I/ USB Device Driver Development
O ports. Unlike Windows 95 & 98,
Provides information on where to find
Windows NT/2000/XP will cause an
information for developing USB device
exception (Privileged Instruction) if an
drivers.
attempt is made to access an I/O port
that your program is not privileged to USB Protocol Analysers
access. This article discusses the
With USB's differential bus and highly
restricting mechanisms and how to
complex protocol, what do you do
overcome these problems. It provides
when you want to monitor what is
a PortTalk driver complete with source
going on between your device and the
code which allows existing programs
host. You can't just grab the digital
to access selected I/O ports and
storage oscilloscope and probe around
provides an example of writing your
like you could with less complex
own device driver. Now includes an
traditional serial buses. We look at the
example showing how to use inp/outp,
new Ellisys USB Tracker 110 which
inportb/outportb via IoDevControl calls
will fit even the tightest of budgets.
to PortTalk in Windows NT/2000/XP.
Win 2000/XP Driver for DeVaSys
Trust-No-Exe Version 3.04
USBLPT-PD11 USB Boards
Allow users to run trusted applications
DeVaSys has a USBLPT-PD11 USB
from defined directories, while
development board based on the
preventing the execution of non-
Philips PDIUSBD11 device which is
trusted programs from floppy disk and
connected to the PC's Parallel Port.
CDROM drives or from the users e-
This allows for firmware to be quickly
mail attachment directory. Stop PE
developed on the PC with the
viruses in their tracks where on
advantage of rich debugging (printf
Windows platforms year, nine out of
statements) and quick compiling and
ten of the top viruses were spread via
testing over embedded processors.
e-mail.
Once your design is done and tested,
it's possible to change a header file
Command Line Process Viewer/Killer/
enabling the code to be recompiled
Suspender for Windows NT/2000/XP
and downloaded to your USB device.
Version 2.03 We have written a Windows 2000/XP
Want a command line utility to view, device driver allowing these boards to
kill, suspend or set the priority or be used with Windows 2000 and
affinity of processes, perhaps from a Windows XP. The source code is

Beyond Logic
batch file? Kills rouge processes provided for the driver and can also
where Window's Task Manager fails. double as good example for Parallel
Port drivers taking to ParPort.sys.
BeyondExec - Spawn Processes and/
or Shutdown Remote Windows On-The-Go Supplement - Point-to-
NT/2000/XP WorkStations. Version Point Connectivity for USB.
2.04 The On-The-Go Supplement is a new
Have you ever wanted to run a tack on standard for USB allowing for
process such as an application the first time, USB Devices to talk to
installer, service pack, virus signature each other without the need for a
update etc or shutdown a single or "host". While the standard is still in its
group of remote computers without early days, we look at some of the
having the burden of installing any features of OTG. Philips demonstrated
remote client on your target aspects of OTG with their ISP1161
computers? Full-speed Universal Serial Bus single-
chip host and device controller. While
Beyond Logic Shutdown Utility for it doesnt fully comply to the OTG
NT/2000/XP Version 1.01 standard, it does make a wonderful
The Windows 2000 Professional Host Controller for embedded systems
Resource Kit and Windows XP such as uClinux.
introduce a shutdown.exe command
line utility to shutdown local USB with the simplicity of RS-232
computers. However a quick play with FTDI has two USB Interface ICs, the
these utilities will fine that they are less FT8U232AM and FT8U245AM which
than adequate. The Beyond Logic takes the hassle out of USB. One
shutdown.exe actually powers down provides a asychronous serial
computers while giving your users the interface, while the other provides a
option of cancelling the operation or byte wide FIFO with little need to worry
allowing you to only target computers about the underlying USB protocols
without a logged on user. and USB device drivers. Ideal if you
are starting out in USB, or you want to
Bmail - Command Line SMTP Mailer quickly add USB to your devices.
for Batch Jobs Version 1.07
The Philips PDIUSBD11 USB
Bmail is a free but lean command line
SMTP mail sender. Bmail allows the Peripheral with I2C Serial
user to automate the sending of email
messages containing log files, data Interface.
downloads or error messages on Philips has two USB devices which
Win32 based computers. allows any microcontroller the ability to
talk USB. However while the silicon
Delete/Copy by Owner utility for has many features which others don't,
Windows NT/2000/XP Version 1.02 the data sheets are a little light on
Have you ever had the need to find, content. In fact they miss some
copy or delete files that were owned fundamental Initialisation routines
by a certain user? A great way to back needed to get the device working in
up files created by previous the first place. This article gives a
employees or to clean workstations sample schematic and the answers to
when one leaves. many questions kindly answered by

Beyond Logic
two Philip's Engineers.

Win32 Pipe Security Editor Windows
NT/2000/XP Version 1.00 Parallel Port Interfacing
Do you know what named pipes you
have on a system, quietly advertising Interfacing the Standard Parallel Port
for something to connect to it? Do you
know how secure each pipe is,
whether the associated security Describes interfacing the Standard
descriptor is strong enough?. The Parallel Port (SPP). Includes a general
Win32 Pipe Security Editor is the ideal introduction to Parallel Ports (SPP,
tool for checking the security of your EPP & ECP) and their standards.
own pipe servers or to set up auditing Looks at reading 8 bits of data using
of existing pipe servers. the bi-directional port, and using other
methods such as reading a nibble at a
Console Computer Information Utility time etc. Also details the Parallel Ports
for 2000/XP Version 1.01 interrupts. Programming examples
Want a quick console utility to display using C are included along with a
the hardware specifications of a PC detailed description of the Parallel
including Processors Type, Operating Port's Registers.
System and Service Pack, Physical
and Virtual Memory, Network Interfacing Example - 16 Character x 2
Addresses, Logical Drive information, Line LCD
Video Card Type, Hard Disk, CDROM This is the first interfacing example for
and Printer Information. the Parallel Port. This example shows
connecting a 16 Character x 2 Line
LCD module to the Standard Parallel
SMART & Simple for NT/2000/XP
Port (SPP.) Shows the use of the
Version 1.01
Parallel Port's Data and Control Ports.
A small and simple utility to instantly
view the SMART (Self-Monitoring Interfacing the Enhanced Parallel Port
Analysis and Reporting Technology)
attributes of Hard Disk Drives without
first requiring installation. (EPP)
Interfacing the Enhanced Parallel Port
is the first page, out of the Parallel Port
SIP Debug Proxy Server Version 1.03 Series which has been revised. This
Having trouble trying to work out why page, devoted entirely to the EPP port,
your VoIP ATA is not registering? now includes waveforms plus a more
Maybe you are not receiving incoming detailed description of this Port.
calls? The SIP debug proxy can
display and log SIP messages to file Interfacing the Extended Capabilities
for debugging and analysis.
Parallel Port (ECP)
Interfacing the Extended Capabilities
uClinux - Linux for Parallel Port has just been revised.
MicroControllers This page focuses on the Extended
Capabilities Parallel Port (ECP), and
now includes waveforms plus a more

Beyond Logic
uClinux - Part 1 : Setting up the detailed description of this Port.

Development Environment (2.0.38)
Setting up a development system for Parallel Port Debug Tool
uClinux from scratch is not hard. This The Parallel Port Debug Tool is a
article covers the uClinux Kernel handy DOS utility when debugging
2.0.38, m68k-coff, m68k-pic-coff, devices connected to the Parallel Port.
m68k-pic32-coff and m68k-elf Tool It gives a visual display of the three
Chains, coff2flt converter, uC-libc and software registers used by the
uC-libm libraries and gdb. All the Standard Parallel Port. Each individual
sources are downloadable, with links bit can be turned on or off by a simple
provided. click of the mouse.
uClinux - Part 2 : Understanding the RS-232 Interfacing

Build Tools
Part two of this series looks at building Interfacing the Serial Port - Parts 1
the uClinux Kernel, generating the
ROM filesystem, configuring your and 2
uClinux target, setting up NFS mounts, Explains the pin diagrams of the RS-
creating a new RAM filesystem and 232 Port and the 8250 & Compatible
using a root NFS filesystem on your UARTs. Includes information on
uClinux Target. handshaking, Null Modems, DTE/DCE
Speeds, flow control, types of UART's
uClinux - Building gcc-2.95.3 m68k-elf etc. The second part of this series
gives details of the Serial Ports
for uClinux Registers for the PC (8250 to 16750
Compiling the uClinux 2.4 kernel for UARTs) and the Serial Port's
m68k requires an upgrade of the Addresses in the PC.
development tools to m68k-elf. We
detail how to building the tools with Interfacing the Serial Ports - Parts 3
both an automatic script and manually, and 4
and then show how to call your new Starts with example programs written
compiler with the advantages and in C, using both the Interrupt Driven
disadvantages of each option. and Polling methods for the PC. Gives
details of how the programs work and
uClinux - BFLT Binary Flat Format how they can be changed to suit your
uClinux uses a Binary Flat format requirements, i.e. Changing
commonly known as bFLT. It has seen addresses, FIFO Buffers, IRQ's etc. It
two major revisions, version 2 and then gives details of interfacing your
more recently version 4. Find out just own projects to the RS-232 Port using
what makes it tick. MAX-232's, CDP6402 UART's and
Micro-Controllers.
Exploring the Netcomm NB5 - ADSL /
ADSL-2 Modem Router Quick & Light RS-232 Terminal
The Netcomm NB5 is an ADSL / Fed up with hyperterminal or just want
ADSL-2/2+ modem/router built on a a quick and light terminal for DOS,
rugged embedded linux platform. This Windows 95/98/ME and Windows
linux platform can allow the ability to NT4/2000/XP? Cycle through COM
exploit the hardware to its full Ports using F1, change bit rates using

Beyond Logic
potential, by running your own binaries F2 and quit using Alt-X. Couldn't be
on it. simpler. . .
SquashFS & LZMA Compression RS-232 Protocol Analyser

There are some claims that LZMA can In need for a cheap but effective RS-
offer up to 30% better compression 232 Protocol Analyser? Just make
over ZLIB, however a 10 to 15% gain your own Y adaptor to enable the
is normally achievable on the typical logging of data transmitted and/or
squashFS images. received in ASCII, Hex, Decimal or
HexDump formats.
AT Keyboards
Miscellaneous
Interfacing the PC's Keyboard As seen
in Poptronics, July 2000 How does the Microchip ICD Work?
IBM Keyboards. Not really an The PIC16F877 was the first Microchip
interesting topic, one would expect. So Microcontroller to have in-built
why would you want to interface the debugging capabilities. The actual
Keyboard? The IBM keyboard can be silicon area used for the debug
a cheap alternative to a keyboard on a facilities is tiny compared to the major
Microprocessor development system. peripherals. Microchip has keep the
Or maybe you want a remote terminal, operation of the debug facilities pretty
just couple it with a LCD Module. If so, well under raps, however it doesnt
then this page has all the required take much reading between the lines
information to get you started. to work out how the actual debugging
facilities are implemented. Also
101 AT Keyboard to ASCII Decoder includes details on making your own
using 68HC705J1A MCU (Ideal ICD.
Keyboard BIOS for Embedded Linux)
South Australian Electricity Generation
An interfacing example for the AT
keyboard is given showing the Looks at some Innovative Power
keyboard's protocols in action. This Generation projects including Hot Dry
interfacing example uses a Rock Geothermal, Solar Towers, Mini-
68HC705J1A MCU to decode an IBM Hydro and Wave Power.
AT keyboard and output the ASCII
equivalent of the key pressed at 9600 An Introduction to VoIP for Australia
BPS. Includes Direct Decimal and An introduction to using VoIP in
Hexadecimal Enter Routines. Ideal Australia.
companion to a microcontroller
development system or embedded Aussie Hot Rocks
system. Following the developments of Hot
Rock Geothermal & Other renewables
Windows Device Drivers in Australia.
(Windows NT/2000/XP and 98/ Who crashed the economy?
ME WDM) There is a new urban sport, and
Australia is high up on the leader
USB Driver for the Cypress USB board. The objective - Who can crash
Starter Kit the economy first.

Beyond Logic
One of the most helpful aids when first

starting out in something new is Need Help? Got a Question?
examples. Cypress forgot this when
they introduced their USB Starter Kit. The interfacing discussion group can
But then for $99 U.S., you cant expect help with any problems you may have.
the world. The USB Thermometer Just join and then e-mail your
Driver and Application was developed
questions to interfacing@yahoogroups.
under contract by System Solutions
72410.77@compuserve.com. The com Common questions may have
code is not freely available. What I already been answered in the
have done is modified the WDM ISO Interfacing Discussion Group Archives.
USB driver distributed with the
Windows Device Driver Kit for use with
the Cypress Digital Themometer. Ive
kept it basically the same, so you can
actually run the Digital Temperature
Application on this driver to see that in-
fact it does work!
Interrupts and Deferred Procedure

Calls on Windows NT4/2000/XP
Example source code for handling
Interrupts and Deferred Procedure
Calls in Windows NT4/2000/XP kernel
mode device drivers.
Device Driver Tools - Making your life

easy
Features three Device Driver Tools for
making your life easier. Writing Device
Drivers? Perhaps playing with Cypress
Semiconductor's USB Starter Kit? If
so, the Device Driver Fiddler allows
you to test DeviceIOCommand() Calls
before you write your User Mode
Application. . . The Windows NT
Device Driver Installer prevents
making and testing of your newly
written drivers a chore. It loads,
unloads, starts and stops Windows NT
Device Drivers. The Device Driver
Remover, removes all traces of your
device driver.

Beyond Logic
Interfacing the PC
Google Search I'm feeling lucky
Embedded Technology
Next
WebRing Inc.
Search
Copyright 1995-2007 Craig Peacock 19th June 2007.

The RS232 Standard
(renamed the "EIA232 Standard" in the early 1990's)
Written by Christopher E. Strangio

Copyright 1993-2006 by CAMI Research Inc., Acton, Massachusetts
Send Us Your Comments . . .
Contents
What is EIA232?
Likely Problems when Using an EIA232 Interface
Pin Assignments
Cable Wiring Examples (New!)
Signal Definitions
Signal Ground and Shield
Primary Communications Channel
Secondary Communications Channel
Modem Status and Control Signals
Transmitter and Receiver Timing Signals
Channel Test Signals
Electrical Standards
Common Signal Ground
Signal Characteristics
Signal Timing
Accepted Simplifications of the Standard
Pin Description Index
References to EIA Publications
Back to CableEye Home Page
What is EIA232?
Next Topic | TOC
http://www.camiresearch.com/Data_Com_Basics/RS232_standard.html (1 of 29)12/02/2008 17:26:05

The RS232 Standard
In the early 1960s, a standards committee, today known as the Electronic Industries Association, developed a
common interface standard for data communications equipment. At that time, data communications was thought to
mean digital data exchange between a centrally located mainframe computer and a remote computer terminal, or
possibly between two terminals without a computer involved. These devices were linked by telephone voice lines,
and consequently required a modem at each end for signal translation. While simple in concept, the many
opportunities for data error that occur when transmitting data through an analog channel require a relatively complex
design. It was thought that a standard was needed first to ensure reliable communication, and second to enable the
interconnection of equipment produced by different manufacturers, thereby fostering the benefits of mass production
and competition. From these ideas, the RS232 standard was born. It specified signal voltages, signal timing, signal
function, a protocol for information exchange, and mechanical connectors.
Over the 40+ years since this standard was developed, the Electronic Industries Association published three
modifications, the most recent being the EIA232F standard introduced in 1997. Besides changing the name from
RS232 to EIA232, some signal lines were renamed and various new ones were defined, including a shield conductor.
Likely Problems when Using an EIA232 Interface

Next Topic | Previous Topic | TOC
During this 40-year-long, rapidly evolving period in electronics, manufacturers adopted simplified versions of this
interface for applications that were impossible to envision in the 1960s. Today, virtually all contemporary serial
interfaces are EIA232-like in their signal voltages, protocols, and connectors, whether or not a modem is involved.
Because no single "simplified" standard was agreed upon, however, many slightly different protocols and cables
were created that obligingly mate with any EIA232 connector, but are incompatible with each other. Most of the
difficulties you will encounter in EIA232 interfacing include at least one of the following:
1 - The absence or misconnection of flow control (handshaking) signals, resulting in buffer overflow
or communications lock-up.
2 - Incorrect communications function (DTE versus DCE) for the cable in use, resulting in the reversal
of the Transmit and Receive data lines as well as one or more handshaking lines.
3 - Incorrect connector gender or pin configuration, preventing cable connectors from mating properly.
Fortunately, EIA232 driver circuitry is highly tolerant of misconnections, and will usually survive a drive signal
being connected to ground, or two drive signals connected to each other. In any case, if the serial interface between
two devices is not operating correctly, disconnect the cable joining this equipment until the problem is isolated.
Pin Assignments
Go to DTE Pinout (looking into the computer's serial connector)

Go to DCE Pinout (looking into the modem's serial connector)

The RS232 Standard
If the full EIA232 standard is implemented as defined, the equipment at the far end of the connection is named the
DTE device (Data Terminal Equipment, usually a computer or terminal), has a male DB25 connector, and utilizes
22 of the 25 available pins for signals or ground. Equipment at the near end of the connection (the telephone line
interface) is named the DCE device (Data Circuit-terminating Equipment, usually a modem), has a female DB25
connector, and utilizes the same 22 available pins for signals and ground. The cable linking DTE and DCE devices
is a parallel straight-through cable with no cross-overs or self-connects in the connector hoods. If all devices exactly
followed this standard, all cables would be identical, and there would be no chance that an incorrectly wired cable
could be used. This drawing shows the orientation and connector types for DTE and DCE devices:
EIA232 communication function and connector types for a personal computer and
modem. DCE devices are sometimes called "Data Communications Equipment" instead
of Data Circuit-terminating Equipment.
Here is the full EIA232 signal definition for the DTE device (usually the PC). The most commonly used signals are
shown in bold.
[back to Pin Assignments description]

The RS232 Standard
Copyright 1993-2002 CAMI Research Inc.
This shows the full EIA232 signal definition for the DCE device (usually the modem). The most commonly used
signals are shown in bold.
[back to Pin Assignments description]

The RS232 Standard
Copyright 1993-2003 CAMI Research Inc.
Many of the 22 signal lines in the EIA232 standard pertain to connections where the DCE device is a modem, and
then are used only when the software protocol employs them. For any DCE device that is not a modem, or when two
DTE devices are directly linked, far fewer signal lines are necessary.
You may have noticed in the pinout drawings that there is a secondary channel which includes a duplicate set of
flow-control signals. This secondary channel provides for management of the remote modem, enabling baud rates to
be changed on the fly, retransmission to be requested if a parity error is detected, and other control functions. This
secondary channel, when used, is typically set to operate at a very low baud rate in comparison with the primary
channel to ensure reliability in the control path. In addition, it may operate as either a simplex, half-duplex, or full-

The RS232 Standard
duplex channel, depending on the capabilities of the modem.
Transmitter and receiver timing signals (pins 15, 17, and 24) are used only for a synchronous transmission protocol.
For the standard asynchronous 8-bit protocol, external timing signals are unnecessary.
IMPORTANT: Signal names that imply a direction, such as Transmit Data and Receive Data, are
named from the point of view of the DTE device. If the EIA232 standard were strictly followed, these
signals would have the same name for the same pin number on the DCE side as well. Unfortunately,
this is not done in practice by most engineers, probably because no one can keep straight which side is
DTE and which is DCE. As a result, direction-sensitive signal names are changed at the DCE side to
reflect their drive direction at DCE. The following list gives the conventional usage of signal names:
Cable Wiring Examples

The following wiring diagrams come from actual cables scanned by the CableEye PC-Based Cable Test System.
CableEye's software automatically draws schematics whenever it tests a cable. Click here to learn more about
CableEye.
1 - DB9 All-Line Direct Extension

Next Cable | (no previous cable) || Next Topic

The RS232 Standard
This shows a 9-pin DTE-to-DCE serial cable that would result if the EIA232 standard were
strictly followed. All 9 pins plus shield are directly extended from DB9 Female to DB9
Male. There are no crossovers or self-connects present. Use this cable to connect modems, 80K
printers, or any device that uses a DB9 connector to a PC's serial port.
This cable may also serve as an extension cable to increase the distance between a
computer and serial device. Caution: do not exceed 25 feet separation between devices
without a signal booster!
Right Side: Connect to DCE (modem or other serial

Left Side: Connect to DTE (computer)
device)
Cable image created by CableEye
2 - DB9 Loopback Connector

Next Cable | Previous Cable || Next Topic
A loopback connector usually consists of a connector without a cable and includes internal
wiring to reroute signals back to the sender. This DB9 female connector would attach to a
DTE device such as a personal computer. When the computer receives data, it will not 80K
know whether the signals it receives come from a remote DCE device set to echo
characters, or from a loopback connector. Use loopback connectors to confirm proper
operation of the computer's serial port. Once confirmed, insert the serial cable you plan to
use and attach the loopback to the end of the serial cable to verify the cable.
In this case, Transmit Data joins to Received Data, Request-to-Send joins to Clear-to-Send,
and DTE-Ready joins to DCE-Ready and Received Line Signal Detect.
Left Side: Connect to DTE (computer) Right Side: (none)

The RS232 Standard
3 - DB9 Null Modem Cable

Use this female-to-female cable in any application where you wish to connect two DTE
devices (for example, two computers). A male-to-male equivalent of this cable would be
used to connect two DCE devices. 80K
The cable shown below is intended for RS232 asynchronous communications (most PC-
based systems). If you are using synchronous communications, the null modem will have
additional connections for timing signals, and a DB25 connector would be necessary.
NOTE: Not all null modem cables connect handshaking lines the same way. In this cable,
Request-to-Send (RTS, pin 7) asserts the Carrier Detect (pin 1) on the same side and the
Clear-to-Send (CTS, pin 8) on the other side of the cable.
This device may also be available in the form of an adapter.
Left Side: Connect to 9-pin DTE (computer) Right Side: Connect to 9-pin DTE (computer)

The RS232 Standard
4 - DB25 to DB9 Adapter

Signals on the DB25 DTE side are directly mapped to the DB9 assignments for a DTE
device. Use this to adapt a 25-pin COM connector on the back of a computer to mate with a
9-pin serial DCE device, such as a 9-pin serial mouse or modem. This adapter may also be 80K
in the form of a cable.
Left Side: Connect to 25-pin DTE (computer) Right Side: Connect to 9-pin DCE (modem)

The RS232 Standard
5 - DB25 to DB9 Adapter (pin 1 connected to shield)

This adapter has the same wiring as the previous cable (#4) except that pin 1 is wired to
the connector shell (shield). Note that the cable's shield is usually a foil blanket
surrounding all conductors running the length of the cable and joining the connector 84K
shells. Pin 1 of the EIA232 specification, called out as "shield", may be separate from the
earth ground usually associated with the connector shells.
6 - DB9 to DB25 Adapter

Signals on the DB9 DTE side are directly mapped to the DB25 assignments for a DTE
device. Use this to adapt a 9-pin COM connector on the back of a computer to mate with a
25-pin serial DCE devices, such as a modem. This adapter may also be in the form of a 80K
cable.

The RS232 Standard
7 - DB25 All-Line Direct Extension

This shows a 25-pin DTE-to-DCE serial cable that would result if the EIA232 standard
were strictly followed. All 25 pins plus shield are directly extended from DB25 Female to
DB25 Male. There are no crossovers or self-connects present. Use this cable to connect 84K
modems, printers, or any serial device that uses a DB25 connector to a PC's serial port.
This cable may also serve as an extension cable to increase the distance between computer
and serial device. Caution: do not exceed 25 feet separation between devices without a
signal booster!
Caution: the male end of this cable (right) also fits a PC's parallel printer port. You may
use this cable to extend the length of a printer cable, but DO NOT attach a serial device to
the computer's parallel port. Doing so may cause damage to both devices.

The RS232 Standard
8 - DB25 Loopback Connector

A loopback connector usually consists of a connector without a cable and includes internal
wiring to reroute signals back to the sender. This DB25 female connector would attach to a
DTE device such as a personal computer. When the computer receives data, it will not 80K
know whether the signals it receives come from a remote DCE device set to echo
characters, or from a loopback connector. Use loopback connectors to confirm proper
operation of the computer's serial port. Once confirmed, insert the serial cable you plan to
use and attach the loopback to the end of the serial cable the verify the cable.
In this case, Transmit Data joins to Received Data, Request-to-Send joins to Clear-to-Send,
and DTE-Ready joins to DCE-Ready and Received Line Signal Detect.
Left Side: Connect to 25-pin DTE (computer) Right Side: (none)

The RS232 Standard
9 - DB25 Null Modem (no handshaking)

Note that Pins 11 and 12 are not necessary for this null modem cable to work. As is often
the case, the manufacturer of equipment that uses this cable had a proprietary application in
mind. We show it here to emphasize that custom serial cables may include connections for
which no purpose is clear.
IMPORTANT: This cable employs NO handshaking lines between devices. The handshake
signals on each side are artificially made to appear asserted by the use of self-connects on
each side of the cable (for example, between pins 4 and 5). Without hardware handshaking,
you risk buffer overflow at one or both ends of the transmission unless STX and ETX
commands are inserted in the dataflow by software.

The RS232 Standard
10 - DB25 Null Modem (standard handshaking)

The cable shown below is intended for EIA232 asynchronous communications (most PC-
based systems). If you are using synchronous communications, the null modem will have
additional connections for timing signals not shown here.
NOTE: Not all null modem cables connect handshaking lines the same way. Refer to the
manual for your equipment if you experience problems. In this cable, the DTE Ready (pin
20) on one side asserts the DCE Ready (pin 6) and the Request to Send (pin 5) on the other
side.

The RS232 Standard
11 - DB25 Null Modem (unusual handshaking)

20) on one side asserts the Clear to Send (pin 5), DCE Ready (pin 6), and Carrier Detect
(pin 8) on the other side.

The RS232 Standard

manual for your equipment if you experience problems. In this cable, the Request-to-Send
(pin 4) on one side asserts the Clear-to-Send (pin 5) on the SAME side (self-connect) and
the Carrier Detect (pin 8) on the other side. The other handshaking signals are employed in
a conventional manner.

The RS232 Standard

20) on one side asserts the Clear-to-Send (pin 5) and the DCE Ready (pin 6) on the other
side. Request-to-Send (pin 4) on one side asserts Received Line Signal Detect (pin 8) on
the other side.

The RS232 Standard

20) on one side asserts the DCE Ready (pin 6), and Carrier Detect (pin 8) on the other side.
Request to Send (pin 4) is unused, and Clear-to-Send (pin 5) is driven by a proprietary
signal (pin 11) determined by the designer of this cable.

The RS232 Standard
15 - DB25 Null Modem Cable (synchronous communications)

This female-to-female cable is intended for synchronous EIA232 connections, and is

designed to connect two DTE devices. It contains the standard connections of an
asynchronous null modem cable, plus additional connections on pins 15, 17, and 24 for 84K
synchronous timing signals. To connect two DCE devices, use a male-to-male equivalent of
this cable.
For synchronous communications, the null modem cable includes an additional conductor
for timing signals, and joins pins 15, 17, and 24 on one side to pins 15 and 17 on the other.
Pin 24 on the right side should connect to the timing signal source.

The RS232 Standard
16 - DB25 Null Modem Cable (unconventional, may pose risk)

(no more) | Previous Cable || Next Topic
This simplified null modem cable uses only Request-to-Send (pin 4) and Clear-to-Send (pin
5) as handshaking lines; DTE Ready, DCE Ready, and Carrier Detect are not employed, so
this cable should not be used with modems. 80K
CAUTION! Normally, null modem cables have the same gender on each connector (either
both male for two DTE devices, or both female for two DCE devices). This cable would be
used when the gender on one of the devices does not conform to the standard. However, the
opposite genders imply usage as a straight through cable, and if used in that manner will
not function. Further, if used as a standard null-modem between two computers, the
opposite gender allows you to connect one end to the parallel port, an impermissible
situation that may cause hardware damage.
Left Side: Connect to 25-pin DTE (computer)

Right Side: Connect to 25-pin DTE (computer)
with Gender Changer

The RS232 Standard
Signal Definitions
Signal functions in the EIA232 standard can be subdivided into six categories. These categories are summarized
below, after which each signal described.
1 - Signal ground and shield.
2 - Primary communications channel. This is used for data interchange, and includes flow control
signals.
3 - Secondary communications channel. When implemented, this is used for control of the remote
modem, requests for retransmission when errors occur, and governance over the setup of the primary
channel.
4 - Modem status and control signals. These signals indicate modem status and provide intermediate
checkpoints as the telephone voice channel is established.
5 - Transmitter and receiver timing signals. If a synchronous protocol is used, these signals provide
timing information for the transmitter and receiver, which may operate at different baud rates.
6 - Channel test signals. Before data is exchanged, the channel may be tested for its integrity, and the
baud rate automatically adjusted to the maximum rate that the channel can support.

The RS232 Standard
Signal Ground and Shield

Pin 7, Pin 1, and the shell are included in this category. Cables provide separate paths for each, but internal wiring
often connects pin 1 and the cable shell/shield to signal ground on pin 7.
Pin 7 - Ground All signals are referenced to a common ground, as defined by the voltage on pin 7. This conductor
may or may not be connected to protective ground inside the DCE device. The existence of a defined ground
potential within the cable makes the EIA232 standard different from a balanced differential voltage standard, such as
EIA530, which provides far greater noise immunity.
Primary Communications Channel

Pin 2 - Transmitted Data (TxD) This signal is active when data is transmitted from the DTE device to the DCE
device. When no data is transmitted, the signal is held in the mark condition (logic '1', negative voltage).
NOTE: Pin 2 on the DCE device is commonly labeled "Received Data", although by the EIA232
standard it should still be called Transmitted Data because the data is thought to be destined for a
remote DTE device.
Pin 3 - Received Data (RxD) This signal is active when the DTE device receives data from the DCE device. When
no data is transmitted, the signal is held in the mark condition (logic '1', negative voltage).
NOTE: Pin 3 on the DCE device is commonly labeled "Transmitted Data", although by the EIA232
standard it should still be called Received Data because the data is thought to arrive from a remote
DTE device.
Pin 4 - Request to Send (RTS) This signal is asserted (logic '0', positive voltage) to prepare the DCE device for
accepting transmitted data from the DTE device. Such preparation might include enabling the receive circuits, or
setting up the channel direction in half-duplex applications. When the DCE is ready, it acknowledges by asserting
Clear to Send.
NOTE: Pin 4 on the DCE device is commonly labeled "Clear to Send", although by the EIA232
standard it should still be called Request to Send because the request is thought to be destined for a
remote DTE device.
Pin 5 - Clear to Send (CTS) This signal is asserted (logic '0', positive voltage) by the DCE device to inform the
DTE device that transmission may begin. RTS and CTS are commonly used as handshaking signals to moderate the
flow of data into the DCE device.
NOTE: Pin 5 on the DCE device is commonly labeled "Request to Send", although by the EIA232
standard it should still be called Clear to Send because the signal is thought to originate from a remote

The RS232 Standard
DTE device.
Secondary Communications Channel

Pin 14 - Secondary Transmitted Data (STxD)
Pin 16 - Secondary Received Data (SRxD)
Pin 19 - Secondary Request to Send (SRTS)
Pin 13 - Secondary Clear to Send (SCTS)
These signals are equivalent to the corresponding signals in the primary communications channel. The baud rate,
however, is typically much slower in the secondary channel for increased reliability.
Modem Status and Control Signals

Pin 6 - DCE Ready (DSR) When originating from a modem, this signal is asserted (logic '0', positive voltage)
when the following three conditions are all satisfied:
1 - The modem is connected to an active telephone line that is "off-hook";
2 - The modem is in data mode, not voice or dialing mode; and
3 - The modem has completed dialing or call setup functions and is generating an answer tone.
If the line goes "off-hook", a fault condition is detected, or a voice connection is established, the DCE Ready signal
is deasserted (logic '1', negative voltage).
IMPORTANT: If DCE Ready originates from a device other than a modem, it may be asserted to
indicate that the device is turned on and ready to function, or it may not be used at all. If unused, DCE
Ready should be permanently asserted (logic '0', positive voltage) within the DCE device or by use of
a self-connect jumper in the cable. Alternatively, the DTE device may be programmed to ignore this
signal.
Pin 20 - DTE Ready (DTR) This signal is asserted (logic '0', positive voltage) by the DTE device when it wishes
to open a communications channel. If the DCE device is a modem, the assertion of DTE Ready prepares the modem
to be connected to the telephone circuit, and, once connected, maintains the connection. When DTE Ready is
deasserted (logic '1', negative voltage), the modem is switched to "on-hook" to terminate the connection.
IMPORTANT: If the DCE device is not a modem, it may require DTE Ready to be asserted before the

The RS232 Standard
device can be used, or it may ignore DTE Ready altogether. If the DCE device (for example, a printer)
is not responding, confirm that DTE Ready is asserted before you search for other explanations.
Pin 8 - Received Line Signal Detector (CD) (also called carrier detect) This signal is relevant when the DCE
device is a modem. It is asserted (logic '0', positive voltage) by the modem when the telephone line is "off-hook", a
connection has been established, and an answer tone is being received from the remote modem. The signal is
deasserted when no answer tone is being received, or when the answer tone is of inadequate quality to meet the local
modem's requirements (perhaps due to a noisy channel).
Pin 12 - Secondary Received Line Signal Detector (SCD) This signal is equivalent to the Received Line Signal
Detector (pin 8), but refers to the secondary channel.
Pin 22 - Ring Indicator (RI) This signal is relevant when the DCE device is a modem, and is asserted (logic '0',
positive voltage) when a ringing signal is being received from the telephone line. The assertion time of this signal
will approximately equal the duration of the ring signal, and it will be deasserted between rings or when no ringing
is present.
Pin 23 - Data Signal Rate Selector This signal may originate either in the DTE or DCE devices (but not both), and
is used to select one of two prearranged baud rates. The asserted condition (logic '0', positive voltage) selects the
higher baud rate.
Transmitter and Receiver Timing Signals

Pin 15 - Transmitter Signal Element Timing (TC) (also called Transmitter Clock) This signal is relevant only
when the DCE device is a modem and is operating with a synchronous protocol. The modem generates this clock
signal to control exactly the rate at which data is sent on Transmitted Data (pin 2) from the DTE device to the DCE
device. The logic '1' to logic '0' (negative voltage to positive voltage) transition on this line causes a corresponding
transition to the next data element on the Transmitted Data line. The modem generates this signal continuously,
except when it is performing internal diagnostic functions.
Pin 17 - Receiver Signal Element Timing (RC) (also called Receiver Clock) This signal is similar to TC
described above, except that it provides timing information for the DTE receiver.
Pin 24 - Transmitter Signal Element Timing (ETC) (also called External Transmitter Clock) Timing signals are
provided by the DTE device for use by a modem. This signal is used only when TC and RC (pins 15 and 17) are not
in use. The logic '1' to logic '0' transition (negative voltage to positive voltage) indicates the time-center of the data
element. Timing signals will be provided whenever the DTE is turned on, regardless of other signal conditions.
Channel Test Signals

Pin 18 - Local Loopback (LL) This signal is generated by the DTE device and is used to place the modem into a
test state. When Local Loopback is asserted (logic '0', positive voltage), the modem redirects its modulated output
signal, which is normally fed into the telephone line, back into its receive circuitry. This enables data generated by

The RS232 Standard
the DTE to be echoed back through the local modem to check the condition of the modem circuitry. The modem
asserts its Test Mode signal on Pin 25 to acknowledge that it has been placed in local loopback condition.
Pin 21 - Remote Loopback (RL) This signal is generated by the DTE device and is used to place the remote
modem into a test state. When Remote Loopback is asserted (logic '0', positive voltage), the remote modem redirects
its received data back to its transmitted data input, thereby remodulating the received data and returning it to its
source. When the DTE initiates such a test, transmitted data is passed through the local modem, the telephone line,
the remote modem, and back, to exercise the channel and confirm its integrity. The remote modem signals the local
modem to assert Test Mode on pin 25 when the remote loopback test is underway.
Pin 25 - Test Mode (TM) This signal is relevant only when the DCE device is a modem. When asserted (logic '0',
positive voltage), it indicates that the modem is in a Local Loopback or Remote Loopback condition. Other internal
self-test conditions may also cause Test Mode to be asserted, and depend on the modem and the network to which it
is attached.
Electrical Standards
The EIA232 standard uses negative, bipolar logic in which a negative voltage signal represents logic '1', and positive
voltage represents logic '0'. This probably originated with the pre-RS232 current loop standard used in 1950s-
vintage teletype machines in which a flowing current (and hence a low voltage) represents logic '1'. Be aware that
the negative logic assignment of EIA232 is the reverse of that found in most modern digital circuit designs. See the
inside rear cover of the CableEye manual for a comparison.
Common Signal Ground

The EIA232 standard includes a common ground reference on Pin 7, and is frequently joined to Pin 1 and a circular
shield that surrounds all 25 cable conductors. Data, timing, and control signal voltages are measured with respect to
this common ground. EIA232 cannot be used in applications where the equipment on opposite ends of the
connection must be electrically isolated.
NOTE: optical isolators may be used to achieve ground isolation, however, this option is not
mentioned or included in the EIA232 specification.
Signal Characteristics
Equivalent Circuit - All signal lines, regardless of whether they provide data, timing, or control information, may be
represented by the electrical equivalent circuit shown here:

The RS232 Standard
This is the equivalent circuit for an EIA232 signal line and applies to signals
originating at either the DTE or DCE side of the connection. "Co" is not specified in the
standard, but is assumed to be small and to consist of parasitic elements only. "Ro" and
"Vo" are chosen so that the short-circuit current does not exceed 500ma. The cable
length is not specified in the standard; acceptable operation is experienced with cables
that are less than 25 feet in length.
Signal State Voltage Assignments - Voltages of -3v to -25v with respect to signal ground (pin 7) are considered
logic '1' (the marking condition), whereas voltages of +3v to +25v are considered logic '0' (the spacing condition).
The range of voltages between -3v and +3v is considered a transition region for which a signal state is not assigned.
Logic states are assigned to the voltage ranges shown here. Note that this is a "negative
logic" convention, which is the reverse of that used in most modern digital designs.
Most contemporary applications will show an open-circuit signal voltage of -8 to -14 volts for logic '1' (mark), and
+8 to +14 volts for logic '0' (space). Voltage magnitudes will be slightly less when the generator and receiver are
connected (when the DTE and DCE devices are connected with a cable).
IMPORTANT: If you insert an LED signal tester in an EIA232 circuit to view signal states, the signal
voltage may drop in magnitude to very near the minimum values of -3v for logic '1', and +3v for logic
'0'. Also note that some inexpensive EIA232 peripherals are powered directly from the signal lines to
avoid using a power supply of their own. Although this usually works without problems, keep the

The RS232 Standard
cable short, and be aware that noise immunity will be reduced.
Short-Circuit Tolerance - The generator is designed to withstand an open-circuit (unconnected) condition, or short-
circuit condition between its signal conductor and any other signal conductor, including ground, without sustaining
damage to itself or causing damage to any associated circuitry. The receiver is also designed to accept any signal
voltage within the range of 25 volts without sustaining damage.
CAUTION: Inductive loads or magnetically induced voltages resulting from long cables may cause
the received voltage to exceed the 25-volt range momentarily during turn-on transients or other
abnormal conditions, possibly causing damage to the generator, receiver, or both. Keep the cable
length as short as possible, and avoid running the cable near high-current switching loads like electric
motors or relays.
Fail-Safe Signals - Four signals are intended to be fail-safe in that during power-off or cable-disconnected
conditions, they default to logic '1' (negative voltage). They are:
Request to Send - Default condition is deasserted.
Sec. Request to Send - Default condition is deasserted.
DTE Ready - Default condition is DTE not ready.
DCE Ready - Default condition is DCE not ready.

Note specifically that if the cable is connected but the power is off in the generator side, or if the cable is
disconnected, there should be adequate bias voltage in the receiver to keep the signal above +3v (logic '0') to ensure
that the fail-safe requirement is met.
Schmitt triggers or other hysteresis devices may be used to enhance noise immunity in some designs, but should
never be adjusted to compromise the fail-safe requirement.
Signal Timing
The EIA232 standard is applicable to data rates of up to 20,000 bits per second (the usual upper limit is 19,200
baud). Fixed baud rates are not set by the EIA232 standard. However, the commonly used values are 300, 1200,
2400, 9600, and 19,200 baud. Other accepted values that are not often used are 110 (mechanical teletype machines),
600, and 4800 baud.
Changes in signal state from logic '1' to logic '0' or vice versa must abide by several requirements, as follows:
1 - Signals that enter the transition region during a change of state must move through the transition
region to the opposite signal state without reversing direction or reentering.
2 - For control signals, the transit time through the transition region should be less than 1ms.
3 - For Data and Timing signals, the transit time through the transition region should be

The RS232 Standard
a - less than 1ms for bit periods greater than 25ms,
b - 4% of the bit period for bit periods between 25ms and 125s,
c - less than 5s for bit periods less than 125s.

The rise and fall times of data and timing signals ideally should be equal, but in any
case vary by no more than a factor of three.
An acceptable pulse (top) moves through the transition region quickly and without
hesitation or reversal. Defective pulses (bottom) could cause data errors.
4 - The slope of the rising and falling edges of a transition should not exceed 30v/S. Rates higher
than this may induce crosstalk in adjacent conductors of a cable.
Note that neither the ASCII alphabet nor the asynchronous serial protocol that defines the start bit, number of data
bits, parity bit, and stop bit, is part of the EIA232 specification. For your reference, it is discussed in the Data
Communications Basics section of this web site.
Accepted Simplifications of the Standard

Previous Topic | TOC
The EIA232 document published by the Electronic Industries Association describes 14 permissible configurations of
the original 22-signal standard. Each configuration uses a subset of the 22 defined signals, and serves a more limited
communications requirement than that suggested by using all the available 22-signals. Applications for transmit-
only, receive-only, half-duplex operation, and similar variations, are described. Unfortunately, connection to DCE
devices other than modems is not considered. Because many current serial interface applications involve direct
device-to-device connections, manufacturers do not have a standard reference when producing printers, plotters,
print spoolers, or other common peripherals. Consequently, you must acquire the service manual for each peripheral
device purchased to determine exactly which signals are utilized in its serial interface.

The RS232 Standard
END
Return to TOC

How to control a HD44780-based Character-LCD

The Industry Standard Character LCD
Visitor # (unknown)
1995-2006 Peter Ouwehand.
Last updated on 2006-06-15
TOC | General info | 8051 example | PIC example | Misc. examples | Manuf./Distrib. | Home | Sign
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Table Of Contents
0. Table Of Contents
1. General
1.1. Disclaimer
1.2. Usage
1.3. Purpose
2. HD44780-based LCD modules

2.1. Pin assignment
2.2. Instruction set
2.3. Visible DDRAM addresses
2.3.1. 1-line displays
2.4. Interfacing
2.4.1. 8-bit interface
2.4.2. 4-bit interface
2.5. Character set
2.6. Related pages
3. 8051 example
3.1. Basic control software
3.1.1. Requirements / features
3.1.2. Global declarations
3.1.2.1. Register declarations
3.1.2.2. Literal declarations
3.1.2.3. Procedure declarations / library interface
http://ouwehand.net/~peter/lcd/lcd.shtml (1 of 3)12/02/2008 17:26:12

3.1.3. Code
3.1.3.1. LCD initialisation
3.1.3.2. Busy flag
3.1.3.3. Clear display
3.1.3.4. Cursor home
3.1.3.5. Entry mode
3.1.3.6. Display mode
3.1.3.7. Set character generator RAM address
3.1.3.8. Set display data RAM address
3.1.3.9. Get address counter contents
3.1.3.10. Write character
3.2. Advanced control software

3.2.3. Code
3.2.3.1. User defined characters
3.2.3.2. Set cursor position
3.2.3.4. Write string
...
3.3. Availability
3.4. Target hardware
3.4.1. Controller
3.4.2. Interface
3.4.2.1. LCD interface
3.4.2.2. Address decoder example
3.5. Development environment

3.5.1. Software
3.5.2. Hardware
4. PIC example
4.1. Basic control software
4.1.2.1. Register declarations
4.1.2.2. Literal declarations
4.1.3. Code
4.1.3.1. LCD initialisation
4.1.3.2. Busy flag
4.1.3.3. Clear display
4.1.3.4. Cursor home
4.1.3.5. Entry mode

4.1.3.6. Display mode

4.1.3.7. Set character generator RAM address
4.1.3.8. Set display data RAM address
4.1.3.9. Get address counter contents
4.1.3.11. Write command
4.1.3.12. Delay loops
4.2. Advanced control software

4.2.1. User defined characters
...
4.3. Availability
4.4. Target hardware
4.4.1 Controller
4.4.2 Interface
4.5. Development environment

4.5.1. Software
4.5.2. Hardware
5. Miscellaneous examples
5.1. PIC16C54 using only 3 lines
5.2. ATMEL AT90S2313-10PI C-demo
5.3. Variant on PIC16C54 using only 3 lines
5.4. AVR control of an HD44780-based Character-LCD
5.5. HD44780 class in VB6
5.6. Other information sources
6. Manufacturers and Distributors

6.1. Europe
6.2. North America
6.3. Asia
6.4. Australia
6.5. South America
6.6. Africa
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Tuesday, February 12th,

2008
There is a general consensus that in years to come more and more Internet devices will be embedded and
not PC oriented. Just one such prediction is that by 2010, 95% of Internet-connected devices will not be
computers. So if they are not computers, what will they be? Embedded Internet devices.
One popular solution is to use an 8 bit microcontroller such as a Rabbit 2000, AVR or PIC and a Ethernet
MAC such as a CS8900A or RTL8029AS hanging of its parallel port pins in 8 bit mode. A TCP/IP stack is
normally written in C and can be striped of features and ported to these resource limited microcontrollers.
While this works and we detail many such boards below, a little debate is brewing over its reliability and
functionality.
With DOS (denial of service) attacks becoming more and more common, it doesnt take much to knock your
little 8 bit microcontroller off the network. In fact some configurations have a little trouble keeping up with the
high volume of broadcast packets floating around a loaded network, let alone any malicious attacks.
One solution of course is to put in a bigger processor. This is the case with Embedded Linux devices such as
Coldfire, DragonBall or ARM based devices. They are quite powerful enough to allow a suitable bandwidth
and not be susceptible to someones malicious intent.
The other solution is to use a hardware TCP/IP stack. A hardware based stack is not new. If you have
followed this site, you will be aware of the Sekio S-7600A hardware stack which incorporated a TCP/IP stack
with a PPP controller so you could connect it to a modem. Sekio had licensed the technology from Iready
Corporation. While it had its place in data logging or dial on demand applications where your device could
dial up the Internet and send you an email to the effect that your house has been broken into or the past 24
hours logged data etc, it wouldn't connect to the popular ethernet networks present everywhere today.
The next logical progression had to be the Ethernet interface. Sekio has exited the embedded Internet
business discontinuing its S-7600 on the 1st September. However the concept is still alive.
A hardware TCP/IP stack has a couple of advantages. Firstly as they are hardware based, most run at close
to line speeds encapsulating and striping streams of data on the fly. This makes it increasingly more difficult
to cause a DOS attack and almost impossible to run malicious code using principals of buffer overruns etc.
However being hardware makes it difficult to upgrade should little quirks be found allowing say SYN attacks
for example.
Later we detail some devices from Ipsil and Connect One. Both have the ability to upload new firmware
which future proofs the designs in these peripheral devices. However the Ipsil and Connect One devices on
the market today rely on an external ethernet MAC such as the popular CS8900A or RTL8029AS. This
contributes to the chip count.
Ipsil has preliminary data on their IP8932 which combines a webserver, Ethernet MAC layer, and TCP/IP
http://www.beyondlogic.org/etherip/ip.htm (1 of 12)12/02/2008 17:26:35

controller all on a single chip. This allows the one chip with 20 digital or analog inputs to display webpages
without the need of a microcontroller. Ipsil has WebHoles technology which allows holes (simular to server
side includes principles) to be filled in with values from the I/O ports. If you do happen to need more
complexity, you can add a microcontroller and talk via standard TCP/IP socket calls.
However WIZnet Inc already has a simular device on the Market. The W3150A incorporates a TCP/IP stack
and a future proofed 10/100 Ethernet MAC. So when it comes to chip count, it makes sense to off load the
burden of the TCP/IP stack into a second peripheral chip complete with Ethernet MAC. It can reduce time to
market, as the design of the TCP/IP stack is omitted (or saves costs of licensing one), plus you have a more
stable product. Your 8 bit micro effectively has more grunt now, as it's no longer responsible for the lower
TCP/IP protocols and ethernet encapsulation. All these advantages and yet, still only two chips.
How long before the leading microcontroller manufacturers are going to integrate a hardware TCP/IP stack
and ethernet MAC into their microcontrollers making a one chip solution?
Answer : WIZnet Inc. and Atmel Corporation to jointly develop and market Internet connectivity
solutions.
WIZnet Inc. and Atmel Corporation has forged a strategic partnership to develop and co-market
Internet connectivity solutions. As part of this agreement WIZnet will manufacture OEM products
around Atmels AVR microcontrollers. Both have agreed to move in the direction of system-on-chip
(SoC) which will see WIZnets TCP/IP hardwired technology be integrated with Atmels MCU cores.
Outcome? An AVR with \ hardware TCP/IP stack and ethernet in the one chip. I can't wait. . . .
Lantronix
Lantronix has developed the XPort. It's a x86 processor with 256Kbytes SRAM, 512Kbytes Flash and
a 10/100 Ethernet Interface in tiny package not much bigger than the standard Ethernet socket.
Having a mature O/S, the XPort can send e-mail alerts or serve web pages among other things. There
is even a model with 128-bit AES Rijndael encryption if you need it. Encapsulated in a single drop in
module, the EMC-compliant XPort makes the perfect partner to your Amtel or PIC based Internet
Application offloading the responsibility of the TCP/IP stack to the XPort. Communication between the
module and your MCU is done by a 300bps to 230 kbps asynchronous serial port.
XPort Embedded Device Server
Ethernet 10Base-T or 100Base-TX RJ45

Supports TCP/IP, UDP/IP, ARP, ICMP, SNMP, TFTP,
Telnet, DHCP, BOOTP, HTTP, and AutoIP
300 to 230 kbps Asynchronous CMOS Serial Port
3 PIO pins (Software selectable)
Can serve web pages and Java applets with 384Kbytes
internal Flash Storage
CPU : Enhanced 16-bit, 48MHz, x86 architecture
256Kbytes SRAM and 512Kbytes flash
Flash Firmware upgradable over the wire via TFTP and
serially The XPort - A 16bit x86 CPU,
3.3V @ 210 mA max. Flash, SRAM and Ethernet in a
Only 33.9 x 16.25 x 13.5mm. A little longer than a standard Tiny Single Encapsulated
Package.
RJ-45 Socket.

WiPort Wireless Embedded Device Server
Wireless 802.11b and

10/100 Ethernet
Supports TCP/IP, UDP/
IP, ARP, ICMP, SNMP,
TFTP, Telnet, DHCP,
BOOTP, HTTP, and
AutoIP
Dual 300 to 921.6 kbps
Asynchronous CMOS
Serial Port (3V3)
11 GPIO pins
Can serve web pages
and Java applets with
1.8MBytes (or 3.8MB)
internal Flash Storage
Lantronix DSTni-EX 186
CPU
256Kbytes zero wait The WiPort
state SRAM, 1024KB
SRAM and 2048Kbytes
(or 4096) flash
Flash Firmware
upgradable over the wire
via TFTP and serially
3.3V @ 460 mA max.
Digi
Digi International has another even more impressive little module out. They have crammed a 32bit
ARM processor running at 55MHz complete with large amounts of flash and RAM into a small PCB
mount module. But what makes these modules more impressive is the ability to switch between a
wired 10/100 ethernet or 802.11b module. Both are pin to pin compatible making your designs built
around the Digi Connect ME family even more flexible. The wireless module is enclosed, and as such
is FCC approved, so you are not required to get approvals for your WIFI design further decreasing
your time to market. If however resources are a little tight, then the EM family may be for you offering
increased memory, multiple serial ports, SPI and more I/O.
Digi Connect ME
NetSilicon NS7520 32-bit ARM Microprocessor.

10/100Base-T Ethernet with power pass-thru for network
powered devices.
2MB Flash, 8MB RAM on board.
230Kbps TTL Level Async Serial Port.
5 Shared GPIO Ports.
Strong SSL/TLS encryption.
Royalty-free NET+Works development platform.
3.3Vdc @ 250mA.
Small 36.7 x 19.05 x 18.67mm Package with Samtec FTS-
110-01-F-DV-TR 20pin Micro Header.

Digi Connect Wi-ME
NetSilicon NS7520 32-bit ARM Microprocessor.

802.11b wireless embedded module up to 11Mbps
WPA security & WEP Encryption
2MB Flash, 8MB RAM on board.
230Kbps TTL Level Async Serial Port.
3,3Vdc @ 400mA.
Small 49.4 x 19.05 x 18.67mm Package with Samtec FTS-
110-01-F-DV-TR 20pin Micro Header.
Digi Connect EM
NetSilicon NS7520 32-Bit ARM Microprocessor @ 55MHz

10/100Base-T Ethernet with power pass-thru for network
powered devices.
4MB flash, 8MB RAM on board.
Two high speed 230Kbps TTL Level Async Serial Ports.
9Mbps SPI Interface.
3.3Vdc @ 250mA.
49mm x 40mm PCB Module.
Digi Connect Wi-EM
NetSilicon NS7520 32-Bit ARM Microprocessor

NetSilicon NS7520 32-Bit ARM Microprocessor @ 55MHz
802.11b wireless embedded module up to 11Mbps
WPA security & WEP Encryption
4MB flash, 8MB RAM on board.
Two high speed 230Kbps TTL Level Async Serial Ports.
9Mbps SPI Interface.
3.3Vdc @ 400mA.
49mm x 47mm PCB Module.
Ipsil
Ipsil have three products in its IP range. The IPu8930 is currently on the market and is sold as a
module complete with a RTL8019AS ethernet MAC on the bottom. With a development kit for only
$199 USD, this looks like at good entry point into this market. In the pipeline is the IP8932 which
incorporates the Ethernet MAC into the one chip, and the IPu8942 designed for data streaming
applications.

IP8930
The IP8930 consists of an IP TCP Controller chip, an Ethernet PHY/

MAC interface chip, and an EEPROM. You just need to add the
ethernet magnetics
Small board footprint 1.3x1.4 or 33.2mm x 34.5mm
8 on-board 10-bit A/D converters
Serial, I 2 C and SPI. Async speeds up to 115,200bps
512KB EEPROM, 482KB available for designer
Uses RealTek RTL8019AS MAC
5.0V operation
Bare Module $99 USD, Development Kit $199 USD
IP8932
Single-chip TCP Controller with Ethernet and SlipNet designed for general purpose
monitoring, control, and connectivity applications.
Supports a wide range of network applications and protocols including TCP/IP, UDP,
DHCP, ICMP (ping), FTP and Telnet
64Pin QFP
IP8942
Single-chip TCP Controller with Ethernet designed for multimedia applications such as
streaming video and audio.
Optimised for streaming
Connect One
Connect One has iChip offerings in both ethernet and dial-up/wireless based solutions. The dial-up/
wireless iChips get integrated at remote sites or in mobile phones and supports the full range of
AMPS, CDMA, CDPD, GPRS, GSM, iDEN, and TDMA wireless modems. This allows you to contact
the Internet from remote locations, making it ideal for data logging applications. The iChip introduced
in 1999 was claimed to be the first Internet peripheral chip on the market that uses updateable flash
memory to store the full Internet protocol stack. This allows it to be updated without having to throw
out the chip.
iChip LAN CO561AD-L
Supports ARP, IP, ICMP, UDP, TCP, DNS, DHCP, SMTP, POP3, MIME and HTTP
Supports 10Mbps Crystal LAN CS8900A and Realtek RTL8019AS Ethernet controllers in
16bit mode. (Requires external PLD for CS8900 Handshaking)
Supports 100Mbps SMSC (LAN91C111 and LAN91C113) and Asix AX88796L Ethernet
MACs.
iChip suggests they will have support for 802.11b Wireless LAN at the beginning of 2003
Opens up to 10 TCP or UDP sockets and up to 2 Listen (server) sockets.
iChip Lan supports asynchronous comms speeds up to 230,000 bps
68 pin PLCC
3.3V or 5V (RTL8019A only supports 5V) 70mA Typ @ 3.3V, 160mA @ 5V

WIZnet Inc
WIZnet Inc claims to have the world's first Ethernet based TCP/IP hardware chip, the W3100A. This
features a hardware TCP/IP stack, plus a 10/100 Ethernet MAC Layer in the one chip.
W3150A Hardwired Internet Connectivity Chip
Support ADSL connection (with PPPoE)

Supports TCP, IPv4, UDP, ICMP, ARP, DLC and MAC Protocols (DHCP,
HTTP, SMTP, and PING are included as Application protocols)
Supports 4 independent channels
In built Ethernet MAC with 10/100 Base T auto detection
Intel/Motorola MCU bus interface with i2C serial interface
Speedy 8 Mbps throughput with a Hitachi SH7709A, 6 Mbps with a Intel
80386
3.3V internal operation, 5V tolerant I/O
64-Pin LQFP Package
NM7010B Embedded Internet Connectivity Module
Combines W3150A and support circuitry with RJ-45 socket

with in-built transformer.
Compact 49mm x 22mm.
2x 24-pin headers for easy interfacing.
Common Ethernet MAC Controllers

There are two main contenders in the embedded Ethernet MAC market based on popularity. Both
started their life as 16 bit ISA ethernet devices, but are now very popular with 8, 16 and 32 bit
microcontrollers. The Realtek is favoured among many for its generous internal SRAM which helps
when assembling packets in microcontrollers with limited resources, while the Crystal Lan finds itself
popular in 3.3V circuits.
RealTek RTL8019AS ISA Full-Duplex Ethernet Controller with Plug and Play Function
16Kbyte SRAM Internal

100-pin PQFP
Software compatible with NE2000 on both 8 and 16-bit slots
Support 4 diagnostic LED pins with programmable outputs
Datasheet, 460 Kb
After purchasing bare RTL8019AS ICs in Australia for your own designs? Look no further than
Embedtronics - $20 AUD each.

Crystal Semiconductor CS8900A 10Base-T Ethernet Controller
4Kbyte onchip memory for buffering of Transmit and Receive Packets

100-pin TQFP
3.3V or 5V operation, 55mA Max @ 5V
Datasheet, 2151 Kb
Bare Development Boards

Quite often the MAC controller IC's and transformers (Magnetics) are hard to come by in one off
quantities. However quite a few vendors sell development boards which allows you to add ethernet to
your favourite processor. Just some of these boards are detailed below.
EDTP Packet Whacker
Based on the Realtek RTL8019AS

0.1" Pitch Headers for easy interfacing
$25 USD kit, $30 USD Assembled
EDTP CS8900A-CQ 10Mbps Ethernet Development Board
Based on the Crystal LAN CS8900A

Includes pads for a Serial EEPROM
$40 USD Assembled
EmbeddedEthernet.com's CS8900 Board

Small 1.2" x 1.9" (31mm x 48mm)
Available in 3.3V and 5V versions
$70 USD
EE-100 Ethernet Module CS8900A


Board Size 1.2 x 2.5 inches (32 x 64mm)
$49.95 USD
Ethernet and Processor Development Boards

If connecting one of the above boards to your favourite processor and porting across a TCP/IP stack
sounds too much hard work for you, look no further than some of the Ethernet & Microcontroller
combos below.
The first modules come from the Web51 project. Most of the project is open source and free to
download. The code is available from the Web51 site under the GNU General Public License. On
visiting the Web51 web site, you will see the abundance of examples and information that one could
easily spend hours if not days browsing.
Charon 1 (Web51 Charon)
Intel x51 compatible processor.

Realtek RTL8019AS 10 Mbit Ethernet
Controller.
One TTL Level Asynchronous Serial Port.
32 kB RAM, 64 kB FLASH and 2kB EEPROM.
Comes preloaded with an ethernet to serial line
application example.
44 x36 mm
Charon I DataSheet
Charon I & II Development MotherBoard
Accepts Charon I & II Modules.

Integrated Ethernet Connector and Magnetics.
MAX232 Line Drivers for RS-232 Serial Port.
Interface for 2 line x 16 Character LCD Display
& 1 Wire Devices.
Extra Flash Memory via SPI Interface.
8 LED's, Bargraph Display and DIP Switches
for I/O.
AVR JTAG ICE & AVR ISP Programmer
Headers.
The HW server group also have some Turn-key

solutions based on their Web51 modules if you are
looking for a complete solution housed in a box. All
you have to do is modify the code to fit your project.

Ethernut
The Ethernut project is also another open source hardware

and software project. The software includes a Real Time
Operating system nicknamed the Nut/OS and a TCP/IP Stack
nicknamed Nut/Net. This project is based on the popular
Atmel AVR series processors.
Atmel ATmega128 RISC MCU @ 14.7456 MHz

Realtek RTL8019AS 10 Mbit Ethernet Controller.
RS-232 serial port.
128 Kbyte Flash, 4 Kbyte EEPROM, 32 Kbyte SRAM.
22 programmable digital I/O lines with 8-channel, 10-bit
ADC and 3 timer/counters.
4 layer PCB 80 x 100 mm.
Charon 2
The Charon 2 is a Ethernut compatible module from

the HWgroup. It is an excellent way to embed an
Atmel ATmega 128 and RTL8019 without having to
build a daughtercard for the original Ethernut board.
Atmel ATmega128 RISC MCU.

Realtek RTL8019AS 10 Mbit Ethernet
Controller.
128 kb Flash, 4 kb SRAM, 4kb EEPROM and
dual USART.
Charon II Development Board Schematic (655
kb)
Charon II Schematic (621 kb)
Microchip PICDEM.net Embedded Internet/Ethernet Demonstration Board
Powered by a PIC16F877 or PIC18F452 Microcontroller @ 19.6608MHz

Uses Realtek RTL8019AS MAC in 8 bit mode
24LC256 serial EEPROM provides 256 Kbit (32 Kbyte) of storage for Web pages
2 line 16 Character LCD Display
ICSP/ICD interface connector for easy debugging
Free Microchip TCP/IP Stack firmware has been provided with the board
Comes with book, TCP/IP Lean: Web Servers for Embedded Systems (Second Edition)
AVR Embedded Internet Toolkit
Powered by a ATmega103 microcontroller @ 4.608 MHz

Board includes 32K bytes of external SRAM and 262K bytes external Flash
Uses CS8900 MAC in 8 bit mode
Royalty Free AVR TCP/IP Stack firmware has been provided with the board
AVR460: Embedded Web Server Manual

Rabbits (Rabbit 2000 and Rabbit 3000 Core Modules)
Rabbit Semiconductor have a wide range of Rabbit2000 and Rabbit3000

cores with ethernet. To complement these cores, they also have a range
of ready to go development kits. Each kit comes with a copy of Dynamic
C and their royalty-free TCP/IP stack with source.
RCM3000 Rabbit3000 core based on an enhanced Z180 CPU

10Base-T Ethernet.
128K512K SRAM, 256K512K Flash RabbitCore RCM3000
52 digital I/O
29.4 MHz clock
Rabbit Developer Resources provided by Card Labs.
S-7600A TCP/IP Network Protocol Stack LSI
Seiko Instruments Inc have come up with what should be a very popular chip. Having already picked
up the Electronic Products 1999 Product of the Year Award, the S-7600A is a 48 pin package which
takes care of the TCP/IP stack in hardware. This allows quite dumb processors the ability to talk on
the internet. The S-7600A incorporates a UART which is connected to the internet using PPP (Point to
Point Protocol) either via a dedicated link or via a dial up modem. A microcontroller can then send the
S-7600 streams of information which is automatically encapsulated in a TCP/UDP datagram and sent
using IP.
S-7600A
Supports Industry Standard Protocols : TCP/IP (Ver. 4.0) PPP (STD-51-compliant) UDP
Supports two general purpose sockets
Easier application development (Hardware takes care of Encapsulation, PPP, TCP/IP
Stack)
48-pin QFP
This has a wide range of uses, such as allowing

your data logger to dial up the internet and FTP it's
data to your server or email you alarms and
summaries. Coupled with a GSM or mobile phone,
you can get alarms via email from any number of
devices - pumping stations - weather instruments -
toasters! You name it. The internet, being a cost
effective transmission medium allows cheaps calls
to a local ISP which can then be relayed to the
other side of the world if need be via the internet.
On the less practical, but far more enjoyable

hobbyist side, you could endeavour to make the
world's smallest Web Server. Certain debate lies if
you could use a 8 Pin PIC12C508, but it has been
done with a PIC16F84! See Small Web Server

based on the PIC16F84
Mike Johnson from Iready Corporation was kind

enough to send one of this newly designed S-7600
AVR Development Boards my way (Pictured).
Documentation of the AVR Development board
can be found at http://www.iready.org/projects/avr/
uCSimm (Embedded Ethernet Controller running Linux)
The uCSimm has been a very popular module ever since one little advertisement in Circuit Cellar. The
uCSimm is an embedded Ethernet module ideal for Internet connectivity. Based on a Motorola 68K
running Linux there is no limits to what you can achieve with this unit. If your imagination isn't with you
today, check out the uCSimm and uCLinux Forums on http://www.uClinux.org
uC68EZ328
MC68EZ328 Motorola
Dragonball
Microcontroller
8 Mb DRAM (4096k x
16 bits)
1 Mb (512k x 16 bits) / 2
Mb (1024k x 16 bits) / 4
Mb (2048k x 16 bits)
ROM
10baseT Ethernet
+3.3 volt
For those who can't help making their own (Maybe with extra I/O or no conformal coating on the gold
contacts . .) this device uses a 68EZ328 Dragon Ball Processor. Motorola has a 68EN302 processor,
based on their 68K Architecture complete with Embedded Ethernet Interface. While this seems the
better option, reality is that you can't obtain these easily and they use a normal medium speed crystal.
The dragonball on the other hand will run from DC to 16.58 MHz with 2.7 MIPS performance. What is
quite useful is the 68EZ328's ability to generate it's 16.58MHz internal clock with a tiny 32.768 kHz
crystal using it's internal PLL clock Multiplier. Ideal for those small locations. The uCSimm has two
small crystals tucked on the back of the module.
The 68EN328 has a built in DRAM controller which requires no Glue Logic. This, coupled with a

CS8900A LAN Controller makes the module so simple, anyone could wack one together customised
to their specs. Even the software is a breeze with the unit running on uClinux, an open source
embedded Linux. With all this functionality, I have to ask - who needs an embedded I386?
Tini (Embedded Ethernet Controller running Java)
The TINI standing for Tiny InterNet Interface is a product of Dallas Semiconductor. It's very simular to
the uCSimm and you could easily mistake it for a uCSimm from a distance. Both the uCSimm and TINI
come with daughter boards for testing.
DSTINI1 - TINI
Verification Module
DS80C390
Processor @
36.864MHz.
31.8 mm x
102.9 mm 72-
pin SIMM board
512KByte Flash
512K/1MByte
nonvolatile
SRAM
Ethernet
10Base-T
interface
(SMC91C96)
Dual 1-Wire
interface
(IButton)
CAN interface /
Dual Serial
Port / I2C
Interface
Requires
single +5VDC
Power Supply
Copyright 2001-2005 Craig Peacock 11th May 2006.

CIRCUIT DESIGN,INC.-HOME Radio module manufacturer
Corporate | History | Contact | Link |
News
Sep. 2007 New technical literature, Electric field intensity at the receiving point, is
uploaded.
Sep. 2007 New on-line calculation tool, Hight pattern calculation, is uploaded.
Sep. 2007 New on-line calculation tool, Fresnel zone calculation, is uploaded.
Please select a model Jul. 2007 863 - 865 MHz multi channel wireless audio transmitter and receiver are
released.
May. 2007 New on-line calculation tool for creating a RF channel plan
Welcome to Circuit Design, a leading supplier of low power radio modules. Circuit Design
specializes in the design and manufacture of embedded transmitter, receiver, transceiver
and RF modems in the license-exempt, low power radio band (Short Range Devices in
Europe). Low-power, narrow-bandwidth and discrete component designs are targeted at
long-range, battery-powered industrial applications. These serve well in fields such as
telecommand, telecontrol, telemetry, alarms, and security, and for all kinds of wireless
data transmission where high reliability is required.
RF design guide
Calculation tools
Application examples
Technical literature
Regulatory compliance
Environmental compliance
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CIRCUIT DESIGN,INC.-HOME Radio module manufacturer
Information in Italian is available at the web page of SYLCOM S.r.l.

SYLCOM S.r.l. is Circuit Design's distributor in Italy.
CIRCUIT DESIGN, INC.

Phone:++81-263-82-1024 FAX:++81-263-82-1016 E-mail:
ALL Right Reserved,Copyright 2005 Circuit Design,Inc.
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RF Solutions & Wireless Communications Technology: RFMD
Home
privacy | legal statement | RFMD Sales & Technical Support Center: 336.678.5570|
Front End Products

Transmit Modules
Amplifiers EDGE
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Amplifiers: <1W GSM/GPRS
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Transistors: <2W TD-SCDMA
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Transimpedance Amps WCDMA
Broadband/CATV Switches
Signal Source EDGE
VCOs WCDMA
PLLs GSM/GPRS
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I/Q Demodulator RF Systems
IF Demodulator EDGE -- Customer Links --
Stripline Coupler GSM/GPRS

I/Q Modulator
Passive Devices
Couplers
Splitters
Mixers
Transformers
Isolators
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RF Solutions & Wireless Communications Technology: RFMD
Circulators
Aerospace & Defense Products
Networking
Media Converters
Other
Discontinued Products
ISM Band Transceivers
900 MHz
2.4 GHz
5.8 GHz
Discontinued Products
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Broadband/CATV Amplifiers
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Pic based SBC boards with ethernet, RS232, RS485, CAN, prototype board
Home | Specials | Sales | Services | Contact Cart | Order Info | Downloads | MicroX | Search | Links | About
Products We specialize in modular microcontroller based hardware and software solutions - specially
for the PIC microcontroller from Microchip.
CAN Bus All our products have a 15 day money back satisfaction guarantee! Products can be purchased online via our site.
Clearance Sale Simply add the products you want to your shopping cart, checkout, and within 2 working days your order will be
shipped! Alternatively you can purchase through our worldwide distributors.
Components
Connectors We are going Lead-Free, soon all our products will be RoHS compliant! For great specials on our excess leaded
stock, check out our Clearance Sale for discounts of up to 70%!
Development kits
Ethernet Ethernet USB
GPS Our range of Ethernet boards Our new
start at just USD55.00. All SBC44UC
Hardware boards are programmed with board has a
I/O Modules our free Modtronix TCP/IP full speed
stack and have a web based USB
LCD Displays
interface. All source code is interface, and
Microcontrollers provided for fee, and can be is assembled
PIC H-Series Boards modified using free C compiler with the
and MPLAB IDE from PIC18F4550
PIC MicroX Boards PIC chip from
Microchip. Custom web pages
Programmers can be uploaded to the board. Tags in web pages can be used Microchip. It is programmed with a
bootloader. It has been designed to work with
RS232 to monitor inputs. Accepts commands via UDP or HTTP for
the free Microchip USB Software. It has 33
RS485 & RS422 configuring the board and controlling outputs. For details, click
user programmable I/O ports, ADC inputs,
here. PWM outputs and more. Power can be
Serial Displays
provided by the USB bus, or an external
Software power supply. For details, click here.
USB
Serial and Standard LCD Displays Microchip PIC Microcontrollers
Personal
We stock a large range of We have a
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Create an Account Character and Graphic LCD of PIC12,
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Specials Our MicroX product range consists of modular PIC based single No programmer is required to program the
board computers (SBC) and expansion boards. This highly board! By using a free PC program, the user
modular design allows you to quickly and economically realize can reprogram the PIC chip in circuit via the
your microcontroller based project by combining different Ethernet or the PCs serial port. In stead of the
boards. More Information........ serial port, a USB to Serial converter can be
used to program it via the USB. To see all
boards in this range, click here.
24LC512-I/P
US$3.95
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Pic based SBC boards with ethernet, RS232, RS485, CAN, prototype board
Bestsellers Previous News

News
01. SBC65EC
4 February 2008 - We have completed development of the first modules to be released of our new Presto
02. PIC16F628A-I/P
range of Press-Fit Electronic Modules. These modules are currently in the process of getting manufactured, and
03. MICROMATCH-6MW will be available in a couple of weeks time. Small quantities for prototyping are available now on request. For
04. PT01TC-ASM additional info and photos, see forum.
05. SBC68EC 26 October 2007 - We are currently developing a whole new range of boards, our Presto Range of Electronic
Modules with Press-fit connectors. It consists of 3.3V and 5V boards with Ethernet, PoE, RS232, RS485, CAN
06. PGM06 Bus, 1 Wire and other interfaces. Modules feature press-fit connectors, allowing them to be added to the target
07. HDR2X10-M254-75 board without soldering. For details, see forum.
08. LM35-DZ 1 October 2007 - Microchip PICkit 2 low cost USB programmer, and ICD 2 programmer/debugger are in
09. SBC44EC stock again!
13 July 2007 - Added MXD2R new Relay/Input/Output daughter board.
10. PIC12F675-I/P
18 June 2007 - Our new SBC44UC Single Board Computer with Full Speed USB interface, PIC18F4550 and
dual power is now in stock. It is shipped with a bootloader and example projects. No PIC programmer required!
18 May 2007 - Added 150mm and 300mm Micro Match Cables , and 12 button and 16 button matrix
keypads.
17 May 2007 - Our new SBC44UC Single Board Computer with Full Speed USB interface, PIC18F4550 and
dual power has gone into production. Expected availability is end of May.
11 May 2007 - Released new version of Modtronix Network Bootloader.
9 May 2007 - Released new version of Modtronix SBC65EC Web Server and Modtronix SBC68EC Web
Server. This new version contains heaps of new features, like UDP commands, controlling PWM outputs and
more configuration options via the web interface.
5 February 2007 - Added new range of 3.81mm PCB Mount Terminal Blocks.
2 January 2007 - We have moved to a larger premises on the Gold Coast, for new address see our contact
page.
24 November 2006 - Released new range of I2C/SPI Serial LCD displays with keypad encoder and user I/
Os.
16 October 2006 - Released PGM2KIT programming adaptor. When used together with the PICkit 2
programmer it can program any Modtronix PIC based board!
10 October 2006 - Released new version of Modtronix SBC65EC Web Server and Modtronix SBC68EC Web
Server. This new version has some minor bug fixes, and implements a DHCP client and NetBIOS, which makes
it very easy to access on a network - no more configuration of static IP addresses are required!
21 September 2006 - Released new version of Modtronix SBC68EC Web Server and Modtronix SBC65EC
Web Server.
20 September 2006 - Released new version of Modtronix Network Bootloader.
13 September 2006 - Added the new Microchip PICkit 2 low cost USB programmer.
1 September 2006 - Added new SBC board with RS232 interface for 28 pin PIC chips.
13 July 2006 - Added new LCD displays to our product range.
19 May 2006 - Released two new prototype boards in enclosures. See PT10E-ASM and PT24E-ASM for
details.
17 May 2006 - Released first boards of new H-Series. All boards in this series can be used as OEM boards or
in enclosures. For details click here.
5 May 2006 - Made a demo SBC65EC web server accessible via the internet - click here to view it.
2 May 2006 - Limited number of SBC68EC boards are available again. More stock will be arriving in about 2-
3 weeks time.
21 February 2006 - New version of SBC65EC assembled with PIC18F6627 has replaced the old PIC18F6621
version. Firmware will however continue to support all hardware versions of the SBC65EC!
14 February 2006 - Added new 2x16 and 4x20 line LCD Character Modules.
20 January 2006 - Released new version of the Modtronix Web Server for the SBC68EC with an updated
Modtronix TCP/IP stack and network bootloader.
15 January 2006 - Released a new version (V3.02) of the Modtronix Web Server for the SBC65EC. Also
added many TCP/IP example programs, and a new versions of Netloader.
21 December 2005 - Released new version of the Modtronix Web Server for the SBC65EC with an updated
Modtronix TCP/IP stack and network bootloader.
19 October 2005 - Added new range of Active GPS Antennas with MCX, MMCX and SMA connectors.
5 October 2005 - Most of our programmers are now in stock again!
12 September 2005 - The SBC44B and BLC877A boards are back in stock again.
Tuesday 12 February, 2008
http://www.modtronix.com/ (2 of 2)12/02/2008 17:27:06

Xsens Motion Technologies - inertial measurement unit IMU, Motion capture system: Moven, markerless mocap.
Xsens is a leading developer and supplier of products for measurement of motion, orientation and position, based upon miniature MEMS inertial sensor technology. News
Winner of Innovation Award
Moven MTi-G Xsens has won the
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Geek Hideout --> IO.DLL
Geek Hideout IO.DLL
Geek Hideout
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What's New? IO.DLL
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View Guestbook Synopsis
IO.DLL allows seamless port I/O operations for Windows 95/98/NT/2000/XP using the same
library.
Most Popular!
Tell Me a Secret Introduction
Drug Lord 2.2
IO.DLL In the pre-Windows days, it was a relatively simple matter to access I/O ports on a typical PC.
Parallel Port Monitor Indeed, nearly every language sported a special command for doing so. As Windows emerged
and gradually evolved, this flapping in the wind behaviour could no longer be tolerated because
Me of operating system's ability to virtualize hardware.
Who am I?
What I Do Virtualizing hardware means that an application (typically a DOS box in Windows) believes it is
Resume talking directly to a physical device, but in reality it is talking to a driver that emulates the
My Computers hardware, passing data back and forth as appropriate. This is how you are able to open dozens
Contact Me of DOS boxes in your Windows session, each one with the strange notion that it has exclusive
access to peripherals such as the video adapter, keyboard, sound card and printer.
Drug Lord 2.2
Download If one were to rudely bang out data to an I/O port that Windows thought it was in full control of,
Today's High Scores the "official bad thing" could occur, the severity of which depending upon the exact hardware that
High Scores was being accessed. Actually, with the virtualization just mentioned, it is quite improbable that
Windows would permit anything too nasty from occuring.
Programming Tools
IO.DLL Windows 95/98 actually does allow I/O operations be executed at the application level, although
Servo Control
you'd be hard pressed to find a language that supports this directly. Typically the programmer
QuietMessageBox will have to resort to assembly language for this kind of low-level control. If you know what you
giftab are doing, this can be a quick and easy way to access I/O ports. Of course, not everyone knows,
or desires to learn 80x86 assembly programming just because they want to turn on a lamp from
Freeware their computer. However, the unwillingness to learn assembly language becomes rather trivial
Parallel Port Monitor when faced with 9x's big brother.
HTML Color Blender
Windows NT/2000/XP, being the secure operating system that it is, does not permit port I/O
Finance operations at the application level at all. Period. A program with inline IN and OUT assembly
Interest Calculator instructions that runs perfectly on Windows 95/98 will fail horribly when it comes to Windows
shopLocal NT/2000/XP.
Fitness & Nutrition

Windows NT/2000/XP does, however, allow I/O instructions in its kernel mode drivers. A kernel
Power Balls
mode driver runs at the most priviledged level of the processor and can do whatever it pleases,
including screwing up the system beyond repair, thus writing a kernel mode driver is not for the
Geocaching
feint of heart.
How I Started
Equipment to take
My Finds If you were to take it upon yourself to wade through the documentation of the Windows NT/2000/
XP ddk and piece together a driver that was callable by your application to do the I/O instructions
on behalf of your application, you'd probably notice something not too pleasant--this sort of
Watch Reviews
access is painfully slow. The call from application level to system level typically takes about one
millisecond. Compare this to the one microsecond that a normal I/O access takes. To further the
insult, you are at the whim of the operating system. If it has tasks which it believes are of higher
priority than your lowly call to your driver, it will perform them, making precise timing nearly
impossible.
http://www.geekhideout.com/iodll.shtml (1 of 5)12/02/2008 17:27:18

About My Collection Obviously, writing a driver that does acts a proxy for the I/O calls isn't the most ideal solution.
Luminox 32xx There is, however, a solution for NT/2000/XP that allows the same convienience of inline
Invicta 9937 assembly language that 95/98 does.
Sandoz Sub
Sandoz Explorer As mentioned, a kernel mode driver can do whatever it wants. The implication here is that if
Timex 20501 another kernel mode driver shut off application access to the I/O ports, it should be possible for
Invicta Torture Test another kernel mode driver to turn it back on. This is where IO.DLL enters the picture.
Invicta Speedway
Invicta GMT Licensing
WCT-5513
IO.DLL is completely free! However, you may not:
Knife Reviews
About My Collection Charge others for it in any way. For example, you cannot sell it as a stand alone product.
Benchmade 670 Charge for an IO.DLL wrapper, such as an OCX or Delphi control whose purpose is just
to put a fancy interface on IO.DLL. I consider these to be "derived works" and they must
Knowledge be provided free of charge.
Hydraulic pumps Claim that it is your property.
Quine-McClusky
Also, the author (that's me) cannot be held liable due to io.dll's failure to perform. As with most
Silly Stories free stuff, you are on your own.
Danny the Dog
Rupert and the Wine
The Lame Beggar
Source Code and Special Modifications
Taco Man
Ant Story The source code is available for $1,000 US.
Sausage Shoes
I'm willing to work with people should they require a special modification to IO.DLL. For example,
Random Silliness you might have a strict timing requirement of some sort that can only be done in kernel mode.
Versitile Pork For a fee, I will modify IO.DLL and/or the embedded kernel mode driver for the task at hand.
The Stooges
The Paperboy Description of IO.DLL
Essays IO.DLL provides a useful set of commands for reading and writing to the I/O ports. These
iPod Shuffle Woes commands are consistent between 95/98 and NT/2000/XP. Furthermore, there is no need for the
Human Limitations programmer to learn assembly language or muck with kernel mode drivers. Simply link to the
DLL and call the functions. It's that easy.
Freaky
One
Windows NT/2000/XP is accomodated through the use of a small kernel mode driver that
Two releases the ports as needed to the application. This driver is embedded in the DLL and is
Three installed if Windows NT/2000/XP is determined to be the underlying operating system.
Four
Five Due to the very minor overhead involved in dynamically linking to IO.DLL, and the optimized
Six functions contained within, access to I/O ports is nearly as fast as if it was written in raw
Seven assembler and inlined in your application. This holds true for both Windows 95/98 and Windows
Eight NT/2000/XP.
Link Log Before moving on, it is probably prudent to mention that the technique employed in IO.DLL for
Entire Log releasing the ports to the application level isn't, strictly speaking, the proper way to do things.
Last 25 The proper way is to have a virtual device driver for Windows 95/98 and a kernel mode driver for
Last 50 Windows NT/2000/XP. This isn't very practical for many people though, nor is it really necessary.
Last 100 There are several successful commercial products on the market that do exactly what IO.DLL
Search Link Log does. Let it be noted though that some of them are shady with their explanation of how their
Random Link product works, meanwhile charging $500 or more for it.
Other Download
io.zip 46k (Contains all the files)

io.dll 46k

Tell Me a Secret
Unix Hierarchy The following two files are for C++ users. There is more info on these in the prototypes section.
C Commandments
Dog Asks God io.cpp 1k
Links io.h 1k
Weird Words
Random Addresses
C/C++ Prototypes
Learn: ebullient
void WINAPI PortOut(short int Port, char Data);

void WINAPI PortWordOut(short int Port, short int Data);
void WINAPI PortDWordOut(short int Port, int Data);
char WINAPI PortIn(short int Port);
short int WINAPI PortWordIn(short int Port);
int WINAPI PortDWordIn(short int Port);
void WINAPI SetPortBit(short int Port, char Bit);
void WINAPI ClrPortBit(short int Port, char Bit);
void WINAPI NotPortBit(short int Port, char Bit);
short int WINAPI GetPortBit(short int Port, char Bit);
short int WINAPI RightPortShift(short int Port, short int Val);
short int WINAPI LeftPortShift(short int Port, short int Val);
short int WINAPI IsDriverInstalled();
To use IO.DLL with Visual C++/ Borland C++, etc, you'll need to use LoadLibrary and
GetProcAddress. Yes, it's more of a pain than using a .lib file, but because of name mangling, it's
the only reliable way of calling the functions in IO.DLL. I've gone ahead and done the dirty work
for you:
io.cpp
io.h
Just save these two files and include them in your project. For a Visual C++, you may need to
add #include "StdAfx.h" at the top of io.cpp otherwise the compiler will whine at you.
These two files take care of calling LoadLibrary and all the neccessary calls to GetProcAddress,
making your life happy once again.
The only step you are required to do is call LoadIODLL somewhere at the beginning of your
program. Make sure you do this or you will find yourself faced with all sorts of interesting crashes.
Please let me know if you find any errors in the above two files. They are new and haven't been
tested all that much.
Delphi Prototypes
procedure PortOut(Port : Word; Data : Byte);

procedure PortWordOut(Port : Word; Data : Word);
procedure PortDWordOut(Port : Word; Data : DWord);
function PortIn(Port : Word) : Byte;
function PortWordIn(Port : Word) : Word;
function PortDWordIn(Port : Word) : DWord;
procedure SetPortBit(Port : Word; Bit : Byte);
procedure ClrPortBit(Port : Word; Bit : Byte);
procedure NotPortBit(Port : Word; Bit : Byte);
function GetPortBit(Port : Word; Bit : Byte) : WordBool;
function RightPortShift(Port : Word; Val : WordBool) : WordBool;
function LeftPortShift(Port : Word; Val : WordBool) : WordBool;
function IsDriverInstalled : Boolean;

Important! To use these functions in your Delphi program, the correct calling convention of
stdcall is required. For example:
procedure PortOut(Port : Word; Data : Byte); stdcall; external 'io.dll';
Visual Basic Prototypes
Private Declare Sub PortOut Lib "IO.DLL" (ByVal Port As Integer,

ByVal Data As Byte)
Private Declare Sub PortWordOut Lib "IO.DLL" (ByVal Port As Integer,
ByVal Data As Integer)
Private Declare Sub PortDWordOut Lib "IO.DLL" (ByVal Port As
Integer, ByVal Data As Long)
Private Declare Function PortIn Lib "IO.DLL" (ByVal Port As Integer)
As Byte
Private Declare Function PortWordIn Lib "IO.DLL" (ByVal Port As
Integer) As Integer
Private Declare Function PortDWordIn Lib "IO.DLL" (ByVal Port As
Integer) As Long
Private Declare Sub SetPortBit Lib "IO.DLL" (ByVal Port As Integer,
ByVal Bit As Byte)
Private Declare Sub ClrPortBit Lib "IO.DLL" (ByVal Port As Integer,
ByVal Bit As Byte)
Private Declare Sub NotPortBit Lib "IO.DLL" (ByVal Port As Integer,
ByVal Bit As Byte)
Private Declare Function GetPortBit Lib "IO.DLL" (ByVal Port As
Integer, ByVal Bit As Byte) As Boolean
Private Declare Function RightPortShift Lib "IO.DLL" (ByVal Port As
Integer, ByVal Val As Boolean) As Boolean
Private Declare Function LeftPortShift Lib "IO.DLL" (ByVal Port As
Integer, ByVal Val As Boolean) As Boolean
Private Declare Function IsDriverInstalled Lib "IO.DLL" As Boolean
Function Descriptions
Please refer to the prototype for the particular language you are using.
PortOut
Outputs a byte to the specified port.
PortWordOut
Outputs a word (16-bits) to the specified port.
PortDWordOut
Outputs a double word (32-bits) to the specified port.
PortIn
Reads a byte from the specified port.
PortWordIn
Reads a word (16-bits) from the specified port.
PortDWordIn
Reads a double word (32-bits) from the specified port.
SetPortBit
Sets the bit of the specified port.

ClrPortBit
Clears the bit of the specified port.
NotPortBit
Nots (inverts) the bit of the specified port.
GetPortBit
Returns the state of the specified bit.
RightPortShift
Shifts the specified port to the right. The LSB is returned, and the value passed becomes the
MSB.
LeftPortShift
Shifts the specified port to the left. The MSB is returned, and the value passed becomes the LSB.
IsDriverInstalled
Returns non-zero if io.dll is installed and functioning. The primary purpose of this function is to
ensure that the kernel mode driver for NT/2000/XP has been installed and is accessible.
Other Information
An excellent document about the standard parallel port can be found here.
Copyright 2000-2008 Geek Hideout http://www.geekhideout.com/iodll.shtml

System load: 4.13, 4.94, 6.10 | Current Visitors: 8 Last modified on July 11, 2003

Wireless Anwendungen: kabellose Kommunikation und Funkmodems von wireless world ag - Datenfunk, EasyRadio, CTWLAN, Funk Datenbertragung
Wireless Anwendungen: kabellose Kommunikation und

Funkmodems von wireless world ag - Datenfunk,
EasyRadio, CTWLAN, Funk Datenbertragung
Sprachen Wireless-Anwendungen Newsletters
Hier Newsletter
Wireless Technologien finden sich in allen Bereichen unseres tglichen Lebens. abonnieren!
Suche + Sitemap
Angefangen beim Autoschlssel, der per Knopfdruck die Schliess- und Alarmanlage
bettigt bis hin zur funkgesttzen Zieleinrichtung bei militrischen Spezialverbnden -
Anwendungen von A bis Z sind heute nicht mehr denkbar ohne die Nutzung von Neuheiten ...
Menu / Navigation
Datenfunk-Technologien.
:. MU-1 434 MHz
:.OnlineShop OEM Funkmodem
:.Wireless-Anwendungen :.STD-302-500:
->Automobilbau 500 mW GFSK
->Gebaeudeautomation Funk-Transceiver
:.Funkkomponenten :.ER-TP-01-RS
Easy-Radio Tester-
:.Funkmodule
Programmer
Auf den folgenden Seiten finden Sie detaillierte Informationen ber Funk-Anwendungen
:.Funkmodems
in den verschiedensten Anwendungsbereichen. :.CTWLAN mini:
:.Funkfernsteuerungen
Lassen Sie sich berraschen und inspirieren. RS232-WLAN
Und wenn Sie neugierig geworden und auf neue Ideen gekommen sind, kontaktieren Sie
Serial Client
:.Antennen uns!
Wir zeigen Ihnen gerne, wie Sie Datenfunk in krzester Zeit in Ihre eigene Anwendung Bridge
:.Firmenprofil integrieren knnen. Zum Beispiel mit unseren Easy-Radio Funkmodulen: dank
:. RF1172D: OFW
integriertem Easy-Radio Funkprotokoll brauchen Sie nicht Monate oder Wochen zur
:.Links Integration von Wireless in Ihre Anwendung. Front-End Filter im
Wir zeigen Ihnen, wie ihre Anwendung Wireless wird innerhalb von Stunden oder Mini-Gehuse
wenigen Tagen. Garantiert!
:. RO2101D OFW
Umfragen
Resonator im 3,8 x
Nachfolgend finden Sie einige wichtige Anwendungsbereiche fr die Datenbertragung
3,8 mm Formfaktor
per Funk:
:. EasyRadio - der
Wireless im Automobilbau neue Standard fr
Wireless in der Gebudeautomation die Funk-
Wireless in industriellen Anwendungen Datenbertragung
Wireless in der Medizintechnik
:. 3-Kanal-
Wireless in militrischen Anwendungen
Empfnger SHR-7/
Wireless in der Telekommunikation
L3 mit Code-
Wireless in Sport und Lifestyle-Anwendungen
Lernfunktion im
433 MHz Band
Dies sind nur einige Beispiele. Bitte informieren Sie uns ber Ihre Anwendung. Wir sind
neugierig und lernen gerne tglich neue Anwendungen kennen. :. ER400PEN
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Power Booster fr
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Anwendungen
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Romanshornerstr. 117, CH-8280 Kreuzlingen, Fon +41 (71) 698 6480, Fax +41 (71) 698 6481, www.wirelessworldag.ch
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Embedded Ethernet
Sponsored by NetBurner
What is embedded Ethernet?
Techweb.com defines embedded Ethernet as a "single-chip implementation of the Ethernet

networking standard." Simply put, by embedding Ethernet onto a device, it has the capability to
communicate via Ethernet without using a computer. You can setup a device with a web server and
interact with much of its functionality though a webpage. Instead of needing to physically walk by a
machine to check its status signaled by a blinking light or loud buzzard, the device itself can
communicate its status directly to you remotely.
How can I add embedded Ethernet to my device?
Most follow one of two approaches to adding embedded Ethernet to any particular system. You can
buy an all-in-one embedded Ethernet system, like the NetBurner Network Development Kit, or you
can build it all from separate components.
All-in-one embedded Ethernet system
NetBurner designs and manufactures a wide variety of low cost 32-bit embedded Ethernet devices
that can be used to network-enable existing products or create new network-enabled products. In
addition to the device hardware, NetBurner also provides a complete development platform
including:
Integrated Development Environment (IDE)

ANSI C/C++ Compiler and Linker
TCP/IP Stack
Web Server
Graphical Debugger
AutoUpdate tools to download code through a network
connection
Deployment tools to manage a large number of devices
Secure communications using SSL
Industrial communications including ModBus,
http://www.embeddedethernet.com/ (1 of 6)12/02/2008 17:27:44

Embedded Ethernet
DeviceNet and Ethernet/IP

There are
three
Embedded Hardware
approaches
The NetBurner embedded network hardware is divided into you can take
two categories: core modules and serial to Ethernet devices. to add
All hardware is designed with fast 32-bit processors to handle
embedded
the most demanding applications.
Ethernet to
Serial to Ethernet Modules your system:
The serial to Ethernet devices are 1. Buy an all-in-

one system.
designed to have a simple interface to
the serial and Ethernet signals, and are 2. Buy all the
configured at the factory with an pieces
application program to operate as a separately.
complete serial to Ethernet device
without any programming or 3. Buy the
customization. In other words the serial hardware
to Ethernet devices ship from the pieces
factory as an out of the box solution for separately
your serial to Ethernet needs. and write all
the software
yourself.
Core Modules
Core modules are 2" x 2.6" devices with

two 50-pin headers providing access to
the microcontroller signals. Core
modules provide access to a wide array
of features including: QSPI, I2C, Analog
to Digital inputs, GPIO, CAN,
Programmable timers and UARTs,
Address bus and Data bus. Please refer
to the data sheets for the module of
interest for its specific feature set.
Embedded Development Tools

Embedded Ethernet
Core Modules and Serial to Ethernet Modules can be customized to suit any application with the
NetBurner Network Development Kit. These kits provide everything you need to create custom
applications for your embedded network device.
Integrated Development Environment (IDE)
The IDE provides an easy to use interface to edit and download your application. In fact, a single
build command will compile the application, download it over the network, program the flash
memory of the NetBurner device, and reboot the device in less than 10 seconds.
Command Line Tools
For developers who prefer not to use an IDE, or wish to use the tools with a different IDE, the
development tools can be run without the IDE directly from the command line using a standard
make file.
Embedded TCP/IP Stack
The TCP/IP Stack was written by NetBurner as a high performance TCP/IP stack for embedded
applications. The stack is integrated with the RTOS, Web Server and I/O system, providing easy
development of network applications. The following protocols are supported:
* ARP
* DHCP, BOOTP
* FTP Client and Server
* HTTP
* ICMP
* IGMP (multicast)
* IP
* NTP, SNTP
* POP3
* PPP
* SMTP
* SNMP
* SSL
* Statistics Collection
* TCP
* Telnet

Embedded Ethernet
* UDP
Embedded Real Time Operating System (RTOS)
The uC/OS RTOS is a preemptive multitasking real-time operating system designed to be very
efficient and full featured, providing rapid real-time response and a small footprint. You can easily
create and manage multiple tasks and communicate between tasks with the intuitive API. The
RTOS is integrated with the I/O system to make communication with the other system components,
such as the TCP/IP Stack, quick and easy.
* Based on uC/OS
* Real-time preemptive multitasking operating system
* Semaphores, Mail Boxes, Message Queues, FIFOs, Mutexs and Timers
* Stack Checking
* Task Debugging Tools
* The I/O system is integrated with the RTOS
If you have not used a RTOS before do not worry - you can use the "user task" automatically
created by the system as if it were your main loop. The advantage is that the Web Server, TCP/IP
Stack and serial interfaces are all interrupt driven and run in their own tasks. This means that
changes you may make to the user task will not change the timing of the network interface.
Embedded Web Server
The NetBurner web server is integrated with the TCP/IP stack and RTOS, enabling you to quickly
develop dynamic web pages and content. The dynamic content is especially easy to use since you
can add C function call references to your HTML content.
* Compresses a user provided directory of HTML documents, gifs, and JAVA classes into a file
that is embedded in the runtime application
* Supports Dynamic HTML
* Supports Forms, Cookies and Passwords
C/C++ Compiler and Linker
The GCC C/C++ compiler is one of the most well known and widely used ANSI compliant compilers
available today. NetBurner maintains and supports the latest updates and releases so developers
can stay focused on product development. Each release of GCC is tested with the NetBurner tools

Embedded Ethernet
and software.
* Fully ANSI compliant C/C++ compiler and linker.

* Fully integrated with the NetBurner IDE. It can also used with other IDEs such as Codwrite and
Visual SlickEdit, or run from a command prompt.
* Integrated with the GDB/Insight Graphical Debugger.
Embedded Flash File System
The Embedded Flash File System (EFFS) enables embedded systems developers to add one or
more types of Flash memory storage such as: on-board flash chips, SD Flash Cards, Compact
Flash Cards, Multi-Media Cards, RAM Drives, NAND and NOR Flash arrays. Additional features
include wear-leveling, bad block management and CRC32 checks. The system contains an easy to
use flexible common reentrant API.
The EFFS will enable you to store such things as: application data, images, video, audio or files for
FTP transfers. In one provided example, a memory card from a digital camera can simply be
plugged in to a NetBurner device and the images and video accessed via a web browser.
Debugging
NetBurner provides a number of debugging options:
" The Insight debugger is a full-featured graphical user interface to the GNU Debugger that enables
you to efficiently debug applications for your NetBurner device.
" TaskScan enables you to determine the status of your application tasks through a network
connection in your release code.
" SmartTraps enable you to track down errors in your application by providing detailed processor
information when a trap occurs.
Embedded SNMP
Simple Network Management Protocol (SNMP) is a system for exposing a number of variables to a
Network Management System. These variables are grouped together into SNMP MIB's
(Management Information Bases).
Embedded SSL

Embedded Ethernet
Secure Sockets Layer (SSL) encrypts and secures data for transmission over the Internet or local
network. SSL is an optional software module for the NetBurner development suite. The NetBurner
SSL implementation was written from the ground up to provide high performance and a small
memory footprint of approximately 90K bytes. The SSL module is integrated with the NetBurner
TCP/IP stack and web server, enabling you to add secure web pages to your product with just a
few function calls. Unlike 8-bit and 16-bit microcontrollers, the 32-bit NetBurner processor platforms
can easily handle the demands of connecting and transmitting data using SSL.
* (A)RC4 and RSA encryption and key exchange

* SSL v3
* SSL Client and Server
* SSL key management tools
* Enables secure web based management via HTTPS with the NetBurner web server
* Optimized for an embedded environment
* Exceptional embedded performance on NetBurner 32-bit processor platforms
* Small footprint; approximately 90K bytes of code space
* Blocking and non-blocking I/O
* Public key asymmetric cryptography

PIC - related tools
A collection of a few PIC-related tools

Please, don't ask me for more than what is written in these pages. I quit working on the PIC in 1996 .
Serial PIC programmer.
Schematics and software for a PIC 16C84programmer to be connected to the serial port. Largely based
on the "prog84" software and information gathered on the pic list. Written in C, developed under
FreeBSD, compiles with gcc and should be easily portable to other OS. Full sources and schematics
(chunky graphics) are available.
For DOS users: DOS executable (don't forget the configuration file).
PIC assembler.
Sources for the PIC assembler developed by Timo Rossi. Minor differences in the syntax from the
Microchip Assembler, but full source code available, and it can be used on Unix systems.
A simulator for the PIC16C84
C++ source for a PIC16C84 simulator, developed as a student project by Tommaso Cucinotta and
Alessandro Evangelista. Command line interface, very powerful trace facilities. Compiles with g++/
djgpp.
A reference sheet for the PIC16C84
A reference sheet for the PIC16C84 containing HW and SW data (courtesy of Giuseppe Di Termine).
Some PIC projects

50 MHz Frequency meter with a 16C84
http://info.iet.unipi.it/~luigi/pic.html (1 of 2)12/02/2008 17:27:47

PIC - related tools
This is a simple 50 MHz auto-ranging Frequency meter, developed as a course project by Simone
Benvenuti and Andrea Geniola. It uses a single PIC 16C84 and 4 displays to measure frequencies in the
0Hz..50MHz range. Output is shown in exponential format (XXX E) in order to have enough significant
digits. The PIC shuts down when the input is idle for some time, and turns on automatically when a
frequency is applied to the input. Source code and schematics available.
A cable tester based on the PIC
This is a cable tester made of two modules, useful to test network or phone or other cables where the two
ends are far away from each other. Partly developed as a course project by Maurizio Fabbri, Fabio Raso.
Schematics and full source and documentation. The sources should be assembled with Timo Rossi's
picasm.
NOTE: the archive is a gzipped tar file. gzip != zip. If you have trouble to handle it, all files can be
found in the tester directory.
A MIDI pedal keyboard with Program Change Function
Ths project implements a MIDI pedal keyboard with Program Change Function. It can change sounds
and/or effects of your musical devices (keyboard, expander, ...) with the only action of your foot. This
work was done by Maila Fatticcioni and Massimo Grasso
Luigi Rizzo
Dipartimento di Ingegneria dell'Informazione -- Univ. di Pisa
via Diotisalvi 2 -- 56126 PISA
tel. +39-50-568533 Fax +39-50-568522
email: l.rizzo@iet.unipi.it
Some interesting PIC links

Back to my home page
http://info.iet.unipi.it/~luigi/pic.html (2 of 2)12/02/2008 17:27:47

H-Bridge
H-Bridge
This circuit drives small DC motors up to about 100 watts or 5 amps or 40 volts, whichever comes first.
Using bigger parts could make it more powerful. Using a real H-bridge IC makes sense for this size of
motor, but hobbyists love to do it themselves, and I thought it was about time to show a tested H-bridge
motor driver that didn't use exotic parts.
Operation is simple. Motor power is required, 6 to 40 volts DC. There are two logic level compatible
inputs, A and B, and two outputs, A and B. If input A is brought high, output A goes high and output B
goes low. The motor goes in one direction. If input B is driven, the opposite happens and the motor runs in
the opposite direction. If both inputs are low, the motor is not driven and can freely "coast", and the circuit
consumes no power. If both inputs are brought high, the motor is shorted and braking occurs. This is a
special feature not common to most discrete H-bridge designs, drive both inputs in most H-bridges and
they self-destruct. About 0.05 amp is consumed in this state.
Stress-testing the H-bridge with Basic Stamp 2, PWM circuit, motor-dynamo, and 12 volt battery.
To do PWM(pulse width modulation) speed control, you need to provide PWM pulses. PWM is applied to
one input or the other based on direction desired, and the other input is held either high(locked rotor) or
low(float). Depending on the frequency of PWM and the desired reaction of the motor, one or the other
may work better for you. Holding the non-PWM'ed input low generally works best for low frequency
PWM, and holding the non-PWM'ed input high generally works best at high frequencies, but is not
efficient and produces a lot of heat, especially with these Darlingtons, so locked rotor is not recommended
for this circuit.
http://www.bobblick.com/techref/projects/hbridge/hbridge.html (1 of 4)12/02/2008 17:27:56

H-Bridge
Truth table:
input | output
A | B | A | B
---------------
0 0 | float
1 0 | 1 0
0 1 | 0 1
1 1 | 1 1
Performance:
Please reference the accompanying schematic diagram. The circuit uses Darlington power transistors to
reduce cost. Forward losses are typically 1 to 2 volts, and since the current must pass through two
transistors, expect losses to total up to 4 volts at maximum current. The 4 Darlington transistors need to be
heatsunk based on your expected current and duty cycle.
PWM operation over 3 khz will likely lead to high losses and more heat dissipation, due to the simplicity
of the circuit and the construction of Darlington transistors. You might get away with higher frequencies if
you put a 1K resistor emitter-base on each TIP12x transistor. I prefer to go with very low frequencies, 50
to 300Hz.
Not shown in the schematic are the internal pinch-off resistors(5K

and 150 ohms) and the damper diode that are built into all TIP12x
series transistors. If you build your own variation of the circuit with
other parts, include these neccessary parts. To the right is a picture
of the internals of the TIP12x transistors.

H-Bridge
Operation with logic signals greater than the motor supply voltage is allowed and absorbed by R7 and R8.
The circuit is really intended to be operated with CMOS logic levels, logic high being about 4 volts.
If you live in the U.S., expect the TIP120 and TIP125 transistors to cost about $0.50 and the very common
and generic "quad-2" PN2222A to cost about $0.10. An inexpensive source for hobbyist-grade parts like
these is Jameco Electronics. At low duty cycles, currents up to the 8 amp rated peak of the transistors is
allowed, but there is no current limiting in this circuit, so it would be unwise to use this circuit to drive a
motor that consumes more than 5 amps when stalled.
Notes on circuit assembly:

Transistors Q1,2,3 and 4 must be heatsunk. Insulators should be used, or two separate heatsinks isolated
from each other and the rest of the world. Note that Q1 and Q3 are grouped together and share common
collectors and can share a heatsink. The same is true for Q2 and Q4.
Operation over 3khz will lead to higher losses. If it is required to run at higher frequency, additional pinch-
off resistors can be added to Q1,2,3 and 4, supplementing the internal resistors. A good value would be 1k,
and the resistors should be soldered from base to emitter.
To reduce RF emissions, keep the wires between the circuit and the motor short. No freewheel diodes are
required, they are internal to the TIP series Darlington transistors.
Drive the circuit from 5-volt logic. Drive levels higher than 5 volts will tend to heat up R1 and 2. This is
OK for short periods of time.
Power supply voltage is 5 to 40 volts. Output current up to 5 amps is allowed if the power supply voltage is
18 volts or less. Peak current must be kept below 8 amps at all times.
There is no current limiting in this circuit. Reversing a motor at full speed can cause it to draw huge
currents, understand your load to avoid damage. There are higher powered devices in the TIP series of
Darlington transistors, these can be substituted if needed. Look at the TIP140 and TIP145, please note they
are in a bigger package and dont fit the PC board layout.
Files:
hb01sch.gif Schematic in GIF format
hb01sch.pdf Schematic in PDF format
hb01pc.gif PC board foil layout in GIF format. Not to scale.
hb01pc.pdf PC board foil layout in PDF format. Print your transfer with this.
hb01st.gif Parts stuffing diagram in GIF format. Not to scale.
hb01st.pdf Parts stuffing diagram in PDF format.
hb01pl.txt Parts list in plain text format.
Frequently asked questions:

H-Bridge
Q: I want 20 amps. Can I parallel Darlingtons?
A: Yes, but you dont want to. Darlingtons are not efficient. You will have too much heat to deal with.
Q: Can I use MOSFET transistors for more power or efficiency?
A: Yes, but not in this circuit. I suggest using the IR2112 chip to drive MOSFETs. See Digi-Key.
[Home] [Services] [TechRef] [Weekend] [Legal] [Contact]
Copyright 1995-2002 Bob Blick. All Rights Reserved.

Designated trademarks and brands are the property of their respective owners.

Microchip Net resources - Closed
Microchip Net Resources - Closed
Sorry, I did not have enough time to update this site anymore.
I work with Ubicom microcontrollers (100MIPS, compatible with PIC16C5X) now and maintain
Ubicom Net Resources site - more than 100 links now.
Please go the PICLIST.COM with all PIC-related questions. You will also find many Ubicom resources
here.
If you are interested, old Microchip Net Resources page is still here (not updated from 31-Jul-1999),
more than 500000 visitors from 1996...
Alexey Vladimirov
http://www.geocities.com/SiliconValley/Way/5807/12/02/2008 17:27:58
Datenlogger
Self made data-logger V2.5 (second edition) (gehe zur deutschen Version)
An instuction for the construction of the older data-logger is to be found here:

d_logger.htm
(also information for additional sensors available, unfortunately only in german)
(last modification: 04.06.2005)
The new data-logger software is not yet completely finished.

But the hardware design is frozen and will probably not be changed anymore.
The printed circuit board is a bit smaller than the old one (36x22mm).
But unfortunately the new one can measure analog input signals only with 10 bit resolution.
The sensor for barometric altitude and its amplifier are contained on the printed circuit board now.
Since the dissolution of altitude (10 bit) is too rough for the climb rate, an additional circuit is on the board.
An amplifier for current measurements as well as an amplifier for measuring bridges are likewise contained on the board.
Thus only an additional shunt or a measuring bridge (e.g. a differential pressure sensor with pitot tube) needs to be attached.
The measured data can be stored in a EEPROM and / or transferred by telemetry or by cable to a PalmPilot or PC.
The baud rate for the telemetry mode is selectable. 1200 and 9600 baud are available.
The data rate for the transfere of the the stored data to the Palm / PC was increased to 38400 baud.
Version V2.5 are different to version V2.4 in case of the circuit for current measurement. Therefore BEC-systems can used now.
Version V2.9 supports also GPS-receiver with ANTARIS chipset and simultaneously using of internal temperature sensor of MS5534A and
external DS1820 sensor. This version can use 24C256, 24C512 or 24C1024 EEPROMs and has an internal 'bootloader' implemented.
With V2.9g you can configure the datalogger for the 'Multilogging mode' (more than one loggs possible after switch off).
V2.9h supports DS18S20 temperature sensors, 2-wire connection for the temp sensor (connect pin1 and 3 of the sensor) and better start
condition for GPS using.
http://home.arcor.de/d_meissner/d_logg2_engl.htm (1 of 7)12/02/2008 17:28:01

Datenlogger

Datenlogger
part place V2.5c:

layout V2.5c:
schematic V2.5c: lay_bot_place2_5c.gif partlist V2.5:
lay_bot2_5c.gif
schema2_5c.gif lay_top_place2_5c.gif parts2_5.txt
lay_top2_5c.gif
lay_jump2_5c.gif
following the old data:
schematic V2.4: layout V2.4: partlist V2.4:

schaltu1.gif log2_lay.zip parts.txt
Additional sensors:

Datenlogger
Layout for LTC2400: Layout for ADXL202: Layout for TIM:

LTC2400_1_1.zip ADXL202_1_2.zip TIM_1_1.zip
Following a modified circuit for the current measurement:

Datenlogger
Digital pressure sensor:

Instead of the analog pressure sensor MPX4100 you can now connect a combined pressure and temperature sensor MS5534A.
The connectors which are normaly used by the additional LTC2400 and the connector for the analog variometer signal are used then.
The benefit of this sensor is the larger range (300...1100mbar) and the calibration.
Attention: To use this sensor the reference voltage must adjust to 3.3 ... 3.6V (R1, R2).
Besides the sensor must be registered to the logger (use the "Loggerleserprogram" for this reason).
Manchester-2 to RS232 Decoder

This decoder is necessary if the bi-phase-code (Manchester-2-code) is used by the telemetry. This feature is configurable by the
"Logerleserprogram".
The decoder is installed after the telemetry receiver and transform the Man-2-code to the normally used RS232-code for the PC or Palm.
The adjustable resistor adjust the threshold for the used data.The led show if the treshold is exeeded.
If RSSI is not available on the receiver then pin6 of the PIC12F629 must be connected to pin1.

Datenlogger
Layout for Telemetry-Decoder
Following the software for the PIC12F629(675) for 4800baud: Man2_RS4800.zip
The software is in the development phase and can measure only the following signals at the moment.
5 analog channels (4x 10 bit, 1x 8 bit)

1 period duration input, for number of revolutions, speed etc. (16bit, pin 21)
1 frequency input for speed etc. (16bit, pin 6)
1 temperature input (8Bit, DS1820, Pin11)
3 RC channel inputs (additional 1 RC channel for switching the logger ON and OFF, RC0)
In place of the RC channels, the digital outputs of a ADXL202 (acceleration-sensor) can be used.
GPS (longitude, latitude and altitude), 38400 baud NMEA interface used
Simple vario tone output (pin 13)
Additionally it's possible to use a 24 bit analog digital converter (LTC-2400) for more accuracy.
Telemetry data can be transmitted by using Manchester-2-code or RS232 format.
Version V2.9 has an internal 'Bootloader' for easier software updates via the RS232-connection (without PIC-burner). (For upgrades
connect pin 5 and pin1 of the EEPROM with a 220ohm-resistor and switch the logger on).
Automatically recognize of the used EEPROM 24C256 / 24C512 / 24C1024.
With version V2.9g you can use the datalogger for more than one flight also after switch of the power of the datalogger.
The current software can be downloaded here:
1. Software version V2.9 for the PIC-controller (inclusive bootloader): log29_pic.zip (for 32k /64k and 128kByte EEPROM)
Remark: Install this version always first. Following versions will be loadable then via the internal bootloader of this version.
2. Betaversion V2.9h for the PIC-controller: log29h_alti_pic.zip (for 32k /64k and 128kByte EEPROM)
3. Software for the PalmPilot: logger_2g_Palm.zip ( for V2.9g and higher versions, limited to 32k data)
4. Brief description for the old Palm program (english): log_e.pdf
5. Telemertry software for the PC: telePC02.zip (Coefficients can be changed by 'SkyPlot')
6. An Exel example sheet: log2_exel.zip
7. The Windows software for the transmission of the dates to a computer as well as the program for showing of the GPS-data please
download by http://www.sprut.de :
(LoggerLeser: http://www.sprut.de/electronic/soft/logger.htm)
(SkyPlot: http://www.sprut.de/electronic/soft/skyplot.htm)

Datenlogger
Perhaps you can buy a finished datalogger in a lightly changed layout by Walter Windhagauer.
Questions, suggestions on the layout on: Jonas Romblad

Questions, suggestions on the design & software on: Dietrich Meissner
Datalogger-Forum: http://groups.yahoo.com/group/RC_datalogger/
main page aircrafts airfield airfield rules software for calculation of centre of gravity measurement of speed links

CAMPAC clones for Futaba R/C transmitters
Futaba CAMPAC Clones

ClonePac memory modules for Futaba R/C transmitters (FC-18, FC-28)
Overview
Manufacturing your own CAMPAC clones
Overview [Toc] [Top]
Some of the Futaba R/C transmitters have a dedicated slot to insert optional CAMPAC memory modules. These memory modules are
available in various capacities, for instance 4 kB, 16 kB, and 64 kB, and enable the storage of all configuration settings of multiple R/C
models. A commercial 16 kB Futaba CAMPAC module costs (or used to cost) about 90 US-$ and allows storage for another 11 models
within the Futaba FC-18V3 plus R/C transmitter.
This CAMPAC clone features 1 bank of 16 kB storage (i.e. accessible without manual bank-switching through DIP-switch).
Futaba FC-18 V3 plus

with CAMPAC slot at top center
It can't be that complex and can't incorporate such expensive electronic parts to justify that dealer price.
So let's build our own parts...
Manufacturing your own CAMPAC clones [Toc] [Top]
My CAMPAC clones are based on the work of Jim White, Dave Rigotti, Dave Tatosian, and Rob Crockett. The ClonePac website is
http://www.electronic-engineering.ch/radiocontrol/circuits/clonepac/clonepac.html (1 of 3)12/02/2008 17:28:04

currently located at http://www.geocities.com/CapeCanaveral/Hangar/1071/clonepac.htm, but this URL may of course change...
I provide here a local HTML snapshot of Rob Crockett's initial webpage, or a PDF document for print-out.
If you want more than 16 kB of storage, e.g. for your FC-28, you may consider to order Model-Gadget's Ultra-PAC-II featuring storage
of 64 kB (1 bank), 256 kB (4 banks), or 512 kB (8 banks). In my opinion, the Ultra-PAC-II is a very nice solution which provides quite a
reasonable price-performance ratio regarding engineering- and manufacturing-costs. One Ultra-PAC item costs between 32 US-$ and
90 US-$.
My home-brew ClonePacs Metric connector

using Microchip 24LC16 IC EEPROMs (16 kB) which has not the usual 1/10 inch pin distance
16 kB ClonePac in service
in my Futaba FC-18 V3 plus R/C transmitter

[Toc] [Top]

click here

Spartan RC
Products | Support | Where to buy | Videos | Heli team | Company
Avionics
ds760 ds650 INS-1 AP-2000i

The ultimate tail gyro for The 3D Sporting gyro that Speciality gyro for camera Advanced Flight Stabiliser
heart pounding 3D performs like no other mount stabilisation and CCPM mixer
Coming soon. Coming soon.
VoltGuard G3 LipoGuard G4
Digital battery monitor The brightest ever
with memory LiPo battery monitor
Ground equipment
UltraPAC-II Flash-Link Configurator card Blue-Link

Virtually endless memory for USB connectivity Gain access to advanced Wireless connectivity to
your Futaba radio configuration parameters your PDA, mobile* or PC
Coming soon. Coming soon.
Non boxed prototype pictured. * certain models only
Projects, Technology, Dicontinued products
http://www.spartan-rc.com/ (1 of 2)12/02/2008 17:28:10

Spartan RC
Have you seen our skywriting

demo at 3D Masters 2005? Spartan RC has now ended
Spartan RC has now ended production of the VisionLock
Do you want to find out how
production of the 2XA which will soon be replaced
it works?
Carbon. The design is now by our dedicated INS-1
available under licence which camera mount gyro. The old
is free for personal use. VisionLock page and user
Further details will be guide can be accessed by
published soon. clicking here.
Products | Support | Where to buy | Videos | Heli team | Company
2004-2008 Embedded Logic Ltd. - All Rights Reserved Home | Contact Us
http://www.spartan-rc.com/ (2 of 2)12/02/2008 17:28:10

http://www.auav.net/
Welcome to
Home Page
Autonomous Unmanned Air Vehicles
Palmetto Florida U.S.A
redundant,radio,control,systems, redundant radio control systems, jet powered uav,jet powered

uav's, UAV UAV's RPV RPV's ROV ROV's IMU Unmanned Aerial Vehicles remotely piloted Aircraft
pilotless ground serface autopilot ***** ATTENTION
autopilot's *****spectrum data links downlinks
GPS Digital spread
video camera reconnaissance missions ground control stations systems intelligence,
The photos and videos on this site are large and may take
surveillance, targeting airframe low cost smart Robot Aircraft, RPV, MALE, HALE, OPV, Target
some
Drone, MAV,time
UCARto down
fixed load.
wing Micro AirThis
Vehiclewas done
AirVehicle to deliver
receiver the best
auvsi underwater transmitter
receiver Maxstream Microhard servo Radio Modem
resolution possible.
Is Spread Spectrum Radio Control NEW?

Click here and read how AUAV develop the worlds first
production Digital Spread Spectrum Radio Control system
Years Before Horizon Hobby, Futaba or Xtreme power systems
http://www.auav.net/ (1 of 4)12/02/2008 17:28:59

Click Here for the EZI-NAV Frequency Redundant Digital

Article by Bob Young Spread Spectrum R/C Control-Link
A.U.A.V. has been instrumental in the development of small to medium size UAV's,
Autopilots, Autonomous flight control systems, Digital spread spectrum RC control
systems, telemetry and data down link systems. A.U.A.V. has created a series of
autonomous aircraft to fit the needs of universities and the research industry. The
systems that A.U.A.V. has developed are low cost and very reliable due to the "keep it
simple" process. A complete turnkey UAV system from A.U.A.V. allows the program
manager to concentrate more on the payload and experiments rather then spending
their valuable time designing the airframe and flight control system. A.U.A.V. would
be delighted to work closely with you to meet the specific requirements of your
mission.
Please Click Here For The New Flamingo Page

AUAV'S FLAMINGOS # 06 AUAV'S FLAMINGOS # 06
AUAV'S FLAMINGOS # 06 AUAV'S FLAMINGOS # 06
Dave brought Flamingo # 06 back from Australia with him in October 2007.

Please Click Here For The New Flamingo Page
Australian & New Zealand Customers Please Click Here

1 2 3 4
D MPXS4100 A Filter Stage ADC12130 & PIC16F84 MAX232 D

Sensor.sch Filter1.sch Digital.sch PIC TXD RS232.sch
Vsens IN0 CH0 CH0 PIC TXD PIC TXD

CH1 PIC RXD PIC RXD
VA_1 VA_1 VA_2 VA_2
A_GND A_GND A_GND A_GND
LCD RS
VDD VDD LCD RS VDD VDD
LCD R/W
VSS VSS LCD R/W VSS VSS
LCD E
LCD E
VREF+ VREF+
LCD D4
VREF- VREF- LCD D4
LCD D5
VA_1 VA_1 LCD D5
Filter Stage LCD D6
C A_GND A_GND LCD D6 C
Filter2.sch LCD D7
LCD D7
CON1_1
IN1 CH1
1
A_GND 2
VA_2 VA_2
VA_1 3
A_GND A_GND
CON03
Wireless transmitter:
Circuit Design CDP-01
simplex, up to 7.5 kbits/s
PowerSupply LCD.sch
434.075 MHz
B PowerSupply.sch B
LCD RS
LCD RS
LCD R/W
VBAT VBAT LCD R/W
LCD E CON2_1
LCD E
PIC TXD 1
VDD VDD
LCD D4 VSS 2
VSS VSS LCD D4
LCD D5 VBAT 3
LCD D5
LCD D6 CON03
VREF+ VREF+ LCD D6
LCD D7
VREF- VREF- LCD D7
VA_1 VA_1
VA_2 VA_2 VDD VDD
A_GND A_GND VSS VSS Title
Top Level of Precision Digital Altimeter
A A
Written by Date
23-Apr-2001
Peter Luethi
Revision Page
1 2 3 4
1 2 3 4
D D
Motorola Absolute Pressure Sensor MPXS 4100A

Connect additional capacitors, if directly mounted on PCB.
This microcontroller application features a separate removable
pressure sensor module equiped with two ceramic (10n, 100n)
and one tantalum (10u) capacitors.
C C
VA_1
SENS1_2
1 8
C C C 2 7
Vsens
10u 100n 10n 3 6
4 5
MPXS4100A
A_GND
B B
Title
VA_1 VA_1
Pressure Sensor MPXS 4100 A
A A_GND A_GND A
Written by Date
23-Apr-2001
Peter Luethi
Revision Page
1 2 3 4
u-blox: GPS / Galileo Products -> Legacy Products -> Legacy ProductsANTARIS Products
Search
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ANTARIS GPS Receiver Products
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End of Life Notice for ANTARIS GPS Products
GPS / Galileo Products
u-blox 5 Products Since December 15, 2006, all ANTARIS GPS products have been phased out. The newer u-blox 5 and
ANTARIS 4 products (e.g. LEA-5H, TIM-4P, RCB-4H, etc.) are not affected by this phase-out.
ANTARIS 4 Products
GPS Antennas Read the End of Life Notice for details.
Product Catalogue
Legacy Products Dead
ANTARIS Products Low Cost Programmable SuperSense
Reckoning
LEA-LA
TIM-LA Chipsets ATR ATR Please contact Please contact
TIM-LC ANTARIS Chipset ANTARIS Chipset u-blox u-blox
TIM-LF without Flash with Flash
EPROM EPROM
TIM-LH
TIM-LL
TIM-LP GPS Modules With LEA-LA
TIM-LR 17 x 22 mm LNA
SBR-LS
RCB-LJ
ANTARIS EvalKit
SuperSense EvalKit GPS Modules With TIM-LA TIM-LL TIM-LH TIM-LR
25 x 25 mm LNA TIM-LP
ANTARIS SBEKit
GPS Receiver Boards
W/out TIM-LC TIM-LF
GPS Smart Antennas LNA
SiRFstar Products
GPS Technology GPS Receiver Boards RCB-LJ SBR-LS
A-GPS Services
Support, Tools and Help
Investor Relations
GPS Smart Antennas SAM-LS
Media Relations, News
Buy Samples
http://www.u-blox.com/products/ (1 of 2)12/02/2008 17:29:03

u-blox: GPS / Galileo Products -> Legacy Products -> Legacy ProductsANTARIS Products
GPS Accessories ANN-MS
/products/index.html
last modified: 09.07.2007
Important legal information - please read the

disclaimer before proceeding.
u-blox ag, 1997-2006
http://www.u-blox.com/products/ (2 of 2)12/02/2008 17:29:03

Larrys GPS connector/plug for Garmin eTrex, geko, 60cs.
Larry's pPlug. for a Garmin GPS -- The [eMail

first ShareHardware project!
larry]
Dansk Deutsch Espaol franais Italiano Nederlands Polski Portugus
To: HOME, Pfranc-list, How-to-assemble-our-plug-and-make-cables, Where-to-buy-Garmin-cables,
Links-to-other-places, OEM, Exit slot sizes,
Checkout our new USB A/mini-B cable for the newest Garmin's here.
Need more than two plugs? Click here for OEM pricing.
1. Click here if you want plugs for: eMap, etrex, and geko , work with our "E" type plugs:
and our newer "flat one"

--- CLICK on the plugs above if you have a eTrex or geko.
2. If you want plugs for the RINO click here: rPlug - for the Garmin RINO.
NOTE: This new plug is much smaller with a diameter about the size of a pencil (7mm) than
our normal round plug (see below).
3. And plugs for other Garmin models, 1/2 inch round plug with 4 or 5 pins: Please
read the rest of this page to learn about our pPlug : for a pledge.
We have made: 556880 plugs! Current average 110/day down from 197/day in 2005. - Who-da-thunk?
http://pfranc.com/projects/g45contr/g45_idx.htm (1 of 3)12/02/2008 17:29:07

Garmin's connector is molded onto a cable. You are at the right place if you want to
A "U-install" connector did not exist until build a cable for a Garmin GPS -- read on.
I made a mold in 1996. It was a crazy thing If however you want to buy a ready-made
to do because I needed just a few, but now cable - see Where-to-buy-cables. If
with Pfrancs worldwide to help, you can still neither, then go to-another-place.
get one or two.
We'll send you THIS!

Here's my thumbnail photo of our plug (the
first P in pPlug is silent like in pFun and Pfranc)
which fits the Garmin 12, 12xl, 38, 40, 45,
48, 60C, 60CS, 72, 76, 89, 90, 92, 96,
176, 196, 295, GPS II, II+, III, III+, V
and Street Pilots (not the 2610) With lots
of help, I made a mold and ran it here in our
small shop next to a river in the woods of
Oregon. Then we built a global distribution
Pfranc (pronounced Frank) network to get them
from our molding machine to you fast and easy.
Not all Pfrancs have PURPLE Pplugs so you may get black, and they won't look like the photo
above because after making 35,000 parts the mold wore out, so I spent all the pledge money,
and them some, to hire a world class professional mold maker to make us a new mold. We
include 4 gold socket pins and the screw. We ship them to our Pfrancs around the world so
you can get one or two fast and easy.
If you do This:
1) Make a pledge (a promise to send money (or things) if you are happy with our
service) and e-mail it to a Pfranc in your state/country. Click here to find-your-Pfranc.
The pledge amount includes shipping to your door, often in one or two days!

2) After it arrives, decide how satisfied you are with our service, then honor your
pledge to your Pfranc. You can send more if you are more (or less if less) happy than
you thought you'd be. You can honor your pledge with any amount at anytime during
your lifetime but don't wait too long because you could forget and someday find
yourself feeling bad and not know why. The current record is 3 years to honor a pledge.
(Update: 2006; We have a new record: 7 years, a pledge from 1999, how cool is that?
Does this mean we should make some new thing for a pledge? --- tell us what would be
cool. )
3) Go here to see how to assemble our connector and make a cable.
. . . . Thanks!
More about all This?

This is the first Purple Open Project (POP), and people tell me, the first ShareHardware
project ever! So how can we make such a big deal over a little plastic part? Why do people
choose a Garmin GPS because of us? Why do people love what we're doing? So much so that
they send us money and say things like: "You restored my faith ..."? Wow! This simple idea and
little plastic part can do all that? The answer is: (revised 4/03) Yes! But it's not because or
about us, it's because and about you! When you honor a pledge - it happens. All we do is make
stuff, learn stuff, and tell people what we learn.
POP #1 Current shipping status, letters from customers, complete project history. My GPS
plug story how/why/when did all this happen?
Pfranc.com home page.
(Notice: Garmin, nvi, eMap, geko, and eTrex areTrademarks of Garmin Corporation, and there may be references to other trademarks
of others - which we respect!, And so should all of us! ... Oh and BTW we've been promoting and working our trademark name: Purple
Computing, everyday for 24 years - around the world - and so I think all you other "computing" companies calling yourself Purple-this
and Purple-that ought to pick another color! Except it's OK for IBM to use "Purple Computer" because it's a ASCI massively parallel
supercomputer which is cool and they are cool and would be the first to stand up and defend my IP rights, and besides I've owned IBM
stock since 1994! )
[eMail larry]

Garmin Protocol Information and Data Transfer Programs
The Garmin Home Page has software upgrades for some Garmin receivers (be SURE you get the right
one for your receiver!!), as well as a FAQ, manuals for many products, and other information.
Purple Computing (Larry Berg) has power and data connectors for Garmin 45 and similar receivers
(38,40, II, 12xl...). He also shows a cable wiring diagram.
Ready made cables using Larry's connectors are available from Dave Sorenson
The Official Garmin Protocol Specification is available from http://www.garmin.com/support/protocol.

html (currently Rev. 3, Dec. 1999)
Garmin Protocol Description by John Waers (html format, 11388 bytes)
Mats Rosengren has provided yet another Garmin protocol description.
Garmin.txt (27268 bytes) is another description of the Garmin protocol, by William Soley, Eric Werme,
Anton Helm and Daniel Zuppinger. (last update March 6, 1998)
Tom Born's Garmin GPS Pages
FlyingD's GPS FLIGHT TRACK ANALYZER is a Freeware DOS program (small, very fast and works
on anything) that will analyze Garmin GPS-90 track files and will profile your flight returning the
following data and more: take-off time, landing time, total time, total flight time, total distance, flight
distance, average groundtrack, direct route distance, efficiency of the flown route, average groundspeed,
taxi & take-off run at departure, landing run and taxi at arrival.
Gardown11 (57,568 bytes, rev. Sept./97) transfers waypoint, route, and track data between a Garmin
GPS to a PC, and can log NMEA-0183 data. (MS-DOS) The latest version is available from the
GarDown home page By Mike Montgomery (mike@anali.demon.co.uk) Older versions are also
available: gardown8.zip, gardown9.zip
GarTrack is a Windows95 program for performance analysis for regatta sailors using data from a
Garmin GPS. Note: July 2007 - the author of this program has discontinued support for it, and has
asked me to remove the link to his site (and will be removing his site from the internet).
http://vancouver-webpages.com/peter/idx_garmin.html (1 of 4)12/02/2008 17:29:10

GPSdb is a waypoint database program for use with Garmin receivers. It requires Win95 or WinNT.
The program will upload and download waypoints, tracks, and routes. It will import from GarDown
files. Waypoints can be created in this program and uploaded to the GPS. Routes can be created by "drag
and drop". It also exports waypoints and tracks in Street Atlas format. Includes various map datums.
More info and downloads at http://blkbox.com/~hub/gpsdb. From Tim Hubbard (hub@blkbox.com)
GARNIX is an MS-DOS program to up/download waypoints, routes, etc. from a Garmin GPS . The
package includes a program to convert between Lat/Long, UTM and other grids, and to convert datums.
GPS Utility is a freeware/shareware program for users of Garmin or Magellan GPS receivers. As well as
upload/download, it provides facilities for mapping, sorting waypoints, filtering and selecting GPS data,
digitising from scanned maps, track analysis and other advanced tools (for example, generating
waypoints/routes from tracks). A variety of grids and coordinate formats are supported together with the
import/export of many different file types. The program exists in both 16-bit and 32-bit versions and
includes an extensive help system. For more information see http://www.gpsu.co.uk/
Thomas Ott Thomas Ott has a program called GPS2PILOT2PC . This program allows the USR/3Com
PalmPilot to track transfer data to/from a Garmin GPS. The program can also make the Pilot look like a
Garmin GPS to a PC, so the usual Garmin protocol programs can be used to transfer the track data
between the Pilot and a PC (or Mac, I suppose...)
GARtrip is a Win3.1/Win95 shareware program for users of a Garmin GPS receiver by Heinrich
Pfeifer.
Main Features:
Uses scanned maps (Win 95/98/NT only)

Transfers data from/to the receiver using GRMN protocol.
Keeps waypoints clearly arranged.
Supplies waypoint symbols
Converts coordinates from/to: Longitude/latitude, UTM, German grid, Swiss grid, British grid
(OSGB), French grid (Lambert II), Swedish Grid, Irish Grid, New Zealand Grid, user defined
grids all with proper geodetic datum.
Shows and accepts great circle distances between waypoints.
Prints waypoints and tracks on a white map ***true to scale***.
Advanced route planning with speed and time
Routes with avionics database (avionics GPS only)
Units are Metric, Stature, or Nautical
With on-line context sensitive help.
Saves 30 waypoints and track without registration.
File import/export: Waypoint+, OziExplorer, PCX5, Gardown, Fugawi, Atlas GIS, Garlink, and
general purpose text format.

The program is available from http://www.gartrip.de
Garmin_GPS_xla_01c.zip (15,492 bytes) contains the source code for an Excell Add-in (VB for Apps)
which converts GarDown7 track data to a *.dbf file, and converts the Lat/Long to the Swedish National
grid.
Garmin32.zip (for Win95, 211K, July 28/97) is another program to up/download waypoints, tracks, etc.
between a Garmin GPS and a PC. By Klaus Voigt (kpv@pcpostal.com)
Waypoint+ is a Windows95 program to transfer waypoints, routes and tracks between Garmin receivers
and a PC. It will write the data as a text file, or in formats compatible with DeLorme Street Atlas 3.0 or
4.0, or Map Expert 2.0. By B. Hildebrand (bhildebrand@worldnet.att.net) See the Waypoint+ home
page for further information and to download the program
MacGPS45.zip (59797 bytes) contains the source code and design notes (including a description of the
Garmin protocol) for John Waers' (jfwaers@csn.net) MacGPS-45 Macintosh program, which transfers
waypoints, routes, etc. between a Garmin GPS and a Mac. This file has been converted to a DOS archive
(and a MacWrite document converted to WordPerfect), but the program has not been ported to DOS.
The original Mac format source archive and program are available from ftp.csn.net/Unimac. Please note
that both these files contain the source for an early, somewhat buggy version of MacGPS. The
commercial version of this program is available from http://www.macgpspro.com/GPSPRO.html
GPS Manager (GPSMan) is a graphical manager of Garmin GPS data and lets you prepare, inspect and
change GPS data on a friendly environment. Note that GPSMan was thought of for use at home and not
for real-time use. GPSMan is a stand-alone Tcl/Tk program that implements part of the Garmin GPS
Interface Specification. This program was apparently developed under Linux. The author's site gives a
source for a Windows version of Tcl/TK which will allow it to be used under Windows.
GPSTrans is a Linux program based on MacGPS. It will upload/download waypoints, tracks, routes,
and almanac from a Garmin GPS. Written by Carsten Tschach (tschach@zedat.fu-berlin.de). This file
contains "tarred and zipped" C source. Another version, with some additions or corrections is gpstrans-
0.31b-js1.tar.gz (84,415 bytes), by Janne Sinkkonen (janne@avocado.pc.helsinki.fi) (I'm told the -js1
version is for Linux, the other is for Sun/HP)
gd2: This C language program (inspired by GarDown) is designed to download tracks, routes,
waypoints, position, clock, and almanac and to upload routes and waypoints from/to Garmin 12xl,
Garmin 38 and Garmin 45. The package includes man page, makefile, and notes. It works well on Linux
and FreeBSD, and needs help for SunOS. Available as a .shar file: gd2.shar (70662 bytes) or gzipped
tar: gd2.tgz (18415 bytes) Oct. 21, 1997. By Randolph Bentson (bentson@greig.seaslug.org)

gsa14.zip (53,423 bytes, Jan 22/97) contains some programs by Lance Rose (lancer@netrix.net) to
exchange waypoint data between a Garmin 45 (and probably most other models) and a DeLorme Street
Atlas 3.0 map file (.SA3) using the Garmin protocol. They let you create waypoints with the map
program and upload them to the GPS, or download the waypoint database from the GPS to a specified
map file for later manipulation.
G7To and G7ToWin convert GarDown7 download files to Street Atlas 3 format, or vice versa, and
converts either format to formats compatible with PROJ.EXE, NAD2NAD.EXE, or UTMS.EXE. This
version can also communicate directly with a Garmin or Lowrance receiver.
capg7100.zip (31045 bytes) includes a program to capture NMEA-0183 data at user-defined intervals,
and some batch files that semi-automate the conversion between the files captured with this program and
SA3 files. Can be used in conjunction with g7to and gardown7. (by Richard Hess rlh@interramp.com)
gmn_dxf2.zip (46093 bytes) converts the data downloaded by gardown into a .dxf file for import into
AutoCad or other drawing programs that read this format. (from DNelson@lanl.gov)
psigar20.zip (25925 bytes) is a shareware program to transfer waypoints, routes, track logs, etc. between
a Garmin 45 (not tested with other models) and a Psion series 3A
GarMap.zip (10878 bytes) provides an interface between Mapinfo Desktop Mapping Software and a
Garmin GPS receiver, using the proprietary Garmin/Garmin protocol. (from mholdern@sctyhq1.telecom.
com.au)
Garmin Data Monitor (229905 bytes) uses the Garmin protocol to display information not available via
NMEA-0183, such as satellite status, more precise position to display SA "wandering", etc.
wayuk11.zip HPx00LX palmtop databases of waypoints and segmented road track logs fo rthe UK. The
databases have been set up to allow their partial upload to a Garmin GPS45 with the G7TO203 program
so you can get a relatively detailed moving map display on your GPS without exceeding its memory
capacity. By John Seymour (john@blackbirds.demon.co.uk)
[home] [FAQS] [GPS info] [Links] [NMEA Info] [Wiring] [NMEA Progs] [Mapping Progs] [Street
Atlas] [Eagle] [Magellan] [Micrologic] [Navigation] [Scoring]

Assembler Source
;***************************************************************************
;
; Precision Digital Altimeter Transmitter with NSC ADC12130
; =========================================================
;
; written by Peter Luethi, 25.12.1999, Switzerland
; last update : 23.4.2001
;
;
;
;
; SPECIFICATIONS
; ==============
; Required Hardware: NSC A/D Converter ADC12130
; Motorola MPXS4100 A
; Quad Op-Amp LM324
; - for remote use: Wireless Transmitter 9600 bps
; - for use with PC: RS232 level shifter (MAX232)
; Serial Output: 9600 baud, 8 Bit, No Parity, 1 Stopbit
;
;
; DESCRIPTION
; ===========
; This program has been designed for the Precision Digital Altimeter
; transmitter based on the PIC 16F84, the NSC ADC12130 12 bit A/D
; converter and the Motorola MPXS4100 A absolute pressure sensor.
; For further processing and visualization of the acquired data,
; there is another PIC with LCD display or a personal computer
; necessary. The serial output data of this transmitter has common
; RS232 format, so you can either use it directly connected to a
; personal computer or in conjunction with a wireless interface.
; If used with a personal computer, make sure there is a RS232
; level shifter (MAX232) between the PIC and the computer.
;
; The whole transmitter consists of 4 sections:
;
;
; 1. Data Aquisition & Analog Pre-Processing
http://www.trash.net/~luethi/microchip/projects/alti/alti_tx.html (1 of 14)12/02/2008 17:29:12

Assembler Source
; ==========================================
; The MPXS4100 A absolute pressure sensor is connected to A/D
; input channel 0. Two fourth order Butterworth active low pass
; filters (fc = 10 Hz) are implemented in front of the A/D channels
; 0 and 1 - realized with a quad Op-Amp - to minimize noise and to
; prevent aliasing.
;
; 2. A/D Conversion
; =================
; To convert the analog to digital data with adequate resolution,
; the NSC ADC12130 12 bit A/D converter has been used here.
; The communication between the A/D converter and the PIC is done with
; a software based SSP (Synchronous Serial Port) interface.
; Output format: Sign bit, MSB <12 bit data> LSB, X X X
;
; 3. Digital Data Processing
; ==========================
; After analog filtering and A/D conversion, the data has still some
; noise, what results in slightly toggling values.
; If we want to get rid of that, we have to implement a math routine,
; which calculates the actual value out of the actual sample and the
; previous ones.
; In this program it has been realized with a four stage ring buffer,
; which stores four 16 bit values (12 valid bits). Each of these values
; is the average calculated from 16 previously acquired 12 bit A/D
; samples. The current output value results from the average of this
; ring buffer. So one output value will be calculated every 16 A/D
; samples, with a history of 48 (=64-16) samples. The last acquired
; value has only a weight of a quarter.
; The NSC ADC12130 provides 2 input channels (CH0, CH1). I have used
; the same digital signal processing methods for both of them.
;
; 4. Data Transmission
; ====================
; The calculated output value is handled over to an RS232 routine.
; It is then transmitted serially to either a MAX232 or a wireless
; transmitter.
; Here, the m_rs096.asm module has been used to provide compatibility
; to wireless transmitters. Most of them support only up to 9600 bps.
; If you want to use this routine with a higher transmission rate (e.g.
; with a PC interface), you can only change the included m_rs098.asm
; to another one.
;
;
; IMPLEMENTATION
; ==============
; The following features are implemented in the PIC 16F84:
; - Setup of SSP communication and control lines to A/D converter
; - Auto Calibration and Mode Configuration of A/D converter
; - Readout of A/D values

Assembler Source
; - Digital Data Processing (as described above)

; - RS232 transmission @ 9600 baud
; - (No RS232 reception needed, only implemented to show complete
; RS232 interface for tests or further enhancements.)
;
;
;***************************************************************************
PROCESSOR 16F84
#include "p16F84.inc"


goto MAIN
ORG 0x04 ; interrupt vector location

goto ISR ; Interrupt Service Routine
#define CS PORTA,0 ; chip select, active low

#define CONV PORTA,1 ; do conversion, active low
#define DO PORTA,2 ; PIC serial data output
#define SCK PORTA,3 ; serial clock, idle state low
#define DI PORTA,4 ; PIC serial data input
#define TXport PORTB,1 ; RS232 output port, could be

#define TXtris TRISB,1 ; any active push/pull port
; RS232 input port is RB0, because of its own interrupt flag.

; The RS232 data capture in the ISR has no functional purpose
; in this project, implemented only for test use.
CONSTANT BASE = 0x0C ; Base address of user file registers
;*** CONFIGURATION COMMANDS of NSC ADC12130 ***

CONSTANT AutoCal = b'00100000'
CONSTANT AutoZero = b'00100100'

Assembler Source
CONSTANT PowerUp = b'00101000'

CONSTANT PowerDown = b'00101100'
CONSTANT StatusRead = b'00110000'
CONSTANT Unsigned = b'00110100'
CONSTANT Signed = b'10110100'
CONSTANT AT6 = b'00111000'
CONSTANT DummyCmd = b'00000000'
;*** CH0 : channel 0, se : single-ended, format, first bit ***

CONSTANT CH0se12MSB = b'10000000'
CONSTANT CH0se12LSB = b'10010000'

;*** Ring Buffer ***

CONSTANT BufferBASE = BASE+d'20' ; start address of ring buffer
CONSTANT BufferLENGTH = d'8' ; number of buffer registers,
; what means four 16 bit buffer
; samples
; universal temporary register

; (TEMP1 used by m_wait, TEMP1 and TEMP2 by m_rsxxx)
TEMP1 set BASE+d'0'
TEMP2 set BASE+d'1'
; general
HI equ BASE+d'2' ; high nibble of data
LO equ BASE+d'3' ; low nibble of data
CH0_HI equ BASE+d'4'
CH0_LO equ BASE+d'5'
; A/D converter
AD_cnt equ BASE+d'8' ; counter
SSPSR equ BASE+d'9' ; SSP Shift Register
; average routine
sum_cnt equ BASE+d'10' ; counter

Assembler Source
sum_LO equ BASE+d'11' ; summation registers

sum_HI equ BASE+d'12'
; ring buffer
RB_pnt equ BASE+d'13' ; pointer, BufferBASE offset
; RS232
TXD equ BASE+d'14' ; used for transmission
RXD equ BASE+d'15' ; received value
; interrupt context save/restore

; ATTENTION: check beginning of ring buffer (Constant Declaration) !!!
#include "../m_bank.asm"
#include "../m_wait.asm"
#include "../m_rs096.asm"
;***** MACROS *****
ADinit macro
BANK1
movlw b'11110000' ; set A/D control lines I/O direction
movwf TRISA
BANK0
movlw b'00000011' ; set A/D control lines :
movwf PORTA ; disable chip select & conversion,
endm ; SCK low
ADenable macro
movlw b'11111100' ; select chip & enable conversion
andwf PORTA,1
endm
ADdisable macro
movlw b'00000011' ; deselect chip & disable conversion
iorwf PORTA,1
endm
ADcmd macro ADcommand

movlw ADcommand

Assembler Source
call AD_cmd
endm
RBinit macro
call RB_init
endm
;*** A/D Converter ***

AD_cmd movwf SSPSR ; call with command in w
movlw d'8'
movwf AD_cnt
ad_loop
;*** TRANSMISSION : MSB out on pin DO ***
btfss SSPSR,7 ; check MSB, skip if set
bcf DO
btfsc SSPSR,7 ; check MSB, skip if cleared
bsf DO
; btfss/btfsc used due to illegal consecutive write cycles
; on output pins and to prevent unnecessary spikes:
; only one write cycle is performed
;*** rotate SSPSR left, because bit 7 clocked out ***

rlf SSPSR,1
nop ; settle time for transmission
;*** RECEPTION on rising edge of serial clock ***

bsf SCK ; clock high
nop ; settle time for clock high
bcf SSPSR,0 ; fetch data applied on DI
btfsc DI
bsf SSPSR,0
;*** TRANSMISSION on falling edge of serial clock ***

bcf SCK ; clock low
decfsz AD_cnt,1
goto ad_loop
RETURN

RB_main movfw RB_pnt ; get saved pointer
movwf FSR ; put to FSR
movfw sum_LO ; get low nibble of sample
movwf INDF ; put to register pointing at
incf FSR,f ; increment pointer
movfw sum_HI ; get high nibble of sample

Assembler Source

movfw FSR ; load pointer to w
movwf RB_pnt ; save pointer
sublw (BufferBASE + BufferLENGTH)
skpz ; skip on zero
RETURN ; normal exit
RB_init movlw BufferBASE ; else buffer overrun, init pointer
movwf RB_pnt ; set pointer to start location of ringbuffer
RETURN
; only for test use, no functional purpose (yet...)
ISR ;************************
;************************

goto ISR
;**************************
;**************************
; RECEIVE (disabled, send only status data back)

SEND CR
SEND LF
SEND LF
SEND 'P'
SEND 'R'
SEND 'E'
SEND 'C'
SEND 'I'
SEND 'S'
SEND 'I'
SEND 'O'

Assembler Source
SEND 'N'
SEND ' '
SEND 'D'
SEND 'I'
SEND 'G'
SEND 'I'
SEND 'T'
SEND 'A'
SEND 'L'
SEND ' '
SEND 'A'
SEND 'L'
SEND 'T'
SEND 'I'
SEND 'M'
SEND 'E'
SEND 'T'
SEND 'E'
SEND 'R'
SEND CR
SEND LF
SEND '1'
SEND '9'
SEND '9'
SEND '9'
SEND '-'
SEND '2'
SEND '0'
SEND '0'
SEND '1'
SEND ' '
SEND 'b'
SEND 'y'
SEND ' '
SEND 'P'
SEND 'e'
SEND 't'
SEND 'e'
SEND 'r'
SEND ' '
SEND 'L'
SEND 'u'
SEND 'e'
SEND 't'
SEND 'h'
SEND 'i'
SEND CR
SEND LF
SEND LF

Assembler Source
;*****************************************
;*****************************************

;************** MAIN **************
MAIN ;**************************************************************
;*** INITIALIZATION ***
;**************************************************************
RS232init
ADinit
RBinit
;*** Set A/D output format to unsigned ***

ADenable
ADcmd Unsigned
ADdisable
WAIT 0x01
;*** Set Aquisition Time to 34 CCLK Cycles ***

ADenable
ADcmd AT34 ; wait at least 34 tck
ADdisable ; = 0.0085 ms @ 4 MHz
WAIT 0x01
;*** Auto-Calibration of A/D ***

ADenable
ADcmd AutoCal ; wait at least 4944 tck
WAIT 0x03
;*** Auto-Zero of A/D ***

ADenable
ADcmd AutoZero ; wait at least 76 tck

Assembler Source

WAIT 0x01
;**************************************************************
;*** MAIN LOOP ***
;**************************************************************
LOOP
;**************************************************************
;*** A/D CHANNEL 0 READOUT (get the samples) ***
;*** 12 bit data unsigned, MSB first: <0000 MSB - LSB> ***
;**************************************************************
ADenable ; send new configuration to A/D

ADcmd CH0se16MSB ; CH0, single-ended, 16 bit, MSB first
bsf CONV ; disable conversion (for safety reasons)
ADcmd DummyCmd
ADdisable
movlw d'16' ; initialize average building routine

movwf sum_cnt
clrf sum_LO
clrf sum_HI
AV_CH0 ;*** START OF THE AVERAGE BUILDING ROUTINE ***

; wait at least Tacq + Tconv = (34 + 44) Tclk
; = 78 Tclk = 20 us @ 4 MHz
WAIT 0x01 ; wait 1 ms
ADenable
movfw SSPSR
movwf HI ; store high nibble in HI
ADcmd DummyCmd
movfw SSPSR
movwf LO ; store low nibble in LO
ADdisable
; result in HI, LO
;*** END OF READOUT ***
;*** 16 TIMES ADDITION ***

movfw LO ; load low value
addwf sum_LO,1 ; add value to sum_LO register
addcf sum_HI,1 ; add carry
movfw HI ; load high value
addwf sum_HI,1 ; add value to sum_HI register
decfsz sum_cnt,1 ; decrement loop counter
goto AV_CH0

Assembler Source
;------------------------------------------------
;*** DIVIDE BY 16 EFFICIENTLY ***

movlw b'11110000' ; set mask
andwf sum_LO,1 ; clear low nibble of sum_LO
swapf sum_LO,1 ; swap halves of sum_LO
swapf sum_HI,1
andwf sum_HI,0 ; get high nibble of sum_HI, store in w
iorwf sum_LO,1 ; put w to high nibble of sum_LO
andwf sum_HI,1 ; clear high nibble of sum_HI
; result in sum_HI, sum_LO
;*** END OF AVERAGE, FILL RING BUFFER ***
;**************************************************************
;*** FILL IN RING BUFFER & CALCULATE AVERAGE ***
;**************************************************************
call RB_main ; fill the ring buffer with new values

; stored in sum_LO, sum_HI
;*** BUILD AVERAGE OF RING BUFFER ***

clrf sum_LO
clrf sum_HI
movlw BufferBASE
movwf FSR ; set pointer to the beginning of the ring buffer
F_LOOP movfw INDF ; load (low) value from pointed register
movfw INDF ; load (high) value from pointed register
movfw FSR ; get current pointer
skpz ; skip on zero: buffer overrun, exit
GOTO F_LOOP ; not yet finished; resume
;*****************************************************************
;*** You have to adapt the following division routine by hand, ***
;*** if you alter the amount of buffer registers. ***
;*** Default: divide by 4 (BufferLENGTH = 8 bytes) ***
;*****************************************************************
rrf sum_LO,1 ; divide by 2
bcf sum_LO,6 ; clear 2. MSB of sum_LO

btfsc sum_HI,0 ; check LSB of sum_HI

Assembler Source
bsf sum_LO,6 ; set 2. MSB of sum_LO if condition is true

bcf sum_LO,7 ; clear MSB of sum_LO
btfsc sum_HI,1 ; check 2. LSB of sum_HI
bsf sum_LO,7 ; set MSB of sum_LO if condition is true
rrf sum_HI,1 ; divide by 2

bcf sum_HI,6 ; clear carry in
;*** END OF RING BUFFER AVERAGE ***
movfw sum_LO
movwf CH0_LO
movfw sum_HI
movwf CH0_HI
;**************************************************************
;*** A/D CHANNEL 1 READOUT ***
;**************************************************************

ADcmd DummyCmd
ADdisable

movwf sum_cnt
clrf sum_LO
clrf sum_HI
AV_CH1 ; wait at least Tacq + Tconv = (34 + 44) Tclk

; = 78 Tclk = 20 us @ 4 MHz
ADenable
movfw SSPSR
ADcmd DummyCmd
movfw SSPSR
ADdisable
; result in HI, LO

Assembler Source

goto AV_CH1
;------------------------------------------------

swapf sum_HI,1
;*** END OF AVERAGE ***
movfw sum_LO
movwf CH1_LO
movfw sum_HI
movwf CH1_HI
;**************************************************************
;*** SEND DATA TO PC, MSB FIRST ***
;**************************************************************
SEND 'T' ;*** FRAMING: start sequence ***

SEND 'U' ; U = b'01010101'
movfw CH0_HI ; send channel 0 data
SENDw
movfw CH0_LO
SENDw
SENDw
movfw CH1_LO
SENDw
SEND '/' ;*** FRAMING: stop sequence ***
SEND '?' ; ? = b'00011111'
goto LOOP ; re-entry

Assembler Source
END

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Unsere Kernkompetenz Stimmt konzipiert Interaktionen zwischen Unternehmen und
deren Anspruchsgruppen: Kunden, Mitarbeiter, Lieferanten, Michael Svoboda, der
Geschftspartner, ffentlichkeit, etc. Wirtschaftsinformatiker mit
Erfahrungen in der
Unser Ansatz Eine aussergewhnliche Customer Experience bzw. User Organisationsentwicklung bringt bei
Experience ist nicht nur das Resultat, sondern integraler Stimmt die Bedrfnisse von IT,
Bestandteil einer optimalen Produkt- bzw. Servicequalitt und Business und Benutzer zusammen.
wird immer hufiger sogar zum entscheidenden
Wettbewerbsvorteil. Resultate Vertriebssystemstudie
Die spannenden Resultate unserer
Unser Fokus Je nach Kontext und Problemstellung fokussieren wir auf Studie besttigen viele Eindrcke aus
digitale, elektronische, persnliche oder physische unserer Projekterfahrung. Lesen Sie
Interaktionen, beispielsweise: mehr
Benutzung von Software, Websites, Intranets, interaktiven
Medien
Bedienung von Maschinen und Gerten
Konzeption von Beratungs- und Verkaufsprozessen
Entwicklung von Raumkonzepten, Leitsystemen, etc.
Ihr Nutzen Eine kompetente, ganzheitliche und interdisziplinre

Untersttzung auf dem Weg zu Interactional Excellence,
dem Dreh- und Angelpunkt fr eine aussergewhnliche
Experience und damit Grundlage fr eine nachhaltige
Wettbewerbsdifferenzierung.
Stimmt AG | Korneliusstrasse 9 | CH-8008 Zrich | +41 (0)44 562 10 10
http://www.stimmt.ch/12/02/2008 17:30:44
zwickers homepage | Welcome
zwickers.ch
Home
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http://www.zwickers.ch/zwickers/phpwcms0609/index.php12/02/2008 17:30:46
RS232 Scope V1.02 - Data Capture with Excel 97 on Windows 95/98/ME/NT
RS232 Scope V1.02

Serial Data Capture with Microsoft Excel 97 on Windows 95/98/ME/NT
Concept
Supported Operating Systems
Input data format
Major extracts
Available resources
Concept [Toc] [Top]
This Excel Worksheet has been designed to visualize data sent from microcontrollers in a very convenient way.
http://www.electronic-engineering.ch/microchip/software/scope.html (1 of 3)12/02/2008 17:30:47

There are the following advantages:
Quick and easy visualization with several types of graphs

Various configuration settings
Very convenient data format for further calculations
Data exchange in standard data format
Almost everybody owns the software and hardware required
The Worksheet activates a Visual Basic macro, which opens the specified ComPort and reads data as long as specified in the
drop-down menu "Duration". The "sampling time" can be selected in the drop-down menu "Interval".
At the end of each interval, the macro calculates the average of all data received during this interval. Afterwards, the graph is
updated automatically.
The data transmitted is enclosed by a frame: A Frame-Header (TX) and a Frame-Tail (/T) ensure, that the data is identified
properly. At the moment, there is no automatic resynchronisation built in, but the tests showed, that there is no urgent need for
that.
Maybe this feature will be necessary, if longer data streams are transmitted within one frame.
The software has been tested under Windows 95 - Excel 97 on a Pentium I 166 MHz, and under Windows 98 - Excel 97 on a
Pentium III 500 MHz and an Athlon 700 MHz.
The transmitted pattern comes from a 16 bit table implemented in a PIC16C84 and was transmitted with the m_rs096.asm. The
table has been generated with the "Automatic Table Generator for MPLAB Assembler".
The assembler source code for the test pattern is available under projects / 16 bit table read.
Supported Operating Systems [Toc] [Top]
According to the DLL author: Win95, Win98, WinMe, WinNT
Unfortunately, it does not run on WinXP

The RS232 driver DLL (RSAPI_70.DLL) can not successfully open the ComPort on WinXP (although it is designed to run also
on Win NT). I tried hard, but this DLL does not succeed on WinXP. If someone knows/is able to write a nice RS232 DLL
running also on WinXP, I would be very graceful - and I assume a lot of other people too...
But recently, I obtained a different version of the RSAPI.DLL for WinXP, which you can download and try yourself. I've
named it RSAPI_71.DLL, you can rename it to RSAPI_70.DLL and install it in your WinXP C:\WINDOWS\system32\
directory. The Visual Basic sources refer currently to the name RSAPI_70.DLL, but you can change this, if desired.
I haven't had enough free resources to test it thoroughly so far...
Input Data Format [Toc] [Top]
Protocol: RS232
Input data format: Frame-Header, 2 byte of data (MSB, then LSB), Frame-Tail (Trailer)
Entire frame length: 6 byte
Major Extracts of Visual Basic Source Code [Toc] [Top]

Current configuration, in Visual Basic module 'Data_Fetch':
Option Explicit 'force explicit variable declaration

Private Const sheet1 As String = "RS232-Scope"
Private Const sheet2 As String = "RS232-Data"
Private Const FrameHeader As String = "TX"
Private Const FrameTail As String = "/T"
Private Const FrameLength As Byte = 6
Data acquisition & processing, in Visual Basic module 'Data_Fetch':
'check if data is valid:

If Mid$(RecString, 1, 6) <> "Fehler" Then
'check if frame header is correct:
If Mid$(RecString, 1, 2) = FrameHeader And Mid$(RecString, 5, 2) = FrameTail Then
HI = Asc(Mid$(RecString, 3, 1)) 'extract HI Byte
ThisWorkbook.Sheets(sheet1).HiByteBox.Text = HI
LO = Asc(Mid$(RecString, 4, 1)) 'extract LO Byte
ThisWorkbook.Sheets(sheet1).LoByteBox.Text = LO
value = value + 256 * HI + LO
n = n + 1
Else
ErrorString = "No data with valid frame."
End If
Else
ErrorString = "No data input on serial port."
End If
Item Size File
RS232 Scope V1.02 (Excel 97 Worksheet) 156 kB ScopeV102.zip
ComCtl drivers, if they are missing in Win9x and Windows

complains (located in C:\windows\system\: comctl32.dll, comctl32. 568 kB ComCtl.zip
ocx, comctllib.twd)
[Toc] [Top]

click here

RS232 Debug Interface - Data Capture with Excel 97 on Windows 95/98/ME/NT
RS232 Debug Interface

Serial Data Capture with Microsoft Excel 97 on Windows 95/98/ME/NT
Concept
Supported Operating Systems
Available resources
Concept [Toc] [Top]
This Excel Worksheet has been designed to easily visualize and debug data received on the serial port (RS232).
http://www.electronic-engineering.ch/microchip/software/rs232debug.html (1 of 2)12/02/2008 17:30:48

RS232 Debug Interface - Data Capture with Excel 97 on Windows 95/98/ME/NT
The Worksheet activates a Visual Basic macro, which opens the specified RS232 ComPort and reads data in an endless
loop. The received data bytes are converted to ASCII characters and to their binary, hexadecimal and decimal
representations. The interruption of the endless loop is done by pushing the 'Esc' button.
The software has been successfully tested under Windows 95/98 and Excel 97 on a Pentium III 500 MHz and an
Athlon 700 MHz system.
Supported Operating Systems [Toc] [Top]
According to the DLL author: Win95, Win98, WinMe, WinNT
Unfortunately, it does not run on WinXP

The RS232 driver DLL (RSAPI_70.DLL) can not successfully open the ComPort on WinXP (although it is designed to
run also on Win NT). I tried hard, but this DLL does not succeed on WinXP. If someone knows/is able to write a nice
RS232 DLL running also on WinXP, I would be very graceful - and I assume a lot of other people too...
But recently, I obtained a different version of the RSAPI.DLL for WinXP, which you can download and try yourself.
I've named it RSAPI_71.DLL, you can rename it to RSAPI_70.DLL and install it in your WinXP C:\WINDOWS
\system32\ directory. The Visual Basic sources refer currently to the name RSAPI_70.DLL, but you can change this, if
desired.
I haven't had enough free resources to test it thoroughly so far...
Item Size File
RS232 Debug Interface (Excel 97 Worksheet) 95 kB RS232-Debug-Interface.zip
ComCtl drivers, if they are missing in Win9x and Windows

complains (located in C:\windows\system\: comctl32.dll, 568 kB ComCtl.zip
comctl32.ocx, comctllib.twd)
[Toc] [Top]

click here
http://www.electronic-engineering.ch/microchip/software/rs232debug.html (2 of 2)12/02/2008 17:30:48

softsolutions.sedutec.de
Softsolutions from Sebastian Dunst
AudioAnalyser Screenshot1:
Home
The program "AudioAnalyser" is a

Multisine realtime frequency analyser for audio
signals.
AudioAnalyser
You can combine the "AudioAnalyser"
with my other application "Multisine", if
License your soundcard supports the full duplex
mode (only very old soundcards don't).
With this combination you have a full
Download equipped audio suite for your
measurements.
Contact The application is written in C++ and
uses the VCL library and Win Api calls.
Screenshot2:
www.sedutec.de Feature list of AudioAnalyser V1.9:
Samplingrate 4000 Hz ... 48 kHz

FFT length 256 ... 32768 points
Stereo and Mono mode
Averaging mode (1-20)
Max hold mode
5 different windows (Hanning,
Hamming, Blackman, Blackman
Harris, Rectangular)
Linear and logarithmic frequency
axis
Possibility to store the diagram
Screenshot3:
as bitmap
Possibility to store measurement
data in a text file
Vector Scope for stereo width
and phase analysis
Level Meter
31 band analyser
2 markers available
Variable axis settings
http://softsolutions.sedutec.de/audioanalyser.php (1 of 3)12/02/2008 17:30:52

Level Correction value
System requirements:
Windows 95/98, Windows 2000

or Windows XP
Soundcard
Release Notes:
AudioAnalyser V1.9
Date: 31.07.2006
Added measurement data export
Added 31 band analyser
AudioAnalyser V1.81
Date: 24.01.2006
Removed data acquisition bug in stereo mode
AudioAnalyser V1.8
Date: 22.01.2006
Added Level Meter
Mainwindow is now sizeable
AudioAnalyser V1.7
Date: 11.01.2006
Improved measurement speed
AudioAnalyser V1.6
Date: 05.01.2006
Added max hold mode
Added functionality to clear data
AudioAnalyser V1.51
Date: 16.08.2005
AudioAnalyser back again provided as freeware
AudioAnalyser V1.5
Date: 31.07.2005
Added marker functionality
Added graphical options
introduces demo and full version of AudioAnalyser
removed some bugs
AudioAnalyser V1.4
Date: 06.06.2005
Added Averaging functionality
AudioAnalyser V1.3
Date: 31.03.2005
Added Vector Scope

Removed some bugs

AudioAnalyser V1.2
Date: 19.03.2005
Added 2nd Channel for stereo Analysis
Moved Data Aquisition into own thread
AudioAnalyser V1.1
Date: 10.02.2005
Initial Revision
One Channel (Mono)

Home Multisine:
Home
This site contains some of my

Multisine programs, which I developed over the
last few years. To get the software you
AudioAnalyser just have to go to the Download section.
To run the software you need the MS
Windows operating system. The
License downloadable files are selfexctracting
exe files.
Download
At the moment there are two programs
available. AudioAnalyser:
Contact
The first one is called Multisine and it is
www.sedutec.de an audio signal generator for your PC in
combination with your soundcard.
The second program is called

AudioAnalyser and it is the opposite
program to the generator, a realtime
audio analyser.
It is possible to use the two programs together, if your soundcard supports the full
duplex mode. When using the two programs simultaneously, you have a full audio
measurement suite for your PC or external audio components.
Before you download the software, please read first the license.
Have fun using the software. Please report bugs and other issues concerning the
software to me.
Munich, 25.11.2007
Sebastian Dunst
http://softsolutions.sedutec.de/12/02/2008 17:30:52
Multisine Screenshot1:
Home
The program Multisine is an audio

Multisine signal generator. All signals are
calculated offline. After the calculation it
AudioAnalyser is possible to store the data in a .wav
file or playback data with your
soundcard.
License The application is written in C++ and
uses the VCL library and Win Api calls.
Download Feature list of actual revision
Multisine V1.73:
Contact
Samplingrate 1 Hz ... 48 kHz
Mono and Stereo Signals Screenshot2:
www.sedutec.de supported
File length up to 180s
8 / 16 bit audioformat
Play and Loop Play via
soundcard
(Multi) Sinusgenerator
Square generator
Triangle generator
Sawtooth generator
AM generator
FM generator
Sweep generator
Pseudo noise generator
Noise generator (pink, white)
Band noise generator
Screenshot3:
Offline frequency analysator
(FFT, 4 different window types)
Signal statistics
Comfortable graphical display for
time and frequency domain
System requirements:
http://softsolutions.sedutec.de/multisine.php (1 of 2)12/02/2008 17:30:53
Windows 95/98, Windows 2000

or Windows XP
Windows Vista not tested
Soundcard
Release Notes:
Multisine V1.73
Date: 25.11.2007
removed several bugs
no additional features
Multisine V1.72
Date: 26.06.2007
Improved memory management
Float values now valid even if entered with ","
Multisine V1.71
Date: 21.01.2007
Added support for stereo signals
Multisine V1.7
Date: 08.01.2007
Complete internal redesign
Changed some program flows
Multisine V1.61
Date: 13.09.2006
Removed serious bug at 8 bit audio
Changed format of import txt files
Multisine V1.6
Date: 04.07.2005
Changed maximal file length to 180 sec
Corrected some bugs
Multisine V1.5
Date: 28.02.2005
Added ZoomIn and ZoomOut functionality
Corrected some focus bugs
Multisine V1.4
Date: 04.02.2005
Initial public Revision
http://softsolutions.sedutec.de/multisine.php (2 of 2)12/02/2008 17:30:53

Main - Chair of Polymer and Crystal Physics
Moscow State University Russian Academy of Sciences

Physics Department Institute of Organoelement Compounds
Head of Chair and Laboratory Professor Alexei R. Khokhlov Seminars and Conferences:
Seminar of the Polymer Council of RAS
Research Seminar in Polymer Physics
Research in Polymer Science
Nonlinear Dynamics and Chaos Group
Joint Scanning Probe Microscopy Group
Laboratory of Frontier Carbon Materials Common services:
Scientific Projects
Crysader Batch Cluster
History of Research in Polymer and Crystal Physics at the Physics Dept., MSU
Education
Available topics of term papers for the 2nd year students (in Russian) Scientific Libraries:
Admission of 3rd year students (information about laboratory, 4Mb PDF, in Russian) Physics Department's Library
Lecture Courses arXiv.org e-Print archive
Laboratory Courses
NEW! Lectures Timetable
Macrogalleria (local mirror here, laboratory access only)
Scientific and Educational Center for Physics and Chemistry of Polymers and Thin Organic Films (in Russian) Contact Information
Students
Lectures Timetable for Ph.D. students
Ph.D. Students
Alumni
Scientific and Educational Personnel
http://polly.phys.msu.su/12/02/2008 17:31:04
Zelscope: Sound card oscilloscope and spectrum analyzer
Zelscope is a Windows software that converts your PC into a dual-trace storage oscilloscope
and spectrum analyzer. It uses your computer's sound card as analog-to-digital converter,
presenting a real-time waveform or spectrum of the signal - which can be music, speech, or
output from an electronic circuit. Zelscope features the interface of a traditional oscilloscope,
with conventional gain, offset, timebase, and trigger controls. As a real-time spectrum analyzer,
Zelscope can display the amplitude and phase components of the spectrum.
Copyright 2001-2006 K.Zeldovich, N.Shusharina. E-mail: support@zelscope.com
http://www.zelscope.com/12/02/2008 17:31:10
Planetside, the home of Terragen
Terragen 2 News
Terragen 2 Technology Preview
Terragen v0.9.43 for Windows

Learn about Terragen or read the Windows Terragen page
Terragen v0.9 for Macintosh

Learn about Terragen or read the Terragen Mac page
terragen start page - download terragen - contact details

This site and its contents are copyright 2007 Planetside Software, contact@planetside.co.uk
Terragen and TGD are trademarks of Planetside Software
http://www.planetside.co.uk/12/02/2008 17:31:15
Quick Reference
B.5 12-Bit Core Instruction Set

Microchips base-line 8-bit microcontroller family uses a 12-bit wide instruction
set. All instructions execute in a single instruction cycle unless otherwise
noted. Any unused opcode is executed as a NOP. The instruction set is
grouped into the following catagories:
Table B.5: 12-Bit Core Literal and Control Operations
Hex Mnemonic Description Function
Ekk ANDLW k AND literal and W k .AND. W W
9kk CALL k Call subroutine PC + 1 TOS, k PC
004 CLRWDT Clear watchdog timer 0 WDT (and Prescaler if
assigned)
Akk GOTO k Goto address (k is nine bits) k PC(9 bits)
Dkk IORLW k Incl. OR literal and W k .OR. W W
Ckk MOVLW k Move Literal to W k W
002 OPTION Load OPTION Register W OPTION Register
8kk RETLW k Return with literal in W k W, TOS PC
003 SLEEP Go into Standby Mode 0 WDT, stop oscillator
00f TRIS f Tristate port f W I/O control reg f
Fkk XORLW k Exclusive OR literal and W k .XOR. W W
Table B.6: 12-Bit Core Byte Oriented File Register Operations

1Cf ADDWF f,d Add W and f W + f d
14f ANDWF f,d AND W and f W .AND. f d
06f CLRF f Clear f 0f
040 CLRW Clear W 0 W
24f COMF f,d Complement f .NOT. f d
0Cf DECF f,d Decrement f f - 1 d
2Cf DECFSZ f,d Decrement f, skip if zero f - 1 d, skip if zero
28f INCF f,d Increment f f + 1 d
3Cf INCFSZ f,d Increment f, skip if zero f + 1 d,skip if zero
10f IORWF f,d Inclusive OR W and f W .OR. f d
20f MOVF f,d Move f f d
02f MOVWF f Move W to f W f
APPENDICES
000 NOP No operation

34f RLF f,d Rotate left f
register f
C 7......0
1999 Microchip Technology Inc. DS33014G-page 181

MPASM Users Guide with MPLINK and MPLIB
Table B.6: 12-Bit Core Byte Oriented File Register Operations (Continued)
30f RRF f,d Rotate right f register f
C 7......0
08f SUBWF f,d Subtract W from f f - W d

38f SWAPF f,d Swap halves f f(0:3) f(4:7) d
18f XORWF f,d Exclusive OR W and f W .XOR. f d
Table B.7: 12-Bit Core Bit Oriented File Register Operations

4bf BCF f,b Bit clear f 0 f(b)
5bf BSF f,b Bit set f 1 f(b)
6bf BTFSC f,b Bit test, skip if clear skip if f(b) = 0
7bf BTFSS f,b Bit test, skip if set skip if f(b) = 1
DS33014G-page 182 1999 Microchip Technology Inc.

Quick Reference

Microchips mid-range 8-bit microcontroller family uses a 14-bit wide
instruction set. This instruction set consists of 36 instructions, each a single
14-bit wide word. Most instructions operate on a file register, f, and the
working register, W (accumulator). The result can be directed either to the file
register or the W register or to both in the case of some instructions. A few
instructions operate solely on a file register (BSF for example). The instruction
set is grouped into the following catagories:
Table B.8: 14-Bit Core Literal and Control Operations
3Ekk ADDLW k Add literal to W k + W W
39kk ANDLW k AND literal and W k .AND. W W
2kkk CALL k Call subroutine PC + 1 TOS, k PC
0064 CLRWDT T Clear watchdog timer 0 WDT (and Prescaler if
assigned)
2kkk GOTO k Goto address (k is nine bits) k PC(9 bits)
38kk IORLW k Incl. OR literal and W k .OR. W W
30kk MOVLW k Move Literal to W k W
0062 OPTION Load OPTION register W OPTION Register
0009 RETFIE Return from Interrupt TOS PC, 1 GIE
34kk RETLW k Return with literal in W k W, TOS PC
0008 RETURN Return from subroutine TOS PC
0063 SLEEP Go into Standby Mode 0 WDT, stop oscillator
3Ckk SUBLW k Subtract W from literal k - W W
006f TRIS f Tristate port f W I/O control reg f
3Akk XORLW k Exclusive OR literal and W k .XOR. W W
Table B.9: 14-Bit Core Byte Oriented File Register Operations

07ff ADDWF f,d Add W and f W + f d
05ff ANDWF f,d AND W and f W .AND. f d
018f CLRF f Clear f 0 f
0100 CLRW Clear W 0 W
09ff COMF f,d Complement f .NOT. f d
f,d Decrement f f - 1 d
APPENDICES
03ff DECF
0Bff DECFSZ f,d Decrement f, skip if zero f - 1 d, skip if 0
0Aff INCF f,d Increment f f + 1 d
0Fff INCFSZ f,d Increment f, skip if zero f + 1 d, skip if 0
04ff IORWF f,d Inclusive OR W and f W .OR. f d
08ff MOVF f,d Move f f d

Table B.9: 14-Bit Core Byte Oriented File Register Operations (Continued)
008f MOVWF f Move W to f W f
0000 NOP No operation
0Dff RLF f,d Rotate left f register f
C 7......0
0Cff RRF f,d Rotate right f register f

C 7......0
02ff SUBWF f,d Subtract W from f f - W d

0Eff SWAPF f,d Swap halves f f(0:3) f(4:7) d
06ff XORWF f,d Exclusive OR W and f W .XOR. f d
Table B.10: 14-Bit Core Bit Oriented File Register Operations

1bff BCF f,b Bit clear f 0 f(b)
1bff BSF f,b Bit set f 1 f(b)
1bff BTFSC f,b Bit test, skip if clear skip if f(b) = 0
1bff BTFSS f,b Bit test, skip if set skip if f(b) = 1
Table B.11: 12-Bit/14-Bit Core Special Instruction Mnemonics

Equivalent Status
Mnemonic Description
Operation(s)
ADDCF f,d Add Carry to File BTFSC 3,0 Z
INCF f,d
ADDDCF f,d Add Digit Carry to File BTFSC 3,1 Z
INCF f,d
B k Branch GOTO k -
BC k Branch on Carry BTFSC 3,0 -
GOTO k
BDC k Branch on Digit Carry BTFSC 3,1 -
GOTO k
BNC k Branch on No Carry BTFSS 3,0 -
GOTO k
BNDC k Branch on No Digit Carry BTFSS 3,1 -
GOTO k
BNZ k Branch on No Zero BTFSS 3,2 -
GOTO k
BZ k Branch on Zero BTFSC 3,2 -
GOTO k

Quick Reference
Table B.11: 12-Bit/14-Bit Core Special Instruction Mnemonics (Continued)

Equivalent Status
Mnemonic Description
Operation(s)
CLRC Clear Carry BCF 3,0 -
CLRDC Clear Digit Carry BCF 3,1 -
CLRZ Clear Zero BCF 3,2 -
LCALL k
LGOTO k
MOVFW f Move File to W MOVF f,0 Z
NEGF f,d Negate File COMF f,1 Z
INCF f,d
SETC Set Carry BSF 3,0 -
SETDC Set Digit Carry BSF 3,1 -
SETZ Set Zero BSF 3,2 -
SKPC Skip on Carry BTFSS 3,0 -
SKPDC Skip on Digit Carry BTFSS 3,1 -
SKPNC Skip on No Carry BTFSC 3,0 -
SKPNDC Skip on No Digit Carry BTFSC 3,1 -
SKPNZ Skip on Non Zero BTFSC 3,2 -
SKPZ Skip on Zero BTFSS 3,2 -
SUBCF f,d Subtract Carry from File BTFSC 3,0 Z
DECF f,d
SUBDCF f,d Subtract Digit Carry from File BTFSC 3,1 Z
DECF f,d
TSTF f Test File MOVF f,1 Z
APPENDICES


Microchips high-performance 8-bit microcontroller family uses a 16-bit wide
instruction set. This instruction set consists of 55 instructions, each a single
16-bit wide word. Most instructions operate on a file register, f, and the
working register, W (accumulator). The result can be directed either to the file
register or the W register or to both in the case of some instructions. Some
devices in this family also include hardware multiply instructions. A few
instructions operate solely on a file register (BSF for example).
Table B.12: 16-Bit Core Data Movement Instructions
6pff MOVFP f,p Move f to p f p
b8kk MOVLB k Move literal to BSR k BSR (3:0)
bakx MOVLP k Move literal to RAM page select k BSR (7:4)
4pff MOVPF p,f Move p to f p W
01ff MOVWF f Move W to F W f
a8ff TABLRD t,i,f Read data from table latch into file f, TBLATH f if t=1,
then update table latch with 16-bit TBLATL f if t=0;
contents of memory location ProgMem(TBLPTR) TBLAT;
addressed by table pointer TBLPTR + 1 TBLPTR if i=1
acff TABLWT t,i,f Write data from file f to table latch f TBLATH if t = 1,
and then write 16-bit table latch to f TBLATL if t = 0;
program memory location addressed TBLAT ProgMem(TBLPTR);
by table pointer TBLPTR + 1 TBLPTR if i=1
a0ff TLRD t,f Read data from table latch into file f TBLATH f if t = 1
(table latch unchanged) TBLATL f if t = 0
a4ff TLWT t,f Write data from file f into table latch f TBLATH if t = 1
f TBLATL if t = 0
Table B.13: 16-Bit Core Arithmetic and Logical Instruction

b1kk ADDLW k Add literal to W (W + k) W
0eff ADDWF f,d Add W to F (W + f) d
10ff ADDWFC f,d Add W and Carry to f (W + f + C) d
b5kk ANDLW k AND Literal and W (W .AND. k) W
0aff ANDWF f,d AND W with f (W .AND. f) d
28ff CLRF f,d Clear f and Clear d 0x00 f,0x00 d
12ff COMF f,d Complement f .NOT. f d
2eff DAW f,d Dec. adjust W, store in f,d W adjusted f and d
06ff DECF f,d Decrement f (f - 1) f and d
14ff INCF f,d Increment f (f + 1) f and d
b3kk IORLW k Inclusive OR literal with W (W .OR. k) W

Quick Reference
Table B.13: 16-Bit Core Arithmetic and Logical Instruction (Continued)

08ff IORWF f,d Inclusive or W with f (W .OR. f) d
b0kk MOVLW k Move literal to W k W
bckk MULLW k Multiply literal and W (k x W) PH:PL
34ff MULWF f Multiply W and f (W x f) PH:PL
2cff NEGW f,d Negate W, store in f and d (W + 1) f,(W + 1) d
1aff RLCF f,d Rotate left through carry register f
C 7......0
22ff RLNCF f,d Rotate left (no carry) register f

7......0
18ff RRCF f,d Rotate right through carry register f

C 7......0
20ff RRNCF f,d Rotate right (no carry) register f

7......0
2aff SETF f,d Set f and Set d 0xff f,0xff d

b2kk SUBLW k Subtract W from literal (k - W) W
04ff SUBWF f,d Subtract W from f (f - W) d
02ff SUBWFB f,d Subtract from f with borrow (f - W - c) d
1cff SWAPF f,d Swap f f(0:3) d(4:7),
f(4:7) d(0:3)
b4kk XORLW k Exclusive OR literal with W (W .XOR. k) W
0cff XORWF f,d Exclusive OR W with f (W .XOR. f) d
Table B.14: 16-Bit Core Bit Handling Instructions

8bff BCF f,b Bit clear f 0 f(b)
8bff BSF f,b Bit set f 1 f(b)
9bff BTFSC f,b Bit test, skip if clear skip if f(b) = 0
9bff BTFSS f,b Bit test, skip if set skip if f(b) = 1
APPENDICES
3bff BTG f,b Bit toggle f .NOT. f(b) f(b)

Table B.15: 16-Bit Core Program Control Instructions

ekkk CALL k Subroutine call (within 8k page) PC+1 TOS,k PC(12:0),
k(12:8) PCLATH(4:0),
PC(15:13) PCLATH(7:5)
31ff CPFSEQ f Compare f/w, skip if f = w f-W, skip if f = W
32ff CPFSGT f Compare f/w, skip if f > w f-W, skip if f > W
30ff CPFSLT f Compare f/w, skip if f< w f-W, skip if f < W
16ff DECFSZ f,d Decrement f, skip if 0 (f-1) d, skip if 0
26ff DCFSNZ f,d Decrement f, skip if not 0 (f-1) d, skip if not 0
ckkk GOTO k Unconditional branch (within 8k) k PC(12:0)
k(12:8) PCLATH(4:0),
PC(15:13) PCLATH(7:5)
1eff INCFSZ f,d Increment f, skip if zero (f+1) d, skip if 0
24ff INFSNZ f,d Increment f, skip if not zero (f+1) d, skip if not 0
b7kk LCALL k Long Call (within 64k) (PC+1) TOS; k PCL,
(PCLATH) PCH
0005 RETFIE Return from interrupt, enable (PCLATH) PCH:k PCL
interrupt 0 GLINTD
b6kk RETLW k Return with literal in W k W, TOS PC,
(PCLATH unchanged)
0002 RETURN Return from subroutine TOS PC
(PCLATH unchanged)
33ff TSTFSZ f Test f, skip if zero skip if f = 0
Table B.16: 16-Bit Core Special Control Instructions

0004 CLRWT Clear watchdog timer 0 WDT,0 WDT prescaler,
1 PD, 1 TO
0003 SLEEP Enter Sleep Mode Stop oscillator,power down, 0 WDT,
0 WDT Prescaler
1 PD, 1 TO

Quick Reference
B.8 Key to Enhanced 16-Bit Core Instruction Set

Field Description
File Addresses
f 8-bit file register address
fs 12-bit source file register address
fd 12-bit destination file register address
dest W register if d = 0; file register if d = 1
r 0, 1, or 2 for FSR number
Literals
kk 8-bit literal value
kb 4-bit literal value
kc bits 8-11 of 12-bit literal value
kd bits 0-7 of 12-bit literal value
Offsets, Addresses
nn 8-bit relative offset (signed, 2s complement)
nd 11-bit relative offset (signed, 2s complement)
ml bits 0-7 of 20-bit program memory address
mm bits 8-19 of 20-bit program memory address
xx any 12-bit value
Bits
b bits 9-11; bit address
d bit 9; 0=W destination; 1=f destination
a bit 8; 0=common block; 1=BSR selects bank
s bit 0 (bit 8 for CALL); 0=no update; 1(fast)=update/save W, STATUS, BSR
APPENDICES

B.9 Enhanced 16-Bit Core Instruction Set

Microchips new high-performance 8-bit microcontroller family uses a 16-bit
wide instruction set. This instruction set consists of 76 instructions, each a
single 16-bit wide word (2 bytes). Most instructions operate on a file register, f,
and the working register, W (accumulator). The result can be directed either to
the file register or the W register or to both in the case of some instructions. A
few instructions operate solely on a file register (BSF for example)
Table B.17: Enhanced 16-Bit Core Literal Operations
0Fkk ADDLW kk ADD literal to WREG W+kk W
0Bkk ANDLW kk AND literal with WREG W .AND. kk W
0004 CLRWDT Clear Watchdog Timer 0 WDT, 0 WDT postscaler,
1 TO,1 PD
0007 DAW Decimal Adjust WREG if W<3:0> >9 or DC=1, W<3:0>+6W<3:0>,
else W<3:0> W<3:0>;
if W<7:4> >9 or C=1, W<7:4>+6W<7:4>,
else W<7:4> W<7:4>;
09kk IORLW kk Inclusive OR literal with W .OR. kk W
WREG
EFkc LFSR r,kd:kc Load 12-bit Literal to FSR kd:kc FSRr
F0kd (second word)
01kb MOVLB kb Move literal to low nibble in kb BSR
BSR
0Ekk MOVLW kk Move literal to WREG kk W
0Dkk MULLW kk Multiply literal with WREG W * kk PRODH:PRODL
08kk SUBLW kk Subtract W from literal kkW W
0Akk XORLW kk Exclusive OR literal with W .XOR. kk W
WREG
Table B.18: Enhanced 16-Bit Core Memory Operations

0008 TBLRD * Table Read (no change to TBLPTR) Prog Mem (TBLPTR) TABLAT
0009 TBLRD *+ Table Read (post-increment TBLPTR) Prog Mem (TBLPTR) TABLAT
TBLPTR +1 TBLPTR
000A TBLRD *- Table Read (post-decrement TBLPTR) Prog Mem (TBLPTR) TABLAT
TBLPTR -1 TBLPTR
000B TBLRD +* Table Read (pre-increment TBLPTR) TBLPTR +1 TBLPTR
Prog Mem (TBLPTR) TABLAT
000C TBLWT * Table Write (no change to TBLPTR) TABLAT Prog Mem(TBLPTR)
000D TBLWT *+ Table Write (post-increment TBLPTR) TABLAT Prog Mem(TBLPTR)
TBLPTR +1 TBLPTR

Quick Reference
Table B.18: Enhanced 16-Bit Core Memory Operations (Continued)

000E TBLWT *- Table Write (post-decrement TBLPTR) TABLAT Prog Mem(TBLPTR)
TBLPTR -1 TBLPTR
000F TBLWT +* Table Write (pre-increment TBLPTR) TBLPTR +1 TBLPTR
TABLAT Prog Mem(TBLPTR)
Table B.19: Enhanced 16-Bit Core Control Operations

E2nn BC nn Relative Branch if Carry if C=1, PC+2+2*nn PC, else PC+2PC
E6nn BN nn Relative Branch if Negative if N=1, PC+2+2*nnPC,else PC+2PC
E3nn BNC nn Relative Branch if Not Carry if C=0, PC+2+2*nnPC, else PC+2PC
E7nn BNN nn Relative Branch if Not Nega- if N=0, PC+2+2*nnPC, else PC+2PC
tive
E5nn BNOV nn Relative Branch if Not Over- if OV=0, PC+2+2*nnPC, else PC+2PC
flow
E1nn BNZ nn Relative Branch if Not Zero if Z=0, PC+2+2*nnPC, else PC+2PC
E4nn BOV nn Relative Branch if Overflow if OV=1, PC+2+2*nnPC, else PC+2PC
E0nd BRA nd Unconditional relative PC+2+2*nd PC
branch
E0nn BZ nn Relative Branch if Zero if Z=1, PC+2+2*nnPC, else PC+2PC
ECml CALL mm:ml,s Absolute Subroutine Call PC+4 TOS, mm:ml PC<20:1>,
Fmm (second word) if s=1, W WS,
STATUS STATUSS, BSR BSRS
EFml GOTO mm:ml Absolute Branch mm:ml PC<20:1>
Fmm (second word)
0000 NOP No Operation No operation
0006 POP Pop Top of return stack TOS-1 TOS
0005 PUSH Push Top of return stack PC +2 TOS
D8nd RCALL nd Relative Subroutine Call PC+2 TOS, PC+2+2*ndPC
00FF RESET Generate a Reset (same as same as MCLR reset
MCR reset)
0010 RETFIE s Return from interrupt TOS PC, 1 GIE/GIEH or PEIE/GIEL,
(and enable interrupts) if s=1, WS W, STATUSS STATUS,
BSRS BSR, PCLATU/PCLATH unchngd.
0Ckk RETLW kk Return from subroutine, lit- kk W,
APPENDICES
eral in W
0012 RETURN s Return from subroutine TOS PC, if s=1, WS W,
STATUSS STATUS, BSRS BSR,
PCLATU/PCLATH are unchanged
0003 SLEEP Enter SLEEP Mode 0 WDT, 0 WDT postscaler,
1 TO, 0 PD

Table B.20: Enhanced 16-Bit Core Bit Operations

9bf BCF f,b,a Bit Clear f 0 f<b>
8bf BSF f,b,a Bit Set f 1 f<b>
Bbf BTFSC f,b,a Bit test f, skip if clear if f<b>=0, PC+4PC, else PC+2PC
Abf BTFSS f,b,a Bit test f, skip if set if f<b>=1, PC+4PC, else PC+2PC
7bf BTG f,b,a Bit Toggle f f<b> f<b>
Table B.21: Enhanced 16-Bit Core File Register Operations

24f ADDWF f,d,a ADD WREG to f W+f dest
20f ADDWFC f,d,a ADD WREG and Carry bit to f W+f+C dest
14f ANDWF f,d,a AND WREG with f W .AND. f dest
6Af CLRF f,a Clear f 0f
1Cf COMF f,d,a Complement f f dest
62f CPFSEQ f,a Compare f with WREG, skip if fW, if f=W, PC+4 PC
f=WREG else PC+2 PC
64f CPFSGT f,a Compare f with WREG, skip if fW, if f > W, PC+4 PC
f > WREG else PC+2 PC
60f CPFSLT f,a Compare f with WREG, skip if fW, if f < W, PC+4 PC
f < WREG else PC+2 PC
04f DECF f,d,a Decrement f f1 dest
2Cf DECFSZ f,d,a Decrement f, skip if 0 f1 dest, if dest=0, PC+4 PC
else PC+2 PC
4Cf DCFSNZ f,d,a Decrement f, skip if not 0 f1 dest, if dest 0, PC+4 PC
else PC+2 PC
28f INCF f,d,a Increment f f+1 dest
3Cf INCFSZ f,d,a Increment f, skip if 0 f+1 dest, if dest=0, PC+4 PC
else PC+2 PC
48f INFSNZ f,d,a Increment f, skip if not 0 f+1 dest, if dest 0, PC+4 PC
else PC+2 PC
10f IORWF f,d,a Inclusive OR WREG with f W .OR. f dest
50f MOVF f,d,a Move f f dest
Cfs MOVFF fs,fd Move fs to fd fs fd
Ffd (second word)
6Ef MOVWF f,a Move WREG to f Wf
02f MULWF f,a Multiply WREG with f W * f PRODH:PRODL
6Cf NEGF f,a Negate f f +1 f
34f RLCF f,d,a Rotate left f through Carry register f
C 7......0

Quick Reference
Table B.21: Enhanced 16-Bit Core File Register Operations (Continued)

44f RLNCF f,d,a Rotate left f (no carry) register f
7......0
30f RRCF f,d,a Rotate right f through Carry register f

C 7......0
40f RRNCF f,d,a Rotate right f (no carry) register f

7......0
48f SETF f,a Set f 0xFF f

54f SUBFWB f,d,a Subtract f from WREG with WfC dest
Borrow
5Cf SUBWF f,d,a Subtract WREG from f fW dest
58f SUBWFB f,d,a Subtract WREG from f with fWC dest
Borrow
38f SWAPF f,d,a Swap nibbbles of f f<3:0> dest<7:4>, f<7:4> dest<3:0>
66f TSTFSZ f,a Test f, skip if 0 PC+4 PC, if f=0, else PC+2 PC
18f XORWF f,d,a Exclusive OR WREG with f W .XOR. f dest
APPENDICES

B.10 Hexadecimal to Decimal Conversion

Byte Byte
Hex Dec Hex Dec Hex Dec Hex Dec
0 0 0 0 0 0 0 0
1 4096 1 256 1 16 1 1
2 8192 2 512 2 32 2 2
3 12288 3 768 3 48 3 3
4 16384 4 1024 4 64 4 4
5 20480 5 1280 5 80 5 5
6 24576 6 1536 6 96 6 6
7 28672 7 1792 7 112 7 7
8 32768 8 2048 8 128 8 8
9 36864 9 2304 9 144 9 9
A 40960 A 2560 A 160 A 10
B 45056 B 2816 B 176 B 11
C 49152 C 3072 C 192 C 12
D 53248 D 3328 D 208 D 13
E 57344 E 3584 E 224 E 14
F 61440 F 3840 F 240 F 15
Using This Table: For each Hex digit, find the associated decimal value. Add
the numbers together. For example, Hex A38F converts to 41871 as follows:
Hex 1000s Digit Hex 100s Digit Hex 10s Digit Hex 1s Digit Result
40960 + 768 + 128 + 15 = 41871
Decimal

HD44780U (LCD-II)
(Dot Matrix Liquid Crystal Display Controller/Driver)
Description
The HD44780U dot-matrix liquid crystal display controller and driver LSI displays alphanumerics,
Japanese kana characters, and symbols. It can be configured to drive a dot-matrix liquid crystal display
under the control of a 4- or 8-bit microprocessor. Since all the functions such as display RAM, character
generator, and liquid crystal driver, required for driving a dot-matrix liquid crystal display are internally
provided on one chip, a minimal system can be interfaced with this controller/driver.
A single HD44780U can display up to one 8-character line or two 8-character lines.
The HD44780U has pin function compatibility with the HD44780S which allows the user to easily
replace an LCD-II with an HD44780U. The HD44780U character generator ROM is extended to generate
208 5 8 dot character fonts and 32 5 10 dot character fonts for a total of 240 different character fonts.
The low power supply (2.7V to 5.5V) of the HD44780U is suitable for any portable battery-driven
product requiring low power dissipation.
Features
5 8 and 5 10 dot matrix possible
Low power operation support:
2.7 to 5.5V
Wide range of liquid crystal display driver power
3.0 to 11V
Liquid crystal drive waveform
A (One line frequency AC waveform)
Correspond to high speed MPU bus interface
2 MHz (when VCC = 5V)
4-bit or 8-bit MPU interface enabled
80 8-bit display RAM (80 characters max.)
9,920-bit character generator ROM for a total of 240 character fonts
208 character fonts (5 8 dot)
167
HD44780U
64 8-bit character generator RAM
16-common 40-segment liquid crystal display driver
Programmable duty cycles
1/8 for one line of 5 8 dots with cursor
1/11 for one line of 5 10 dots with cursor
1/16 for two lines of 5 8 dots with cursor
Wide range of instruction functions:
Display clear, cursor home, display on/off, cursor on/off, display character blink, cursor shift,
display shift
Pin function compatibility with HD44780S
Automatic reset circuit that initializes the controller/driver after power on
Internal oscillator with external resistors
Low power consumption
Ordering Information
Type No. Package CGROM
HD44780UA00FS FP-80B Japanese standard font
HCD44780UA00 Chip
HD44780UA00TF TFP-80F
HD44780UA02FS FP-80B European standard font
HCD44780UA02 Chip
HD44780UA02TF TFP-80F
HD44780UBxxFS FP-80B Custom font
HCD44780UBxx Chip
HD44780UBxxTF TFP-80F
Note: xx: ROM code No.
168
HD44780U
HD44780U Block Diagram
OSC1 OSC2
CL1
CL2
M
Reset
circuit
Timing
ACL CPG generator
Instruction 7
register (IR) D
8
Display COM1 to
MPU Instruction
data RAM 16-bit Common COM16
RS inter- decoder
(DDRAM) shift signal
R/W face 80 8 bits register driver
E
Address 7 SEG1 to
counter 40-bit 40-bit Segment SEG40
8
7 shift latch signal
DB4 to register circuit driver
DB7
7
Input/ 8 Data 8
DB0 to output register
40
DB3 buffer (DR)
8 8 LCD drive
voltage
Busy selector
flag
Character Character
Cursor
generator generator
and
RAM ROM
blink
(CGRAM) (CGROM)
controller
64 bytes 9,920 bits
GND
5 5
Parallel/serial converter
and
attribute circuit
VCC
V1 V2 V3 V4 V5
169
HD44780U
LCD-II Family Comparison

Item HD44780S HD44780U
Power supply voltage 5 V 10% 2.7 to 5.5 V
Liquid crystal drive 1/4 bias 3.0 to 11.0V 3.0 to 11.0V
voltage VLCD 1/5 bias 4.6 to 11.0V 3.0 to 11.0V
Maximum display digits 16 digits (8 digits 2 lines) 16 digits (8 digits 2 lines)
per chip
Display duty cycle 1/8, 1/11, and 1/16 1/8, 1/11, and 1/16
CGROM 7,200 bits 9,920 bits
(160 character fonts for 5 (208 character fonts for 5
7 dot and 32 character fonts 8 dot and 32 character fonts
for 5 10 dot) for 5 10 dot)
CGRAM 64 bytes 64 bytes
DDRAM 80 bytes 80 bytes
Segment signals 40 40
Common signals 16 16
Liquid crystal drive waveform A A
Oscillator Clock source External resistor, external External resistor or external
ceramic filter, or external clock
clock
Rf oscillation 270 kHz 30% 270 kHz 30%
frequency (frame (59 to 110 Hz for 1/8 and (59 to 110 Hz for 1/8
frequency) 1/16 duty cycles; 43 to 80 and1/16 duty cycles; 43 to
Hz for 1/11 duty cycle) 80 Hz for 1/11 duty cycle)
Rf resistance 91 k 2% 91 k 2% (when VCC = 5V)
75 k 2% (when VCC = 3V)
Instructions Fully compatible within the HD44780S
CPU bus timing 1 MHz 1 MHz (when VCC = 3V)
2 MHz (when VCC = 5V)
Package FP-80 FP-80B
FP-80A TFP-80F
170
HD44780U
HD44780U Pin Arrangement (FP-80B)
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
SEG22 1 64 SEG39
SEG21 2 63 SEG40
SEG20 3 62 COM16
SEG19 4 61 COM15
SEG18 5 60 COM14
SEG17 6 59 COM13
SEG16 7 58 COM12
SEG15 8 57 COM11
SEG14 9 56 COM10
SEG13 10 55 COM9
SEG12 11 54 COM8
SEG11 12 FP-80B 53 COM7
SEG10 13 (Top view) 52 COM6
SEG9 14 51 COM5
SEG8 15 50 COM4
SEG7 16 49 COM3
SEG6 17 48 COM2
SEG5 18 47 COM1
SEG4 19 46 DB7
SEG3 20 45 DB6
SEG2 21 44 DB5
SEG1 22 43 DB4
GND 23 42 DB3
OSC1 24 41 DB2
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
OSC2
V1
V2
V3
V4
V5
CL1
CL2
DB0
DB1
VCC
M
D
RS
R/W
E
171
HD44780U
HD44780U Pin Arrangement (TFP-80F)
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
SEG39
SEG40
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
SEG20 1 60 COM16
SEG19 2 59 COM15
SEG18 3 58 COM14
SEG17 4 57 COM13
SEG16 5 56 COM12
SEG15 6 55 COM11
SEG14 7 54 COM10
SEG13 8 53 COM9
SEG12 9 52 COM8
SEG11 10 TFP-80F 51 COM7
SEG10 11 (Top view) 50 COM6
SEG9 12 49 COM5
SEG8 13 48 COM4
SEG7 14 47 COM3
SEG6 15 46 COM2
SEG5 16 45 COM1
SEG4 17 44 DB7
SEG3 18 43 DB6
SEG2 19 42 DB5
SEG1 20 41 DB4
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
GND
OSC1
OSC2
V1
V2
V3
V4
V5
CL1
CL2
VCC
M
D
RS
R/W
E
DB0
DB1
DB2
DB3
172
HD44780U
HD44780U Pad Arrangement
Chip size: 4.90 4.90 mm2

Coordinate: Pad center (m)
Origin: Chip center
Pad size: 114 114 m2
2 1 80 63
Type code
HD44780U
23 42
X
173
HD44780U
HCD44780U Pad Location Coordinates

Coordinate Coordinate
Pad No. Function X (um) Y (um) Pad No. Function X (um) Y (um)
1 SEG22 2100 2313 41 DB2 2070 2290
2 SEG21 2280 2313 42 DB3 2260 2290
3 SEG20 2313 2089 43 DB4 2290 2099
4 SEG19 2313 1833 44 DB5 2290 1883
5 SEG18 2313 1617 45 DB6 2290 1667
6 SEG17 2313 1401 46 DB7 2290 1452
7 SEG16 2313 1186 47 COM1 2313 1186
8 SEG15 2313 970 48 COM2 2313 970
9 SEG14 2313 755 49 COM3 2313 755
10 SEG13 2313 539 50 COM4 2313 539
11 SEG12 2313 323 51 COM5 2313 323
12 SEG11 2313 108 52 COM6 2313 108
13 SEG10 2313 108 53 COM7 2313 108
14 SEG9 2313 323 54 COM8 2313 323
15 SEG8 2313 539 55 COM9 2313 539
16 SEG7 2313 755 56 COM10 2313 755
17 SEG6 2313 970 57 COM11 2313 970
18 SEG5 2313 1186 58 COM12 2313 1186
19 SEG4 2313 1401 59 COM13 2313 1401
20 SEG3 2313 1617 60 COM14 2313 1617
21 SEG2 2313 1833 61 COM15 2313 1833
22 SEG1 2313 2073 62 COM16 2313 2095
23 GND 2280 2290 63 SEG40 2296 2313
24 OSC1 2080 2290 64 SEG39 2100 2313
25 OSC2 1749 2290 65 SEG38 1617 2313
26 V1 1550 2290 66 SEG37 1401 2313
27 V2 1268 2290 67 SEG36 1186 2313
28 V3 941 2290 68 SEG35 970 2313
29 V4 623 2290 69 SEG34 755 2313
30 V5 304 2290 70 SEG33 539 2313
31 CL1 48 2290 71 SEG32 323 2313
32 CL2 142 2290 72 SEG31 108 2313
33 VCC 309 2290 73 SEG30 108 2313
34 M 475 2290 74 SEG29 323 2313
35 D 665 2290 75 SEG28 539 2313
36 RS 832 2290 76 SEG27 755 2313
37 :
R/ 1022 2290 77 SEG26 970 2313
38 E 1204 2290 78 SEG25 1186 2313
39 DB0 1454 2290 79 SEG24 1401 2313
40 DB1 1684 2290 80 SEG23 1617 2313
174
HD44780U
Pin Functions
No. of Device
Signal Lines I/O Interfaced with Function
RS 1 I MPU Selects registers.
0: Instruction register (for write) Busy flag:
address counter (for read)
1: Data register (for write and read)
R/ : 1 I MPU Selects read or write.
0: Write
1: Read
E 1 I MPU Starts data read/write.
DB4 to DB7 4 I/O MPU Four high order bidirectional tristate data bus
pins. Used for data transfer and receive
between the MPU and the HD44780U. DB7 can
be used as a busy flag.
DB0 to DB3 4 I/O MPU Four low order bidirectional tristate data bus
pins. Used for data transfer and receive
between the MPU and the HD44780U.
These pins are not used during 4-bit operation.
CL1 1 O Extension driver Clock to latch serial data D sent to the
extension driver
CL2 1 O Extension driver Clock to shift serial data D
M 1 O Extension driver Switch signal for converting the liquid crystal
drive waveform to AC
D 1 O Extension driver Character pattern data corresponding to each
segment signal
COM1 to COM16 16 O LCD Common signals that are not used are changed
to non-selection waveforms. COM9 to COM16
are non-selection waveforms at 1/8 duty factor
and COM12 to COM16 are non-selection
waveforms at 1/11 duty factor.
SEG1 to SEG40 40 O LCD Segment signals
V1 to V5 5 Power supply Power supply for LCD drive
VCC V5 = 11 V (max)
VCC, GND 2 Power supply VCC: 2.7V to 5.5V, GND: 0V
OSC1, OSC2 2 Oscillation When crystal oscillation is performed, a resistor
resistor clock must be connected externally. When the pin
input is an external clock, it must be input to
OSC1.
175
HD44780U
Function Description
Registers
The HD44780U has two 8-bit registers, an instruction register (IR) and a data register (DR).
The IR stores instruction codes, such as display clear and cursor shift, and address information for display
data RAM (DDRAM) and character generator RAM (CGRAM). The IR can only be written from the
MPU.
The DR temporarily stores data to be written into DDRAM or CGRAM and temporarily stores data to be
read from DDRAM or CGRAM. Data written into the DR from the MPU is automatically written into
DDRAM or CGRAM by an internal operation. The DR is also used for data storage when reading data
from DDRAM or CGRAM. When address information is written into the IR, data is read and then stored
into the DR from DDRAM or CGRAM by an internal operation. Data transfer between the MPU is then
completed when the MPU reads the DR. After the read, data in DDRAM or CGRAM at the next address
is sent to the DR for the next read from the MPU. By the register selector (RS) signal, these two registers
can be selected (Table 1).
Busy Flag (BF)
When the busy flag is 1, the HD44780U is in the internal operation mode, and the next instruction will
:
not be accepted. When RS = 0 and R/ = 1 (Table 1), the busy flag is output to DB7. The next
instruction must be written after ensuring that the busy flag is 0.
Address Counter (AC)
The address counter (AC) assigns addresses to both DDRAM and CGRAM. When an address of an
instruction is written into the IR, the address information is sent from the IR to the AC. Selection of
either DDRAM or CGRAM is also determined concurrently by the instruction.
After writing into (reading from) DDRAM or CGRAM, the AC is automatically incremented by 1
(decremented by 1). The AC contents are then output to DB0 to DB6 when RS = 0 and R/ = 1 (Table:
1).
Table 1 Register Selection
RS R/ : Operation
0 0 IR write as an internal operation (display clear, etc.)
0 1 Read busy flag (DB7) and address counter (DB0 to DB6)
1 0 DR write as an internal operation (DR to DDRAM or CGRAM)
1 1 DR read as an internal operation (DDRAM or CGRAM to DR)
176
HD44780U
Display Data RAM (DDRAM)
Display data RAM (DDRAM) stores display data represented in 8-bit character codes. Its extended
capacity is 80 8 bits, or 80 characters. The area in display data RAM (DDRAM) that is not used for
display can be used as general data RAM. See Figure 1 for the relationships between DDRAM addresses
and positions on the liquid crystal display.
The DDRAM address (ADD) is set in the address counter (AC) as hexadecimal.
1-line display (N = 0) (Figure 2)

When there are fewer than 80 display characters, the display begins at the head position. For
example, if using only the HD44780, 8 characters are displayed. See Figure 3.
When the display shift operation is performed, the DDRAM address shifts. See Figure 3.
High order Low order

bits bits Example: DDRAM address 4E
AC
(hexadecimal) AC6 AC5 AC4 AC3 AC2 AC1 AC0 1 0 0 1 1 1 0
Figure 1 DDRAM Address
Display position
(digit) 1 2 3 4 5 79 80
DDRAM ..................
00 01 02 03 04 4E 4F
address
(hexadecimal)
Figure 2 1-Line Display
Display
position 1 2 3 4 5 6 7 8
DDRAM 00 01 02 03 04 05 06 07
address
For
shift left 01 02 03 04 05 06 07 08
For
shift right 4F 00 01 02 03 04 05 06
Figure 3 1-Line by 8-Character Display Example
177
HD44780U
2-line display (N = 1) (Figure 4)
Case 1: When the number of display characters is less than 40 2 lines, the two lines are
displayed from the head. Note that the first line end address and the second line start address are
not consecutive. For example, when just the HD44780 is used, 8 characters 2 lines are displayed.
See Figure 5.
When display shift operation is performed, the DDRAM address shifts. See Figure 5.
Display
position 1 2 3 4 5 39 40
00 01 02 03 04 .................. 26 27
DDRAM
address ..................
(hexadecimal) 40 41 42 43 44 66 67
Figure 4 2-Line Display
Display
position 1 2 3 4 5 6 7 8
DDRAM 00 01 02 03 04 05 06 07
address
40 41 42 43 44 45 46 47
For 01 02 03 04 05 06 07 08
shift left
41 42 43 44 45 46 47 48
For 27 00 01 02 03 04 05 06
shift right
67 40 41 42 43 44 45 46
178
HD44780U
Case 2: For a 16-character 2-line display, the HD44780 can be extended using one 40-output
extension driver. See Figure 6.
When display shift operation is performed, the DDRAM address shifts. See Figure 6.
Display
position 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
DDRAM 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
address
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
HD44780U display Extension driver

display
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10
For
shift left
41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50
For 27 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E
shift right
67 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E
179
HD44780U
Character Generator ROM (CGROM)
The character generator ROM generates 5 8 dot or 5 10 dot character patterns from 8-bit character
codes (Table 4). It can generate 208 5 8 dot character patterns and 32 5 10 dot character patterns.
User-defined character patterns are also available by mask-programmed ROM.
Character Generator RAM (CGRAM)
In the character generator RAM, the user can rewrite character patterns by program. For 5 8 dots, eight
character patterns can be written, and for 5 10 dots, four character patterns can be written.
Write into DDRAM the character codes at the addresses shown as the left column of Table 4 to show the
character patterns stored in CGRAM.
See Table 5 for the relationship between CGRAM addresses and data and display patterns.
Areas that are not used for display can be used as general data RAM.
Modifying Character Patterns
Character pattern development procedure
The following operations correspond to the numbers listed in Figure 7:
1. Determine the correspondence between character codes and character patterns.

2. Create a listing indicating the correspondence between EPROM addresses and data.
3. Program the character patterns into the EPROM.
4. Send the EPROM to Hitachi.
5. Computer processing on the EPROM is performed at Hitachi to create a character pattern listing,
which is sent to the user.
6. If there are no problems within the character pattern listing, a trial LSI is created at Hitachi and
samples are sent to the user for evaluation. When it is confirmed by the user that the character
patterns are correctly written, mass production of the LSI proceeds at Hitachi.
180
HD44780U
Hitachi User
Start
Computer Determine
1
processing character patterns
Create character Create EPROM

5 2
pattern listing address data listing
Evaluate Write EPROM 3

character
patterns
EPROM Hitachi 4
No
OK?
Yes
Art work
M/T
Masking
Trial
Sample
Sample 6
evaluation
No
OK?
Yes
Mass
production
Note: For a description of the numbers used in this figure, refer to the preceding page.
Figure 7 Character Pattern Development Procedure
181
HD44780U
Programming character patterns
This section explains the correspondence between addresses and data used to program character
patterns in EPROM. The HD44780U character generator ROM can generate 208 5 8 dot character
patterns and 32 5 10 dot character patterns for a total of 240 different character patterns.
Character patterns
EPROM address data and character pattern data correspond with each other to form a 5 8 or 5
10 dot character pattern (Tables 2 and 3).
Table 2 Example of Correspondence between EPROM Address Data and Character Pattern
(5 8 Dots)
EPROM Address Data
LSB
A 1 1A 1 0 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 O 4 O3 O2 O1 O0
0 0 0 0 1 0 0 0 0
0 0 0 1 1 0 0 0 0
0 0 1 0 1 0 1 1 0
0 0 1 1 1 1 0 0 1
0 1 0 0 1 0 0 0 1
0 1 0 1 1 0 0 0 1
0 1 1 0 1 1 1 1 0
0 1 1 0 0 0 1 0 0 1 1 1 0 0 0 0 0 Cursor position
1 0 0 0 0 0 0 0 0
1 0 0 1 0 0 0 0 0
1 0 1 0 0 0 0 0 0
1 0 1 1 0 0 0 0 0
1 1 0 0 0 0 0 0 0
1 1 0 1 0 0 0 0 0
1 1 1 0 0 0 0 0 0
1 1 1 1 0 0 0 0 0
Character code Line
position
Notes: 1. EPROM addresses A11 to A4 correspond to a character code.

2. EPROM addresses A3 to A0 specify a line position of the character pattern.
3. EPROM data O4 to O0 correspond to character pattern data.
4. EPROM data O5 to O7 must be specified as 0.
5. A lit display position (black) corresponds to a 1.
6. Line 9 and the following lines must be blanked with 0s for a 5 8 dot character fonts.
182
HD44780U
Handling unused character patterns
1. EPROM data outside the character pattern area: Always input 0s.
2. EPROM data in CGRAM area: Always input 0s. (Input 0s to EPROM addresses 00H to FFH.)
3. EPROM data used when the user does not use any HD44780U character pattern: According to
the user application, handled in one of the two ways listed as follows.
a. When unused character patterns are not programmed: If an unused character code is written
into DDRAM, all its dots are lit. By not programing a character pattern, all of its bits become
lit. (This is due to the EPROM being filled with 1s after it is erased.)
b. When unused character patterns are programmed as 0s: Nothing is displayed even if unused
character codes are written into DDRAM. (This is equivalent to a space.)
Table 3 Example of Correspondence between EPROM Address Data and Character Pattern
(5 10 Dots)
EPROM Address Data
LSB
A 1 1A 1 0 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 O 4 O3 O2 O1 O0
0 0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 0 0
0 0 1 0 0 1 1 0 1
0 0 1 1 1 0 0 1 1
0 1 0 0 1 0 0 0 1
0 1 0 1 1 0 0 0 1
0 1 1 0 0 1 1 1 1
0 1 0 1 0 0 1 0 0 1 1 1 0 0 0 0 1
1 0 0 0 0 0 0 0 1
1 0 0 1 0 0 0 0 1
1 0 1 0 0 0 0 0 0 Cursor position
1 0 1 1 0 0 0 0 0
1 1 0 0 0 0 0 0 0
1 1 0 1 0 0 0 0 0
1 1 1 0 0 0 0 0 0
1 1 1 1 0 0 0 0 0
Character code Line
position
Notes: 1. EPROM addresses A11 to A3 correspond to a character code.

2. EPROM addresses A3 to A0 specify a line position of the character pattern.
3. EPROM data O4 to O0 correspond to character pattern data.
4. EPROM data O5 to O7 must be specified as 0.
5. A lit display position (black) corresponds to a 1.
6. Line 11 and the following lines must be blanked with 0s for a 5 10 dot character fonts.
183
HD44780U
Table 4 Correspondence between Character Codes and Character Patterns (ROM Code: A00)
Upper 4
Lower Bits 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
4 Bits
CG
RAM
xxxx0000 (1)
xxxx0001 (2)
xxxx0010 (3)
xxxx0011 (4)
xxxx0100 (5)
xxxx0101 (6)
xxxx0110 (7)
xxxx0111 (8)
xxxx1000 (1)
xxxx1001 (2)
xxxx1010 (3)
xxxx1011 (4)
xxxx1100 (5)
xxxx1101 (6)
xxxx1110 (7)
xxxx1111 (8)
Note: The user can specify any pattern for character-generator RAM.
184
HD44780U
Table 4 Correspondence between Character Codes and Character Patterns (ROM Code: A02)
Upper 4
Lower Bits 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
4 Bits
CG
xxxx0000 RAM
(1)
xxxx0001 (2)
xxxx0010 (3)
xxxx0011 (4)
xxxx0100 (5)
xxxx0101 (6)
xxxx0110 (7)
xxxx0111 (8)
xxxx1000 (1)
xxxx1001 (2)
xxxx1010 (3)
xxxx1011 (4)
xxxx1100 (5)
xxxx1101 (6)
xxxx1110 (7)
xxxx1111 (8)
185
HD44780U
Table 5 Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character
Patterns (CGRAM Data)
For 5 8 dot character patterns
Character Codes Character Patterns

(DDRAM data) CGRAM Address (CGRAM data)
7 6 5 4 3 2 1 0 5 4 3 2 1 0 7 6 5 4 3 2 1 0
High Low High Low High Low
0 0 0 * * * 1 1 1 1 0
0 0 1 1 0 0 0 1
0 1 0 1 0 0 0 1
Character
0 1 1 1 1 1 1 0 pattern (1)
0 0 0 0 * 0 0 0 0 0 0
1 0 0 1 0 1 0 0
1 0 1 1 0 0 1 0
1 1 0 1 0 0 0 1
1 1 1 * * * 0 0 0 0 0 Cursor position
0 0 0 * * * 1 0 0 0 1
0 0 1 0 1 0 1 0
0 1 0 1 1 1 1 1
Character
0 1 1 0 0 1 0 0
0 0 0 0 * 0 0 1 0 0 1 pattern (2)
1 0 0 1 1 1 1 1
1 0 1 0 0 1 0 0
1 1 0 0 0 1 0 0
1 1 1 * * * 0 0 0 0 0 Cursor position
0 0 0 * * *
0 0 1
0 0 0 0 * 1 1 1 1 1 1
1 0 0
1 0 1
1 1 0
1 1 1 * * *
Notes: 1. Character code bits 0 to 2 correspond to CGRAM address bits 3 to 5 (3 bits: 8 types).
2. CGRAM address bits 0 to 2 designate the character pattern line position. The 8th line is the
cursor position and its display is formed by a logical OR with the cursor.
Maintain the 8th line data, corresponding to the cursor display position, at 0 as the cursor
display.
If the 8th line data is 1, 1 bits will light up the 8th line regardless of the cursor presence.
3. Character pattern row positions correspond to CGRAM data bits 0 to 4 (bit 4 being at the left).
4. As shown Table 5, CGRAM character patterns are selected when character code bits 4 to 7 are
all 0. However, since character code bit 3 has no effect, the R display example above can be
selected by either character code 00H or 08H.
5. 1 for CGRAM data corresponds to display selection and 0 to non-selection.
* Indicates no effect.
186
HD44780U
Table 5 Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character
Patterns (CGRAM Data) (cont)
For 5 10 dot character patterns
Character Codes Character Patterns

(DDRAM data) CGRAM Address (CGRAM data)
7 6 5 4 3 2 1 0 5 4 3 2 1 0 7 6 5 4 3 2 1 0
High Low High Low High Low
0 0 0 0 * * * 0 0 0 0 0
0 0 0 1 0 0 0 0 0
0 0 1 0 1 0 1 1 0
0 0 1 1 1 1 0 0 1
0 1 0 0 1 0 0 0 1 Character
0 0 0 0 * 0 0 * 0 0 0 1 0 1 1 0 0 0 1 pattern
0 1 1 0 1 1 1 1 0
0 1 1 1 1 0 0 0 0
1 0 0 0 1 0 0 0 0
1 0 0 1 1 0 0 0 0
1 0 1 0 * * * 0 0 0 0 0 Cursor position
1 0 1 1 * * * * * * * *
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1 * * * * * * * *
0 0 0 0 * * *
0 0 0 1
0 0 0 0 * 1 1 * 1 1 1 0 0 1
1 0 1 0 * * *
1 0 1 1 * * * * * * * *
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1 * * * * * * * *
Notes: 1. Character code bits 1 and 2 correspond to CGRAM address bits 4 and 5 (2 bits: 4 types).
Maintain the 11th line data corresponding to the cursor display positon at 0 as the cursor
display.
If the 11th line data is 1, 1 bits will light up the 11th line regardless of the cursor presence.
Since lines 12 to 16 are not used for display, they can be used for general data RAM.
3. Character pattern row positions are the same as 5 8 dot character pattern positions.
4. CGRAM character patterns are selected when character code bits 4 to 7 are all 0.
However, since character code bits 0 and 3 have no effect, the P display example above can be
selected by character codes 00H, 01H, 08H, and 09H.
5. 1 for CGRAM data corresponds to display selection and 0 to non-selection.
* Indicates no effect.
187
HD44780U
Timing Generation Circuit
The timing generation circuit generates timing signals for the operation of internal circuits such as
DDRAM, CGROM and CGRAM. RAM read timing for display and internal operation timing by MPU
access are generated separately to avoid interfering with each other. Therefore, when writing data to
DDRAM, for example, there will be no undesirable interferences, such as flickering, in areas other than
the display area.
Liquid Crystal Display Driver Circuit
The liquid crystal display driver circuit consists of 16 common signal drivers and 40 segment signal
drivers. When the character font and number of lines are selected by a program, the required common
signal drivers automatically output drive waveforms, while the other common signal drivers continue to
output non-selection waveforms.
Sending serial data always starts at the display data character pattern corresponding to the last address of
the display data RAM (DDRAM).
Since serial data is latched when the display data character pattern corresponding to the starting address
enters the internal shift register, the HD44780U drives from the head display.
Cursor/Blink Control Circuit
The cursor/blink control circuit generates the cursor or character blinking. The cursor or the blinking will
appear with the digit located at the display data RAM (DDRAM) address set in the address counter (AC).
For example (Figure 8), when the address counter is 08H, the cursor position is displayed at DDRAM
address 08H.
AC6 AC5 AC4 AC3 AC2 AC1 AC0
AC 0 0 0 1 0 0 0
For a 1-line display

Display position 1 2 3 4 5 6 7 8 9 10 11
DDRAM address
(hexadecimal) 00 01 02 03 04 05 06 07 08 09 0A
For a 2-line display cursor position
Display position 1 2 3 4 5 6 7 8 9 10 11
00 01 02 03 04 05 06 07 08 09 0A
DDRAM address
(hexadecimal)
40 41 42 43 44 45 46 47 48 49 4A
cursor position
Note: The cursor or blinking appears when the address counter (AC) selects the character
generator RAM (CGRAM). However, the cursor and blinking become meaningless.
The cursor or blinking is displayed in the meaningless position when the AC is a CGRAM address.
Figure 8 Cursor/Blink Display Example
188
HD44780U
Interfacing to the MPU

The HD44780U can send data in either two 4-bit operations or one 8-bit operation, thus allowing
interfacing with 4- or 8-bit MPUs.
For 4-bit interface data, only four bus lines (DB4 to DB7) are used for transfer. Bus lines DB0 to DB3
are disabled. The data transfer between the HD44780U and the MPU is completed after the 4-bit data
has been transferred twice. As for the order of data transfer, the four high order bits (for 8-bit
operation, DB4 to DB7) are transferred before the four low order bits (for 8-bit operation, DB0 to
DB3).
The busy flag must be checked (one instruction) after the 4-bit data has been transferred twice. Two
more 4-bit operations then transfer the busy flag and address counter data.
For 8-bit interface data, all eight bus lines (DB0 to DB7) are used.
RS
R/W
DB7 IR7 IR3 BF AC3 DR7 DR3
DB6 IR6 IR2 AC6 AC2 DR6 DR2
Instruction register (IR) Busy flag (BF) and Data register (DR)
write address counter (AC) read
read
Figure 9 4-Bit Transfer Example
189
HD44780U
Reset Function
Initializing by Internal Reset Circuit
An internal reset circuit automatically initializes the HD44780U when the power is turned on. The
following instructions are executed during the initialization. The busy flag (BF) is kept in the busy state
until the initialization ends (BF = 1). The busy state lasts for 10 ms after VCC rises to 4.5 V.
1. Display clear
2. Function set:
DL = 1; 8-bit interface data
N = 0; 1-line display
F = 0; 5 8 dot character font
3. Display on/off control:
D = 0; Display off
C = 0; Cursor off
B = 0; Blinking off
4. Entry mode set:
I/D = 1; Increment by 1
S = 0; No shift
Note: If the electrical characteristics conditions listed under the table Power Supply Conditions Using
Internal Reset Circuit are not met, the internal reset circuit will not operate normally and will fail
to initialize the HD44780U. For such a case, initial-ization must be performed by the MPU as
explained in the section, Initializing by Instruction.
Instructions
Outline
Only the instruction register (IR) and the data register (DR) of the HD44780U can be controlled by the
MPU. Before starting the internal operation of the HD44780U, control information is temporarily stored
into these registers to allow interfacing with various MPUs, which operate at different speeds, or various
peripheral control devices. The internal operation of the HD44780U is determined by signals sent from
the MPU. These signals, which include register selection signal (RS), read/
:
write signal (R/ ), and the data bus (DB0 to DB7), make up the HD44780U instructions (Table 6). There
are four categories of instructions that:
Designate HD44780U functions, such as display format, data length, etc.

Set internal RAM addresses
Perform data transfer with internal RAM
Perform miscellaneous functions
190
HD44780U
Normally, instructions that perform data transfer with internal RAM are used the most. However, auto-
incrementation by 1 (or auto-decrementation by 1) of internal HD44780U RAM addresses after each data
write can lighten the program load of the MPU. Since the display shift instruction (Table 11) can perform
concurrently with display data write, the user can minimize system development time with maximum
programming efficiency.
When an instruction is being executed for internal operation, no instruction other than the busy
flag/address read instruction can be executed.
Because the busy flag is set to 1 while an instruction is being executed, check it to make sure it is 0
before sending another instruction from the MPU.
Note: Be sure the HD44780U is not in the busy state (BF = 0) before sending an instruction from the
MPU to the HD44780U. If an instruction is sent without checking the busy flag, the time between
the first instruction and next instruction will take much longer than the instruction time itself.
Refer to Table 6 for the list of each instruc-tion execution time.
Table 6 Instructions
Execution Time
Code (max) (when fcp or
Instruction RS R/ : DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Description fOSC is 270 kHz)
Clear 0 0 0 0 0 0 0 0 0 1 Clears entire display and sets
display DDRAM address 0 in address
counter.
Return 0 0 0 0 0 0 0 0 1 Sets DDRAM address 0 in 1.52 ms
home address counter. Also returns
display from being shifted to
original position. DDRAM
contents remain unchanged.
Entry 0 0 0 0 0 0 0 1 I/D S Sets cursor move direction 37 s
mode set and specifies display shift.
These operations are
performed during data write
and read.
Display 0 0 0 0 0 0 1 D C B Sets entire display (D) on/off, 37 s
on/off cursor on/off (C), and blinking
control of cursor position character
(B).
Cursor or 0 0 0 0 0 1 S/C R/L Moves cursor and shifts 37 s
display display without changing
shift DDRAM contents.
Function 0 0 0 0 1 DL N F Sets interface data length 37 s
set (DL), number of display lines
(N), and character font (F).
Set 0 0 0 1 ACG ACG ACG ACG ACG ACG Sets CGRAM address. 37 s
CGRAM CGRAM data is sent and
address received after this setting.
Set 0 0 1 ADD ADD ADD ADD ADD ADD ADD Sets DDRAM address. 37 s
DDRAM DDRAM data is sent and
address received after this setting.
Read busy 0 1 BF AC AC AC AC AC AC AC Reads busy flag (BF) 0 s
flag & indicating internal operation is
address being performed and reads
address counter contents.
191
HD44780U
Table 6 Instructions (cont)
Execution Time
Code (max) (when fcp or
Instruction RS R/ : DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Description fOSC is 270 kHz)
Write data 1 0 Write data Writes data into DDRAM or 37 s
to CG or CGRAM. tADD = 4 s*
DDRAM
Read data 1 1 Read data Reads data from DDRAM or 37 s
from CG or CGRAM. tADD = 4 s*
DDRAM
I/D = 1: Increment DDRAM: Display data RAM Execution time
I/D = 0: Decrement CGRAM: Character generator changes when
S = 1: Accompanies display shift RAM frequency changes
S/C = 1: Display shift ACG: CGRAM address Example:
S/C = 0: Cursor move ADD: DDRAM address When fcp or fOSC is
R/L = 1: Shift to the right (corresponds to cursor
250 kHz,
R/L = 0: Shift to the left address) 270
37 s = 40 s
DL = 1: 8 bits, DL = 0: 4 bits AC: Address counter used for 250
N = 1: 2 lines, N = 0: 1 line both DD and CGRAM
F = 1: 5 10 dots, F = 0: 5 8 dots addresses
BF = 1: Internally operating
BF = 0: Instructions acceptable
Note: indicates no effect.
* After execution of the CGRAM/DDRAM data write or read instruction, the RAM address counter
is incremented or decremented by 1. The RAM address counter is updated after the busy flag
turns off. In Figure 10, tADD is the time elapsed after the busy flag turns off until the address
counter is updated.
Busy signal Busy state

(DB7 pin)
Address counter
(DB0 to DB6 pins) A A+1
t ADD
Note: t ADD depends on the operation frequency

t ADD = 1.5/(f cp or f OSC ) seconds
Figure 10 Address Counter Update
192
HD44780U
Instruction Description
Clear Display
Clear display writes space code 20H (character pattern for character code 20H must be a blank pattern)
into all DDRAM addresses. It then sets DDRAM address 0 into the address counter, and returns the
display to its original status if it was shifted. In other words, the display disappears and the cursor or
blinking goes to the left edge of the display (in the first line if 2 lines are displayed). It also sets I/D to 1
(increment mode) in entry mode. S of entry mode does not change.
Return Home
Return home sets DDRAM address 0 into the address counter, and returns the display to its original status
if it was shifted. The DDRAM contents do not change.
The cursor or blinking go to the left edge of the display (in the first line if 2 lines are displayed).
Entry Mode Set
I/D: Increments (I/D = 1) or decrements (I/D = 0) the DDRAM address by 1 when a character code is
written into or read from DDRAM.
The cursor or blinking moves to the right when incremented by 1 and to the left when decremented by 1.
The same applies to writing and reading of CGRAM.
S: Shifts the entire display either to the right (I/D = 0) or to the left (I/D = 1) when S is 1. The display
does not shift if S is 0.
If S is 1, it will seem as if the cursor does not move but the display does. The display does not shift when
reading from DDRAM. Also, writing into or reading out from CGRAM does not shift the display.
Display On/Off Control
D: The display is on when D is 1 and off when D is 0. When off, the display data remains in DDRAM,
but can be displayed instantly by setting D to 1.
C: The cursor is displayed when C is 1 and not displayed when C is 0. Even if the cursor disappears, the
function of I/D or other specifications will not change during display data write. The cursor is displayed
using 5 dots in the 8th line for 5 8 dot character font selection and in the 11th line for the 5 10 dot
character font selection (Figure 13).
B: The character indicated by the cursor blinks when B is 1 (Figure 13). The blinking is displayed as
switching between all blank dots and displayed characters at a speed of 409.6-ms intervals when f cp or fOSC
is 250 kHz. The cursor and blinking can be set to display simultaneously. (The blinking frequency
changes according to fOSC or the reciprocal of fcp. For example, when fcp is 270 kHz, 409.6 250/270 =
379.2 ms.)
193
HD44780U
Cursor or Display Shift
Cursor or display shift shifts the cursor position or display to the right or left without writing or reading
display data (Table 7). This function is used to correct or search the display. In a 2-line display, the
cursor moves to the second line when it passes the 40th digit of the first line. Note that the first and
second line displays will shift at the same time.
When the displayed data is shifted repeatedly each line moves only horizontally. The second line display
does not shift into the first line position.
The address counter (AC) contents will not change if the only action performed is a display shift.
Function Set
DL: Sets the interface data length. Data is sent or received in 8-bit lengths (DB7 to DB0) when DL is 1,
and in 4-bit lengths (DB7 to DB4) when DL is 0.When 4-bit length is selected, data must be sent or
received twice.
N: Sets the number of display lines.
F: Sets the character font.
Note: Perform the function at the head of the program before executing any instructions (except for the
read busy flag and address instruction). From this point, the function set instruction cannot be
executed unless the interface data length is changed.
Set CGRAM Address
Set CGRAM address sets the CGRAM address binary AAAAAA into the address counter.
Data is then written to or read from the MPU for CGRAM.
194
HD44780U
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Clear
Code 0 0 0 0 0 0 0 0 0 1
display
Return Code 0 0 0 0 0 0 0 0 0 1 Note: * Dont care.

home
Entry
Code 0 0 0 0 0 0 0 0 0 1
mode set
Display
Code 0 0 0 0 0 0 0 0 0 1
on/off control
Figure 11
Cursor or
Code 0 0 0 0 0 1 S/C R/L * * Note: * Dont care.
display shift
Function set Code 0 0 0 0 0 DL N F * *
Set CGRAM 0 0 0 0 A A A A A A
Code
address
Higher Lower
order bit order bit
Figure 12
195
HD44780U
Set DDRAM Address
Set DDRAM address sets the DDRAM address binary AAAAAAA into the address counter.
Data is then written to or read from the MPU for DDRAM.
However, when N is 0 (1-line display), AAAAAAA can be 00H to 4FH. When N is 1 (2-line display),
AAAAAAA can be 00H to 27H for the first line, and 40H to 67H for the second line.
Read Busy Flag and Address
Read busy flag and address reads the busy flag (BF) indicating that the system is now internally operating
on a previously received instruction. If BF is 1, the internal operation is in progress. The next instruction
will not be accepted until BF is reset to 0. Check the BF status before the next write operation. At the
same time, the value of the address counter in binary AAAAAAA is read out. This address counter is
used by both CG and DDRAM addresses, and its value is determined by the previous instruction. The
address contents are the same as for instructions set CGRAM address and set DDRAM address.
Table 7 Shift Function
S/C R/L
0 0 Shifts the cursor position to the left. (AC is decremented by one.)
0 1 Shifts the cursor position to the right. (AC is incremented by one.)
1 0 Shifts the entire display to the left. The cursor follows the display shift.
1 1 Shifts the entire display to the right. The cursor follows the display shift.
Table 8 Function Set
No. of
Display Duty
N F Lines Character Font Factor Remarks
0 0 1 5 8 dots 1/8
0 1 1 5 10 dots 1/11
1 * 2 5 8 dots 1/16 Cannot display two lines for 5 10 dot character font
Note: * Indicates dont care.
196
HD44780U
Cursor
5 8 dot 5 10 dot Alternating display

character font character font
Cursor display example Blink display example
Figure 13 Cursor and Blinking
Set DDRAM Code 0 0 1 A A A A A A A

address
Higher Lower
order bit order bit
Read busy flag Code 0 1 BF A A A A A A A

and address
Higher Lower
order bit order bit
Figure 14
197
HD44780U
Write Data to CG or DDRAM
Write data to CG or DDRAM writes 8-bit binary data DDDDDDDD to CG or DDRAM.
To write into CG or DDRAM is determined by the previous specification of the CGRAM or DDRAM
address setting. After a write, the address is automatically incremented or decremented by 1 according to
the entry mode. The entry mode also determines the display shift.
Read Data from CG or DDRAM
Read data from CG or DDRAM reads 8-bit binary data DDDDDDDD from CG or DDRAM.
The previous designation determines whether CG or DDRAM is to be read. Before entering this read
instruction, either CGRAM or DDRAM address set instruction must be executed. If not executed, the first
read data will be invalid. When serially executing read instructions, the next address data is normally
read from the second read. The address set instructions need not be executed just before this read
instruction when shifting the cursor by the cursor shift instruction (when reading out DDRAM). The
operation of the cursor shift instruction is the same as the set DDRAM address instruction.
After a read, the entry mode automatically increases or decreases the address by 1. However, display shift
is not executed regardless of the entry mode.
Note: The address counter (AC) is automatically incremented or decremented by 1 after the write
instructions to CGRAM or DDRAM are executed. The RAM data selected by the AC cannot be
read out at this time even if read instructions are executed. Therefore, to correctly read data,
execute either the address set instruction or cursor shift instruction (only with DDRAM), then just
before reading the desired data, execute the read instruction from the second time the read
instruction is sent.
Write data to
Code 1 0 D D D D D D D D
CG or DDRAM
Higher Lower
order bits order bits
Read data from

Code 1 1 D D D D D D D D
CG or DDRAM
Higher Lower
order bits order bits
Figure 15
198
HD44780U
Interfacing the HD44780U
Interface to MPUs
Interfacing to an 8-bit MPU

See Figure 17 for an example of using a I/O port (for a single-chip microcomputer) as an interface
device.
In this example, P30 to P37 are connected to the data bus DB0 to DB7, and P75 to P77 are connected
:
to E, R/ , and RS, respectively.
RS

R/W
Internal
operation
DB7
write
Data
Instruction
P30 to P37
P77
P76
P75
Functioning
Busy
Busy flag
check
8
Busy
Busy flag
check
Figure 16 Example of Busy Flag Check Timing Sequence
H8/325
E
RS
R/W
Figure 17 H8/325 Interface (Single-Chip Mode)

check
HD44780U
DB0 to DB7
Not
busy
Busy flag
COM1 to
COM16
SEG1 to
SEG40
16
40
Data
Instruction
write
LCD
199
HD44780U
Interfacing to a 4-bit MPU
The HD44780U can be connected to the I/O port of a 4-bit MPU. If the I/O port has enough bits, 8-bit
data can be transferred. Otherwise, one data transfer must be made in two operations for 4-bit data. In
this case, the timing sequence becomes somewhat complex. (See Figure 18.)
See Figure 19 for an interface example to the HMCS4019R.
Note that two cycles are needed for the busy flag check as well as for the data transfer. The 4-bit
operation is selected by the program.
RS
R/W

E
Internal
operation
DB7 IR7 IR3
Instruction
write
Functioning
Busy AC3
Busy flag
check
Note: IR7 , IR3 are the 7th and 3rd bits of the instruction.
AC3 is the 3rd bit of the address counter.
Figure 18 Example of 4-Bit Data Transfer Timing Sequence
HMCS4019R
D15
D14
D13
R10 to R13
4
RS
R/W
E
Not
busy AC3
Busy flag
check
HD44780
DB4 to DB7
COM1 to
COM16
SEG1 to
SEG40
16
40
D7 D3
Instruction
write
LCD
Figure 19 Example of Interface to HMCS4019R
200
HD44780U
Interface to Liquid Crystal Display
Character Font and Number of Lines: The HD44780U can perform two types of displays, 5 8 dot
and 5 10 dot character fonts, each with a cursor.
Up to two lines are displayed for 5 8 dots and one line for 5 10 dots. Therefore, a total of three
types of common signals are available (Table 9).
The number of lines and font types can be selected by the program. (See Table 6, Instructions.)
Connection to HD44780 and Liquid Crystal Display: See Figure 20 for the connection examples.
Table 9 Common Signals
Number of Lines Character Font Number of Common Signals Duty Factor

1 5 8 dots + cursor 8 1/8
1 5 10 dots + cursor 11 1/11
2 5 8 dots + cursor 16 1/16
HD44780
COM1
COM8
SEG1
SEG40
Example of a 5 8 dot, 8-character 1-line display (1/4 bias, 1/8 duty cycle)
HD44780
COM1
COM11
SEG1
SEG40
Figure 20 Liquid Crystal Display and HD44780 Connections
201
HD44780U
Since five segment signal lines can display one digit, one HD44780U can display up to 8 digits for a 1-
line display and 16 digits for a 2-line display.
The examples in Figure 20 have unused common signal pins, which always output non-selection
waveforms. When the liquid crystal display panel has unused extra scanning lines, connect the extra
scanning lines to these common signal pins to avoid any undesirable effects due to crosstalk during the
floating state (Figure 21).
HD44780
COM1
COM8
COM9
COM16
SEG1
SEG40
Figure 20 Liquid Crystal Display and HD44780 Connections (cont)
Cursor

Figure 21 Using COM9 to Avoid Crosstalk on Unneeded Scanning Line
202
HD44780U
Connection of Changed Matrix Layout: In the preceding examples, the number of lines correspond to
the scanning lines. However, the following display examples (Figure 22) are made possible by altering
the matrix layout of the liquid crystal display panel. In either case, the only change is the layout. The
display characteristics and the number of liquid crystal display characters depend on the number of
common signals or on duty factor. Note that the display data RAM (DDRAM) addresses for 4 characters
2 lines and for 16 characters 1 line are the same as in Figure 20.
Cursor

Figure 22 Changed Matrix Layout Displays
203
HD44780U
Power Supply for Liquid Crystal Display Drive

Various voltage levels must be applied to pins V1 to V5 of the HD44780U to obtain the liquid crystal
display drive waveforms. The voltages must be changed according to the duty factor (Table 10).
VLCD is the peak value for the liquid crystal display drive waveforms, and resistance dividing provides
voltages V1 to V5 (Figure 23).
Table 10 Duty Factor and Power Supply for Liquid Crystal Display Drive
Duty Factor
1/8, 1/11 1/16
Bias
Power Supply 1/4 1/5
V1 VCC1/4 VLCD VCC1/5 VLCD
V5 VCCVLCD VCCVLCD
VCC (+5 V) VCC (+5 V)
VCC VCC
R R
V1 V1
R
V2 R V2
VLCD R VLCD
V3 R V3
V4 R
V4
R R
V5 V5
VR VR
5 V 5 V
1/4 bias 1/5 bias
(1/8, 1/11 duty cycle) (1/16, duty cycle)
Figure 23 Drive Voltage Supply Example
204
HD44780U
Relationship between Oscillation Frequency and Liquid Crystal Display Frame

Frequency
The liquid crystal display frame frequencies of Figure 24 apply only when the oscillation frequency is
270 kHz (one clock pulse of 3.7 s).
1/8 duty cycle

400 clocks
COM1
1 2 3 4 8 1 2
VCC
V1
V2 (V3)
V4
V5
1 frame
1 frame = 3.7 s 400 8 = 11850 s = 11.9 ms

1
Frame frequency = = 84.3 Hz
11.9 ms
1/11 duty cycle

400 clocks
COM1
1 2 3 4 11 1 2
VCC
V1
V2 (V3)
V4
V5
1 frame
1 frame = 3.7 s 400 11 = 16300 s = 16.3 ms

1
16.3 ms
1/16 duty cycle

200 clocks
COM1
1 2 3 4 16 1 2
VCC
V1
V2
V3
V4
V5
1 frame
1 frame = 3.7 s 200 16 = 11850 s = 11.9 ms

1
11.9 ms
Figure 24 Frame Frequency
205
HD44780U
Instruction and Display Correspondence

8-bit operation, 8-digit 1-line display with internal reset
Refer to Table 11 for an example of an 8-digit 1-line display in 8-bit operation. The HD44780U
functions must be set by the function set instruction prior to the display. Since the display data RAM
can store data for 80 characters, as explained before, the RAM can be used for displays such as for
advertising when combined with the display shift operation.
Since the display shift operation changes only the display position with DDRAM contents unchanged,
the first display data entered into DDRAM can be output when the return home operation is
performed.
4-bit operation, 8-digit 1-line display with internal reset
The program must set all functions prior to the 4-bit operation (Table 12). When the power is turned
on, 8-bit operation is automatically selected and the first write is performed as an 8-bit operation.
Since DB0 to DB3 are not connected, a rewrite is then required. However, since one operation is
completed in two accesses for 4-bit operation, a rewrite is needed to set the functions (see Table 12).
Thus, DB4 to DB7 of the function set instruction is written twice.
8-bit operation, 8-digit 2-line display
For a 2-line display, the cursor automatically moves from the first to the second line after the 40th
digit of the first line has been written. Thus, if there are only 8 characters in the first line, the
DDRAM address must be again set after the 8th character is completed. (See Table 13.) Note that the
display shift operation is performed for the first and second lines. In the example of Table 13, the
display shift is performed when the cursor is on the second line. However, if the shift operation is
performed when the cursor is on the first line, both the first and second lines move together. If the
shift is repeated, the display of the second line will not move to the first line. The same display will
only shift within its own line for the number of times the shift is repeated.
Note: When using the internal reset, the electrical characteristics in the Power Supply Conditions Using
Internal Reset Circuit table must be satisfied. If not, the HD44780U must be initialized by
instructions. See the section, Initializing by Instruction.
206
HD44780U
Table 11 8-Bit Operation, 8-Digit 1-Line Display Example with Internal Reset
Instruction
Step
No. RS R/ : DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display Operation
1 Power supply on (the HD44780U is initialized by the internal Initialized. No display.
reset circuit)
2 Function set Sets to 8-bit operation and
0 0 0 0 1 1 0 0 * * selects 1-line display and 5 8
dot character font. (Number of
display lines and character fonts
cannot be changed after step
#2.)
3 Display on/off control Turns on display and cursor.
_
0 0 0 0 0 0 1 1 1 0 Entire display is in space mode
because of initialization.
4 Entry mode set Sets mode to increment the
_
0 0 0 0 0 0 0 1 1 0 address by one and to shift the
cursor to the right at the time of
write to the DD/CGRAM.
Display is not shifted.
5 Write data to CGRAM/DDRAM Writes H. DDRAM has already
H_
1 0 0 1 0 0 1 0 0 0 been selected by initialization
when the power was turned on.
The cursor is incremented by
one and shifted to the right.
6 Write data to CGRAM/DDRAM Writes I.
HI_
1 0 0 1 0 0 1 0 0 1
7

8 Write data to CGRAM/DDRAM Writes I.
HITACHI_
1 0 0 1 0 0 1 0 0 1
9 Entry mode set Sets mode to shift display at the
HITACHI_
0 0 0 0 0 0 0 1 1 1 time of write.
10 Write data to CGRAM/DDRAM Writes a space.
ITACHI _
1 0 0 0 1 0 0 0 0 0
207
HD44780U
Table 11 8-Bit Operation, 8-Digit 1-Line Display Example with Internal Reset (cont)
Instruction
Step
11 Write data to CGRAM/DDRAM Writes M.
1 0 0 1 0 0 1 1 0 1 Cursor

12

13 Write data to CGRAM/DDRAM Writes O.
MICROKO_
1 0 0 1 0 0 1 1 1 1
14 Cursor or display shift Shifts only the cursor position to
MICROKO
_
0 0 0 0 0 1 0 0 * * the left.
15 Cursor or display shift Shifts only the cursor position to
MICROKO
_
0 0 0 0 0 1 0 0 * * the left.
16 Write data to CGRAM/DDRAM Writes C over K.
ICROCO
_
1 0 0 1 0 0 0 0 1 1 The display moves to the left.
17 Cursor or display shift Shifts the display and cursor
MICROCO
_
0 0 0 0 0 1 1 1 * * position to the right.
18 Cursor or display shift Shifts the display and cursor
MICROCO_
0 0 0 0 0 1 0 1 * * position to the right.
19 Write data to CGRAM/DDRAM Writes M.
ICROCOM_
1 0 0 1 0 0 1 1 0 1
20

21 Return home Returns both display and cursor
HITACHI
_
0 0 0 0 0 0 0 0 1 0 to the original position (address
0).
208
HD44780U
Instruction
Step
No. RS R/ : DB7 DB6 DB5 DB4 Display Operation
reset circuit)
2 Function set Sets to 4-bit operation.
0 0 0 0 1 0 In this case, operation is
handled as 8 bits by initializa-
tion, and only this instruction
completes with one write.
3 Function set Sets 4-bit operation and selects
0 0 0 0 1 0 1-line display and 5 8 dot
0 0 0 0 * * character font. 4-bit operation
starts from this step and
resetting is necessary. (Number
of display lines and character
fonts cannot be changed after
step #3.)
4 Display on/off control Turns on display and cursor.
_
0 0 0 0 0 0 Entire display is in space mode
0 0 1 1 1 0 because of initialization.
5 Entry mode set Sets mode to increment the
0 0 0 0 0 0 address by one and to shift the
0 0 0 1 1 0 cursor to the right at the time of
6 Write data to CGRAM/DDRAM Writes H.
H_
1 0 0 1 0 0 The cursor is incremented by
1 0 1 0 0 0 one and shifts to the right.
Note: The control is the same as for 8-bit operation beyond step #6.
209
HD44780U
Instruction
Step
reset circuit)
2 Function set Sets to 8-bit operation and

0 0 0 0 1 1 1 0 * * selects 2-line display and 5 8
dot character font.
3 Display on/off control _
Turns on display and cursor. All
0 0 0 0 0 0 1 1 1 0 display is in space mode
because of initialization.
4 Entry mode set _
Sets mode to increment the
0 0 0 0 0 0 0 1 1 0 address by one and to shift the
cursor to the right at the time of
5 Write data to CGRAM/DDRAM H_ Writes H. DDRAM has already
1 0 0 1 0 0 1 0 0 0 been selected by initialization
when the power was turned on.
The cursor is incremented by
one and shifted to the right.
6

7 Write data to CGRAM/DDRAM HITACHI_ Writes I.
1 0 0 1 0 0 1 0 0 1
8 Set DDRAM address HITACHI Sets DDRAM address so that

0 0 1 1 0 0 0 0 0 0 _ the cursor is positioned at the
head of the second line.
210
HD44780U
Table 13 8-Bit Operation, 8-Digit 2-Line Display Example with Internal Reset (cont)
Instruction
Step
No. RS R/: DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display Operation
9 Write data to CGRAM/DDRAM HITACHI Writes M.
1 0 0 1 0 0 1 1 0 1 M_
10

11 Write data to CGRAM/DDRAM HITACHI Writes O.
1 0 0 1 0 0 1 1 1 1 MICROCO_
12 Entry mode set HITACHI Sets mode to shift display at the

0 0 0 0 0 0 0 1 1 1 MICROCO_ time of write.
13 Write data to CGRAM/DDRAM ITACHI Writes M. Display is shifted to

1 0 0 1 0 0 1 1 0 1 ICROCOM_ the left. The first and second
lines both shift at the same time.
14

15 Return home HITACHI
_ Returns both display and cursor
0 0 0 0 0 0 0 0 1 0 MICROCOM to the original position (address
0).
211
HD44780U
Initializing by Instruction
If the power supply conditions for correctly operating the internal reset circuit are not met, initialization
by instructions becomes necessary.
Refer to Figures 25 and 26 for the procedures on 8-bit and 4-bit initializations, respectively.
Power on
Wait for more than 15 ms Wait for more than 40 ms

after VCC rises to 4.5 V after VCC rises to 2.7 V
RS R/WDB7 DB6 DB5 DB4 DB3DB2 DB1 DB0 BF cannot be checked before this instruction.
0 0 0 0 1 1 * * * * Function set (Interface is 8 bits long.)
Wait for more than 4.1 ms
RS R/WDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 BF cannot be checked before this instruction.
Wait for more than 100 s
RS R/WDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 BF cannot be checked before this instruction.
BF can be checked after the following instructions.

When BF is not checked, the waiting time between
instructions is longer than the execution instuction
time. (See Table 6.)
Function set (Interface is 8 bits long. Specify the
RS R/WDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 number of display lines and character font.)
0 0 0 0 1 1 N F * * The number of display lines and character font
cannot be changed after this point.
0 0 0 0 0 0 1 0 0 0
0 0 0 0 0 0 0 0 0 1 Display off
0 0 0 0 0 0 0 1 I/D S Display clear
Entry mode set
Initialization ends
Figure 25 8-Bit Interface
212
HD44780U
Power on
Wait for more than 15 ms Wait for more than 40 ms

after VCC rises to 4.5 V after VCC rises to 2.7 V
RS R/W DB7 DB6 DB5 DB4 BF cannot be checked before this instruction.
0 0 0 0 1 1 Function set (Interface is 8 bits long.)
RS R/W DB7 DB6 DB5 DB4 BF can be checked after the following instructions.
0 0 0 0 1 0 When BF is not checked, the waiting time between
0 0 0 0 1 0 instructions is longer than the execution instuction
time. (See Table 6.)
0 0 N F * *
Function set (Set interface to be 4 bits long.)
0 0 0 0 0 0
Interface is 8 bits in length.
0 0 1 0 0 0
Function set (Interface is 4 bits long. Specify the
0 0 0 0 0 0
number of display lines and character font.)
0 0 0 0 0 1 The number of display lines and character font
0 0 0 0 0 0 cannot be changed after this point.
0 0 0 1 I/D S Display off
Display clear
Initialization ends Entry mode set
Figure 26 4-Bit Interface
213
HD44780U
Absolute Maximum Ratings*

Item Symbol Value Unit Notes
Power supply voltage (1) VCCGND 0.3 to +7.0 V 1
Power supply voltage (2) VCCV5 0.3 to +13.0 V 1, 2
Input voltage Vt 0.3 to VCC +0.3 V 1
Operating temperature Topr 20 to +75 C
Storage temperature Tstg 55 to +125 C 4
Note: * If the LSI is used above these absolute maximum ratings, it may become permanently damaged.
Using the LSI within the following electrical characteristic limits is strongly recommended for normal
operation. If these electrical characteristic conditions are also exceeded, the LSI will malfunction
and cause poor reliability.
214
HD44780U
DC Characteristics (VCC = 2.7 to 4.5 V, Ta = 20 to +75C*3)

Item Symbol Min Typ Max Unit Test Condition Notes*
Input high voltage (1) VIH1 0.7VCC VCC V 6
(except OSC1)
Input low voltage (1) VIL1 0.3 0.55 V 6
(except OSC1)
Input high voltage (2) VIH2 0.7VCC VCC V 15
(OSC1)
Input low voltage (2) VIL2 0.2VCC V 15
(OSC1)
Output high voltage (1) VOH1 0.75VCC V IOH = 0.1 mA 7
(DB0DB7)
Output low voltage (1) VOL1 0.2VCC V IOL = 0.1 mA 7
(DB0DB7)
Output high voltage (2) VOH2 0.8VCC V IOH = 0.04 mA 8
(except DB0DB7)
Output low voltage (2) VOL2 0.2VCC V IOL = 0.04 mA 8
(except DB0DB7)
Driver on resistance RCOM 2 20 k Id = 0.05 mA, 13
(COM) VLCD = 4 V
Driver on resistance RSEG 2 30 k Id = 0.05 mA, 13
(SEG) VLCD = 4 V
Input leakage current ILI 1 1 A VIN = 0 to VCC 9
Pull-up MOS current Ip 10 50 120 A VCC = 3 V
(DB0DB7, RS, R/ ) :
Power supply current ICC 0.15 0.30 mA Rf oscillation, 10, 14
external clock
VCC = 3 V,
fOSC = 270 kHz
LCD voltage VLCD1 3.0 11.0 V VCCV5, 1/5 bias 16
VLCD2 3.0 11.0 V VCCV5, 1/4 bias 16
Note: * Refer to the Electrical Characteristics Notes section following these tables.
215
HD44780U
AC Characteristics (VCC = 2.7 to 4.5 V, Ta = 20 to +75C*3)
Clock Characteristics
Item Symbol Min Typ Max Unit Test Condition Note*

External External clock frequency fcp 125 250 350 kHz 11
clock External clock duty Duty 45 50 55 %
operation
External clock rise time trcp 0.2 s
External clock fall time tfcp 0.2 s
Rf Clock oscillation fOSC 190 270 350 kHz Rf = 75 k, 12
oscillation frequency VCC = 3 V
Bus Timing Characteristics
Write Operation
Item Symbol Min Typ Max Unit Test Condition

Enable cycle time tcycE 1000 ns Figure 27
Enable pulse width (high level) PWEH 450
Enable rise/fall time tEr, tEf 25
Address set-up time (RS, R/ : to E) tAS 60
Address hold time tAH 20
Data set-up time tDSW 195
Data hold time tH 10
Read Operation

Data delay time tDDR 360
Data hold time tDHR 5
216
HD44780U
Interface Timing Characteristics with External Driver

Clock pulse width High level tCWH 800 ns Figure 29
Low level tCWL 800
Clock set-up time tCSU 500
Data set-up time tSU 300
Data hold time tDH 300
M delay time tDM 1000 1000
Clock rise/fall time tct 200
Power Supply Conditions Using Internal Reset Circuit

Power supply rise time t rCC 0.1 10 ms Figure 30
Power supply off time tOFF 1
217
HD44780U
DC Characteristics (VCC = 4.5 to 5.5 V, Ta = 20 to +75C*3)

Input high voltage (1) VIH1 2.2 VCC V 6
(except OSC1)
Input low voltage (1) VIL1 0.3 0.6 V 6
(except OSC1)
Input high voltage (2) VIH2 VCC1.0 VCC V 15
(OSC1)
Input low voltage (2) VIL2 1.0 V 15
(OSC1)
Output high voltage (1) VOH1 2.4 V IOH = 0.205 mA 7
(DB0DB7)
Output low voltage (1) VOL1 0.4 V IOL = 1.2 mA 7
(DB0DB7)
Output high voltage (2) VOH2 0.9 VCC V IOH = 0.04 mA 8
(except DB0DB7)
Output low voltage (2) VOL2 0.1 VCC V IOL = 0.04 mA 8
(except DB0DB7)
Driver on resistance RCOM 2 20 k Id = 0.05 mA, 13
(COM) VLCD = 4 V
Driver on resistance RSEG 2 30 k Id = 0.05 mA, 13
(SEG) VLCD = 4 V
Input leakage current ILI 1 1 A VIN = 0 to VCC 9
Pull-up MOS current Ip 50 125 250 A VCC = 5 V
(DB0DB7, RS, R/ ) :
Power supply current ICC 0.35 0.60 mA Rf oscillation, 10, 14
external clock
VCC = 5 V,
fOSC = 270 kHz
LCD voltage VLCD1 3.0 11.0 V VCCV5, 1/5 bias 16
VLCD2 3.0 11.0 V VCCV5, 1/4 bias 16
218
HD44780U
AC Characteristics (VCC = 4.5 to 5.5 V, Ta = 20 to +75C*3)
Clock Characteristics

External External clock frequency fcp 125 250 350 kHz 11
clock External clock duty Duty 45 50 55 % 11
operation
External clock rise time trcp 0.2 s 11
External clock fall time tfcp 0.2 s 11
Rf Clock oscillation frequency fOSC 190 270 350 kHz Rf = 91 k 12
oscillation VCC = 5.0 V
Write Operation

Data set-up time tDSW 80
Data hold time tH 10
Read Operation

Data delay time tDDR 160
Data hold time tDHR 5
219
HD44780U
Interface Timing Characteristics with External Driver

Clock pulse width High level tCWH 800 ns Figure 29
Low level tCWL 800
Clock set-up time tCSU 500
Data set-up time tSU 300
Data hold time tDH 300
M delay time tDM 1000 1000
Clock rise/fall time tct 100
Power Supply Conditions Using Internal Reset Circuit

Power supply rise time trCC 0.1 10 ms Figure 30
Power supply off time tOFF 1
220
HD44780U
Electrical Characteristics Notes

1. All voltage values are referred to GND = 0 V.
VCC
V1 A = VCC V5 The conditions of V1 and V5 voltages are for proper

A B = VCC V1 operation of the LSI and not for the LCD output level.
A 1.5 V The LCD drive voltage condition for the LCD output
V5 B 0.25 A level is specified as LCD voltage VLCD.
2. VCC V1 V2 V3 V4V5 must be maintained.

3. For die products, specified up to 75C.
4. For die products, specified by the die shipment specification.
5. The following four circuits are I/O pin configurations except for liquid crystal display output.
Input pin Output pin

Pin: E (MOS without pull-up) Pins: RS, R/W (MOS with pull-up) Pins: CL1, CL2, M, D
VCC VCC VCC
PMOS PMOS PMOS PMOS
(pull up MOS)
NMOS NMOS NMOS
I/O Pin
Pins: DB0 DB7 VCC VCC
(MOS with pull-up) (input circuit)
(pull-up MOS) PMOS PMOS
Input enable
NMOS
VCC
NMOS
PMOS Output enable
Data
NMOS
(output circuit)
(tristate)
221
HD44780U
6. Applies to input pins and I/O pins, excluding the OSC1 pin.
7. Applies to I/O pins.
8. Applies to output pins.
9. Current flowing through pullup MOSs, excluding output drive MOSs.
10. Input/output current is excluded. When input is at an intermediate level with CMOS, the excessive
current flows through the input circuit to the power supply. To avoid this from happening, the input
level must be fixed high or low.
11. Applies only to external clock operation.
Th Tl
Oscillator OSC1
0.7 VCC
0.5 VCC
Open OSC2 0.3 VCC
t rcp t fcp
Th
Duty = 100%
Th + Tl
12. Applies only to the internal oscillator operation using oscillation resistor Rf.
R f : 75 k 2% (when VCC = 3 V)
OSC1
R f : 91 k 2% (when VCC = 5 V)
Rf Since the oscillation frequency varies depending on the OSC1 and
OSC2 pin capacitance, the wiring length to these pins should be minimized.
OSC2
VCC = 5 V VCC = 3 V
500 500
400 400
f OSC (kHz)
f OSC (kHz)
300 300
(270) (270)
max. max.
200 typ. 200
typ.
min. min.
100 100
50 (91)100 150 50 (75) 100 150
R f (k ) R f (k )
222
HD44780U
13. RCOM is the resistance between the power supply pins (VCC, V1, V4, V5) and each common signal
pin (COM1 to COM16).
RSEG is the resistance between the power supply pins (VCC, V2, V3, V5) and each segment signal pin
(SEG1 to SEG40).
14. The following graphs show the relationship between operation frequency and current consumption.
VCC = 5 V VCC = 3 V
1.8 1.8
1.6 1.6
1.4 1.4
1.2 1.2
ICC (mA)
ICC (mA)
1.0 max. 1.0
0.8 0.8
0.6 typ.
0.6
max.
0.4 0.4
0.2 typ.
0.2
0.0 0.0
0 100 200 300 400 500 0 100 200 300 400 500
fOSC or fcp (kHz) fOSC or fcp (kHz)
15. Applies to the OSC1 pin.

16. Each COM and SEG output voltage is within 0.15 V of the LCD voltage (VCC, V1, V2, V3, V4, V5)
when there is no load.
223
HD44780U
Load Circuits
Data Bus DB0 to DB7
VCC = 5 V
For VCC = 4.5 to 5.5 V For VCC = 2.7 to 4.5 V

3.9 k
Test Test
point point
90 pF 11 k IS2074 H
50 pF
diodes
External Driver Control Signals: CL1, CL2, D, M
Test
point
30 pF
224
HD44780U
Timing Characteristics
VIH1 VIH1
RS VIL1 VIL1
tAS tAH
R/W VIL1 VIL1
PWEH tAH
tEf
E VIH1 VIH1
VIL1 VIL1 VIL1
tEr
tDSW tH
VIH1 VIH1
DB0 to DB7 VIL1 Valid data VIL1
tcycE
Figure 27 Write Operation
VIH1 VIH1
RS VIL1 VIL1
tAS tAH
R/W VIH1 VIH1
PWEH tAH
tEf
E VIH1 VIH1
VIL1 VIL1 VIL1
tEr
tDDR tDHR
VOH1 VOH1
DB0 to DB7 VOL1 * Valid data * VOL1
tcycE
Note: * VOL1 is assumed to be 0.8 V at 2 MHz operation.
Figure 28 Read Operation
225
HD44780U
tct
VOH2 VOH2
CL1 VOL2
tCWH
tCWH
tCSU
CL2 VOH2
VOL2
tCSU tCWL
tct
D VOH2
VOL2
tDH
tSU
VOH2
M
t DM
Figure 29 Interface Timing with External Driver
2.7 V/4.5 V*2

VCC
0.2 V 0.2 V 0.2 V
trcc tOFF*1
0.1 ms trcc 10 ms tOFF 1 ms
Notes: 1. tOFF compensates for the power oscillation period caused by momentary power supply
oscillations.
2. Specified at 4.5 V for 5-V operation, and at 2.7 V for 3-V operation.
3. For if 4.5 V is not reached during 5-V operation, the internal reset circuit will not operate
normally.
In this case, the LSI must be initialized by software. (Refer to the Initializing by
Instruction section.)
Figure 30 Internal Power Supply Reset
226
KS0073 34COM / 60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INTRODUCTION
KS0073 is a dot matrix LCD driver & controller LSI which is fabricated by low power CMOS technology.
It is capable of displaying 1, 2, or 4-lines with 58 or 68 dots format.
FUNCTIONS
Character type dot matrix LCD driver & controller

Internal driver: 34 common and 60 segment signal output
Easy interface with 4-bit or 8-bit MPU
Clock synchronized serial Interface
58 or 6x8 dot matrix possible
Extension driver interface possible
Bidirectional shift function
All character reverse display
Display shift per line
Voltage converter for LCD drive voltage:
13 V max (2 times / 3 times)
Various instruction functions
Automatic power on reset
FEATURES
Internal Memory
- Character Generator ROM (CGROM): 9600 bits. (240 characters 5 8 dot)
- Character Generator RAM (CGRAM): 648 bits. (8 characters 5 8 dot)
- Segment Icon RAM (SEGRAM): 168 bits. (96 icons max.)
- Display Data RAM (DDRAM): 808 bits. (80 characters max.)
Low power operation
- Power supply voltage range: 2.7 to 5.5 V (VDD)
- LCD Drive voltage range: 3.0 to 13.0 V (VDD to V5)
CMOS process
Programmable duty cycle: 1/17, 1/33 (Refer to Table 1.)
Internal oscillator with an external resistor
Low power consumptio
TCP or Bare chip available
Table 1. Programmable duty cycles
1) 5-dot font width

Display Single-chip Operation With Extension Driver
Line Duty Ratio Displayable Possible Displayable Possible
Numbers
characters icons characters icons
1 line of 24 1 line of 52
1 1/17 60 80
characters characters
2 lines of 24 2 lines of 32
2 1/33 60 80
4 1/33 60 80
2) 6-dot font width

Display Single-chip Operation With Extension Driver
Line Duty Ratio Displayable Possible Displayable Possible
Numbers
characters icons characters icons
1 line of 20 1 line of 50
1 1/17 60 96
2 1/33 60 96
4 1/33 60 96
BLOCK DIAGRAM
IE OSC1 OSC2 EXT
Power On Reset
Oscillator
(POR)
CLK1
RESET Timing Generator CLK2
M
IM
7
Instruction 34-bit
RS/ System Instruction Common
register Shift COM0 -
CS Interface Driver COM33
8 Decoder Register
Serial (IR)
E/ 4-bit/
SCLK Display data
8-bit RAM
RW/ Address (DDRAM)
SID Counter 80x8 bits D
7
7 8
60-bit 60-bit Segment
Latch SEG1 -
Data Shift SEG60
DB4 - 8 Driver
8 Register Register Circuit
DB7
(DR)
Input 8
DB3 - /Output 3 7 8 8
DB1 Buffer
Busy
D B 0/ Flag
SO D Character Character LCD
Cursor Driver
Segment Generator Generator & Blink Voltage
RAM RAM ROM Controller Selector
(SEGRAM) (CGROM) (CGROM)
Vci 16 bytes 64 bytes 9600 bits
C1 Voltage
C2 5
Converter 5/6 V1 - V5
V5OUT2
V5OUT3 Parallel to Serial converter
and Smooth Scroll Circuit
VDD
GND
(VSS)
PAD CONFIGURATIO
SEG45
SEG44
SEG43
SEG42
SEG41
SEG40
SEG39
SEG38
SEG37
SEG35
SEG24
SEG23
SEG22
SEG21
SEG20
SEG19
SEG18
SEG17
SEG16
SEG36
SEG34
SEG33
SEG32
SEG31
SEG30
SEG29
SEG28
SEG27
SEG25
SEG26
128
127
126
125
124
123
122
120
109
108
107
106
105
104
103
102
101
121
119
118
117
116
115
114
113
112
110
111
2
1
SEG46 3 100 SEG15

SEG47 4 99 SEG14
SEG48 5 98 SEG13
SEG49 6 97 SEG12
SEG50 7 96 SEG11
SEG51 8 95 SEG10
SEG52 9 94 SEG9
SEG53 10 93 SEG8
SEG54 11 92 SEG7
SEG55 12 91 SEG6
SEG56 13 Y 90 SEG5
SEG57 14 89 SEG4
SEG58 15 88 SEG3
SEG59 16 87 SEG2
SEG60 17 86 SEG1
COM9 18 85 COM0
COM10 19 84 COM1
COM11 20 (0, 0) X 83 COM2
COM12 21 82 COM3
COM13 22 CHIP SIZE: 4870 5770 81 COM4
COM14 23 PAD SIZE: 100 100 80 COM5
COM15 24 UNIT: m 79 COM6
COM16 25 78 COM7
COM25 26 77 COM8
COM26 27 76 COM17
COM27 28 75 COM18
COM28 29 74 COM19
COM29 30 73 COM20
COM30 31 72 COM21
COM31 32 71 COM22
COM32 33 70 COM23
COM33 34 69 COM24
VDD 35 68 V1
OSC2 36 67 V2
DB0/SOD 50
V5OUT2 62
V5OUT3 63
OSC1 37
EXT 44
VSS1 46
DB1 51
DB2 52
DB3 53
DB4 54
DB5 55
DB6 56
DB7 57
VSS2 61
V5 64
V4 65
V3 66
CLK1 38
CLK2 39
RS/CS 47
D 40
M 41
RESET 42
IM 43
IE 45
RW/SID 48
E/SCLK 49
Vci 58
C2 59
C1 60
PAD COORDINATE
PAD PAD COORDINATE PAD PAD COORDINATE PAD PAD COORDINATE PAD PAD COORDINATE
NO NAME NO NAME NO NAME NO NAME
X Y X Y X Y X Y
1 SEG44 -1687 2719 24 COM15 -2269 -616 47 RS/CS -611 -2719 70 COM23 2269 -1741
2 SEG45 -1812 2719 25 COM16 -2269 -741 48 RW/SID -486 -2719 71 COM22 2269 -1616
3 SEG46 -2269 2122 26 COM25 -2269 -866 49 E/SCLK -361 -2719 72 COM21 2269 -1491
4 SEG47 -2269 1997 27 COM26 -2269 -991 50 DB0/SOD -236 -2719 73 COM20 2269 -1366
5 SEG48 -2269 1872 28 COM27 -2269 -1116 51 DB1 -111 -2719 74 COM19 2269 -1241
6 SEG49 -2269 1747 29 COM28 -2269 -1241 52 DB2 14 -2719 75 COM18 2269 -1116
7 SEG50 -2269 1622 30 COM29 -2269 -1336 53 DB3 139 -2719 76 COM17 2269 -991
8 SEG51 -2269 1497 31 COM30 -2269 -1491 54 DB4 264 -2719 77 COM8 2269 -866
9 SEG52 -2269 1372 32 COM31 -2269 -1616 55 DB5 389 -2719 78 COM7 2269 -741
10 SEG53 -2269 1247 33 COM32 -2269 -1741 56 DB6 514 -2719 79 COM6 2269 -616
11 SEG54 -2269 1122 34 COM33 -2269 -1866 57 DB7 639 -2719 80 COM5 2269 -491
12 SEG55 -2269 997 35 VDD -2269 -1991 58 Vci 764 -2719 81 COM4 2269 -366
13 SEG56 -2269 872 36 OSC2 -2269 -2116 59 C2 889 -2719 82 COM3 2269 -241
14 SEG57 -2269 747 37 OSC1 -1816 -2719 60 C1 1014 -2719 83 COM2 2269 -116
15 SEG58 -2269 622 38 CLK1 -1736 -2719 61 VSS2 1139 -2719 84 COM1 2269 9
16 SEG59 -2269 497 39 CLK2 -1611 -2719 62 V5 OUT2 1264 -2719 85 COM0 2269 134
17 SEG60 -2269 372 40 D -1486 -2719 63 V5 OUT3 1389 -2719 86 SEG1 2269 372
18 COM9 -2269 134 41 M -1361 -2719 64 V5 1514 -2719 87 SEG2 2269 497
19 COM10 -2269 9 42 RESET -1236 -2719 65 V4 1639 -2719 88 SEG3 2269 622
20 COM11 -2269 -116 43 IM -1111 -2719 66 V3 1764 -2719 89 SEG4 2269 747
21 COM12 -2269 -241 44 EXT -986 -2719 67 V2 2269 -2116 90 SEG5 2269 872
22 COM13 -2269 -366 45 IE -861 -2719 68 V1 2269 -1991 91 SEG6 2269 997
23 COM14 -2269 -491 46 VSS1 -736 -2719 69 COM 24 2269 -1866 92 SEG7 2269 1122
(PAD COORDINATE CONTINUED)
COORDINATE COORDINATE COORDINATE COORDINATE

PAD PAD PAD PAD PAD PAD PAD PAD
NO. NAME NO. NAME NO. NAME NO. NAME
X Y X Y X Y X Y
93 SEG8 2269 1247 102 SEG17 1688 2719 111 SEG26 563 2719 120 SEG35 -562 2719
94 SEG9 2269 1372 103 SEG18 1563 2719 112 SEG27 438 2719 121 SEG36 -687 2719
95 SEG10 2269 1497 104 SEG19 1438 2719 113 SEG28 313 2719 122 SEG37 -812 2719
96 SEG11 2269 1622 105 SEG20 1313 2719 114 SEG29 188 2719 123 SEG38 -937 2719
97 SEG12 2269 1747 106 SEG21 1188 2719 115 SEG30 63 2719 124 SEG39 -1062 2719
98 SEG13 2269 1872 107 SEG22 1063 2719 116 SEG31 -62 2719 125 SEG40 -1187 2719
99 SEG14 2269 1997 108 SEG23 938 2719 117 SEG32 -187 2719 127 SEG41 -1312 2719
100 SEG15 2269 2122 109 SEG24 813 2719 118 SEG33 -312 2719 127 SEG42 -1437 2719
101 SEG16 1813 2719 110 SEG25 688 2719 119 SEG34 -437 2719 128 SEG43 -1562 2719
PIN CONFIGURATION OF TCP
A) TCP OUTLINE
OUTPUT SIDE
KS0073
DBO/SOD
V5OUT2
V5OUT3
RW/SID
E/SCLK
OSC2
OSC1
CLK1
RESET
CLK2
VSS2
RS/CS
VDD
VSS1
EXT
N C
DB1
DB2
DB3
DB4
DB5
DB6
DB7
NC
IM
V4
V3
Vci
V2
V1
V5
IE
M
C2
C1
D
KS0073
N C NC
VDD NC
OSC2 COM33
OSC1
CLK1
CLK2
...
9
8
7
6
5
4
3
11
17
16
15
14
13
12
10
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
M COM9
RESET 37 2
38 1 SEG60
IM 39 128
40 127
EXT 41 126
IE 42 125
43 124
VSS1 44 123
RS/CS 45 122
46 121
RW/SID 47 120
48 119
E/SCLK 49 118
DBO/SOD 50 117
51 116
DB1 52 115
53 114
........
DB2 54 113
55 112
DB3 111
56
134-TAB-35mm
DB4 57 110
58 109
DB5 59 108
KS0073 PAD DIAGRAM

60 107
DB6 61 106
DB7 62 105
63 104
Vci 64 103 SEG1
65 102
C2 66 101
C1 COM0
100
86
87
88
89
90
91
92
93
94
95
96
97
98
99
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
VSS2
V5OUT2
...
V5OUT3
V5
COM24
V4
V3 NC
V2
NC
V1
NC
34COM / 60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PIN DESCRIPTION
Input/
Pin(No) Name Description Interface
Output
VDD (35) for logical circuit (+3 V, +5 V)

VSS1, VSS2
0 V (GND)
(46, 61) -
V1 ~ V5 Power supply Power
Bias voltage level for LCD driving. Supply
(68~64)
Input voltage to the voltage converter to
Vci (58) Input generate LCD drive voltage
(Vci = 1.0 to 4.5 V).
SEG1 ~ SEG6
Output Segment output Segment signal output for LCD drive. LCD
(86~128, 1~17)
COM0 ~ COM33
Output Common output Common signal output for LCD drive. LCD
(85~69,18~34)
Input When using internal oscillator, connect External
OSC1,OSC2 (OSC1), external Rf resistor resistor /
Oscillator
(37,36) Output If external clock is used, connect it to oscillator
(OSC2) OSC1. (OSC1)
When EXT = High,
CLK1,CLK2 Latch(CLK1) / Extensio
Input each outputs latch clock and shift clock
(38,39) Shift(CLK2) clock driver
for extension driver.
To use the voltage converter (2 times /
C1,C2 External External
Input times), these pins must be connected to
(60,59) capacitance input capacitor
the external capacitance.
Alternated signal When EXT = High, outputs the
Extensio
M (41) Output for LCD driver out- alternating signal to convert LCD driver
driver
put waveform to AC for extension driver.
Display data When EXT = High, outputs extension Extensio
D (40) Output
interface driver data (the 61th dot's data) driver
When EXT = High, enables extension
Extension driver diver control signal, When EXT = Low,
EXT (44) Input -
control signal suppresses extra current consumption
and CLK1/CLK2/M/D should be open.
RESET (42) Input Reset pin Initialized to Low -
Selection When IE = Low, instruction set is
pin of selected as Table 10.
IE (45) Input -
instruction When IE = High, instruction set is
set selected as Table 6.
(Continued)
Input/
Pin(No) Name Description Interfac
Output
The value of Vci is converted twice. To use
Two times
the three times converter, the same V5 pin/
V5OUT2 (62) converter
capacitance as that of C1-C2 should be capacitance
output
Output connected here.
Three times
V5OUT3 (63) converter The value of Vci is converted three times. V5 pin
output
Interface Select Interface mode with the MPU.
IM (43) Input mode When IM = Low: Serial mode, -
selection When IM = High: 4-bit/8-bit bus mode.
In bus mode, used as register selection
input. When RS/CS = High, Data register is
selected. When RS/CS Low, Instruction
Register
register is selected.
RS/CS (47) Input select / MPU
In serial mode, used as chip selection input.
Chip select
When RS/CS = Low, selected.
When RS/CS = High, not selected
(Low access enable).
In bus mode, used as read/write selection
Read, write / input.
RW/SID (48) Input Serial input When RW/SID = High, read operation. MPU
data When RW/SID = Low, write operation.
In serial mode, used for data input pin.
Read, write In bus mode, used as read/write enable
E/SCLK (49) Input enable/Serial signal. MPU
clock In serial mode, used as serial clock input pin.
In 8-bit bus mode, used as lowest
Input Data bus 0 bit / bidirectional data bit. During 4-bit bus mode,
DB0/SOD (50) Output / Serial output open this pin. MPU
Output data In serial mode, used as serial data output
pin. If not in read operation, open this pin.
In 8-bit bus mode, used as low order
DB1 ~ DB3 bidirectional data bus.
MPU
(51 ~ 53) During 4-bit bus mode or serial mode, open
these pins.
Input,
Data bus 1 ~ 7 In 8-bit bus mode, used as high order
Output
bidirectional data bus. In 4-bit bus mode,
DB4 ~ DB7
used as both high and low order. MPU
(54 ~ 57)
DB7 used for Busy Flag output.
During serial mode, open these pins.
FUNCTION DESCRIPTION
System Interface
This chip has all three kinds of interface type with MPU: serial, 4-bit and 8-bit bus.
Serial and bus(4-bit/8-bit) are selected by IM input, and 4-bit bus and 8-bit bus are selected by the DL bit in the
instruction register.
During read or write operation, two 8-bit registers are used. one is the data register (DR), the other is the
instruction register(IR).
The data register(DR) is used as a temporary data storage place for being written into or read from
DDRAM/CGRAM/SEGRAM. Target RAM is selected by RAM address setting instruction. Each internal
operation, reading from or writing into RAM, is done automatically.
Hence, after MPU reads the DR data, the data in the next DDRAM/CGRAM/SEGRAM address is transferred into
DR automatically. Also, after MPU writes data to DR, the data in DR is transferred into DDRAM/CGRAM/
SEGRAM automatically.
The Instruction register (IR) is used only to store instruction code transferred from MPU.
MPU cannot use it to read instruction data.
To select register, use the RS/CS input pin in 4-bit/8-bit bus mode (IM High) or the RS bit in serial mode
(IM = Low).
Table 2. Various kinds of operations according to RS and R/W bits.

RS R/W Operation
0 0 Instruction Write operation (MPU writes Instruction code into IR)
0 1 Read Busy flag (DB7) and address counter (DB0 ~ DB6)
1 0 Data Write operation (MPU writes data into DR)
1 1 Data Read operation (MPU reads data from DR)
Busy Flag (BF)
When BF = High, it indicates that the internal operation is being processed. So during this time the next
instruction cannot be accepted. BF can be read, when RS = Low and R/W = High (Read Instruction Operation),
through the DB7 port. Before executing the next instruction, be sure that BF is not High.
Display Data RAM (DDRAM)
DDRAM stores display data of maximum 808 bits (80 characters).

DDRAM address is set in the address counter (AC) as a hexadecimal number (Refer to Fig-1).
MSB LSB
AC6 AC5 AC4 AC3 AC2 AC1 AC0
Fig-1. DDRAM Addres
1) Display of 5-dot font width character

(1) 5-dot 1 line display
In the case of a 1-line display with 5-dot font, the address range of DDRAM is 00H ~ 4FH (Refer to Fig-2).
When EXT High, extension driver will be used.
Fig-3 shows the example with 40 segment extension drivers added.
Display position
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
COM1 COM9
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17
COM8 COM16
SEG1 KS0073 SEG60 SEG1 KS0073 SEG60
DDRAM address
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
COM1 COM9
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18
COM8 COM16
(After Shift Left)
COM1 COM9
4F 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16
COM8 COM16
(After Shift Right)
Fig-2. 1-line X 24 ch. display (5-dot font width)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
COM1 COM9
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F
COM8 COM16
SEG1 KS0073 SEG60 SEG1 KS0073 SEG60 SEG1 SEG40
Extension Driver (40SEG)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
COM1 COM9
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20
COM8 COM16
(After Shift Left)
COM1 COM9
4F 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E
COM8 COM16
(After Shift Right)
Fig-3. 1-line X 32 ch. display with 40 SEG. extension driver (5-dot font width)
(2) 5-dot 2-line display

In the case of a 2-line display with 5-dot font, the address range of DDRAM is 00H27H, and 40H67H (Refer to
Fig-4). When EXT = High, the extension driver will be used.
Display position
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
COM1 COM9
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17
COM8 COM16
COM17 COM25
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57
COM24 COM32
DDRAM address
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
COM1 COM9
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18
COM8 COM16
COM17 COM25
41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58
COM24 COM32
(After Shift Left)
COM1 COM9
27 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16
COM8 COM16
COM17 COM25
67 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56
COM24 COM32
(After Shift Right)
Fig-4. 2-line 24 char. display (5-dot font width)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
COM1 COM9
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F
COM8 COM16
COM17 COM25
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F
COM32
COM24
SEG1 KS0073 SEG60 SEG1 KS0073 SEG 60 SEG1 SEG40
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
COM1 COM9
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20
COM8 COM16
COM17 COM25
41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60
COM24 COM32
(After Shift Left)
COM1 COM9
27 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E
COM8 COM16
COM17 COM25
67 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E
COM24 COM32
(After Shift Right)
Fig-5. 2-line 32 char. display with 40 SEG. extension driver (5-dot font width)

In the case of a 4-line display with 5-dot font, the address range of DDRAM is 00H13H, 20H33H, 40H53H,
60H73H (Refer to Fig-6).
When EXT=High, extension driver will be used. Fig-7 shows the example with 40 segment extension drivers
added.
1 2 3 4 5 6 7 8 9 10 11 12 Display position
COM1
00 01 02 03 04 05 06 07 08 09 0A 0B DDRAM address
COM8
COM9
20 21 22 23 24 25 26 27 28 29 2A 2B
COM16
COM17
40 41 42 43 44 45 46 47 48 49 4A 4B
COM24
COM25
60 61 62 63 64 65 66 67 68 69 6A 6B
COM32
SEG1 KS0073 SEG60
1 2 3 4 5 6 7 8 9 10 11 12
COM1
01 02 03 04 05 06 07 08 09 0A 0B 0C
COM8
COM9
21 22 23 24 25 26 27 28 29 2A 2B 2C
COM16
COM17
41 42 43 44 45 46 47 48 49 4A 4B 4C
COM24
COM25
61 62 63 64 65 66 67 68 69 6A 6B 6C
COM32
(After Shift Left)
1 2 3 4 5 6 7 8 9 10 11 12
COM1
13 00 01 02 03 04 05 06 07 08 09 0A
COM8
COM9
33 20 21 22 23 24 25 26 27 28 29 2A
COM16
COM17
53 40 41 42 43 44 45 46 47 48 49 4A
COM24
COM25
73 60 61 62 63 64 65 66 67 68 69 6A
COM32
(After Shift Right)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Display position
COM1
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 DDRAM address
COM8
COM9
20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33
COM16
COM17
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53
COM24
COM25
60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73
COM32
SEG1 KS0073 SEG60 SEG1 SEG40
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
COM1
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14
COM8
COM9
21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 20
COM16
COM17
41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 40
COM24
COM25
61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 60
COM32
(After Shift Left)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
COM1
13 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12
COM8
COM9
33 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32
COM16
COM17
53 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52
COM24
COM25
73 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72
COM32
(After Shift Right)
2) Display of 6-dot font width character

In the case of a 1-line display with 6-dot font, the address range of DDRAM is 00H4FH (Refer to Fig-8)
When EXT = High, extension driver will be used.
Fig-9 shows the example with 40 segment extension driver added.
Display position
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
COM1 COM9
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13
COM8 COM16
DDRAM address
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
COM1 COM9
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14
COM8 COM16
(After Shift Left)
COM1 COM9
4F 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12
COM8 COM16
(After Shift Right)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
COM1 COM9
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19
COM8 COM16
SEG1 KS0073 SEG60 SEG1 KS0073 SEG60 SEG1 SEG36
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
COM1 COM9
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A
COM8 COM16
(After Shift Left)

COM1 COM9
4F 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18
COM8 COM16
(After Shift Right)
Fig-9. 1-line 26char. display with 40 SEG. extension driver (6-dot font width)

In the case of a 2-line display with 6-dot font, the address range of DDRAM is 00H27H, and 40H67H (Refer to
Fig-10). When EXT = High, extension driver will be used.
Fig-11 shows an example with 40 segment extension drivers added.
Display position
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
COM1 COM9
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13
COM8 COM16
COM17 COM25
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53
COM24 COM32
DDRAM address
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
COM1 COM9
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14
COM8 COM16
COM17 COM25
41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54
COM24 COM32
(After Shift Left)
COM1 COM9
27 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12
COM8 COM16
COM17 COM25
67 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52
COM24 COM32
(After Shift Right)
Fig-10. 2-line 20char. display (6-dot font width)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
COM1 COM9
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19
COM8 COM16
COM17 COM25
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59
COM32
COM24
SEG1 KS0073 SEG 60 SEG1 KS0073 SEG60 SEG1 SEG36
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
COM1 COM9
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A
COM8 COM16
COM17 COM25
41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A
COM24 COM32
(After Shift Left)
COM1 COM9
27 00 01 02 03 04 05 06 07 08 09 0A 0B 0D 0D 0E 0F 10 11 12 13 14 15 16 17 18
COM8 COM16
COM17 COM25
67 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58
COM24 COM32
(After Shift Right)

In the case of a 4-line display with 6-dot font, the address range of DDRAM is 00H13H, 20H33H, 40H53H,
60H73H (Refer to Fig-12)
When EXT = High, the extension driver will be used.
1 2 3 4 5 6 7 8 9 10 Display position
COM1
00 01 02 03 04 05 06 07 08 09 DDRAM address
COM8
COM9
20 21 22 23 24 25 26 27 28 29
COM16
COM17
40 41 42 43 44 45 46 47 48 49
COM24
COM25
60 61 62 63 64 65 66 67 68 69
COM32
SEG1 KS0073 SEG60
1 2 3 4 5 6 7 8 9 10
COM1
01 02 03 04 05 06 07 08 09 0A
COM8
COM9
21 22 23 24 25 26 27 28 29 2A
COM16
COM17
41 42 43 44 45 46 47 48 49 4A
COM24
COM25
61 62 63 64 65 66 67 68 69 6A
COM32
(After Shift Left)
1 2 3 4 5 6 7 8 9 10
COM1
13 00 01 02 03 04 05 06 07 08
COM8
COM9
33 20 21 22 23 24 25 26 27 28
COM16
COM17
53 40 41 42 43 44 45 46 47 48
COM24
COM25
73 60 61 62 63 64 65 66 67 68
COM32
(After Shift Right)
Fig-12. 4-line 10char. display (6-dot font width)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Display position
COM1
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F DDRAM address
COM8
COM9
20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F
COM16
COM17
40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F
COM24
COM25
60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F
COM32
SEG1 KS0073 SEG60 SEG1 SEG36
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
COM1
01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10
COM8
COM9
21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30
COM16
COM17
41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50
COM24
COM25
61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70
COM32
(After Shift Left)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
COM1
13 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E
COM8
COM9
33 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E
COM16
COM17
53 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E
COM24
COM25
73 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 7E
COM32
(After Shift Right)
Timing Generation Circuit

The timing generation circuit generates clock signals for internal operations.
Address Counter (AC)

The address Counter (AC) stores DDRAM/CGRAM/SEGRAM address, transferred from IR.
After writing into (reading from) DDRAM/CGRAM/SEGRAM, AC is automatically increased (decreased) by 1.
When RS Low and R/W = High, AC can be read through DB0DB6 ports.
Cursor/Blink Control Circuit

It controls cursor/blink ON/OFF and black/white inversion at cursor position.
LCD Driver Circuit

The LCD Driver circuit has 34 common and 60 segment signals for LCD driving.
Data from SEGRAM/CGRAM/CGROM is transferred to a 60-bit segment latch serially, which is then stored to a
60-bit shift latch. When each common is selected by a 34-bit common register, segment data also outputs throug
a segment driver from a 100-bit segment latch.
In 1-line display mode, COM0 COM17 have a 1/17 duty ratio, and in 2-line or 4-line mode, COM0 COM33 hav
a 1/33 duty ratio.
CGROM (Character Generator ROM)

CGROM has 5 X 8-dot 240 characters pattern (Refer to Table 3).
Table 3. CGROM Character Code Table

CGRAM (Character Generator RAM)
CGRAM has up to eight 58-dot characters. By writing font data to CGRAM, user defined character can be use
(Refer to Table 4).
Table 4. Relationship between Character Code (DDRAM) and Character Pattern (CGRAM)
1) 5x8 dot Character pattern

Character Code (DDRAM data) CGRAM address CGRAM data Pattern
D7 D6 D5 D4 D3 D2 D1 D0 A5 A4 A3 A2 A1 A0 P7 P6 P5 P4 P3 P2 P1 P Number
0 0 0 0 X 0 0 0 0 0 0 0 0 0 B1 B0 X 0 1 1 1 0 pattern 1
0 0 1 1 0 0 0 1
0 1 0 1 0 0 0 1
0 1 1 1 1 1 1 1
1 0 0 1 0 0 0 1
1 0 1 1 0 0 0 1
1 1 0 1 0 0 0 1
1 1 1 0 0 0 0 0
. . . . .
. . . . .
0 0 0 0 X 1 1 1 1 1 1 0 0 0 B1 B0 X 1 0 0 0 1 pattern 8
0 0 1 1 0 0 0 1
0 1 0 1 0 0 0 1
0 1 1 1 1 1 1 1
1 0 0 1 0 0 0 1
1 0 1 1 0 0 0 1
1 1 0 1 0 0 0 1
1 1 1 0 0 0 0 0
2) 6x8 dot Character pattern

Character Code (DDRAM data) CGRAM address CGRAM data Pattern
D7 D6 D5 D4 D3 D2 D1 D0 A5 A4 A3 A2 A1 A0 P7 P6 P5 P4 P3 P2 P1 P Number
0 0 0 0 X 0 0 0 0 0 0 0 0 0 B1 B0 0 0 1 1 1 0 pattern 1
0 0 1 0 1 0 0 0 1
0 1 0 0 1 0 0 0 1
0 1 1 0 1 1 1 1 1
1 0 0 0 1 0 0 0 1
1 0 1 0 1 0 0 0 1
1 1 0 0 1 0 0 0 1
1 1 1 0 0 0 0 0 0
. . . . .
. . . . .
0 0 0 0 X 1 1 1 1 1 1 0 0 0 B1 B0 0 1 0 0 0 1 pattern 8
0 0 1 0 1 0 0 0 1
0 1 0 0 1 0 0 0 1
0 1 1 0 1 1 1 1 1
1 0 0 0 1 0 0 0 1
1 0 1 0 1 0 0 0 1
1 1 0 0 1 0 0 0 1
1 1 1 0 0 0 0 0 0
NOTE: 1. When BE (Blink Enable bit) = High, blink is controlled by B1 and B0 bit.
In displaying 5-dot font width, when B1 = 1, enabled dots in P0 P4 ports will blink,
and when B1 = 0 and B0 = 1, enabled dots in P4 port will blink.
When B1 = 0 and B0 = 0, blinking will not occur.
In displaying 6-dot font width, when B1 = 1, enabled dots of P0 P5 ports will blink,
and when B1 = 0 and B0 = 1, enabled dots of P5 port will blink.
When B1 = 0 and B0 = 0, blinking will not occur.
2. X: Dont care
SEGRAM (Segment lcon RAM)

SEGRAM has segment control data and segment pattern data. During 1-line display mode, COM0(COM17)
enables the data of SEGRAM to display icons.
When used in 2/4-line display mode COM0(COM33) does that.
The higher 2-bits are blinking control data, and the lower 6-bits are pattern data (Refer to Table 5 and Fig-14).
Table 5. Relationship between SEGRAM address and display pattern

SEGRAM SEGRAM data display pattern
address
5-dot font width 6-dot font width
A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D D7 D6 D5 D4 D3 D2 D1 D0
0 0 0 0 B1 B0 X S1 S2 S3 S4 S5 B1 B0 S1 S2 S3 S4 S5 S6
NOTE: 1. B1, B0 : Blinking control bit

Control Bit Blinking Port
BE B1 B0 5-dot font width 6-dot font width
0 X X No blink No blink
1 0 0 No blink No blink
1 0 1 D4 D5
1 1 X D4 D0 D5 D0
2. S1 S80: Icon pattern ON/OFF in 5-dot font width

S1 S96: Icon pattern ON/OFF in 6-dot font width
3. X: Dont care
1) 5-dot font width (FW = 0)
S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S56 S57 S58 S59 S60 S61 S62 S63 S64 S65
S S S S S S S S S S S S S S S S S S S S S S S S S
E E E E E E E E E E E E E E E E E E E E E E E E E
G G G G G G G G G G G G G G G. . . G G G G G G G G G G
1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 5 5 5 5 6 6 6 6 6 6
0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5
Extension
Driver
2) 6-dot font width (FW = 1)
S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12S13 S14S15 S16 S17 S18 S55S56 S57S58 S59 S60 S61S62S63 S64 S65 S66
S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S
E E E E E E E E E E E E E E E E E E E E E E E E E E E E E E
G G G G G G G G G G G G G G G G G G... G G G G G G G G G G G G
1 2 3 4 5 6 7 8 9 1 1 1 1 1 1 1 1 1 5 5 5 5 5 6 6 6 6 6 6 6
0 1 2 3 4 5 6 7 8 5 6 7 8 9 0 1 2 3 4 5 6
Extension
Driver
Fig-14. Relationship between SEGRAM and segment display

INSTRUCTION DESCRIPTION
OUTLINE
To overcome the speed difference between the internal clock of KS0073 and the MPU clock, KS0073 performs
internal operation by storing control information to IR or DR. The internal operation is determined according to th
signal from MPU, composed of read/write and data bus (Refer to Table 6 and Table 10).
Instruction can be divided largely into four kinds,
(1) KS0073 function set instructions (set display methods, set data length, etc.)
(2) address set instructions to internal RAM
(3) data transfer instructions with internal RAM
(4) others.
The address of internal RAM is automatically increased or decreased by 1.
When IE High, KS0073 is operated according to Instruction Set 1 (Table 6) and

when IE = Low, KS0073 is operated according to Instruction Set 2 (Table 10).
NOTE: During internal operation, Busy Flag (DB7) reads High. Busy Flag check must precede the next
instruction.
When an MPU program with Busy Flag (DB7) checking is made, 1/2Fosc is necessary for executing
the next instruction by the falling edge of the E signal after the Busy Flag (DB7) goes to Low.
(1) INSTRUCTION DESCRIPTION 1 (IE = High)
Table 6. Instruction Set 1 (IE = High)

Instruction Code Execution
Time
Instruction RE Description
RSR/WDB7DB6DB5DB4DB3DB2DB1DB0 (fosc
270 kHz)
Clear Write 20H to DDRAM. and set
X 0 0 0 0 0 0 0 0 0 1 1.53 ms
Display DDRAM address t 00H from AC.
Set DDRAM address to 00H from AC
Return and return cursor to its original position
0 0 0 0 0 0 0 0 0 1 X 1.53 ms
Home if shifted. The contents of DDRAM ar
not changed.
Power Set power down mode bit.
Down 1 0 0 0 0 0 0 0 0 1 PD (PD = 1:power down mode set, 39 s
Mode PD = 0:power down mode disable)
Assign cursor moving direction.
(I/D = 1: increment,
I/D = 0: decrement).
and display shift enable bit.
0 0 0 0 0 0 0 0 1 I/D S 39 s
(S = 1: make display shift of the
Entry enabled lines by the DS4DS1 bits in
Mode Set the Shift Enable instruction.
S = 0:display shift disable)
Segment bidirectional function.
1 0 0 0 0 0 0 0 1 1 BID (BID = 1: Seg60Seg1, 39 s
BID = 0: Seg1Seg60)
Set display/cursor/blink on/off
(D = 1: display on,
Display D = 0: display off,
ON/OFF 0 0 0 0 0 0 0 1 D C B C = 1: cursor on, 39 s
Control C = 0: cursor off,
B = 1: blink on,
B = 0: blink off).
Assign font width, black/white inverting
of cursor, and 4-line display mode
control bit.
(FW = 1: 6-dot font width,
Extended FW = 0: 5-dot font width,
function 1 0 0 0 0 0 0 1 FW B/W NW B/W = 1: black/white inverting of 39 s
set cursor enable,
B/W = 0: black/white inverting of
cursor disable
NW 1: 4-line display mode,
NW 0: 1-line or 2-line display mode)
(Table 6. continued)

Instruc- Time
RE Description
tion RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 (fosc =
270 kHz)
Cursor or display shift.
Cursor or (S/C = 1: display shift,
Display 0 0 0 0 0 0 1 S/C R/L X X S/C = 0: cursor shift, 39 s
Shift R/L = 1: shift to right,
R/L = 0: shift to left)
(When DH = 1)
Determine the line for display shift.
Shift (DS1 = 1/0: 1st line display shift enable/disable
Enable 1 0 0 0 0 0 1 DS4 DS3 DS2 DS1 39 s
DS2 = 1/0: 2nd line display shift enable/disable
DS3 = 1/0: 3rd line display shift enable/disable
DS4 = 1/0: 4th line display shift enable/disable)
(when DH = 0)
Determine the line for horizontal smooth scroll.
Scroll (HS1 = 1/0: 1st line dot scroll enable/disable
1 0 0 0 0 0 1 HS4 HS3 HS2 HS1 39 s
Enable HS2 = 1/0: 2nd line dot scroll enable/disable
HS3 = 1/0: 3rd line dot scroll enable/disable
HS4 = 1/0: 4th line dot scroll enable/disable).
Set interface data length,
(DL = 1: 8-bit, DL = 0: 4-bit),
numbers of display line when NW = 0,
(N = 1: 2-line, N = 0: 1-line),
extension register, RE(0),
RE
0 0 0 0 0 1 DL N DH REV shift/scroll enable, 39 s
(0)
(DH = 1: display shift enable
DH = 0: dot scroll enable),
and reverse bit
Function (REV = 1: reverse display,
Set REV = 0: normal display)
Set DL, N, RE(1) and
CGRAM/SEGRAM blink enable (BE)
RE (BE = 1/0: CGRAM/SEGRAM blink
1 0 0 0 0 1 DL N BE LP 39 s
(1) enable/disable
LP = 1: low power mode,
LP = 0: normal operation mode)

Time
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 (fosc
270 kHz)
Set
CGRAM Set CGRAM address in address
0 0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 39 s
Address counter.
Set Set SEGRAM address in

SEGRAM address counter.
1 0 0 0 1 X X AC3 AC2 AC1 AC0 39 s
Address
Set
DDRAM 0 0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in address 39 s
Address counter.
Set
Scroll Set the quantity of horizontal dot
1 0 0 1 X SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 39 s
Quantity scroll.
Can be known whether during

internal operation or not by
Read reading BF.
Busy Flag X 0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 The contents of address counter 0 s
and Address can also be read.
(BF = 1: busy state,
BF = 0: ready state)
Write Write data into internal RAM
X 1 0 D7 D6 D5 D4 D3 D2 D1 D0 43 s
Data (DDRAM/CGRAM/SEGRAM)
Read Read data from internal RAM
X 1 1 D7 D6 D5 D4 D3 D2 D1 D0 43 s
* NOTE: When an MPU program with Busy Flag (DB7) checking is made, 1/2Fosc is necessary for executing
the next instruction by the falling edge of the E signal after the Busy Flag (DB7) goes to Low.
X : Don't care
1) Display Clear

0 0 0 0 0 0 0 0 0 1
Clear all the display data by writing 20H (space code) to all DDRAM address, and set DDRAM address
to 00H into AC (address counter). Return cursor to the original status, bringing the cursor to the left
edge on first line of the display. Make entry mode increment (I/D = 1).
2) Return Home: (RE = 0)

0 0 0 0 0 0 0 0 1 X
Return Home is a cursor return home instruction.

Set DDRAM address to 00H into the address counter. Return cursor to its original site and return display
to its original status, if shifted.
Contents of DDRAM does not change.
3) Power Down Mode Set: (RE = 1)

0 0 0 0 0 0 0 0 1 PD
Power down mode enable bit set instruction.

PD = High, it makes KS0073 suppress current consumption except the current needed for data storage
by executing the next three functions.
1. make the output value of all the COM/SEG ports VDD
2. make the COM/SEG output value of the extension driver VDD by setting D output to High
and M output to Low
3. disable voltage converter to remove the current through the divide resistor of power
supply.
This instruction can be used as power sleep mode.
When PD = Low, power down mode becomes disabled.
4) Entry Mode Set
(1) RE = 0

0 0 0 0 0 0 0 1 I/D S
Set the moving direction of cursor and display.

I/D: Increment / decrement of DDRAM address (cursor or blink)
When I/D = High, cursor/blink moves to right and DDRAM address is increased by 1.
When I/D = Low, cursor/blink moves to left and DDRAM address is decreased by 1.
* CGRAM/SEGRAM operates the same as DDRAM, when reading from or writing to CGRAM/SEGRAM.
When S = High, after DDRAM write, the display of enabled line by DS1 - DS4 bits in the Shift Enabl
instruction is shifted to the right (I/D = 0) or to the left (I/D = 1). But it will seem as if the cursor does
not move.
When S = Low, or DDRAM read, or CGRAM/SEGRAM read/write operation, shift of display as the
above function is not performed.
(2) RE = 1
0 0 0 0 0 0 0 1 1 BID
Set the data shift direction of segment in the application set.

BID: Data Shift Direction of Segment
When BID = Low, segment data shift direction is set to normal order, from SEG1 to SEG60.
When BID = High, segment data shift direction is set reversely. from SEG60 to SEG1.
By using this instruction, the efficiency of the application board area can be raised.
* The BID setting instruction is recommended to be set at the same time level as the function set instruction.
* DB1 bit must be set to 1.
5) Display ON/OFF Control (RE = 0)

0 0 0 0 0 0 1 D C B
Control display/cursor/blink ON/OFF 1 bit register.

D: Display ON/OFF control bit
When D = High, entire display is turned on.
When D = Low, display is turned off, but display data remains in DDRAM.
C: Cursor ON/OFF control bit

When C = High, cursor is turned on.
When C = Low, cursor is disappeared in current display, but I/D register preserves its data.
B: Cursor Blink ON/OFF control bit

When B High, cursor blink is on, that performs alternately between all the high data and display character
at the cursor position. If fosc has a frequency of 270 kHz, blinking has a 370 ms interval.
When B Low, blink is off.
6) Extended Function Set (RE = 1)

0 0 0 0 0 0 1 F/W B/W NW
FW: Font Width control

When FW = High, display character font width is assigned to 6-dot, and the execution time becomes 6/5 times
than that of the 5-dot font width.
The user font, specified in CGRAM, is displayed into 6-dot font width, bit-5 to bit-0, including the left
space bit of CGRAM (Refer to Fig-15).
When FW = Low, 5-dot font width is set.
B/W: Black/White Inversion enable bit

When B/W = High, black/white inversion at the cursor position is set. In this case, C/B bit of display
ON/OFF control instruction becomes a dont care condition. If fosc has frequency of 270 kHz, inversion has
370 ms intervals.
NW: 4 Line mode enable bit

When NW = High, 4-line display mode is set. In this case, N bit of function set instruction becomes
a do t care condition.
6-bit 6-bit
s CGROM 8 CGRAM 8
p character character
a b b
font font i
c i
e (5-dot) (6-dot) t
t
(CGROM) (CGRAM)
Fig-15. 6-dot font width CGROM/CGRAM
7) Cursor or Display Shift (RE = 0)

0 0 0 0 0 1 S/C R/L - -
Shifts right/left cursor position or display without writing or reading of display data.
This instruction is used to correct or search display data (Refer to Table 7).
During 2-line mode display, cursor moves to the 2nd line after the 40th digit of the 1st line.
In 4-line mode, cursor moves to the next line, only after every 20th digit of the current line.
Note that display shift is performed simultaneously in all the lines enabled by DS1 - S4 in the Shift Enable
instruction.
When displayed data is shifted repeatedly, each line is shifted individually.
When display shift is performed, the contents of the address counter are not changed.
During low power consumption mode, display shift may not be performed normally.
Table 7. Shift patterns according to S/C and R/L bits

S/C R/L Operation
0 0 Shift cursor to the left, ADDRESS COUNTER is decreased by 1
0 1 Shift cursor to the right, ADDRESS COUNTER is increased by 1
1 0 Shift all the display to the left, cursor moves according to the display
1 1 Shift all the display to the right, cursor moves according to the display
8) Shift/Scroll Enable (RE = 1)
(1) DH = 0

0 0 0 0 0 1 HS4 HS3 HS2 HS1
HS: Horizontal Scroll per Line Enable

This instruction makes valid dot shifts by a display line unit.
HS1, HS2, HS3 and HS4 indicate each line to be dot scrolled, and each scroll is performed individually in
each line.
If the line, in 1-line display mode or the 1st line in 2-line display mode is to be scrolled, set HS1 and HS2 to
High. If the 2nd line scroll is needed in 2-line mode, set HS3 and HS4 to High (Refer to Table 8).
(2) (DH = 1)

0 0 0 0 0 1 DS4 DS3 DS2 DS1
DS: Display Shift per Line Enable

This instruction selects the line to be shifted according to each line mode in display shift right/left
instruction. DS1, DS2, DS3 and DS4 indicate each line to be shifted, and each shift is performed individually
in each line.
If DS1 and DS2 are set to High (enable) in 2-line mode, only 1st line is shifted, and the 2nd line is not
shifted. When only DS1 High, only half of the 1st line is shifted. If all the DS bits (DS1 to DS4) are set to
Low (disable), no display is shifted.
Table 8. Relationship between DS and COM signal

Enabled common signals
Enable bit Description
during shift
HS1/DS1 COM1 ~ COM8
HS2/DS2 COM9 ~ COM16 The part of display line that corresponds to enabled
HS3/DS3 COM17 ~ COM24 common signal can be shifted.
HS4/DS4 COM25 ~ COM32

9) Function Set
(1) (RE = 0)

RE
0 0 0 0 1 DL N DH REV
(0)
DL: Interface data length control bit

When DL = High, it means 8-bit bus mode with MPU.
When DL = Low, it means 4-bit bus mode with MPU. Hence, DL is a signal to select 8-bit or 4-bit bus mode.
In 4-bit bus mode, it is required to transfer 4-bit data twice.
N: Display line number control bit

It is variable only when NW bit of extended function set instruction is Low.
When N = Low, 1-line display mode is set.
When N = High, 2-line display mode is set.
When NW = High, N bit is invalid, 4-line mode independent of N bit.
RE: Extended function registers enable bit

At this instruction, RE must be Low.
DH: Display shift enable selection bit.

When DH = High, enables display shift per line.
When DH = Low, enables smooth dot scroll.
This bit can be accessed only when IE pin input is High.
REV: Reverse enable bit

When REV = High, all the display data are reversed. i.e., all the white dots become black and black
dots become white.
When REV = Low, the display mode is set to normal display.
(2) (RE = 1)

RE
0 0 0 0 1 DL N BE LP
(1)
DL: Interface data length control bit

When DL = Low, it means 4-bit bus mode with MPU. Hence, DL is a signal to select
8-bit or 4-bit bus mode.
When 4-bit bus mode, it is required to transfer 4-bit data twice.
N: Display line number control bit

RE: Extended function registers enable bit

When RE High, extended function set registers, SEGRAM address set registers, BID bit, HS/DS bits of
shift/scroll enable instruction and BE bits of function set register can be accessed.
BE: CGRAM/SEGRAM data blink enable bit

BE = High, makes user font of CGRAM and segment of SEGRAM blinking. The quantity of blink is
assigned the highest 2 bit of CGRAM/SEGRAM.
LP: Low power consumption mode enable bit

When EXT port input is Low (without extension driver) and LP bit is set to High, KS0073 operates in low
power consumption mode.
During 1-line mode KS0073 operates on a 4-division clock, and in 2-line or 4-line mode it operates on
2-division clock. According to this instruction, execution time becomes 4 or 2 times longer.
Note not to use display shift instruction, as it may result in incorrect operation.
And the frame frequency is 5/6 times lower than that of normal operation.
10) Set CGRAM Address (RE = 0)

0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0
Set CGRAM address to AC.

This instruction makes CGRAM data available from MPU.
11) Set SEGRAM Address (RE = 1)

0 0 0 1 - - AC3 AC2 AC1 AC0
Set SEGRAM address to AC.

This instruction makes SEGRAM data available from MPU.
12) Set DDRAM Address (RE = 0)

0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0
Set DDRAM address to AC.

This instruction makes DDRAM data available from MPU.
In 1-line display mode (N = 0, NW = 0), DDRAM address is from 00H to 4FH.
In 2-line display mode (N = 1, NW = 0), DDRAM address in the 1st line is from 00H to 27H, and
DDRAM address in the 2nd line is from 40H to 67H.
In 4-line display mode (NW = 1), DDRAM address is from 00H to 13H in the 1st line, from
20H to 33H in the 2nd line, from 40H to 53H in the 3rd line and from 60H to 73H in the
4th line.
13) Set Scroll Quantity (RE = 1)

0 0 1 X SQ5 SQ4 SQ3 SQ2 SQ1 SQ0
Setting SQ5 to SQ0, horizontal scroll quantity can be controlled in dot units. (Refer to Table 9)
In this case of KS0073 can show hidden areas of DDRAM by executing smooth scroll from 1 to 48 dots.
Table 9. Scroll quantity according to HDS bits

SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 Function
0 0 0 0 0 0 No shift
0 0 0 0 0 1 shift left by 1-dot
. . . . . . .
. . . . . . .
1 1 X X X X shift left by 48-dot
14) Read Busy Flag & Address

0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0
This instruction shows whether KS0073 is in internal operation or not. If the resultant BF is High,
the internal operation is in progress and should wait until BF to be Low, which by then the next instruction can be
performed. In this instruction the value of address counter can also be read.
15) Write data to RAM

1 0 D7 D6 D5 D4 D3 D2 D1 D0
Write binary 8-bit data to DDRAM/CGRAM/SEGRAM.

The selection of RAM from DDRAM, CGRAM, or SEGRAM, is set by the previous address set instruction: DDRAM
address set, CGRAM address set, SEGRAM address set.
RAM set instruction can also determine the AC direction to RAM.
After write operation, the address is automatically increased/decreased by 1, according to the entry mode.
16) Read data from RAM

1 1 D7 D6 D5 D4 D3 D2 D1 D0
Read binary 8-bit data from DDRAM/CGRAM/SEGRAM.

The selection of RAM is set by the previous address set instruction. If address set instruction of RAM is not
performed before this instruction, the data that is read first is invalid, as the direction of AC is not determined.
If RAM data is read several times without RAM address set instructions before read operation, the correct
RAM data can be obtained from the second, but the first data would be incorrect, as there is no time margin
to transfer RAM data. In DDRAM read operation, cursor shift instruction plays the same role as DDRAM
address set instruction: it also transfers RAM data to output data register.
After read operation address counter is automatically increased/decreased by 1 according to the entry
mode. After CGRAM/SEGRAM read operation, display shift may not be executed correctly.
* In the case of RAM write operation, AC is increased/decreased by 1 as in read operation after this. In this
time, AC indicates the next address position, but the previous data can only be read by read instruction.
(2) INSTRUCTION DESCRIPTION 1 (IE =Low )
Table 10. Instruction Set 2 (IE = Low)

Time
RSR/WDB7DB6DB5DB4DB3DB2DB1DB0 (fosc
270 kHz)
Clear Write 20H to DDRAM an
X 0 0 0 0 0 0 0 0 0 1 1.53 ms
Display set DDRAM address to 00H from AC.
Set DDRAM address to 00H from AC
Return and return cursor to its original position
X 0 0 0 0 0 0 0 0 1 X 1.53 ms
Home if shifted. The contents of DDRAM ar
not changed.
Assign cursor moving direction,
(I/D = 1: increment,
Entry I/D = 0: decrement)
Mode X 0 0 0 0 0 0 0 1 I/D S and display shift enable bit. 39 s
Set (S = 1: make entire display shift of all
lines our- in DDRAM write,
S = 0: display shift disable)
Set display/cursor/blink on/off
(D = 1: display on,
Display D = 0 : display off,
ON/OFF 0 0 0 0 0 0 0 1 D C B C = 1 : cursor on, 39 s
Control C = 0 : cursor off,
B = 1 : blink on,
B = 0 : blink off).
Assign font width, black/white inverting
of cursor, and 4-line display mode
control bit.
(FW = 1: 6-dot font width,
Extended FW = 0: 5-dot font width,
function 1 0 0 0 0 0 0 1 FW BW NW B/W = 1: black/white inverting of 39 s
Set cursor enable,
B/W = 0: black/white inverting of
cursor disable
NW = 1: 4-line display mode,
NW = 0: 1-line or 2-line display mode)
Cursor Cursor or display shift.
or (S/C = 1 : display shift,
Display 0 0 0 0 0 0 1 S/C R/L X X S/C = 0 : cursor shift, 39 s
Shift R/L = 1 : shift to right,
R/L = 0 : shift to left).

Time
270 kHz)
Determine the line for horizontal
smooth scroll.
(HS1 = 1/0 :
1st line dot scroll enable/disabl
Scroll HS2 = 1/0 :
1 0 0 0 0 0 1 HS4 HS3 HS2 HS1 39 s
Enable 2nd line dot scroll enable/disable
HS3 = 1/0 :
3rd line dot scroll enable/disable
HS4 = 1/0 :
4th line dot scroll enable/disable).
Set interface data length
(DL = 1 : 8-bit,
DL = 0 : 4-bit),
RE and numbers of display line
0 0 0 0 0 1 DL N X X 39 s
(0) when NW 0,
(N = 1 : 2-line,
Function N = 0 : 1-line),
Set extension register, RE(0)
Set DL, N, RE(1) and
CGRAM/SEGRAM blink enable (BE)
RE (BE 1/0 : CGRAM/SEGRAM
1 0 0 0 0 1 DL N BE LP 39 s
(1) blink enable/disabl
LP = 1 : low power mode,
LP = 0 : normal operation mode)
Set Set CGRAM address in address
CGRAM 0 0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 counter. 39 s
Address
Set Set SEGRAM address in address
SEGRAM 1 0 0 0 1 X X AC3 AC2 AC1 AC0 counter. 39 s
Address

Time
270 kHz)
Set Set DDRAM address in address
DDRAM 0 0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0 counter. 39 s
Address
Set Set the quantity of horizontal dot
Scroll 1 0 0 1 X SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 scroll. 39 s
Quantity
Can be known whether during
internal operation or not by
Read
reading BF.
Busy
X 0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 The contents of address counter 0 s
flag and
can also be read.
Address
(BF = 1: busy state,
BF = 0: ready state)
Write Write data into internal RAM
X 1 0 D7 D6 D5 D4 D3 D2 D1 D0 43 s
Read Read data from internal RAM
X 1 1 D7 D6 D5 D4 D3 D2 D1 D0 43 s
* NOTE: When an MPU program with Busy Flag(DB7) checking is made, 1/2Fosc (is necessary) for
executing the next instruction by the falling edge of the E signal after the Busy Flag(DB7) goes t Low.
1) Display Clear

0 0 0 0 0 0 0 0 0 1
Clear all the display data by writing 20H (space code) to all DDRAM address, and set
DDRAM address to 00H into AC (address counter). Return cursor to the original status, namely, bring the
cursor to the left edge on first line of the display.
And entry mode is set to increment mode (I/D = High).
2) Return Home

0 0 0 0 0 0 0 0 1 X
Return Home is the cursor return home instruction.

Set DDRAM address to 00H into the address counter. Return cursor to its original site and return display
to its original status, if shifted.
Contents of DDRAM does not change.
3) Entry Mode Set

0 0 0 0 0 0 0 1 I/D S
Set the moving direction of cursor and display.

I/D : Increment / decrement of DDRAM address (cursor or blink)
When I/D = High, cursor/blink moves to right and DDRAM address is incr ased by 1.
When I/D = Low, cursor/blink moves to left and DDRAM address is decreased by 1.
* CGRAM/SEGRAM operates identically to the DDRAM, when reading from or writing to CGRAM/SEGRAM.
When S = High, after DDRAM write, the entire display of all lines is shifted to
the right (I/D = Low) or to the left (I/D = High). But it will seem as if the cursor is not moving.
When S = Low, or DDRAM read, or CGRAM/SEGRAM read/write operation, shift of entire display is not
performed.
4) Display ON/OFF Control ( RE = 0 )

0 0 0 0 0 0 1 D C B
Control display/cursor/blink ON/OFF 1 bit register.

D : Display ON/OFF control bit
When D = High, entire display is turned on.
When D = Low, display is turned off, but display data remains in DDRAM.
C : Cursor ON/OFF control bit

When C = High, cursor is turned on.
When C = Low, cursor is disappeared in current display, but I/D register preserves its data.
B : Cursor Blink ON/OFF control bit

When B = High, cursor blink is on, which performs alternately between all the high data and display
character at the cursor position. If fosc has 270 kHz frequency, blinking has 370 ms interval.
When B = Low, blink is off.
5) Extended Function Set ( RE = 1 )

0 0 0 0 0 0 1 FW BW NW
FW : Font Width control

When FW = High, display character font width is assigned to 6-dot and execution time becomes
6/5 times than that of 5-dot font width.
The user font, specified in CGRAM, is displayed into 6-dot font width, bit-5 to bit-0,including the left
space bit of CGRAM.(Refer to Fig-16)
When FW = Low, 5-dot font width is set.
B/W : Black/White Inversion enable bit

When B/W = High, black/white inversion at the cursor position is set. In this case C/B bit of display
ON/OFF control instruction becomes a dont car condition. If fosc has frequency of 270 kHz, inversion has
370 ms intervals.
NW : 4 Line mode enable bit

When NW = High, 4 line display mode is set. In this case N bit of function set instruction becomes
dont care condition.
6-bit 6-bit
s CGROM 8 CGRAM 8
p character character
a b b
font font i
c i
e (5-dot) (6-dot) t
t
(CGROM) (CGRAM)
Fig-16. 6-dot font width CGROM/CGRAM
6) Cursor or Display Shift (RE = 0)

0 0 0 0 0 1 S/C R/L - -
Shifting of right/left cursor position or display without writing or reading of display data.
This instruction is used to correct or search display data.(Refer to Table 7)
During 2-line mode display, cursor moves to the 2nd line after 40th digit of 1st line.
In 4-line mode, cursor moves to the next line, only after every 20th digit of the current line.
Note that display shift is performed simultaneously in all the lines.
When displayed data is shifted repeatedly, each line is shifted individually.
When display shift is performed, the contents of the address counter are not changed.
Table 11. Shift patterns according to S/C and R/L bits

S/C R/L Operation
0 0 Shift cursor to the left, ADDRESS COUNTER is decreased by
0 1 Shift cursor to the right, ADDRESS COUNTER is increased by 1
1 0 Shift the entire display to the left, cursor moves according to the display
1 1 Shift the entire display to the right, cursor moves according to the display
7) Scroll Enable (RE = 1)

0 0 0 0 0 1 HS4 HS3 HS2 HS1
HS : Horizontal Scroll per Line Enable

This instruction makes valid dot shift by a display line unit.
HS1, HS2, HS3 and HS4 indicate each line to be dot scrolled, and each scroll is performed individually i
each line.
If the line in 1-line display mode or the 1st line in 2-line display mode is to be scrolled, set HS1 and HS2 to
High. If the 2nd line scroll is needed in 2-line mode, set HS3 and HS4 t High. (Refer to Table 8)
8) Function Set
(1) RE = 0

RE
0 0 0 0 1 DL N - -
(0)
DL : Interface data length control bit

When DL =Low, it means 4-bit bus mode with MPU. Hence, DL is a signal to select 8-bit or 4-bit bus mode.
N : Display line number control bit

RE : Extended function registers enable bit

At this instruction, RE must be Low.
(2) RE = 1

RE
0 0 0 0 1 DL N BE LP
(1)
DL : Interface data length control bit

When DL = Low, it means 4-bit bus mode with MPU. Hence, DL is a signal to select 8-bit or 4-bit bus mode.
N : Display line number control bit

RE : Extended function registers enable bit

When RE High, extended function set registers, SEGRAM address set registers, HS bits of scroll
enable instruction and BE bits of function set register can be accessed.
BE : CGRAM/SEGRAM data blink enable bit

BE = High, makes user font of CGRAM and segment of SEGRAM blinking. The quantity of blink is
assigned the highest 2 bit of CGRAM/SEGRAM.
LP : Low power consumption mode enable bit

When EXT port input is Low (without extension driver) and LP bit is set to High, KS0073 operates i
low power consumption mode.
During 1-line mode KS0073 operates on a 4-division clock, and in 2-line or 4-line mode it operates on
2-division clock. According to this instruction, execution time becomes 4 or 2 times longer.
Note not to use display shift instruction, as it may result in incorrect operation.
And the frame frequency is 5/6 times lower than that of normal operation.
9) Set CGRAM Address (RE = 0)

0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0
Set CGRAM address to AC.

This instruction makes CGRAM data available from MPU.
10) Set SEGRAM Address (RE = 1)

0 0 0 1 - - AC3 AC2 AC1 AC0
Set SEGRAM address to AC.

This instruction makes SEGRAM data available from MPU.
11) Set DDRAM Address (RE = 0)

0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0
Set DDRAM address to AC.

This instruction makes DDRAM data available from MPU.
In 1-line display mode (N = 0, NW = 0), DDRAM address is from 00H to 4FH.
In 2-line display mode (N = 1, NW = 0), DDRAM address in the 1st line is from "00H" t 27H, and
DDRAM address in the 2nd line is from 40H to 67H.
In 4-line display mode (NW = 1), DDRAM address is from 00H to 13H in the 1st line, from 20H to
33H in the 2nd line, from 40H to 53H in the 3rd line and from 60H to 73H in the 4th line.
12) Set Scroll Quantity (RE = 1)

0 0 1 X SQ5 SQ4 SQ3 SQ2 SQ1 SQ0
Setting SQ5 to SQ0, horizontal scroll quantity can be controlled in dot units. (Refer to Table 12).
In this case KS0073 executes dot smooth scroll from 1 to 48 dots.
Table 12. Scroll quantity according to HDS bits

SQ5 SQ4 SQ3 SQ2 SQ1 SQ0 Function
0 0 0 0 0 0 No shift
: : : : : : :
1 1 X X X X shift left by 48-dot
13) Read Busy Flag & Address

0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0
This instruction shows whether KS0073 is in internal operation or not. If the resultant BF is High, the
internal operation is in progress and should wait until BF becomes Low, which by then the next instruction
can be performed. In this instruction value of address counter can also be read.
14) Write data to RAM

1 0 D7 D6 D5 D4 D3 D2 D1 D0
Write binary 8-bit data to DDRAM/CGRAM/SEGRAM.

The selection of RAM from DDRAM, CGRAM, or SEGRAM, is set by the previous address set instruction : DDRAM
address set, CGRAM address set, SEGRAM address set. RAM set instruction can also determines
the AC direction to RAM.
After write operation, the address is automatically increased/decreased by 1, according to the entry mode.
15) Read data from RAM

1 1 D7 D6 D5 D4 D3 D2 D1 D0
Read binary 8-bit data from DDRAM/CGRAM/SEGRAM.

The selection of RAM is set by the previous address set instruction. If address set instruction of RAM is not
performed before this instruction, the data which has been read first is invalid, as the direction of AC is not
determined. If the RAM data several is read times without RAM address set instruction before read operation,
the correct RAM data from the second, but the first data would be incorrect, as there is no time margin to
transfer RAM data. In case of DDRAM read operation, cursor shift instruction plays the same role as DDRAM
address set instruction : it also transfer RAM data to output data register.
After read operation address counter is automatically increased/decreased by 1 according to the entry mode. After
CGRAM/SEGRAM read operation, display shift may not be executed correctly.
* In case of RAM write operation, AC is increased/decreased by 1 as in read operation after this. In this time, AC
indicates the next address position, but the previous data can only be read by read instruction.
INTERFACE WITH MPU
KS0073 can transfer data in bus mode (4-bit or 8-bit) or serial mode with MPU. Hence, both types, 4 or 8-bit
MPU can be used. In case of 4-bit bus mode, data transfer is performed by twice to transfer 1 byte data.
(1) When interfacing data length are 4-bit, only 4 ports, from DB4 to DB7, are used as data bus.
At first, higher 4-bit (in case of 8-bit bus mode, the contents of DB4 - DB7) are transferred, and then lower
4-bit (in case of 8-bit bus mode, the contents of DB0 - DB3) are transferred. So transfer is performed by
twice. Busy Flag outputs High after the second transfer is ended.
(2) When interfacing data length are 8-bit, transfer is performed at a time through 8 ports, from DB0 to DB7.
(3) If IM port is set to Low, serial transfer mode is set.

Interface with MPU in Bus Mode
1) Interface with 8-bit MPU
If 8-bit MPU is used, KS0073 can connect directly with that.

In this case, port E, RS, R/W and DB0 to DB7 need to interface each other.
Example of timing sequence is shown below.
RS
R/W
E
Internal
signal Internal operation
DB7 DATA Busy Busy No Busy DATA
INSTRUCTION Busy Flag Check Busy Flag Check Busy Flag Check INSTRUCTION
Fig-17. Example of 8-bit Bus Mode Timing Sequence
2) Interface with 4-bit MPU
If 4-bit MPU is used, KS0073 can connect directly with this.

In this case, port E, RS, R/W and DB4 to DB7 need to interface each other. The transfer is performed by twice.
Example of timing sequence is shown below.
RS
R/W
Internal
signal Internal operation
No
DB7 D7 D3 Busy AC3 Busy AC3 D7 D3
INSTRUCTION Busy Flag Check Busy Flag Check INSTRUCTION
Fig-18. Example of 4-bit Bus Mode Timing Sequence

Interface with MPU in Serial Mode
When IM port input is Low, serial interface mode is started. At this time, all three ports, SCLK
(synchronizing transfer clock), SID (serial input data), and SOD (serial output data), are used. If KS0073 is to
be used with other chips, chip select port (CS) can be used. By setting CS to Low, KS0073 can receive
SCLK input. If CS is set to High, KS0073 resets the internal transfer counter.
Before transferring real data, start byte has to be transferred. It is composed of succeeding 5 High bits,
read write control bit (R/W), register selection bit (RS), and end bit that indicates the end of start byte.
Whenever succeeding 5 High bits are detected by KS0073, it resets the serial transfer counter and prepares
to receive next informations.
The next input data is the register selection bit which determines which register is to be used, and read write
control bit that determines the direction of data. Then end bit is transferred, which must have Low value t
show the end of start byte. (Refer to Fig 19, Fig 20)
(1) Write Operation (R/W = 0)

After start byte is transferred from MPU to KS0073, 8-bit data is transferred which is divided into 2 bytes,
each byte has 4 bit's real data and 4 bit's partition token data. For example, if real data is "10110001"
(D0 - D7), then serially transferred data becomes "1011 0000 0001 0000" where 2nd and 4th 4 bits must
be "0000" for safe transfer.
To transfer several bytes continuously without changing R/W bit and RS bit, start byte
transfer is needed only at first starting time.
i.e., after the first start byte is transferred, real data succeeding can be transferred.
(2) Read Operation (R/W = 1)

After start byte is transferred to KS0073, MPU can receive 8-bit data through the SOD port
at a time from the LSB. Waiting time is needed to insert between start byte and data reading,
as internal reading from RAM requires some delay. Continuous data reading is possible
such as serial write operation. It also needs only one start bytes, only if some
delay between reading operations of each byte is inserted. During the reading operation, KS0073 observes suc-
ceeding 5 "High" from MPU. If detected, KS0073 restarts serial operation at once and prepares to receive RS bit.
So in continuous reading operation, SID port must be "Low".
(1) Serial Write Operatio
CS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
SCLK
SID 1 1 1 1 1 R/W RS 0 D0 D1 D2 D3 0 0 0 0 D4 D5 D6 D7 0 0 0 0
Starting Byte Instruction
Synchronizing Lower Data Upper Data

Bit string 1st Byte 2nd Byte
(2) Serial Read Operation
CS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
SCLK
SID 1 1 1 1 1 R/W RS 0 0 0 0 0 0 0 0 0
SOD D0 D1 D2 D3 D4 D5 D6 D7
Busy Flag/
Starting Byte Read Data
Synchronizing Lower Data Upper Data

Bit string
Fig-19. Timing Diagram of Serial Data Transfer

(1) Continuous Write Operation
SC LK Wait Wait
SID Start byte 1st byte 2nd byte 1st byte 2nd byte 1st byte 2nd byte
(Instruction1) (Instruction2) (Instruction3)
Instruction1 Instruction2 Instruction3

execution time execution time execution time
(2) Continuous Read Operation
SC LK Wait Wait Wait
SID Start byte
SO D D ata Data D ata

R ead 1 Read 2 R ead 3
Instruction1 Instruction2 Instruction3

execution time execution time execution time
Fig-20. Timing Diagram of Continuous Data Transfer

APPLICATION INFORMATION ACCORDING TO LCD

1) LCD Panel: 24 characters 1-line format (5-dot font, 1/17 duty )
CO M 1
CO M 2
CO M 3
CO M 4
CO M 5
CO M 6
CO M 7
CO M 8
CO M 17
(CO M 0)
S EG 1
S EG 2
S EG 3
S EG 4
S EG 5
KS0073 S EG 6
S EG 7
S EG 8
S EG 9
S EG 10
..
S EG 58
S EG 59
S EG 60
CO M 16
CO M 15
CO M 14
CO M 13
CO M 12
CO M 11
CO M 10
CO M 9
2) LCD Panel: 24 character 2-line format (5-dot font, 1/33 duty)
COM 1
COM 2
COM 3
COM 4
COM 5
COM 6
COM 7
COM 8
COM 17
COM 18
COM 19
COM 20
COM 21
COM 22
COM 23
COM 24
COM 33
(COM 0)
SE G1
SE G2
KS0073 SE G3
SE G4
S EG 5
..
SE G58
SE G59
SE G60
CO M 32
CO M 31
CO M 30
CO M 29
CO M 28
CO M 27
CO M 26
CO M 25
CO M 16
CO M 15
CO M 14
CO M 13
CO M 12
CO M 11
CO M 10
CO M 9
3) LCD Panel: 12 character 4-line format (5-dot font, 1/33 duty)
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
KS0073 COM27
COM28
COM29
COM30
COM31
COM32
COM33
(COM0)
SEG1
SEG2
SE G3
SEG4
SEG5
..
SEG26
SEG27
SE G28
SEG29
SEG30
SEG31
SEG32
SE G33
SEG34
SEG35
SEG58
SEG59
SEG60
4) LCD Panel: 10 characters 4-line format (6-dot font, 1/33 duty)
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
COM21
COM22
COM23
COM24
COM25
COM26
KS0073 COM27
COM28
COM29
COM30
COM31
COM32
COM33
(COM0)

SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
..
SEG31
SEG32
S E G 33
SEG34
SEG35
SEG36
..
SEG58
SEG59
SEG60
5) LCD Panel: 20 characters 4-line format (5-dot font, 1/33 duty)
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
COM21
KS0073 COM22
COM23
COM24
COM25
COM26
COM27
COM28
VD D COM29
COM30
COM31
COM32
EXT COM33
(COM0)
SEG1
SEG2
SE G 3
SEG4
SEG5
..
SEG58
SEG59
SEG60
SEG1
SEG2
S EG 3
SEG4
SEG5
Extension
..
Driver SEG36
SEG37
S E G 38
SEG39
SEG40
INITIALIZING
1) Initializing by Internal Reset Circuit
When the power is turned on, KS0073 is initialized automatically by power on reset circuit.
During the initialization, the following instructions are executed, and BF(Busy Flag) is kept "High"(busy state)
to the end of initialization.
(1) Display Clear instruction

Write "20H" to all DDRAM
(2) Set Functions instruction
DL = 1 : 8-bit bus mode
N = 1 : 2-line display mode
RE = 0 : Extension register disable
BE = 0 : CGRAM/SEGRAM blink OFF
LP = 0 : Operate in normal mode (Not in Low Power Mode)
DH = 0 : Horizontal scroll enable
REV = 0 : Normal display mode (Not reversed display)
(3) Control Display ON/OFF instructio
D = 0 : Display OFF
C = 0 : Cursor OFF
B = 0 : Blink OFF
(4) Set Entry Mode instruction
I/D = 1 : Increment by 1
S = 0 : No entire display shift
BID = 0 : Normal direction segment port
(5) Set Extension Function instruction
FW = 0 : 5-dot font width character display
B/W = 0 : Normal cursor (8th line)
NW = 0 : Not 4-line display mode, 2-line mode is set because of N("1")
(6) Enable Scroll/Shift instructio
HS = 0000 : Scroll per line disable
DS = 0000 : Shift per line disable
(7) Set scroll Quantity instruction
SQ = 000000 : Not scroll
2) Initializing by Hardware RESET input
When RESET pin = "Low", KS0073 can be initialized as in the case of power on reset.
During the power on reset operation, this pin is ignored.
INITIALIZING BY INSTRUCTION
1) 8-bit interface mode
Power on
Condition : fosc=270kHz
Wait for more than 20 ms

after VDD rises to 4.5 v
0 4-bit interface
DL
Function set 1 8-bit interface
0 0 0 0 1 DL(1) N 0 X X
0 1-line mod
N
1 2-line mod

0 display off
D
1 display on
Display ON/OFF Control
0 cursor off
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 C
1 cursor on
0 0 0 0 0 0 1 D C B
0 blink off
B
Wait for more than 39 s 1 blink on
Clear Display
0 0 0 0 0 0 0 0 0 1
0 decrement mode
I/D
Entry Mode Set 1 increment mode
0 0 0 0 0 0 0 1 I/D S 0 entire shift off
S
1 entire shift on
Initialization end
2) 4-bit interface mode
Power on
Wait for more than 20 ms

after Vdd rises to 4.5 V Condition : fosc=270kHz
Function set 0 4-bit interface

DL
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 8-bit interface
0 0 0 0 1 DL(0) X X X X
0 1-line mode
N
Wait for more than 39 s 1 2-line mode
Function set
0 0 0 0 1 0 X X X X
0 0 N 0 X X X X X X

0 display off
D
1 display on
Display ON/OFF Control
0 cursor off
0 0 0 0 0 0 X X X X C
1 cursor on
0 0 1 D C B X X X X
0 blink off
Wait for more than 39 s B
1 blink on
Clear Display
0 0 0 0 0 0 X X X X
0 0 0 0 0 1 X X X X
0 decrement mode
Entry Mode Set I/D
1 increment mode
0 0 0 0 0 0 X X X X
0 entire shift off
0 0 0 1 I/D SH X X X X SH
1 entire shift o
Initialization end
EXAMPLE OF INSTRUCTION AND DISPLY CORRESPONDENCE
1) IE=Low
1. Power supply on: Initialized by the internal power on reset circuit LCD DISPLAY
2. Function Set: 8-bit, 1-line, RE(0)

0 0 0 0 1 1 0 0 X X
3. Display ON/OFF Control: Display/Cursor on

_
0 0 0 0 0 0 1 1 1 0
4. Entry Mode Set: Increment

_
0 0 0 0 0 0 0 1 1 0
5. Write Data to DDRAM: Write S

S_
1 0 0 1 0 1 0 0 1 1
6. Write Data to DDRAM: Write A

SA_
1 0 0 1 0 0 0 0 0 1
7. Write Data to DDRAM: Write M

SAM_
1 0 0 1 0 0 1 1 0 1

1 0 0 1 0 1 0 0 1 1
SAMS_
9. Write Data to DDRAM: Write U

SAMSU_
1 0 0 1 0 1 0 1 0 1
10. Write Data to DDRAM: Write N

SAMSUN_
1 0 0 1 0 0 1 1 1 0
11. Write Data to DDRAM: Write G

SAMSUNG_
1 0 0 1 0 0 0 1 1 1
12. Cursor or Display Shift: Cursor shift to right

SAMSUNG _
0 0 0 0 0 1 0 1 X X
13. Entry Mode Set: Entire display shift enable

SAMSUNG _
0 0 0 0 0 0 0 1 1 1
14. Write Data to DDRAM: Write K

AMSUNG K_
1 0 0 1 0 0 1 0 1 1

MSUNG KS_
1 0 0 1 0 1 0 0 1 1
16. Write Data to DDRAM: Write

1 0 0 0 1 1 0 0 0 0
SUNG KS0_

UNG KS00_
1 0 0 0 1 1 0 0 0 0

NG KS007_
1 0 0 0 1 1 0 1 1 1

G KS0072_
1 0 0 0 1 1 0 0 1 0
20. Cursor or Display Shift: Cursor shift to left

G KS0072
0 0 0 0 0 1 0 0 X X
21. Write Data to DDRAM: Write 3

KS0073_
1 0 0 0 1 1 0 0 1 1
22. Return Home

SAMSUNG KS0073
0 0 0 0 0 0 0 0 1 X
23. Clear Display

_
0 0 0 0 0 0 0 0 0 1
2) IE=High
1. Power supply on: Initialized by the internal power on reset circuit
2. Function Set: 8-bit, RE(1)

0 0 0 0 1 1 1 1 0 0
3. Extended Function Set: 5-font, 4-lin

0 0 0 0 0 0 1 0 0 1
4. Function Set: RE(0)

0 0 0 0 1 1 1 0 0 0
5. Display ON/OFF Control: Display/Cursor on

_
0 0 0 0 0 0 1 1 1 0

S_
1 0 0 1 0 1 0 0 1 1
7. Write data to DDRAM: Write A SA_

1 0 0 1 0 0 0 0 0 1
...
12. Write data to DDRAM: Write G SAMSUNG_
1 0 0 1 0 0 0 1 1 1
13. Set DDRAM Address 20H SAMSUNG

_
0 0 1 0 1 0 0 0 0 0
14. Write data to DDRAM: Write K SAMSUNG

K_
1 0 0 1 0 0 1 0 1 1
...
19. Write data to DDRAM: Write 3

SAMSUNG
KS0073_
1 0 0 0 1 1 0 0 1 1
20. Set DDRAM Address 40H

SAMSUNG
KS0073
_
0 0 1 1 0 0 0 0 0 0
21. Write data to DDRAM: Write L SAMSUNG

KS0073
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 L_
1 0 0 1 0 0 1 1 0 0
...
30. Write data to DDRAM: Write R SAMSUNG
KS0073
LCD DRIVER_
1 0 0 1 0 1 0 0 1 0
31. Set DDRAM Address 60H SAMSUNG

KS0073
LCD DRIVER
0 0 1 1 1 0 0 0 0 0 _
...
43. Write data to DDRAM: Write R SAMSUNG

KS0073
LCD DRIVER
1 0 0 1 0 1 0 0 1 0
& CONTROLLER_
44. Function Set: RE(0), DH(1)

SAMSUNG
KS0073
LCD DRIVER
0 0 0 0 1 1 1 0 1 0
& CONTROLLER_
45. Function Set: RE(1)

SAMSUNG
KS0073
LCD DRIVER
0 0 0 0 1 1 1 1 0 0
& CONTROLLER_
46. Shift/Scroll Enable: DS4(1), DS3/2/1(0) SAMSUNG

KS0073
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 LCD DRIVER
0 0 0 0 0 1 1 0 0 0 & CONTROLLER_
47. Function Set; RE(0 SAMSUNG

KS0073
LCD DRIVER
0 0 0 0 1 1 1 0 1 0 & CONTROLLER_
48. Cursor or Display Shift: Display shift to left SAMSUNG

KS0073
LCD DRIVER
0 0 0 0 0 1 1 0 X X CONTROLLER_
49. Cursor or Display Shift: Display shift to left SAMSUNG

KS0073
LCD DRIVER
0 0 0 0 0 1 1 0 X X
CONTROLLER_
50. Cursor or Display Shift: Display shift to left

SAMSUNG
KS0073
LCD DRIVER
0 0 0 0 0 1 1 0 X X
ONTROLLER_
51. Cursor or Display Shift: Display shift to left

SAMSUNG
KS0073
LCD DRIVER
0 0 0 0 0 1 1 0 X X
NTROLLER_
52. Return Home SAMSUNG

KS0073
0 0 0 0 0 0 0 0 1 X & CONTROLLER
53. Function Set; RE(0), REV(1) SAMSUNG

KS0073
LCD DRIVER
0 0 0 0 1 1 1 0 1 1 & CONTROLLER
54. Cursor or Display Shift: Display shift to right SAMSUNG

KS0073
LCD DRIVER
0 0 0 0 0 1 1 1 X X
& CONTROLLER
55. Cursor or Display Shift: Display shift to right SAMSUNG

KS0073
LCD DRIVER
0 0 0 0 0 1 1 1 X X
& CONTROLLER
56. Return Home SAMSUNG

KS0073
LCD DRIVER
0 0 0 0 0 0 0 0 1 X
& CONTROLLER
57. Function Set: RE(0), REV(0)

SAMSUNG
KS0073
LCD DRIVER
0 0 0 0 1 1 1 0 0 0
& CONTROLLER
58. Function Set; RE(1 SAMSUNG

KS0073
0 0 0 0 1 1 1 1 0 0 & CONTROLLER
59. Entry Mode Set: BID(1)

0 0 0 0 0 0 0 1 1 1
60. Write Data to DDRAM: Write B

1 0 0 1 0 0 0 0 1 0
61. Write Data to DDRAM: Write I

1 0 0 1 0 0 1 0 0 1
62. Write Data to DDRAM: Write D

1 0 0 1 0 0 0 1 0 0
63. Clear Display

0 0 0 0 0 0 0 0 0 1
FRAME FREQUENCY
1) 1/17 Duty Cycle
1-Line selection perio

1 2 3 4 ... 16 17 1 2 3 ... 16 17
VDD
V1
COM1
...
V4
V5
1 FRAME 1 FRAME
Normal Display Mode (LP=0)

Item
5-dot font width 6-dot font widt
1-line selection perio 200 clocks 240 clocks
Frame frequency 79.4 Hz 66.2 Hz

Item
* f OSC=270 kHz (1 clock=3.7 s)

2) 1/33 duty cycle
1-Line selection perio

1 2 3 4 ... 32 33 1 2 3 ... 32 33
VDD
V1
COM1
...
V4
V5
1 FRAME 1 FRAME

Item

Item
* f OSC=270 kHz (1 clock=3.7 s)

POWER SUPPLY FOR DRIVING LCD PANEL
1) When an external power supply is used
VDD VDD
R
V1
R
V2
R0
V3
R
V4
R
V5
VEE
2) When an internal booster is used
(Boosting twice) (Boosting three times)
VDD VDD
+ VCI VDD + VCI VDD
_ GND
R _ GND
R
V1 V1
_ R _ R
C1 V2 C1 V2
1F R0 1F R0
+ C2 V3 + C2 V3
R R
V5OUT2 V4 V5OUT2 V4
R _ R
V5OUT3 V5 V5OUT3 V5
1F
Can be detached +
_ If not using _
1F power down mode 1F Can be detached
If not using
+ + power down mode
* 1. Boosted output voltage should not exceed the maximum value (13 V) of the LCD driving
voltage. Especially, a voltage of over 4.3V should not be supplied to the referenc
voltage (Vci) when boosting three times.
2. A voltage of over 5.5V should not be supplied to the reference voltage (Vci) when
boosting twice.
3. The value of resistance, according to the number of lines, duty ratio and the bias, is
shown below. (Refer to Table 13)
Table 13. Duty Ratio and Power Supply for LCD Driving
Item Data
Number of lines 1 2 or
Duty ratio 1/17 1/33
Bias 1/5 1/6.7
R R R
Divided resistance
R0 R 2.7R
MAXIMUM ABSOLUTE RATE
Characteristi Symbol Value Unit

Power supply voltage(1) VDD -0.3 to +7.0 V
Power supply voltage(2) VLCD VDD -15.0 to VDD +0.3 V
Input voltage VIN -0.3 to VDD +0. V

Operating temperature Topr -30 to +8 C
Storage temperatur Tstg -55 to +125 C
* Voltage greater than above may do damage to the circuit (VDDV1V2V3V4V5)

ELECTRICAL CHARACTERISTICS
DC Characteristics (VDD = 2.7 to 5.5 V, Ta = -30 to + 85 C)
Item Symbol Condition Min Typ Max Unit

Operating Voltage VDD - 2.7 - 5.5 V
Internal oscillation or
Supply Current IDD external clock. - 0.15 0.3 mA
(VDD=3.0V,fosc = 270kHz)
VIH1 - 0.7V DD - VDD

Input Voltage (1)
VDD = 2.7 to 3.0 -0.3 - 0.2VDD V
(except OSC1) VIL1
VDD = 3.0 to 5.5 -0.3 - 0.6
Input Voltage (2) VIH2 - 0.7V DD - VDD

V
(OSC1) VIL2 - - - 0.2VDD
Output Voltage (1) VOH1 IOH = -0.1mA 0.75VDD - -

V
(DB0 to DB7) VOL1 IOL = 0.1mA - - 0.2VDD
Output Voltage (2) VOH2 IO = -40A 0.8V DD - -

V
(except DB0 to DB7) VOL2 IO = 40A - - 0.2VDD
VdCOM - - 1
Voltage Drop IO = + 0.1mA V
VdSEG - - 1
Input Leakage Current IIL VIN = 0V to V DD -1 - 1

VIN = 0V, V DD = 3V A
Low Input Current IIN -10 -50 -120
(PULL UP)
Internal Clock Rf = 91k + 2%
fOSC 190 270 350 kHz
(external Rf) (VDD = 5V)
fEC 125 270 410 kHz

External Clock duty - 45 50 55 %
t R, t F - - 0.2 s
(DC Characteristics: continued)
Item Symbol Condition Min Type Max Unit

Voltage Converter Out2
VOUT2 Ta = 25 oC, C = F, -3.0 -4.2 -
(Vci = 4.5V)
IOUT = 0.25 mA, V
Voltage Converter Out3
VOUT3 fosc = 270kHz -4.3 -5.1 -
(Vci = 2.7V)
Voltage Converter Input Vci - 1.0 - 4.5
1/5 Bias 3.0 - 13.0 V
LCD Driving Voltage VLCD VDD-V5
1/6.7 Bias 3.0 - 13.0
AC Characteristics (VDD = 4.5 to 5.5V, Ta = -30 to + 8 C)
Mode Item Symbol Min Typ Max Unit

E Cycle Tim tc 500 - -
E Rise / Fall Time tr,tf - - 20
E Pulse Width (High, Low) tw 230 - -
(1) Write Mode
R/W and RS Setup Time tsu1 40 - - ns
(Refer to Fig-21)
R/W and RS Hold Time th1 10 - -
Data Setup Time tsu2 60 - -
Data Hold Time th2 10 - -
(2) Read Mode R/W and RS Setup Time tsu 40 - - ns
(Refer to Fig-22)
R/W and RS Hold Time th 10 - -
Data Output Delay Tim tD - - 160
Data Hold Time tDH 5 - -

Serial Clock Cycle Time tc 0.5 - 20 s
Serial Clock Rise/Fall Time tr,tf - - 50
Serial Clock Width (High, Low) tw 200 - -
Chip Select Setup Time tsu1 60 - -
(3) Serial Interface
Mod Chip Select Hold Time th1 20 - -
(Refer to Fig-23) ns
Serial Input Data Setup Tim tsu2 100 - -
Serial Input Data Hold Time th2 100 - -
Serial Output Data Delay Time tD - - 160
Serial Output Data Hold Time tDH 5 - -

(AC Characteristics: continued) (VDD = 2.7 to 4.5V, Ta = -30 to + 8 C)
Mode Item Symbol Min Type Max Unit

(4) Write Mode
R/W and RS Setup Time tsu1 60 - - ns
(Refer to Fig-21)
R/W and RS Hold Time th1 20 - -
Data Setup Time tsu2 195 - -
Data Hold Time th2 10 - -
(5) Read Mode R/W and RS Setup Time tsu 60 - - ns
(Refer to Fig-22)
R/W and RS Hold Time th 20 - -
Data Output Delay Tim tD - - 360

Serial Clock Cycle Time tc 1 - 20 s
Serial Clock Rise/Fall Time tr,tf - - 50
Serial Clock Width (High, Low) tw 400 - -
Chip Select Setup Time tsu1 60 - -
(6) Serial Interface
Mod Chip Select Hold Time th1 20 - -
(Refer to Fig-23) ns
Serial Input Data Setup Tim tsu2 200 - -
Serial Input Data Hold Time th2 200 - -
Serial Output Data Delay Time tD - - 360
Serial Output Data Hold Time tDH 5 - -

(AC Characteristics: continued) (VDD = 2.7 to 5.5 V, Ta = -30 to + 85 C)
Mode Item Symbol Min Typ Max Unit

Clock Pulse Width (High, Low) tw 800 - -
Clock Rise / Fall Time tr,tf - - 100
(7) Interface
Mode with Clock Setup Tim tsu1 500 - -
ns
Extension Driver Data Setup Time tsu2 300 - -
(Refer to Fig-24)
M Delay Time tDM -1000 - 1000
V IH 1
RS VIL1
tSU1
th1
R/W VIL1 VIL1
tw
th1
tf
E V IH 1 V IH 1
VIL1 VIL1 VIL1
tSU2
tr th2
V IH 1 V IH 1
DB0~DB7 VIL1 Valid Data VIL1
tc
Fig-21. Write Mode

V IH 1
RS VIL1
tSU
th
VIH1 VIH1
R/W
tw th
tf
E V IH 1 V IH 1
VIL1 VIL1 V IL1
tr tD tDH
V IH 1 V IH 1
DB0~DB7 VIL1 Valid Data VIL1
tc
Fig-22. Read Mod
tc
CS V IL1 V IL1
tS U 1 tr tw tw t h1
SCLK V IH 1 V IH 1 V IH 1 V IH 1
V IL1 V IL1 V IL1 V IL1
t SU 2 t h2
SID
tD tD H
SOD V OH1
VOL1
Fig-23. Serial Interface Mode

tr
VOH2
VOH2
tW VOL2
CLK1
tr tW
VOH2 VOH2
VOL2 VOL2
CLK2
tSU1 tW
VOH2
D VOL2
tDH
tSU1
M
VOL2
tDM
Fig-24. Interface Mode with Extensive Driver

RESET TIMIN
(VDD=2.7V to 5.5V, Ta=-30C to + 85C)

Item Symbol Min Typ Max Unit
Reset Low level width tRES 10 ms

(Refer to Fig-25)
tRES
RESET
V IL1 V IL1
Fig-25. Reset TimingDiagram

Brief overview about Hitachi HD44780 LCD controller
Brief Overview about Hitachi HD44780

Standard Controller for Dot Matrix LCDs
Terminology
Correspondence between Character Codes and Character Patterns
Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character Patterns (CGRAM Data)
Initializing the LCD by Instruction
8 bit Interface
4 bit Interface
This is only a short reference for the most important commands not mentionned
in "The Extended Concise LCD Data Sheet".
Terminology [Toc] [Top]
CGROM Character Generator ROM

Consist of the fix implemented character set (ROM).
Character set may differ with different ROM Codes.
To display a char, the CGROM address of the character to be showed at the current DDRAM
address has to be transmitted to the display.
CGRAM Character Generator RAM
The user-defined character set.
With 5x7 dots, 8 character patterns can be written and with 5x10 dots, 4 types can be written.
Also reprogrammable during use.
To display a char, the CGRAM address of the character to be showed at the current DDRAM
address has to be transmitted to the display.
DDRAM Display Data RAM
Here is the data stored, which is currently showed on the display (memory mapped I/O).
CGRAM-/ The addresses of the characters patterns in the CGRAM / CGROM.
CGROM- Length : 8 bit
Address
http://www.electronic-engineering.ch/microchip/datasheets/lcd/lcd_data_sheets.html (1 of 8)12/02/2008 17:31:29

DDRAM- The address of the (maybe invisible) cursor, where the next char is written to.
Address You can write to all of these addresses (if implemented in silicon), even if they are not actually
displayed. So you can store external data on hidden positions. Or you can first write data to the
visible and hidden locations and then scroll the whole display to the hidden positions.
Length : 8 bit
Range: 0x00 - 0x27, 0x40 - 0x67, (...)
Correspondence between Character Codes and Character Patterns

(ROM Code: A00) [Toc] [Top]

Note: The user can specify any pattern for character-generator RAM (8 different characters).
Relationship between CGRAM Addresses, Character Codes (DDRAM)

and Character Patterns (CGRAM Data) [Toc] [Top]

Notes:
1. Character code bits 0 to 2 correspond to CGRAM address bits 3 to 5 (3 bits: 8 types).

3. Character pattern row positions correspond to CGRAM data bits 0 to 4 (bit 4 being at the left).
4. As shown Table 5, CGRAM character patterns are selected when character code bits 4 to 7
are all 0. However, since character code bit 3 has no effect, the R display example above
can be selected by either character code 00H or 08H.

Notes:
1. Character code bits 1 and 2 correspond to CGRAM address bits 4 and 5 (2 bits: 4 types).
2. CGRAM address bits 0 to 3 designate the character pattern line position. The 11th line
is the cursor position and its display is formed by a logical OR with the cursor.
Since lines 12 to 16 are not used for display, they can be used for general data RAM.
3. Character pattern row positions are the same as 5 X 8 dot character pattern positions.
4. CGRAM character patterns are selected when character code bits 4 to 7 are all 0.
However, since character code bits 0 and 3 have no effect, the P display
example above can be selected by character codes 00H, 01H, 08H, and 09H.
Initializing the LCD by Instruction (Software Reset) [Toc] [Top]
If the power supply conditions for correctly operating the internal reset circuit are not met,
initialization by instructions becomes necessary.
This procedure must take place in a software reset on a 4 bit Interface
to assure proper re-entry to the LCD communication.
Refer to the initialization procedure of my LCD assembler module files, e.g. m_lcd.asm.
8 bit Interface [Toc] [Top]

4 bit Interface [Toc] [Top]

[Toc] [Top]

click here


The Extended Concise LCD Data Sheet f o r H D4 4 7 8 0
Version: 25.6.1999
Clock-
Instruction RS RW D7 D6 D5 D4 D3 D2 D1 D0 Description Cycles
NOP 0 0 0 0 0 0 0 0 0 0 No Operation 0
Clear Display 0 0 0 0 0 0 0 0 0 1 Clear display & set address counter to zero 165
Set adress counter to zero, return shifted
Cursor Home 0 0 0 0 0 0 0 0 1 x display to original position. 3
DD RAM contents remains unchanged.
Entry Mode Set cursor move direction (I/D) and specify
0 0 0 0 0 0 0 1 I/D S automatic display shift (S).
3
Set
Display Turn display (D), cursor on/off (C), and
0 0 0 0 0 0 1 D C B cursor blinking (B).
3
Control
Cursor / Shift display or move cursor (S/C) and
0 0 0 0 0 1 S/C R/L x x specify direction (R/L).
3
Display shift
Set interface data width (DL), number of
Function Set 0 0 0 0 1 DL N F x x display lines (N) and character font (F).
3
Set CGRAM Set CGRAM address. CGRAM data is sent

0 0 0 1 CGRAM Address afterwards.
3
Address
Set DDRAM Set DDRAM address. DDRAM data is sent
0 0 1 DDRAM Address afterwards.
3
Address
Busy Flag &
0 1 BF Address Counter Read busy flag (BF) and address counter 0
Address
Write Data 1 0 Data Write data into DDRAM or CGRAM 3
Read Data 1 1 Data Read data from DDRAM or CGRAM 3
x : Don't care 1 Increment 1 Shift to the right

I/D R/L
0 Decrement 0 Shift to the left
1 Automatic display shift 1 8 bit interface
S DL
0 0 4 bit interface
1 Display ON 1 2 lines
D N
0 Display OFF 0 1 line
1 Cursor ON 1 5x10 dots
C F
0 Cursor OFF 0 5x7 dots
1 Cursor blinking
B
0 DDRAM : Display Data RAM
1 Display shift CGRAM : Character Generator RAM
S/C
0 Cursor move
LCD Display with 2 lines x 40 characters :
Pin No Name Function Description

LCD Display with 2 lines x 16 characters : 1 Vss Power GND
2 Vdd Power +5V
3 Vee Contrast Adj. (-2) 0 - 5 V
4 RS Command Register Select
5 R/W Command Read / Write
6 E Command Enable (Strobe)
7 D0 I/O Data LSB
8 D1 I/O Data
9 D2 I/O Data
10 D3 I/O Data
11 D4 I/O Data
12 D5 I/O Data
13 D6 I/O Data
14 D7 I/O Data MSB
( Ta = - 20 to + 75C )
(2) (2) (2) (2)

Write-Cycle VDD 2.7 - 4.5 V 4.5 - 5.5 V 2.7 - 4.5 V 4.5 - 5.5 V
(1) (1) (1)
Parameter Symbol Min Typ Max Unit
Enable Cycle Time tc 1000 500 - - - ns
Enable Pulse Width (High) tw 450 230 - - - ns
Enable Rise/Fall Time tr, tf - - - 25 20 ns
Address Setup Time tas 60 40 - - - ns
Address Hold Time tah 20 10 - - - ns
Data Setup Time tds 195 80 - - - ns
Data Hold Time th 10 10 - - - ns
(1) The above specifications are indications only (based on Hitachi HD44780). Timing will vary from manufacturer
to manufacturer.
(2) Power Supply : HD44780 S : VDD = 4.5 - 5.5 V

HD44780 U : VDD = 2.7 - 5.5 V
This data sheet refers to specifications for the Hitachi HD44780 LCD Driver chip, which is used for most LCD
modules.
Common types are : 1 line x 20 characters
1998/1999 by Craig Peacock, Australia http://www.beyondlogic.org

Peter Luethi, Switzerland http://www.electronic-engineering.ch
4.2005 EA DIP204-4
LCD MODULE 4x20 - 3.73mm
INCL. CONTROLLER KS0073
unting
re mo d
o re
no m requi
EA DIP204B-4NLW
Dimension 75 x 27 mm
EA DIP204-4HNLED
Dimension 68 x 27 mm
FEATURES
* HIGH CONTRAST LCD SUPERTWIST DISPLAY
* CONTROLLER KS0073 (NEAR 100% COMPATIBLE WITH HD44780)
* INTERFACE FOR 4- AND 8-BIT DATA BUS
* SERIAL SPI INTERFACE (SID, SOD, SCLK)
* POWER SUPPLY +3.3..+5V (-4NLW, -4NLED)
* POWER SUPPLY +5V ( -4HNLED)
* OPERATING TEMPERATURE RANGE 0~+50C (-20..+70C: -4NLW, -4HNLED)
* BUILT-IN TEMPERATURE COMPENSATION (-4NLW, -4HNLED)
* LED BACKLIGHT Y/G max. 150mA@+25C
* LOW POWER WITH BLUE-WHITE OPTIC / max. 45mA@+25C
* SOME MORE MODULES WITH SAME MECHANIC AND SAME PINOUT:
- DOTMATRIX 1x8, 2x16
- GRAPHIC 122x32
* NO SCREWS REQUIRED: SOLDER ON IN PCB ONLY
* DETACHABLE VIA 9-PIN SOCKET EA B200-9 (2 PCS. REQUIRED)
ORDERING INFORMATION
LCD MODULE 4x20 - 3.73mm WITH LED BACKLIGHT Y/G EA DIP204-4NLED
SAME BUT FOR TOP. -20~+70C / TSTOR. -30~+80C EA DIP204-4HNLED
BLUE-WHITE, TOP. -20~+70C / TSTOR. -30~+80C EA DIP204B-4NLW
9-PIN SOCKET, HEIGHT 4.3mm (1 PC.) EA B200-9
ADAPTOR PCB WITH STANDARD PINOUT PITCH 2.54mm EA 9907-DIP
LOCHHAMER SCHLAG 17 D- 82166 GRFELFING

Phone +49-89-8541991 FAX +49-89-8541721 http://www.lcd-module.de
EA DIP204-4
PINOUT
Pin Symbol Level Function Pin Symbol Level Function
1 VSS L Power Supply 0V (GND) 10 D3 H/L Display Data
2 VDD H Power Supply +5V 11 D4 (D0) H/L Display Data
3 VEE - Contrast adjustment, input 12 D5 (D1) H/L Display Data
4 RS (CS) H/L H=Command, L=Data 13 D6 (D2) H/L Display Data
5 R/W (SID) H/L H=Read, L=Write 14 D7 (D3) H/L Display Data, MSB
6 E (SCLK) H Enable (falling edge) 15 - - NC (see EA DIP122-5N)

7 D0 (SOD) H/L Display Data, LSB 16 RES L Reset (internal Pullup 10k)
8 D1 H/L Display Data 17 A - LED B/L+ Resistor required
9 D2 H/L Display Data 18 C - LED B/L-
BACKLIGHT
Using the LED backlight requires an current source or external current-limiting resistor. Forward
voltage for yellow/green backlight is 3.9~4.2V and for white LED backlight is 3.0~3.6V. Please take
care of derating for Ta>+25C.
Note: - Do never connect backlight direct to 5V; this may destroy backlight immediately !
- Blue-white displays do always need a backlight for contrast (min. 5mA).
TABEL OF COMMAND (KS0073, IE=HIGH)

C ode Execute
Instruction RE DB DB DB DB DB DB DB DB Description Time
RS R/W
Bit 7 6 5 4 3 2 1 0 (270kHz)
Clears all display and returns the cursor to the
Clear Display * 0 0 0 0 0 0 0 0 0 1 1.53ms
hom e position (Address 0).
Returns the Cursor to the hom e position (Address
0). Also returns the display being shifted to the
Cursor At Home 0 0 0 0 0 0 0 0 0 1 * 1.53ms
original position. DD RAM contents rem ain
unchanged.
Set Power down m ode bit.
Power Down
1 0 0 0 0 0 0 0 0 1 PD PD=0: powerdown m ode disable 39s
Mode PD=1: powerdown m ode enable
Cursor m oving direction (I/D=0: dec; I/D=1: inc)
0 0 0 0 0 0 0 0 1 I/D S 39s
shift enable bit (S=0: disable; S=1: enable shift)
Entry Mode Set
Segm ent bidirectional function
0 0 0 0 0 0 0 0 1 1 BID (BID=0: Seg1->Seg60; BID=1: Seg60->Seg1) 39s
D=0: display off; D=1: display on
Display On/Off
0 0 0 0 0 0 0 1 D C B C=0: cursor off; C=1: cursor on 39s
Control B=0: blink off; B=1: blink on
FW=0: 5-dot font width; FW=1: 6-dot font width
extended
1 0 0 0 0 0 0 1 FW BW NW BW=0: norm al cursor; BW=1: inverting cursor 39s
Function Set NW=0: 1- or 2-line (see N); NW=1: 4-line display
Moves the Cursor or shifts the display
Cursor / Display
0 0 0 0 0 0 1 S/C R/L * * S/C=0: cursor Shift; S/C=1: display shift 39s
Shift R/L=0: shift to left; R/L=1: shift to right
Scroll Enable 1 0 0 0 0 0 1 H4 H3 H2 H1 Determ ine the line for horizontal scroll 39s
sets interface data length (DL=0:4-bit; DL=1:8-bit)
num ber of display lines (N=0: 1-line; N=1: 2-line)
0 0 0 0 0 1 DL N RE DH REV extension register (RE= 0/1) 39s
Function Set scroll/shift (DH=0: dot scroll; DH=1: display shift)
reverse bit (REV=0:norm al; REV=1:inverse display)
CG-/SEG-RAM blink (BE=0: disable; BE=1: enable)
1 0 0 0 0 1 DL N RE BE LP LP=0: norm al m ode; LP=1: low power m ode 39s
CG RAM Sets the CG RAM address. CG RAM data is sent

0 0 0 0 1 AC and received after this setting.
39s
Address Set
SEG RAM Sets the SEG RAM address. SEG RAM data is sent
Address Set
1 0 0 0 1 * * AC and received after this setting.
39s
DD RAM Sets the DD RAM address. DD RAM data is sent

0 0 0 1 AC and received after this setting.
39s
Address Set
Set Scroll
Quantity
1 0 0 1 * SQ Sets the quantity of horizontal dot scroll (DH=0) 39s
Reads Busy flag (BF) indicating internal operation

Busy Flag /
* 0 1 BF AC is being perform ed and reads address counter -
Address Read contents.
Writes data into internal RAM
Write Data * 1 0 Write Data 43s
(DD RAM / CG RAM / SEGRAM)
Reads data from internal RAM
Read Data * 1 1 Read Data 43s
2
EA DIP204-4
INITIALISATION EXAMPLE FOR 8 BIT MODE Addressing:
Command RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Hex Description
1st. line $00..$13
Function Set 0 0 0 0 1 1 0 1 0 0 $34 8 bit data length, extension bit RE=1
2nd. line $20..$33
ext. Function Set 0 0 0 0 0 0 1 0 0 1 $09 4 line mode
3rd. line $40..$53
Function Set 0 0 0 0 1 1 0 0 0 0 $30 8 bit data length, extension bit RE=0 4th. line $60..$73
Display ON/OFF 0 0 0 0 0 0 1 1 1 1 $0F display on, cursor on, cursor blink
Clear Display 0 0 0 0 0 0 0 0 0 1 $01 clear display, cursor 1st. row, 1st. line
Entry Mode Set 0 0 0 0 0 0 0 1 1 0 $06 cursor will be automatically incremented
CHARACTER SET
A full character set is built in already.
Additionally to that 8 more characters can
be defined individually.
CONTRAST ADJUSTMENT
Pin 3 requires driving voltage for contrast
VEE. Adjustment can be done by external
potentiometer for example.
Note: In contrast to many other
dotmatrix lcd modules input is
supplied with VDD level here !
VDD
VEE
2,5k W
EA DIP204-4NLED EA DIP204B-4NLW
EA DIP204-4HNLED
Both versions -4NLW and -4HNLEDdo

have a built-in temperature
compensatione; so there's no more need
for contrats adjustment while operation
anymore.
CREATING YOUR OWN CHARACTERS

All these character display modules got the feature to create 8 own characters (ASCII Codes 0..7) in
00 00
addition to the 240 ROM fixed codes.
Set CG RAM Address Data
1.) The command "CG RAM Address Set"
Bit
defines the ASCII code (Bit 3,4,5) and the Adresse Hex Hex
00 00 00000 00 00
7 6 5 4 3 2 1 0
dot line (Bit 0,1,2) of the new character. 0 0 0 $40 0 0 1 0 0 $04
Example demonstrates creating ASCII 0 0 1 $41 0 0 1 0 0 $04
code $00. 0 1 0 $42 0 0 1 0 0 $04
00
0 1 1 $43 0 0 1 0 0 $04
2.) Doing 8 times the write command "Data 0 1 0 0 0 X X X
1 0 0 $44 1 0 1 0 1 $15
Write" defines line by line the new 1 0 1 $45 0 1 1 1 0 $0E
character. 8th. byte stands for the cursor 1 1 0 $46 0 0 1 0 0 $04
line. 1 1 1 $47 0 0 0 0 0 $00
3.) The new defined character can be used

as a "normal" ASCII code (0..7); use with "DD RAM Address Set" and "Data Write".
3
EA DIP204-4
DIMENSIONS
all dimensions are in mm
ATTENTION
handling precautions!
SERIAL MODE
Factory set for interface is parallel with 4 bit or 8 bit data bus. Alternative module can be programmes
with serial data stream. For that solder link 4/8 has to be opened and closed to SPI side. Specification
for serial operation mode is written down in user manual for KS0073: http://www.lcd-module.de/eng/
pdf/zubehoer/ks0073.pdf
ADAPTOR PCB
The adaptor pcb EA 9907-DIP is made for a quick
function test for all DIP modules. This interface board
provides the standard dotmatrix pinout with 1x14,
1x16, 2x7 and 2x8 pins (0.1" pitch).

1.2006 EA DIP204-6
LCD- MODUL 4x20 - 6,45mm
INKL. KONTROLLER KS0073
ntage
e Mo lich
n
ke order
i
erf
EA DIP204B-6NLW
EA DIP204J-6NLW:
Abmessungen 75 x 46 mm
TECHNISCHE DATEN
* KONTRASTREICHE LCD-SUPERTWIST ANZEIGE
* BLAUER HINTERGRUND MIT WEISSER SCHRIFT
* WEISSER HINTERGRUND UND SCHWARZE SCHRIFT
* EXTREM KOMPAKT MIT NUR 75mm BREITE
* KONTROLLER KS0073 (SEHR HNLICH ZU HD44780)
* ANSCHLUSS AN 4- ODER 8-BIT DATENBUS
* SERIELLES SPI-INTERFACE (SID, SOD, SCLK, CS)
* SPANNUNGSVERSORGUNG +3,3..5,0V / typ. 4 mA (O. BELEUCHTUNG)
* BETRIEBSTEMPERATURBEREICH -20..+70C
* AUTOMATISCHE TEMPERATURKOMPENSATION
* LED-BELEUCHTUNG WEISS, max. 75mA@+25C
* 16 ICONS (BATTERIE, PFEILE ETC.) KNNEN ANGEZEIGT WERDEN
* KEINE MONTAGE ERFORDERLICH: EINFACH NUR IN PCB EINLTEN
* STECKBAR BER BUCHSENLEISTEN EA B254-12 (2 STK.)
* 128x64 GRAFIK IM GLEICHEN GEHUSE, GLEICHES PINOUT: EA DIP128
BESTELLBEZEICHNUNG
LCD-MODUL 4x20/6,45mm MIT LED-BELEUCHTUNG, BLAU EA DIP204B-6NLW
IN SCHWARZ-WEISS ALS FSTN EA DIP204J-6NLW
BUCHSENLEISTE 4,5mm HOCH, 12 PINS (1 STCK) EA B254-12

EA DIP204-6
PINBELEGUNG
4-/8-Bit Mode (Auslieferungszustand) SPI Mode (Ltbrcke umgelegt auf "SPI")
Pin Symbol Funktion Pin Symbol Funktion Pin Symbol Funktion Pin Symbol Funktion
1 VSS Stromversorgung 0V (GND) 13 nicht belegt 1 VSS Stromversorgung 0V (GND) 13 nicht belegt
2 VDD Stromversorgung +5V 14 VSS Stromversorgung 0V (GND) 2 VDD Stromversorgung +5V 14 VSS Stromversorgung 0V (GND)
3 VCI Kontrastspannungseinstellung 15 D0 Display Data, LSB 3 VCI Kontrastspannungseinstellung 15 SOD Data Out
4 RES L: Reset 16 D1 Display Data D1 4 RES L: Reset 16 nicht belegt
5 RS H=Daten; L=Befehl 17 D2 Display Data D2 5 CS Chip Select 17 nicht belegt
6 R/W H=Read, L=Write 18 D3 Display Data D3 6 SID Data In 18 nicht belegt
7 E Enable 19 D4 (D0) Display Data D4 7 SCLK Shift Clock 19 nicht belegt
8 nicht belegt 20 D5 (D1) Display Data D5 8 nicht belegt 20 nicht belegt
9 nicht belegt 21 D6 (D2) Display Data D6 9 nicht belegt 21 nicht belegt
10 nicht belegt 22 D7 (D3) Display Data, MSB 10 nicht belegt 22 nicht belegt
11 nicht belegt 23 A LED-Bel. + (RV erford.) 11 nicht belegt 23 A LED-Bel. + (RV erford.)
12 nicht belegt 24 C LED-Bel. - 12 nicht belegt 24 C LED-Bel. -
BELEUCHTUNG
Der Betrieb der Hintergrundbeleuchtung erfordert eine Stromquelle oder einen externen
Vorwiderstand zur Strombegrenzung. Die Flussspannung der Beleuchtung liegt zwischen 3,0V und
3,6V. Bitte beachten Sie ein Derating fr den Betrieb bei Temperaturen > +25C!
Achtung: Betreiben Sie die Beleuchtung nie direkt an 5V; das kann zur sofortigen Zerstrung fhren!
Technische nderung vorbehalten. Wir bernehmen keine Haftung fr Druckfehler und Applikationsbeispiele.
Zum Ablesen des blauen Displays ist die Hintergundbeleuchutng unbedingt erforderlich. Bei direkter
Sonneneinstrahlung emfehlen wir den J-Typ.
BEFEHLSTABELLE (KS0073, IE=HIGH)

C ode Execute
Instruction RE DB DB DB DB DB DB DB DB Description Time
RS R/W
Bit 7 6 5 4 3 2 1 0 (270kHz)
Clears all display and returns the cursor to the
Clear Display * 0 0 0 0 0 0 0 0 0 1 1.53ms
home position (Address 0).
Returns the Cursor to the home position (Address
0). Also returns the display being shifted to the
Cursor At Home 0 0 0 0 0 0 0 0 0 1 * 1.53ms
original position. DD RAM contents remain
unchanged.
Set Power down mode bit.
Power Down
1 0 0 0 0 0 0 0 0 1 PD PD=0: powerdown mode disable 39s
Mode PD=1: powerdown mode enable
Cursor moving direction (I/D=0: dec; I/D=1: inc)
0 0 0 0 0 0 0 0 1 I/D S 39s
shift enable bit (S=0: disable; S=1: enable shift)
Entry Mode Set
Segment bidirectional function
0 0 0 0 0 0 0 0 1 1 BID 39s
(BID=0: Seg1->Seg60; BID=1: Seg60->Seg1)
D=0: display off; D=1: display on
Display On/Off
0 0 0 0 0 0 0 1 D C B C=0: cursor off; C=1: cursor on 39s
Control B=0: blink off; B=1: blink on
FW=0: 5-dot font width; FW=1: 6-dot font width
extended
1 0 0 0 0 0 0 1 FW BW NW BW=0: normal cursor; BW=1: inverting cursor 39s
Function Set NW=0: 1- or 2-line (see N); NW=1: 4-line display
Moves the Cursor or shifts the display
Cursor / Display
0 0 0 0 0 0 1 S/C R/L * * S/C=0: cursor Shift; S/C=1: display shift 39s
Shift R/L=0: shift to left; R/L=1: shift to right
Scroll Enable 1 0 0 0 0 0 1 H4 H3 H2 H1 Determine the line for horizontal scroll 39s

sets interface data length (DL=0:4-bit; DL=1:8-bit)
number of display lines (N=0: 1-line; N=1: 2-line)
0 0 0 0 0 1 DL N RE DH REV extension register (RE= 0/1) 39s
scroll/shift (DH=0: dot scroll; DH=1: display shift)
Function Set reverse bit (REV=0:normal; REV=1:inverse display)
CG-/SEG-RAM blink (BE=0: disable; BE=1:
1 0 0 0 0 1 DL N RE BE LP enable) 39s
LP=0: normal mode; LP=1: low power mode
CG RAM Sets the CG RAM address. CG RAM data is sent
0 0 0 0 1 AC 39s
Address Set and received after this setting.
SEG RAM Sets the SEG RAM address. SEG RAM data is
1 0 0 0 1 * * AC
sent and received after this setting.
39s
Address Set
DD RAM Sets the DD RAM address. DD RAM data is sent
0 0 0 1 AC 39s
Address Set and received after this setting.
Set Scroll
Quantity
1 0 0 1 * SQ Sets the quantity of horizontal dot scroll (DH=0) 39s
Reads Busy flag (BF) indicating internal operation

Busy Flag /
* 0 1 BF AC is being performed and reads address counter -
Address Read contents.
Writes data into internal RAM
Write Data * 1 0 Write Data 43s
Reads data from internal RAM
Read Data * 1 1 Read Data (DD RAM / CG RAM / SEGRAM)
43s
2
EA DIP204-6
INITIALISIERUNGSBEISPIEL FR DEN 8-BIT MODUS Adressierung:
RE 1. Zeile $00..$13
Befehl Bit
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Hex Bemerkung
2. Zeile $20..$33
Function Set 0 0 0 0 0 1 1 0 0 0 0 $30 8-Bit Datenlnge, extension Bit RE=0
0 0 0 0 0 0 0 0 1 1 0
3. Zeile $40..$53
Entry Mode Set $06 Cursor Auto-Increment
Function Set 0 0 0 0 0 1 1 0 1 1 0 $36 8-Bit Datenlnge, RE-Bit =1, Blink enable BE =1
4. Zeile $60..$73
ext. Function Set 1 0 0 0 0 0 0 1 0 0 1 $09 4-Zeilen Modus
Set SEGRAM adr 1 0 0 0 1 0 0 0 0 0 0 $40 Icon-RAM Adresse auf $00 setzen
Bitte beachten Sie, dass vor
16 x 16x $00 schreiben
1 1 0 0 0 0 0 0 0 0 0 $00
Write Data um alle Icons zu lschen jedem Schreibzugriff anhand des
Function Set 1 0 0 0 0 1 1 0 0 0 0 $30 8-Bit Datenlnge, RE-Bit =0 Busy-Flags sichergestellt sein
Display ON/OFF 0 0 0 0 0 0 0 1 1 1 1 $0F Display ein, Cursor ein, Cursor blinken muss, dass der Kontroller bereit
Clear Display 0 0 0 0 0 0 0 0 0 0 1 $01 Display lschen, Cursor auf 1. Spalte von 1. Zeile ist neue Daten anzunehmen !
ZEICHENSATZ
Neben abgebildeter Zeichensatz ist bereits
integriert. Zustzlich knnen 8 eigene Zeichen
frei definiert werden.
Technische nderung vorbehalten. Wir bernehmen keine Haftung fr Druckfehler und Applikationsbeispiele.
KONTRASTEINSTELLUNG
Die Kontrastspannung wird an Pin 3 (VCI)
eingespeist.
Das Display EA DIP204 besitzt eine eingebaute
Temperaturkompensation fr -20 bis +70C; ein
Nachstellen des Kontrastes whrend des Be-
triebs ist hier nicht mehr erforderlich.
VDD (5V)
VDD (3,3V)
VCI 470 W
1k
VCI
2,5k W
3,3V Betrieb 5V Betrieb
PROGRAMMIERUNG VON SELBSTDEFINIERTEN ZEICHEN

Bei allen hier angebotenen Dotmatrixdisplays (Text) knnen zustzlich zu den 240 im ROM fest einprogrammierten Zeichen
00 00
bis zu 8 weitere frei definiert werden (ASCII Codes 0..7).
1.) Mit dem Kommando "CG RAM Address Set" wird Adresse im CG RAM setzen Daten des Zeichens
der ASCII Code (Bit 3,4,5) und die entsprechende Bit
Adresse Hex Hex
Pixelzeile (Bit 0,1,2) des Zeichens angewhlt. Im
00 00 00000 00 00
7 6 5 4 3 2 1 0
Beispiel wird ein Zeichen mit dem Code $00 0 0 0 $40 0 0 1 0 0 $04
definiert. 0 0 1 $41 0 0 1 0 0 $04
2.) Mit dem Befehl "Data Write" wird nun Pixelzeile 0 1 0 $42 0 0 1 0 0 $04
fr Pixelzeile das Zeichen in das CG RAM
00
0 1 1 $43 0 0 1 0 0 $04
geschrieben. Ein Zeichen bentigt 8 0 1 0 0 0 1 0 0 $44 X X X
1 0 1 0 1 $15
Schreiboperationen, wobei die 8. Zeile der 1 0 1 $45 0 1 1 1 0 $0E
Cursorzeile entspricht. 1 1 0 $46 0 0 1 0 0 $04
3.) Das neu definierte Zeichen wird genauso 1 1 1 $47 0 0 0 0 0 $00
behandelt wie ein "normales" ASCII Zeichen
(Verwendung: "DD RAM Address Set", "Data Write").
3
EA DIP204-6
ABMESSUNGEN +0,0
75,0 -0,3
61,0 (VA)
0,2
56,33 (AA) 3,0 10,8
41,0 34,0
A
45,8 0,2
33,67 (AA)
38,0 (VA)
Backlight 5x white LED

R0,5
C
alle Mae in mm
Pin 1
0 15,0 38,5 67,0
2,50
J1 24
1 SPI 4/8
0,81
-20..+70C
0,78
0,81
6,45
KS0073
7,97
4x20 / 6,5mm
11- 2,54
24- 0,5
EA DIP204B-6NLW
Hinweis:
LC-Displays sind generell
12
nicht geeignet fr Wellen-
ELECTRONIC ASSEMBLY 13
0,48 oder Reflowltung.
0,45 Temperaturen ber 90C
0,1
24- 0,5 2,37
knnen bleibende Schden
63,5 2,84
hinterlassen.
ANSTEUERUNG DER SYMBOLE

Nach dem Einschalten werden zufllig Symbole angezeigt. Um diese unsichtbar zu machen, verwenden
Sie das Initialisierungs- Beispiel zum Setzen eines Icons (8-Bit)
beispiel auf der Seite 3. Befehl RE
Bit
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Hex Bemerkung
Um einzelne Symbole ge- Busy-Flag / 0 0 1 BF AC

evtl. aktuelle DDRAM-Adresse AC lesen und merken
Address read (z.B in einer Variablen LASTADR=AC)
zielt zu setzen, lesen Sie Function Set 0 0 0 0 0 1 1 0 1 1 0 $36 8-Bit Datenlnge, RE-Bit=1, Blink enable BE=1
das nebenstehende Bei- Set SEGRAM adr 1 0 0 0 1 0 0 0 0 1 0 $42 Icon-RAM Adresse auf $02 (Briefsymbol) setzen
spiel. Write Data 1 1 0 0 0 0 1 0 0 0 0 $10 $10 schreiben um das Briefsymbol anzuzeigen
Function Set 1 0 0 0 0 1 1 0 0 0 0 $30 8-Bit Datenlnge, extension Bit RE=0

Jedes Symbol kann blin- Set DDRAM adr 0 0 0 1 LASTADR $80 DDRAM Adresse muss wieder gesetzt werden
kend oder in normaler Dar-
stellung (solid) angezeigt Icon - Symbols
werden.
SEGRAM address $00 $01 $02 $03 $04 $05 $06 $07 $08 $09 $0A $0B $0C $0D $0E $0F $0F $0F $0F $0F
data solid $10 $10 $10 $10 $10 $10 $10 $10 $10 $10 $10 $10 $10 $10 $10 $1F $1E $1C $18 $10
data blink (BE=1!) $50 $50 $50 $50 $50 $50 $50 $50 $50 $50 $50 $50 $50 $50 $50 $50
SPI MODE
Das Modul kann auch mit synchron seriellen Daten beschrieben werden. Dazu muss die
Wechselltbrcke 4/8 auf der Modulrckseite geffnet und auf SPI geschlossen werden. Die
entsprechende Pinbelegung ist auf der Seite 2 oben abgebildet und die Spezifikation zur seriellen
Datenbertragung finden Sie im Kontrollerdatenblatt KS0073 von Samsung: http://www.lcd-
module.de/eng/pdf/zubehoer/ks0073.pdf. Die Initialisierung und Programmierung erfolgt identisch.

Datenbltter zu allen LCD-Modulen von ELECTRONIC ASSEMBLY Tel. +49-89-8541991
Folgende Themen finden Sie auf dieser Seite:

[ Grafik | Dotmatrix | Kontroller, Interface, Zubehr | Digitalvoltmeter | Ereigniszhler | Frequenzzhler |
Displaymodule | Uhren, Thermometer | Software | Home | eMail ]
Alle Datenbltter sind in deutsch oder englisch als PDF-Dateien abgelegt.

Zum Anzeigen und Ausdrucken bentigen Sie den frei erhltlichen Adobe Acrobat Reader 4.0
Grafik
bersicht: 98x32 .. 640x480 Pixel mit/ohne Kontroller
Grafikdisplays
Liste Einzeldatenbltter
EA DOGM132-5 DOG-Serie 132x32, 3,3V SPI Multi Colour
EA DOGM128-6 DOG-Serie 128x64, 3,3V SPI Multi Colour
EA DIP122-5 DIP-Modul 122x32 mit SED 1520 68x27mm
EA DIP128-6 DIP-Modul 128x64 mit KS0107/0108 75x46mm
EA DIP240-7 DIP-Modul 124x128 mit T6963 113x70mm
Intell. Grafik 240x128 mit integr. Fonts und
EA eDIP240-7
Grafikfunktionen
Intell. Grafik 320x240, 5,7" -VGA mit integr. Fonts
EA eDIP320-8
und Grafikfunktionen
EA GE120-5 120x32 Pixel mit 2 Fonts, Grafikroutinen, RS232
128x64 Pixel, supeklein mit 5Fonts, Grafikroutinen,
EA GE128-6N9
RS232
EA GE128-6N3 128x64 Pixel mit 3 Fonts, Grafikroutinen, RS232
EA GE128-7 240x64, 240x128, 128x128 Pixel, 3 Fonts,
EA GE240-6 /-7 Grafikroutinen, RS232
EA KIT120-5 120x32 Pixel, 5 Fonts, RS-232, Makros, Touch Panel
EA KIT122 122x32 Pixel mit 2 Fonts, Grafikroutinen, RS-232/Bus
128x64 Pixel mit 10 Fonts, Grafikroutinen, RS-232/GXT,

Touchpanel, mit Flash, Rev.B
EA KIT128
Versionen -BUS und -SYNC, Rev.A
EA KIT129-6LW 128x64 Pixel, 5 Fonts, Makros, RS-232, Touchpanel
EA KIT160-6 160x80 Pixel, 5 Fonts, Makros, RS-232, Touchpanel
EA KIT160-7 160x128 Pixel, 5 Fonts, Makros, RS-232, Touchpanel
EA KIT320-8 320x240 Pixel 5,7", RS-232, Makros, Touch Panel
EA KIT320F-8 Farbe 320x240 Pixel 5,7", RS-232, Makros, Touch Panel
EA KIT8640
640x480, 320x240 bzw. 320x240 mit Touch Panel,
EA KIT7320
8 Fonts, Grafikroutinen, RS-232/Bus/RS-422
EA KIT8320TP
Dotmatrix
8081-A3N DIP-Modul 1x8, 7,15mm
http://www.lcd-module.de/deu/dbl/dbl.htm (1 of 9)12/02/2008 17:31:41

DIPS082-HNLED DIP-Modul 2x8, 5,01mm

DIP081-CNLED DIP-Modul 1x8, 11.48mm
DIP162-DNLED /
DIP-Modul 2x16, 6.68mm
DIP162-DN3LW
DIP204-4NLED DIP-Modul 4x20, 3.72mm
DIP204-6NLW DIP-Modul 4x20, 6,45mm
DOG-Serie DOG-Module 3,3V superflach:1x8 2x16, 3x16
1x8 1x16 1x20 1-zeilige Displays, HD 44780-kompatibel
2x8 2x12 2x16
2-zeilige Displays, HD 44780-kompatibel
2x20 2x24 2x40
3x12 EA T123-I2C 3-zeiliges Display, I2C Bus Interface
4x16 4x20 4x20/3mm
4-zeilige Displays, HD 44780-kompatibel
4x40
BlueLine W-Serie Blaue Displays mit weier LED-Beleuchtung
BlueLine E-Serie nicht fr Neuentwicklungen !
J-Serie Preisgnstige Dotmatrixserie von 1x16 bis 4x20
Die Seriellen (RS-232) 2x16 .. 16x40 Zeichen, RS-232 / RS-422, adressierbar
Serielle mit 2x16..4x20/2x40 Zeichen, RS-232, 64 Meldungen, 6
Textspeicher Eingnge
Dynamische Dotmatrix Textdisplays mit 4 umschaltbaren Schriften, RS-232
Interface, Displaykontroller, Zubehr, Adapter

EA 9710: RS-232, RS-422, 6 Fonts, Grafikroutinen
RS-232 fr Grafik
bis 640x480
EA 9707: 1x8 .. 4x40, Zeilenverwaltung (RS-232 +
RS-232 fr Dotmatrix
RS-422)
EA 9709 mit Tastatureingang: 1x8 .. 4x40,
RS-232 fr Dotmatri
Zeilenverwaltung (RS-232)
IIC fr Dotmatrix EA 9774: 1x8 .. 4x20/2x40, ohne Zeilenverwaltung
Serie EA 017 mit und ohne Scheibe fr Grafik und
Frontrahmen
Dotmatrix
EL-Inverter fr beleuchtete Module mit EL-Folien
CFL-/CCT-Inverter fr beleuchtete Module mit CFL-Rhren
EL-Leuchtfolien, Standard und Custom, LED-
EL-Folien + LED-Bel.
Beleucht.
LCD-Glas LCD Standardglser ohne Ansteuer-Elektronik
Displaykontroller
fr Textanzeigen
HD 44780 nicht mehr lieferbar
HD 66712 nahezu 100% kompatibel zu HD 44780
KS 0066 kompatibel zu HD 44780
KS 0073 nahezu 100% kompatibel zu HD 44780
LC 7985 kompatibel zu HD 44780
NT 3881 kompatibel zu HD 44780
SED 1278 kompatibel zu HD 44780
ST 7036 moderner Textkontroller, low power
ST 7066 kompatibel zu HD 44780
PCF 2116 mit IC Bus Interface (EA T123-I2C)
fr Grafikanzeigen

HD 61202/3 fr 128x64
HD 61830 nicht mehr lieferbar
KS 0107/8 fr 128x64, kompatibel zu HD 61202/3
KS 0713, S6B1713 fr 128x64
LH 155 fr 128x64
LC 7981 fr 128x128, 240x64, 160x80, komp. zu HD61830
PT6520 fr 120x32, kompatibel zu SED1520
PT6607/8 fr 128x64, kompatibel zu HD 61202/3
SBN1661 fr 120x32, kompatibel zu SED1520
S1D13700 fr 320x240, Ersatz fr SED 1335
SED 1520 fr 120x32 / 122x32
SED 1330 nicht mehr lieferbar
SED 1335 nicht mehr lieferbar
SED 1565/S1D15605 fr 128x64 mit Icons (132x65)
SSD1815 fr 132x64 mit Icons (132x65)
ST 7565R fr 128x64 mit Icons (132x65)
fr 128x64, 160x32, 256x32 mit chines.
ST 7920
Zeichensatz
T 6963 fr 128x64, 128x128, 240x64, 240x128
fr 7-Segmentanzeigen
uPD7225 32 Ausgnge, statisch, MUX 1/2, 1/3, 1/4
High-Level-Grafikkontroller
EA IC1520
High-Level-Grafikkontroller mit mehreren eingebauten
EA IC202 Fonts und Grafikroutinen fr LCDs mit SED1520,
EA IC6963 HD61202/KS0107 oder T6963 Kontroller
Adapterplatinen
EA 9041/42 Testplatine fr EA 2041 u. EA 2042
EA 9043 Funktionsplatine fr EA 2043
EA 9044 DVM Adapter fr EA 4044
EA 9055 DVM Adapter fr EA 4055 u. EA 4055-S
Umsetzer von BCD-Mux auf BCD-statisch f.
EA 9106
EA4106-SG
EA 9110-M PLL-Multiplikator fr Serie EA 6110
EA 9110-T Progr. Vorteiler fr Serie EA 6110
EA 9244 Funktionsplatine fr EA 2044
EA 9335-50 Displayadapter 3st., 13 mm auf 50 mm
EA 9340-50 Displayadapter 4st., 13 mm auf 50 mm
EA 9401 DVM-Adapter fr EA VK-1000
EA 9410-RMS True RMS, AC-Vorsatz fr Serie EA 4110
EA 9410-DC Potentialtrenner DC/DC fr Serie EA 4110
EA 9410-RMSDC True RMS und Potentialtrenner fr Serie 4110
EA 9610 Tiefstfrequenzmultiplikator fr Serie EA 6110
RS-232 Interface fr alphan. Dotmatrix Serie
EA 9700-A,-B,-C
EA 7000/8000/P000
Textkontroller 255 Texte fr Binranwahl fr
EA 9700-TXT
Dotmatrix-LCD

RS-232 Interface f. Grafikanzeigen mit Kontroller

EA 9700-GRF/GIO
HD 61830
RS-232 Interface f. Grafikanzeigen mit Kontroller
EA 9700-T69
T 6963C
Festtextspeicher (64 Texte) fr Dotmatrix 1x8..4x20
EA 9705-TXT
(2x40)
RS-232 Interface fr Dotmatrix, nicht fr
EA 9706
Neuentwicklung
EA 9707 RS-232 Interface fr Dotmatrix 1x8 bis 4x40
RS-232/RS-485/BUS/Centronics Kontrollerfr
EA 9710
Grafik bis 640x480 inkl. Fonts
EA 9716-W2C RS-232 Kontroller fr Dotmatrix
EA 9717 RS-232 Schnittstelle fr 7-Segment LC-Anzeigen
V.24/RS-422 Kontroller fr Dotmatrix +
EA 9718
Tastaturanschlu
V.24/RS-422/BUS/Centronics Grafikkontroller fr
EA 9719
HD61202
EA 9720 V.24/BUS/Centronics Grafikkontroller fr SED1520
IC-Bus Interface fr alphanum. Punktmatrix
EA 9774-A
Anzeigen
EA 9777-1 Programmer-/ Adapterboard fr EA eDIP240-7
EA 9907-T Steckadapter mit VEE-Spannungserzeugung bis -29V
Optokoppler-, Quadratur- und
EA TM-92xx
Schraubklemmenvoratz fr Zhlermodule
Digitalvoltmeter
EA 4001 3st. DVM, 13 mm, 9V
EA 4009-
3st. Sub-Micro-DVM, 5,5 mm, 9V
OEM1B
EA 4010-OEM1 3st. Sub-Micro-DVM, 5,5 mm, 9V
EA 4011 3st. Micro-DVM, 5,5 mm, 5/9V
EA 4012 3st. Mini-DVM, 11 mm, 5/9V
EA 4013 3st. Submin-DVM, 7,8 mm, 5/9V
EA 4015-939 3st. Autoranging Volt Ampere Ohm, 15mm,5/9V,LED-Bel
EA 4016 4st. DVM 10 mm, 0,2/2V, 10V
3st. Autoranging Volt Ampere Ohm mit Bargraph, 14mm,

EA 4017-977
5/9V, LED-BEL.
EA 4018-959 3st. LED DVM, 14,2 mm, 5V
EA 4019-950 3st. DVM, 19 mm, 5/9V, LED-Bel.
EA 4021 3st. DVM-L, 15 mm, 5/10V
EA 4022 3st. DVM-L, 15 mm, 5/10V
EA 4024-942 3st. 4-20mA Anzeiger, 19mm
4st. DVM 2V m. RS-232/RS-485, min/max, Snap-In, LED-
EA 4025
Bel.
EA 4031 4st. DVM 0,2/2V, 10 mm, 5/10V

EA 4035 Serie 3st. DVM Serie, IP65, 10mm, 5V

EA 4040-DP 3st. LED DVM, 13 mm, 5V
3st. Mini-DVM-Modul, mit LED rot oder grn,
EA 4042
Negativdarstellung
EA 4044 3st. Mini DVM-L, 10 mm, 10V
EA 4044-116 3st. DVM-S, 0,2V, Holdeingang, 12,5 mm, 10V

EA 4044-125 3st. DVM-L, 0,2V, 12,5 mm, 10V
EA 4050 41 Segment Bargraph 0,2V, 5/10V
EA 4055 3st. Mini DVM-L, 12 mm, 5/10V
EA 4055-100 3st. Mini DVM-S, 0,2V, 12 mm, 5/10V

EA 4055-850 3st. Mini DVM-S, 0,2V, 12 mm, 5/10V, negativ rot
EA 4060-DP 4st. DVM 0,2/2V, 10 mm, 5/10V
EA 4080-1710 9st. LCD Zeiger 0..1V, Einlochmontage
EA 4100 3st. DVM-N, 13 mm, 10V
EA 4101 3st. DVM-L, 13 mm, 10V
EA 4106 4st. DVM 0,2/2V, 10mm, BCD-Mux, 5V
EA 4107 4st. DVM 0,2/2V, 10 mm, 5V
EA 4109 3st. Autoranging Volt Ampere Ohm, 13mm, 5,5..26V
3st. DVM-N, L, S, 13 mm .. 50mm Ziffernhhe, 5V

EA 4110
Versorgung
EA 4120-13 3st. DVM-N, L, S, 13 mm 5,5-26V
EA 4130-AT 3st. 0-20mA, 13mm, mit Potentialtrennung
EA 4130-CL 3st. 4-20mA Anzeiger, 13mm
EA 4130-VB 3st. DVM ,13mm, 5V
3st. 4-20mA Anzeiger, 13mm, im Snap-In
EA 4220-CL
Nicht mehr lieferbar. Ersatz: EA 4130-CL
3st. DVM ,13mm, 5V, im Snap-In
EA 4220-VB
Nicht mehr lieferbar. Ersatz: EA 4130-VB
EA 4310-B 3st. Kompakt DVM 13 mm 5V
EA 4311-B 100 Segment Bargraph + 3st. DVM 9 mm 5V
EA 4330-BG 3st. Kompakt DVM 13 mm 5V LED-Beleuchtung
EA 4333-BG 100 Segment Bargraph + 3st. DVM 9 mm 5V LED-Bel.
EA 4338-BG 3st. Kompakt DVM mit LED-Beleuchtung 5V/9V
3st. 4-20mA Anzeiger, Versorgung aus Schleifenstrom LED-
EA 4339-BG
Bel.
EA 4535-A 3st. Min-Max-DVM mit V.24 Schnittstelle
EA 4541-7 Multifunktions-Bargraph-DVM mit 41-Segmenten
EA 4545-A 4st. Min-Max-DVM mit V.24 Schnittstelle
EA 4599-A 2st. Min-Max-DVM mit 2 Schwellwerten
EA HD-4407BS 3st. DVM, Dimensionsangaben 14mm, DIN-Normgehuse

EA VK-1000 3st. Mini-DVM-L, 10 mm, 5/10V
EA VK-1760 3st. DVM-L, 13 mm, 5/10V
EA VK-1763 3st. DVM-L, 13 mm, 5/10V mit LED-Beleuchtung
Ereigniszhler, Summenzhler
EA 2021-N 6st. Miniaturzhler mit Reset, 6 mm
EA 2022-N 6st. Mini V/R-Zhler 6 mm
EA 2024 8st. Mini V/R-Zhler 8mm mit und ohne Gehuse
EA 2041 6st. Zhler, 5 mm, Leitgummianschlsse
EA 2042 6st. Zhler, 9 mm, Leitgummianschlsse
EA 2043 6st. V/R-Zhler, 9 mm, progr. Zhlmodi, async.,Leitgummi
EA 2044 6st. V/R-Zhler, 9 mm, progr. Zhlmodi, Leitgummi
EA 2070 6st. Impulszhler mit EEPROM-Speicher
EA 2101 4st. Zhler dekad. 13 mm 2/15MHz
EA 2104 4st. Zhler dekad. 13 mm, stat. BCD-Ausg. 3MHz
EA 2105 4st. V/R-Zhler, Register, voreinst.., BCD-Mux Ausg. 2MHz
EA 2106 4st. wie 2105 jedoch Zhlart 5959 2MHz
EA 2109 8st. Zhler, 13 mm, versch. Zhlarten, 15MHz
EA 2110 8st. Zhler, 13 mm, versch. Zhlarten, stat. BCD-Ausg.
EA 2112 6st. V/R Zhler, 13mm, voreinstellb. BCD-Mux
EA 2116 6st. Zhler, 13 mm, stat. BCD-Ausg. 3MHz
6st. V/R-Zhler, 13 mm, stat. BCD-Ausg. 3MHz, DIN

EA 2201-N
Gehuse 96x48mm
EA 6105 8st. Universalzhler, 13 mm, BCD-Ausg. 10MHz
EA 6110-E 4st. Zhler, versch. Ausfhrungen, 2/15MHz, 13-50 mm
EA 6113-13E 4st. Ereigniszhler in verschiedenen Ausfhrungen 13 mm
EA HD-2405A2 4st. Ereigniszhler 10 mm, DIN-Normgehuse
EA HD-2406A2 8st. Ereigniszhler 8 mm, DIN-Normgehuse
EA HD-2406A3 8st. Ereigniszhler 8 mm, DIN-Normgehuse, neue Version
EA TM-2023G 8st. Mini-Zhler mit Gehuse
EA TM-2379B 6st. Zhler/Timer mit Relaisausgang, Vergleichsregister
EA TM-7010
4st/ 6st.. Miniaturzhler mit Batterie
EA TM-7016
EA TM-7020 4st. Miniaturzhler mit Batterie und Reedkontakt
EA TM-7760 6-st. Durchlumesser/Summenzhler in Einem
Frequenz, -Touren, -Pulsbreiten, -Universalzhler

EA 6024-
5st. Frequenz-/Tourenzhler, 8 mm im DIN-Gehuse
GDIN
EA 6105 8st. Universalzhler, 10/2 MHz, 13 mm
EA 6109 8st. Frequenz-/Tourenzhler progr. Zeitbasis, 15MHz, 13 mm
4st. Frequenz-/Tourenzhler progr. Zeitbasis, 2 MHz, 13-
EA 6110-FA
50mm
EA 6110-PA 4st. Pulsbreitenzhler progr. Zeitbasis, 13-50 mm
6st. Frequenz-/Tourenzhler progr. Zeitbasis, 4MHz BCD-
EA 6112
Mux,Vgl-Reg.
6st. Frequenz-/Tourenz. progr. Zeitbasis, stat. BCD Ausg.
EA 6116
3MHz, 13 mm
8-/16-st. Frequenz-/Periodendauerzhler, RS-232, bis 40MHz,
EA 6533
Autorange
EA TM-7760 6-st. Durchlussmesser/Summenzhler in Einem
Displaymodule, 7-Segment, Alphanumerisch

LCD-Glas LCD Standardglser ohne Ansteuer-Elektronik
EA 3100 4st. 7-Segment, 13/18/25/50mm , BCD-Mux/P Eingang
EA 3101 4st. 7-Segment, 13 mm, BCD statisch
EA 3102 4st. 7-Segment, 13 mm, BCD-Mux Eingang
EA 3103 4st. 7-Segment, 13 mm, BCD-P Eingang
EA 3105 8st. 7-Segment, 13 mm, BCD-P Eingang
EA 3110 8st. 7-Segment, 13 mm, BCD statischer Eingang
EA 3116 6st. 7-Segment, 13 mm, BCD statischer Eingang
EA 3117 4st. 7-Segment, 25/50 mm, RS-232 Eingang, adressierbar
EA 3118 6st. 7-Segment, 25 mm, RS-232 Eingang, adressierbar

6st. 7-Seg, 13 mm, BCD Eingang stat., DIN Gehuse
EA 3201
96x48mm
EA 3512-A 4st. Binranzeige mit Vergleichsregister
EA WK-4002L 4st. 7-Segment + Symbole, 12,7 mm, serielle Ansteuerung
EA VK-4101 8st. 14-Segment, 14 mm, serielle Ansteuerung
Uhren, Timer, Stopuhren, Schaltuhren, Thermometer

EA 1009 8st. Uhr, Tagesz., statische BCD-Ausgnge
EA 1024 8st. Timer, Betriebsstundenzhler
EA 1024-GDIN 8st. Timer, Betriebsstundenzhler im DIN- Gehuse 48x24
EA 1034 24h Wochenschaltuhr: 3 Schaltzeiten Mo-Fr., Sa.+So.
EA 1070 6-st. Betriebsstundenzhler m. EEPROM
EA 1100-13..50 24-Std.-Uhr, Datum, Sek. 13, 18, 25 oder 50 mm Ziffernhhe
EA 1101 4st. Uhr, Timer, Vergl. Register, BCD-Mux Ausg.
EA 1104 8st. 10.000 Sekunden-Stopuhr, Auflsung 100s

EA 1110 8st. Uhr versch. Ausf. statische BCD-Ausgnge

EA 1112 6st. V/R-Timer, voreinstellb. BCD-MUX
EA 1116 6st. Uhr versch. Ausf. statische BCD-Ausgnge
EA 1201-N 6st. 24-Std.-Uhr mit stat. BCD-Ausgngen
EA 1508-8 6st. Timermodul mit 8 Schaltausgngen
EA 1531-A 24-Std.-Uhr mit Ereignisspeicher, Data Logger, RS-232
EA 1532-8 8-Kanal Betriebsstundenzhler
EA 2201-NT 6st. VR-Timer progr. stat. BCD-Ausg., DIN Gehuse 96x48
4st. VR-Timer progr. Vorteiler stat. BCD-Ausg., DIN
EA 2201-NTV
Gehuse 96x48mm
4st. Timer versch. Ausf. programmierb. 13, 18, 25, 50 mm
EA 6110-13T..50T
Ziffernhhe
4st. Timer mit programmierbarer Zeitbasis 13 mm
EA 6113-13T
Ziffernhhe
EA HD-5404C Digitaluhr/Thermometer -20...+70C 24 mm, DIN-Gehuse
EA TM-2379B 6st. Timer/Vorwahlzhler mit Relaisausgang
EA 5081-1900 Thermometer fr 1-Loch Montage
Software, Disketten und Beispiele

Als Download erhalten Sie eine ZIP-Datei. Zum Entpacken bentigen Sie das Programm
PKUNZIP, frei erhltlich bei www.pkware.com.
fr alle EA KITxxx / EA eDIP240-7 / EA eDIP320 Serie
EA LCD-Tool Editor, Compiler, Beispiele, Demos und Simulator (2.434 kB)
Fr Windows 98, 2000, NT, Me, XP
Treiber fr EA STARTeDIP240 und EA STARTeDIP320, EA 9780-1USB
USB-Treiber
Fr Windows 98, 2000, Me, XP, Vista
Simulation EA DOG Serie (Text und Grafik)
DOG-Simulator
V 1.2 fr Windows 2000, NT, XP, Vista
EA DISK9700 fr EA 9700-GRF/-GIO/-T69: Testprogramm (86 kB)
EA DISK9705 fr Serie EA TXT und EA 9705: Beispieltexte, Beschreibung (36 kB)
EA DISK9708 fr Serie EA DYNxxx und EA SERxxx
EA DISK9710 fr EA 9710-V24/-485, Terminal fr DOS, BMP-Konvertierung (165 kB)
fr EA 9718: Terminalprogramm fr DOS, *.TRM-Datei fr Windows
EA DISK9718
(34 kB)
EA DISK9719 fr EA KIT128: Compiler, Terminalprogramm, BMP-Konvertierung (274 kB)
EA DISK9720 fr EA KIT122: Compiler, Terminalprogramm, BMP-Konvertierung (146 kB)
fr EA IC6963, IC202 und IC1520: Demos, Umwandlungssoftware fr
EA DISKIC1
Windows BMP-Grafiken (485 kB)
EasyLog 4.02 Y2K- fhige Software fr EA SYLOG-1 und -2 (902 kB)
Datenbltter / Software
Technische nderung vorbehalten. Wir bernehmen keine Haftung fr Druckfehler und Applikationsbeispiele in
unserer Dokumentation und auf dieser Werbsite.
[ Grafik | Dotmatrix | Kontroller, Interface, Zubehr | Digitalvoltmeter | Ereigniszhler | Frequenzzhler |

Displaymodule | Uhren | Software | Home | eMail ]
Stand: 29. November 2007

PRINCIPLES OF O P E R AT I O N
Graphic modules offer the greatest flexibility in format-

ting data on the display. They allow for text, graphics or any
combination of the two. Since character size is defined by
software, they allow any language or character font to be
shown. The only limit is the resolution of the display.
Graphic modules are organized in rows (horizontal) and
columns (vertical) of pixels. Each pixel is addressed individu-
ally, allowing any combination to be ON. This bitmapping
provides the user with the ability to construct text of any size
or shape, or true graphics, if that is desired.
The LCD drivers are classified into two types: the com-
mon driver and the segment driver. The common driver dri-
ves common electrodes and the segment driver drives seg-
ment electrodes. As shown in the figure above, these drivers
select a proper voltage level sequentially from the six voltage
levels (Va to Vf) to generate liquid crystal drive waveforms.
The six voltage levels are generated by resistance division.
The above figure shows the structure of an LCD. Liquid LCD CONTROLLER
crystals are placed between two types of glass substrates,
one having segment electrodes (SEG1, SEG2, and so on),
the other having common electrodes (COM1, COM2, and so
on). Each cross point of the segment and common elec-
trodes is a display pixel.
The LCD is driven as follows. The common electrodes
are sequentially selected. The display pixels on the selected
common electrode are turned on/off according to the
select/non-select signals of the corresponding segment elec-
trodes. This is called multiplex drive.
The MPU cannot directly interface the LCD driver. So the

LCD controller is placed between the MPU and the LCD dri-
vers to handle the interface between them.
The LCD controller receives display information from the
MPU, converts it into the display timing signals and display
data required for the LCD drivers, and transfers them to the
LCD drivers.
The LCD driver generates liquid crystal drive waveforms

according to the display information sent from the MPU, and
uses the waveforms to drive the LCD.
GRAPHIC LCD MODULE WITH BUILT-IN

RAM (G1213, G1216)
There are four display timing signals: display data shift

clock, latch signal, frame start signal, and AC-convert signal.
There are two formats for the display data transfer: serial
transfer and parallel transfer. In serial transfer, data is trans-
ferred bit by bit as shown in the figure above. In parallel
transfer, four or eight bits are transferred at the same time. All
Seiko Instruments graphic modules use parallel transfer.
Graphic modules with built-in data RAM have two types of
ICs: one integrating the controller and common driver, and one
DISPLAY DATA RAM integrating the display data RAM and the segment driver.
These modules use direct bitmapping; one bit in RAM corre-
sponds to each pixel on the display. They communicate directly
to the microprocessor through an 8-bit parallel interface. All the
required controller timing functions are built-in to the module.
There is no CG ROM, or any way to store information.
GRAPHIC LCD MODULES WITH EXTERNAL

CONTROLLER (G191C, G2436,
The display data RAM stores the display information
sent from the MPU. The LCD controller reads data from the G321E, G648D, G649D)
display data RAM, and transfers the data to the LCD drivers.
Some LCD controllers let the MPU directly interface the dis-
play data RAM as shown by dotted lines in the figure above.
One of the methods to correspond display contents to dis- Most graphic modules feature the segment and common
play data is to assign a display data bit to a display pixel dot. In drivers on the LCD module, and use a 4-bit parallel interface
that case, if the MPU writes and stores data 11110000 at to an external controller. The controller can be an external PC
address 0 of the display data RAM, the LCD screen displays a board (such as the LCDC-1330) or the controller IC can be
pattern of K K K K l l l l according to the 0s and 1s in the located on the mother board with the microprocessor. In the
data. This correspondence method is called the graphic dis- larger graphic modules, all the board space is taken up with
play mode. The graphic display mode allows any pattern to the driver ICs. Also for small graphic modules with high reso-
be displayed, because each display pixel dot can be turned lution, there may be no room to locate the controller on the
on and off independently. module.
GRAPHIC MODULES WITH BUILT-IN POWER ON/OFF AND SIGNAL INPUT TIMING
CONTROLLER (G121C, G242C,
Power ON/OFF and signal input should be performed
G321D, G324E) according to the timing shown below in order not to damage
the LCD driving circuit and the LCD panel.
Seiko Instruments offers five graphic modules with the

SED1330 controller built-in.* These modules interface directly
to the microprocessor with an 8-bit parallel interface. The
1330 was carefully chosen to offer our customers the most
advanced features, including overlayed graphics and text,
horizontal and vertical scrolling, built-in character generator
with external RAM, etc.
* Model G121C features SED1335.
INTERFACE FUNCTION
SIGNAL
A0 Command mode set

CL1 Display data latch signal. Signal is used to latch data in each common line
CL2 Display data shift signal. Clock signal to shift data in 4-bit increments to the display
CS1, CS2 Chip select (read/write enable)
/CS Chip select
D0-D3 Display data signal; D0-D3 for single screen; UD0-UD3 & LD0-LD3 for dual screen display
DB0-DB7 Tri-state bidirectional data bus
D/l Display data/display control data instruction
E Enable
FLM Frame start-up signal. Beginning signal that is sent at the start of each screen frame
INHX Display on/off signal: H=on, L=off
M Liquid crystal AC signal. This signal provides AC polarity in each display frame to prevent
damage to the LCD from DC voltage
/RD Read
/RES, RST Reset
RS Register select signal
R/W Read/write select signal
SEL1, SEL2 MPU interface configuration; for Intel, SEL 1=0, SEL 2=0; for Motorola, SEL 1=1, SEL 2=0
VDD Power supply voltage for logic: +5 V
VLC Power supply for LCD: -5 V to -24 V(see model)
V0 LCD contrast adjustment voltage
VSS Ground
/WR Write
TIMING CHARACTERISTICS TIMING CHARACTERISTICS FOR MODULES

WITH BUILT-IN 1330 CONTROLLER
The following timing diagrams apply to all the graphic
modules without a built-in controller.
Timing characteristics of signal input into segment driver.

Intel 80 series timing diagram
Motorola 68 series timing diagram
Timing characteristics of signal input into segment driver. Signal Symbol Item Min. Max. Unit
t CYC System cycle time 1000 - ns
80 series WR RD
timing tCC Control pulse width 220 - ns
TIMING CHARACTERISTICS TEMP. = 0 - 50C, VDD = 5.0V I 5%, VSS = OV
Item Symbol Min. Max. Unit 68 series

tCYC System cycle time 1000 - ns
A0, CS, R/W,E
CL1 period tccL1 1000 ns timing tEW Enable pulse width 220 - ns
CL1 H pulse width tWCL1H 125 ns
FLM setup time tFLMS 100 ns tAH Address hold time 10 - ns
A0, CS
FLM hold time tFLMH 100 ns tAW Address setup time 30 - ns
Input signal rise time tR 30 ns
Input signal fall time tF 30 ns
80 and 68 tDS Data setup time 120 - ns
CL2 period t CCL2 330 ns
series
CL2 H pulse width tWCL2H 110 ns timing tDH Data hold time 10 - ns
D0-D7
CL2 L pulse width tWCL2L 110 ns tACC RD access time 120 ns
Data setup time tDS 100 ns
t0H Output disable time 10 50 ns
Data hold time tDH 100 ns
CL2 fall to CL1 fall time tSL 125 ns
CL1 fall to CL2 fall time tLH 80 ns Note: See page 53 for microprocessor chip selection control (SEL).
A P P L I C AT I O N N O T E S
OPERATING VOLTAGE (VO ) VS. TEMPERATURE
V O (VOLTS)
SIZE DUTY BIAS -20C -10C 0C +25C +50C +70C

G1213 128 x 32 1/64 1/9 -8.5 -8.3 -8.0 -7.5 -6.5 -5.5
G1216 128 x 64 1/64 1/9 -8.5 -8.3 -8.0 -7.5 -6.5 -5.5
G121C 128 x 128 1/128 1/10 -17.0 -16.5 -16.4 -15.1 -13.7 -12.2
G191C 192 x 128 1/128 1/12 -13.4 -12.4 -11.3
G2436 240 x 64 1/64 1/9 -8.0 -7.0 -5.5
G242C 240 x 128 1/128 1/12 -15.0 -12.0 -11.2
G321D 320 x 200 1/200 1/15 -18.0 -17.0 -15.2
G321E 320 x 240 1/240 1/13 -17.8 -16.2 -15.3
G324E 320 x 240 1/240 1/13 -19.0 -18.0 -17.1
G648D 640 x 200 1/200 1/15 -18.0 -17.5 -15.5
G649D 640 x 200 1/200 1/15 -18.0 -17.1 -15.3
When the VR is supplied external to the G2436, or when

CONTRAST ADJUSTMENT CIRCUITS
the DC/DC converter is not used, the circuit must be
changed as follows.
Display screen contrast and viewing angle are affected
When the VR is supplied external to the G2436: remove
by changes in the liquid crystal operating voltage (Vopr) and
the VR, and supply 100Kh of variable resistance between VO
the ambient temperature. Here are some suggested circuits
and VLC .
for maintaining optimum contrast.
G1213, G1216
When the DC/DC converter is not used: remove the

DC/DC converter and the VR, and apply Vopr to the VLC termi-
nal. Set VO to NC.
G2436
The DC/DC converter internally generates the power
supply voltage (VLC). Also, the G2436 has a built-in variable
resistor (VR ) which controls VLC. When VLC is changed, the li-
quid crystal operating voltage (Vopr) changes. This changes
the display screen contrast.
G242C G649D
22K
22K
22K
14
13
LCDC-1330 CONTROLLER BOARD
E Apply (VLCD) (V0) to pin 16 of CN1 (e.g., -1 5V for

G321D, G324E, G321EV G191C)
E Use a 10Kh potentiometer on CN3 to adjust VO
TEMPERATURE COMPENSATION Then the output of the OP AMP is increased by 55mV

when the temperature drops by 1C.
Adjust the gain of the OP AMP to match the temperature
performance of the display you are using.
LED BRIGHTNESS
VO
The surface brightness of the LED backlight varies
with the forward current.
-24 VDC
The temperature sensitivity of the base to emitter voltage

of a 2N4401 is used to provide automatic temperature com-
pensation to the drive voltage of the STN LCD.
Define Vbe as the base to emitter voltage of the 2N4401
transistor and V2 as pin 3 of the OP AMP.
Assuming a temperature coefficient of the STN LCD of
-55mV/C, and temperature coefficient of the transistor of 2.3
mV/C. The forward current must be reduced at high tempera-
The gain is defined as: tures to maintain the LED within safe operating limits.
Temp. coef. of STN LCD -55mV
Gain = = = 23.9 MODEL IF@ 25C I F@ 70C
Temp. coef. of transistor -2.3mV
G1213 50 mA 25 mA
From the OP AMP circuit, output of the OP AMP is:
G1216 100 mA 50 mA
feedback resistor
Vout = - (Inverting l/P - non-inv. l/P) G121C 120 mA 48 mA
input resistor
R3
=- (Vbe -V2)
R2 In addition, the forward voltage will change with temper-
If we choose R2 = 22K ohm, R3 = Gain x R2 ature. Here are examples for the G1213, G1216, G1226:
= 23.9 x 22K ohms
= 536K ohms G1213 FORWARD VOLTAGE AT TEMPERATURES
536K
Therefore, Vout = - (0.6 - V2) Temperature (Ta) Conditions VFmin. VFtyp. VF max.
22K
-20C IF = 40 mA 3.7V 3.9V 4.2V
The trimmer of the OP AMP is adjusted at room temperature
+25C IF = 40 mA 3.6V 3.8V 4.1V
(25C) resulting in pin 3 of the OP AMP to be at V2 = 0.272 V.
+70C IF = 25 mA 3.4V 3.6V 3.9V
536K
Then, Vout = - (0.6 - 0.272)
22K
= - 7.9912V
If the temperature is decreased 1C, the temp. coef. of G1216 FORWARD VOLTAGE AT TEMPERATURES
the 2N4401 transistor is increased by 2.3mV. Temperature (Ta) Conditions VF min. VF typ. VF max.
So, Vbe = 0.6V + 2.3mV = 0.6023V -20C IF = 90 mA 3.9V 4.3V 4.6V
The output of the OP AMP at 24C +25C IF = 90 mA 3.8V 4.1V 4.4V
536K +70C IF = 50 mA 3.5V 3.7V 3.9V
Vout = - (0.6023 - 0.272) = - 8.47V
22K
To keep the brightness at 25C, use a thermosensitive To utilize this, constantly read this register, and when bit
element, like a thermistor, and a transistor as shown. Set the 6 goes LOW, begin writing to VRAM. The register must still be
thermosensitive element to about IF at 25C and configure it intermittently read at this point, and when bit 6 goes HIGH,
so that IF and VF will be reduced as the temperature rises. writing must stop.
The amount of time available is directly proportional to
TC/R - CR, where these are the System Set instruction code
parameters. C/R is defined by the number of lines in your dis-
play. TC/R must be > C/R + 4. To gain extra time in which to
write to VRAM, make TC/R larger.
As TC/R increases, however, the overall frame time will
decrease. It is normally around 70 Hz. If TC/R is made twice
C/R, the frame time should roughly halve. The formula relat-
ing TC/R and frame rate is Fosc >= TC/R x 9 x ~~F x fFR.
As an example, the G321D has a 6MHz clock cycle, and
each memory byte takes approximately 9 oscillator cycles.
You can calculate approximately how much time you have
per line to write to VRAM, and how much the frame rate will
be slowed down by increasing TC/R.
REDUCING SCREEN FLICKER If you make TC/R = 50 decimal, with C/R = 40 decimal,
then you should have approximately 15esec.s per line in
The 1330 controller chip is constantly reading the VRAM which to write your graphics data. If you send your data at a
on board to refresh the screen, and when the user is also cycle time of 0.5 MHz (one byte every 2 microseconds), you
writing to the VRAM, interference may occur which will show could send about 7 bytes per line. Thus it would take about 6
up as scattered noise on the screen. timing rows to input one new line, or about 6 frame times to
The only tool given to avoid this is the status register input one entire new frame. At TC/R = 50, frame time is about
read. Bit 6 of this register goes LOW during the time interval 15 msec.s (above formula). Thus it should take about 90
within which it is safe to write to the VRAM without corrupting msec.s to input a new frame of data.
the screen image.
19-4323; Rev 7b; 11/97
+5V-Powered, Multichannel RS-232

Drivers/Receivers
General Description ____________________________Features
MAX220MAX249
The MAX220MAX249 family of line drivers/receivers is Superior to Bipolar
intended for all EIA/TIA-232E and V.28/V.24 communica- Operate from Single +5V Power Supply
tions interfaces, particularly applications where 12V is
(+5V and +12VMAX231/MAX239)
not available.
Low-Power Receive Mode in Shutdown
These parts are especially useful in battery-powered sys-
(MAX223/MAX242)
tems, since their low-power shutdown mode reduces
power dissipation to less than 5W. The MAX225, Meet All EIA/TIA-232E and V.28 Specifications
MAX233, MAX235, and MAX245/MAX246/MAX247 use Multiple Drivers and Receivers
no external components and are recommended for appli- 3-State Driver and Receiver Outputs
cations where printed circuit board space is critical. Open-Line Detection (MAX243)
________________________Applications Ordering Information

Portable Computers PART TEMP. RANGE PIN-PACKAGE
MAX220CPE 0C to +70C 16 Plastic DIP
Low-Power Modems
MAX220CSE 0C to +70C 16 Narrow SO
Interface Translation MAX220CWE 0C to +70C 16 Wide SO
Battery-Powered RS-232 Systems MAX220C/D 0C to +70C Dice*
Multi-Drop RS-232 Networks MAX220EPE -40C to +85C 16 Plastic DIP
MAX220ESE -40C to +85C 16 Narrow SO
MAX220EWE -40C to +85C 16 Wide SO
MAX220EJE -40C to +85C 16 CERDIP
MAX220MJE -55C to +125C 16 CERDIP
Ordering Information continued at end of data sheet.
*Contact factory for dice specifications.
Selection Table
Power No. of Nominal SHDN Rx
Part Supply RS-232 No. of Cap. Value & Three- Active in Data Rate
Number (V) Drivers/Rx Ext. Caps (F) State SHDN (kbps) Features
MAX220 +5 2/2 4 4.7/10 No 120 Ultra-low-power, industry-standard pinout
MAX222 +5 2/2 4 0.1 Yes 200 Low-power shutdown
MAX223 (MAX213) +5 4/5 4 1.0 (0.1) Yes 120 MAX241 and receivers active in shutdown
MAX225 +5 5/5 0 Yes 120 Available in SO
MAX230 (MAX200) +5 5/0 4 1.0 (0.1) Yes 120 5 drivers with shutdown
MAX231 (MAX201) +5 and 2/2 2 1.0 (0.1) No 120 Standard +5/+12V or battery supplies;
+7.5 to +13.2 same functions as MAX232
MAX232 (MAX202) +5 2/2 4 1.0 (0.1) No 120 (64) Industry standard
MAX232A +5 2/2 4 0.1 No 200 Higher slew rate, small caps
MAX233 (MAX203) +5 2/2 0 No 120 No external caps
MAX233A +5 2/2 0 No 200 No external caps, high slew rate
MAX234 (MAX204) +5 4/0 4 1.0 (0.1) No 120 Replaces 1488
MAX235 (MAX205) +5 5/5 0 Yes 120 No external caps
MAX236 (MAX206) +5 4/3 4 1.0 (0.1) Yes 120 Shutdown, three state
MAX237 (MAX207) +5 5/3 4 1.0 (0.1) No 120 Complements IBM PC serial port
MAX238 (MAX208) +5 4/4 4 1.0 (0.1) No 120 Replaces 1488 and 1489
MAX239 (MAX209) +5 and 3/5 2 1.0 (0.1) No 120 Standard +5/+12V or battery supplies;
+7.5 to +13.2 single-package solution for IBM PC serial port
MAX240 +5 5/5 4 1.0 Yes 120 DIP or flatpack package
MAX241 (MAX211) +5 4/5 4 1.0 (0.1) Yes 120 Complete IBM PC serial port
MAX242 +5 2/2 4 0.1 Yes 200 Separate shutdown and enable
MAX243 +5 2/2 4 0.1 No 200 Open-line detection simplifies cabling
MAX244 +5 8/10 4 1.0 No 120 High slew rate
MAX245 +5 8/10 0 Yes 120 High slew rate, int. caps, two shutdown modes
MAX246 +5 8/10 0 Yes 120 High slew rate, int. caps, three shutdown modes
MAX247 +5 8/9 0 Yes 120 High slew rate, int. caps, nine operating modes
MAX248 +5 8/8 4 1.0 Yes 120 High slew rate, selective half-chip enables
MAX249 +5 6/10 4 1.0 Yes 120 Available in quad flatpack package
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 408-737-7600 ext. 3468.
Drivers/Receivers
ABSOLUTE MAXIMUM RATINGSMAX220/222/232A/233A/242/243
MAX220MAX249
Supply Voltage (VCC) ...............................................-0.3V to +6V 16-Pin Narrow SO (derate 8.70mW/C above +70C) ...696mW
Input Voltages 16-Pin Wide SO (derate 9.52mW/C above +70C)......762mW
TIN..............................................................-0.3V to (VCC - 0.3V) 18-Pin Wide SO (derate 9.52mW/C above +70C)......762mW
RIN .....................................................................................30V 20-Pin Wide SO (derate 10.00mW/C above +70C)....800mW
TOUT (Note 1).....................................................................15V 20-Pin SSOP (derate 8.00mW/C above +70C) ..........640mW
Output Voltages 16-Pin CERDIP (derate 10.00mW/C above +70C).....800mW
TOUT ...................................................................................15V 18-Pin CERDIP (derate 10.53mW/C above +70C).....842mW
ROUT .........................................................-0.3V to (VCC + 0.3V) Operating Temperature Ranges
Driver/Receiver Output Short Circuited to GND.........Continuous MAX2_ _AC_ _, MAX2_ _C_ _ .............................0C to +70C
Continuous Power Dissipation (TA = +70C) MAX2_ _AE_ _, MAX2_ _E_ _ ..........................-40C to +85C
16-Pin Plastic DIP (derate 10.53mW/C above +70C)....842mW MAX2_ _AM_ _, MAX2_ _M_ _ .......................-55C to +125C
18-Pin Plastic DIP (derate 11.11mW/C above +70C)....889mW Storage Temperature Range .............................-65C to +160C
20-Pin Plastic DIP (derate 8.00mW/C above +70C) ....440mW Lead Temperature (soldering, 10sec) .............................+300C
Note 1: Input voltage measured with TOUT in high-impedance state, SHDN or VCC = 0V.
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICSMAX220/222/232A/233A/242/243
(VCC = +5V 10%, C1C4 = 0.1F TA = TMIN to TMAX unless otherwise noted.)
PARAMETER CONDITIONS MIN TYP MAX UNITS

RS-232 TRANSMITTERS
Output Voltage Swing All transmitter outputs loaded with 3k to GND 5 8 V
Input Logic Threshold Low 1.4 0.8 V
Input Logic Threshold High 2 1.4 V
Normal operation 5 40
Logic Pull-Up/lnput Current A
SHDN = 0V, MAX222/242, shutdown 0.01 1
VCC = 5.5V, SHDN = 0V, VOUT = 15V, MAX222/242 0.01 10
Output Leakage Current A
VCC = SHDN = 0V, VOUT = 15V 0.01 10
All except MAX220, normal operation 200 116 kbits/
Data Rate
MAX220 22 20 sec
Transmitter Output Resistance VCC = V+ = V- = 0V, VOUT = 2V 300 10M
Output Short-Circuit Current VOUT = 0V 7 22 mA
RS-232 RECEIVERS
RS-232 Input Voltage Operating Range 30 V
All except MAX243 R2IN 0.8 1.3
RS-232 Input Threshold Low VCC = 5V V
MAX243 R2IN (Note 2) -3
All except MAX243 R2IN 1.8 2.4
RS-232 Input Threshold High VCC = 5V V
MAX243 R2IN (Note 2) -0.5 -0.1
All except MAX243, VCC = 5V, no hysteresis in shdn. 0.2 0.5 1
RS-232 Input Hysteresis V
MAX243 1
RS-232 Input Resistance 3 5 7 k
TTL/CMOS Output Voltage Low IOUT = 3.2mA 0.2 0.4 V
TTL/CMOS Output Voltage High IOUT = -1.0mA 3.5 VCC - 0.2 V
Sourcing VOUT = GND -2 -10
TTL/CMOS Output Short-Circuit Current mA
Shrinking VOUT = VCC 10 30
SHDN = VCC or EN = VCC (SHDN = 0V for MAX222),
TTL/CMOS Output Leakage Current 0.05 10 A
0V VOUT VCC
2 _______________________________________________________________________________________
Drivers/Receivers
ELECTRICAL CHARACTERISTICSMAX220/222/232A/233A/242/243 (continued)
MAX220MAX249
(VCC = +5V 10%, C1C4 = 0.1F TA = TMIN to TMAX unless otherwise noted.)
EN Input Threshold Low MAX242 1.4 0.8 V
EN Input Threshold High MAX242 2.0 1.4 V
Operating Supply Voltage 4.5 5.5 V

MAX220 0.5 2
No load
VCC Supply Current (SHDN = VCC), MAX222/232A/233A/242/243 4 10
mA
Figures 5, 6, 11, 19 3k load MAX220 12
both inputs MAX222/232A/233A/242/243 15
TA = +25C 0.1 10
TA = 0C to +70C 2 50
Shutdown Supply Current MAX222/242 A
TA = -40C to +85C 2 50
TA = -55C to +125C 35 100
SHDN Input Leakage Current MAX222/242 1 A
SHDN Threshold Low MAX222/242 1.4 0.8 V
SHDN Threshold High MAX222/242 2.0 1.4 V
CL = 50pF to 2500pF,
RL = 3k to 7k, MAX222/232A/233A/242/243 6 12 30
Transition Slew Rate VCC = 5V, TA = +25C, V/s
measured from +3V MAX220 1.5 3 30
to -3V or -3V to +3V
MAX222/232A/233A/242/243 1.3 3.5
Transmitter Propagation Delay tPHLT
MAX220 4 10
TLL to RS-232 (normal operation), s
Figure 1 MAX222/232A/233A/242/243 1.5 3.5
tPLHT
MAX220 5 10
MAX222/232A/233A/242/243 0.5 1
Receiver Propagation Delay tPHLR
MAX220 0.6 3
RS-232 to TLL (normal operation), s
Figure 2 MAX222/232A/233A/242/243 0.6 1
tPLHR
MAX220 0.8 3
Receiver Propagation Delay tPHLS MAX242 0.5 10
s
RS-232 to TLL (shutdown), Figure 2 tPLHS MAX242 2.5 10
Receiver-Output Enable Time, Figure 3 tER MAX242 125 500 ns
Receiver-Output Disable Time, Figure 3 tDR MAX242 160 500 ns
Transmitter-Output Enable Time MAX222/242, 0.1F caps
tET 250 s
(SHDN goes high), Figure 4 (includes charge-pump start-up)
Transmitter-Output Disable Time
tDT MAX222/242, 0.1F caps 600 ns
(SHDN goes low), Figure 4
Transmitter + to - Propagation MAX222/232A/233A/242/243 300
tPHLT - tPLHT ns
Delay Difference (normal operation) MAX220 2000
Receiver + to - Propagation MAX222/232A/233A/242/243 100
tPHLR - tPLHR ns
Delay Difference (normal operation) MAX220 225
Note 2: MAX243 R2OUT is guaranteed to be low when R2IN is 0V or is floating.
_______________________________________________________________________________________ 3
Drivers/Receivers
__________________________________________Typical Operating Characteristics
MAX220MAX249
MAX220/MAX222/MAX232A/MAX233A/MAX242/MAX243
AVAILABLE OUTPUT CURRENT MAX222/MAX242
OUTPUT VOLTAGE vs. LOAD CURRENT vs. DATA RATE ON-TIME EXITING SHUTDOWN
10 11 +10V
MAX220-01
MAX220-02
MAX220-03
1F V+
8 OUTPUT LOAD CURRENT 1F CAPS
10 FLOWS FROM V+ TO V-
6 EITHER V+ OR V- LOADED V+
0.1F CAPS
ALL CAPS +5V
OUTPUT CURRENT (mA)
VCC = 5V 0.1F
OUTPUT VOLTAGE (V)
4 9 1F +5V
V+, V- VOLTAGE (V)

NO LOAD ON SHDN
2 TRANSMITTER OUTPUTS VCC = +5.25V 0V
8
(EXCEPT MAX220, MAX233A)
0 0V
ALL CAPS
-2 V- LOADED, NO LOAD ON V+ 7 0.1F
VCC = +4.75V 1F CAPS
-4 0.1F 1F
6
-6
5 0.1F CAPS
-8 V- V-
V+ LOADED, NO LOAD ON V-
-10 4 -10V
0 5 10 15 20 25 0 10 20 30 40 50 60 500s/div
LOAD CURRENT (mA) DATA RATE (kbits/sec)
4 _______________________________________________________________________________________
Drivers/Receivers
ABSOLUTE MAXIMUM RATINGSMAX223/MAX230MAX241
MAX220MAX249
VCC ...........................................................................-0.3V to +6V 20-Pin Wide SO (derate 10 00mW/C above +70C).......800mW
V+ ................................................................(VCC - 0.3V) to +14V 24-Pin Wide SO (derate 11.76mW/C above +70C).......941mW
V- ............................................................................+0.3V to -14V 28-Pin Wide SO (derate 12.50mW/C above +70C) .............1W
Input Voltages 44-Pin Plastic FP (derate 11.11mW/C above +70C) .....889mW
TIN ............................................................-0.3V to (VCC + 0.3V) 14-Pin CERDIP (derate 9.09mW/C above +70C) ..........727mW
RIN......................................................................................30V 16-Pin CERDIP (derate 10.00mW/C above +70C) ........800mW
Output Voltages 20-Pin CERDIP (derate 11.11mW/C above +70C) ........889mW
TOUT ...................................................(V+ + 0.3V) to (V- - 0.3V) 24-Pin Narrow CERDIP
ROUT .........................................................-0.3V to (VCC + 0.3V) (derate 12.50mW/C above +70C) ..............1W
Short-Circuit Duration, TOUT ......................................Continuous 24-Pin Sidebraze (derate 20.0mW/C above +70C)..........1.6W
Continuous Power Dissipation (TA = +70C) 28-Pin SSOP (derate 9.52mW/C above +70C).............762mW
14-Pin Plastic DIP (derate 10.00mW/C above +70C)....800mW Operating Temperature Ranges
16-Pin Plastic DIP (derate 10.53mW/C above +70C)....842mW MAX2 _ _ C _ _......................................................0C to +70C
20-Pin Plastic DIP (derate 11.11mW/C above +70C)....889mW MAX2 _ _ E _ _ ...................................................-40C to +85C
24-Pin Narrow Plastic DIP MAX2 _ _ M _ _ ...............................................-55C to +125C
(derate 13.33mW/C above +70C) ..........1.07W Storage Temperature Range .............................-65C to +160C
24-Pin Plastic DIP (derate 9.09mW/C above +70C)......500mW Lead Temperature (soldering, 10sec) .............................+300C
16-Pin Wide SO (derate 9.52mW/C above +70C).........762mW
ELECTRICAL CHARACTERISTICSMAX223/MAX230MAX241
(MAX223/230/232/234/236/237/238/240/241, VCC = +5V 10; MAX233/MAX235, VCC = 5V 5% C1C4 = 1.0F; MAX231/MAX239,
VCC = 5V 10%; V+ = 7.5V to 13.2V; TA = TMIN to TMAX; unless otherwise noted.)

Output Voltage Swing All transmitter outputs loaded with 3k to ground 5.0 7.3 V
MAX232/233 5 10
No load,
VCC Power-Supply Current MAX223/230/234238/240/241 7 15 mA
TA = +25C
MAX231/239 0.4 1
MAX231 1.8 5
V+ Power-Supply Current mA
MAX239 5 15
MAX223 15 50
Shutdown Supply Current TA = +25C A
MAX230/235/236/240/241 1 10
Input Logic Threshold Low TIN; EN, SHDN (MAX233); EN, SHDN (MAX230/235241) 0.8 V
TIN 2.0
Input Logic Threshold High EN, SHDN (MAX223); V
2.4
EN, SHDN (MAX230/235/236/240/241)
Logic Pull-Up Current TIN = 0V 1.5 200 A
Receiver Input Voltage
-30 30 V
Operating Range
_______________________________________________________________________________________ 5
Drivers/Receivers
ELECTRICAL CHARACTERISTICSMAX223/MAX230MAX241 (continued)
MAX220MAX249
(MAX223/230/232/234/236/237/238/240/241, VCC = +5V 10; MAX233/MAX235, VCC = 5V 5% C1C4 = 1.0F; MAX231/MAX239,

VCC = 5V 10%; V+ = 7.5V to 13.2V; TA = TMIN to TMAX; unless otherwise noted.)
Normal operation
SHDN = 5V (MAX223) 0.8 1.2
TA = +25C, SHDN = 0V (MAX235/236/240/241)
RS-232 Input Threshold Low V
VCC = 5V Shutdown (MAX223)
SHDN = 0V, 0.6 1.5
EN = 5V (R4IN, R5IN)
Normal operation
SHDN = 5V (MAX223) 1.7 2.4
TA = +25C, SHDN = 0V (MAX235/236/240/241)
RS-232 Input Threshold High V
VCC = 5V Shutdown (MAX223)
SHDN = 0V, 1.5 2.4
EN = 5V (R4IN R5IN)
RS-232 Input Hysteresis VCC = 5V, no hysteresis in shutdown 0.2 0.5 1.0 V
RS-232 Input Resistance TA = +25C, VCC = 5V 3 5 7 k
TTL/CMOS Output Voltage Low IOUT = 1.6mA (MAX231/232/233, IOUT = 3.2mA) 0.4 V
TTL/CMOS Output Voltage High IOUT = -1mA 3.5 VCC - 0.4 V
0V ROUT VCC; EN = 0V (MAX223);
TTL/CMOS Output Leakage Current 0.05 10 A
EN = VCC (MAX235241 )
Normal MAX223 600

Receiver Output Enable Time ns
operation MAX235/236/239/240/241 400
Normal MAX223 900

Receiver Output Disable Time ns
operation MAX235/236/239/240/241 250
Normal operation 0.5 10
RS-232 IN to
Propagation Delay TTL/CMOS OUT, SHDN = 0V tPHLS 4 40 s
CL = 150pF (MAX223) tPLHS 6 40
MAX223/MAX230/MAX234241, TA = +25C, VCC = 5V,
RL = 3k to 7k CL = 50pF to 2500pF, measured from 3 5.1 30
+3V to -3V or -3V to +3V
Transition Region Slew Rate V/s
MAX231/MAX232/MAX233, TA = +25C, VCC = 5V,
RL = 3k to 7k, CL = 50pF to 2500pF, measured from 4 30
+3V to -3V or -3V to +3V
Transmitter Output Resistance VCC = V+ = V- = 0V, VOUT = 2V 300
Transmitter Output Short-Circuit

10 mA
Current mA
6 _______________________________________________________________________________________
Drivers/Receivers
MAX220MAX249
MAX223/MAX230MAX241
TRANSMITTER OUTPUT VOLTAGE (VOH)
TRANSMITTER OUTPUT vs. LOAD CAPACITANCE AT TRANSMITTER SLEW RATE
VOLTAGE (VOH) vs. VCC DIFFERENT DATA RATES vs. LOAD CAPACITANCE
8.5 7.4 12.0
MAX220-04
MAX220-06
MAX220-05
1 TRANSMITTER LOADED TA = +25C
2 TRANSMITTERS
LOADED 7.2 11.0 VCC = +5V
LOADED, RL = 3k
8.0 10.0 C1C4 = 1F
7.0
SLEW RATE (V/s)

1 TRANSMITTER 9.0 2 TRANSMITTERS
VOH (V)
6.8
VOH (V)
LOADED 160kbits/sec LOADED

7.5 3 TRANS- 8.0
80kbits/sec
MITTERS 6.6 20kbits/sec
LOADED 7.0
TA = +25C 6.4 TA = +25C 3 TRANSMITTERS
7.0 C1C4 = 1F VCC = +5V 6.0
LOADED
TRANSMITTER 3 TRANSMITTERS LOADED
6.2 5.0 4 TRANSMITTERS
4 TRANSMITTERS LOADS = RL = 3k
LOADED
LOADED 3k || 2500pF C1C4 = 1F
6.5 6.0 4.0
4.5 5.0 5.5 0 500 1000 1500 2000 2500 0 500 1000 1500 2000 2500
VCC (V) LOAD CAPACITANCE (pF) LOAD CAPACITANCE (pF)
TRANSMITTER OUTPUT VOLTAGE (VOL)

TRANSMITTER OUTPUT vs. LOAD CAPACITANCE AT TRANSMITTER OUTPUT VOLTAGE (V+, V-)
VOLTAGE (VOL) vs. VCC DIFFERENT DATA RATES vs. LOAD CURRENT
-6.0 -6.0 10
MAX220-09
MAX220-08
MAX220-07
4 TRANS- TA = +25C TA = +25C

MITTERS C1C4 = 1F -6.2 8
-6.5 VCC = +5V
LOADED TRANSMITTER 3 TRANSMITTERS LOADED 6 TA = +25C
LOADS = -6.4 RL = 3k VCC = +5V
3k || 2500pF 4
-7.0 C1C4 = 1F C1C4 = 1F
-6.6 2
V+, V- (V)
V- LOADED,
VOL (V)
VOL (V)
V+ AND V- V+ LOADED,
160kbits/sec NO LOAD
-7.5 -6.8 0 EQUALLY
80kbits/sec ON V+ NO LOAD
1 TRANS- -2 LOADED ON V-
-7.0 20Kkbits/sec
-8.0 MITTER
LOADED -4
-7.2
2 TRANS- 3 TRANS- -6
-8.5
MITTERS MITTERS -7.4
-8
LOADED LOADED ALL TRANSMITTERS UNLOADED
-9.0 -7.6 -10
4.5 5.0 5.5 0 500 1000 1500 2000 2500 0 5 10 15 20 25 30 35 40 45 50
VCC (V) LOAD CAPACITANCE (pF) CURRENT (mA)
V+, V- WHEN EXITING SHUTDOWN

(1F CAPACITORS)
MAX220-13
V+
V-
SHDN*
500ms/div
*SHUTDOWN POLARITY IS REVERSED
FOR NON MAX241 PARTS
_______________________________________________________________________________________ 7
Drivers/Receivers
ABSOLUTE MAXIMUM RATINGSMAX225/MAX244MAX249
MAX220MAX249
Supply Voltage (VCC) ...............................................-0.3V to +6V Continuous Power Dissipation (TA = +70C)
Input Voltages 28-Pin Wide SO (derate 12.50mW/C above +70C) .............1W
TIN ENA, ENB, ENR, ENT, ENRA, 40-Pin Plastic DIP (derate 11.11mW/C above +70C) ...611mW
ENRB, ENTA, ENTB..................................-0.3V to (VCC + 0.3V) 44-Pin PLCC (derate 13.33mW/C above +70C) ...........1.07W
RIN .....................................................................................25V Operating Temperature Ranges
TOUT (Note 3).....................................................................15V MAX225C_ _, MAX24_C_ _ ..................................0C to +70C
ROUT ........................................................-0.3V to (VCC + 0.3V) MAX225E_ _, MAX24_E_ _ ...............................-40C to +85C
Short Circuit (one output at a time) Storage Temperature Range .............................-65C to +160C
TOUT to GND ............................................................Continuous Lead Temperature (soldering,10sec) ..............................+300C
ROUT to GND............................................................Continuous
Note 3: Input voltage measured with transmitter output in a high-impedance state, shutdown, or VCC = 0V.
ELECTRICAL CHARACTERISTICSMAX225/MAX244MAX249
(MAX225, VCC = 5.0V 5%; MAX244MAX249, VCC = +5.0V 10%, external capacitors C1C4 = 1F; TA = TMIN to TMAX; unless oth-
erwise noted.)

RS-232 TRANSMITTERS
Input Logic Threshold Low 1.4 0.8 V
Input Logic Threshold High 2 1.4 V
Normal operation 10 50
Logic Pull-Up/lnput Current Tables 1a1d A
Shutdown 0.01 1
Data Rate Tables 1a1d, normal operation 120 64 kbits/sec
Output Voltage Swing All transmitter outputs loaded with 3k to GND 5 7.5 V
ENA, ENB, ENT, ENTA, ENTB =
0.01 25
VCC, VOUT = 15V
Output Leakage Current (shutdown) Tables 1a1d A
VCC = 0V,
0.01 25
VOUT = 15V
Transmitter Output Resistance VCC = V+ = V- = 0V, VOUT = 2V (Note 4) 300 10M
Output Short-Circuit Current VOUT = 0V 7 30 mA
RS-232 RECEIVERS
RS-232 Input Voltage Operating Range 25 V
RS-232 Input Threshold Low VCC = 5V 0.8 1.3 V
RS-232 Input Threshold High VCC = 5V 1.8 2.4 V
RS-232 Input Hysteresis VCC = 5V 0.2 0.5 1.0 V
RS-232 Input Resistance 3 5 7 k
TTL/CMOS Output Voltage Low IOUT = 3.2mA 0.2 0.4 V
TTL/CMOS Output Voltage High IOUT = -1.0mA 3.5 VCC - 0.2 V
Sourcing VOUT = GND -2 -10
TTL/CMOS Output Short-Circuit Current mA
Shrinking VOUT = VCC 10 30
Normal operation, outputs disabled,
TTL/CMOS Output Leakage Current 0.05 0.10 A
Tables 1a1d, 0V VOUT VCC, ENR_ = VCC
8 _______________________________________________________________________________________
Drivers/Receivers
ELECTRICAL CHARACTERISTICSMAX225/MAX244MAX249 (continued)
MAX220MAX249
(MAX225, VCC = 5.0V 5%; MAX244MAX249, VCC = +5.0V 10%, external capacitors C1C4 = 1F; TA = TMIN to TMAX; unless oth-
erwise noted.)
POWER SUPPLY AND CONTROL LOGIC
MAX225 4.75 5.25
Operating Supply Voltage V
MAX244MAX249 4.5 5.5
MAX225 10 20
No load
VCC Supply Current MAX244MAX249 11 30
mA
(normal operation) 3k loads on MAX225 40
all outputs MAX244MAX249 57
TA = +25C 8 25
Shutdown Supply Current A
TA = TMIN to TMAX 50
Leakage current 1 A
Control Input Threshold low 1.4 0.8
V
Threshold high 2.4 1.4
AC CHARACTERISTICS
CL = 50pF to 2500pF, RL = 3k to 7k, VCC = 5V,
Transition Slew Rate 5 10 30 V/s
TA = +25C, measured from +3V to -3V or -3V to +3V
Transmitter Propagation Delay tPHLT 1.3 3.5

Figure 1 tPLHT 1.5 3.5
Receiver Propagation Delay tPHLR 0.6 1.5

Figure 2 tPLHR 0.6 1.5
Receiver Propagation Delay tPHLS 0.6 10

TLL to RS-232 (low-power mode), s
Figure 2 tPLHS 3.0 10
Transmitter + to - Propagation
tPHLT - tPLHT 350 ns
Delay Difference (normal operation)
Receiver + to - Propagation
tPHLR - tPLHR 350 ns
Delay Difference (normal operation)
Receiver-Output Enable Time, Figure 3 tER 100 500 ns
Receiver-Output Disable Time, Figure 3 tDR 100 500 ns
MAX246MAX249
5 s
(excludes charge-pump start-up)
Transmitter Enable Time tET
MAX225/MAX245MAX249
10 ms
(includes charge-pump start-up)
Transmitter Disable Time, Figure 4 tDT 100 ns
Note 4: The 300 minimum specification complies with EIA/TIA-232E, but the actual resistance when in shutdown mode or VCC =
0V is 10M as is implied by the leakage specification.
_______________________________________________________________________________________ 9
Drivers/Receivers
MAX220MAX249
MAX225/MAX244MAX249
TRANSMITTER OUTPUT VOLTAGE (V+, V-)

TRANSMITTER SLEW RATE OUTPUT VOLTAGE vs. LOAD CAPACITANCE AT
vs. LOAD CAPACITANCE vs. LOAD CURRENT FOR V+ AND V- DIFFERENT DATA RATES
18 10 9.0
MAX220-10
MAX220-11
MAX220-12
VCC = 5V VCC = 5V WITH ALL TRANSMITTERS DRIVEN
8 LOADED WITH 5k
16 V+ AND V- LOADED 8.5
TRANSMITTER SLEW RATE (V/s)
6 EITHER V+ OR 10kb/sec
14 8.0 20kb/sec
V- LOADED
OUTPUT VOLTAGE (V)
EXTERNAL POWER SUPPLY 4 VCC = 5V

12 1F CAPACITORS 2 EXTERNAL CHARGE PUMP 7.5 40kb/sec
V+, V (V)
1F CAPACITORS
10 0 8 TRANSMITTERS 7.0 60kb/sec
40kb/s DATA RATE DRIVING 5k AND
8 8 TRANSMITTERS -2
2000pF AT 20kbits/sec 6.5
LOADED WITH 3k -4 V- LOADED
6 6.0 100kb/sec
-6 V+ AND V- LOADED
200kb/sec
4 5.5
-8
V+ LOADED ALL CAPACITIORS 1F
2 -10 5.0
0 1 2 3 4 5 0 5 10 15 20 25 30 35 0 1 2 3 4 5
LOAD CAPACITANCE (nF) LOAD CURRENT (mA) LOAD CAPACITANCE (nF)
10 ______________________________________________________________________________________
Drivers/Receivers
MAX220MAX249
+3V
0V* 50% 50%
+3V INPUT
INPUT
0V
VCC
OUTPUT 50% 50%
V+ GND
0V
OUTPUT
V-
tPHLR tPLHR
tPHLS tPLHS
tPLHT tPHLT
*EXCEPT FOR R2 ON THE MAX243

WHERE -3V IS USED.
Figure 1. Transmitter Propagation-Delay Timing Figure 2. Receiver Propagation-Delay Timing
EN
RX OUT 1k
RX IN RX VCC - 2V +3V
SHDN
a) TEST CIRCUIT 0V
150pF
OUTPUT DISABLE TIME (tDT)
+3V
EN INPUT V+
0V +5V
EN
OUTPUT ENABLE TIME (tER) 0V
-5V
+3.5V
V-
RECEIVER
OUTPUTS
+0.8V
a) TIMING DIAGRAM
b) ENABLE TIMING
+3V
EN
0V 1 OR 0 TX
EN INPUT
OUTPUT DISABLE TIME (tDR) 3k 50pF
VOH
VOH - 0.5V
RECEIVER VCC - 2V
OUTPUTS
VOL + 0.5V b) TEST CIRCUIT
VOL
c) DISABLE TIMING
Figure 3. Receiver-Output Enable and Disable Timing Figure 4. Transmitter-Output Disable Timing
______________________________________________________________________________________ 11
Drivers/Receivers
Table 1a. MAX245 Control Pin Configurations
MAX220MAX249
ENT ENR OPERATION STATUS TRANSMITTERS RECEIVERS

0 0 Normal Operation All Active All Active
0 1 Normal Operation All Active All 3-State
1 0 Shutdown All 3-State All Low-Power Receive Mode
1 1 Shutdown All 3-State All 3-State
Table 1b. MAX245 Control Pin Configurations

OPERATION TRANSMITTERS RECEIVERS
ENT ENR
STATUS TA1TA4 TB1TB4 RA1RA5 RB1RB5
0 0 Normal Operation All Active All Active All Active All Active
RA1RA4 3-State, RB1RB4 3-State,
0 1 Normal Operation All Active All Active
RA5 Active RB5 Active
All Low-Power All Low-Power

1 0 Shutdown All 3-State All 3-State
Receive Mode Receive Mode

1 1 Shutdown All 3-State All 3-State RA5 Low-Power RB5 Low-Power
Table 1c. MAX246 Control Pin Configurations

OPERATION TRANSMITTERS RECEIVERS
ENA ENB
STATUS TA1TA4 TB1TB4 RA1RA5 RB1RB5
0 0 Normal Operation All Active All Active All Active All Active
RB1RB4 3-State,
0 1 Normal Operation All Active All 3-State All Active
RB5 Active
RA1RA4 3-State,
1 0 Shutdown All 3-State All Active All Active
RA5 Active

1 1 Shutdown All 3-State All 3-State RA5 Low-Power RA5 Low-Power
12 ______________________________________________________________________________________
Drivers/Receivers
Table 1d. MAX247/MAX248/MAX249 Control Pin Configurations
MAX220MAX249
TRANSMITTERS RECEIVERS
OPERATION MAX247 TA1TA4 TB1TB4 RA1RA4 RB1RB5
ENTA ENTB ENRA ENRB
STATUS MAX248 TA1TA4 TB1TB4 RA1RA4 RB1RB4
MAX249 TA1TA3 TB1TB3 RA1RA5 RB1RB5
0 0 0 0 Normal Operation All Active All Active All Active All Active
All 3-State, except
0 0 0 1 Normal Operation All Active All Active All Active RB5 stays active on
MAX247
0 0 1 0 Normal Operation All Active All Active All 3-State All Active
All 3-State, except
0 0 1 1 Normal Operation All Active All Active All 3-State RB5 stays active on
MAX247
0 1 0 0 Normal Operation All Active All 3-State All Active All Active
All 3-State, except
0 1 0 1 Normal Operation All Active All 3-State All Active RB5 stays active on
MAX247
0 1 1 0 Normal Operation All Active All 3-State All 3-State All Active
All 3-State, except
0 1 1 1 Normal Operation All Active All 3-State All 3-State B5 stays active on
MAX247
1 0 0 0 Normal Operation All 3-State All Active All Active All Active
All 3-State, except
1 0 0 1 Normal Operation All 3-State All Active All Active RB5 stays active on
MAX247
1 0 1 0 Normal Operation All 3-State All Active All 3-State All Active
All 3-State, except
1 0 1 1 Normal Operation All 3-State All Active All 3-State RB5 stays active on
MAX247
Low-Power Low-Power
1 1 0 0 Shutdown All 3-State All 3-State
All 3-State, except

Low-Power
1 1 0 1 Shutdown All 3-State All 3-State RB5 stays active on
Receive Mode
MAX247
Low-Power
1 1 1 0 Shutdown All 3-State All 3-State All 3-State
Receive Mode
All 3-State, except

1 1 1 1 Shutdown All 3-State All 3-State All 3-State RB5 stays active on
MAX247
______________________________________________________________________________________ 13
Drivers/Receivers
_______________Detailed Description when device power is removed. Outputs can be driven
MAX220MAX249
to 15V. The power-supply current typically drops to

The MAX220MAX249 contain four sections: dual
8A in shutdown mode.
charge-pump DC-DC voltage converters, RS-232 dri-
vers, RS-232 receivers, and receiver and transmitter The MAX239 has a receiver three-state control line, and
enable control inputs. the MAX223, MAX225, MAX235, MAX236, MAX240,
and MAX241 have both a receiver three-state control
Dual Charge-Pump Voltage Converter line and a low-power shutdown control. Table 2 shows
The MAX220MAX249 have two internal charge-pumps the effects of the shutdown control and receiver three-
that convert +5V to 10V (unloaded) for RS-232 driver state control on the receiver outputs.
operation. The first converter uses capacitor C1 to dou- The receiver TTL/CMOS outputs are in a high-imped-
ble the +5V input to +10V on C3 at the V+ output. The ance, three-state mode whenever the three-state enable
second converter uses capacitor C2 to invert +10V to line is high (for the MAX225/MAX235/MAX236/MAX239
-10V on C4 at the V- output. MAX241), and are also high-impedance whenever the
A small amount of power may be drawn from the +10V shutdown control line is high.
(V+) and -10V (V-) outputs to power external circuitry When in low-power shutdown mode, the driver outputs
(see the Typical Operating Characteristics section), are turned off and their leakage current is less than 1A
except on the MAX225 and MAX245MAX247, where with the driver output pulled to ground. The driver output
these pins are not available. V+ and V- are not regulated, leakage remains less than 1A, even if the transmitter
so the output voltage drops with increasing load current. output is backdriven between 0V and (VCC + 6V). Below
Do not load V+ and V- to a point that violates the mini- -0.5V, the transmitter is diode clamped to ground with
mum 5V EIA/TIA-232E driver output voltage when 1k series impedance. The transmitter is also zener
sourcing current from V+ and V- to external circuitry. clamped to approximately V CC + 6V, with a series
When using the shutdown feature in the MAX222, impedance of 1k.
MAX225, MAX230, MAX235, MAX236, MAX240, The driver output slew rate is limited to less than 30V/s
MAX241, and MAX245MAX249, avoid using V+ and V- as required by the EIA/TIA-232E and V.28 specifica-
to power external circuitry. When these parts are shut tions. Typical slew rates are 24V/s unloaded and
down, V- falls to 0V, and V+ falls to +5V. For applica- 10V/s loaded with 3 and 2500pF.
tions where a +10V external supply is applied to the V+
pin (instead of using the internal charge pump to gen- RS-232 Receivers
erate +10V), the C1 capacitor must not be installed and EIA/TIA-232E and V.28 specifications define a voltage
the SHDN pin must be tied to VCC. This is because V+ level greater than 3V as a logic 0, so all receivers invert.
is internally connected to VCC in shutdown mode. Input thresholds are set at 0.8V and 2.4V, so receivers
respond to TTL level inputs as well as EIA/TIA-232E and
RS-232 Drivers V.28 levels.
The typical driver output voltage swing is 8V when
loaded with a nominal 5k RS-232 receiver and VCC = The receiver inputs withstand an input overvoltage up
+5V. Output swing is guaranteed to meet the EIA/TIA- to 25V and provide input terminating resistors with
232E and V.28 specification, which calls for 5V mini- nominal 5k values. The receivers implement Type 1
mum driver output levels under worst-case conditions. interpretation of the fault conditions of V.28 and
These include a minimum 3k load, VCC = +4.5V, and EIA/TIA-232E.
maximum operating temperature. Unloaded driver out-
put voltage ranges from (V+ -1.3V) to (V- +0.5V). Table 2. Three-State Control of Receivers
Input thresholds are both TTL and CMOS compatible. PART SHDN SHDN EN EN(R) RECEIVERS
The inputs of unused drivers can be left unconnected
since 400k input pull-up resistors to VCC are built in. Low X High Impedance
The pull-up resistors force the outputs of unused drivers MAX223 __ High Low __ Active
High High High Impedance
low because all drivers invert. The internal input pull-up
resistors typically source 12A, except in shutdown Low High Impedance
MAX225 __ __ __
mode where the pull-ups are disabled. Driver outputs High Active
turn off and enter a high-impedance statewhere leak- MAX235 Low Low High Impedance
age current is typically microamperes (maximum MAX236 Low __ __ High Active
25A)when in shutdown mode, in three-state mode, or MAX240 High X High Impedance
14 ______________________________________________________________________________________
Drivers/Receivers
The receiver input hysteresis is typically 0.5V with a ShutdownMAX222MAX242
MAX220MAX249
guaranteed minimum of 0.2V. This produces clear out- On the MAX222 MAX235 MAX236 MAX240 and
put transitions with slow-moving input signals, even MAX241 all receivers are disabled during shutdown.
with moderate amounts of noise and ringing. The On the MAX223 and MAX242 two receivers continue to
receiver propagation delay is typically 600ns and is operate in a reduced power mode when the chip is in
independent of input swing direction. shutdown. Under these conditions the propagation
delay increases to about 2.5s for a high-to-low input
Low-Power Receive Mode transition. When in shutdown, the receiver acts as a
The low-power receive-mode feature of the MAX223, CMOS inverter with no hysteresis. The MAX223 and
MAX242, and MAX245MAX249 puts the IC into shut- MAX242 also have a receiver output enable input (EN
down mode but still allows it to receive information. This for the MAX242 and EN for the MAX223) that allows
is important for applications where systems are periodi- receiver output control independent of SHDN (SHDN
cally awakened to look for activity. Using low-power for MAX241). With all other devices SHDN (SHDN for
receive mode, the system can still receive a signal that MAX241) also disables the receiver outputs.
will activate it on command and prepare it for communi-
cation at faster data rates. This operation conserves The MAX225 provides five transmitters and five
system power. receivers while the MAX245 provides ten receivers and
eight transmitters. Both devices have separate receiver
Negative ThresholdMAX243 and transmitter-enable controls. The charge pumps
The MAX243 is pin compatible with the MAX232A, differ- turn off and the devices shut down when a logic high is
ing only in that RS-232 cable fault protection is removed applied to the ENT input. In this state, the supply cur-
on one of the two receiver inputs. This means that control rent drops to less than 25A and the receivers continue
lines such as CTS and RTS can either be driven or left to operate in a low-power receive mode. Driver outputs
floating without interrupting communication. Different enter a high-impedance state (three-state mode). On
cables are not needed to interface with different pieces of the MAX225 all five receivers are controlled by the
equipment. ENR input. On the MAX245 eight of the receiver out-
The input threshold of the receiver without cable fault puts are controlled by the ENR input while the remain-
protection is -0.8V rather than +1.4V. Its output goes ing two receivers (RA5 and RB5) are always active.
positive only if the input is connected to a control line RA1RA4 and RB1RB4 are put in a three-state mode
that is actively driven negative. If not driven, it defaults when ENR is a logic high.
to the 0 or OK to send state. Normally the MAX243s Receiver and Transmitter Enable
other receiver (+1.4V threshold) is used for the data line Control Inputs
(TD or RD) while the negative threshold receiver is con- The MAX225 and MAX245MAX249 feature transmitter
nected to the control line (DTR DTS CTS RTS, etc.). and receiver enable controls.
Other members of the RS-232 family implement the The receivers have three modes of operation: full-speed
optional cable fault protection as specified by EIA/TIA- receive (normal active) three-state (disabled) and low-
232E specifications. This means a receiver output goes power receive (enabled receivers continue to function
high whenever its input is driven negative left floating at lower data rates). The receiver enable inputs control
or shorted to ground. The high output tells the serial the full-speed receive and three-state modes. The
communications IC to stop sending data. To avoid this transmitters have two modes of operation: full-speed
the control lines must either be driven or connected transmit (normal active) and three-state (disabled). The
with jumpers to an appropriate positive voltage level. transmitter enable inputs also control the shutdown
mode. The device enters shutdown mode when all
transmitters are disabled. Enabled receivers function in
the low-power receive mode when in shutdown.
______________________________________________________________________________________ 15
Drivers/Receivers
Tables 1a1d define the control states. The MAX244 The MAX249 provides ten receivers and six drivers with
MAX220MAX249
has no control pins and is not included in these tables. four control pins. The ENRA and ENRB receiver enable
The MAX246 has ten receivers and eight drivers with inputs each control five receiver outputs. The ENTA
two control pins, each controlling one side of the and ENTB transmitter enable inputs control three dri-
device. A logic high at the A-side control input (ENA) vers each. There is no always-active receiver. The
causes the four A-side receivers and drivers to go into device enters shutdown mode and transmitters go into
a three-state mode. Similarly, the B-side control input a three-state mode with a logic high on both ENTA and
(ENB) causes the four B-side drivers and receivers to ENTB. In shutdown mode, active receivers operate in a
go into a three-state mode. As in the MAX245, one A- low-power receive mode at data rates up to
side and one B-side receiver (RA5 and RB5) remain 20kbits/sec.
active at all times. The entire device is put into shut- __________Applications Information
down mode when both the A and B sides are disabled
(ENA = ENB = +5V). Figures 5 through 25 show pin configurations and typi-
cal operating circuits. In applications that are sensitive
The MAX247 provides nine receivers and eight drivers to power-supply noise, VCC should be decoupled to
with four control pins. The ENRA and ENRB receiver ground with a capacitor of the same value as C1 and
enable inputs each control four receiver outputs. The C2 connected as close as possible to the device.
ENTA and ENTB transmitter enable inputs each control
four drivers. The ninth receiver (RB5) is always active.
The device enters shutdown mode with a logic high on
both ENTA and ENTB.
The MAX248 provides eight receivers and eight drivers
with four control pins. The ENRA and ENRB receiver
enable inputs each control four receiver outputs. The
ENTA and ENTB transmitter enable inputs control four
drivers each. This part does not have an always-active
receiver. The device enters shutdown mode and trans-
mitters go into a three-state mode with a logic high on
both ENTA and ENTB.
16 ______________________________________________________________________________________
Drivers/Receivers
MAX220MAX249
+5V INPUT C3
TOP VIEW
C5
16
1 VCC
C1+ 1 16 VCC C1+ V+ 2 +10V
C1 +5V TO +10V
V+ 2 3 C1-
15 GND VOLTAGE DOUBLER
4
C1- 3 C2+ +10V TO -10V 6 -10V
14 T1OUT C2 5 C2- VOLTAGE INVERTER
V-
C4
C2+ 4 MAX220 13 R1IN
+5V
MAX232
C2- 5 MAX232A 12 R1OUT 400k
V- 6 11 T1IN T1OUT 14
11 T1IN
+5V
T2OUT 7 10 T2IN TTL/CMOS RS-232
INPUTS 400k OUTPUTS
R2IN 8 9 R2OUT 10 T2IN T2OUT 7
DIP/SO 12 R1OUT R1IN 13
CAPACITANCE (F) TTL/CMOS 5k RS-232

OUTPUTS INPUTS
DEVICE C1 C2 C3 C4 C5
9 R2OUT R2IN 8
MAX220 4.7 4.7 10 10 4.7
MAX232 1.0 1.0 1.0 1.0 1.0
MAX232A 0.1 0.1 0.1 0.1 0.1 5k
GND
15
Figure 5. MAX220/MAX232/MAX232A Pin Configuration and Typical Operating Circuit
+5V INPUT C3
TOP VIEW ALL CAPACITORS = 0.1F
C5
17
2 VCC 3 +10V
C1+ +5V TO +10V
C1 V+
(N.C.) EN 1 4 C1- VOLTAGE DOUBLER
20 SHDN
5
(N.C.) EN 1 C1+ 2 C2+ 7 -10V
18 SHDN 19 VCC
C2 +10V TO -10V V-
6 C2- C4
VOLTAGE INVERTER
C1+ 2 17 VCC V+ 3 18 GND
V+ 3 C1- 4 +5V
16 GND 17 T1OUT
400k
C1- 4 15 T1OUT C2+ 5 MAX222 16 N.C.
MAX242 12 T1IN T1OUT 15
C2+ 5 MAX222 14 R1IN C2- 6 15 R1IN +5V
MAX242 TTL/CMOS RS-232
C2- 6 13 R1OUT V- 7 14 R1OUT INPUTS 400k OUTPUTS
11 T2IN T2OUT 8
V- 7 12 T1IN T2OUT 8 13 N.C.
T2OUT 8 11 T2IN R2IN 9 12 T1IN 13 R1OUT R1IN 14
R2IN 9 10 R2OUT R2OUT 10 11 T2IN
TTL/CMOS 5k RS-232
OUTPUTS INPUTS
SSOP
1 (N.C.) EN 5k
( ) ARE FOR MAX222 ONLY. 18
GND SHDN
PIN NUMBERS IN TYPICAL OPERATING CIRCUIT ARE FOR DIP/SO PACKAGES ONLY.
16
Figure 6. MAX222/MAX242 Pin Configurations and Typical Operating Circuit
______________________________________________________________________________________ 17
Drivers/Receivers
MAX220MAX249
+5V
TOP VIEW
0.1
28 27
+5V VCC VCC
400k
T1IN
3 11
ENR 1 +5V T1OUT
28 VCC
400k
ENR 2 27 VCC
T2IN
T1IN 3 4 12
26 ENT +5V T2OUT
T2IN 4 25 T3IN 400k
R1OUT 5 MAX225 24 T4IN T3IN
25 18
+5V T3OUT
R2OUT 6 23 T5IN
400k
R3OUT 7 22 R4OUT
T4IN
24 17
R3IN 8 21 R5OUT +5V T4OUT
R2IN 9 20 R5IN 400k
T5IN T5OUT
R1IN 10 19 R4IN 23 16
T1OUT 11 18 T3OUT ENT
26 15
T2OUT 12 17 T4OUT T5OUT
GND 13 16 T5OUT R1OUT R1IN

5 10
GND 14 15 T5OUT
5k
SO R2OUT R2IN
6 9
5k
R3OUT R3IN
7 8
MAX225 FUNCTIONAL DESCRIPTION
5k
5 RECEIVERS
5 TRANSMITTERS R4OUT R4IN
22 19
2 CONTROL PINS
1 RECEIVER ENABLE (ENR) 5k
1 TRANSMITTER ENABLE (ENT)
R5OUT R5IN
21 20
5k
1 ENR
2 ENR
PINS (ENR, GND, VCC, T5OUT) ARE INTERNALLY CONNECTED. GND GND
CONNECT EITHER OR BOTH EXTERNALLY. T5OUT IS A SINGLE DRIVER. 13 14
Figure 7. MAX225 Pin Configuration and Typical Operating Circuit
18 ______________________________________________________________________________________
Drivers/Receivers
MAX220MAX249
+5V INPUT
TOP VIEW 1.0F
11
12 1.0F
C1+ VCC 13
1.0F 14 +5V TO +10V V+
C1- VOLTAGE DOUBLER
15
C2+ +10V TO -10V 17
1.0F VOLTAGE INVERTER V-
16 C2-
1.0F
+5V
400k
7 T1IN T1OUT 2
T1
T3OUT 1 28 T4OUT +5V

400k
T1OUT 2 27 R3IN
6 T2IN T2OUT 3
T2
T2OUT 3 26 R3OUT
R2IN 4 25 SHDN (SHDN) TTL/CMOS +5V RS-232

400k
INPUTS OUTPUTS
R2OUT 5 24 EN (EN)
20 T3IN T3OUT 1
MAX223 T3
T2IN 6 MAX241 23 R4IN*
T1IN 7 22 R4OUT* +5V

400k
R1OUT 8 21 T4IN
21 T4IN T4OUT 28
T4
R1IN 9 20 T3IN
GND 10 19 R5OUT*
8 R1OUT R1IN 9
VCC 11 18 R5IN* R1
5k
C1+ 12 17 V-
V+ 13 16 C2- R2IN 4
5 R2OUT
R2
C1- 14 15 C2+
5k
Wide SO/
SSOP LOGIC 26 R3OUT R3IN 27 RS-232
R3
OUTPUTS INPUTS
5k
22 R4OUT R4IN 23
R4
5k
19 R5OUT R5IN 18
R5
*R4 AND R5 IN MAX223 REMAIN ACTIVE IN SHUTDOWN 5k
NOTE: PIN LABELS IN ( ) ARE FOR MAX241 24 EN (EN) SHDN 25
(SHDN)
GND
10
Figure 8. MAX223/MAX241 Pin Configuration and Typical Operating Circuit
______________________________________________________________________________________ 19
Drivers/Receivers
MAX220MAX249
TOP VIEW +5V INPUT

1.0F
7 1.0F
8 C1+ VCC
V+ 9
1.0F 10 C1- +5V TO +10V
VOLTAGE DOUBLER
T3OUT 1 20 T4OUT 11
C2+ +10V TO -10V 13
T1OUT 2 19 T5IN 1.0F 12 V-
C2- VOLTAGE INVERTER
1.0F
T2OUT 3 18 N.C. +5V
400k
T2IN 4 17 SHDN 5 T1IN T1OUT 2
T1 T1
T1IN 5 MAX230 16 T5OUT +5V
400k
GND 6 15 T4IN 4 T2IN T2OUT 3
T2
VCC 7 14 T3IN +5V
400k
C1+ 8 13 V-
TTL/CMOS 14 T3IN T3OUT 1 RS-232
T3
V+ 9 12 C2- INPUTS +5V OUTPUTS
400k
C1- 10 11 C2+ 15 T4IN T4OUT 20
T4
+5V
400k
DIP/SO 19 T5IN T5OUT 16
T5
N.C. x 18 GND
17 SHDN
6
+5V INPUT
TOP VIEW 1.0F +7.5V TO +12V
13 (15)
1 VCC 14 (16)
C1+ V+
1.0F 2 +12V TO -12V 3
C1- VOLTAGE CONVERTER V-
C2
+5V 1.0F
C+ 1 14 V+ C+ 1 16 V+
400k
C- 2 13 VCC C- 2 15 VCC (10) (13)
8 T1IN T1OUT 11
T1
V- 3 12 GND V- 3 14 GND
+5V
TTL/CMOS RS-232
T2OUT 4 MAX231 11 T1OUT T2OUT 4 MAX231 13 T1OUT INPUTS 400k OUTPUTS
R2IN 5 10 R1IN R2IN 5 12 R1IN 7 T2IN T2OUT 4
T2
R2OUT 6 9 R1OUT R2OUT 6 11 R1OUT
(11) (12)
9 R1OUT R1IN 10
T2IN 7 8 T1IN T2IN 7 10 T1IN R1
N.C. 8 9 N.C. TTL/CMOS 5k RS-232

INPUTS INPUTS
DIP
SO 6 R2OUT R2IN 5
R2
5k
GND
PIN NUMBERS IN ( ) ARE FOR SO PACKAGE 12 (14)
Figure 10. MAX231 Pin Configurations and Typical Operating Circuit
20 ______________________________________________________________________________________
Drivers/Receivers
MAX220MAX249
+5V INPUT
1.0F
TOP VIEW
7
+5V VCC
400k
2 T1IN T1OUT 5
T2IN 1 20 R2OUT
+5V
T1IN 2 19 R2IN TTL/CMOS RS-232
400k
INPUTS OUTPUTS
R1OUT 3 18 T2OUT 1 T2IN T2OUT 18
R1IN 4 17 V-
3 R1OUT R1IN 4
T1OUT 5 MAX233 16 C2-
MAX233A
GND 6 15 C2+ TTL/CMOS 5k RS-232
OUTPUTS OUTPUTS
VCC 7 14 V+ (C1-)
(V+) C1+ 8 13 C1- (C1+) 20 R2OUT R2IN 19
GND 9 12 V- (C2+) 8 (13) 5k 11 (12)

DO NOT MAKE C1+ C2+
CONNECTIONS TO 13 (14) 15
(V-) CS- 10 11 C2+ (C2-) C1-
THESE PINS C2+
12 (10) 16
INTERNAL -10 V- C2-
DIP/SO POWER SUPPLY 17 V- 10 (11)
C2-
INTERNAL +10V 14 (8) V+
GND GND
POWER SUPPLY
6 9
( ) ARE FOR SO PACKAGE ONLY.
Figure 11. MAX233/MAX233A Pin Configuration and Typical Operating Circuit
+5V INPUT
TOP VIEW 1.0F
6 1.0F
7
C1+ VCC 8
+5V TO +10V V+
1.0F 9
C1- VOLTAGE DOUBLER
10
C2+ +10V TO -10V 12
T1OUT 1 11 C2-
16 T3OUT 1.0F
+5V
T2OUT 2 15 T4OUT
400k
T2IN 3 14 T4IN
4 T1IN T1OUT 1
T1
T1IN 4 MAX234 13 T3IN +5V
GND 5 12 V- 400k
VCC 6 11 C2- 3 T2IN T2OUT 3
T2
C1+ 7 +5V RS-232
10 C2+ TTL/CMOS
INPUTS 400k OUTPUTS
V+ 8 9 C1-
13 T3IN T3OUT 16
T3
+5V
DIP/SO
400k
14 T4IN T4OUT 15
T4
GND
5
______________________________________________________________________________________ 21
Drivers/Receivers
MAX220MAX249
+5V INPUT
TOP VIEW 1.0F
12
VCC
+5V
400k
8 T1IN T1OUT 3
T1
+5V
400k
7 T2IN T2OUT 4
T2
+5V
400k
T3
INPUTS OUTPUTS
T4OUT 1 24 R3IN +5V
400k
T3OUT 2 23 R3OUT T4OUT 1
16 T4IN
T4
T1OUT 3 22 T5IN
+5V
T2OUT 4 21 SHDN 400k
R2IN 5 MAX235 20 EN 22 T5IN T5OUT 19
T5
R2OUT 6 19 T5OUT
T2IN 7 18 R4IN
9 R1OUT R1IN 10
T1
T1IN 8 17 R4OUT
5k
R1OUT 9 16 T4IN
R1IN 10 15 T3IN R2IN 5

6 R2OUT
R2
GND 11 14 R5OUT
5k
VCC 12 13 R5IN
TTL/CMOS 23 R3OUT R3IN 24 RS-232

DIP R3
OUTPUTS INPUTS
5k
17 R4OUT R4IN 18
R4
5k
14 R5OUT R5IN 13
R5
5k
20 EN 21
SHDN
GND
11
22 ______________________________________________________________________________________
Drivers/Receivers
MAX220MAX249
TOP VIEW +5V INPUT
1.0F
9 1.0F
10 11
C1+ VCC V+
1.0F +5V TO +10V
12
C1- VOLTAGE DOUBLER
13 15
C2+ V-
1.0F +10V TO -10V
14 C2- 1.0F
VOLTAGE INVERTER
+5V
400k
7 T1IN T1OUT 2
T1
T3OUT 1 24 T4OUT +5V

400k
T1OUT 2 23 R2IN
6 T2IN T2OUT 3
T2OUT 3 22 R2OUT T2
R1IN 4 21 SHDN TTL/CMOS +5V RS-232

INPUTS 400k OUTPUTS
R1OUT 5 MAX236 20 EN
18 T3IN T3OUT 1
T2IN 6 19 T4IN T3
T1IN 7 18 T3IN +5V

400k
GND 8 17 R3OUT
19 T4IN T4OUT 24
VCC 9 16 R3IN T4
C1+ 10 15 V-
V+ 11 14 C2- R1IN 4
5 R1OUT
R1
C1- 12 13 C2+
5k
DIP/SO
22 R2OUT R2IN 23 RS-232
TTL/CMOS R2
OUTPUTS INPUTS
5k
17 R3OUT R3IN 16
R3
5k
20 EN 21
SHDN
GND
______________________________________________________________________________________ 23
Drivers/Receivers
MAX220MAX249
TOP VIEW
+5V INPUT
1.0F
9 1.0F
10 VCC 11
C1+ V+
+5V TO +10V
1.0F 12 VOLTAGE DOUBLER
C1-
13 15
C2+ V-
1.0F +10V TO -10V
14 VOLTAGE INVERTER 1.0F
C2-
+5V
400k
T3OUT 1 24 T4OUT 7 T1IN T1OUT 2

T1
T1OUT 2 23 R2IN +5V
400k
T2OUT 3 22 R2OUT
6 T2IN T2OUT 3
R1IN 4 21 T5IN T2
+5V
R1OUT 5 MAX237 20 T5OUT 400k
T2IN 6 19 T4IN TTL/CMOS 18 T3IN T3OUT 1
T3 RS-232
T1IN 7 18 T3IN INPUTS OUTPUTS
+5V
400k
GND 8 17 R3OUT
19 T4IN T4OUT 24
VCC 9 16 R3IN T4
C1+ 10 15 V- +5V
400k
V+ 11 14 C2-
21 T5IN T5OUT 20
T5
C1- 12 13 C2+

R1
5k
22 R2OUT R2IN 23 RS-232

TTL/CMOS R2
OUTPUTS INPUTS
5k
17 R3OUT R3IN 16
R3
5k
GND
8
24 ______________________________________________________________________________________
Drivers/Receivers
MAX220MAX249
TOP VIEW
+5V INPUT
1.0F
9 1.0F
10 VCC 11
C1+ V+
+5V TO +10V
1.0F 12
C1- VOLTAGE DOUBLER
13
C2+ 15
1.0F +10V TO -10V V-
14
C2- VOLTAGE INVERTER 1.0F
+5V
400k
T2OUT 1 24 T3OUT 5 T1IN T1OUT 2

T1
T1OUT 2 23 R3IN +5V
400k
R2IN 3 22 R3OUT
18 T2IN T2OUT 1
T2
R2OUT 4 21 T4IN
+5V
T1IN 5 MAX238 20 T4OUT TTL/CMOS 400k RS-232
INPUTS OUTPUTS
R1OUT 6 19 T3IN 19 T3IN T3OUT 24
T3
R1IN 7 18 T2IN +5V
400k
GND 8 17 R4OUT
21 T4IN T4OUT 20
VCC 9 16 R4IN T4
C1+ 10 15 V-
V+ 11 14 C2- 6 R1OUT R1IN 7

R1
C1- 12 13 C2+
5k
DIP/SO
4 R2OUT R2IN 3
R2
TTL/CMOS 5k RS-232
OUTPUTS INPUTS
22 R3OUT R3IN 23
R3
5k
17 R4OUT R4IN 16
R4
5k
GND
8
______________________________________________________________________________________ 25
Drivers/Receivers
MAX220MAX249
TOP VIEW
7.5V TO 13.2V
+5V INPUT INPUT
1.0F
4 5
6 VCC V+
C1+ 8
V-
+10V TO -10V
1.0F 7 1.0F
C1- VOLTAGE INVERTER
+5V
400k
24 T1IN T1OUT 19
T1
R1OUT 1 24 T1IN +5V
400k
R1IN 2 23 T2IN
TTL/CMOS 23 T2IN T2OUT 20
GND 3 22 R2OUT T2 RS-232
INPUTS OUTPUTS
VCC 4 21 R2IN +5V
400k
V+ 5 MAX239 20 T2OUT
16 T3IN T3OUT 13
C+ 6 19 T1OUT T3
C- 7 18 R3IN
V- 8 17 R3OUT 1 R1OUT R1IN 2

R1
R5IN 9 16 T3IN
5k
R5OUT 10 15 N.C.
R4OUT 11 14 EN 22 R2OUT R2IN 21

R2
R4IN 12 13 T3OUT
5k
DIP/SO
R3
OUTPUTS INPUTS
5k
11 R4OUT R4IN 12
R4
5k
10 R5OUT R5IN 9
R5
5k
14 EN 15
N.C.
GND
3
26 ______________________________________________________________________________________
Drivers/Receivers
MAX220MAX249
+5V INPUT
TOP VIEW 1.0F
19
25 1.0F
C1+ VCC 26
1.0F 27 +5V TO +10V V+
C1- VOLTAGE DOUBLER
28
C2+ +5V TO -10V 30
29 C2- 1.0F
+5V
400k
15 T1IN T1OUT 7
T1
+5V
400k
14 T2IN T2OUT 8
T2
R3OUT
T2OUT
T1OUT
T3OUT
T4OUT
R2IN
R3IN
N.C.
N.C.
N.C.
T5IN
+5V
400k

T3
INPUTS OUTPUTS
11
10
9
8
7
6
5
4
3
2
1
+5V 400k
N.C. 12 44 N.C. 38 T4IN T4OUT 5

T4
R2OUT 13 43 SHDN
T2IN 14 42 EN +5V
400k
T1IN 15 41 T5OUT
R1OUT 16 40 R4IN 2 T5IN T5OUT 41
T5
R1IN 17 39 R4OUT
GND 18 MAX240 38 T4IN 16 R1OUT R1IN 17
VCC 19 37 T3IN R1
N.C. 20 36 R5OUT 5k
N.C. 21 35 R5IN
N.C. 22 34 N.C. 13 R2OUT R2IN 10
R2
23
24
25
26
27
28
29
30
31
32
33
5k

R3
N.C.
N.C.
C1+
V+
C1-
C2+
C2
V-
N.C.
N.C.
N.C.
OUTPUTS INPUTS
5k
Plastic FP
39 R4OUT R4IN 40
R4
5k
36 R5OUT R5IN 35
R5
5k
42 EN 43
SHDN
GND
18
______________________________________________________________________________________ 27
Drivers/Receivers
MAX220MAX249
TOP VIEW +5V INPUT ALL CAPACITORS = 0.1F

0.1F 0.1F
16
1
C1+ VCC
2 +10V
0.1F +5V TO +10V V+
3 C1- VOLTAGE DOUBLER
4
C2+
C1+ 1 16 VCC +10V TO -10V 6 -10V
0.1F 5 C2- V-
VOLTAGE INVERTER
V+ 2 15 GND 0.1F
C1- 3 14 T1OUT +5V
C2+ 4 MAX243 13 R1IN 400k
C2- 5 12 R1OUT 11 T1IN T1OUT 14
V- 6 11 T1IN +5V
TTL/CMOS RS-232
T2OUT 7 10 T2IN INPUTS 400k OUTPUTS
R2IN 8 9 R2OUT 10 T2IN T2OUT 7
DIP/SO
12 R1OUT R1IN 13
TTL/CMOS 5k RS-232
OUTPUTS INPUTS
9 R2OUT R2IN 8
RECEIVER INPUT R1 OUTPUT R2 OUTPUT

-3 V HIGH HIGH 5k
OPEN HIGH LOW
+3V LOW LOW GND
15
28 ______________________________________________________________________________________
Drivers/Receivers
MAX220MAX249
+5V
TOP VIEW 1F
1F
20
21
C1+ VCC 22
1F
TB4OUT
TA4OUT
TA3OUT
TA2OUT
TA1OUT
TB1OUT
TB2OUT
TB3OUT
23 C1- +5V TO +10V VOLTAGE DOUBLER V+
RA4IN
RA5IN
RB5IN
24 26
C2+ V- 1F
1F 25 C2-
6 5 4 3 2 1 44 43 42 41 40 +10V TO -10V VOLTAGE INVERTER
2 TA1OUT +5V +5V TB1OUT 44
400k
15 TA1IN TB1IN 30
RA3IN 7 39 RB4IN
RA2IN 8 38 RB3IN +5V +5V
2 TA2OUT TB2OUT 43
RA1IN 9 37 RB2IN
400k
RA1OUT 10 36 RB1IN 16 TA2IN TB2IN 29
RA2OUT 11 35 RB1OUT
RA3OUT 12
MAX244 34 RB2OUT 3 TA3OUT +5V +5V TB3OUT 42
RA4OUT 13 33 RB3OUT 400k
RA5OUT 14 32 RB4OUT 17 TA3IN TB3IN 28
TA1IN 15 31 RB5OUT
TA2IN 16 30 TB1IN
400k
TA3IN 17 29 TB2IN 18 TA4IN TB4IN 27
9 RA1IN RB1IN 36
18 19 20 21 22 23 24 25 26 27 28
TA4IN
GND
C1+
V+
C1-
C2+
C2-
V-
TB4IN
TB3IN
VCC
5k 5k
PLCC 10 RA1OUT RB1OUT 35

8 RA2IN RB2IN 37
5k 5k
10 RECEIVERS 11 RA2OUT RB2OUT 34
5 A-SIDE RECEIVER 7 RA3IN RB3IN 38
5 B-SIDE RECEIVER
8 TRANSMITTERS 5k 5k
4 A-SIDE TRANSMITTERS
4 B-SIDE TRANSMITTERS 12 RA3OUT RB3OUT 33
NO CONTROL PINS 6 RA4IN RB4IN 39
5k 5k
13 RA4OUT RB4OUT 32
5 RA5IN RB5IN 40
5k 5k
14 RA5OUT RB5OUT 31
GND
19
______________________________________________________________________________________ 29
Drivers/Receivers
MAX220MAX249
+5V
TOP VIEW
1F
40
VCC
ENR 1 40 VCC 16 TA1OUT +5V +5V TB1OUT 24
400k
TA1IN 2 39 ENT
2 TA1IN TB1IN 38
TA2IN 3 38 TB1IN
TA3IN 4 37 TB2IN
400k
TA4IN 5 36 TB3IN
3 TA2IN TB2IN 37
RA5OUT 6 35 TB4IN
RA4OUT 7
MAX245 34 RB5OUT 18 TA3OUT +5V +5V TB3OUT 22
400k
RA3OUT 8 33 RB4OUT
4 TA3IN TB3IN 36
RA2OUT 9 32 RB3OUT
RA1OUT 10 31 RB2OUT
400k
RA1IN 11 30 RB1OUT 5 TA4IN TB4IN 35
RA2IN 12 29 RB1IN
1 ENR ENT 39
RA3IN 13 28 RB2IN
11 RA1IN RB1IN 29
RA4IN 14 27 RB3IN
RA5IN 15 26 RB4IN
5k 5k
TA1OUT 16 25 RB5IN
TA2OUT 17 24 TB1OUT 10 RA1OUT RB1OUT 30

12 RA2IN RB2IN 28
TA3OUT 18 23 TB2OUT
TA4OUT 19 22 TB3OUT
5k 5k
GND 20 21 TB4OUT
9 RA2OUT RB2OUT 31
DIP 13 RA3IN RB3IN 27
5k 5k
8 RA3OUT RB3OUT 32
14 RA4IN RB4IN 26
10 RECEIVERS
5 A-SIDE RECEIVERS (RA5 ALWAYS ACTIVE)
5 B-SIDE RECEIVERS (RB5 ALWAYS ACTIVE) 5k 5k
8 TRANSMITTTERS
7 RA4OUT RB4OUT 33
15 RA5IN RB5IN 25
2 CONTROL PINS
1 RECEIVER ENABLE (ENR)
5k 5k
1 TRANSMITTER ENABLE (ENT)
6 RA5OUT RB5OUT 34
GND
20
30 ______________________________________________________________________________________
Drivers/Receivers
MAX220MAX249
+5V
TOP VIEW
1F
40
VCC
ENA 1 40 VCC +5V +5V
16 TA1OUT TB1OUT 24
TA1IN 2 39 ENB
400k
TA2IN 3 38 TB1IN
2 TA1IN TB1IN 38
TA3IN 4 37 TB2IN +5V +5V
TA4IN 5 36 TB3IN 17 TA2OUT TB2OUT 23
400k
RA5OUT 6 35 TB4IN
3 TA2IN TB2IN 37
RA4OUT 7 MAX246 34 RB5OUT +5V +5V
RA3OUT 8 33 RB4OUT 18 TA3OUT TB3OUT 22

4 TA3IN TB3IN 36
RA1OUT 10 31 RB2OUT
+5V +5V
RA1IN 11 30 RB1OUT 19 TA4OUT TB4OUT 21
RA2IN 12 29 RB1IN 400k

5 TA4IN TB4IN 35
RA3IN 13 28 RB2IN
1 ENA ENB 39
RA4IN 14 27 RB3IN
11 RA1IN RB1IN 29
RA5IN 15 26 RB4IN
TA1OUT 16 25 RB5IN 5k 5k
TA2OUT 17 24 TB1OUT
10 RA1OUT RB1OUT 30
TA3OUT 18 23 TB2OUT
12 RA2IN RB2IN 28
TA4OUT 19 22 TB3OUT
GND 20 21 TB4OUT 5k 5k
DIP 9 RA2OUT RB2OUT 31

13 RA3IN RB3IN 27
5k 5k
5 A-SIDE RECEIVERS (RA5 ALWAYS ACTIVE)
14 RA4IN RB4IN 26
5 B-SIDE RECEIVERS (RB5 ALWAYS ACTIVE)
8 TRANSMITTERS
5k 5k
2 CONTROL PINS 15 RA5IN RB5IN 25
ENABLE A-SIDE (ENA)
ENABLE B-SIDE (ENB) 5k 5k
6 RA5OUT RB5OUT 34
GND
20
______________________________________________________________________________________ 31
Drivers/Receivers
MAX220MAX249
+5V
TOP VIEW
1F
40
1 ENTA VCC ENTB 39
ENTA 1 40 VCC +5V +5V
16 TA1OUT TB1OUT 24
TA1IN 2 39 ENTB
400k
TA2IN 3 38 TB1IN 2 TA1IN TB1IN 38
TA3IN 4 37 TB2IN +5V +5V
17 TA2OUT TB2OUT 23
TA4IN 5 36 TB3IN
400k
RB5OUT 6 35 TB4IN 3 TA2IN TB2IN 37
RA4OUT 7 MAX247 34 RB4OUT +5V +5V
18 TA3OUT TB3OUT 22
RA3OUT 8 33 RB3OUT
400k
RA2OUT 9 32 RB2OUT
4 TA3IN TB3IN 36
RA1OUT 10 31 RB1OUT +5V +5V
19 TA4OUT TB4OUT 21
ENRA 11 30 ENRB
400k
RA1IN 12 29 RB1IN
5 TA4IN TB4IN 35
RA2IN 13 28 RB2IN
6 RB5OUT RB5IN 25
RA3IN 14 27 RB3IN
TA1OUT 16 25 RB5IN
TA2OUT 17 24 TB1OUT 12 RA1IN RB1IN 29
TA3OUT 18 23 TB2OUT
5k 5k
TA4OUT 19 22 TB3OUT
GND 20 21 TB4OUT 10 RA1OUT RB1OUT 31

13 RA2IN RB2IN 28
DIP
5k 5k
4 A-SIDE RECEIVERS 14 RA3IN RB3IN 27
5 B-SIDE RECEIVERS (RB5 ALWAYS ACTIVE)
8 TRANSMITTERS 5k 5k
4 CONTROL PINS 15 RA4IN RB4IN 26
ENABLE RECEIVER A-SIDE (ENRA)

ENABLE RECEIVER B-SIDE (ENRB) 5k 5k
ENABLE RECEIVER A-SIDE (ENTA)

7 RA4OUT RB4OUT 34
ENABLE RECEIVERr B-SIDE (ENTB)
11 ENRA ENRB 30
GND
20
32 ______________________________________________________________________________________
Drivers/Receivers
MAX220MAX249
TOP VIEW +5V
1F
1F
20
21
C1+ VCC 22
TA4OUT
TA3OUT
TA2OUT
TA1OUT
TB1OUT
TB2OUT
TB3OUT
TA4OUT
1F V+
23 C1-
RA3IN
RA4IN
RB4IN
+5V TO +10V VOLTAGE DOUBLER 26
24 V-
C2+ 1F
6 5 4 3 2 1 44 43 42 41 40 1F 25 C2- +10V TO -10V VOLTAGE INVERTER
18 ENTA ENTB 27
+5V +5V
1 TA1OUT TB1OUT 44
RA1IN 8 38 RB2IN 14 TA1IN TB1IN 31
ENRA 9 37 RB1IN +5V +5V
RA1OUT 10 36 ENRB 2 TA2OUT TB2OUT 43
RA3OUT 12
MAX248 34 RB2OUT 15 TA2IN TB2IN 30
3 TA3OUT TB3OUT 42
TA1IN 14 32 RB4OUT
TA2IN 15 31 TB1IN 400k
16 TA3IN TB3IN 29
TA3IN 16 30 TB2IN
TA4IN 17 29 TB3IN
+5V +5V
4 TA4OUT TB4OUT 41
400k
18 19 20 21 22 23 24 25 26 27 28
17 TA4IN TB4IN 28
ENTA
GND
C1+
V+
C1-
C2+
C2-
V-
ENTB
TB4IN
VCC
8 RA1IN RB1IN 37
PLCC
5k 5k
MAX248 FUNCTIONAL DESCRIPTION 10 RA1OUT RB1OUT 35

8 RECEIVERS 7 RA2IN RB2IN 38
4 A-SIDE RECEIVERS
4 B-SIDE RECEIVERS 5k 5k
8 TRANSMITTERS
11 RA2OUT RB2OUT 34
6 RA3IN RB3IN 39
4 B-SIDE TRANSMITTERS
4 CONTROL PINS
5k 5k
ENABLE RECEIVER B-SIDE (ENRB)
12 RA3OUT RB3OUT 33
ENABLE RECEIVER A-SIDE (ENTA)
5 RA4IN RB4IN 40
ENABLE RECEIVER B-SIDE (ENTB)
5k 5k
13 RA4OUT RB4OUT 32
9 ENRA ENRB 36
GND
19
______________________________________________________________________________________ 33
Drivers/Receivers
MAX220MAX249
+5V
TOP VIEW 1F
1F
20
21
C1+ VCC 22
TA3OUT
TA2OUT
TA1OUT
TB1OUT
TB2OUT
TB3OUT
1F V+
23 C1-
RA3IN
RA4IN
RA5IN
RB5IN
RB4IN
+5V TO +10V VOLTAGE DOUBLER 26
24 V-
C2+ 1F
6 5 4 3 2 1 44 43 42 41 40 1F 25 C2- +10V TO -10V VOLTAGE INVERTER
18 ENTA ENTB 27
+5V +5V
1 TA1OUT TB1OUT 44
RA1IN 8 38 RB2IN 15 TA1IN TB1IN 30
ENRA 9 37 RB1IN +5V +5V
RA1OUT 10 36 ENRB 2 TA2OUT TB2OUT 43
RA3OUT 12
MAX249 34 RB2OUT 16 TA2IN TB2IN 29
3 TA3OUT TB3OUT 42
RA5OUT 14 32 RB4OUT
TA1IN 15 31 RB5OUT 400k
17 TA3IN TB3IN 28
TA2IN 16 30 TB1IN
8 RA1IN RB1IN 37
TA3IN 17 29 TB2IN
18 19 20 21 22 23 24 25 26 27 28 5k 5k
ENTA
GND
C1+
V+
C1-
C2+
C2-
V-
ENTB
TB3IN
VCC
10 RA1OUT RB1OUT 35
7 RA2IN RB2IN 38
PLCC
5k 5k
11 RA2OUT RB2OUT 34
6 RA3IN RB3IN 39
10 RECEIVERS
5 A-SIDE RECEIVERS
5k 5k
5 B-SIDE RECEIVERS
6 TRANSMITTERS 12 RA3OUT RB3OUT 33
3 A-SIDE TRANSMITTERS 5 RA4IN RB4IN 40
3 B-SIDE TRANSMITTERS
4 CONTROL PINS
5k 5k
ENABLE RECEIVER B-SIDE (ENRB) 13 RA4OUT RB4OUT 32
ENABLE RECEIVER A-SIDE (ENTA) 4 RA5IN RB5IN 41
ENABLE RECEIVER B-SIDE (ENTB)
5k 5k
14 RA5OUT RB5OUT 31
9 ENRA ENRB 36
GND
19
34 ______________________________________________________________________________________
Drivers/Receivers
___________________________________________Ordering Information (continued)
MAX220MAX249
PART TEMP. RANGE PIN-PACKAGE MAX232AC/D 0C to +70C Dice*
MAX222CPN 0C to +70C 18 Plastic DIP MAX232AEPE -40C to +85C 16 Plastic DIP
MAX222CWN 0C to +70C 18 Wide SO MAX232AESE -40C to +85C 16 Narrow SO
MAX222C/D 0C to +70C Dice* MAX232AEWE -40C to +85C 16 Wide SO
MAX222EPN -40C to +85C 18 Plastic DIP MAX232AEJE -40C to +85C 16 CERDIP
MAX222EWN -40C to +85C 18 Wide SO MAX232AMJE -55C to +125C 16 CERDIP
MAX222EJN -40C to +85C 18 CERDIP MAX232AMLP -55C to +125C 20 LCC
MAX222MJN -55C to +125C 18 CERDIP MAX233CPP 0C to +70C 20 Plastic DIP
MAX223CAI 0C to +70C 28 SSOP MAX233EPP -40C to +85C 20 Plastic DIP
MAX223CWI 0C to +70C 28 Wide SO MAX233ACPP 0C to +70C 20 Plastic DIP
MAX223C/D 0C to +70C Dice* MAX233ACWP 0C to +70C 20 Wide SO
MAX223EAI -40C to +85C 28 SSOP MAX233AEPP -40C to +85C 20 Plastic DIP
MAX223EWI -40C to +85C 28 Wide SO MAX233AEWP -40C to +85C 20 Wide SO
MAX225CWI 0C to +70C 28 Wide SO MAX234CPE 0C to +70C 16 Plastic DIP
MAX225EWI -40C to +85C 28 Wide SO MAX234CWE 0C to +70C 16 Wide SO
MAX230CPP 0C to +70C 20 Plastic DIP MAX234C/D 0C to +70C Dice*
MAX230CWP 0C to +70C 20 Wide SO MAX234EPE -40C to +85C 16 Plastic DIP
MAX230C/D 0C to +70C Dice* MAX234EWE -40C to +85C 16 Wide SO
MAX230EPP -40C to +85C 20 Plastic DIP MAX234EJE -40C to +85C 16 CERDIP
MAX230EWP -40C to +85C 20 Wide SO MAX234MJE -55C to +125C 16 CERDIP
MAX230EJP -40C to +85C 20 CERDIP MAX235CPG 0C to +70C 24 Wide Plastic DIP
MAX230MJP -55C to +125C 20 CERDIP MAX235EPG -40C to +85C 24 Wide Plastic DIP
MAX231CPD 0C to +70C 14 Plastic DIP MAX235EDG -40C to +85C 24 Ceramic SB
MAX231CWE 0C to +70C 16 Wide SO MAX235MDG -55C to +125C 24 Ceramic SB
MAX231CJD 0C to +70C 14 CERDIP MAX236CNG 0C to +70C 24 Narrow Plastic DIP
MAX231C/D 0C to +70C Dice* MAX236CWG 0C to +70C 24 Wide SO
MAX231EPD -40C to +85C 14 Plastic DIP MAX236C/D 0C to +70C Dice*
MAX231EWE -40C to +85C 16 Wide SO MAX236ENG -40C to +85C 24 Narrow Plastic DIP
MAX231EJD -40C to +85C 14 CERDIP MAX236EWG -40C to +85C 24 Wide SO
MAX231MJD -55C to +125C 14 CERDIP MAX236ERG -40C to +85C 24 Narrow CERDIP
MAX232CPE 0C to +70C 16 Plastic DIP MAX236MRG -55C to +125C 24 Narrow CERDIP
MAX232CSE 0C to +70C 16 Narrow SO MAX237CNG 0C to +70C 24 Narrow Plastic DIP
MAX232CWE 0C to +70C 16 Wide SO MAX237CWG 0C to +70C 24 Wide SO
MAX232C/D 0C to +70C Dice* MAX237C/D 0C to +70C Dice*
MAX232EPE -40C to +85C 16 Plastic DIP MAX237ENG -40C to +85C 24 Narrow Plastic DIP
MAX232ESE -40C to +85C 16 Narrow SO MAX237EWG -40C to +85C 24 Wide SO
MAX232EWE -40C to +85C 16 Wide SO MAX237ERG -40C to +85C 24 Narrow CERDIP
MAX232EJE -40C to +85C 16 CERDIP MAX237MRG -55C to +125C 24 Narrow CERDIP
MAX232MJE -55C to +125C 16 CERDIP MAX238CNG 0C to +70C 24 Narrow Plastic DIP
MAX232MLP -55C to +125C 20 LCC MAX238CWG 0C to +70C 24 Wide SO
MAX232ACPE 0C to +70C 16 Plastic DIP MAX238C/D 0C to +70C Dice*
MAX232ACSE 0C to +70C 16 Narrow SO MAX238ENG -40C to +85C 24 Narrow Plastic DIP
MAX232ACWE 0C to +70C 16 Wide SO * Contact factory for dice specifications.
______________________________________________________________________________________ 35
Drivers/Receivers
___________________________________________Ordering Information (continued)
MAX220MAX249
PART TEMP. RANGE PIN-PACKAGE MAX243CPE 0C to +70C 16 Plastic DIP

MAX238EWG -40C to +85C 24 Wide SO MAX243CSE 0C to +70C 16 Narrow SO
MAX238ERG -40C to +85C 24 Narrow CERDIP MAX243CWE 0C to +70C 16 Wide SO
MAX238MRG -55C to +125C 24 Narrow CERDIP MAX243C/D 0C to +70C Dice*
MAX239CNG 0C to +70C 24 Narrow Plastic DIP MAX243EPE -40C to +85C 16 Plastic DIP
MAX239CWG 0C to +70C 24 Wide SO MAX243ESE -40C to +85C 16 Narrow SO
MAX239C/D 0C to +70C Dice* MAX243EWE -40C to +85C 16 Wide SO
MAX239ENG -40C to +85C 24 Narrow Plastic DIP MAX243EJE -40C to +85C 16 CERDIP
MAX239EWG -40C to +85C 24 Wide SO MAX243MJE -55C to +125C 16 CERDIP
MAX239ERG -40C to +85C 24 Narrow CERDIP MAX244CQH 0C to +70C 44 PLCC
MAX239MRG -55C to +125C 24 Narrow CERDIP MAX244C/D 0C to +70C Dice*
MAX240CMH 0C to +70C 44 Plastic FP MAX244EQH -40C to +85C 44 PLCC
MAX240C/D 0C to +70C Dice* MAX245CPL 0C to +70C 40 Plastic DIP
MAX241CAI 0C to +70C 28 SSOP MAX245C/D 0C to +70C Dice*
MAX241CWI 0C to +70C 28 Wide SO MAX245EPL -40C to +85C 40 Plastic DIP
MAX241C/D 0C to +70C Dice* MAX246CPL 0C to +70C 40 Plastic DIP
MAX241EAI -40C to +85C 28 SSOP MAX246C/D 0C to +70C Dice*
MAX241EWI -40C to +85C 28 Wide SO MAX246EPL -40C to +85C 40 Plastic DIP
MAX242CAP 0C to +70C 20 SSOP MAX247CPL 0C to +70C 40 Plastic DIP
MAX242CPN 0C to +70C 18 Plastic DIP MAX247C/D 0C to +70C Dice*
MAX242CWN 0C to +70C 18 Wide SO MAX247EPL -40C to +85C 40 Plastic DIP
MAX242C/D 0C to +70C Dice* MAX248CQH 0C to +70C 44 PLCC
MAX242EPN -40C to +85C 18 Plastic DIP MAX248C/D 0C to +70C Dice*
MAX242EWN -40C to +85C 18 Wide SO MAX248EQH -40C to +85C 44 PLCC
MAX242EJN -40C to +85C 18 CERDIP MAX249CQH 0C to +70C 44 PLCC
MAX242MJN -55C to +125C 18 CERDIP MAX249EQH -40C to +85C 44 PLCC
* Contact factory for dice specifications.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
36 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600
1997 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
TECHNICAL SPECIFICATION
FOR
G83-6000
Revision: 01
Page 1 of 32
LAB
TBE
QS-T
VKT
Technical Specification G83-6000
Page 2 von 32
Rev: 01
MODIFICATIONS
Rev. Modification Date revised by
--------------------------------------------------------------------------------------------------------------------------------------------
-------------
a First Issue 04.05.1994 Mr. Greiner
b Pkt. 2.7. Type plate printing changed to 14.07.1994 Mr. Greiner

Type plate legends
Data will be laser printed changed to
Data are partially moulded with the lower housing
the remaining type-marking will bei LASER-printed
Pkt. 2.9.6. Dimensions: 495 x 212 x 48 added
c CIRCULATION: S. Rodway added 03.08.1994 Mr. Greiner

Pkt. 3.1.1. Current consumption: 45mA typical changed to
Current consumption: 35mA typical
f Pkt. 3 Electronic reworked 05.10.1994 Mr. Kferl

Pkt. 1.3. weighs with original pack. 890g 21.12.1994 Mr. Greiner
changed to 1193g
weighs without orignal pack. 750g
changed to 1040g
Pkt. 1.4. Operating life >20 mill. operations changed to
Alphanumeric keys min. 20 mill. actuation,
Functionalkeys min. 4 mill. actuation
Pkt. 7 Approvals: Novel Unix Ware and Novell Net Ware added
Pkt. 2.9.4. Material corrugated board... changed to corrugated board:
Minimum requirement:
Outer layer: 125 Kraftliner, Corrugation: 110,
Inner layer: 140 Testliner
Pkt. 2.9.6. Dimensions: 495x 212 x 48 changed to 495 x 210 x 47
g Pkt. 1.3. Weight with the original packaging approx 1193g changed to
1190g
Pkt. 1.6. Keyboard designation G80-6000LAD changed G80-6000LAADE
Pkt. 2.4.2. .....and lower grid added
Pkt. 2.4.3. PET, 100m thick changed to textured PET, 125m thick
Pkt. 2.7. Type plate legends changed to Name plate legends
Pkt. 3. Electronic reworked
Pkt. 4.1.1. Operation min. 0 to 40C, desired 0 to 50C changed to desired 0 to 50C
Pkt. 4.2.1. 10 to 85 degree changed to 10 to 85%
Pkt. 4.3.1. .....85 degree changed to 85%
Pkt. 4.4.1. 10 to 22,5 Hz, travel.... changed to 10 to 22,5 Hz, displacement.......
Pkt. 4.4.2. 10 to 16 Hz: travel.... changed to 10 to 16 Hz, displacement
Pkt. 4.5.1. (halfsine wave) added
Page 3 von 32
Rev: 01
Rev. Modification Date revised by
--------------------------------------------------------------------------------------------------------------------------------------------
-------------
Pkt. 4.5.2. (halfsine wave) added

Pkt. 4.6.1. Operation: withstands having... changed to bench test to bottom side...
Pkt. 4.7. Air pressure changed to Alitude
Pkt. 5. Electromangnetic Compatibilit reworked
Pkt. 6. Reliability reworked
Pkt. 7. Approvals UL changed to UL 1950
Pkt. 8. EC Conformity for CE-mark added
00 Pkt. 1.1. Description 104/104 keys added

Pkt. 1.6. Keyboard desgnation G80-6000 changed to G83-6000
Pkt. 2.2.3. Keycaps number, sizes 104/105 key added
Pkt. 2.4.3. Spacer 125 m changed to 100 m
Pkt. 3.3.2. Typical Power on Diagram added
Pkt. 3.5.1. Key numbering 104/104 keys added
Pkt. 3.5.2. No. 52/63/65 in Codetable obsoleted
Pkt. 3.5.2.1. Appendix 1 for Set 1 added
Pkt. 4.7.1 ... equivalent to 565 changed to 665 mbars
Pkt. 4.7.2. ... equivalent to 226 changed to 280 mbars
Pkt. 6.2.1. Nominal workload changed to Electronics....
Pkt. 6.2.2. Maximumum average workload changed to keyboard...
Pkt. 6.2.3. obsoleted
01 Pkt. 2.4.3. complete revised 13.07.1998 E. Go

(nd.-Nr. 128280)
Page 4 von 32
Rev: 01
CONTENTS
1.0 GENERAL
1.1. DESCRIPTION
1.2. KEYBOARD COMPONENTS
1.3. WEIGHT
1.4. OPERATING LIFE
1.5. FORCE/TRAVEL DIAGRAM
1.6. KEYBOARD DESIGNATION
1.7. HOUSING/LEGEND VERSIONS
1.8. TECHNICAL DESIGN
1.9. LANGUAGE/COUNTRY VERSIONS
1.10. GENERAL REQUIREMENTS AS PER DIN/ISO
1.11. ERGONOMICS
1.12. UL RECOGNITION
1.12.1. Plastic parts
1.12.2. PCB
1.12.3. Cables
1.12.4. Membranes
1.12.5. Rubber sheet
1.13. ADDITIONAL DOCUMENTS
2.0. MECHANICAL COMPONENTS
2.1. HOUSING
2.1.1. Colour
2.1.2. Dimensions
2.1.3. Materials
2.1.4. Surface
2.1.5. Adjustable feet
2.1.6. Antislip pads
2.1.7. Inclination
2.1.8. Cleaning
2.2. KEYCAPS
2.2.1. Shape
2.2.2. Colour
2.2.3. Number, sizes
2.2.4. Material
2.2.5. Surface
2.2.6. Legends
2.2.6.1 Type of top legend
2.2.6.2. Colour of top legend
2.2.6.3. Type of front legend
2.2.6.4. Colour of front legend
2.2.6.5. Type style
2.2.7. Layout, position
2.2.7.1. Height of C row
2.2.7.2. Alphanumeric field
2.2.7.3. Deviation from baseline
Page 5 von 32
Rev: 01
2.2.7.4. Gap between adjacent keycaps
2.2.8. Pull-out force
2.3. RUBBER SHEET
2.3.1. Material
2.3.2. Tactile feedback
2.4. MEMBRANE
2.4.1. Material
2.4.2. Printing
2.4.3. Spacer
2.5. PCB
2.5.1. Design
2.5.2. Colour of solder mask
2.5.3. Dimensions
2.5.4. Material
2.6. CABLES
2.6.1. Design
2.6.2. Colour
2.6.3. Length
2.6.4. Plug
2.7. NAME PLATE LEGENDS
2.8. LED LEGENDS
2.9. PACKAGING
2.9.1. Design
2.9.2. Colour
2.9.3. Printing
2.9.4. Materials
2.9.5. Dimensions
2.9.6. Labels
3.0. ELECTRONICS
3.1. ELECTRICAL CHARACTERISTICS

3.1.1. Power supply
3.1.2. Connector Assignment
3.1.3. PCB Connector Assigment
3.2. INTERFACE
3.2.1. Data Output Signal
3.2.2. Data communications
3.2.3. Clock and Data Signals
3.2.4. Timing diagram
3.2.5. Keyboard sends Data
3.2.6. Keyboard receives data
3.2.7. Keyboard Buffer
3.3. POWER-ON ROUTINE
3.3.1. Power-On Reset
3.3.2. Typical Power On Diagramm
3.3.3. Basic Assurance Test
Page 6 von 32
Rev: 01
3.4. COMMANDS
3.4.1. Commands from the System
3.4.1.1. Default Disable (Hex F5)
3.4.1.2. Echo (Hex EE)
3.4.1.3. Enable (Hex F4)
3.4.1.4. Invalid Command (Hex EF and F1)
3.4.1.5. Read ID (Hex F2)
3.4.1.6. Resend (Hex FE)
3.4.1.7. Reset (Hex FF)
3.4.1.8. Select Alternate Scan Codes (Hex F0)
3.4.1.9. Set All Keys (Hex F7, F8, F9, FA)
3.4.1.10. Set Default (Hex F6)
3.4.1.11. Set Key Type (Hex FB, FC, FD)
3.4.1.12. Set/Reset Status Indicators (Hex ED)
3.4.1.13. Set Typematic Rate/Delay (Hex F3)
3.4.2. Commands to the System

3.4.2.1. Acknowledge (Hex FA)
3.4.2.2. BAT Completion Code (Hex AA)
3.4.2.3. BAT Failure Code (Hex FC)
3.4.2.4. Echo (Hex EE)
3.4.2.5. Keyboard ID (Hex 83AB)
3.4.2.6. Key Detection Error (Hex or FF)
3.4.2.7. Overrun (Hex 00 or FF)
3.4.2.8. Resend (Hex FE)
3.5. KEYCODES
3.5.1. Key numbering
3.5.2. Codetable
3.5.2.1. Appendix 1 for Set 1
3.6. CABLE DRAWINGS
4.0. ENVIRONMENTAL CONDITIONS
4.1. TEMPERATURE
4.1.1. Operation
4.1.2. Storage
4.1.3. Transport
4.2. HUMIDITY
4.2.1. Operation
4.2.2. Storage
4.2.3. Transport
4.3. CLIMATE
4.3.1. Operation
4.4. VIBRATION
4.4.1. Operation
4.4.2. Storage
4.5. SHOCK
4.5.1. Operation
4.5.1. Storage and transport
Page 7 von 32
Rev: 01
4.6. Drop resistance
4.6.1. Operation
4.7. Altitude
4.7.1. Operation
5.0. ELECTROMAGNETIC COMPATIBILITY
5.1. RFI/EMI
5.2. ESD susceptibility
5.3. Immunity to radiated fields
5.4. Burst requirements
6.0 RELIABILITY
6.1. MCBF
6.2. MTBF
6.2.1. Electronics
6.2.2. Keyboard
7. APPROVALS
8. EC CONFORMITY FOR CE-Mark
8.1. Safty
8.2. Electro-Magnetic Compatibility
8.2.1. RFI
8.2.2. Susceptibility
Page 8 von 32
Rev: 01
1.0. GENERAL
This specification describes the requirements for the G83-6000.
1.1. PRODUCT DESCRIPTION
This is a keyboard with 101/102 or 104/105 keys in a housing with Cherry adjustable
feet. No options are planned.
G83 -------> Rubber sheet technology
1.2. KEYBOARD COMPONENTS
The keyboard consists of the following principal parts:

a) Upper housing with light conveyor and keycaps
b) Lower housing, adjustable feet and antislip pads
c) Membrane assembly
d) Rubber sheet
e) Printed wiring board with electronic components
The upper housing is snapped onto the lower housing. The printed wiring board,
the rubber sheet and the membrane are placed in the lower housing. The
membrane contacts the PCB by being pressed against it.
1.3. WEIGHT
The keyboard weighs with the original packaging: approx. 1190 g

without the original packaging: approx. 1040 g
1.4. OPERATING LIFE

Alpha-Keypad: min. 20 mill actuation
Functional keys min. 4 mill. actuation
1.5. FORCE/TRAVEL DIAGRAM
Kraft
force
f (cN)
(CN)
70 Druckpunkt / tactilepoint
60
50
40 DF
30
20
10 Vorlaufweg / pretravel
Weg
travel
s (mm)
1 2 3 3,7
4
Nominal values:
Page 9 von 32
Rev: 01
Tactile point: 0,9mm / 61 cN

Pretravel: 2,4 mm
Total travel: 3,7 mm
Force differential: 26 cN
1.6. KEYBOARD DESIGNATION
G83-6000 L AA DE
Country/language version
Technical version
Housing/legend version
Keyboard number
1.7. HOUSING/LEGEND VERSION

L = with housing/laser-printed keycaps
No other letters are specified
1.8. TECHNICAL DESIGN

For detailed listing see DOKT-6000-03 "Technical design"
1.9. COUNTRY/LANGUAGE VERSION

For detailed listing see DOKT-6000-04 "Letter designation for country/language
versions"
1.10. GENERAL REQUIREMENTS FOR KEYBOARDS IN COMPLIANCE WITH ISO 9995

AND DIN 2137
1.11. ERGONOMICS AS PER ISO 9241 PART 4, ZH 1/618
1.12. UL-RECOGNIZED MATERIALS/FIRE PROTECTION CLASSES

1.12.1. Plastic parts: UL 94 HB
1.12.2. Circuit boards: UL 94 V-O
1.12.3. Cables: UL-recognized
1.12.4. Membranes: UL 4 VTM-2
1.12.5. Rubber sheet: UL 94 HB
1.13. Additional documents

Drawings of individual parts DOKZ-6000-01Design prints
Symbol films DOKT-6000-02 Construction overview
FAW's DOKT-6000-03 Technical design
VAW's DOKT-6000-04 Letter designations for
country/language versions
Page 10 von 32
Rev: 01
2.0. MECHANICAL COMPONENTS
2.1. HOUSING
2.1.1. Colour pearl white
2.1.2. Dimensions 458 x 170 mm
2.1.3. Material S/B Styrene / butadiene
2.1.4. Surface as per VDI 3400 No. 36; Ra 6,3 m
2.1.5. Adjustable feet: 2, with antislip pads
2.1.6. Anti-slip pads 2 pcs.
2.1.7. Inclination 6 and 10
2.2. KEYCAPS
2.2.1. Shape: cylindrical ("cyln"), type unilevel
2.2.2. Colour/colour code white-grey/beige-grey / 6A/6B
2.2.3. Number, sizes: Version with 101 keys:
83x 1x1 6A/6B
3x 1x1 with dimple (F/J/5) 6A
6x 1x1,5 6A/6B
1x 1x1,75 stepped 6B
2x 1x2 6A/6B
2x 1x2,25 6B
2x 1x2 vertical 6B
1x 1x2,75 6B
1x 1x7 6A
Version with 102 keys:

85x 1x1 6A/6B
1x 1x1,25 6B
5x 1x1,5 6B
2x 1x2 6B/6A
2x 1x2 vertical 6B
1x 1x2,75 6B
1x 1,5x2x1,25 6B
1x 1x7 6A
Version with 104 keys

83x 1x1 6A/6B
7x 1x1,25 6B
2x 1x1,5 6A/6B
2x 1x2 6A/6B
2x 1x2 vertical 6B
2x 1x2,25 6B
1x 1x2,75 6B
1x 1x6,25 6A
Page 11 von 32
Rev: 01
Version with 105 keys

85x 1x1 6A/6B
8x 1x1,25 6B
1x 1x1,5 6B
2x 1x2 6A/6B
2x 1x2 vertical 6B
1x 1x2,75 6B
1x 1,5x2x1,25 6B
1x 1x6,25 6A
2.2.4. Material PBT

2.2.5. Surface eroded, Rt 18 m
2.2.6. Legends:
2.2.6.1. Type of top legend: laser-printed
2.2.6.2. Colour/colour code of top legend: black
2.2.6.3. Type of front legends: laser-
printed/tampo-
printing optionally
possible
2.2.6.4. Colour of front legends: black
2.2.6.5. Typestyle: Formula One
2.2.7. Layout, position

2.2.7.1. Height of C row 29,5 mm
2.2.7.2. Typewriter area: as per DIN 2137
2.2.7.3. Deviation from baseline of a row: < 0,5 mm
2.2.7.4. Gap between two adjacent keycaps: Variance of
+/- 0,5mm
2.2.8. Pull-off force: 6N < F < 30 N
2.3. RUBBER SHEET

2.3.1. Material: two-component silicone rubber
(LSR)
2.3.2. Tactile feedback: tactile point
2.4. MEMBRANE
2.4.1. Membrane material: PET, 100 m thick
2.4.2. Printing: Tracks with conductive silver
ink approx 7 mthick, plus carbon
printing on outside of upper
membrane and lower grid
2.4.3. Spacer: PET, 100 m thick textured /
embossed up to 125 m
thickness
Page 12 von 32
Rev: 01
2.5. PCB
2.5.1. Type: one side with Cu 35/00 m chem. nickel 4 - 5 m
chem. gold 0,1 - 0,3 m
2.5.2. Colour: solder resist, green, on solder side
2.5.3. Dimensions: 59 x 27,5 x1,5 mm
2.5.4. Material: FR2 (UL 94 V-0) or
FR1 (UL 94 V-0) or
FR3 (UL 94V-0) or
FR4 (UL 94V-0)
2.6. CABLES:
2.6.1. Type: round with and without coil
2.6.2. Colour: gravel-grey (RAL 7032)
2.6.3. Length: 1750 mm from housing in version without coil
2.6.4. Connector: 5-pin shielded DIN connector or mini-DIN
connector other end plug connected
2.7. NAME PLATE LEGENDS

Data are partially moulded in bottom housing, the additional datas will be Layer-
printed
2.8. LED LEGENDS

Laser-printed on upper housing
2.9. PACKAGING
2.9.1. Type: single packaging; corrugated collapsible box
board
2.9.2. Colour: brown
2.9.3. Printing: none
2.9.4. Material: corrugated board
Minimum requirement:
Outer layer: 125 Kraftliner
Corrugation: 110
Inner layer: 140 Testliner
2.9.5. Labels: printed paper
2.9.6. Dimensions: 495 x 210 x 47
Page 13 von 32
Rev: 01
3. ELECTRONICS
3.1 ELECTRICAL CHARACTERISTICS
3.1.1 Power Supply
Min. Typ. Max.

Voltage 4,75 V 5V 5,25 V
safety extra low

voltage (SELV)
Current 3 LED's ON tbd 35 mA tbd
Current 3 LED's OFF tbd 5 mA tbd
3.1.2 Connector Assignment
DIN Connector Signals MINI DIN Connector
1 __________________Clock ___________________5
2 __________________Data ___________________1
3 __________________nc ___________________2/6
4 __________________Ground __________________3
5 __________________+5 Volt __________________4
Shell _____________Shield __________________Shell
2
4 5
5 6
1 3 4
3
DIN MINI
Connectorpins DIN
Front-View 1 2
3.2 INTERFACE
3.2.1 Data Output Signal
Bidirectional synchronous format. IBM-AT-compatible. Open drain.
CLOCK/DATA MIN. MAX.

Vout low 0 0,7 V
Vout high 2,4 V 5,25 V
Page 14 von 32
Rev: 01
3.2.2 Data communications
1 Startbit (always 0)
8 Databits
1 Paritybit odd
1 Stopbit (always 1)
3.2.3 Clock and Data Signals
The keyboard and the system communicate over the clock and data lines. The
source of each of theses lines is an open-drain device on the keyboard that allows
either the keyboard or the system to force a line to low level. When no
communication is occurring, the clock and datalines are on high level kept by pull-up
resistors.
When the system sends data to the keyboard, it forces the data line to low level
until the keyboard starts to clock the data stream.
The keyboard clock line provides the clocking signals used to clock serial data to and
from the keyboard. If the host system forces the clock line to an low level, keyboard
transmission is inhibited.
When the keyboard sends data to or receives data from the system it generates the
clock signal to time the data. The system can prevent the keyboard from sending
data by forcing the clock line to low level, the data line may be high or low during
this time.
During the BAT, the keyboard allows the clock and data line to go to high level.
3.2.4 Timing diagram

Clock
T1
Send T2
T5
T3 T4
Data
Start Bit0 Bit1 Bit2 Bit3 Bit4 Bit 5 Bit6 Bit7 Parity Stop
Page 15 von 32
Rev: 01
Clock
T1
Receive T2
T6
T4
Data Start Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Parity
Line Control
Bit
T1 30<50s
T2 30<50s
T3 5<25s
T4 5<T2-5s
T5 0<50s
T6 5<25s
3.2.5 Keyboard sends Data
When the keyboard is ready to send data, it first checks for a keyboard-inhibit or
system request-to-send status on the clock and data lines. If the clock line is low,
data is stored in the keyboard buffer. If the clock line is high and the data line is low
(request-to send), data is stored in the keyboard buffer, and the keyboard receives
system data.
If the clock and data lines are both high the keyboard sends the (0) start bit, 8 data
bits, the parity bit and the stop bit. Data will be valid before the trailing edge and
beyond the leading edge of the clock pulse. During transmission, the keyboard
checks the clock line for low level at least every 60 seconds. If the system lowers
the clock line after the keyboard starts ending data, a condition known as line
contention occurs, and the keyboard stops sending data. If line contention occurs
before the leading edge of the 10th clock signal (parity bit), the keyboard buffer
returns the clock and data lines to high level. If contention does not occur by the
10th clock signal, the keyboard completes the transmission. Following line
contention, the system may or may not request the keyboard to resend the data.
Following a transmission, the system can inhibit the keyboard until the system
processes the input or until it requests that a response be sent.
Page 16 von 32
Rev: 01
3.2.6 Keyboard receives data
When the system is ready to send data to the keyboard, it first checks to see
if the keyboard is sending data. If the keyboard is sending, but has not
reached the 10th clock signal, the system can override the keyboard output
by forcing the keyboard clock line to low level. If the keyboard transmission is
beyond the 10th clock signal, the system must receive the transmission.
If the keyboard is not sending or if the system elects to override the keyboard's
output, the system forces the keyboard clock line to low level for more than 60
microseconds while preparing to send data. When the system is ready to send the
start bit (the data line will be low), it allows the clock line to got to high level.
The keyboard checks the state of the clock line at intervals of no more than
10 milliseconds. If a system request-to-send (RTS) is detected, the keyboard counts
11 bits. After the 10th bit, the keyboard checks for high level on the data line, and if
the line is high forces it low, and counts one more bit. This action signals the system
that the keyboard has received its data. Upon receipt of this signal, the system
returns to a ready state, in which it can accept keyboard output or goes to the
inhibited state until it is ready.
If the keyboard data line is found at low level following the 10th bit, a framing error
has occurred, and the keyboard continues to count until the data line becomes high.
The keyboard then makes the data line low and sends a Resend.
Each system command or data transmission to the keyboard requires a

response from the keyboard before the system can send its next output. The
keyboard will respond within 20 milliseconds unless the system prevents
keyboard output. If the keyboard response is invalid or has a parity error, the
system sends the command or data again. However, the two byte commands
require special handling. If hex F3 (Set Typematic Rate/Delay), hex F0 (Select
Alternate Scan Codes), or hex ED (Set/Reset Mode Indicators) have been
sent and acknowledged, and the value byte has been sent but the response
is invalid or has a parity error, the system will resend both the command and
the value byte.
3.2.7 Keyboard Buffer
A 16-byte first-in-first-out (FIFO) buffer in the keyboard stores the scan codes until
the system is ready to receive them.
A buffer-overrun condition occurs when more than 16 bytes are placed in the
keyboard buffer. An overrun code replaces the 17th byte. If more keys are pressed
before the system allows keyboard output, the additional data is lost.
When the keyboard is allowed to send data, the bytes in the buffer will be sent as in
normal operation, and new data entered is detected and sent. Response codes
no occupy a buffer position.
If keystrokes generate a multiple-byte sequence, the entire sequence must fit into
Page 17 von 32
Rev: 01
the available buffer space or the keystroke is discarded and a buffer-overrun
condition occurs.
3.3. POWER-ON-ROUTINE
3.3.1 Power-On Reset
The keyboard logic generates a 'power-on-reset' signal (POR) when power is first
applied to the keyboard. POR occurs a minimum of 150 milliseconds and a
maximum of 2.0 seconds from the time power is first applied to the keyboard.
3.3.2. Typical Power on Diagram
+ 5 Volts
Clock
Data
BAT Completion Code hex AA
x ---- 500 ms -------- 345 ms -----x

POR DELAY BAT +/-20%
3.3.3 Basic Assurance Test
The basic assurance test (BAT) consists of a keyboard processor test, a checksum
of the read-only memory (ROM), and a random-access memory (RAM) test. During
the BAT, activity on the "clock" and "data" lines is ignored. The LEDs are turned on at
the beginning and off at the end of the BAT. The BAT takes a minimum of
300 milliseconds and a maximum of 500 milliseconds. This is in addition to the time
required by the POR.
Upon satisfactory completion of the BAT, a completion code (hex AA) is sent to the
system, and keyboard scanning begins. If a BAT failure occurs, the keyboards sends
an error code to the system. The keyboard is then disabled pending command input.
Completion codes are sent between 450 milliseconds and 2.5 seconds after POR,
and between 300 and 500 milliseconds
after a Reset command is acknowledged.
Page 18 von 32
Rev: 01
3.4 COMMANDS
3.4.1 Commands from the System
The following table shows the command that the system may send and their
hexadecimal values.
Command Hex Value

Set/Reset Status Indicators ED
Echo EE
Invalid Command EF
Select Alternate Scan Codes F0
Invalid Command F1
Read ID F2
Set Typematic Rate/Delay F3
Enable F4
Default Disable F5
Set Default F6
Set All Keys - Typematic F7
- Make/Break F8
- Make F9
- Typematic/Make/Break FA
Set Key Type - Typematic FB
- Make/Break FC
- Make FD
Resend FE
Reset FF
The Commands may be sent to the keyboard at any time. The keyboard will respond
within 20 milliseconds, except when performing the basic assurance test (BAT), or
executing a Reset command.
3.4.1.1 Default Disable (Hex F5)
The Default Disable command resets all conditions to the power-on default state.
The keyboard responds with ACK, clears its output buffer, sets the default key types
(scan code set 3 operation only) and typematic rate/delay, and clears the last
typematic key. The keyboard stops scanning and awaits further instructions.
3.4.1.2 Echo (Hex EE)
Echo is a diagnostic aid. When the keyboard receives this command, it issues a hex
EE response and, if the keyboard was previously enabled, continues scanning.
3.4.1.3 Enable (Hex F4)
Upon receipt of this command, the keyboards responds with ACK, clears its output
buffer, clears the last typematic key, and starts scanning.
3.4.1.4 Invalid Command (Hex EF and F1)
Hex EF and hex F1 are invalid commands and are not supported. If one of these is
Page 19 von 32
Rev: 01
sent, the keyboard does not acknowledge the command, but returns a Resend
command and continues in its prior scanning state. No other activities occur.
3.4.1.5 Read ID (Hex F2)
This command requests identification information from the keyboard. The keyboard
responds with ACK, discontinues scanning and sends the two keyboard ID bytes.
The second byte must follow completion of the first by no more than
500 microseconds. After the output of the second ID byte, the keyboard resumes
scanning.
3.4.1.6 Resend (Hex FE)
The system sends this command when it detects an error in any transmission from
the keyboard. It is sent only after a keyboard transmission and before the system
allows the next keyboard output. When a Resend is received, the keyboard sends
the previous output again (unless the previous output was Resend, in which case
the keyboard sends the last byte before the Resend command).
3.4.1.7 Reset (Hex FF)
The system issues a Reset command to start a program reset and a keyboard
internal self test. The keyboard acknowledges the command with an ACK and
ensures the system accepts ACK before executing the command. The system
signals acceptance of ACK by raising the clock and data lines for a minimum of
500 microseconds. The keyboard is disabled from the time it receives the Reset
command until ACK is accepted or until another command is sent that overrides the
previous command.
Following acceptance of ACK, the keyboard is re-initialized and performs the BAT.
After returning the completion code, the keyboard defaults to scan code set 2.
3.4.1.8 Select Alternate Scan Codes (Hex F0)
This command instructs the keyboard to select one of three sets of scan codes.
The keyboard acknowledges receipt of this command with ACK, clears both the
output buffer and the typematic key (if one is active). The system then sends the
option byte and the keyboard responds with another ACK. An option byte value of
hex 01 selects scan code set 1, hex 02 selects set 2 and hex 03 selects set 3.
An option byte value of hex 00 causes the keyboard to acknowledge with ACK and
send a byte telling the system which scan code set is currently in use.
After establishing the new scan code set, the keyboard returns to the scanning state
it was in before receiving the Select Alternate Scan Codes command.
3.4.1.9 Set All Keys (Hex F7, F8, F9, FA)
These commands instruct the keyboard to set all keys to the type listed below:
Page 20 von 32
Rev: 01
Hex Value Command

F7 Set All Keys - Typematic
F8 Set All Keys - Make/Break
F9 Set All Keys - Make
FA Set All Keys - Typematic/Make/Break
The keyboard responds with ACK, clears its output buffer, sets all keys to the type
indicated by the command and continues scanning (if it was previously enabled).
Although these commands can be sent using any scan code set, they affect only
scan code set 3 operation.
3.4.1.10 Set Default (Hex F6)
The Set Default command resets all conditions to the power-on default state. The
keyboard responds with ACK, clears its output buffer, sets the default key types
(scan code set 3 operation only) and typematic rate/delay, clears the last typematic
key and continues scanning.
3.4.1.11 Set Key Type (Hex FB, FC, FD)
These commands instruct the keyboard to set individual keys to the type listed
below:
Hex Value Command

FB Set Key Type - Typematic
FC Set Key Type - Make/Break
FD Set Key Type - Make
The keyboard responds with ACK, clears its output buffer and prepares to receive
key identification. Key identification is accomplished by the system identifying each
key by its scan code value as defined in scan code set 3. Only scan code set 3
values are valid for key identification. The type of each identified key is set to the
value indicated by the command.
These commands can be sent using any scan code set, but affect only scan code
set 3 operation.
3.4.1.12 Set/Reset Status Indicators (Hex ED)
Three status indicators on the keyboard - Num Lock, Caps Lock and Scroll Lock - are
accessible by the system. The keyboard activates or deactivates these indicators
when it receives a valid command-code sequence from the system. The command
sequence begins with the command byte (hex ED). The keyboard responds to the
command byte with ACK, discontinues scanning and waits for the option byte from
the system. The bit assignments for this option byte are as follows:
Page 21 von 32
Rev: 01
Bit Indicator
0 Scroll Lock Indicator
1 Num Lock Indicator
2 Caps Lock Indicator
3-7 Reserved (bust be 0s)
If a bit for an indicator is set to 1, the indicator is turned on. If a bit is set to 0, the
indicator is turned off.
The keyboard responds to the option byte with ACK, sets the indicators and, if the
keyboard was previously enabled, continues scanning. The state of the indicators
will reflect the bits in the option byte and can be activated or deactivated in any
combination. If another command is received in place of the option byte, execution
of the Set/Reset Mode Indicators command is stopped, with no change to the
indicator states and the new command is processed.
Immediately after power-on, the lights default to the Off state. If the Set Default and
Default Disable commands are received, the lamps remain in the state they were in
before the command was received.
3.4.1.13 Set Typematic Rate/Delay (Hex F3)
The system issues the Set Typematic Rate/Delay command to change the typematic
rate and delay. The keyboard responds to the command with ACK, stops scanning
and waits for the system to issue the rate/delay value byte. The keyboard responds
to the Rate/delay value byte with another ACK, sets the rate and delay to the
values indicated and continues scanning (if it was previously enabled). Bits 6
and 5 indicate the delay and bits 4, 3, 2, 1 and 0 (the least-significant bit) the rate. Bit
7, the most-significant bit, is always 0. The delay is equal to 1 plus the binary value
of bits 6 and 5, multiplied by 250 milliseconds + 20 %.
Page 22 von 32
Rev: 01
The typematic rate (make codes per second) is 1 for each period and are listed in the
following table.
Bit Typematic Bit Typematic

Rate 20 % Rate 20 %
00000 30.0 10000 7.5
00001 26.7 10001 6.7
00010 24.0 10010 6.0
00011 21.8 10011 5.5
00100 20.0 10100 5.0
00101 18.5 10101 4.6
00110 17.1 10110 4.3
00111 16.0 10111 4.0
01000 15.0 11000 3.7
01001 13.3 11001 3.3
01010 12.0 11010 3.0
01011 10.9 11011 2.7
01100 10.0 11100 2.5
01101 9.2 11101 2.3
01110 8.0 11110 2.1
01111 8.0 11111 2.0
The default values for the system keyboard are as follows:
Typematic rate = 10.9 characters per second 20 %
Delay = 500 milliseconds 20 %
The execution of this command stops without change to the existing rate if another
command is received instead of the rate/delay value byte.
3.4.2 Commands to the System
The following table shows the commands that the keyboard may send to the
system and their hexadecimal values.
Command Hex Value

Key Detection Error/Overrun 00 (Code Sets 2 and 3)
Keyboard ID 83AB
BAT Completion Code AA
BAT Failure Code FC
Echo EE
Acknowledge (ACK) FA
Resent FE
Key Detection Error/Overrun FF (Code Set 1)
The commands the keyboard sends to the system are described below, in
alphabetic order.
Page 23 von 32
Rev: 01
3.4.2.1 Acknowledge (Hex FA)
The keyboard issues Acknowledge (ACK) to any valid input other than an Echo or
Resend command. If the keyboard is interrupted while sending ACK, it discards ACK
and accepts and responds to the new command.
3.4.2.2 BAT Completion Code (Hex AA)
Following satisfactory completion of the BAT, the keyboard sends hex AA. Any
other code indicates a failure of the keyboard.
3.4.2.3 BAT Failure Code (Hex FC)
If a BAT failure occurs, the keyboard sends this code, discontinues scanning and
waits for a system response or reset.
3.4.2.4 Echo (Hex EE)
The keyboard sends this code in response to an Echo command.
3.4.2.5 Keyboard ID (Hex 83AB)
The Keyboard ID consists of 2 bytes, hex 83AB. The keyboard responds to the Read
ID with ACK, discontinues scanning, and sends the 2 ID bytes. The low byte is sent
first followed by the high byte. Following output of Keyboard ID, the keyboard
begins scanning.
3.4.2.6 Key Detection Error (Hex 00 or FF)
The keyboard sends a key detection error character if conditions in the keyboard
make it impossible to identify a switch closure. If the keyboard is using scan code
set 1, the code is hex FF. For sets 2 and 3, the code is hex 00.
3.4.2.7 Overrun (Hex 00 or FF)
An overrun character is placed in the keyboard buffer and replaces the last code
when the buffer capacity has been exceeded. The code is sent to the system when
it reaches the top of the buffer queue. If the keyboard is using scan code set 1, the
code is hex FF. For sets 2 and 3, the code is hex 00.
3.4.2.8 Resend (Hex FE)
The keyboard issues a Resend command following receipt of an invalid input or any
input with incorrect parity. If the system sends nothing to the keyboard, no response
is required.
Page 24 von 32
Rev: 01
3.5 KEYCODES
101 keys (US)
110 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126
1 2 3 4 5 6 7 8 9 10 11 12 13 15 75 80 85 90 95 100 105
16 17 18 19 20 21 22 23 24 25 26 27 28 29 76 81 86 91 96 101 106
30 31 32 33 34 35 36 37 38 39 40 41 43 92 97 102
44 46 47 48 49 50 51 52 53 54 55 57 83 93 98 103 108
58 60 61 62 64 79 84 89 99 104
102 keys (EUROPE)
110 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126
1 2 3 4 5 6 7 8 9 10 11 12 13 15 75 80 85 90 95 100 105
16 17 18 19 20 21 22 23 24 25 26 27 28 43 76 81 86 91 96 101 106
30 31 32 33 34 35 36 37 38 39 40 41 42 92 97 102
44 45 46 47 48 49 50 51 52 53 54 55 57 83 93 98 103 108
58 60 61 62 64 79 84 89 99 104
104 keys (US)
110 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126
1 2 3 4 5 6 7 8 9 10 11 12 13 15 75 80 85 90 95 100 105
16 17 18 19 20 21 22 23 24 25 26 27 28 29 76 81 86 91 96 101 106
30 31 32 33 34 35 36 37 38 39 40 41 43 92 97 102
44 46 47 48 49 50 51 52 53 54 55 57 83 93 98 103 108
58 59 60 61 62 63 65 64 79 84 89 99 104
105 keys (EUROPE)
110 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126
1 2 3 4 5 6 7 8 9 10 11 12 13 15 75 80 85 90 95 100 105
16 17 18 19 20 21 22 23 24 25 26 27 28 43 76 81 86 91 96 101 106
30 31 32 33 34 35 36 37 38 39 40 41 432 92 97 102
44 45 46 47 48 49 50 51 52 53 54 55 57 83 93 98 103 108
58 59 60 61 62 63 65 64 79 84 89 99 104
Page 25 von 32
Rev: 01
3.5.2 Codetable
Key number Set 1 Set 2 Set 3

1 29 0E 0E T
2 02 16 16 T
3 03 1E 1E T
4 04 26 26 T
5 05 25 25 T
6 06 2E 2E T
7 07 36 36 T
8 08 3D 3D T
9 09 3E 3E T
10 0A 46 46 T
11 0B 45 45 T
12 0C 4E 4E T
13 0D 55 55 T
15 0E 66 66 T
16 0F 0D 0D T
17 10 15 15 T
18 11 1D 1D T
19 12 24 24 T
20 13 2D 2D T
21 14 2C 2C T
22 15 35 35 T
23 16 3C 3C T
24 17 43 43 T
25 18 44 44 T
26 19 4D 4D T
27 1A 54 54 T
28 1B 5B 5B T
29 2B 5D 5C T
30 3A 58 14 MB
31 1E 1C 1C T
32 1F 1B 1B T
33 20 23 23 T
34 21 2B 2B T
35 22 34 34 T
36 23 33 33 T
37 24 3B 3B T
38 25 42 42 T
39 26 4B 4B T
40 27 4C 4C T
41 28 52 52 T
42 2B 5D 53 T
43 1C 5A 5A T
44 2A 12 12 MB
45 56 61 13 T
46 2C 1A 1A T
Page 26 von 32
Rev: 01
47 2D 22 22 T
48 2E 21 21 T
49 2F 2A 2A T
50 30 32 32 T
51 31 31 31 T
52 32 3A 3A T
53 33 41 41 T
54 34 49 49 T
55 35 4A 4A T
57 36 59 59 MB
58 1D 14 11 MB
59 E0 5B E0 1F 8B MB
60 38 11 19 MB
61 39 29 29 T
62 E0/38 E0/11 39 M
63 E0 5C E0 27 8C MB
64 E0/1D E0/14 58 M
65 E0 5D E0 2F 8D MB
75 see app. 1 67 M
76 see app. 1 64 T
79 see app. 1 61 T
80 see app. 1 6E M
81 see app. 1 65 M
83 see app. 1 63 T
84 see app. 1 60 T
85 see app. 1 6F M
86 see app. 1 6D M
89 see app. 1 6A T
90 45 77 76 M
91 47 6C 6C M
92 4B 6B 6B M
93 4F 69 69 M
95 see app. 1 77 M
96 48 75 75 M
97 4C 73 73 M
98 50 72 72 M
99 52 70 70 M
100 37 7C 7E M
101 49 7D 7D M
102 4D 74 74 M
103 51 7A 7A M
104 53 71 71 M
105 4A 7B 84 M
106 4E 79 7C T
108 E0/1C E0/5A 79 M
110 01 76 08 M
112 3B 05 07 M
113 3C 06 0F M
114 3D 04 17 M
115 3E 0C 1F M
Page 27 von 32
Rev: 01
116 3F 03 27 M
117 40 0B 2F M
118 41 83 37 M
119 42 0A 3F M
120 43 01 47 M
121 44 09 4F M
122 57 78 56 M
123 58 07 5E M

124 see app. 1 57 M
125 46 7E 5F M
126 see app. 1 62 M
Key Type Default: M = Make only

T = Typematic
MB = Make-Break
Key- Base Case, or Shift + Shift Case Num Lock on

number Num Lock Make/Break * Make/Break
Make/Break
75 E0 52 E0 AA E0 52 E0 2A E0 52
/E0 D2 /E0 D2 E0 2A /E0 D2 E0 AA
76 E0 53 E0 AA E0 53 E0 2A E0 53
/E0 D3 /E0 D3 E0 2A /E0 D3 E0 AA
79 E0 4B E0 AA E0 4B E0 2A E0 4B
/E0 CB /E0 CB E0 2A /E0 CB E0 AA
80 E0 47 E0 AA E0 47 E0 2A E0 47
/E0 C7 /E0 C7 E0 2A /E0 C7 E0 AA
81 E0 4F E0 AA E0 4F E0 2A E0 4F
/E0 CF /E0 CF E0 2A /E0 C7 E0 AA
83 E0 48 E0 AA E0 48 E0 2A E0 48
/E0 C8 /E0 C8 E0 2A /E0 C8 E0 AA
84 E0 50 E0 AA E0 50 E0 2A E0 50
/E0 D0 /E0 D0 E0 2A /E0 D0 E0 AA
85 E0 49 E0 AA E0 49 E0 2A E0 49
/E0 C9 /E0 C9 E0 2A /E0 C9 E0 AA
86 E0 51 E0 AA E0 51 E0 2A E0 51
/E0 D1 /E0 D1 E0 2A /E0 D1 E0 AA
89 E0 4D E0 AA E0 4D E0 2A E0 4D
/E0 CD /E0 CD E0 2A /E0 CD E0 AA
Scan Code Ctrl Case, Shift Case Alt Case

Make / Break Make / Break Make / Break
124 E0 2A E0 37 E0 37 / E0 B7 54 / D4
/E0 B7 E0 AA
Page 28 von 32
Rev: 01
Make Code Ctrl Key pressed
126 E1 1D 45 E1 9D C5 E0 46 E0 C6
This key is not typematic. All associated scan codes

occur on the make of the key
Scan Code Make/Break Shift Case Make / Break*

95 E0 35 / E0 B5 E0 AA E0 35 / E0 B5 E0 2A
* If the left Shift key is held down, the F0 AA/2A shift make and break
is sent with the other scan codes. If the right Shift key is held
down, B6/36 is sent. If both Shift Keys are down, both sets of
codes are sent with the other scan codes.
3.5.2.1 Appendix 1 for Set 2

Make/Break
75 E0 70 E0 F0 12 E0 70 E0 12 E0 70
/E0 F0 70 /E0 F0 70 E0 12 /E0 F0 70 E0 F0
12
76 E0 71 E0 F0 12 E0 71 E0 12 E0 71
/E0 F0 71 /E0 F0 71 E0 12 /E0 F0 71 E0 F0
12
79 E0 6B E0 F0 12 E0 6B E0 12 E0 6B
/E0 F0 6B /E0 F0 6B E0 12 /E0 F0 6B E0 F0
12
80 E0 6C E0 F0 12 E0 6C E0 12 E0 6C
/E0 F0 6C /E0 F0 6C E0 12 /E0 F0 6C E0 F0
12
81 E0 69 E0 F0 12 E0 69 E0 12 E0 69
/E0 F0 69 /E0 F0 69 E0 12 /E0 F0 69 E0 F0
12
83 E0 75 E0 F0 12 E0 75 E0 12 E0 75
/E0 F0 75 /E0 F0 75 E0 12 /E0 F0 75 E0 F0
12
84 E0 72 E0 F0 12 E0 72 E0 12 E0 72
/E0 F0 72 /E0 F0 72 E0 12 /E0 F0 72 E0 F0
12
Page 29 von 32
Rev: 01

Make/Break
85 E0 7D E0 F0 12 E0 7D E0 12 E0 7D
/E0 F0 7D /E0 F0 7D E0 12 /E0 F0 7D E0 F0
12
86 E0 7A E0 F0 12 E0 7A E0 12 E0 7A
/E0 F0 7A /E0 F0 7A E0 12 /E0 F0 7A E0 F0
12
89 E0 74 E0 F0 12 E0 74 E0 12 E0 74
/E0 F0 74 /E0 F0 74 E0 12 /E0 F0 74 E0 F0
12
Scan Code Ctrl Case, Shift Case Alt Case

Make / Break Make / Break Make / Break
124 E0 12 E0 7C E0 7C / E0 F0 7C 84 / F0 84
/E0 F0 7C E0 F0 12
Make Code Ctrl Key pressed

126 E1 14 77 E1 F0 14 F0 77 E0 7E E0 F0 7E
This key is not typematic. All associated scan codes

occur on the make of the key
Scan Code Make/Break Shift Case Make / Break*

95 E0 4A / E0 F0 4A E0 F0 12 E0 4A / E0 F0 4A E0
12
* If the left Shift key is held down, the F0 12/12 shift make and break
is sent with the other scan codes. If the right Shift key is held
down, F0 59/59 is sent. If both Shift Keys are down, both sets of
codes are sent with the other scan codes.
3.6 CABLE DRAWING
3.6.1 Uncoiled cable with DIN-connector
Drawing 617-1284
3.6.2 Uncoiled cable with min-DIN-connector
Drawing 617-1300
3.6.3 Coiled cable with DIN-connector
Drawing 617-1301
Page 30 von 32
Rev: 01
3.6.5 Coiled cable with DIN-connector
Drawing 617-1302
3.7 Circuit diagram
Drawing 620-0818
4.0. ENVIRONMENTAL CONDITIONS
4.1. Temperature
4.1.1. Operation: 0 to 50 C
4.1.2. Storage: -20 to + 60 C
4.1.3. Transporation: -20 to + 65 C
4.2. Humidity
4.2.1. Operation: 10 to 85 % r.h. non-condensing
4.2.2. Storage: 10 to 95 % r.h. non-condensing
4.2.3. Transport: 10 to 95 % r.h. non-condensing
4.3. Climate
4.3.1. Operation: DIN IEC 721-3 class 3K3 40 C, 85% r.h.
(corresponding to a dew point at plus 37 C)
4.4. Vibration
4.4.1. Operation: 10 to 22,5 Hz: displacement 0,25 mm (peak to peak)
22,5 to 300Hz: acceleration 0,25 g peak
4.4.2. Storage and transport (in original packaging):
10 to 16 Hz: displacement 3 mm (peak to peak)
16 to 500 Hz: acceleration 1,5 g
4.5. Shock
4.5.1. Operation: acceleration: 10 g for duration of 16 ms (halfsine wave)
4.5.2. Storage: acceleration: 25 g for duration of 6 ms (halfsine wave)
4.6. Drop resistance

4.6.1. Operation bench test to bottom side: height of 50 mm
(pitch of 30 degrees)
4.6.2. Storage and transport (in original packaging):
free fall from height of 70 cm
4.7. Altitude
4.7.1. Operation: height of 2,4 km (8000 feet), equivalent to 665 mbars
4.7.2. Storage: height of 9,1 km (30.000 feet), equivalent to 280 mbars
Page 31 von 32
Rev: 01
5.0. ELECTROMANGNETIC COMPATIBILITY
5.1. RFI/EMI
FCC part 15, subpart B, Class B (margin 6dB)
EN 55022 class B (margin 6dB)
5.2. ESD susceptibility (IEC 801-2)

- Insulation (housing): 8kV air discharge (Level 3)
- Key area: 15 kV air discharge (Level 4)
- Indirect discharge:
* discharge to horizontal couplin plane: 4 kV contact discharge (Level 2)
15 kV air discharge (Level 4)
* discharge to PC-housing: 4 kV contact discharge (Level 2)

8 kV air discharge (Level 3)
5.3. Immunity to radiated fields (IEC 801-3)

10 V/m (level 3)
5.4. Burst immunity (IEC 801-4)

capacitiv coupling into keyboard cable: +/- 300V
6. RELIABILITY
6.1. MCBF
10 9 actuations
6.2. MTBF
6.2.1. Electronics: 1.000.000 h
6.2.2. Keyboard: 100.000 h
7.0. APPROVALS
UL 1950
CSA C22.2 No. 950
FCC Part 15, subpart B, class B
VDE/GS
CE certification
Novell Unix Ware
Novell Net Ware
Page 32 von 32
Rev: 01
8.0. EC CONFORMITY FOR CE-MARK
8.1. Safety: EN 60950

according Low Voltage Directive 73/23/EEC
8.2. Electro-magnetic Compatibility (EMC)

according EMC Directive 89/33/EEC
8.2.1. RFI: EN 55022: 1987 Class B

8.2.2. Susceptibility according EN 50082-1: 1992
8.2.2.1. ESD: IEC 801-2 (1991) Level 2
(indirect discharge)
8.2.2.2. Radiated fields: IEC 801-3 (1994): Level 2
End of list
Time and Standard Frequency Station DCF77 (Germany)
DCF77 Time and Standard Frequency Station

located in Central Europe
This is just a local copy of a document translation carried out by Peter Lamb, July 1993.
It has been slightly modified and shorted to provide a compact document.
To view the original document, please have a look at http://www.eecis.udel.edu/~mills/ntp/dcf77.html
Another convenient source of DCF77 information is http://www.hw-server.com/docs/dcf/dcf.html
Abstract
DCF77 is a long-wave radio transmitter at 77.5 kHz for precise time information. It is located near Frankfurt,
Germany in Central Europe and available across most of Europe. It serves as exact time source for a lot of
applications, starting from simple radio clocks and numerous public clocks (including churchs) up to demanding
scientific experiments.
Translation
Original in German available from the address below.
Translation errors courtesy of Peter Lamb,
Swiss Federal Institute of Technology, Zurich, Switzerland
July 1993
Physikalisch-Technische Bundesanstalt (PTB) Braunschweig

Lab 1.21
Bundesallee 100
D-3300 Braunschweig
Germany
February 1984
Legal basis and responsibility for the transmissions of DCF77:

--------------------------------------------------------------
The 1978 law on time standards defines legal time in Germany on the
basis of Coordinated World Time (UTC) and gives the PTB responsibility
for the keeping and broadcasting of legal time. As well as this, the
time standards law empowers the Federal government to issue regulations
for the introduction of Summer Time.
http://www.electronic-engineering.ch/microchip/datasheets/dcf77/dcf77.html (1 of 6)12/02/2008 17:31:54

Legal time in the FRG is either Middle European Time (MEZ - German
abbreviation) or, in case of its introduction Middle European Summer
Time (MESZ). The following relationships hold between UTC and MEZ and
MESZ.
MEZ(D) = UTC(PTB) + 1h
MESZ(D) = UTC(PTB) + 2h
Legal time is generated in the PTB Atomic Clock Building in Braunschweig

and it is broadcast mainly through the LF transmitter DCF77 which the
PTB rents from the German Post Office (DBP). The PTB has sole
responsibility for the control of DCF77, while the DBP has
responsibility for the transmitter and antennas. Queries should be
directed to the above address or by telephone to 0531/592 1212 or
0531/592 1210, or by telex to 952822 ptb d.
DCF77 Specifications:
---------------------
Location: Mainflingen transmitter complex, (50:01 N, 09:00 E),

about 25km south-east of Frankfurt a. Main, Germany.
Carrier Frequency: Standard frequency 77.5kHZ, derived from the PTB

atomic clocks. Relative deviation of the carrier from
specifications:
averaged over 1d: <1e-12

The carrier phase is controlled so that deviations

relative to UTC(PTB) are never greater than +-0.3us.
Larger phase and frequency variation observed at the
receiver are due to summation of ground and space waves.
Power output: Transmitter power 50kw, estimated emitted power approx.

25kW.
Antenna: 150m high (backup antenna 200m high) vertical

omnidirectional antenna with top capacitance.
Transmission times: 24-hour continuous service. Short interruptions (of

a few minutes) are possible if, because of technical
problems or servicing, the service must be switched to a
backup transmitter or antenna. Thunderstorms can cause

longer interruptions to the service.
Time signal: The carrier is amplitude-modulated with second marks. At

the beginning of each second (with the exception of the
59th second of each minute), the carrier amplitude is
reduced to 25% for the duration of either 0.1 or 0.2
seconds. The start of the carrier reduction marks the
precise beginning of the second. The minute is marked by
the absence of the previous second mark.
The second marks are phase-synchronous with the carrier.

There is a relatively large uncertainty possible in the
time of the second mark which depends on the receiver
position. The causes are the relatively low bandwidth of
the antenna, space wave and other interference sources.
Despite this, it is possible to achieve accuracy better
than 1ms at distances of several hundred kilometers.
Time code: The transmission of the numerical values for minute,

hour, day, weekday, month and year are BCD-encoded
through the pulse duration modulation of the second
marks. A second mark with duration 0.1s encodes a binary
0 and a duration of 0.2s encodes 1. The order of encoding
is shown in the following diagram [replaced by a table in
this translation]. The three test bits P1, P2 and P3
extend the 3 major sections of the time code (7 bits for
minutes, 6 bits for the hour and 22 bits for the date,
including the week day number) to maintain an even count
of 1's.
The second marks No. 17 and 18 indicate the time system
for the transmitted time codes. In the case of
transmission of MEZ, mark 18 has a duration of 0.2s and
mark 17 a duration of 0.1s. If MESZ is being transmitted,
this is reversed. Furthermore, an approaching transition
from MEZ to MESZ or back is announced by extending mark
16 from 0.1s to 0.2s for one hour prior to the changeover.
Encoding Scheme:
----------------
Encoding as follows: Pulse of 0.1s = 0, 0.2s = 1

Numbers are encoded in BCD (binary coded decimal)
Mark number(s)
0 Minute, always 0 (0.1s)

1-14 Reserved, always 0
15 Antenna (0b normal antenna, 1b backup antenna)
16 Time zone change announcement, 1 hour ahead

(0b nothing, 1b change)
17,18 Time zone, difference in hours against UTC

(00b = +0h, 01b = +1h = CET, 10b = +2h = CEST, 11b = +3h)
19 Leap second announcement. The leap second is encoded in

this bit one hour prior to occurrence. (0b nothing, 1b change)
20 Start bit for encoded time, always 1
21-27 1, 2, 4, 8, 10, 20, 40 minutes (mark 21 = 1 minute)
28 P1 maintains even parity for marks 21-28
29-34 1, 2, 4, 8, 10, 20 hours (mark 29 = 1 hour)
36-41 Day in month (1, 2, 4, 8, 10, 20)
42-44 Day in week (1, 2, 4)
45-49 Month number (1, 2, 4, 8, 10)
50-57 Year (1, 2, 4, 8, 10, 20, 40, 80)
58 P3 maintains even parity for marks 36-58. There is no mark

transmitted for the 59th second.
59 Normally, this bit is not transmitted (space until bit 0,

minute mark). It is transmitted only when there is a leap
second (inserted twice per 3 years, last minute of June
or December).
Announcement bit for a leap second:

-----------------------------------
The DCF77 control unit is currently being modified so that in future an

announcement bit for a leap second can be sent. It is expected that for
the first time on 1st July 1985 the second mark No. 19 will be extended

to a length of 0.2s for one hour prior to the introduction of a leap

second. Intelligent receivers will then be able to recognize the
discontinuity and maintain correct indicated time in spite of a 61s
minute.
Additional information:
-----------------------
Since July 1983, the DCF77 carrier has been phase modulated in a test
configuration. The phase modulation is a pseudorandom binary sequence
sent twice each second. The clock frequency of the binary sequence is
645.833...Hz and the phase shift \Delta\tau about 3% of the period
(\^{=} 10\deg). Equal numbers of shifts of +\Delta\tau and -\Delta\tau
are always sent, so that the mean frequency remains unchanged, and the
use of DCF77 as a frequency standard is unaffected. The timecode is
encoded in the sequence by inverting the sequence or not. Not inverted
sequence corresponds to a 0 bit. The sequence is alleged to be generated
by a 9 bit shift register which is coupled back on positions 5 and 9.
The polynomial might be: x^9 + x^4 + 1.
Because the pseudo-random bitstring has a strictly deterministic nature,

the correlation analysis at the receiver end leads to a correlation
function with triangular form, and thereby to timing information. Early
test results show that the time information received with the help of
pseudo-random phase modulation is more resistant to interference and
more accurate (standard deviation approx. 10 mu s during the day and
approx. 25 mu s at night) than the conventional method using amplitude
modulated second marks. Since this new modulation method is compatible
with previous usage of DCF77, and that the users have made no
difficulties known to us, the tests have been extended. The transmission
of the pseudo-random phase distortion still has experimental status, and
should not be seen as a permanent commitment. Further information will
be made available in the future.
Literature:
-----------
P. Hetzel, "Die Zeitsignal- und Normalfrequenzaussendungen der PTB ueber

den Sender DCF77: Stand 1982" [The PTB time signal and standard
frequency transmissions from DCF77: Status 1982] in "Funkuhren" [Radio
clocks], W. Hilberg, Oldenburg Publishers, Munich & Vienna 1983, pp 42-
57.
G Becker & P. Hetzel, "Vortraege ueber DCF77" [Lectures: DCF77], PTB

Reports, PTB-Me-23 (1979), pp 185-253. Braunschweig 1984


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SEMICONDUCTOR TECHNICAL DATA by MPX4100A/D

#!# !""$! "!
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!# INTEGRATED
PRESSURE SENSOR
The Motorola MPX4100A/MPXA4100A series Manifold Absolute Pressure (MAP) 15 to 115 kPa (2.2 to 16.7 psi)
sensor for engine control is designed to sense absolute air pressure within the intake 0.2 to 4.8 Volts Output
manifold. This measurement can be used to compute the amount of fuel required for each
cylinder. The small form factor and high reliability of onchip integration makes the
Motorola MAP sensor a logical and economical choice for automotive system designers.
The MPX4100A/MPXA4100A series piezoresistive transducer is a stateoftheart, UNIBODY PACKAGE
monolithic, signal conditioned, silicon pressure sensor. This sensor combines advanced
micromachining techniques, thin film metallization, and bipolar semiconductor processing
to provide an accurate, high level analog output signal that is proportional to applied
pressure.
Figure 1 shows a block diagram of the internal circuitry integrated on a pressure
sensor chip.
MPX4100A
Features CASE 867
1.8% Maximum Error Over 0 to 85C
Specifically Designed for Intake Manifold Absolute
Pressure Sensing in Engine Control Systems
Temperature Compensated Over 40C to +125C
Durable Epoxy Unibody Element or Thermoplastic SMALL OUTLINE PACKAGE
(PPS) Surface Mount Package
Application Examples
Manifold Sensing for Automotive Systems
Ideally suited for Microprocessor or Microcontroller
Based Systems MPX4100AP
MPXA4100A6U CASE 867B
Also Ideal for NonAutomotive Applications
CASE 482
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PIN NUMBER PIN NUMBER

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4 Vout 8 N/C NOTE: Pins 4, 5, and 6 are internal
Figure 1. Fully Integrated Pressure Sensor device connections. Do not connect
Schematic NOTE: Pins 1, 5, 6, 7, and 8 are
to external circuitry or ground. Pin 1
internal device connections. Do not
is noted by the notch in the lead.
connect to external circuitry or
ground. Pin 1 is noted by the notch in
REV 5 the lead.
Motorola
Motorola, Inc.Sensor
2001 Device Data 1

MAXIMUM RATINGS(NOTE)
Parametrics Symbol Value Units
Maximum Pressure (P1 P2) Pmax 400 kPa
Storage Temperature Tstg 40 to +125 C
Operating Temperature TA 40 to +125 C
NOTE: Exposure beyond the specified limits may cause permanent damage or degradation to the device.
OPERATING CHARACTERISTICS (VS = 5.1 Vdc, TA = 25C unless otherwise noted, P1 > P2. Decoupling circuit shown in Figure 3
required to meet electrical specifications.)
Characteristic Symbol Min Typ Max Unit
Pressure Range(1) POP 20 105 kPa
Supply Voltage(2) VS 4.85 5.1 5.35 Vdc
Supply Current Io 7.0 10 mAdc
Minimum Pressure Offset(3) (0 to 85C) Voff 0.225 0.306 0.388 Vdc
@ VS = 5.1 Volts
Full Scale Output(4) (0 to 85C) VFSO 4.870 4.951 5.032 Vdc
@ VS = 5.1 Volts
Full Scale Span(5) (0 to 85C) VFSS 4.59 Vdc
@ VS = 5.1 Volts
Accuracy(6) (0 to 85C) 1.8 %VFSS
Sensitivity V/P 54 mV/kPa
Response Time(7) tR 1.0 ms
Output Source Current at Full Scale Output Io+ 0.1 mAdc
WarmUp Time(8) 20 ms
Offset Stability(9) 0.5 %VFSS
NOTES:
1. 1.0 kPa (kiloPascal) equals 0.145 psi.
2. Device is ratiometric within this specified excitation range.
3. Offset (Voff) is defined as the output voltage at the minimum rated pressure.
4. Full Scale Output (VFSO) is defined as the output voltage at the maximum or full rated pressure.
5. Full Scale Span (VFSS) is defined as the algebraic difference between the output voltage at full rated pressure and the output voltage at the
minimum rated pressure.
6. Accuracy (error budget) consists of the following:
Linearity: Output deviation from a straight line relationship with pressure over the specified pressure range.
Temperature Hysteresis: Output deviation at any temperature within the operating temperature range, after the temperature is
cycled to and from the minimum or maximum operating temperature points, with zero differential pressure
applied.
Pressure Hysteresis: Output deviation at any pressure within the specified range, when this pressure is cycled to and from the
minimum or maximum rated pressure, at 25C.
TcSpan: Output deviation over the temperature range of 0 to 85C, relative to 25C.
TcOffset: Output deviation with minimum rated pressure applied, over the temperature range of 0 to 85C, relative to
25C.
Variation from Nominal: The variation from nominal values, for Offset or Full Scale Span, as a percent of VFSS, at 25C.
7. Response Time is defined as the time for the incremental change in the output to go from 10% to 90% of its final value when subjected to
a specified step change in pressure.
8. Warmup Time is defined as the time required for the product to meet the specified output voltage after the Pressure has been stabilized.
9. Offset Stability is the products output deviation when subjected to 1000 hours of Pulsed Pressure, Temperature Cycling with Bias Test.
MECHANICAL CHARACTERISTICS
Characteristics Typ Unit
Weight, Basic Element (Case 867) 4.0 grams
Weight, Small Outline Package (Case 482) 1.5 grams
2 Motorola Sensor Device Data

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Figure 2. Cross Sectional Diagram SOP Figure 3. Recommended power supply decoupling
(not to scale) and output filtering.
For additional output filtering, please refer to
Application Note AN1646.
Figure 2 illustrates the absolute sensing chip in the basic Figure 3 shows the recommended decoupling circuit for
chip carrier (Case 482). interfacing the output of the integrated sensor to the A/D in-
put of a microprocessor or microcontroller. Proper decoup-
ling of the power supply is recommended.
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Figure 4 shows the sensor output signal relative to pres- MPX4100A/MPXA4100A series pressure sensor operat-
sure input. Typical, minimum, and maximum output curves ing characteristics, and internal reliability and qualification
are shown for operation over a temperature range of 0 to tests are based on use of dry air as the pressure media.
85C. The output will saturate outside of the specified pres- Media, other than dry air, may have adverse effects on
sure range. sensor performance and longterm reliability. Contact the
A fluorosilicone gel isolates the die surface and wire factory for information regarding media compatibility in
bonds from the environment, while allowing the pressure your application.
signal to be transmitted to the sensor diaphragm. The
Motorola Sensor Device Data 3

Transfer Function (MPX4100A, MPXA4100A)
Nominal Transfer Value: Vout = VS (P x 0.01059 0.1518)
+/ (Pressure Error x Temp. Factor x 0.01059 x VS)
VS = 5.1 V 0.25 Vdc
Temperature Error Band

MPX4100A, MPXA4100A Series
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Pressure Error Band

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PRESSURE (P1)/VACUUM (P2) SIDE IDENTIFICATION TABLE
Motorola designates the two sides of the pressure sensor pressure sensor is designed to operate with positive differen-
as the Pressure (P1) side and the Vacuum (P2) side. The tial pressure applied, P1 > P2.
Pressure (P1) side is the side containing fluorosilicone gel The Pressure (P1) side may be identified by using the table
which protects the die from harsh media. The Motorola MPX below:
Pressure (P1)
Part Number Case Type Side Identifier
MPX4100A 867 Stainless Steel Cap
MPX4100AP 867B Side with Port Marking
MPX4100AS 867E Side with Port Attached
MPXA4100A6U/T1 482 Stainless Steel Cap
MPXA4100AC6U 482A Side with Port Attached
ORDERING INFORMATION UNIBODY PACKAGE

MPX Series
Device Type Options Case Type Order Number Device Marking

Basic Element Absolute, Element Only 867 MPX4100A MPX4100A
Ported Elements Absolute, Ported 867B MPX4100AP MPX4100AP
Absolute, Stove Pipe Port 867E MPX4100AS MPX4100A
ORDERING INFORMATION SMALL OUTLINE PACKAGE

Device Type Options Case No. MPX Series Order No. Packing Options Marking
Basic Element Absolute, Element Only 482 MPXA4100A6U Rails MPXA4100A
Absolute, Element Only 482 MPXA4100A6T1 Tape and Reel MPXA4100A
Ported Element Absolute, Axial Port 482A MPXA4100AC6U Rails MPXA4100A

INFORMATION FOR USING THE SMALL OUTLINE PACKAGE (CASE 482)
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the total footprint, the packages will self align when subjected to a
design. The footprint for the surface mount packages must solder reflow process. It is always recommended to design
be the correct size to ensure proper solder connection inter- boards with a solder mask layer to avoid bridging and short-
face between the board and the package. With the correct ing between solder pads.
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UNIBODY PACKAGE DIMENSIONS
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Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or
guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental
damages. Typical parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application
by customers technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are
not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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HOME PAGE: http://www.motorola.com/semiconductors/

MPX4100A/D
Sensors
Quarter 4, 2005
SG1010Q42005 Rev 0
About This RevisionQ4/2005
When new products are introduced, a summary of the new products will be provided in this section. However, the New Product section will only appear on this page when new
products have been introduced during the quarter.
In addition, a change bar appears in the left margin of every page in this selector guide that contains new or revised information.
If products are discontinued, a What's EOL? page is included at the end of this guide. The What's EOL? page lists end-of-life products along with their respective last order date, last
ship date, and suggested possible replacement information.
NEW PRODUCT
New Product Page Number Description
MPVZ5010 SG101014 Integrated pressure sensor designed with a robust axial port
MPXHZ6250A SG1010-14 Media resistant and high temperature accuracy integrated pressure sensor
MPXHZ6400A SG1010-14 Media resistant and high temperature accuracy integrated pressure sensor
SG10102
SG1010Q42005
ACCELERATION SENSORS
Low g Acceleration Sensors
Product Acceleration Sensing Axis Sensitivity Rolloff Frequency VDD Zero g Output Packaging
(g) (mV/g) (Hz) Supply Voltage (Typ) (V)
(Typ) (V)
MMA7260Q 1.5/2/4/6 XYZ 800/600/300/200 350/150 3.3 1.65 16-pin QFN
MMA6260Q 1.5/1.5 X-Y 800/800 50 3.3 1.65 16-pin QFN
MMA6261Q 1.5/1.5 X-Y 800/800 300 3.3 1.65 16-pin QFN
MMA6262Q 1.5/1.5 X-Y 800/800 150 3.3 1.65 16-pin QFN
MMA6263Q 1.5/1.5 X-Y 800/800 900 3.3 1.65 16-pin QFN
MMA2260D 1.5 X 1200 50 5.0 2.5 16-pin SOIC
MMA1260D 1.5 Z 1200 50 5.0 2.5 16-pin SOIC
MMA1270D 2.5 Z 750 50 5.0 2.5 16-pin SOIC
MMA1250D 5.0 Z 400 50 5.0 2.5 16-pin SOIC
MMA1220D 8.0 Z 250 250 5.0 2.5 16-pin SOIC
MMA6231Q 10/10 X-Y 120/120 300 3.3 1.65 16-pin QFN
MMA6233Q 10/10 X-Y 120/120 900 3.3 1.65 16-pin QFN
Medium g Acceleration Sensors

(Typ) (V)
MMA3201D 40/40 X-Y 50/50 400 5.0 2.5 20-pin SOIC
MMA2201D 40 X 50 400 5.0 2.5 16-pin SOIC
MMA2202D 50 X 40 400 5.0 2.5 16-pin SOIC
MMA3222D 50/30 X-Y 40/66.67 400 5.0 2.5 20-pin SOIC
MMA3204D 100/30 X-Y 20/66.67 400 5.0 2.5 20-pin SOIC
MMA3202D 100/50 X-Y 50/100 400 5.0 2.5 20-pin SOIC
MMA2204D 100 X 20 400 5.0 2.5 16-pin SOIC
MMA1213D 50 Z 40 400 5.0 2.5 16-pin SOIC
MMA1210D 100 Z 20 400 5.0 2.5 16-pin SOIC
SG10103
SG1010Q42005
ACCELERATION SENSORS (continued)

High g Acceleration Sensors
(Typ) (V)
MMA1211D 150 Z 13 400 5.0 2.5 16-pin SOIC
MMA2301D 200 X 10 400 5.0 2.5 16-pin SOIC
MMA1212D 200 Z 10 400 5.0 2.5 16-pin SOIC
MMA2300D 250 X 8.0 400 5.0 2.5 16-pin SOIC
MMA1200D 250 Z 8.0 400 5.0 2.5 16-pin SOIC
SG10104
SG1010Q42005
PRESSURE SENSORS
Integrated Pressure Sensors
Product Family Pressure Rating Pressure Rating Pressure Rating Pressure Rating Pressure Rating Over Pressure Full Scale Sensitivity Accuracy Pressure Type Note
Maximum Maximum Maximum Maximum Maximum (kPa) Span (mV/kPa) 0C to 85C
(PSI) (kPa) (in H2O) (cm H2O) (mm Hg) (Typ) (% of VFSS) A D G V
(Vdc)
MPX4080 11.6 80 321 815 600 400 4.3 54 3.0
MPX4100 15.2 105 422 1070 788 400 4.6 54 1.8
MPX4101 14.8 102 410 1040 765 400 4.6 54 1.8
MPXH6101 14.8 102 410 1040 765 400 4.6 54 1.8
MPX4105 15.2 105 422 1070 788 400 4.6 51 1.8
MPX4115 16.7 115 462 1174 863 400 4.6 46 1.5
16.7 115 462 1174 863 400 4.0 38 1.5
MPX6115 16.7 115 462 1174 863 400 4.6 46 1.5
MPX4200 29 200 803 2040 1500 400 4.6 26 1.5
MPX4250 36 250 1000 2550 1880 400 4.7 20 1.5
36 250 1000 2550 1880 400 4.7 19 1.4
MPXH6250 36 250 1000 2550 1880 400 4.7 19 1.5
MPXV4006 0.87 6.0 24 61 45 10 4.6 766 5.0
MPXV5004 0.57 4.0 16 40 29 10 3.9 1000 2.5
MPX5010 1.45 10 40 102 75 75 4.5 450 5.0
MPX5050 7.25 50 201 510 375 200 4.5 90 2.5
MPX5100 14.5 100 401 1020 750 400 4.5 45 2.5
16.7 115 462 1174 863 400 4.5 45 2.5
MPX5500 72.5 500 2000 5100 3750 2000 4.5 9.0 2.5
MPX5700 102 700 2810 7140 5250 2800 4.5 6.0 2.5
MPX5999 150 1000 4150 10546 7757 4000 4.5 5.0 2.5
MPXH6300 44 300 1200 3060 2250 400 4.7 16 1.8
MPXH6400 60 400 1600 4000 3000 500 4.7 12 1.5
MPXV7007 1.0 7 28 70 53 75 4.0 286 5.0
MPXV7025 3.5 25 100 254 190 90 4.5 90 5.0
Note: A = Absolute, D = Differential, G = Gauge, V = Vacuum

= Available
SG10105
SG1010Q42005
PRESSURE SENSORS
PRESSURE SENSORS
PRESSURE SENSORS (continued)

Compensated Pressure Sensors
Product Family Pressure Pressure Pressure Pressure Pressure Over Offset Full Scale Span Sensitivity Linearity Linearity Pressure Type Note
Rating Rating Rating Rating Rating Pressure (mV) (Typ) (mV/kPa) Minimum Maximum
Maximum Maximum Maximum Maximum Maximum (kPa) (mV) (% of VFSS) (% of VFSS) A D G V
(PSI) (kPa) (in H2O) (cm H2O) (mm Hg)
MPX2010 1.45 10 40 102 75 75 1.0 25 2.5 -1.0 1.0
MPX2053 7.0 50 201 510 375 200 1.0 40 0.8 -0.6 0.4
MPX2102 14.5 100 400 1020 750 200 2.0 40 0.4 -1.0 1.0
14.5 100 400 750 200 1.0 40 0.4 -0.6 0.4
MPX2202 29 200 800 2040 1500 400 1.0 40 0.2 -1.0 1.0
29 200 800 1500 400 1.0 40 0.2 -0.6 0.4
MPX2050 7.0 50 201 510 375 200 1.0 40 0.8 -0.3 -0.3
MPX2100 14.5 100 400 1020 750 200 2.0 40 0.4 -1.0 -1.0
14.5 100 400 750 200 1.0 40 0.4 -0.3 -0.3
MPX2200 29 200 800 2040 1500 400 1.0 40 0.2 -1.0 -1.0
29 200 800 1500 400 1.0 40 0.2 -0.3 -0.3
Compensated Medical Grade Pressure Sensors

Product Family Pressure Pressure Pressure Pressure Pressure Supply Voltage Offset Sensitivity Linearity Linearity Pressure Type Note
Rating Rating Rating Rating Rating (Typ) Maximum (mV/kPa) Minimum Maximum
Maximum Maximum Maximum Maximum Maximum (Vdc) (mV) (% of VFSS) (% of VFSS) A D G V
MPXC2011 1.45 10 40 102 75 10.0 1.0 n/a -1.0 1.0
MPX2300 5.8 40 161 408 300 6.0 0.75 5.0 -2.0 2.0
Tire Pressure Monitoring Sensors

Product Maximum Maximum Operating Maximum Full Scale Sensitivity Best Pressure Best Pressure Best Temperature Supply Voltage Pressure Type Note
Pressure Rating Pressure Pressure Rating Span Output (kPa/count) Accuracy Accuracy Accuracy (V)
(PSI) (kPa) (BAR) (Digital) (-20C) (+25C to +70C) (+25C) A D G V
MPXY8020A 92.4 637.5 6.4 8-bit 2.5 15 kPa 7.5 kPa 4C 2.1 to 3.6
MPXY8021A 92.4 637.5 6.4 8-bit 2.5 20.0 kPa 7.5 kPa 4C 2.1 to 3.6
MPXY8040A 130.5 900 9.0 8-bit 5.0 25 kPa 20.0 kPa 4C 2.1 to 3.6
Uncompensated Pressure Sensors

Product Family Pressure Pressure Pressure Pressure Pressure Over Offset Full Scale Span Sensitivity Linearity Linearity Pressure Type Note
Rating Rating Rating Rating Rating Pressure (Typ) (Typ) (mV/kPa) Minimum Maximum
Maximum Maximum Maximum Maximum Maximum (kPa) (mV) (mV) (% of VFSS) (% of VFSS) A D G V
MPX10 1.45 10 40 102 75 75 20 35 3.5 -1.0 1.0
MPX12 1.45 10 40 102 75 75 20 55 3.5 -1.0 1.0
MPX53 7.0 50 200 510 375 200 20 60 1.2 -0.6 0.4

= Available SG10106
SG1010Q42005
PRESSURE SENSORS (continued)
Conversion Table for Common Units of Pressure
Units of Conversion kiloPascals mm Hg millibars Inches H2O PSI
1 atm 101.325 760.000 1013.25 406.795 14.6960
1 kiloPascal 1.00000 7.50062 10.0000 4.01475 0.145038
1 mm Hg 0.133322 1.00000 1.33322 0.535257 0.0193368
1 millibar 0.100000 0.750062 1.00000 0.401475 0.0145038
1 inch H2O 0.249081 1.86826 2.49081 1.00000 0.0361
1 PSI 6.89473 51.7148 68.9473 27.6807 1.00000
1 hectoPascal 0.100000 0.75006 1.00000 0.401475 0.0145038
1 cm H2O 0.09806 0.7355 9.8 x 10-7 0.3937 0.014223
Quick Conversion Chart for Common Units of Pressure
kiloPascals
0 20 40 60 80 100 120 140 160 180 200
inches H2O
0 100 200 300 400 500 600 700 800
millibars
0 200 400 600 800 1000 1200 1400 1600 1800 2000
mm Hg
0 200 400 600 800 1000 1200 1400 1600
PSI
0 5 10 15 20 25 30
SG10107
SG1010Q42005
PRESSURE SENSORS
SAFETY AND ALARM
SAFETY AND ALARM INTEGRATED CIRCUITS

Smoke Ion
Product Operating Voltage Horn Tone Interconnectable Primary Power Source Ordering Suffix Note
(V)
MC14467 6 to 12 Continuous - Old Tone - 4/6 No DC P1
MC14468 6 to 12 Continuous - Old Tone - 4/6 Yes AC/DC P
MC14568 6 to 12 Continuous - Old Tone - 4/6 Yes AC/DC P
MC145017 6 to 12 Temporal - New Tone - NFPA Tone No DC P
MC145018 6 to 12 Temporal - New Tone - NFPA Tone Yes AC/DC P
Smoke Photo
Product Operating Voltage Horn Tone Interconnectable Primary Power Source Ordering Suffix Note
(V)
MC145010 6 to 12 Continuous - Old Tone - 4/6 Yes AC/DC P, DW, DWR2
MC145011 6 to 12 Continuous - Old Tone - 4/6 Yes AC P, DW, DWR2
MC145012 6 to 12 Temporal - New Tone - NFPA Tone Yes AC/DC P, DW, DWR2
Comparator
Product Description Operating Voltage Horn Modulation Primary Power Source Ordering Suffix Note
(V)
MC14578 Micro-Power Comparator Plus Voltage Follower 3.5 to 14 No Horn Driver AC/DC P
General Alarm
Product Description Operating Voltage Horn Tone(ms) Primary Power Source Ordering Suffix Note
(V)
MC14600 Alarm Detection, Horn Driver, Low Battery Detection, LED Driver 6.0 to 12 Continuous - Old Tone - 4/6 AC/DC P, DW, DWR2
Note: P or P1 = 16-pin DIP, DW = SOIC 16-pin, DWR2 = SOIC 16-pin tape & reel
SG10108
SG1010Q42005
SIGNAL CONDITIONING AND SENSING SOLUTIONS E-FIELD SENSING
Product Description Main Characteristics No. of Channels Current Limit Max Voltage Communications Packaging Status
(mA)
MC33794 Electric Field Imaging Devices 125 kHz generator, shield driver, 9 electrodes + 2 VREF outputs, 11 75 40 ISO-9141 44-pin HSOP Production
detector, 5 V regulator, MCU support 54-pin SOICW EVB
ZIGBEE-COMPLIANT PLATFORM
Zigbee-Compliant and Proprietary RF Transceivers
Product Data Operating Band MCU Packaging Status Additional Information
Rate Voltage (MHz) Interface
(kbps) (V)
MC13193FCR2 250 (max) 2.0 to 3.4 2.4 -2.5 GHz SPI 32-pin QFN 5x5 Available 2.4 GHz RF transceiver data modem for ZigBee applications (tape and reel)
MC13192FCR2 250 (max) 2.4 to 3.4 2.4 GHz SPI 32-pin QFN 5x5 Available 2.4 GHz RF transceiver data modem for ZigBee applications
MC13191FCR2 250 (max) 2.4 to 3.4 2.4 GHz SPI 32-pin QFN 5x5 Available 2.4 GHz Proprietary RF transceiver data modem for Point-to-Point and Star applications
SG10109
SG1010Q42005
SIGNAL CONDITIONING AND

SENSING SOLUTIONS
DEVELOPMENT TOOLS
SENSORS DEVELOPMENT TOOLS

Product Description Status
13192DSK-A00 MC13191/92 Developers Starter Kit used to implement wireless network designs compatible with the IEEE 802.15.4 standard Available
13192RFC-A00 A low-cost development board that provides a simple interface to Freescales MC13192 transceiver Available
KIT1925MMA1250D Evaluation Kit for 5g z-axis Evaluation Board Available
KIT1925MMA1260D Evaluation Kit for 1.5g z-axis Evaluation Board Available
KIT1925MMA1270D Evaluation Kit for 2.5g z-axis Evaluation Board Available
KIT1925MMA2260D Evaluation Kit for 1.5g x-axis Evaluation Board Available
KIT1925MMA6231Q Evaluation Kit for 10g, 300Hz XY-axis Evaluation Board Available
KIT1925MMA6233Q Evaluation Kit for 10g, 900Hz XY-axis Evaluation Board Available
KIT1925MMA6260Q Evaluation Kit for 1.5g, 50Hz XY-axis Evaluation Board Available
KIT3109MMA7260Q Evaluation Kit using the 3-axis sensor Available
RD1950MPXM2010D Water Level Reference Design Available
RD1979MPXM2102A Altimeter Barometer Reference Design Available
RD1986MMA2260D 3-Axis Acceleration Sensing Reference Design Using Three Components 2 X-axis with 1 Device Rotated 90, 1 Z-axis Available
RD1986MMA6260Q 3-Axis Acceleration Sensing Reference Design Using Two Components 1 XY-axis, 1 Z-axis Available
RD3112MMA7260Q Sensing Triple Axis Reference Design (STAR) Using One Component 1 XYZ-axis Available
SG101010
SG1010Q42005
PRODUCT NUMBERING SYSTEM FOR PRESSURE SENSORS
M PX A 2 XXX A P X T1
PRESSURE SENSORS
LEADFORM OPTIONS
PACKAGE TYPE NONE NO LEADFORM
NONE UNIBODY 0 OPEN
AH SSOP MEDIA RESISTANT PACKAGE 12 (CONSULT FACTORY)
CATEGORY 35 OPEN
SHIPPING METHOD
M QUALIFIED STANDARD A/V SMALL OUTLINE PACKAGE NONE TRAYS
(SOP) 67 SOP ONLY
S CUSTOM DEVICE T1 TAPE AND REEL
AZ/VZ SMALL OUTLINE MEDIA (6 = GULL WING/SURFACE MOUNT)
P, X PROTOTYPE DEVICE 1 INDICATES PART
RESISTANT PACKAGE (7 = 87 DEGREES/DIP)
ORIENTATION IN
C CHIP PAK TAPE
H SUPER SMALL OUTLINE U RAIL
PACKAGE (SSOP)
HZ SUPER SMALL OUTLINE
MEDIA RESISTANT PACKAGE
M M-PAK
Y SUPER SMALL OUTLINE
PACKAGE (TPM)
FEATURESNOTE PORTING STYLE

NONE UNCOMPENSATED C AXIAL PORT (SMALL OUTLINE PACKAGE)
2 TEMPERATURE COMPENSATED/ P PORTED
CALIBRATED SINGLE PORT (AP, GP, GVP)
RATED PRESSURE IN kPa,
3 OPEN DUAL PORT (DP)
EXCEPT FOR MPX2300,
4 TEMPERATURE COMPENSATED/ S STOVEPIPE PORT (UNIBODY)
EXPRESSED IN mm Hg.
CALIBRATED/SIGNAL CONDITIONED SX AXIAL PORT (UNIBODY)
AUTOMOTIVE ACCURACY W ROBUST AXIAL PORT
5 TEMPERATURE COMPENSATED/
CALIBRATED/SIGNAL CONDITIONED
6 HIGH TEMPERATURE
7 POSITIVE/NEGATIVE PRESSURE
8 CMOS
TYPE OF DEVICE
A ABSOLUTE
G GAUGE
D DIFFERENTIAL
V VACUUM/GAUGE
Actual product marking may be abbreviated due to space constraints but packaging label will reflect full part number.
Note: Only applies to qualified and prototype products. This does not apply to custom products.
Examples:
MPX10DP 10 kPa uncompensated, differential device in minibody package, ported, no leadform, shipped in trays.
MPXA4115A6T1 115 kPa automotive temperature compensated and calibrated device with signal conditioning, SOP surface mount with gull wing leadform, shipped in tape and reel.
A change bar appears in the left margin to mark the location of new or revised information.
SG101011
SG1010Q42005
PRODUCT NUMBERING SYSTEM FOR

PRESSURE SENSORS
PACKAGING
PACKAGING
(Sizes not to scale)
Preferred Pressure Sensor Packaging Options
SOP SOP Axial Port SOP SOP Axial Port SOP Industrial MPAK MPAK Axial Port
Case 482 Case 482A Case 482B Case 482C Case 1320 Case 1320A
Suffix AC6/GC6 Grade Axial Port Suffix A/D
Suffix A6/G6 Suffix G7U Suffix GC7U Case 1735-01 Suffix AS/GS
Suffix GW6U/GW7U
SOP Side Port SOP Dual Port SOP Vacuum Port SSOP SSOP Axial Port SSOP Tire Pressure Monitor
Case 1369 Case 1351 Case 1368 Case 1317 Case 1317A Case 1352
Suffix AP/GP Suffix DP Suffix GVP Suffix A6 Suffix AC6 Suffix A6
Pressure Sensor Packaging
Unibody Unibody Unibody Medical Unibody

Basic Element Single Port Dual Port Chip Pak Stovepipe Port
Case 344 Case 344B Case 344C Case 423A Case 344E
Suffix A/D Suffix AP/GP Suffix DP Suffix DT1 Suffix AS/GS
Unibody Unibody Unibody Unibody Unibody

Basic Element Single Port Dual Port Axial Port Stovepipe Port
Case 867 Case 867B Case 867C Case 867F Case 867E
Suffix A/D Suffix AP/GP Suffix DP Suffix ASX/GSX Suffix AS/GS
A change bar appears in the left margin to mark the location of new or revised information. SG101012
SG1010Q42005
PACKAGING (continued)
(Sizes not to scale)
Acceleration Sensors Packaging
Quad Flat No-Lead Quad Flat No-Lead 16-Pin SOIC 20-Pin SOIC
Case 1622-01 Case 1477-01 Case 475 Case 475A
QFN Suffix QFN Suffix D Suffix D Suffix
Safety and Alarm Integrated Circuits Packaging
16
16
1
1
Plastic DIP SOIC Package

Case 648 Case 751G
P Suffix DW Suffix
Note: P or P1 = 16-pin DIP, DW = SOIC 16-pin, DWR2 = SOIC 16-pin tape and reel
SG101013
SG1010Q42005
PACKAGING
PRESSURE SENSOR ORDERABLE PART
NUMBERS
PRESSURE SENSOR ORDERABLE PART NUMBERS

Uncompensated MPX2053D MPX2100A MPXV5004G7U MPXV7025DP MPXV4115V6T1 MPXA4250A6U
MPX10D MPX2053GP MPX2100AP MPXV5004GP MPXV7025GP MPXV4115V6U MPXAZ4250AC6T1
MPX10DP MPX2053DP MPX2100ASX MPXV5004GP1 MPXV7025GC6U MPX5999D MPXH6250A6U
MPX10GP MPX2053GVP MPX2202D MPXV5004DP MPXV7025GC6T1 MPX4115A MPXH6250A6T1
MPX10GS MPXV5004GVP MPX5500D MPX4115AP MPXHZ6250AC6T1
MPXM2053D MPX2202GP
MPXV10GC6U MPVZ4006GW6U MPX5500DP MPX4115AS MPXH6300ACGU
MPXM2053DT1 MPX2202DP
MPVZ4006G6U MPX5050D MPXA4115AC6U MPXH6300AC6T1
MPXV10GC7U MPXM2053GS MPXV2202GC6T1
MPVZ4006G6T1 MPX5050DP MPXA4115A6T1 MPXH6300A6U
MPX12D MPXM2053GST1 MPXV2202GC6U
MPVZ4006G7U MPX5050GP1 MPXA4115A6U MPXH6300A6T1
MPX12DP MPXV2053GP MPXM2202D
MPVZ4006GW7U MPX5050GP MPXA4115AP MPXH6400A6U
MPX12GP MPXV2053DP MPXM2202DT1 MPXV4006GC6T1 MPXV5050GP MPXAZ4115AC6U MPXH6400A6T1
MPX53D MPX2050D MPXM2202GS MPXV4006GC6U MPXV5050DP MPXAZ4115A6T1 MPXH6400AC6U
MPX53DP MPX2050GP MPXM2202GST1 MPXV4006GC7U MPXV5050VC6T1 MPXAZ4115A6U MPXH6400AC6T1
MPX53GP MPX2050DP MPXV2202GP MPXV4006G6U MPX5100A MPXAZ6115A6U MPXHZ6400AC6T1
MPXM53GS MPX2050GSX MPXV2202DP MPXV4006G7U MPX5100AP MPXAZ6115AP MPX5700A
MPXM53GST1 MPX2102D MPX2202A MPXV4006GP MPX5100D MPXAZ6115APT1 MPX5700AP
MPXV53GC6U MPX2102GP MPX2202AP MPXV4006DP MPX5100DP MP3H6115A6T1 MPX5700AS
MPXV53GC7U MPXV7007DP MPX5100GP MP3H6115A6U MPX5700ASX
MPX2102DP MPXM2202A
MPXV7007GP MPX5100GSX MP3H6115AC6T1 MPX5700D
MPX2102GVP MPXM2202AT1
MPXV7007GC6U MPXV5100GC6U MP3H6115AC6U MPX5700DP
Compensated MPXM2102D MPXM2202AS
MPXV7007GC6T1 MPXV5100GC7U MPXAZ6115AC6U MPX5700GP
MPX2300DT1
MPXM2102DT1 MPXM2202AST1
MPVZ5010GW6U MPXV5100DP MPXA6115AC6U MPX5700GP1
MPX2301DT1 MPXM2102GS MPX2200D
MPVZ5010G6U MPX4080D MPXA6115A6U MPX5700GS
MPX2010D MPXM2102GST1 MPX2200GP MPVZ5010G6T1 MPX4100A MPXH6115A6T1 MPXY8020A6U
MPX2010GP
MPXV2102GP MPX2200DP MPVZ5010G7U MPX4100AP MPXH6115A6U MPXY8020A6T1
MPX2010DP
MPXV2102DP MPX2200GSX MPVZ5010GW7U MPX4100AS MPXH6115AC6T1 MPXY8021A6U
MPX2010GS MPX5010D MPXA4100AC6U MPXH6115AC6U MPXY8021A6T1
MPX2102A MPX2200A
MPX2010GSX MPX2102AP MPX2200AP MPX5010DP MPXA4100A6T1 MPXHZ6115A6T1 MPXY8040A6U
MPXM2010D MPX5010DP1 MPXA4100A6U MPXHZ6115A6U MPXY8040A6T1
MPX2102ASX
MPXM2010DT1 MPXM2102A Integrated MPX5010GP MPXAZ4100AC6U MPXV6115VC6U
MPXM2010GS MPVZ5004GW6U MPX5010GS MPXAZ4100A6U MPX4200A Legend
MPXM2102AT1
MPXM2010GST1 MPVZ5004GW7U MPX5010GSX MPX4101A MPX4250D Uncompensated
MPXM2102AS
MPXC2011DT1 MPVZ5004G6U MPXV5010GC6T1 MPXA4101AC6U MPX4250DP Compensated
MPXM2102AST1
MPXC2012DT1 MPVZ5004G6T1 MPXV5010GC6U MPXH6101A6T1 MPX4250GP Integrated
MPX2100D
MPVZ5004G7U MPXV5010GC7U MPXH6101A6U MPX4250A
MPXV2010GP MPX2100GP To contact a Freescale Semi-
MPXV5004GC6T1 MPXV5010G6U MPXH6101AC6T1 MPX4250AP conductor Authorized Distrib-
MPXV2010DP
MPX2100DP MPXV5004GC6U MPXV5010G7U MPXH6101AC6U MPXA4250AC6T1 utor, go to:
MPXM2051GS www.freescale.com, then
MPX2100GVP MPXV5004GC7U MPXV5010GP MPX4105A MPXA4250AC6U select Where to Buy.
MPXM2051GST1
MPXV5004G6U MPXV5010DP MPXV4115VC6U MPXA4250A6T1
SG101014
A change bar appears in the left margin to mark the location of new or revised information. SG1010Q42005
NOTES
SG101015
SG1010Q42005
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regarding the suitability of its products for any particular purpose, application, Buyer shall indemnify and hold Freescale
nor does Freescale Semiconductor assume any liability arising out Semiconductor and its officers, employees, subsidiaries, affiliates,
of the application or use of any product or circuit, and specifically and distributors harmless against all claims, costs, damages, and
disclaims any and all liability, including without limitation expenses, and reasonable attorney fees arising out of, directly or
consequential or incidental damages. Typical parameters that may indirectly, any claim of personal injury or death associated with such
be provided in Freescale Semiconductor data sheets and/or unintended or unauthorized use, even if such claim alleges that
specifications can and do vary in different applications and actual Freescale Semiconductor was negligent regarding the design or
performance may vary over time. All operating parameters, manufacture of the part.
including Typicals, must be validated for each customer
application by customers technical experts.
Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners.
Freescale Semiconductor, Inc. 2005. All rights reserved.
SG1010Q42005
Rev 0
09/2005
Order this document
SEMICONDUCTOR APPLICATION NOTE by AN1646/D

Prepared by Ador Reodique, Sensor and Systems Applications Engineering and Warren Schultz, Field Engineering
INTRODUCTION Noise can also come from external circuits. In a sensor sys-
tem, power supply, grounding and PCB layout is important and
Motorola Integrated Pressure Sensors (IPS) have trimmed needs special consideration.
outputs, builtin temperature compensation and an amplified The following discussion presents simple techniques for
singleended output which make them compatible with Ana- mitigating these noise signals, and achieving excellent results
log to Digital converters (A/Ds) on low cost microcontrollers. with high resolution A/D converters.
Although 8bit A/Ds are most common, higher resolution
A/Ds are becoming increasingly available. With these higher
EFFECTS OF NOISE IN SENSOR SYSTEM
resolution A/Ds, the noise that is inherent to piezoresistive The transducer bridge produces a very small differential
voltage in the millivolt range. The onchip differential amplifier
bridges becomes a design consideration.
amplifies, level shifts and translates this voltage to a single
The two dominant types of noise in a piezoresistive inte-
ended output of typically 0.2 volts to 4.7 volts. Although the
grated pressure sensor are shot (white) noise and 1/f (flicker
transducer has a mechanical response of about 500 Hz, its
noise). Shot noise is the result of nonuniform flow of carriers noise output extends from 500 Hz to 1 MHz. This noise is am-
across a junction and is independent of temperature. The sec- plified and shows up at the output as depicted in Figure 1.
ond, 1/f, results from crystal defects and also due to wafer There is enough noise here to affect 1 count on an 8 bit A/D,
processing. This noise is proportional to the inverse of fre- and 4 or 5 counts on a 10 bit A/D. It is therefore important to
quency and is more dominant at lower frequencies3. consider filtering. Filtering options are discussed as follows.
Figure 1. Raw Output
REV 2

Motorola, Inc. 2001

NOISE FILTERING TECHNIQUES ware, a lowpass RC filter with a cutoff frequency of 650 Hz
AND CONSIDERATIONS is recommended. A 750 ohm resistor and a 0.33 F capacitor
For mitigating the effects of this sensor noise, two general have been determined to give the best results (see Figure 2)
approaches are effective, low pass filtering with hardware, since the 750 ohm series impedance is low enough for most
and low pass filtering with software. When filtering with hard- A/D converters.

Figure 2. Integrated Pressure Sensor with RC LP Filter to Filter Out Noise
This filter has been tested with an HC05 microcontroller nical data sheet if input impedance is a concern. In applica-
which has a successive approximation A/D converter. tions where the A/D converter is sensitive to high source
Successive approximation A/Ds are generally compatible impedance, a buffer should be used. The integrated pressure
with the DC source impedance of the filter in Figure 2. Results sensor has a railtorail output swing, which dictates that a
are shown in Figure 4. railtorail operational amplifier (op amp) should be used to
Some A/Ds will not work well with the source impedance of avoid saturating the buffer. A railtorail input and output op
a single pole RC filter. Please consult your A/D converter tech- amp works well for this purpose (see Figure 3).

Figure 3. Use a RailtoRail Buffer to Reduce Output Impedance of RC Filter
Averaging is also effective for filtering sensor noise. Averag- number of samples gives the best results. For example, a roll-
ing is a form of low pass filtering in software. A rolling average ing average of 4 samples combined with the RC filter in Figure
of 8 to 64 samples will clean up most of the noise. A 10 sample 2 results in a noise output on the order of 1 mV peak to peak.
average reduces the noise to about 2.5 mV peak to peak and Another important consideration is that the incremental ef-
a 64 sample average reduces the noise to about 1 mV peak fectiveness of averaging tends to fall off as the number of sam-
to peak (see Figures 5 and 6). ples is increased. In other words, the signaltonoise (S/N)
This method is simple and requires no external compo- ratio goes up more slowly than the number of samples. To be
nents. However, it does require RAM for data storage, extra more precise, the S/N ratio improves as the square root of the
computation cycles and code. In applications where the mi- number of samples is increased. For example, increasing the
crocontroller is resource limited or pressure is changing rela- number of samples from 10, in Figure 5, to 64, in Figure 6, re-
tively rapidly, averaging alone may not be the best solution. In duced noise by a factor of 2.5.
these situations, a combination of RC filtering and a limited

Figure 4. Output After Low Pass Filtering
Figure 5. Output with 10 Averaged Samples

Figure 6. Output with 64 Averaged Samples
Figure 7. Filtered Sensor Output and Averaged Over 10 Samples

POWER SUPPLY Rule 3: On traces that carry high speed signals avoid 90
degree angles, including T connections. If you think of
Since the sensor output is ratiometric with the supply volt-
high speed signals in terms of wavefronts moving down a
age, any variation in supply voltage will also proportionally ap-
trace, the reason for avoiding 90 degree angles is simple. To
pear at the output of the sensor. The integrated pressure
a high speed wavefront, a 90 degree angle is a discontinuity
sensor is designed, characterized and trimmed to be powered
that produces unwanted reflections. From a practical point of
with a 5 V +/ 5% power supply which can supply the maxi-
view, 90 degree turns on a single trace are easy to avoid by
mum 10 mA current requirement of the sensor. Powering the
using two 45 degree angles or a curve. Where two traces
integrated sensor at another voltage than specified is not rec-
come together to form a T connection, adding some material
ommended because the offset, temperature coefficient of off-
to cut across the right angles accomplishes the same thing.
set (TCO) and temperature coefficient of span (TCS) trim will
be invalidated and will affect the sensor accuracy.
Rule 4: Connect signal circuit grounds to power
From a noise point of view, adequate decoupling is impor- grounds at only one point. The reason for this constraint is
tant. A 0.33 F to 1.0 F ceramic capacitor in parallel with a that transient voltage drops along the power grounds can be
0.01 F ceramic capacitor works well for this purpose. Also, substantial, due to high values of di/dt flowing through finite in-
with respect to noise, it is preferable to use a linear regulator ductance. If signal processing circuit returns are connected to
such as an MC78L05 rather than a relatively more noisy power ground at multiple points, then these transients will
switching power supply 5 volt output. An additional consider- show up as return voltage differences at different points in the
ation is that the power to the sensor and the A/D voltage refer- signal processing circuitry. Since signal processing circuitry
ence should be tied to the same supply. Doing this takes seldom has the noise immunity to handle power ground tran-
advantage of the sensor output ratiometricity. Since the A/D sients, it is generally necessary to tie signal ground to power
resolution is also ratiometric to its reference voltage, varia- ground at only one point.
tions in supply voltage will be canceled by the system. Rule 5: Use ground planes selectively. Although ground
planes are highly beneficial when used with digital circuitry, in
LAYOUT OPTIMIZATION the analog world they are better used selectively. A single
ground plane on an analog board puts parasitic capacitance
In mixed analog and digital systems, layout is a critical part in places where it is not desired, such as at the inverting inputs
of the total design. Often, getting a system to work properly de- of op amps. Ground planes also limit efforts to take advantage
pends as much on layout as on the circuit design. The follow- of field cancellation, since the return is distributed.
ing discussion covers some general layout principles, digital
section layout and analog section layout.
General Principles: ANALOG LAYOUT

There are several general layout principles that are impor-
tant in mixed systems. They can be described as five rules: In analog systems, both minimizing loop areas and field
Rule 1: Minimize Loop Areas. This is a general principle cancellation are useful design techniques. Field cancellation
that applies to both analog and digital circuits. Loops are is applicable to power and ground traces, where currents are
antennas. At noise sensitive inputs, the area enclosed by an equal and opposite. Running these two traces directly over
incoming signal path and its return is proportional to the each other provides field cancellation for unwanted noise, and
amount of noise picked up by the input. At digital output ports, minimum loop area.
the amount of noise that is radiated is also proportional to Figure 8 illustrates the difference between a power supply
loop area. decoupling loop that has been routed correctly and one that
Rule 2: Cancel fields by running equal currents that has not. In this figure, the circles represent pads, the schemat-
flow in opposite directions as close as possible to each ic symbols show the components that are connected to the
other. If two equal currents flow in opposite directions, the re- pads, and the routing layers are shown as dark lines (top
sulting electromagnetic fields will cancel as the two currents trace) or grey lines (bottom trace). Note that by routing the two
are brought infinitely close together. In printed circuit board traces one over the other that the critical loop area is mini-
layout, this situation can be approximated by running signals mized. In addition, it is important to keep decoupling capaci-
and their returns along the same path but on different layers. tors close to active devices such as MPX5000series sensors
Field cancellation is not perfect due to the finite physical sepa- and operational amplifiers. As a rule of thumb, when 50 mil
ration, but is sufficient to warrant serious attention in critical ground and Vcc traces are used, it is not advisable to have
paths. Looked at from a different perspective, this is another more than 1 inch between a decoupling capacitor and the ac-
way of looking at Rule # 1, i.e., minimize loop areas. tive device that it is intended to be decoupled.

Figure 8. Minimizing Loop Areas

For similar reasons it is desirable to run sensor output sig- nity. Single traces are easy, two forty five degree angles or a
nals and their return traces as close to each other as pos- curve easily accomplish a 90 degree turn. It is just as important
sible. Minimizing this loop area will minimize the amount of to avoid 90 degree angles in T connections. Figure 10 illus-
external noise that is picked up by making electrical connec- trates correct versus incorrect routing for both cases.
tions to the sensor.
SINGLE TRACE
DIGITAL LAYOUT
The primary layout issue with digital circuits is ground
partitioning. A good place to start is with the architecture that
is shown in Figure 9. This architecture has several key attrib-
utes. Analog ground and digital ground are both separate
and distinct from each other, and come together at only one
point. For analog ground it is preferable to make the one point
as close as possible to the analog to digital converters AVOID GOOD PRACTICE
ground reference (VREFL). The power source ground con-
nection should be as close as possible to the microcontrol-
TCONNECTION
lers power supply return (VSS). Note also that the path from
VREFL to VSS is isolated from the rest of digital ground until
it approaches VSS.
DIGITAL GROUND/GROUND PLANE
AVOID GOOD PRACTICE
Figure 10. 90 Degree Angles
CONCLUSION

Piezoresistive pressure sensors produce small amounts
of noise that can easily be filtered out with several methods.
These methods are low pass filtering with an RC filter, averag-
ing or a combination of both which can be implemented with
minimal hardware cost.
In a mixed sensor system, noise can be further reduced by
following recommended power supply, grounding and layout
SENSOR/ANALOG POWER techniques.
GROUND GROUND
REFERENCES
Figure 9. Ground Partitioning [1] AN1626 Noise Management in Motor Drives, Warren
Schultz, Motorola, Inc.
In addition to grounding, the digital portion of a system [2] Noise Reduction Techniques In Electronic Systems 2nd
benefits from attention to avoiding 90 degree angles, since Edition, Henry W. Ott, John Wiley & Sons.
there are generally a lot of high speed signals on the digital [3] Noise: Comparing Integrated Pressure Sensors and Op
portion of the board. Routing with 45 degree angles or curves Amps, Ira Basket, Motorola Sensor Products Division
minimizes unwanted reflections, which increases noise immu- internal paper.

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals
must be validated for each customer application by customers technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
How to reach us:

USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 13036752140 or 18004412447
JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3201, MinamiAzabu. Minatoku, Tokyo 1068573 Japan. 81334403569
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. 85226668334
Technical Information Center: 18005216274
HOME PAGE: http://www.motorola.com/semiconductors/

AN1646/D
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http://www.electronic-engineering.ch/microchip/faq/Readme%20for%20PICSTART%20Plus.txt
Release Notes for PICSTART(R) Plus Development Programmer

MPLAB IDE v7.10
Software DLL Version v4.10
Operating System Version v4.30.04 (pspls43004.hex)
March 16, 2005
-----------------------------------------------------------------
Table of Contents
-----------------------------------------------------------------
1. Device Support List
2. PC Operating System Support List
3. Reference Documents
4. What's New or Updated
5. Known Problems
6. Important Notes
7. Programming PIC10F2XX Devices
8. Programming rfPIC12C509Ax Devices
9. Programming PIC16C55A/C57C/F57 Devices
10. Programming PIC16F818/819 Devices
11. Programming PIC18C658/858 and PIC18F6x20/8x20 Devices
13. Universal Programming Module (AC162049)
-----------------------------------------------------------------
-----------------------------------------------------------------
Supported in Supported in
Device OS (FW) Version Device OS (FW) Version
------------- --------------- ------------- ---------------
PIC10F200! (04.30.00) PIC16F688 (04.10.00)
PIC10F202! (04.30.00) PIC16F716 (04.10.00)
PIC10F204! (04.30.00) PIC16F72 (02.10.01)
PIC10F206! (04.30.00) PIC16F73 (02.10.01)
PIC12C508 (02.01.00) PIC16F737 (04.10.00)
PIC12C508A (02.01.00) PIC16F74 (02.10.01)
PIC12C509 (02.01.00) PIC16F747 (04.10.00)
PIC12C509A (02.01.00) PIC16F76 (02.10.01)
PIC12C671 (02.01.00) PIC16F767 (04.10.00)
PIC12C672 (02.01.00) PIC16F77 (02.10.01)
PIC12CE518 (02.01.00) PIC16F777 (04.10.00)
http://www.electronic-engineering.ch/microchip/faq/Readme%20for%20PICSTART%20Plus.txt (1 of 8)12/02/2008 17:32:07

PIC12CE519 (02.01.00) PIC16F818! (03.00.07)

PIC12CE673 (02.01.00) PIC16F819! (03.00.07)
PIC12CE674 (02.01.00) PIC16F83 (02.01.00)
PIC12F508 (04.30.00) PIC16F84 (02.01.00)
PIC12F509 (04.30.00) PIC16F84A (02.01.00)
PIC12F629 (03.00.07) PIC16F87 (04.10.00)
PIC12F635 (04.20.03) PIC16F870 (02.01.00)
PIC12F675 (03.00.07) PIC16F871 (02.01.00)
PIC12F683 (04.02.00) PIC16F872 (02.01.00)
PIC16C505 (02.01.00) PIC16F873 (02.01.00)
PIC16C54 (02.01.00) PIC16F873A (03.00.07)
PIC16C54C (02.01.00) PIC16F874 (02.01.00)
PIC16C55 (02.01.00) PIC16F874A (03.00.07)
PIC16C554 (02.01.00) PIC16F876 (02.01.00)
PIC16C558 (02.01.00) PIC16F876A (03.00.07)
PIC16C55A! (02.01.00) PIC16F877 (02.01.00)
PIC16C56 (02.01.00) PIC16F877A (03.00.07)
PIC16C56A (02.01.00) PIC16F88 (04.10.00)
PIC16C57 (02.01.00) PIC16HV540 (02.01.00)
PIC16C57C! (02.01.00) PIC17C42 (02.01.00)
PIC16C58A (02.01.00) PIC17C42A (02.01.00)
PIC16C58B (02.01.00) PIC17C43 (02.01.00)
PIC16C620 (02.01.00) PIC17C44 (02.01.00)
PIC16C620A (02.01.00) PIC17C752 (02.01.00)
PIC16C621 (02.01.00) PIC17C756 (02.01.00)
PIC16C621A (02.01.00) PIC17C756A (02.01.00)
PIC16C622 (02.01.00) PIC17C762 (02.01.00)
PIC16C622A (02.01.00) PIC17C766 (02.01.00)
PIC16C62A (02.01.00) PIC18C242 (02.01.00)
PIC16C62B (02.01.00) PIC18C252 (02.01.00)
PIC16C63 (02.01.00) PIC18C442 (02.01.00)
PIC16C63A (02.01.00) PIC18C452 (02.01.00)
PIC16C642 (02.01.00) PIC18C658! (02.01.00)
PIC16C64A (02.01.00) PIC18C858! (02.01.00)
PIC16C65A (02.01.00) PIC18F1220*!# (04.10.00)
PIC16C65B (02.01.00) PIC18F1320*!# (04.10.00)
PIC16C66 (02.01.00) PIC18F2220* (04.02.00)
PIC16C662 (02.01.00) PIC18F2320* (04.02.00)
PIC16C67 (02.01.00) PIC18F2331*! (04.02.00)
PIC16C71 (02.01.00) PIC18F2410 (04.30.01)
PIC16C710 (02.01.00) PIC18F242 (02.30.01)
PIC16C711 (02.01.00) PIC18F2420 (04.30.01)
PIC16C712 (02.01.00) PIC18F2431*! (04.02.00)

PIC16C715 (02.01.00) PIC18F2455 (04.30.01)

PIC16C716 (02.01.00) PIC18F248 (02.30.01)
PIC16C717 (02.10.01) PIC18F2510 (04.30.01)
PIC16C72 (02.01.00) PIC18F2515 (04.30.01)
PIC16C72A (02.01.00) PIC18F252 (02.30.01)
PIC16C73A (02.01.00) PIC18F2520 (04.30.01)
PIC16C73B (02.01.00) PIC18F2525 (04.30.01)
PIC16C745 (02.01.00) PIC18F258 (02.30.01)
PIC16C74A (02.01.00) PIC18F2585 (04.30.01)
PIC16C74B (02.01.00) PIC18F2610 (04.30.01)
PIC16C76 (02.01.00) PIC18F2620 (04.30.01)
PIC16C765 (02.01.00) PIC18F2680 (04.30.01)
PIC16C77 (02.01.00) PIC18F4220* (04.02.00)
PIC16C770 (02.10.01) PIC18F4320 (04.02.00)
PIC16C771 (02.10.01) PIC18F4331 (04.02.00)
PIC16C773 (02.01.00) PIC18F4410 (04.30.01)
PIC16C774 (02.01.00) PIC18F442 (02.30.01)
PIC16C781 (02.30.00) PIC18F4420 (04.30.01)
PIC16C782 (02.30.00) PIC18F4431 (04.02.00)
PIC16C923 (02.01.00) PIC18F4455 (04.30.01)
PIC16C924 (02.01.00) PIC18F448 (02.30.01)
PIC16C925 (02.01.00) PIC18F4510 (04.30.01)
PIC16C926 (02.01.00) PIC18F4515 (04.30.01)
PIC16CE623 (02.01.00) PIC18F452 (02.30.01)
PIC16CE624 (02.01.00) PIC18F4520 (04.30.01)
PIC16CE625 (02.01.00) PIC18F4525 (04.30.01)
PIC16F505 (04.30.00) PIC18F458 (02.30.01)
PIC16F54 (04.02.00) PIC18F4585 (04.30.01)
PIC16F57! (04.02.00) PIC18F4610 (04.30.01)
PIC16F627 (02.10.01) PIC18F4620 (04.30.01)
PIC16F627A (04.10.00) PIC18F4680 (04.30.01)
PIC16F628 (02.10.01) PIC18F6620! (03.00.07)
PIC16F628A (04.10.00) PIC18F6720! (03.00.07)
PIC16F630 (03.00.06) PIC18F8620! (03.00.07)
PIC16F636 (04.12.04) PIC18F8720! (03.00.07)
PIC16F648A (04.10.00) rfPIC12C509AF! (02.01.00)
PIC16F676 (03.00.06) rfPIC12C509AG! (02.01.00)
PIC16F684 (04.10.00)
* Indicates beta-support part(s) in this release.
! See Sections 8-14 in this readme for information on programming

these devices.

# Some revisions of these parts fail to program.
-----------------------------------------------------------------
-----------------------------------------------------------------
This tool has been tested under the following PC operating

systems:
Windows(R) 98 SE, Windows ME, Windows NT 4.0 SP6a Workstations

(NOT Servers), Windows 2000 SP4, Windows XP
-----------------------------------------------------------------
-----------------------------------------------------------------
The following documents may be found on our website or MPLAB IDE

CD-ROM:
* PICSTART Plus User's Guide DS51028

* PICSTART Plus Upgrade Kit Brief DS51405
* Programming Specifications for devices various DS numbers
* Development Tools Selector
On-line help (Help>Topics) is also available for this tool:
* Programmers>PICSTART Plus hlpPSPlus.chm
-----------------------------------------------------------------
4. What's New or Updated
-----------------------------------------------------------------
None.
-----------------------------------------------------------------
5. Known Problems
-----------------------------------------------------------------
The following is a list of known problems. For information on
common problems, error messages and limitations, please see
Troubleshooting in the online help file for PICSTART Plus
(hlpPSPlus.chm).

- If you experience repeated problems programming, i.e., corrupted

programming or the inability to program your device, it is
suggested that you insert a 0.1 uf capacitor in the PICSTART Plus
ZIFF socket along with the device between the Vdd and Vss pins.
If there are two pairs of Vdd/Vss pins, insert a capacitor as
stated above for each pair.
System Service Requests (SSRs)

------------------------------
SSR 18615: A failed Verify in MPLAB IDE does not report all
erroneous memory areas found when a PIC18Fxx20 device is in use.
* If all options are included in the Verify, only errors in the
program memory are reported.
* If the program memory is excluded and an individual or
combination of any of the remaining areas is included, errors
found in those areas are reported.
SSR 19423: On Windows 98, Program and Verify progress so far,

then pause at random addresses on large memory devices.
Occasionally, communication errors occur.
SSR 19424: On Windows 98, programming does not always successfully

complete when resumed after communication failure.
SSR 19753: EEPROM is not being erased on some devices, such as the
PIC16F62X, PIC16F8X, PIC16F87X and PIC16F87XA.
-----------------------------------------------------------------
6. Important Notes
-----------------------------------------------------------------
- Once address ranges are set in the Programmer Settings dialog,

Program tab, the settings will stay set and not revert to default
values after an operation.
- For all memory except configuration bits (that are not code
protected), you may program from 1 to 0, but not from 0 to 1, i.e.,
you must erase and then program.
- With PIC18F8xxx devices set in boot block processor mode, memory

past the boot block range is not accessible. Therefore, verifying
after the boot block range will fail in this mode. In microprocessor

mode, all of program memory will fail a verify.
-----------------------------------------------------------------
7. Programming PIC10F2XX Devices
-----------------------------------------------------------------
PIC10F2xx devices are currently available in a 6-pin SOT 23 and
8-pin DIP packages. The following setup is required for use with
the PicStart Plus:
6-pin SOT 23 options:
1)PIC10F2xx Universal Programmer Adapter (AC163020) with the

18-pin Adapter socket on the reverse side: Using the male-male
stand-off headers, align pin one as viewed from the top silk screen
with pin one of the 40-pin ZIFF socket on the PicStart Plus.
Please see "AC163020 pin 1 guide" (DS51478).
2)PIC10F2xx SOT-23 to DIP-8 Programmer Adapter (AC163021):

Using the pin one pad (square solder pad), align the pad with pin
one of the 40-pin ZIFF socket on the PicStart Plus.
8-pin DIP options:
1)PIC10F2xx Universal Programmer Adapter (AC163020) with the

18-pin Adapter socket on the reverse side: Using the male-male
stand-off headers, align pin one as viewed from the top silk screen
with pin one of the 40-pin ZIFF socket on the PicStart Plus.
2)Align Pin 1 of the 10F2xx DIP-8 package to Pin 9 of the

PicStart Plus.
-----------------------------------------------------------------
8. Programming rfPIC12C509Ax Devices
-----------------------------------------------------------------
You can program rfPIC12C509Ax devices using PICSTART Plus by
creating an adapter that will connect the top 8 pins (4 pins on
each side) to the PICSTART Plus (socket pins 1-4 and 37-40). This
will allow you to program the PIC12C509A part of the device.
ONLY connect the top 8 pins for proper operation. Once you have
created the adapter, you will be able to select the rfPIC12C509Ax
part from the PICSTART Plus programming dialog on MPLAB IDE.

Then follow normal programming procedures.
-----------------------------------------------------------------
9. Programming PIC16C55A/C57C/F57 Devices
-----------------------------------------------------------------
From ETN #22:
Symptom: PIC16C55A and PIC16C57C devices do not verify correctly

using the PICSTART Plus. When a blank device is read, program
memory values of 0xBFF are reported.
Problem: The OSC2 pin on the PIC16C55A and PIC16C57C tries to

overdrive RB6. This causes invalid voltage levels for verification.
Solution: To program the PIC16C55A and PIC16C57C DIP packages on a

PICSTART Plus, a modified adapter must be used. The adapter can
be created using a 28- or 40-pin ZIF, LIF or standard socket by
cutting the connector pin that corresponds to pin 26 of the
PIC16C55A and PIC16C57C. After creating this modified adapter,
secure the device in the adapter, then place the modified adapter
in the PICSTART Plus. This adapter should be used only when
programming these two devices.
-----------------------------------------------------------------
-----------------------------------------------------------------
When programming a PIC16F818 or PIC16F819, you must add a 1kohm
resistor between MCLR and GND. This can be placed in the socket
with the device.
-----------------------------------------------------------------
11. Programming PIC18C658/858 and PIC18F6x20/8x20 Devices
-----------------------------------------------------------------
To program these devices using the PICSTART Plus programmer, you
need to build an adapter that will make the part look like the
40-pin PIC18CXXX devices. The device pins below should be
attached to the PICSTART Plus as noted. (ETN #23)
Note: You must connect all VDD/VSS lines on the devices, as

all are needed to power the chip correctly.
PIN PICSTART PIC18C658 PIC18C658

Plus 64-pin package 68-pin package

--- -------- -------------- --------------

VDD 11 10, 26, 38, 57 2, 20, 37, 49
VSS 12 9, 25, 41, 56 19, 36, 53, 68
MCLR 1 7 16
RB6 39 42 54
RB7 40 37 48
PIN PICSTART PIC18C858 PIC18C858

--- -------- -------------- --------------
VDD 11 12, 32, 48, 71 2, 24, 45, 61
VSS 12 11, 31, 51, 70 23, 44, 65, 84
MCLR 1 9 20
RB6 39 52 66
RB7 40 47 60
PIN PICSTART PIC18F6X20 PIC18F8X20

--- -------- -------------- --------------
VDD 11 10,19,26,38,57 12,25,32,48,71
VSS 12 9,20,25,41,56 11,26,31,51,70
MCLR 1 7 9
RB6 39 42 52
RB7 40 37 47
-----------------------------------------------------------------
-----------------------------------------------------------------
All power supply (Vdd and AVdd) and ground (vss and AVss) pins
must be used in order for these devices to program. PICSTART Plus
will handle Vdd, Vss and AVss properly, but you must place a wire
must be securely placed between pin 7 (AVdd) and pin 11 in the
socket with the device for proper operation.
-----------------------------------------------------------------
-----------------------------------------------------------------
Not currently supported on PICSTART Plus.

Supported only on MPLAB ICD 2.

http://www.electronic-engineering.ch/microchip/faq/Readme%20for%20MPLAB%20ICD%202.txt
Release Notes for MPLAB(R) ICD 2 In-Circuit Debugger

MPLAB(R) IDE v7.10
MPLAB ICD 2 DLL v7.10
Operating System (Firmware) Files
PIC12F/16F v2.06.05 (ICD01020605.hex)
PIC18F v2.06.06 (ICD04020606.hex)
PIC18F Extended v1.02.05 (ICD05010205.hex)
PIC18C601/801 v1.02.02 (ICD06010202.hex)
PIC10F2XX,PIC16F54/57 v1.02.09 (ICD07010209.hex)
PIC16F68X v1.03.04 (ICD08010304.hex)
PIC16F629/675/630/676 v1.00.00 (ICD09010000.hex)
dsPIC30F Rev B1 v1.02.08 (ICD10010208.hex)
PIC18F67J/87J v0.00.19 (ICD11000019.hex)
PIC16F72, PIC16F8X, v1.02.00 (ICD12010200.hex)
PIC16F627/628
March 16, 2005
*****************************************************************
IMPORTANT: Do not allow Windows(R) OS to pick a default USB driver;
MPLAB ICD 2 will not work with this driver. You must follow the
procedure specified at MPLAB IDE software installation for
USB driver set-up. If you did not set up the port during
MPLAB IDE installation, see the section in this readme file on
USB Port Setup.
*****************************************************************
-----------------------------------------------------------------
Table of Contents
-----------------------------------------------------------------
4. What's New/Updated
5. USB Port Setup
6. Powering the MPLAB ICD 2 and Target Board
7. Setting Up the MPLAB ICD 2 and Target Board
8. PIC18C601/801 Users
9. Known Problems
10. Important Notes
12. Reserved Resources
http://www.electronic-engineering.ch/microchip/faq/Readme%20for%20MPLAB%20ICD%202.txt (1 of 17)12/02/2008 17:32:09

-----------------------------------------------------------------
-----------------------------------------------------------------
Debugger
--------
dsPIC30F2010 PIC16F767 PIC18F248 PIC18F4610
dsPIC30F2011* PIC16F777 PIC18F2510 PIC18F4620
dsPIC30F2012* PIC16F785* PIC18F2515 PIC18F4680
dsPIC30F4013 PIC16F873A PIC18F2585 PIC18F6620
dsPIC30F6013 PIC16F877A PIC18F4331 PIC18F67J10*
PIC12F629! PIC16F913* PIC18F442 PIC18F8390
PIC12F635! PIC16F914* PIC18F4420 PIC18F8410
PIC12F675! PIC16F916 PIC18F4431 PIC18F8490
PIC12F683 PIC16F917 PIC18F4439 PIC18F8520
PIC16F627A! PIC18C601 PIC18F4455 PIC18F8525
PIC16F628A! PIC18C801 PIC18F448 PIC18F8585
PIC16F639* PIC18F2220 PIC18F452 PIC18F8627
PIC16F648A! PIC18F2320 PIC18F4520 PIC18F8680
PIC16F688! PIC18F242 PIC18F4550 PIC18F87J10*
PIC16F716! PIC18F2420 PIC18F458
PIC16F737 PIC18F2431 PIC18F4580
PIC16F747 PIC18F2439 PIC18F4585
Programmer

----------
dsPIC30F2010 PIC16F648A PIC18C801 PIC18F452
dsPIC30F3010 PIC16F685* PIC18F2220 PIC18F4539
dsPIC30F5011 PIC16F737 PIC18F2455* PIC18F6310
PIC10F200!! PIC16F785 PIC18F2525 PIC18F6620
PIC10F206!! PIC16F84A PIC18F258 PIC18F6680
PIC12F509 PIC16F870 PIC18F2585 PIC18F6722*
PIC12F510* PIC16F871 PIC18F2610 PIC18F67J10*
PIC12F675 PIC16F873A PIC18F4220 PIC18F8410
PIC16F627A PIC16F88 PIC18F4439 PIC18F8627
PIC16F628A PIC16F914 PIC18F448 PIC18F8720
PIC16F636 PIC16F917 PIC18F4510 PIC18F87J10*
PIC16F639 PIC18C601 PIC18F4515
* Indicates beta-support part(s) in this release.

! Header interface board required. See "MPLAB ICD 2 Header

Information Sheet", DS51292, for a list of available headers
by device number.
!! PIC10F2XX Universal programmer adapter required (AC163020).
-----------------------------------------------------------------
2. Operating System Support List
-----------------------------------------------------------------
This tool has been tested using the following operating systems:
Windows(R) 98 SE, Windows ME, Windows NT 4.0 SP6a Workstations
(NOT Servers), Windows 2000 SP4, Windows XP
-----------------------------------------------------------------
-----------------------------------------------------------------
The following documents may be found on our website or MPLAB IDE

CD-ROM:
* Using MPLAB ICD 2 Poster DS51265

* MPLAB ICD 2 User's Guide DS51331
* MPLAB ICD 2 Header Information Sheet DS51292
* Universal Programming Module Instruction Sheet DS51280
On-line help (Help>Topics) is also available for this tool:
* Debuggers>MPLAB ICD 2 hlpMPLABICD2.chm
-----------------------------------------------------------------
4. What's New/Updated
-----------------------------------------------------------------
- Preserve EEPROM data memory during programming.

- Many PIC18F SFR's previously reserved have been made accessible.
-----------------------------------------------------------------
5. USB Port Setup
-----------------------------------------------------------------
Execute the file specified below and follow the instructions in

the html text to set up the device driver:
C:\Program Files\Microchip\MPLAB IDE\ICD2\Drivers\<instructions>.htm
where <instructions>.htm varies depending on your PC OS:

Win 98: ddicd298.htm
Win ME: ddicd2me.htm
Win 2000/XP: ezicd2.htm
-----------------------------------------------------------------
6. Powering the MPLAB ICD 2 and Target Board
-----------------------------------------------------------------
NOTE: MPLAB ICD 2 must be powered BEFORE power is applied to the
target application.
MPLAB ICD 2 Power

-----------------
- Serial (RS-232) connection to the PC:
Power supply required.
- USB connection to the PC, target not powered from MPLAB ICD 2
or no target connected:
No power supply needed.
- USB connection to the PC, target powered from MPLAB ICD 2:
Power supply required. (USB cannot power both.)
Note: Plug in USB first, then power supply.
The MPLAB ICD 2 cannot be powered from the target board.
Target Board Power

------------------
The MPLAB ICD 2 can provide 5 V and up to 200 mA to a target if
the ICD itself is powered by a power supply. (USB cannot power
both.) This is enabled by checking "Power target circuit from
MPLAB ICD 2" (Debugger>Settings, Power tab).
Note: Plug in USB first, then power supply.
-----------------------------------------------------------------
7. Setting Up the MPLAB ICD 2 and Target Board
-----------------------------------------------------------------
Powering the Target Board from the MPLAB ICD 2

----------------------------------------------

1. Power the MPLAB ICD 2. DO NOT power the target.

2. Start MPLAB IDE.
3. Under the Debugger menu of MPLAB IDE, click Connect.
4. After establishing communications with the MPLAB ICD 2, select
Debugger>Settings.
5. In the Settings dialog, click the Power tab and ensure that
the check box for "Power target circuit from MPLAB ICD 2" is
checked. Click OK.
6. Now you should be able to erase and program components with the
MPLAB ICD 2.
Powering the Target Board from its own power supply

---------------------------------------------------
1. Power the MPLAB ICD 2. DO NOT power the target.

2. Start MPLAB IDE.
3. Under the Debugger menu of MPLAB IDE, click Connect.
4. After establishing communications with the MPLAB ICD 2, select
Debugger>Settings.
5. In the Settings dialog, click the Power tab and ensure that
the check box for "Power target circuit from MPLAB ICD 2" is
NOT checked. Click OK.
6. Power the target system and then Select Debugger>Connect.
7. Now you should be able to erase and program components with the
MPLAB ICD 2.
Self Tests
----------
If any of the self tests on the Status tab of the Settings dialog
do not say pass, you will not be able to erase and program your
device. Exception: if Vpp says low, you may still be able to
program if the voltage is more than the low value for the device
programming range listed in the device programming spec.
Generally, failed self tests will require further troubleshooting.

See on-line help for more information.
-----------------------------------------------------------------
8. PIC18C601/801 Users
-----------------------------------------------------------------
There is a folder called \ICD2 that was copied into the MPLAB IDE
installation directory. This folder has two files which can be

used with the PICDEM(tm) 18R demo board (DM163006):

SRAM16.HEX - allows program download to the static RAM
29F16016.HEX - allows program download to the flash memory
When using PICDEM 18R, you must use one of the files above in the
"Location of WriteProgramWord and EraseProgramMemory" dialog on
the MPLAB ICD 2 Advanced Dialog. Also, you must remember to do an
erase before programming as this is not done automatically.
For your own design, which probably has different programming

algorithms for the memory on your target, you must substitute
your own memory read/write routine in order for the MPLAB ICD 2
to download code. See the PICDEM 18R documentation for
information on writing your custom routines. These code routines
will be used to program your memory and care must be taken to
ensure they are relocatable and comply with the format used in
the included source files.
-----------------------------------------------------------------
9. Known Problems
-----------------------------------------------------------------
The following is a list of known problems. For information on
common problems, error messages and limitations, please see
Troubleshooting in the online help file for MPLAB ICD 2
(hlpMPLABICD2.chm).
SSR = System Service Request
* Communications
* General Issues
* SSR's
Communications
--------------
- If you are using MPLAB ICD 2 with USB communications AND a power
supply, plug in the USB first, then power supply.
- If you have problems with serial communications, see the

Troubleshooting section in the help file.
NOTE: You should have the FIFO disabled and hardware handshaking
enabled on the PC COM port properties.

- Select Start>Settings>Control Panel

- Double-click on System to open System Properties
- Open the Device Manager and find your COM port under Ports
- Open the Communications Port Properties dialog for this port
- Under Port Settings, choose "Flow Control: Hardware" for
hardware handshaking
- Open the Advanced Settings dialog and deselect Use FIFO buffers
- When first connecting to MPLAB ICD 2 using serial communications,

the default COM port is COM1. If you are using the MPLAB ICD 2 on
another COM port, Select Debugger>Settings, Communication tab to
set the appropriate COM port. Subsequent connections should be
established quickly.
- Check the MPLAB ICD 2 module revision number (10-00319-Rx, where

x is the revision number) if you are having communications problems.
If you have R9 through R11 and do not have an "ECO 2037" sticker
on your module, adding a 4.7k ohm resistor between the target RB7
and ground should fix the communication issue.
- If you do not use the included cable, make sure the cable you
use is not longer than the included cable or communication
errors could result.
- Do not plug both the USB cable and RS-232 cable into the MPLAB
ICD 2 pod. This will cause errors. Choose one form of ICD-to-PC
communication.
General Issues
--------------
- Using the USB connection on a laptop PC with suspend mode enabled

will lock up the MPLAB ICD 2 if suspend mode is entered. Unplug the
USB cable from the MPLAB ICD 2 and then plug the cable back in to
resume debugging.
You may want to disable suspend mode while using the MPLAB ICD 2.
From Control Panel, select Power Options and disable suspend mode.
- Care should be taken when programming the PLL. The PLL only
changes when power is first applied to the chip. If you are
programming the PLL for the first time, remove power from the
PIC18Fxxxx part after programming and reapply for the PLL to

be enabled. If you are reprogramming the device from PLL mode

to another mode, first reprogram with PLL off, then remove power
and reapply.
- If you have trouble when low voltage programming, add a

pull-down 10k ohm resistor to RB5.
- Numbers in the start and end address boxes (Debugger>Settings,

Program tab) must use the hex numbering convention (0x....).
- For PIC18F8720, MEMCON cannot be read if in a microcontroller

mode. This is a silicon issue.
- You may not be able to enter debug mode if power-up timer is

enabled for the following devices:
* PIC18F4620/4610/2620/2610
* PIC18F4680/2680/4681/2681
* PIC18F4550/2550/4455/2455
* PIC18F8490/8410/6490/6410/8390/8310/6390/6310
- For dsPIC30F device programming, the Universal Programming Module

cannot be used.
- MPLAB ICD 2 may not operate on a dual processor platform in

dual processor mode. It is recommend that you change the
application properties for MPLAB ICD 2 to single processor mode.
SSR's
-----
SSR 20230: Programming or reading a code-protected EEPROM memory

generates no messages by MPLAB IDE for MPLAB ICD 2 for a PIC12F675
device.
SSR 21119: Cannot program the external memory in the PIC18F8720

family.
SSR 21163: Programmer function: Cannot program PIC16F87x devices

in individual or in combinations of the memory areas without the
entire device being automatically erased.
SSR 21985: PCL register not displayed correctly.

SSR 22537: Cannot reset while running.
SSR 22683: Blank check fails after performing an erase on a

dsPIC30F6014 a2 device. Works OK for dsPIC30F6014 b0 device.
SSR 22835: When using XT mode with a canned oscillator, you

receive the warning, "Target not in debug mode", the debugger
will not work. Either select EC mode to use the oscillator or
use a crystal for XT mode.
SSR 24354: Freeze peripherals on Halt is checked and grayed, but

some peripherals do not freeze. This is a silicon issue.
SSR 24627: Lack of a device not detected on Erase; Erase appears

successful. To detect no device, do a Blank Check following
an Erase.
SSR 24936: For dsPIC30F devices, do not use power (Vdd) from ICD
unit. The power (Vdd) provided from MPLAB ICD 2 to the target
device is not sufficient for all programming operations of the
dsPIC30F device family. It is recommended that you provide power
on your own board and not to use power from the ICD.
SSR 26429: PIC16F913/914: Debug mode works up to 18MHz.
SSR 26433: PIC16F913/914: After selecting Clear All Memory

(Debugger>Clear Memory>All Memory), MPLAB ICD 2 loses communications
with device.
-----------------------------------------------------------------
10. Important Notes
-----------------------------------------------------------------
- If you modify Program Memory, you must reprogram the device.
- When running in debug mode, selecting Debugger>Reset resets the

program, goes to the zero location, and halts. The program does
not automatically re-run.
- While single stepping, the MPLAB ICD 2 will not respond to

interrupts.
- The SLEEP instruction cannot be used when debugging.

- The WDT cannot be used when debugging.
- USB hubs must be powered.
- When working with PIC18XXXX parts, debugging speed is improved

(breakpoints, single-step, etc.) if the General Purpose File
Register Window is closed. You can put any registers that need
to be monitored into a Watch Window, or view Special Function
Registers in the SFR Window.
MPLAB IDE updates information in visible sections of windows only,

unless otherwise specified. Therefore, the smaller the visible area,
the faster the updates and debugging speed.
- For PIC18Fxx20 devices, you must connect the AVDD and AVSS pins
for the devices to program.
- Make sure that table reads/writes are not code protected.
- In low voltage mode, bulk erase will not erase code protect
bits.
- MPLAB ICD 2, by design, has limited debug capabilities when

compared with an emulator. This is a price/feature trade-off.
If you need more complex debugging capabilities, the MPLAB
ICE 2000 for PICmicro device emulation and the MPLAB ICE
4000 for PIC18 and dsPIC device emulation are suggested.
Firmware
--------
- MPLAB ICD 2 has different OS's for different part families.

The ICD will, by default, automatically download the correct OS
as necessary.
- It is possible to turn off the automatic download feature in

Settings>Status. You will then be asked in a dialog if you wish
to download the OS.
Disabling the automatic download feature is NOT RECOMMENDED.

Serious errors may occur if your OS is not correct for your
selected device.

It is recommended that you download the MPLAB ICD 2 firmware

that was packaged with the version of MPLAB IDE being used on
your system.
dsPIC30F Devices
----------------
1) RB0 AND RB1 PINS:

IF MPLAB ICD 2 IS SELECTED AS A DEBUGGER, IT INITIALIZES ALL
THE A/D INPUT PINS - AN0 (RB0) THROUGH AN15 (RB15) PINS - AS
"DIGITAL" PINS, BY SETTING ALL 16 BITS IN THE "ADPCFG" REGISTER.
(A) IF YOU HAVE SELECTED A PAIR OF "DEBUG PINS" (EMUD/EMUC,

EMUD1/EMUC1, EMUD2/EMUC2 OR EMUD3/EMUC3) THAT ARE
MULTIPLEXED WITH A/D INPUT PIN FUNCTIONS ON THE PARTICULAR
dsPIC30F DEVICE BEING USED, THEN YOU MUST NEVER CLEAR THE
BITS IN THE "ADPCFG" REGISTER THAT CORRESPOND TO THOSE A/D
PINS.
FOR EXAMPLE, IF EMUD3 AND EMUC3 ARE USED AS THE DEBUG PINS
ON A dsPIC30F2010 DEVICE, THEN BITS 0 AND 1 OF THE ADPCFG
REGISTER MUST REMAIN SET AT ALL TIMES.
SIMILARLY, IF EMUD AND EMUC ARE USED AS THE DEBUG PINS ON
A dsPIC30F5011 DEVICE, THEN BITS 6 AND 7 OF THE ADPCFG
REGISTER MUST REMAIN SET AT ALL TIMES.
IN SUCH CASES, YOU MUST ALSO TAKE PROPER PRECAUTION TO
ISOLATE THE APPLICATION CIRCUITRY FROM THE CORRESPONDING
A/D PINS DURING DEBUGGING.
(B) IF YOUR APPLICATION NEEDS TO USE CERTAIN A/D PINS AS ANALOG

INPUT PINS, THEN YOUR CODE MUST CLEAR THE CORRESPONDING
BITS IN THE "ADPCFG" REGISTER DURING A/D MODULE
INITIALIZATION.
FOR EXAMPLE, IF AN4 AND AN5 ARE REQUIRED AS ANALOG INPUT
PINS, THEN BITS 4 AND 5 OF THE ADPCFG REGISTER MUST BE
CLEARED.
2) After programming a device, you must perform a Processor Reset.

This can be done either by selecting the
Debugger>Reset>Processor Reset command, pressing the F6 hotkey
or clicking on the Processor Reset button. This ensures that the
device oscillator is active before the program is run or
debugging operations are performed.

3) User RAM Usage: You must not use the following memory region
while using MPLAB ICD 2; 0x800 - 0x84F (i.e., the first 80
bytes of RAM). If the ICD is to be used for a particular
project, open the "Project>>Build Options>>Linker" dialog box
and check the "Link for ICD2" check-box.
4) File Registers / Special Function Registers / Watch window:

(a) It is recommended not to scroll the File Registers window
up or down. This may generate a Warning message. The busy
message that occurs at the output window indicates the
MPLAB ICD 2 is yet to complete the previous data fill request
and is thus not ready to execute the current scroll request.
To avoid this message, either keep the window small, or
use the Go To dialog, which can be accessed by right-clicking
on the File Registers window or pressing Ctrl+G.
(b) For viewing a small number of variables or Special Function
Registers, it is recommended to use the Watch window rather
than the File Registers, in order to avoid data transfer
delays (especially during single-step).
5) Programming Range:
On enabling MPLAB ICD 2, the Program End Address (Debugger>>
Settings>>End Address) is automatically set as low as possible
based on the Program Memory usage of each MPLAB IDE project.
This helps minimize the programming time.
6) SLEEP, IDLE, WDT, Clock Switching:

For dsPIC devices, debug operations can be executed on programs
which use SLEEP or IDLE mode, Watchdog Timer, and/or Clock
Switching.
7) Debug during SLEEP or IDLE Mode:

When the device is in SLEEP and IDLE mode and a Halt command is
issued, MPLAB ICD 2 will wake up the device and halt execution
on the instruction immediately following the PWRSAV instruction.
8) Interrupts:
(a) In general, single-stepping an instruction will not generate
an interrupt or trap, because the corresponding interrupt/trap
status flag bit would not get set. Essentially, the interrupt
or trap condition would be ignored.
(b) However, if the user has explicitly set an interrupt/trap

flag bit, either in the user program or by modifying the status

flag values in the MPLAB Watch, SFR or File Registers window,
then the interrupt/trap would get generated, and the user would
be able to single-step into the Interrupt or Trap Service Routine.
9) Break Point Behavior:

If a break point is set on an instruction that follows a taken
branch, the Breakpoint will be triggered even though the branch
went elsewhere.
10) Break Point Behavior and Skidding:

It is possible that a breakpoint halt will exhibit program memory
skidding in that the execution stops N instructions after reaching
the breakpoint. The following definitions are provided and
referred to:
(a) One skid - A breakpoint occurs AFTER the instructions is
executed (PC+2)
(b) Two skid - A break point occurs AFTER the NEXT instruction
(PC+4)
Break Point Behavior:

1) If a Non-Program-Flow, modifying, Single-Word, Two-Cycle
instruction (such as Table or PSV) precedes a break point
instruction, then the breakpoint occurs BEFORE the instruction
at the breakpoint address is executed (ONE SKID).
2) All other instructions have a "TWO SKID", which means the

break occurs AFTER the NEXT instruction is executed.
11) The CAN module, unlike the other peripherals, does not get
frozen in the following situations:
(a) during a Halt
(b) during a stop on a Breakpoint
(c) after a Single-Step
For example, if you set a Breakpoint and run to it, the CAN
module continues to run in the background, and it may seem
that data transmissions and receptions have completed
immediately.
12) DISICNT register:

In five dsPIC30F devices (dsPIC30F6010, dsPIC30F6011,
dsPIC30F6012, dsPIC30F6013 and dsPIC30F6014), since the DISICNT
register continues to decrement even when the device is halted

by the debugger, the DISICNT value will always be seen as 0x0000

in the Watch, SFR and File Registers windows. To monitor the
DISICNT value, add code to copy the DISICNT register contents
to a W register or memory location and monitor the value of the
corresponding W register or memory location in the Watch,
SFR or File Registers window.
13) ADCMD bit in PMD1 register:

The user application must not set the ADCMD bit (bit 0 of PMD1
register). This would lead to incorrect ICD operation.
14) SPLIM register:

If using MPLAB ICD 2 as a Debugger, your software must
initialize the Stack Pointer Limit register (SPLIM) before
using the stack.
15) Single-stepping a DO loop:

In five dsPIC30F devices (dsPIC30F6010, dsPIC30F6011,
dsPIC30F6012, dsPIC30F6013 and dsPIC30F6014), single-stepping
through a DO loop in dsPIC30F assembly code results in the
loop getting executed one less time than expected.
16) Firmware Download:

If MPLAB ICD 2 is not actually hooked up to a dsPIC board,
then the debugger will (by default) assume that you need to
use a Rev A3 device. As a result, MPLAB ICD 2 will then
download (or prompt for a download if Automatic Download is
disabled) the firmware for Rev A3 devices.
Then, if a board with a Rev B1 device is connected to
MPLAB ICD 2, it will detect the Rev B1 device and will download
the firmware for Rev B1 devices.
Alternatively, if a board with a Rev A3 device is connected to
MPLAB ICD 2, it will detect the Rev A3 device and no firmware
download will be performed (since the firmware for Rev A3
devices has already been downloaded).
17) Multiple Breakpoints:

Up to two breakpoints may be enabled simultaneously on
dsPIC30F5011/5013 and dsPIC30F6010/6011/6012/6013/6014 devices.
18) Pass Counter feature in Advanced Breakpoints:

For a specified Pass count of 'N', the code will break after
'N+1' occurrences of the breakpoint instead of 'N' occurrences.

19) If you need to use the Fail-Safe Clock Monitor feature on a

dsPIC device when using the MPLAB ICD 2 for debugging your
application, a Watchdog Timer Device Reset will occur, even
if the Watchdog Timer has not been explicitly enabled in the
application. To work around this issue, use the "CLRWDT"
instruction in the main loop of your application code. This
will ensure that the Watchdog Timer gets cleared before it
causes the device to reset.
-----------------------------------------------------------------
-----------------------------------------------------------------
MPLAB IDE Support

-----------------
Supported on MPLAB IDE v6.xx and greater.
Jumper Select for Programmer Function

-------------------------------------
The Universal Programming Module (UPM) allows the MPLAB ICD 2

to be used as a device programmer for supported product DIP
packages.
In-Circuit Serial Programming (ICSP) signals from the MPLAB ICD 2

are routed to seven wires soldered to the UPM at J3.
J3 Connector
-------------------
Vpp - Program Power
Vdd - Power
Vdd - Power
GND - Ground
GND - Ground
PGD - Program Data
PGC - Program Clock
You then jumper these wires to the appropriate pins of the

40-pin header, comprised of pins 1-20 and pins 21-40, which
correspond to the pins of the ZIF socket (U1). For information on

which pins to jumper, please refer to the programming specification

for the device you will be programming.
Devices should be aligned to the top of the ZIF socket (pin 1

of all devices should be aligned to pin 1 of the ZIF socket).
Refer to the device's data sheet for pinouts.
Both programming specifications and data sheets may be found on

our website or on the MPLAB IDE CD-ROM.
Setting up the UPM in MPLAB IDE

-------------------------------
Make sure that the programmer options are correct for your target
device.
- Make sure the MPLAB ICD 2 is connected (Programmer>Connect).

- Select 'Programmer>Settings' and select the 'Power' tab.
- Check the 'Power target circuit from MPLAB ICD 2' box, and press
the 'Apply' button. Ensure that 'Target Vdd' is at least 4.5v
(press the 'Update' button if necessary)
- Select the 'Program' tab of the ICD Programmer Properties dialog
box. Configure your target device as desired. Press 'OK' when
done.
Programmer operations are now available. Insert the device to be

programmed into the UPM ZIF socket and connect the signals wires
per the previous section.
-----------------------------------------------------------------
12. Reserved Resources
-----------------------------------------------------------------
Due to the built-in in-circuit debugging capability of ICD devices,

and the ICSP function offered by the Debugger, the MPLAB ICD 2
uses on-chip resources when debugging, i.e., some device resources
are reserved for use by MPLAB ICD 2.
Refer to the on-line help for the most up-to-date list of resources
used by the MPLAB ICD 2.

Blocked ,WEBCAPTURE
Blocking user agent ,WEBCAPTURE as of 2/12/08 8:31:52 AM
http://www.piclist.com/techref/microchip/pages.htm12/02/2008 17:32:14
Freeware Microchip PIC C Compiler
HI-TECH FOR MICROCHIP COMPANY NEWS PRODUCTS SUPPORT DOWNLOADS PURCHASE RESOURCES
Products>C Compilers>-- PICC-Lite
LATEST NEWS
2008-02-09
Beta Release: HI-TECH C
PRO for the PIC32 MCU
Family
2007-12-19
HI-TECH Software in EDN
Microchip's most popular PIC microcontrollers have a powerful Hot 100 Products of 2007
FREE ANSI C compiler.
Soon to be available is the fully-featured HI-TECH C PRO for the PIC10/12/16 MCU Family ANSI C
Visit HI-TECH Software at
Compiler that comes with Omniscient Code Generation. booth 935.
HI-TECH PICC-Lite v9.60PL1 Compiler
HI-TECH Software has provided this freeware HI-TECH PICC-Lite compiler as a tool for hobbyists and
students, but the licence allows its use for commercial purposes as well. It is ideal as a teaching tool for an
introduction into the 'C' language and embedded programing on a Microchip device. The selected
processors were chosen for this compiler due to their popularity.
Omniscient Code Generation:

The HI-TECH PICC-Lite compiler is a freeware version of our industrial-strength HI-TECH PICC STD
compiler available for Windows, Linux and Mac OS X. The HI-TECH PICC-Lite compiler is the same in every as featured in EDN Hot 100
respect as the full HI-TECH PICC STD compiler, except that it has support for only a limited subset of Products of 2007.
processors, there are some limitations on the amount of memory that can be used and source code for the
http://microchip.htsoft.com/products/compilers/PICClite.php (1 of 7)12/02/2008 17:32:22
standard libraries is not provided. The supported processors and their limitations (if any) are shown below.
Due to program memory constraints, support for printing floating-point and long data types via printf family
functions is not included.
Microcontroller Limitations
All Baselines
No Limitations
New!
12F629 No Limitations
12F675 No Limitations
16C84 No Limitations
16F627 2 RAM banks supported CUSTOMERS FEEDBACK
16F627A 2 RAM banks supported Your support has been
16F684 1 RAM banks, 1K program memory supported helpful as usual. I've never
16F690 2 RAM banks, 2K program memory supported regretted our purchase of ...
R.A.S.
16F84A No Limitations
16F877 2 RAM banks, 2K program memory supported
16F877A 2 RAM banks, 2K program memory supported
16F887 New! 2 RAM banks, 2K program memory supported More from our customers...
16F917 New! 2 RAM banks, 2K program memory supported

PARTNERS
Embedded Development Environment
New to this release of HI-TECH PICC-Lite is our powerful integrated development environment, HI-TIDE 3.
HI-TIDE 3 has been designed to seamlessly integrate with HI-TECH PICC-Lite and provides a total HI-TECH Software proudly
development system complete with project manager, editor, code creation tool and debugger. HI-TECH supports the Microchip brand
Software provides HI-TIDE 3 free of charge for use with HI-TECH PICC-Lite. For more information about HI- with high quality C compilers.
TIDE 3, please see the HI-TIDE 3 product page. Visit the Microchip
Technology website for more
information.
HI-TECH PICC-Lite vs HI-TECH PICC STD Comparison Table
In effort to help customers identify and understand the differences between our HI-TECH
PICC-Lite and HI-TECH PICC STD compilers, we have developed a comparison table.
To determine which compiler best suits your project's needs, simply compare the two against
the features listed below.
HI-TECH PICC-Lite HI-TECH PICC STD

Supported Support for only a limited Support for all Microchip
Devices subset of Microchip PICmicro 10/12/14/16/17

PICmicro microcontrollers. series of microcontrollers.
Memory Usage Limitations on the amount No limitations on the
of memory that can be amount of memory that
used. can be used.
Source Code Not provided Provided
for Libraries
Printing No Yes
Floating Point
Printing Long No Yes
Data Types
HI-TIDE 3 Yes Yes
Technical Available. However, Includes 90 days access
Support requests will be treated as to free priority technical
a lower priority. support and one free
update.
HI-TECH Priority
Access ensures that
customers receive 12
months priority technical
support and web access
to updates during that 12-
month support period.
Royalty-Free Yes Yes
Output
Guarantee Free HI-TECH Satisfaction
Guarantee - 30-day
money back guarantee.

Price Free Only US$950
Downloads
You may copy and redistribute this software, providing it remains in the same archive file. You may use this
software for any purpose. No warranty of any kind is provided, and all use is entirely at your own risk. Full
details of the licence under which it is supplied are provided within the download.
To install the Mac OS X version; save the demo to your system, then run the self installing archive file. For
further information, please refer to our support forum.
Compiler
N.B. Only those microcontrollers listed above are supported.
Windows (Including Vista)
HI-TECH PICC-LITE HI-TIDE 3 (compiler not

V9.60PL1 (4.1 MB) included) V3.13 (69.7 MB)
Linux

HI-TIDE 3
HI-TIDE 3
(x86_64)
HI-TECH (compiler
(compiler
PICC-LITE not
not
V9.60PL1 included)
included)
(6.3 MB) V3.13 (52.8
V3.13 (52.4
MB)
MB)
Mac OS X
HI-TECH PICC-LITE HI-TIDE 3 (compiler not

V9.60PL1 (3.2 MB) included) V3.13 (52.1 MB)
Manual
HI-TECH PICC-LITE (V9.60PL1)
Release Notes
HI-TECH PICC-LITE (V9.60PL1)
Conditions of Use
HI-TECH Software has provided this freeware HI-TECH PICC-Lite compiler as a low-cost tool for hobbyists
and students, however the licence allows its use for commercial purposes as well. It is ideal as a teaching
tool for an introduction into the 'C' language and embedded programing on a Microchip device. The selected
processors were chosen for this compiler due to their popularity.
You may copy and redistribute this software, providing it remains in the same archive file. You may use this
software for any purpose. No warranty of any kind is provided, and all use is entirely at your own risk. Full

details of the licence under which it is supplied are provided within the download.
Associated Development Tools from Partner Organisations
Microchip's PICkit 2TM Debug Express enables in-circuit

debugging on selected PIC microcontrollers. (purchase
from Microchip Direct)
StaccatoTM for
PICkit 2 Debug
Express (purchase
from Mapletech
Productions)
Mapletech Productions has collaborated with Microchip Technology Inc and HI-TECH Software to provide
Staccato for Microchip's PICkit 2 Debug Express (purchased separately). Harness the power of Staccato
for your PIC Micro-based embedded products, using HI-TECH's PICC C Compilers, with either Microchip's
MPLAB IDE or HI-TECH's HI-TIDE IDE. Learn this powerful C-Language method of programming your PIC
Microcontrollers now!
Copyright 2008 HI-TECH Software Trademarks Site Map

http://www.brouhaha.com/~eric/pic/faq.txt
PIC-FAQ
This Version Produced: 29 Jun 1995 01:28:42 GMT
Last Modified: 29 Jun 1995 01:27:23 GMT
The following topics are addressed:
0 ) Index <You're reading it>
1.0) ABOUT THIS FAQ

1.1) Who put this FAQ together?
1.2) How can I contribute to this FAQ?
1.3) What newsgroups will this FAQ be posted to?
1.4) Mailing lists of interest to PIC wranglers
1.5) Other FAQs of possible interest
1.6) Can I distribute this FAQ or post it somewhere else?
2.0) ABOUT THE PIC

2.1) The PIC micro controller
2.2) PIC variants
2.3) PIC contacts and representatives
3.0) PIC Utilities

3.1) FTP sites for the PIC
3.2) BBSs that support the PIC
3.3) Programming languages (3rd Party)
3.4) Programming hardware (3rd Party)
3.5) Programming Hardware (D.I.Y.)
4.0) PIC DOCUMENTATION

4.1) Periodicals that cover the PIC
4.2) Books on the PIC
4.3) Miscellaneous documentation on the PIC
5.0) Notes for programmers

5.1) Useful Code Routines [Index]
6.0) Attributions
------------------------------
1) ABOUT THIS FAQ
http://www.brouhaha.com/~eric/pic/faq.txt (1 of 43)12/02/2008 17:32:30

------------------------------
1.1) Who put this FAQ together?
Many moons ago, on an internet far away, the cry went out out;
"Lo, seekers of wisdom abound and verily there is a plethora of sources

with information to impart, but alas, the references to the relevant
incantations and significant associations of discrete components are
widespread throughout the land and obfuscated by dissemination....
What we need is an idiot^H^H^H^H^H, er, champion to sally forth and
tidy these Augean stables. [own shovel required]"
Your humble scribe heard the cry and thought "Hey, while I'm growing
this beard, I've got *bags* of spare time. I mean, not shaving must
save *hours* a month. I'll give it a try."
[Filed under..yet another triumph for enthusiasm over experience.]
The boring version;
I had been lurking on the PIC mailing list for a while, when Jory Bell
asked if anyone would care to sort through the info he had archived and
produce an FAQ file from it and I volunteered, thinking that as the list
was relatively low-volume there would not be much involved.
Hah !
If you like it, good ! Drop me a line.
If not, write and tell me what changes you would like to see.
------------------------------
1.2) How can I contribute to this list?
Please, if you have any suggestions corrections or additions,

notify me by E-MAIL. : Tom@takdsign.demon.co.uk Thank you.
------------------------------
1.3) What newsgroups will this FAQ be posted to?
This FAQ will be posted to the following newsgroups:

sci.electronics
comp.robotics
comp.realtime
sci.answers
comp.answers
news.answers
Archive: rtfm.mit.edu : <plus all mirror sites>

/pub/usenet/comp.answers/microcontroller-faq/PIC
/pub/usenet/sci.answers/microcontroller-faq/PIC
/pub/usenet/news.answers/microcontroller-faq/PIC
And the PIC mailing list.
The schedule for posting will be monthly
------------------------------
1.4) Mailing lists of interest
To subscribe to the PICLIST mailing list;

Mail to: listserv@mitvma.mit.edu
Header: () leave blank, not used.
Text: SUBscribe PICLIST to subscribe
or UNSUBscribe PICLIST to un subscribe
or HELP to get help
or INFO REFCARD for a listserve reference card
The pic list address is: PICLIST@mitvma.mit.edu
To receive the mailing list as a digest, send a message to the
listserv@mitvma.mit.edu
In the body of the message have the single line:
SET PICLIST DIGEST
------------------------------
1.5) Other FAQs of possible interest

Other Microcontroller FAQs
Subject: 8051 microcontrollers

Newsgroups: comp.realtime
comp.robotics
sci.electronics
/pub/usenet/comp.answers/microcontroller-faq/8051
/pub/usenet/sci.answers/microcontroller-faq/8051
/pub/usenet/news.answers/microcontroller-faq/8051
Maintainer: Russ Hersch
Email: sibit@datasrv.co.il
Subject: 68hc11 microcontrollers

Newsgroups: comp.realtime
comp.robotics
sci.electronics
/pub/usenet/comp.answers/microcontroller-faq/68hc11
/pub/usenet/sci.answers/microcontroller-faq/68hc11
/pub/usenet/news.answers/microcontroller-faq/68hc11
Subject: Microcontroller primer and FAQ

Newsgroups: comp.sys.intel
comp.realtime
comp.robotics
sci.electronics
alt.comp.hardware.homebuilt
/pub/usenet/comp.answers/microcontroller-faq/primer
/pub/usenet/sci.answers/microcontroller-faq/primer
/pub/usenet/news.answers/microcontroller-faq/primer
Additional FAQs of interest
Subject: Robotics
Newsgroups: comp.robotics

Maintainer: Kevin Dowling

(412)268-8830
Email: nivek@ri.cmu.edu
Smail: Carnegie Mellon University
The Robotics Institute
Pittsburgh, PA 15213
Subject: Electronics
Newsgroups: sci.electronics
Comments: There are a number of FAQs available in this newsgroup
on various subjects. Among some of the subjects covered
are: LCDs, stepper motors, etc.
FAQ subject: Real-time

Newsgroups: comp.realtime, comp.answers, news.answers
Archive: rtfm.mit.edu : pub/usenet/comp.realtime
Maintainer: Mark Linimon
Lonesome Dove Computing Services
Roanoke, Virginia
Email: linimon@nominil.lonesome.com.
Subject: Motorola 68K microprocessor line

Newsgroups: comp.sys.m68k
Archive: bode.ee.ualberta.ca : pub/motorola/general
ftp.luth.se : /pub/misc/motorola/faq
file name of archive is m68kfaq?.zip (? is version)
Maintainer: Robert Boys - Ontario, Canada
Email: r.boys@genie.geis.com
or
fboys@uoguelph.ca
For more information on various microcontrollers and their features,

refer to the Microcontroller primer and FAQ listed above.
------------------------------
1.6) Can I post this FAQ to my local BBS?
I am putting no restrictions on the use of this FAQ but please,
* * * * * * * * * SEE COPYRIGHT NOTICE AT END OF FAQ * * * * * * * * * * *

REMEMBER ! If you choose to upload this FAQ to any BBS or ftp site,
then *YOU* are responsible for updating it regularly.
Otherwise, I'LL TELL YOUR MOTHER WHAT YOU DID !! ;-)
------------------------------
2.0) ABOUT THE PIC micro controller
The PIC series are eprom based 8-bit micro controllers

developed by Microchip Technology
------------------------------
2.1) The PIC micro controller
Back in 1965, GI formed a Microelectronics Division, and indeed used this

division to generate some of the earliest viable EPROM and EEPROM memory
architectures. As you may be aware, the GI Microelectronucs Division were
also responsible for a wide variety of digital and analog functions, in the
AY3-xxxx and AY5-xxxx families.
GI also generated a 16 bit microprocessor, called the CP1600, in the early

70s. This was a reasonable microprocessor, but not particularly good at
handling i/os. For some very specific applications where good i/o handling
was needed, GI designed a Peripheral Interface Controller (or PIC for short),
in around 1975. It was designed to be very fast, since it was i/o handling
for a 16 bit machine, but didn't need a huge amount of functionality, so its
microcoded instruction set was small. Hopefully, you can see what's
coming....yes, the architecture designed in '75 is substantially the PIC16C5x
architecure today. Granted, the1975 version was manufactured in NMOS, and was
only available in masked ROM versions, but still a good little uC. The
market, however, didn't particularly think so, and the PIC remained designed
in at a handful of large customers only.
During the early 80s, GI took a long hard look at their business, and
restructured, leaving them to concentrate on their core activities, which is
essentially power semiconductors. Indeed they are still doing this very
successfully now. GI Microelectronics Division became GI Microelectronics Inc
(a wholly owned subsidiary), which in 85 was finally sold to venture capital
investors, including the fab in Chandler, Arizona. The venture capital
people took a long hard look at the products in the business, and got rid of

most of it - all the AY3- and AY5- parts and a whole bunch of other stuff,
leaving the core business of the PIC and the serial and parallel EEPROMs and
the parallel EPROMs. A decision was taken to restart the new company, named
Arizona Microchip Technology, with embedded control as its differentiator
from the rest of the pack.
As part of this strategy, the PIC165x NMOS family was redesigned to use one
of the other things that the fledgling company was good at, i.e. EPROM - the
concept of the CMOS based, OTP and eraseable EPROM program memory PIC16C5x
family was born.
Contributed by Alex R. Baker <alex@microchp.demon.co.uk>
Actually, the PIC architecture was first integrated by Signetics for a

company in San Jose (Scientific Memory Systems as I recall) using Bipolar
technology and dubbed the 8X300.
Prior to that, the architecture had been a scientific curiosity since its
invention by Harvard University in a Defense Department funded competition
that pitted Princeton against Harvard.
Princeton won the competition because the MTBF of the simpler single memory
architecture was much better, albeit slower, than the Harvard submission.
With the development of the transistor and IC's the Harvard Architecture is
finally coming into its own.
Microchip has made a number of enhancements to the original architecture,

and updated the functional blocks of the original design with modern
advancements that are in concert with existing architectural processes and
enabled by the low cost of semiconductors.
Contributed by Len Umina <umina@kirk.mchip.com>
------------------------------
2.2) PIC Variants
PIC processors are available in three families, which Microchip refers to as

the PIC16C5x, PIC16Cxx, and PIC17Cxx families.
PIC16C5x: 12 bit program word size, 33 instructions, 2 level stack,

no interrupts

Program Data Max. Voltage Typical Digikey

memory memory I/O freq. Range Current Price
(words) (bytes) pins (MHz) (Volts) (mA) (US $)
---------- --------- --------- ----- ----- -------- ------- -------
PIC16C54 512 25 12 20 2.5-6.25 2 4.39
PIC16C54A 512 25 12 20 2.5-6.25 2
PIC16CR54 512 ROM 25 12 20 2.0-6.25 1
PIC16CR54A 512 ROM 25 12 20 2.0-6.25 1
PIC16C55 512 24 20 20 2.5-6.25 2 5.44
PIC16C56 1024 25 12 20 2.5-6.25 2 5.03
PIC16C57 2048 72 20 20 2.5-6.25 2 6.24
PIC16CR57A 2048 ROM 72 20 20 2.0-6.25 1
PIC16C58A 2048 73 12 20 2.5-6.25 1
PIC16Cxx: 14 bit word size, 35 instructions, 8 level stack

---------- --------- --------- ----- ----- -------- ------- -------
PIC16C61 1024 36 13 20 3.0-6.0 ? ?
PIC16C64 2048 128 33 20 2.0-6.0 3 11.05
PIC16C65 4096 192 ? 20 ? ? ?
PIC16C71 1024 36 13 16 3.0-6.0 2 14.38
PIC16C73 4096 192 ? 20 ? ? ?
PIC16C74 4096 192
PIC16C84 1024 EE 36 + 64 EE 13 10 2.0-6.0 2 10.15
PIC16C61 (18 pin DIP, 18 pin SOIC) available now?

PIC16C65 (40 pin DIP, 44 pin PLCC) under development
PIC16C73 (28 pin DIP, 28 pin SOIC) under development
PIC17Cxx: 16 bit word size, 55 instructions, 16 level stack:

---------- --------- --------- ----- ----- -------- ------- -------
PIC17C42 2048 256 33 25 4.5-5.5 6 15,15
PIC17C44 8192 480 33 25

Notes:
1. Program memory is EPROM unless otherwise noted.

2. Data memory is number of usable bytes, not including special function
registers.
3. Digikey prices are quantity 10 prices for 4 MHz DIP packaged OTP parts
with RC oscillator option (where applicable), except that the 16C84 uses
EE PROM program memory, and the slowest speed 17C42 is rated at 16 MHz.
4. Prices are from Digikey catalogue number 943 for May/June 1994.
Other distributors often have lower prices, but typically also have
high minimum order requirements. Digikey also usually has plenty of
parts in stock. Windowed EPROM parts cost substantially more.
------------------------------
2.3) PIC contacts and representatives
I don't know what Country these are in for sure.
ED Teck. Pubs tel:407-454-9905

Fred Eady BBS:407-454-3198
Writes articles for popular magazines.
Has a PIC programmer kit for $70.
Protel tel:1-800-544-4186
Builder of EASYTRAX, which is a free-ware bbs:1-408-243-0125
PCB drawing Package
Call Ext 225 ask for Louise Markham.
..............................
Australia
Microchip Technology tel:61 03 890 0970
Product information
HarTec Limited tel: (03) 268 9000

205a Middleborough Road fax: (03) 899 0819
Box Hill, Victoria
3128
Distributor

MicroZed Computers tel:61 67 722 777

296 Cook's Road fax:61 67 728 987
Armidale, NSW
2350
Stamp Products
Technology Affair tel:61 9 246 4810

Carine, WA fax:61 9 246 4809
Pic Tools
..............................
Austria
Wilke Technology tel:49 241 15 4071
Aachen fax:49 241 15 8475
Stamp products
..............................
Belgium
G.S.E. tel:32 41 77 51 51
Soumagne fax:32 41 77 53 53
Stamp Products
..............................
Canada
Aerosystems International tel:514 336 9426
St. Laurent Quebec fax:514 336 4383
Stamp Products
AP Circuits BBS 1-403-291-9342
Can download EASYTRAX(V2.06), various utilities, GERBER file

proofers, etc. You can upload PCB files and they will make
boards and ship to you in about week. (about $100)
..............................
Czech Republic
MITE tel:42 49 5813 252
Hradek Kralove fax:42 49 5813 260
Stamp Products
..............................
Denmark
High Tech Horizon
Asbogatan 29 C fax: +46 431 108 81
S-262 51 Angelholm e-mail: cj@aristotle.algonet.se
SWEDEN

WWW : http://www.algonet.se/~cj/catalog.html
Stamp Products
..............................
Finland
High Tech Horizon
Asbogatan 29 C fax: +46 431 108 81
SWEDEN
Stamp Products
..............................
France
Arizona Microchip Technology SARL tel:33 01 6930 9090
2, Rue Du Buisson aux Fraises fax:33 01 6930 9079
F-91300 Massy, France
Product information
Selectronic tel:33 20 52 98 52
Lille Cedex fax:33 20 52 12 04
Stamp Products
..............................
Germany
Arizona Microchip Technology GMBH tel:49 089 609 6072
Alte Landstrasse 12-14 fax:49 089 609 1997
D-8012 Ottobrunn, Germany
Product information
Arizona Microship Technology GmbH tel:~49-89-627-144-0

Gustav-Heinemann-Ring 125 fax:~49-89-627-144-44
Munich
D-81739
Sales Office for Central & Eastern Europe.
Area Sales Manager is Mr. W.R. Hollon.

Aachen fax:49 241 15 8475
Stamp products
Metronik GmbH
Leonhardweg 2 Tel: +49 89 61108 0
D-82008 Unterhaching Fax: +49 89 6117686
Rutronik GmbH

Industriestrasse 2 Tel: +49 7231 8010

D-75228 Ispringen Fax: +49 7231 82282
Semitron W. Roeck GmbH

Im Gut 1 Tel: +49 7742 8001 0
D-79790 Kuessaberg Fax: +49 7742 6901
Future Electronics Deutschland GmbH

Postfach 1152 Tel: +49 89 95727 0
D-85765 Unterfoehring Fax: +49 89 95727 173
..............................
Greece
Peter Caritato & Associates tel:30 1 902 0115
Athens fax:30 1 901 7024
Stamp Products
..............................
Hong Kong
Microchip Technology Inc. tel:852 410 2716
Unit No. 2520-2525 fax: 852 418 1600
Tower 1, Metroplaza
Hing Fong Road, Kwai Fong
N.T., Hong Kong
Product information
..............................
Hungary
HUMANsoft tel:36 1163 2879
Budapest fax:36 1251 3673
Stamp Products
..............................
India
AL Systems tel:91 422 232 561
Coimbatore fax:91 422 213 849
Stamp Products
..............................
Israel
Elina Electronic Ltd tel:972 3 498 543
Tel Aviv fax:972 3 498 745
Stamp Products

..............................
Italy
Product information
No further information is available at this time
..............................
Japan
Microchip Technology International Inc. tel:81 45/471-6166
Shinyokohama Gotoh Bldg. 8F, 3-22-4 fax:81 45/471-6122
Shinyokohama, Kohoku-Ku, Yokohama-Shi
Kanagawa 222 Japan
Product information
Akizuki Denshi Tsusho Ltd tel:81 3 3251 1779

Tokyo fax:81 3 3432 4492
Stamp Products
..............................
Korea
Product information
..............................
Netherlands
Antratek tel:31 1803 17666
Nieuwerkerk A/D ljssel fax:31 1803 16664
Stamp Products
..............................
Norway
High Tech Horizon
Asbogatan 29 C fax: +46 431 108 81
SWEDEN
Stamp Products
..............................
Portugal
DIGICONTROLE tel: 351-1-80 57 30
Av. Eng. Arantes e Oliveira 5 2D 351-1-848 4542
OLAIAS 1900 LISBOA fax: 351-1-849 0373
Electronic Distributor, including PIC's

..............................
Singapore
Microchip Technology tel: 65 222 4962
Product information
..............................
South Africa
PACE Electronic Components tel:011-9741211 (JHB)

Microchip (official agent)
Jakanaka tel:27 11 907 8475

Alberton fax:27 11 907 9426
Stamp Products
..............................
South Korea
Prochips tel:82 2 849 8567
Seoul fax:82 2 849 8659
Stamp Products
..............................
Switzerland
Aachen fax:49 241 15 8475
Stamp products
..............................
Sweden
High Tech Horizon
Asbogatan 29 C fax: +46 431 108 81
SWEDEN
Stamp Products
..............................
Taiwan

Product information

United Tech Electronic Corp. tel:886 2 647 1978

Taipei Hsien fax:886 2 648 1895
Stamp Products
..............................
U.K.
Arizona Microchip Technology Ltd tel:44 062-885-1077
Unit 3, Meadow Bank, Furlong Rd fax:44 062-885-0178
Bourne End, Bucks SL8 5AJ
Product information
Eiger Technologies Ltd., tel.44 0928 579009

14 Howard Court, fax.44 0928 579123
Manor Park, Runcorn, Cheshire, WA7 1SJ
Microchips 'Official' UK Distributors
Hawke Components Ltd., tel.44 0256 880800

26 Campbell Court, fax.44 0256 880325
Bramley, Nr Basingstoke, Hants RG26 5EG
Microchips 'Official' UK Distributors
Milford Instruments tel:44 977 683 665

South Milford, Leeds fax:44 977 681 465
Stamp Products
Polar Electronics Ltd., tel.44 0525 377093

Cherrycourt Way, fax 44 0525 853070
Leighton Buzzard, Bedfordshire LU7 8YY
Microchip 's 'Official' UK Distributors
Contact for details of the PIC Owners Club
..............................
U.S.
Bell Industries tel:1-800-525-6666

Maryland, 1-800-274-6953
Columbia
Electronic Distributor, including PIC's
Digi-Key tel:800 344 4539

Thief River Falls, Minnesota fax:218 681 3380

Stamp Products and general parts
FAI tel:1-800-303-5701
Ask for Chris
Electronics distributor, carry PIC's,
Link Computer Graphics tel:301-994-6669

Programmer CLK-3100
Micro Engineering Labs tel:(719) 520-5323

makes PIC-Proto boards
Myriad Development tel:(303) 692-3836

CCS - C compiler
tel: (414) 781-2794 extension 30
Micro Engineering Labs tel:719-520-5323

Box 7532 Colorado Springs, CO 80933
Has proto-type boards and demo kits,
Good source of info, can do manufacturing, etc
Microchip Technology Inc. tel:(602) 786-7200

2355 West Chandler Blvd. fax:(602) 899-9210
Chandler, AZ 85224-6199
Product information
Needham Electronics tel:(916) 924-8037

I don't know if they make PIC stuff, fax:(916) 972-9960
but they make an EPROM programmer, the PB-10 bbs:(916) 972-8042
Their emp-20 is great for Pics,Pals,Gala,EEproms etc but is ~$500

It can be set to auto program on start up. It takes about 4 seconds
for a bat file to reassemble the source with new EQU's from the
command line, recompile and program a part.
Parallax Inc. <ftp.parallaxinc.com>

3805 Atherton Road, Ste. 102 fax:(916) 624-8003
Rocklin, CA 95765 USA bbs:(916) 624-7101
Stamp Products Help 916-624-8333
A selection of development tools for PIC microcontrollers,
including assemblers, simulators, C compilers, programmers, in-circuit

emulators. All tools run on IBM PC computers.

Also the "RC"and "JW" versions of the PICs and prototyping boards.
e-mail address, info@parallaxinc.com

orders@parallaxincom
FTP URL ftp://ftp.parallaxinc.com/pub/
WWW URL http://www.parallaxinc.com.
------------------------------
2.4)
------------------------------
3) PIC Utilities
PICSTART-16B-1
Features
Supports only 16C5x, 16C71, and 16C84
comes with chips to play with.
has a zif socket
software includes an assembler with powerful macro capabilities

and a powerful debugger (both support INHX8M, INHX8S, and INHX16
file formats)
PICSTART-16C
Features
Same as 16B except *only* for 16C64 and 16C74.
------------------------------
PARALLAX
--------
Features
Parallax's own instruction set Their assembler takes either the
standard instructions or parallax 's 8051-like pseudo instructions.
needs only a 360k floppy, MS DOS 2.1, 128K RAM, mono.

simulator software.
These assemblers work with many other programmers.
PASM (5x), PASMX (xx), & PSIM, the emulator, are available free,
via the BBS, FTP & WWW sites.
------------------------------
3.1) FTP sites for the PIC
FTP SITE Directory
ftp.ultranet.com /biz/mchip
alias ftp.ultranet.com/microchip
This is Microchip's own FTP site
Mirrored on;
ftp.mrc-bbc.ox.ac.uk /pub/microchip
The web address is http://www.ultranet.com/microchip

http://www.ultranet.com/biz/mchip also works
Parallax's ftp site for stamp and pic files

ftp.parallaxinc.com
WWW URL http://www.parallaxinc.com.
ftp.funet.fi (nic.funet.fi) /pub/microprocs/PIC
wpi.wpi.edu /stamp
ftp.luth.se /pub/misc/microchip
ftp.oak.oakland.edu
ftp.uni-erlangen.de,
directory
[ /mounts/epix/public/pub/Multimedia/VideoCrypt
/microcontroller/microchip.bbs ]
Maintained by:
Markus Kuhn <mskuhn@cip.informatik.uni-erlangen.de>
A new www page has been established by Andrew M. Errington;

http://www.lancs.ac.uk/people/cpaame/pic/pic.htm
The PIC page can be accessed directly or from:
http://www.lancs.ac.uk/people/cpaame/cpaame.htm
Both pages are 'under construction' and may include references to things
that don't exist, as yet.
------------------------------
3.2) BBSs that support the PIC
Microchip BBS
Contact by dialling the same number you would use to get to
Compuserve at 19200,n,8,1, except that you press +<CR> at the
(garbage) prompt, followed by MCHIPBBS as the host (instead of CIS).
Don Lekei BBS

(Canada) (604) 597-3479
Parallax BBS,
(U.S.) (916) 624-7101.
------------------------------
3.3) PIC programming languages (3rd Party)
Host m/c PC
Prog. Name ASPIC Shareware PIC assembler (reg = $100 CDN ($69 US))
**DESIGNED** for embedded controller design
the shareware license has an unusual clause absolving
those who only use it for non-commercial purposes
Supplier/Author Don Lekei < 72677.2623@compuserve.com >

BBS at (Canada) (604) 597-3479
Features - One assembler for 16c5X, 16c6X, 16c7X, 16c8X, 17c42

- Compatible with PICSIM (MPSIM)
- Compatible with MAKE, and with auto-error tracking editors

- Many times faster than PICALC (MPALC)

- Standard base notation (Intel & Motorola format)
- CODE and FUNCTION macros
- Auto register bank management
- Text/data translation
- Automatically generates RETLW tables for text / data tables
- Built-in version management and assembly control functions
- user command-line switches
- many other features
-character set translation (eg. for LED,LCD,On Screen Displays)
- bit labels, environment labels, etc.
..............................
Host m/c PC i386 /MS DOS/SunOS 4.1.1/NeXTSTEP 3.0.
Name B.LO.C release 1.0, version 4.0

Available for the PIC16CXX and PIC17CXX
Supplier
Butterfly Signal Processing Inc.
131 Bloor Street West #200-154
Toronto, Ontario, Canada M5S 1R8
TEL: +1.416.929.5754
FAX: +1.416.968.7492
Features
`C-like' syntax
Locally optimal code generation
Superfast, one-pass compilation
Zero stack and memory space used
Produces fully annotated, easy-to-read assembly code to facilitate
simulation
Regular and in-line functions supported
B.LO.C and assembly routines can be mixed
In-line assembly code inclusion
For more information contact Anees Munshi
asm@kalam.butterfly.com <may bounce>
butterfly!asm@kanchenjunga.eecg.toronto.edu
asm@eecg.toronto.edu
..............................
Host m/c Macintosh
Prog. Name uASM

Supplier
Micro Dialects Inc,
PO Box 190,
Loveland, OH 45140,
Ph: 513/271-9100.
Features:
An integrated text editor, assembler
and communications modules. fully supports macros,
automatic labels, local labels, conditionally assembly,
includes to 10 level deep.
The editor supports up to 10 open files at a time, full
search and replace including grep searches,
file size limited only by RAM available.
The emulator supports data transfer up to 38,400 baud.
NOTE: The uASM code is incompatible with the MicroChip Simulator

<unless you know better ? >
..............................
Host m/c PC ?
C5x compiler C5x series

C71 compiler
Features
-libraries for RS232 serial I/O and precision delays
-allow call trees deeper than the hardware stack
Supplier
CCS 414-781-2794 ext.30
PO Box 11191
Milwaukee, WI 53211
(you leave your message on an answering machine)
Also from
Parallax Inc. <ftp.parallaxinc.com> fax:(916) 624-8003
3805 Atherton Road, Ste. 102 bbs:(916) 624-7101
Rocklin, CA 95765 USA Help 916-624-8333
Byte Craft Limited supply a C compiler for the PICs. A demo version for
the 17C42 is available ( assembly file generation only ).
MPC.ZIP <ftp.parallaxinc.com>

pricing:
GBP 695 / GBP 660 for members of the PIC owners club.
$795(US)
Contact:
Byte Craft Ltd., tel. (519) 888 6911
421 King Street North, fax (519) 746 6751
Waterloo,
Ontario,
Canada N2J 4E4
In UK Pentica Systems Ltd., tel. (44) 0734 792101

Oaklands Park, fax (44) 0734 774081
Wokingham,
Berkshire RG11 2FE
England
Also from
..............................
Host m/c PC
name: PSIM
Software Simulator: Simulate the PIC's internal operation on the PC.
Supports: 16C5x, 16C71, 16C84.

Features:
Set breakpoints
Single-step through code and modify registers
The simulator also controls the Parallax in-circuit emulators
[if present]
Filename is PSIM.EXE. on ftp site. <ftp.parallaxinc.com>

Also available PASM and PASMX assemblers.
------------------------------
3.4) PIC Programming Hardware (3rd Party)
Product programmer
Model Microburner 512
Supplier Baradine Products Ltd, tel:604 988-9853

PO Box 86757,
North Vancouver, BC CANADA V7L 4L3
Contact Garry Anderson <baradine@mindlink.bc.ca>
Features:
RS-232 terminal serial port compatible programmer
Supports communications up to 38,400 baud,
stand-alone or host operation, which can be from a 12VDC battery,
ie. if you're out at a remote site, standard 6 or 12 volt
batteries will do (even a car battery, but that's overkill!)
..............................
Product: emulators from GBP 350
programmers from GBP 200
Contact:
SMART Communications, tel:44 (0)81 441 3890
2 Field End, fax:44 (0)81 441 1843
Arkley, Barnet, Herts EN5 3EZ
England
..............................
Product Dataman Softy 4
Features:
With optional PIC module supports entire PIC16/17 range
Programs all chip specific features
Supports PICSEE
Programs from 1 word to whole memory
Disk of PIC support utilities included
Supports EPROMS, EEPROMS and Flash upto 8Mbits
Supports 16 bit EPROMS, EEPROMS and Flash upto 4Mbits
Supports serial EE 93 and 24 series
Easy to use
Free Support via Dataman BBSs in UK and USA
3 year warranty
Product Information:
The Dataman Softy 4 is the world's best selling handheld programmer.
With up to 4Mbit of internal memory, S4 can program EPROM, EEPROM and
FLASH devices of up to 8Mbit and 32 pins without adapters. The onboard
serial port can transfer files at up to 115200 baud from a host computer.
S4 also emulates memory devices of up to 4 MBit without additional hardware.
Using the optional PIC adapter set, all current members of the PIC16/17

family can be programmed. The Softy 4 is compatible with files produced

by Microchip and third party assemblers. Adapters are also available for
40 pin EPROMs, serial EEPROMs and 8751.
Others are in preparation.
Contact: Internet: Nigel@dataman.demon.co.uk
Dataman Programmers Ltd Tel:44 1300 320719

Station Road, Fax:44 1300 321012
Maiden Newton BBS:44 1300 321095
DORSET DT2 0AE Telex:418442 DATAMN G
United Kingdom
Dataman Programmers Inc. Tel: (407) 649-3335

22 Lake Beauty Drive Fax: (407) 649-3310
Suite 101, ORLANDO BBS: (407) 649-3159
FL 32806, USA
..............................
Product M2L EZ-EP Programmer and EP-PIC Adapter
Features: Inexpensive - base unit is only $149.95

PC Parallel port operation With optional EP-PIC adapter,
supports 16c54,55,56,57,58 16c71, and 16c84
Programs almost all chip specific features
Programs from 1 word to whole memory
Supports EPROMS, EEPROMS and Flash up to 8Mbits
Adapters available for other microcontrollers and 16bit
EPROMs
Free demo software and software updates via BBS (310/837-7818)
Product Information:
The EZ-EP is the world's best programmer for less than $200 (US). The
base unit programs E/EE/Flash EPROMs from 2716-27080. The EZ-EP is small
(3" x 6" x 1.5") and light (8 oz) so it is quite portable. It hooks to a PC
parallel port and adapters are available to do various microcontrollers
and etc. (68hc11, PIC, 8751, 16bit eproms, plcc eproms, serial eeproms).
Fastest programming modes are fully supported. Programs 27c010 in 23
seconds.
Pricing:
EZ-EP base unit $149.95
PIC adapter $49.95 (16c54,55,56,57,58,71,84)

EPLD adapter $59.95 (ICT 18v8,20v10,22v10)

8751 adapter $39.95
PLCC adapters $49.95
16bit adapter $49.95
8748 adapter $44.95
Contact: Internet: loving@cs.ucla.edu -or-

M2L.Electronics@f526.n102.z1.fidonet.org
M2L Electronics (voice 9am-1pm PST) tel:310 837-7818

3526 Jasmine #4 (BBS/FAX other hours)
Los Angeles, CA 90034
..............................
PIC16C5x Real-time Emulator List Price: $599.00US
Advanced Transdata Corp. tel: (214) 980-2960

14330 Midway Road fax: (214) 980-2937
Suite 104
Dallas, TX 75244
They also advertise gang programmers, etc. and may have a PIC17C42
product. It's worth a try, maybe, but if no-one tells *me* ? <shrug>
..............................
The Parallax Range
PIC16Cxx Programmer
Supports: 16C5x, 16C64, 16C71, 16C74, and 16C84.
Comes with Parallax and Microchip assemblers, a software simulator
and 18 and 28 pin LIF sockets.
Pricing:
Programmer (with docs. on disk only) $99
Optional
All cables, psu, and printed docs. $100
Adaptors
18/28-pin ZIF $69
40-pin ZIF (use with 16C64/74) $49
18/28-pin SOIC $129
20/28-pin SSOP $109
The BackDraft 17 Programmer

Supports: 17C42.

Comes with Parallax and Microchip assemblers, a software simulator

and 40 pin ZIF socket.
Pricing:
Programmer $199
Optional
PLCC adapter $129.
In-Circuit-Emulators
The ClearView '5x Supports: 16C5x

The ClearView 'xx Supports: "newer" PICs (via "personality" modules)
Features:
Both emulators allow the user to run code in-circuit at speeds
from 32-kHz to 20-MHz.
The user can set breakpoints, step through code and modify registers,
all while the code runs in-circuit.
The user interface is the same as the software simulator
but all execution occurs in hardware in real-time.
Pricing:
ClearView '5x $499
ClearView 'xx $499
Personality modules $100-$150
Filenames:
programmers
PEP.EXE (16C5x)
PEPX.EXE (16Cxx)
PEP17.EXE (17C42)
emulator
PSIM.EXE
All are included with the hardware products, and all
are available on the BBS and ftp site.

..............................
Serial Programmer/Demo board for $99 (US) [+carriage]
Simon Bridger Design; <s.bridger@auckland.ac.nz> tel:(64) 9 623 4081

Box 8128 Symonds St fax:(64) 9 623 4082

Auckland, New Zealand.
Production Programming (3 voltage) Algorithm

Serial In-system programming/reprogramming or socket on bd
Supports 2 different pieces of target hardware from single
programmers for easy master/slave project development
Hardware programs any 16cXX parts
(software currently for 16c84)
As well as being programmers, they also perform as
demo-boards with an rs232 port, and come complete with 16C84,
preprogrammed, and running a demo program
Circuits, overlays, code, demos, and BLOC demo etc from:
FTP site : ftp://ftp.std.com/pub/simon.bridger
..............................
Logical Devices Inc tel:800-331-7766

Programmer ALLPRO 88 tel:305-974-0967
Elan Digital Systems Ltd tel:(408) 946-3864

Programmer EF-PER 5000 Series Gang Programmer
ADVIN Systems Inc tel:408-984-8600
Programmer PILOT U40
BP Microsystems tel:800-225-2102
Programmer CP-1128 tel:713-461-4958
Data I/O Corp. tel:800-288-4965

Programmer Unisite with Site-48 module
Stag Microsystems tel:44-707-332-148

Programmer PP39
Maple Technology Ltd tel:44-666-825-146

Programmer MQP-200

Application Solutions Ltd tel:273-476608

Programmer PIC Programmer
Citadel Products Ltd. tel:44-819-511-848

Programmer PC-82
HI-LO Taiwan ? tel:(02) 7640215

Programmer ALL-03
Data I/O Corp. Japan tel:(03) 432- 6991

SMS Germany tel:49-7522-4460

Programmer Sprint Expert
Data I/O Corp. Europe tel:31(0)-6622866

Advanced Trans Data ???? tel:(214) 980- 2960

Programmer PGM16 & PGM 16x8 Gang Prog. fax:(214) 980-2937
------------------------------
3.5) PIC Programming Hardware (D.I.Y.)
PIC16C84 Programmer using PC parallel port.

Schematic, C and QBasic
source available from:
Microchip BBS:
In 3rd party library as PIC84PGM.ZIP
ftp://bode.ee.ualberta.ca
/pub/cookbook/comp/ibm/pic84pgm.zip

ftp://ftp.luth.se
/pub/misc/microchip/16c84/pic84pgm.zip
Contact: david.tait@man.ac.uk Author/Designer
..............................
A programmer designed by Henk Schaer.
Host: faui43.informatik.uni-erlangen.de
Location:
/mounts/epix/public/pub/Multimedia/VideoCrypt/microcontroller
FILE -rw-r--r-- 24693 Apr 7 1994 picprog.zip
Complete with software (EXE only).
..............................
A design by Mark Cox:
Host ftp://baldrick.eia.brad.ac.uk:
Location:
/pub/blowpic.zip
..............................
A design by Russ Reiss appeared in the article "Programming PICs on a Budget"
in the June 1994 issue (i.e. #47) of "Circuit Cellar Ink".
..............................
A Design published in ETI (Electronics Today International) magazine
By: Robin Abbott

37, Plantation Drive
Christchurch
Dorset, BH23 5SG
SPEC: Reads, programs, and verifies PIC 16C54, 55, 56, 57,
58, 64, 71, 74, 84 and any other upcoming 18, 28, or
40 pin PIC device which conform to the current PIC
serial programming specification.
Reads and programs EEPROM device data areas.
Fully supports user data area and configuration fuses.
Serial interface to host PC.
Windows host software available.
Loads and saves Intel hex , hex text and binary file
formats produced by Microchip Assembler (MPPASM).

Host software supports automatic device serialisation.
Cost to build Approx 35 GBP
This PIC programmer article was published in two parts:

ETI JUNE '95 : PIC Programmer Hardware.
ETI JULY '95 : PIC Programmer Software.
ETI (Electronics Today International)

- programming and construction articles
- ARGUS SPECIALIST PUBLICATIONS: tel. : (0442) 66551
- Argus House, Boundary Way, fax. : (0442) 66998
- Hemel Hempstead HP2 7ST,
- England.
Overseas & non-newstrade sales by Magazine Sales Department:
Back Issues available
Subscription Rates: (Published Monthly)
US Dollars Overseas $56.00 Sterling Overseas 31.00GBP
USA Subscription:
Wise Owl Worldwide Publications, tel. : (310) 375 6258
4314 West 238th Street, fax. : (310) 375 0548
Torrance, CA90505 USA
Visa/Mastercard orders in USA:
Pacific Time: 9am - 9pm Weekdays 10am - 6pm Weekends
(If you (can) order the article alone (not the entire magazine) bear )
( in mind that the PCB foils are usually at the back of the magazine,)
( and not in the article itself. )
If you send a blank 16C57XT/16C57JW and a cheque for the sum of 20GBP,
together with a SAE, the author will return the PIC programmed and a
3.5" high density floppy disk with the host software suitable for
Windows 3.1 or 3.11.
..............................
PROTO-TYPING BOARDS
Proto-typing boards from MicroEngineering Labs.

These boards have a large prototyping area,
With provisions for a PIC,oscillator circuit, and power supply.
For 18-pin PIC16Cxx devices $10

For 18/28-pin PIC16Cxx devices $15

For 40-pin PIC16Cxx devices $17
For 40-pin PIC17C42 $17
Available from Parallax inc.

..............................
PIC Experiment Board from Depew Engineering. $199
The Experiment Board supports 18 and 28 pin PICs, includes a solderless

breadboard area, clock generation circuit, RS-232 port,
I/O port status on LEDs and 7-segment displays,
5-volt power supply, and reset button.
The board has support circuitry for 8-pin EEPROMs and BASIC Stamp circuits.
Available from Parallax inc.
------------------------------
4.0) PIC DOCUMENTATION
------------------------------
4.1) Periodicals that may cover the PIC.
The Computer Applications Journal (Circuit Cellar Ink)

- POB 7694, Riverton, NJ 08077-8784
- FAX: (203)872-2204
- Voice orders: (609) 786-0409
- On-line orders (BBS): (203) 871-1988
- Email orders: ken.davidson@circellar.com
- $21.95, $31.95 surface Canada and Mexico,
$49.95 air all other countries
Computer Design
industry announcements and trends
One Technology Park Drive,
P.O. Box 990, Westford, MA 01886
(508)692-0700
The Computer Journal

- PO Box 535, Lincoln 96648

Dr. Dobbs Journal

- programming articles, concepts and designs
- 411 Borel Ave., San Mateo, CA 94402
- (415)358-9500
Electronic Engineering Times

- industry announcements and trends
- 500-B Bi-County Boulevard, Farmingdale, NY 11735
- (516)293-3000
ETI (Electronics Today International)

- ARGUS SPECIALIST PUBLICATIONS: tel. : (0442) 66551
- Argus House, Boundary Way, fax. : (0442) 66998
- Hemel Hempstead HP2 7ST,
- England.
Overseas & non-newstrade sales by Magazine Sales Department:
Back Issues available
Subscription Rates: (Published Monthly)
US Dollars Overseas $56.00 Sterling Overseas 31.00GBP
USA Subscription:
Wise Owl Worldwide Publications, tel. : (310) 375 6258
4314 West 238th Street, fax. : (310) 375 0548
Torrance, CA90505 USA
Visa/Mastercard orders in USA:
Pacific Time: 9am - 9pm Weekdays 10am - 6pm Weekends
Electronics Now
- construction articles
- Box 55115, Boulder, CO 80321-5115
- $19.97 one year
Elektor Electronics
- World Wide Subscription Service Ltd
Unit 4, Gibbs Reed Farm, Pashley Road
Ticehurst TN5 7HE, England
- 27 UK pounds
or
- Old Colony Sound Lab,
- P.O. Box 243, Peterborough, NH 03458
- Tel. (603) 924-6371, 924-6526

- Fax: (603) 924-9467

- $57 USA and Canada per year
Embedded Systems Programming

- programming and systems design articles
- Miller Freeman Publications
- 500 Howard St., San Francisco, CA 94105
- (415) 397-1881
Microcomputer Journal (formerly Computer Craft)

- programming and constructions articles
- 76 N. Broadway, Hicksville, NY 11801
- $18.95 one year, foreign $23.00, foreign air mail $76.00
Midnight Engineering
- 1700 Washington Ave., Rocky Road, CO 81067
- (719)254-4553
------------------------------
4.2) Books on the PIC
A Beginners Guide to the Microchip PIC Nigel Gardner

ISBN: 1 899013 00 8 Printed in the UK by Character Press Ltd.
Software (on floppy) and hardware guide. Debugging techniques...
Available from Polar Electronics in UK 19.95 UK Pounds
This is suitably titled as a *beginner's* guide. For those
with no previous microcontroller experience.
The PIC Source Book:

Curious about the inner workings of the BASIC
Stamp? Programming the PIC in assembly language? This book/disk
combination provides assembly-language source code cloned from more
than 30 BASIC Stamp instructions. Shows how to perform serial I/O,
read resistance, generate sounds, measure pulses, perform 16-bit
math, and more. The package costs $39 S&H.
Contact:Scott Edwards Electronics 72037.2612@compuserve.com

964 Cactus Wren Lane Tel: 602-459-4802
Sierra Vista, AZ 85635 Fax: 602-459-0623
CIS: 72037,2612
------------------------------

4.3) Miscellaneous documentation on the PIC
MicroChip Technology Incorporated - application notes
ED Teck. Pubs
Fred Eady
407-454-9905
BBS 407-454-3198
Writes articles for popular magazines. Has a PIC programmer kit for $70.
BBS available, good source of information, very helpful.
Parallax
Stamps and programmer, etc.
BBS 916-624-7101
Help 916-624-8333
AP Circuits
BBS 1-403-291-9342 (Canada)
Can download EASYTRAX(V2.06), various utilities, GERBER file proofers, etc.
------------------------------
5.0) Notes for programmers:
All PIC instructions are a single word. The equivalent of the

immediateaddress mode of other processors is the literal mode, used by
instructionsending in "LW", such as MOVLW, ADDLW, SUBLW, ANDLW, IORLW, XORLW,
and RETLW.The byte of data used by these instructions is directly encoded in
theinstruction itself.
All PIC instructions take a single instruction cycle (four oscillator cycles)
to execute, unless a conditional test is TRUE or the program counter is
changed as a result of an instruction, in this case the execution takes two
instruction cycles. For example:
movlw 37
goto next
next: movwf porta
The goto instruction takes two cycles (1 to get the value of label "next" and 1
to load that value into the program counter) This is useful as a two-cycle NOP,

and is often written as "goto .+1" to avoid the need for a label.
The W register is equivalent to the accumulator on other processors. Almost

all data movement, arithmetic, and logic operations use W.
Instructions that operate on W and a register (i.e., instructions ending in

"WF", like ADDWF and MOVWF) allow the result to be placed in either W or the
register (but not both). This is specified by a ",W" or ",F" after the
operand. The default is ",F", which will place the result in the register.
This can cause a lot of confusion if you're not careful, so I recommend
always specifying the destination explicitly. An example of a confusing
instruction:
incf foo,w ; w := foo+1 note that foo is unchanged!
If you want the result in both W and the register, you can use either:
incf foo,w
mowwf foo
or:
incf foo,f
movf foo,w
The stack is not accessible to the programmer in any way other than the
call and return instructions. There is no way to push or pull data, or even
to examine the stack pointer. On the 16C5x family the stack has only two
levels, so it is frequently necessary to write code in a different style than
would be used on a typical processor; you can only call subroutines from your
main code, or from a subroutine called from main, but no deeper. If you try
to make a 3rd CALL, the 2nd return address is over-written so that the return
from the 3rd CALL is OK but the return from the 2nd CALL ends up where the
1st CALL should return to.
The 16CXX parts which implement an 8 level stack do so in a circular fashion,

so that the 9th CALL over-writes the return address for the 1st CALL.
The 16C5x family doesn't have a normal return instruction; instead it has
RETLW, which stands for RETurn Literal Word. RETLW loads an eight bit
constant into W (just as a MOVLW instruction would), then returns from the
subroutine. This can be useful, but is aggravating if you want to return a
computed value. On the newer PIC families there is a normal RETURN

instruction.
With the exception of the 17Cxx family, there is no way for software to read
an arbitrary location of program memory. In order to implement lookup tables,
it is necessary to combine the use of the ADDWF and RETLW instructions. For
example, the following code implements a lookup table of the first four odd
prime numbers:
primes: addwf pcl

retlw 3
retlw 5
retlw 7
retlw 11
To use the table, load the appropriate index (in this case, 0 to 3) into W,
and "call primes". The addwf instruction adds the contents of W to the PC,
which has already been incremented to point to the "retlw 3". The table will
return with the value in W. The total time taken is 6 instruction cycles, or
24 oscillator cycles.
Note that while on most processors the use of an out-of-range index will
result in the use of incorrect data, but the program execution will continue
normally, on the PIC a bad index value will cause the execution of arbitrary
instructions!
i.e. the computed address must be in the top 1/2 of page.
Normally the index would range from 0 to the size of the table minus one,
but it is possible to use other ranges by putting the retlw instructions
somewhere other than immediately following the "addwf pcl". It is also
possible to implement tables using a "subwf pcl", or perhaps other
instructions with pcl as the destination.
The subtract instructions (SUBWF and SUBLW) work differently than most people
expect. SUBWF subtracts W *from* the contents of the register, and SUBLW
subtracts W *from* the literal. (SUBLW is not available on the 16C5x family.)
If you want to subtract a literal from W, it is easiest to use the ADDLW

instruction with the two 's complement of the literal. For example:
addlw 0feh ; w := w - 2
Some assemblers allow this to be written as:

addlw -2
There is no instruction to take the two 's complement of W (like the NEG
instruction on Motorola processors), but because of the way the subtract
instructions work you can use:
sublw 0
On the 16C5x family, the CALL instruction can only address the first 256 words
of a bank of program memory. It is common practice to use "call extenders",
which are simply GOTO instructions in the first 256 words with a target in
the last 256 words.
On the 16C57 and 16C58, if you plan to use indirect addressing (via the FSR
and IND registers), it is vitally important that your reset code clear FSR
before using any other RAM locations. Otherwise you may start up in an
arbitrary bank, and as soon as you change FSR all your carefully set up
variables will effectively disappear.
Contributed by Eric Smith <eric@apache.telebit.com>
------------------------------
5.1) Useful Code Snippets
5.101) ZERO THE 16C57 RAM

5.102) LONG CALL Macro
5.103) LONG GOTO Macro
5.104) DATA SWAP TRICK
5.105) MULTIPLE PRECISION ADDITION
------------------------------
5.101) ZERO THE 16C57 RAM
; The following code was written by Andrew Warren and is

; copyright (C) 1992 by Fast Forward Engineering. Permission
; is hereby granted for any non-commercial use so long as
; this copyright notice is retained.

MOVLW PORTA ;PREPARE TO ZERO ALL REGISTERS EXCEPT

MOVWF FSR ;THE PROCESSOR STATUS, PC, RTCC, AND FSR
;REGISTERS.
CLRRAM MOVLW 00011111B ;ARE WE POINTING AT "USEFSR"?

ANDWF FSR,W ;
SKPNZ ;IF NOT, SKIP AHEAD.
BSF FSR,BIT4 ;OTHERWISE, SKIP OVER THE PROCESSOR

;STATUS, PC, RTCC, FSR, PORTA, PORTB,
;PORTC, AND THE GLOBALLY-ACCESSIBLE FILE
;REGISTERS.
CLRF USEFSR ;ZERO THE REGISTER AT WHICH WE'RE

;POINTING.
INCFSZ FSR ;HAVE WE DONE THEM ALL?

GOTO CLRRAM ;IF NOT, LOOP BACK AND ZERO ANOTHER.
; ALL FILE REGISTERS ARE ZEROED AND WE'RE IN DATA SEGMENT 0.
------------------------------
5.102) LONG CALL macro

; "Long Call" macro. Invoked by "XCALL any_address".

; Thanks to Chris Dalla for pointing out the need for the "+2" and
; "+1" sums in the last two lines of the macro.
XCALL MACRO LABEL
DATA 010010100000B+STATUS+256*((LABEL>>9)&00000001B)
DATA 010011000000B+STATUS+256*(LABEL>>10)
LIST W=1 ;For MPALC/PICALC, make this an "E=2".
CALL LABEL

DATA 010010100000B+STATUS+256*((($+2)>>9)&00000001B)
DATA 010011000000B+STATUS+256*(($+1)>>10)
ENDM
------------------------------
5.103) LONG GOTO Macro

; "Long Goto" macro. Invoked by "XGOTO any_address".
XGOTO MACRO LABEL
DATA 010010100000B+STATUS+256*((LABEL>>9)&00000001B)
DATA 010011000000B+STATUS+256*(LABEL>>10)
GOTO LABEL
ENDM
------------------------------
5.104) DATA SWAP TRICK
by: Mike Keitz <mkeitz@bev.net>
Swapping W with a File (RAM) register (PIC 16Cxx) Sometime you need to swap
the data in W with that in RAM, a port, or a special purpose register (i.e.
W<->F). This may appear to be easy with a few MOV instructions and a
temporary RAM location, but when you sit down to code it you'll see that
it'll take *two* temporary locations and 6 instructions to shuffle the data

around using only MOVs. So, like many things with a PIC program, an
unconventional technique can be really useful... like this:
XORWF file,w
XORWF file,f
XORWF file,w
Try it on paper until you're convinced it will work. Remember that XORing
the W+F+F leaves a result of the original value of W (the two xors with the
same data cancel out, so the final result is W xor 0 = W). The sequence
affects the Z flag, of course (one that had a MOVFW in it would as well), but
not in a particularly useful way.
This will work as-is with a port which is set for all output. The port will
be read 3 times, but written to only once during the second instruction. If
the port has some bits set for input, the result left in W for the input bits
is probably going to be wrong. (I'll leave it to you to analyze the
situations when it happens to be right) A correct read of the input bits can
be done with a conventional MOVFW after the routine is used to update the
output bits.
Understanding this, I now present the logical extension: swapping two file
registers. This is tremendously useful to indirectly index two data sets at
the same time (didn't think that was do-able, eh?)
First, a conventional solution is worth considering:

MOVFW FSR ;(the special purpose register)
MOVWF tmp ;(a temporary location)
MOVFW fsr2 ;(a location defined to hold the alternate index)
MOVWF FSR
MOVFW tmp
MOVWF fsr2
This is 6 instructions, and requires a temporary location. If RAM is scarce

in your design (and it probably is, since you want to indirectly index two
data sets at once), consider using the W<->F method above...
The obvious approach is to use the routine above three times, assuming
you wrote it as a macro:
swapwf FSR
swapwf fsr2
swapwf FSR
So this is 9 instructions, but W is not affected, and no temporary RAM is

required. If you can tolerate losing the value in W while swapping the
files, then this shorter version will also work:
MOVFW FSR
swapwf fsr2
MOVWF FSR
This is a total of only 5 instructions, 1 less than the conventional method.
Allocating a temporary location to store W during the swap would add 2 more.
Everything is a trade-off, I suppose.
------------------------------
5.105) MULTIPLE PRECISION ADDITION
by: Mike Keitz <mkeitz@bev.net>
This trick concerns multiple precision addition (i.e. 16, 24, etc. numbers)
The ADDWF instruction adds two numbers, and sets the C flag if there is a
carry out. But there is no instruction that adds W+F+C to carry the carry
throught the higher bytes. There is an easy work-around for 16 bit numbers:
simply increment one of the numbers before adding if the C bit is set. This
is adequately detailed in the Microchip application notes, but I'll show it
here for reference:
add16 movfw datal ;Adds 16 bit number in datal and datah

addwf resultl,1 ;to resultl and resulth,
movfw datah ;leaving the result in resultl and resulth
;Following 3 instrs. are a primitive add with
;carry W+F+C -->F.
;C flag may not correctly represent
;carry out of W+F+C
skpnc ;If no carry...
incf resulth,1 ;If carry, add 1 to result.
addwf resulth,1 ;Done.
The problem with this technique is that it cannot be used for numbers larger
than 16 bits because the C flag will not be set properly at the conclusion
of the last 3 instructions. In particular, if resulth is FF and C is set
going in, C will be incorrectly clear at the conclusion of the operation.
(Don't you wish it was YOU and not your customer who was the first to try
that?) No big problem with the 16 bit add, the result will still be correct,
but the overflow won't be indicated.

The best way around this I could think of was to use this 4-instruction
sequence instead of the 3-instruction one above. I think there are other
4-instruction sequences that do essentially the same thing. Then a 24, 32,
etc. bit add can be carried out (pun intended?) by using this sequence for
the "middle" bytes. The faster skpnc/inc/add above can be used for the last
byte if having a proper carry out of the whole operation is not required.
; Add W to F with proper carry in and out.

skpnc
incfsz f,1
addwf f,0
movwf f
Although this has 2 conditional instructions, the execution time is always 4

cycles, if you're counting. (Another PIC rule of thumb: a skip instruction
and the one after it will always take 2 cycles, unless the instruction
possibly skipped is a goto or call)
------------------------------
6) Attributions
Thanks are due to the following who have contributed to this documention.
Jory Bell <jory@mit.edu>

Don Lekei <72677.2623@compuserve.com>
Eric Smith <eric@apache.telebit.com>
Jeff Dague <jpdague@iastate.edu>
Steven M. Davidson <davidson@its.bldrdoc.gov>
Ian King <iek@arrc.salf.ac.uk>
kalam ? <asm@kalam.butterfly.com>
David B. Thomas <davidson@its.bldrdoc.gov>
Martin Vuille <martin.vuille@synapse.org>
Alasdair MacLean <alasdair@aifh.ed.ac.uk>
Andrew Tucker <ast@halcyon.com>
Nigel Ballard <Nigel@dataman.demon.co.uk>
Timothy McDonough <timmed@ns.cencom.net>
Len Umina <Umina@Kirk.mchip.com>
<Umina@World.std.com>
Hank Riley <h1riley@umassd.edu>
Siegfried Grob <siegfried.grob@student.uni-ulm.de>

Andrew M Errington <a.errington@lancaster.ac.uk>

Henri Schultze <henri@fscz-md.boerde.de>
Tom Mornini <tmornini@parallaxinc.com>
Lance Walley <lwalley@parallaxinc.com>
Christer Johansson <cj@aristotle.algonet.se>
Ed Meyer <Ed_Meyer@mindlink.bc.ca>
Simon Bridger <s.bridger@auckland.ac.nz>
Fernando Soares <Fernando.Manuel.Ramos.Soares@uninova.pt>
Chris Madden <maddenc@itd1.ul.ie>
NOTE: .......If your name should be here, apologies. Let me know !
------------------------------
Disclaimer: Inclusion of any code samples in this document does NOT imply
any approval or guarantee as to the suitability of said samples for any
purpose whatsoever other than as a self-training aid. I.E. If it blows your
ICE, trashes your hard disc, wipes your backup, burns your building down or
just plain don't work, #### IT AIN'T MY FAULT #### In the event of judicial
ruling to the contrary, any liability shall be limited to the sum charged on
you by me for the aforementioned document OR nothing, whichever is the lower.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Except where otherwise stated, this document Copyright (c) 1994,95 by
T.A.Kellett, [T.A.K.DesignS Warrington UK ] all rights reserved.
This FAQ may be posted to any USENET newsgroup, on-line service, or BBS as
long as it is posted in its entirety including this copyright statement.
This FAQ may not be distributed for financial gain.
This FAQ may not be included in commercial collections or compilations
without express permission from the author(s).
_______________________________________________________________________________
Tom Kellett < Tom@takdsign.demon.co.uk >
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

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Rapid development of reliable embedded systems
The last date for registration on the second (and final) phase of the RapidiTTy Builder "Early Bird programme" is 14 March.
('EB2' provides you with approx. 2000.00 of RapidiTTy software - incl. RapidiTTy Professional - for just 395.00 + VAT)
Places on this programme are strictly limited (100 seats). A product brochure is available.
The RapidiTTy family from TTE Systems
RapidiTTy tools simplify, automate and accelerate the development of embedded

systems which are both reliable and resource efficient.
RapidiTTy family: Current versions and roadmap
Current product versions

Product release plans (and related events) in 2008
RapidiTTy FPGA 1.1
Why choose RapidiTTy FPGA 1.1?
http://www.tte-systems.com/products.php?gclid=CMyH9fOJv5ECFRjaXgod9ltV4Q (1 of 18)12/02/2008 17:34:06

TTE Systems
Introducing the PH 03 soft processor core

Licensing options
Purchase RapidiTTy FPGA
RapidiTTy Builder 0.8
Why choose RapidiTTy Builder 0.8?

Take a test drive
Phase 1 of early-bird registration (EB1: now closed)
Phase 2 of early-bird registration (EB2: open until 14 March)
Reserve your EB2 place
RapidiTTy FPGA Lite 1.0
Why choose RapidiTTy FPGA Lite 1.0?

Starter kits and related hardware
Download (free, no registration required)
RapidiTTy Lite 1.01
Why choose RapidiTTy Lite 1.01?

Starter kits and related hardware
Support and FAQ page
Download (free, no registration required)
Low-cost CD
RapidiTTy Professional 1.0
Towards RapidiTTy Professional 1.0
The RapidiTTy Education programme
RapidiTTy Education
TTE Systems
The RapidiTTy Preview programme
RapidiTTy Preview
Planned product releases and related event in 2008
February 2008
RapidiTTy Builder 0.8: Product release (Early Bird)
RapidiTTy Builder: Registration for "Early bird" (Phase 2) opens (closes 14 March)
RapidiTTy FPGA 1.1: Adds support for Virtex-4
March 2008
RapidiTTy Builder 0.9: Product update (Early Bird). Adds support for Cortex M3
RapidiTTy Lite 1.1: Product update. Adds further sEOS examples, improved installer
April 2008
RapidiTTy Builder 1.0: Full public release.
May 2008
Embedded Masterclass: Training events in London and Bristol. Free entry.
RapidiTTy FPGA 1.2: Product update.
June 2008

TTE Systems
RapidiTTy Builder 1.1: Product update.
July
20th EuroMicro Real-Time conference (Prague)
October
Embedded Systems Show (Birmingham, UK): Launch of RapidiTTy Professional.
Why choose RapidiTTy FPGA 1.1?
Developers of modern embedded systems have two main implementation options:
They can choose to employ a "commercial off-the-shelf" (or COTS) processor.
They can choose to implement their design using a "field-programmable gate array" (FPGA) and a "soft" processor core.
For developers interested in the COTS option, RapidiTTy Lite provides an excellent starting point.
As the cost of FPGAs continues to fall, the opportunity to implement embedded systems using soft processor cores is becoming of increasing interest. For developers who wish
to use such cores, RapidiTTy FPGA 1.1 has the following key features:
Includes the PH 03 soft processor core with an architecture that is familiar to many developers

TTE Systems
Provides extensive GDB-based debug support (e.g. breakpoints and single-step from C), fully integrated with the IDE
Minimises the effort involved in precise timing analysis (including worst-case execution time measurements)
Has a familiar, flexible RapidiTTy IDE, helping to ease the transition between COTS- and FPGA-based development
We say more about the features of RapidiTTy FPGA 1.1 below. However, you don't need to take our word for it: you can download RapidiTTy FPGA Lite (free of charge from
our storefront or directly from this website) and explore the features of our RapidiTTy FPGA products for yourself.
Introducing the PH 03 soft processor core
The RapidiTTy FPGA package includes a license for the full VHDL source code for the PH 03 "soft processor core".
The PH 03 soft core is a 32-bit design with 32 registers and a 5-stage pipeline.
A summary of the features of the PH 03 core
Compatible with the MIPS-I instruction set architecture
Operates with a CPU core frequency of up to 25 MHz
Predictable instruction execution time (each pipeline takes a single clock cycle)
Fully supported by RapidiTTy FPGA Lite and RapidiTTy FPGA
Minimal silicon real-estate
Low cost
Hardware specifications
8K bytes of Data and 8K Bytes of Code memory
A simple bus that allows other peripherals to be added to the core
An on chip 32-bit down-counter timer with underflow
A hardware debug unit
A 32-bit I/O port
UART
Further information about the PH 03 core is available in our PH product brochure.

TTE Systems
Information about education versions of the PH core is available on our Education page.
Product brochure
For further information about RapidiTTy FPGA 1.1, please refer to the brochure for this product.
User Guide for RapidiTTy FPGA 1.1
For further information about RapidiTTy FPGA 1.1, please refer to the User Guide for this product.
Links to "Rapid Development of Reliable Embedded Systems"
RapidiTTy FPGA provides partial support for the examples in PART G of the RD-DES book project.
Licensing options
Various licensing options are available for RapidiTTy FPGA 1.1
Our most popular licensing arrangement is what we call the "12-month / 1000-core" license. Briefly, this provides access to RapidiTTy FPGA 1.1 (including the PH 03
source) for use on a single desktop PC. The license lasts for 12 months, or until you have created 1000 products based on the PH 03 core. This cost of this license 1950.00 +
VAT.
The above text provides an informal summary of one of the licensing options for this product. For further details (or to discuss other licensing opportunities) please contact us.
Support
The purchase price of RapidiTTy FPGA 1.1 includes 12 months of e-mail support.
Purchase RapidiTTy FPGA 1.1
To purchase RapidiTTy FPGA 1.1 (or obtain further information), please contact us.

TTE Systems
Why choose RapidiTTy Builder?
What's the first thing you do when you install a new compiler or buy a new processor board?
We find that many of our customers tend to start gaining familiarity with a new development environment by setting up code to flash an LED. When we ask them how long it
takes to do this with a new set of tools, the typical answer is "before we had RapidiTTy Builder, it took around a day".
If we then ask them how long this process takes using RapidiTTy Builder, the usual reply is "around a minute".

TTE Systems
Of course, RapidiTTy Builder doesn't just help you to flash LEDs. The first release of this product (v0.8) provides:
A tightly-integrated tool suite with compiler, debugger and timing analysis
Full source code for two simple, resource-efficient operating systems (sEOS, TTCos) suitable for use in single-processor embedded systems
Full source code for the SC-TTCos operating system, for use with distributed (multi-processor) embedded systems interconnected using the controller area network
(CAN) bus.
An extensive suite of high-quality library code covering day-to-day tasks such as reading switches, controlling LCD displays, reading analogue-to-digital convertors, RS-
232 (UART) communications, using pulse-width modulation, etc.
A high-quality, flexible, library for Ethernet communications, fully integrated with the above operating systems
The TTE Builder engine which helps the designer integrate, customise and configure the library code to match the precise needs of the given application.
Full support for the examples in Part A and Part B of the RD-RES book project.
Support for ARM7 (LPC2xxx) targets.
Product brochure
For further information about RapidiTTy Builder, please refer to the brochure for this product.
Take a test drive with RapidiTTy Lite
We believe that RapidiTTy Builder provides a unique set of features which support the rapid development of reliable embedded systems, without requiring large memory or
CPU resources: for our customers, this translates directly into reduced development time and allows use of lower-cost microcontrollers.
You can try out some of features of RapidiTTy Builder by downloading RapidiTTy Lite (without charge and without the need to register).
Please note: RapidiTTy Lite contains a restricted set of code examples (for example, extensive library code for Ethernet and CAN is included with RapidiTTy Builder: these
libraries are not included with RapidiTTy Lite). In addition, RapidiTTy Lite does not include the TTE Builder engine (used in RapidiTTy Builder to support the rapid
creation of reliable custom code from the libraries): instead, code in RapidiTTy Lite must be assembled and tested manually.
Early-bird registration for RapidiTTy Builder (EB1)
The first release of RapidiTTy Builder (v0.8) will be in February 2008, under our "early bird" release programme.

TTE Systems
Early Bird Phase 1 (EB1) has now closed.
Customers who have registered (and paid for) a place on EB1 will receive their first products in the week beginning 11 February.
Early-bird registration for RapidiTTy Builder (EB2)
Full product pricing for RapidiTTy Builder 1.0 will be 495.00 + VAT per seat. This product will be released in April 2008.
The first release of RapidiTTy Builder (v0.8) is through our "early bird" release programme.
The second (and final) phase of the early-bird programme (EB2) will provide registered customers with access to v0.8 of this product at a cost of 395.00 + VAT per seat.
Under this programme, customers receive what we call "enhanced maintenance" (which includes provision of both minor and major product updates): this maintenance
continues for 12 months after RapidiTTy Builder 1.0 is released. This means that early-bird registrants receive v0.8, v0.9 and v1.0 of RapidiTTy Builder: they also
receive all available product updates and revisions to this product in the year following the release of RapidiTTy Builder 1.0.
Please note: Customers registered on the early-bird programme for RapidiTTy Builder will also receive copies of RapidiTTy Professional 1.0 when it is released in
October 2008. Maintenance of the professional product will also be provided (until the end of enhanced maintenance period). Full product pricing for RapidiTTy Professional
1.0 will be approximately 1495.00 + VAT per seat.
Summaries of the features of the early releases of RapidiTTy Builder are given below.
RapidiTTy Builder 0.8 provides:

TTE Systems
A tightly-integrated tool suite with compiler, debugger and timing analysis
Full source code for two simple, resource-efficient operating systems (sEOS, TTCos) suitable for use in single-processor embedded systems
Full source code for the SC-TTCos operating system, for use with distributed (multi-processor) embedded systems interconnected using the controller area network
(CAN) bus.
An extensive suite of high-quality library code covering day-to-day tasks such as reading switches, controlling LCD displays, reading analogue-to-digital convertors, RS-
232 (UART) communications, using pulse-width modulation, etc.
A high-quality, flexible, library for Ethernet communications, fully integrated with the above operating systems
The TTE Builder engine which helps the designer integrate, customise and configure the library code to match the precise needs of the given application.
Full support for the examples in Part A and Part B of the RD-RES book project.
RapidiTTy Builder 0.8 will support a limited number of LPC2xxx (ARM7) targets.
In March 2008, RapidiTTy Builder 0.9 will provide:
All the features of RapidiTTy Builder 0.8
Support for Cortex M3 targets

TTE Systems
In April 2008, RapidiTTy Builder 1.0 will provide:
All the features of RapidiTTy Builder 0.8
Additional support for a wide range of ARM7 and Cortex M3 targets
Reserve your early-bird place today
The RapidiTTy Builder early-bird programme provides our customers with an extended period of product evaluation, backed up by excellent technical support. This programme
also provides the opportunity for customers to influence the final feature set of the RapidiTTy Builder product. To encourage participation, we offer this programme at the
lowest possible cost. In return, we will ask for product feedback from members of the programme.
The success of our early bird schemes (for both parties) relies on the fact that we work with a small number of customers: the programme has two phases and there is a strict
limit of 100 places per phase.
Registration for the second (and final) phase of this programme ('EB2') is now open. This phase will close when we reach 100 places (or on 14 March 2008, whichever comes
first). The cost is 395.00 + VAT per seat.
After EB2 closes, pre-orders for RapidiTTy Builder 1.0 will be accepted at 495.00 + VAT per seat. The orders will be subject to standard maintenance arrangements (details
on request) and will not include copies of RapidiTTy Professional.
Places on the EB2 programme can be reserved by e-mail (bookings received by e-mail on the closing date will be honoured if we have space available): however, places will only
be confirmed when we receive your payment.

TTE Systems
Certain restrictions apply to bookings on this programme (for example, we reserve the right to limit the number of places booked by a single company, in order to ensure that
we receive feedback from a range of customers).
The limit of 100 seats on EB2 will be strictly enforced. To reserve your place on the EB2 programme, please contact us as soon as possible.

TTE Systems
Why choose RapidiTTy FPGA Lite?
RapidiTTy FPGA Lite provides an ideal starting point for developers who wish to explore the use of soft processor cores in the development of reliable embedded systems.
RapidiTTy FPGA Lite has all of the features of RapidiTTy FPGA with the exception that - in RapidiTTy Lite - the PH 03 core is released in encrypted form, under the terms
of a non-commercial license.
User Guide for RapidiTTy FPGA Lite
For further information about RapidiTTy FPGA Lite, please refer to the RapidiTTy FPGA Lite User Guide.
RapidiTTy FPGA Lite provides partial support for the examples in PART E of the RD-DES book project.
Starter kits and related hardware for use with RapidiTTy FPGA Lite
Starter kits for RapidiTTy FPGA Lite will be available shortly.
License
Installation and use of RapidiTTy FPGA Lite requires acceptance of the RapidiTTy FPGA Lite licence agreement.
Support?
No support is available for RapidiTTy FPGA Lite (sorry).

TTE Systems
Download
RapidiTTy FPGA Lite can be downloaded without charge from our storefront or directly from this website (no registration is required in either case).
Why choose RapidiTTy Lite?
RapidiTTy Lite 1.01 is a simple but complete development tool based on the industry-standard Eclipse IDE and incorporating a GCC ARM compiler. The compiler supports a
wide range of ARM-based processors.
RapidiTTy Lite 1.01 can be downloaded without charge from our storefront or directly from this website (no registration is required in either case).
A key feature of RapidiTTy Lite 1.01 is that the package includes a number of complete example programs which target the popular NXP LPC2129 processor. The
examples include a simple "real-time operating system" (sEOS). The examples match the cost-effective LPC-P2129 development board from Olimex Ltd: they can be
adapted for use with other boards (and other processors) without difficulty.
Developers who are new to embedded systems will find that RapidiTTy Lite 1.01 provides full support for the examples in Part A of the RD-RES book project. This provides
an easy way to gain familiarity with development techniques suitable for use with modern, resource-constrained embedded processors.
User Guide for RapidiTTy Lite 1.01
For further information about RapidiTTy Lite 1.01, please refer to the User Guide for this product.

TTE Systems
Starter kits and related hardware for use with RapidiTTy Lite 1.01
A complete starter kit for RapidiTTy Lite is available from SK Pang Electronics. This starter kit includes the RapidiTTy Lite CD. It also includes an Olimex LPC-LPCP2129
board plus Olimex USB-based (JTAG) debugger hardware and all necessary cables.
Various Olimex products are available in the UK from Cool Components.
In the Netherlands, you can buy Olimex LPC2129 boards and JTAG debuggers from Van Ooijen Technische Informatica.
In the US, you can buy Olimex LPC2129 boards from MicroController Pros Corporation, or from SparkFun Electronics.
Also in the US, you can buy Olimex JTAG debuggers from SparkFun Electronics.
A full list of the international distributors of Olimex products is available from the Olimex WWW site.
Download
RapidiTTy Lite 1.01 can be downloaded without charge from our storefront or directly from this website (no registration is required in either case).

TTE Systems
RapidiTTy Lite 1.01 on CD
RapidiTTy Lite 1.01 is also available on a low-cost CD from our storefront. Please note that the contents of the CD (setup files and program documentation) and product
license are identical to those available via the free download (we provide the CD option primarily for customers who have a very slow and / or unreliable internet connect and
cannot complete the download successfully).
Support and FAQ page
RapidiTTy Lite 1.01 is a free evaluation product and has no formal support programme (sorry).
Please refer to our RapidiTTy Lite 'Support and FAQ' page if you are having difficulty downloading, installing or using this product.
Th Support and FAQ page includes a facility for reporting suspected bugs or other issues.
License
Installation and use of RapidiTTy Lite 1.01 requires acceptance of the RapidiTTy Lite licence agreement.
RapidiTTy Professional
RapidiTTy Professional will be launched in October 2008.
RapidiTTy Professional will be based around our new TTE compiler, providing support for both "standard" C and Ctt (a version of the C language with highly-predictable
TTE Systems
timing behaviour). Further details will be released on this web site later this year.
Customers registered on the early-bird programme for RapidiTTy Builder will receive copies of RapidiTTy Professional 1.0 when it is released in October (without charge).
Members of the RapidiTTy Preview programme will have access to the first release of RapidiTTy Professional in June 2008.
Customers who purchase RapidiTTy Builder products this year will have the opportunity (if the wish) to upgrade to RapidiTTy Professional at low cost.
Please note that - while we will offer a cost-effective upgrade path in October 2008 - our "Professional" products are not intended as replacements for our "Builder" products
(indeed we plan to expand both our "Builder" and "Professional" ranges in 2009 and 2010).
The RapidiTTy Education programme
The RapidiTTy Education programme provides cost-effective access to RapidiTTy products for universities and colleges.
Please see our education page for further details of this programme as well as related information about course notes, textbooks and presentation slides.

TTE Systems
The RapidiTTy Preview programme
Launched in 2007, the RapidiTTy Preview programme provides registered members with an introduction to the use of time-triggered technology in resource-constrained
embedded systems, free training and access to beta versions of future products from TTE Systems.
The current phase of the RapidiTTy Preview programme will continue to operate until June 2009. However, this programme is no longer open to new members (sorry).
Existing members of the RapidiTTy Preview programme should already have received full information about product releases planned for 2008. If not, they can obtain this
information from their Preview contact.
About TTE Systems Ltd | Privacy statement | Trademarks
Copyright 2007-2008 TTE Systems Limited. All rights reserved.

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PICmicro Sites

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PICmicro Sites

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19 >
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picsystems
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Homepage of Johan Granzier

Jal Editor, Pic16F84 projects made with Jal, Electronics, Etching
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Take a look at my Car Alarm with a PIC16F84 microcontroller.
Dincer's PIC Page

microelectronics info for hobbyist

Informations about microelectronics, microcontrollers and other stuff I found interesting.
Andy Programming
View and get updates of current and future projects, download source code for both windows and dos.
Mat's electronics corner

Place for the electronics enthusiast.
Robotics UK
Welcome to robotics UK, i'll show you how to use a PIC in robotics
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jonathan's PIC ASM and PC Programming Project

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19 >

PICmicro Sites

PICmicro Sites
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PICmicros are low cost and have wide availability, large user base and an extensive
collection of application notes.
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A growing set of fully documented (PIC) microcontroller printed circuit board in uk. www.MotorPlaza.es
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http://www.topiccraze.com/topic?topic=picmicro (1 of 4)12/02/2008 17:34:47

PICmicro Sites
Spiffy PIC Stuff Run Your Car On Water

Wannabes: 1 - 8 of 8 Video Proof Of This
Spiffy stuff includes an LCD menu library (multi-choice,
'microchip controller projects' 1 review(s) Controversial New Fuel
string entry), a bootloader for PIC16F87xA that doesn't
use bank 0, and several other libraries (7-bit X 2 data projects with pic microcontrollers. Saving Technique.
(ASCII) storage, UART, SPI, 6-pin LCD, etc) all in C and www.Water-4-Fuel.com
chocolate labrador 1 review(s)
available under the GPL. Make MONEY!
chocolate labrador sells picmicro modules to the
hobby electronics market. Add
Westford MicroSystems - PIC projects in CCS C code
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2 review(s)
linux ekibi !! 1 review(s) ads to your website
A continually updated library of PIC projects written in
embedded linux !!
CCS C, each of which includes description, technical
reference, source code, and schematic diagram. the cebuano geek blog
my day to day adventures as a cebuano geek and
J.D.Petkov's homesite
technology aficionado (embedded systems,
MIDI related hardware applications, based on PIC mcu's programming, electronics and robotics) this blog
(in 'Hardware' section). contains my posts on technology, electronics and
programming.
Jerry Han's PIC MCU page
Collection of my PIC MCU projects, include a serial LCD/ www.zaisyu.com : cafepress.com
VFD backpack, LCD Terminal and PICNIC (A networked cute characters design on t-shirts, mugs, fridge
PIC). magnets, bags and so much more.
Mat's electronics corner How to get traffic to your site

Place for the electronics enthusiast. Trade links with an ever growing site to get more
traffic (visitors) to your site.
The Hobby Electronics from Japan
I have created this website to share with you the details dipmicro electronics
of my hobby, electronics engineering. electronic component webstore.
Embedded processor projects the silicon horizon inc.

A collection of my projects using different type of providing embedded controllers for hobbyist and
microcontroller. professional control.
MCUspace-Connecting PIC People with PIC

Resources
A collection of resources pertaining to the Microchip PIC
MCU family of microcontrollers.
Robotics UK
Welcome to robotics UK, i'll show you how to use a PIC
in robotics

PICmicro Sites
EHL elektronika
Free PIC downloader for W95/98/NT compatible with the
HI-TECH or Shane Tolmie bootloader for the PIC16F87x
processors.
Matlab Toolbox for Microchip microcontrollers

Generate C code automatically for dsPIC from a Simulink
model.
PIC 18F Series Microcontroller Kits

Low-cost PCBs, assemblies and kits featuring the latest
Microchip PIC 18F series microcontrollers. Specializing
in Ethernet, Linbus, CANbus, IrDA, GPS and 2-way
paging technologies and featuring surface-mount
designs.
PICMicro Pet Projects

Various PICMicrocontroller Pet Projects.
GNUPIC
GNUPIC is the open source project that aims to create
PIC developement tools.
Radu's Home Page - Hardware Projects

Microchip ICD 1 complete Project, Soft DTMF decoder,
Internet Plug and more.
Dincer's PIC Page

Andre's Electronic Projects

Various projects and experiments using a PIC.
PIC programmable Pocket Computers !!!

Powerful and programmable pocket computers based on
the FLASH PIC microcontroller.
Hollies PIC Projects

Microchip PIC microcontroller projects.
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A collection of websites about the Microchip PIC microcontroller and related projects. Welcome to WebRing, a place
example: jonathan's PIC ASM and PC Programming Project - **Updated 5/17/07** On where 260,000 web sites form
this web site you will find code, libraries, programs, and accompanying projects using PIC 40,000 communities visited by
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PICmicro Sites

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Pic Projects - First steps with the PIC Processors IDE's, Programmers &
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Add DRAM to 16F876, Cheap Keypad ) etc. www.fored.co.uk
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Community Stats to log in or register for a WebRing User ID. Conexin TCP/IP. Mdulos
Community Created 07/06/1998 Ethernet. Mdulos Radio.
174 active site(s) Easy to navigate with interesting sites. Marca Rabbit.
252 visits today www.matrix.es
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PICmicro Sites
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174 active site(s)
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Details
From: 20080129 To: 20080211 Redisplay
Date Ttl hits Page Vws Next5 List Next Prev Skip Skip Prv Random Go
20080129 831 480 75 405 33 6 3 14 4 291
20080130 693 406 102 304 46 9 2 13 2 215
20080131 751 399 74 325 39 8 1 3 2 299
20080201 628 366 79 287 26 7 0 3 1 225
20080202 763 448 78 370 55 17 6 15 3 219
20080203 516 318 92 226 32 4 0 3 2 157
20080204 653 354 90 264 80 23 6 10 1 179
20080205 678 402 92 310 17 13 1 7 1 237

PICmicro Sites
20080206 821 454 156 298 20 5 7 11 3 321

20080207 811 370 87 283 86 11 1 21 4 318
20080208 789 397 75 322 75 7 11 15 6 278
20080209 731 391 67 324 70 8 3 4 5 250
20080210 575 320 60 260 65 5 2 11 4 168
20080211 722 398 80 318 92 9 3 7 3 210
Average 711 393 86 306 52 9 3 9 2 240
Totals 9962 5503 1207 4296 736 132 46 137 41 3367

PICmicro Sites


PICmicro Sites Join This
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Asian singles seek love, dating and marriage. Join free today.. www. picmicro sites - free projects with microchip pic
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PICmicro Sites

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Survey [ Summarize threads ] Search ADC/DAC, motion, LCD, I/O,
Which of these Ethernet Low-Cost, Flexible,
statements best [ Summarize threads ] Search
C/C++ Program
describes your experience
www.tern.com
(s) with this Ring?
Only members who are logged Programming solutions
in may register a vote. You are for engineering and
either not logged in or not a
WebRing member. Use the manufacturing Flash,
Sign In link at top to log in or microcontroller, FPGA, SoC
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Computers & Internet, Hardware,

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atari 8-bit computer - watler's world

80x51 microcontrollers - proyek elektronika dan software - the electronic and so
picmicro sites - free projects with microchip pic micro
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PICmicro Sites (174 Sites, 37256 Hits) 07/06/1998
A collection of websites about the Microchip PIC microcontroller and related

projects.
80x51 Microcontrollers (43 Sites, 8720 Hits) 11/05/1999
Resources for 80x51 families of microcontroller and related embedded technologies.

http://dir.webring.com/rw?d=Computers___Internet/Hardware (1 of 4)12/02/2008 17:35:20
All Star Computer Dealers (5 Sites, 106 Hits) 11/26/2002
PC or Mac, desktop, laptop or notebook, Palm Pilot or digital camera. If you sell it, your site belongs in our ring.
Computer Equipment, Parts, Repairs, and Upgrades as well.
ARM core Ring (10 Sites, 475 Hits) 08/08/2000
All ARM7 & ARM9 related stuff
Australian Electronics WebRing (43 Sites, 1873 Hits) 11/16/1998
Featuring websites dedicated to Electronics as a hobby or business in Australia. This webring features sites with
free schematics, ideas, kit builders, magazines, manufacturers and parts suppliers. If your looking for any of the
above, or similar, within Australia, then this is the right ring for you.
Basic Stamp SX WebRing (19 Sites, 1471 Hits) 11/04/1999
BASIC Stamp computers, PIC microcontrollers, and related embedded technologies.
Computer Hardware (8 Sites, 106 Hits) 12/03/2001
This !tzalist ring is open to all computer hardware-related sites, including sites with computers and hardware
reviews, printers, monitors, cdrw's, cd drives, floppy disk drives, modems, scanners, dvd drives, networking cards
and hubs, graphics and sound cards, information, FAQs, and other resources. JOIN TODAY!!!
Computer Products for Sale (11 Sites, 235 Hits) 08/19/2001
List of merchants that sell computer products and accessories. From laptops to desktops. Digital cameras to printers
and scanners. If you sell computer products you belong in this ring so that if anyone is looking to purchase computer
products they will find it from a merchant in this ring.
Computers for Sale (8 Sites, 1762 Hits) 11/04/2005

Computers: New and refurbished PC's, laptops. Computer parts and accessories, computer surplus outlet, boards,
memory, games and more. If you're searching for computers for sale, deals, scratch and dent computers, online
specials and electronic store computer sales, this is the webring for you to find exactly the computer you're looking
for. Computer Safety Tip: From family photos to tax returns, many of the things you value and need most can be
found on your PC. To protect the security of your valuable documents, invest in an ant-virus program that will
automatically scan and clean files, e-mail messages, and downloads, as well as e-mail and instant message
attachments.
Custom Built PCs and Case Modding (4 Sites, 121 Hits) 11/02/2002
A place for sites about case modding, custom built computers, and and hardware hacking.
Discount Computer Shoppers (7 Sites, 138 Hits) 03/21/2001
This ring is for all computer resellers and discounters to list their website business. And for all potential computer
shoppers to browse and comparison shop for computers and computer hardware. Ring Master - Dave - www.
thebusinesstuner.com Computer Repair and Consulting, Abbotsford BC Canada
Electronic Products & Services (4 Sites, 65 Hits) 06/23/2001
Your one stop shop for all your electronic needs.
Game Boy (9 Sites, 477 Hits) 03/12/2001
GBBG Game Boy Beyond Games. A showcase for non game applications using the Nintendo GameBoy (Pocket,
Color and Advance). Tools, Products, Electronic circuits, Applications and Turnkey systems. Everything you need to
develop and deploy your Custom Interface for portable, embedded, networking, data acquisition, RS232, USB,
GPS, NMEA 0183, MIDI, data logger, test and measurement functionality. All in a robust, battery operated,
handheld pocket terminal.
68HCxx (30 Sites, 2127 Hits) 05/18/1999
Motorola 68HCxx microcontroller family and related embedded

technologies.
Network Related PIC Projects (4 Sites, 200 Hits) 04/13/2006

Getting the PIC Microprocessor to Interface with the Net. Sites with Info and up to date Links.
PC Hardware Webring (5 Sites, 53 Hits) 04/03/2000
PC/Mac Hardware sites with interest in video, sound, network, and physics cards along with info on printers,
processors, motherboards, and miscellaneous components.
SXmaster (17 Sites, 1253 Hits)
This WebRing is dedicated to the SX

microcontrollers.
AVR (132 Sites, 27486 Hits) 02/19/1999
AVR mcu related

sites
Sam Coup (13 Sites, 518 Hits) 02/23/1998
The Sam Coup Web Ring has been created to bring together the on line resources of the finest 8-bit computer
ever to come out of Swansea, UK. Amongst the sites you will find information, downloads and details of shows and
gatherings. There are emulators for Win32, Un*x and MacOS so even if your blue-footed friend is in the attic you
can still have some quality Sam time instead of working :-)
Zilog WebRing (14 Sites, 739 Hits) 11/06/1999
Resources for Zilog microprocessors and compatibles (e.g. Hitachi & Rabbit), and microcontrollers, and related
embedded technologies.
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PICmicro Sites

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Low cost PIC programmers and kits Many PIC chips, kits, books &
WebRing Rating Survey
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experience(s) with this Ring?
HI-TECH Software ANSI C Only members who are logged in may register a vote. You
Optimizing compiler for the entire range of Microchip PICmicro & are either not logged in or not a WebRing member. Use the
Sign In link at top to log in or register for a WebRing User ID.
dsPIC. microchip.htsoft.com
Amazing PIC programmer Easy to navigate with interesting sites.
www.flexipanel.com Easy to navigate with OK sites.
Free stock photos Easy to navigate but poor sites.

Create a free account and download high-res stock images for free. hard to navigate with great sites.
Dreamstime.com
hard to navigate with OK sites.
submit my vote

http://o.webring.com/hub?ring=picmicro&list&page=1 (1 of 4)12/02/2008 17:35:33
PICmicro Sites

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Pic Projects - First steps with the PIC Processors Beautiful Rhinoplasty Results
First steps with the 16F876 and other PIC processors, C & Basic, links, projects (LCD, VOIP Desk Phone, Over One Thousand
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Compile, Simulate, Program!
IDE's, Programmers &
BoumPower GB-PIC1 Game Boy Cartridge with Microchip PIC Development
www.fored.co.uk
Low-cost cartridge with PIC16F877 that provide full access to GameBoy ressource without knowledge of
GameBoy : Graphic screen 160x144 pixels, keyboard, memory, DC power, PIC program upload. Programming solutions
for engineering and
Rob's Electronics and PIC projects ** updated!!** manufacturing Flash,
* * new projects added 5/21/03 * * A few of the PIC microcontroller projects I've built with pictures and microcontroller, FPGA, SoC
sourcecode and schematics (soon). www.dataio.com
Microcontroller Units
Jerry Han's PIC MCU page Find Electronics Solutions
Collection of my PIC MCU projects, include a serial LCD/VFD backpack, LCD Terminal and PICNIC (A For Your Business. Get It
networked PIC). Done Now!
www.business.com
Radu's Home Page - Hardware Projects
Microchip ICD 1 complete Project, Soft DTMF decoder, Internet Plug and more....
Make MONEY!
Embedded processor projects
A collection of my projects using different type of microcontroller. Add
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Andre's Electronic Projects ads to your website
Various projects and experiments using a PIC.
Make MONEY!
Free projects with microchip PIC micro
Personal page with free projects using Microchip PIC microcontroller Add
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Ronald's Electronic Project Site ads to your website
A growing set of fully documented (PIC) microcontroller projects. All projects are fully documented including
software downloads.
The Hobby Electronics from Japan

I have created this website to share with you the details of my hobby, electronics engineering.

PICmicro Sites
Softelec - Free electronic & software design

Everything about PIC18 (Hardware programer, RTOS, ...)
KEYSPY Keyboard Data Logger with PIC16C84

The KEYSPY is a hardware keyboard logger that can record keystrokes from a PS/2 keyboard and send
them back to the PC at any later time.
PIC16F877 Programmer And Development System

in these pages you (electronic hobbyist) will find a project to home-built a reliable PIC16F87X based
programmer and development system.
IC-Prog Prototype Programmer, for all serial devices.

Programs : PIC16xxx, PIC16C5x, PIC12xxx, PIC18F, NVM3060, MDA206x, ER1400, AK64x0, BR90xx,
24Cxx, 93Cxx, 59Cxx, NS77007, M6M800xx, BR9021, CXK10xx, TC8910x, PDG011, P87LPC76x, NS7002,
SDA25xx, 89Cx051, SX28, 25xxx, AVR, 89S53, 89S8252 and many more.
Pic Projects - First steps with the PIC Processors

First steps with the 16F876 and other PIC processors, C & Basic, links, projects (LCD, VOIP Desk Phone,
Add DRAM to 16F876, Cheap Keypad ) etc.
MCUspace-Connecting PIC People with PIC Resources

A collection of resources pertaining to the Microchip PIC MCU family of microcontrollers.
PICMicro Pet Projects

Various PICMicrocontroller Pet Projects.
EHL elektronika
Free PIC downloader for W95/98/NT compatible with the HI-TECH or Shane Tolmie bootloader for the
PIC16F87x processors.
FREE C Code examples & interfacing cct for PIC & AVR
Sample C Code examples with interfacing circuits for 8-bit Micros = PIC/AVR/8051 and software & hardware
tools
PIC development board

PIC development board, supports most families and microchip microcontrollers including USB devices.
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PICmicro Sites

PIC C Compilers and development ki...
Welcome to Forest Electronics
The home of WIZ-C Professional - The ANSI PIC C Compiler with

Rapid Application Development
WIZ-C Professional (ANSI PIC C Compiler) available in free

version compile up to 2K words for 12F, 16F, and 18F series
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WIZ-C Professional full version

price reduction to 50 ($100) !
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AVIDICY - AVR C Compiler
PIC Development Boards, PIC Programmers
USB Development for PICs

http://www.fored.co.uk/?gclid=CJ2agKiKv5ECFRfWXgodLkFGRg (1 of 3)12/02/2008 17:35:56
Ordering System - Click Here
We can handle your PIC or AVR designs for you - Forest Consultancy
Site Map
Contact us - we answer ALL queries : info@fored.co.uk
Phone : +44 1202 806108 UK - (01202) 806108
Fax : +44 1590 681511 UK - (01590) 681511
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Matrix Electronica S.L. Distribucin de componentes y mdulos electrnicos. Mdulos GSM, GPRS, GPS, Ethernet, Antenas, Reles ...
Mapa del Web matrix@matrix.

es
Marcas: -----
Web site: http://www.rabbitsemiconductor.com
Descripcin
Productos Destacados
Productos Asociados y Complementarios
Noticias Relacionadas
Seminarios
rea de descarga
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nuestras marcas
Descripcin
Rabbit Semiconductor es una compaa de semiconductores especializada en

microprocesadores de 8 bit y herramientas de desarrollo TCP/IP para control embebido,
comunicaciones y conectividad Ethernet. Rabbit Semiconductor present el microprocesador
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M. Internet Explorer microprocesados ganadora de premios industriales fue introducida en 2001.
Resolucin ptima
800x600 Los exitosos mdulos microprocesados Rabbit Semiconductor -que ofrece a los diseadores un
rpido desarrollo y una solucin ms potente que los microcontroladores-se han expandido, rpida
y continuamente para abarcar una amplia variedad de factores de forma, capacidades de memoria
y funcionalidades.
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Rabbit Semiconductor ofrece a sus clientes sistemas de desarrollo TCP/IP apropiados, que
proporcionan un modo simple de desarrollar una aplicacin Ethernet 10Base-T 100Base-T
alrededor de los microprocesadores Rabbit. Los mdulos RabbitCore con capacidades Ethernet el
siguiente paso lgico para acelerar el tiempo de desarrollo de los OEM- ha consolidado an ms la
posicin de Rabbit Semiconductor en el mercado de los embebidos.
Los productos de Rabbit Semiconductor se pueden encontrar en un amplio rango de aplicaciones

cubriendo prcticamente toda la industria, incluyendo la fabricacin, comunicaciones,
instrumentacin, control industrial, utilidades de energa, control de acceso y seguridad y
aplicaciones mdicas.

Productos Destacados
Microprocesadores Rabbit 2000, Rabbit 3000 y Rabbit 4000 + Informacin
Mdulos con Rabbit 2000 (Hasta 512K Flash,hasta 512K SRAM,

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Zigbee)
Sistemas de desarrollo para los distintos mdulos + Informacin
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Kits de Aplicacin: WLAN, Ethernet-Serie, SSL, ... + Informacin
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Mdulos y soluciones completas de Bluetooth de Bluegiga + Informacin
Memorias SRAM No Voltiles (nvSRAM) y Relojes de Tiempo
+ Informacin
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Sensores de Temperatura Digitales, Sensores de Humedad y
+ Informacin
Presin, Interfaz para Transductores Universal de Smartec
Mdulos mdems GSM - GPRS de Sony-Ericsson + Informacin
Fuentes de alimentacin y Convertidores CC/CC + Informacin
Mdulo receptores GPS de uBlox + Informacin
Displays LCD de Data Image + Informacin
Conectores y zcalos + Informacin
Noticias Relacionadas
Rabbit anuncia su nuevo modulo RabbitCore RCM4300 con soporte de miniSD
RABBIT CORTA EL CABLE: NUEVOS MDULOS CON WI-FI Y ZIGBEE INTEGRADO PIN A PIN
COMPATIBLES CON LOS MDULOS ETHERNET (Oferta especial de lanzamiento)
Rabbit Semiconductor, INC. lanza el kit de aplicacin Zigbee / 802.15.4 para el control
inalmbrico embebido, econmico y de bajo consumo
Rabbit Semiconductor, Inc. ofrece un Kit de Aplicacin con Cmara Embebida para Monitorizacin
Remota, Seguridad, Control de Flotas y otras aplicaciones
Nuevo mdulo software Modbus TCP para los procesadores Rabbit
RabbitFLEX: Hardware Embebido Configurable

Rabbit Semiconductor, Inc. anuncia el lanzamiento de su nueva generacin de mdulos
RabbitCore RCM4XXX
Kit de Desarrollo Completo para Aplicaciones Ethernet/Internet por slo 99 !!
Rabbit Semiconductor, Inc. lanza el Nuevo Rabbit 4000

Rabbit Semiconductor, Inc. lanza su S.O. RabbitSys para Control Remoto de Dispositivos
Embebidos

Seminarios
Seminario de dispositivos embebidos Ethernet / Wi-fi
Diseo embebido de aplicaciones Ethernet/Internet
Diseo embebido de aplicaciones Ethernet/Internet
rea de descarga
Gua de Mdulos RCMXX00
Accesorios de los mdulos RCMXXXX
Email:
Copyright 2004 Matrix Electrnica. Todos los derechos reservados.

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Luminary Micro - Stellaris the industry's first Cortex-M3 MCUs.
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WebRing: new

Home > New rings
Find out what's new on WebRing: Rings created in the last 14 days, seasonal rings, holiday rings, those based on current events, and
more.
WebRing News -
February Newsletter, 2008
January Newsletter, 2008
December Newsletter December 1, 2007
TopicCraze partnership August 31, 2007
WebRing Toolbar! May 4, 2007
WebRing Blogs! April 25, 2007
WebRing and Yahoo! Groups, April 2, 2007
WebRing 2.0 Email, March 1, 2007
Important News, February 16, 2007
Second Letter from Tim Killeen - January 5, 2007
First Letter from Tim Killeen - November 21, 2006
Some comments from users....
Membership Stats:
12/01/2007
WebRing members: 435,325
WebRIng 2.0 members: 722
Events/Holidays
February 23rd - April 1st
23rd Tennis Day.

24th Children's Day.
25th Opera Day.
April 1st April Fool's Day.
http://dir.webring.com/h/new (1 of 2)12/02/2008 17:37:26

WebRing: new
Featured Rings
August is Catfish month. You can Catch 'em, or Keep 'em.
It's
Foot Care month,
and Artist Appreciation month.
It's also Inventors, Water Quality, and Golf month.
New Rings
www.dubrovnik-apartments-bb.com
wholesale bape,Evisu,BBC hoody;Lacoste,polo;Nike
Diet pills Weight loss pills
The Twist-N-Go Modern Scooter Webring
Testdawn
susieschinchillas
Spyro the dragon
Saint John MadMax032777 Michael
Saddler
Redwall Role Playing Ring
more...
http://dir.webring.com/h/new (2 of 2)12/02/2008 17:37:26

WebRing: cool

Home > Cool rings
Explore this list of established rings with the highest traffic in the last few days and recent months as well as those with the highest number
of new and unique sites in the past seven days.
Hot topics:
Kirchenmusik-Webring
Purple Pages for Pagans
Iron WebMaster Round 2
Ancient Military Sites
New Hampshire
Evil Atheist Conspiracy
Dreamontoyz.com's Cartoons WebRing
FREE Advanced Health Plan
Italian Greyhound
The Civil Rights Webring
more...
Highest traffic:
Boston Red Sox

How to Draw Anime WebRing
New York Yankees
The Best Virtual Horse Games
Yaoi en esp@ol - Yaoi no Sekai
Monica Lewinsky Webring
Teen Models
Free Plastic Canvas Patterns
Breathless 'NSYNC Fiction Ring
Hot As Hades
http://dir.webring.com/h/cool (1 of 2)12/02/2008 17:37:29

WebRing: cool
more...
Highest number of new sites:
more...
http://dir.webring.com/h/cool (2 of 2)12/02/2008 17:37:29

WebRing:

Home /
Advice & Support (12) Arts & Entertainment (23) Automotive (5)
Books & Writing (10) Business & Finance (14) Comics & Animation (1)
Computers & Internet (16) Cultures & Community (10) Food & Drink (2)
Genealogy (3) Government & Politics (3) Healthcare (10)
Hobbies (27) Home & Garden (7) Music (8)
Outdoors (3) Pets (7) Photography (6)
Relationships (8) Religion (24) Schools & Education (3)
Science (4) Sports (2)
Create your own blog!
Featured Blogs Recently Updated Blogs

GaryJV's Blog Mom's Earning A Living Online
by: GaryJV by: top_reversefunnel
A call for an end last updated: Tues, Feb 12th - 6:29AM
to political labels Maria Henriques's Blog
IronWebMaster. by: Maria Henriques
com's Blog last updated: Tues, Feb 12th - 4:28AM
by: DAKOTA's Blog
IronWebMaster. by: DAKOTA
com last updated: Mon, Feb 11th - 2:23PM
Follow the Traveling 12 Feet's Blog
hottest website by: Traveling 12 Feet
design last updated: Mon, Feb 11th - 12:29AM
competition on
the web!
http://pg.webring.com/cgi-bin/members/blogcategory.cgi (1 of 3)12/02/2008 17:37:36

WebRing:
Traveling 12 One pound at a time's Blog

Feet's Blog by: One pound at a time
by: Traveling 12 last updated: Mon, Feb 11th - 12:03AM
Feet Famous Quotes Famous Recipes Funny Jokes
Travel by: quotes
adventures last updated: Mon, Feb 11th - 12:01AM
complete with The Lilith eZine's Blog
local lore by: The Lilith eZine
Welcome to My last updated: Mon, Feb 11th - 0:48AM
Funny Bone! IronWebMaster.com's Blog
by: user by: IronWebMaster.com
texasman67 last updated: Sun, Feb 10th - 1:24PM
Laughing at the Tales & Tails of an Eclectic Life
world of by: user neurother
computing! last updated: Sun, Feb 10th - 9:25AM
roguewriter's Jock's Blog
Blog by: Jock
by: roguewriter last updated: Sun, Feb 10th - 1:51AM
Learn how to user bozko's Blog
effectively blog. by: user bozko
user last updated: Sat, Feb 9th - 5:46PM
aaadavid's Roaring's Blog
Blog by: Roaring
by: user last updated: Sat, Feb 9th - 5:19PM
aaadavid
Scanning and
restoring your
old photos
user
paintballfarm's
Blog
by: user
paintballfarm
Presenting the
history of
paintball
Popular Blogs

WebRing:
Famous Quotes Famous Recipes Funny

1. Jokes
by: quotes
Maria Henriques's Blog
2.
by: Maria Henriques
Satsang Blog
3.
by: satsangblogger
Web Ring's 1st Genealogy Blog
4.
by: Maximilian
WebRing's Blog
5.
by: WebRing
Have Ye Not Read?
6.
by: user alisicia
Barrie Home Inspector's Blog
7.
by: Home Inspector
Eldritch's WebRing Blog
8.
by: Eldritch
Dave's Enneagram Blog at WebRing
9.
by: user davesenneagram
roguewriter's Blog
10.
by: roguewriter
Canadian Anglican
11.
by: Canadian Anglican
A Course in Miracles Blog
12.
by: jjesseph

WebRing: status20070213

Creating communities.
Connecting people.
February 16, 2007
Revised: June 26, 2007
Get Started Now
Introducing the WebRing Get Started Program

Dear WebRing Members and Managers,
On January 5, 2007, I wrote an open letter to Managers and Members describing all of the improvements to WebRing for 2007.
See my personal letter to refresh your memory. I'm now pleased to introduce our new "Get Started" program.
New Get Started Program

Do you want to drive more people to your web site, but your brow furrows in confusion when you read about adding code to
your home page? No need to fear, WebRing Member Services is here.
When you join WebRing as a 2.0 member we will install the WebRing navigation code on your first web site and get you
signed up in your first community for free!
If you have additional web sites, we'll help you get up to 5 of them (including the first) posted in their first community as well.
If you have more than 5 we can help you with those for just $5 each.
Learn more about all of the WebRing 2.0 Member Benefits.
We believe 2007 will be the best year ever for WebRing. Implementing this program will make it easy for you to get started now
and allow even more people with similar interests to connect, share information and complete transactions. As always, we
appreciate, listen and respond to your feedback. Please keep it coming: feedback@webring.com.
http://dir.webring.com/h/status20070213 (1 of 2)12/02/2008 17:37:39

WebRing: status20070213
Sincerely,
Tim Killeen
WebRing Owner & WebRing Community Manager
http://dir.webring.com/h/status20070213 (2 of 2)12/02/2008 17:37:39

WebRing: forums

Home > Community Forums
Forums for system discussions, forums for hot topics, and

forums with the most active discussions.
Participate in open discussions in any of the following forums:
System Forums
Check out these forums for learning about, working with, and using WebRing:
Community Managers Forum

A place for WebRing Managers to discuss ideas, ethics, tactics, etc. This Forum is for WebRing discussion only
and is closely moderated.
Click here to access the forum.
General Members Forum

An open discussion forum for all users to chat about WebRing features, thoughts, and experiences.
Click here to access the forum.
Top Forums
Discover these popular forums that cover the most talked-about topics in the last eight weeks.
Natural Cure ~ Natural Remedies ~ Natural Cure For All Disease

THE JAILHOUSE LAWYER'S WEBRING
Let Freedom Ring
Win Without War Webring
Miniature Dachshunds
Advanced Scientific Health Webring
Ultimate Photography
Meditating Buddhists
The Women's Victory Network
more...
http://dir.webring.com/h/forums (1 of 2)12/02/2008 17:37:43

WebRing: forums
Hot Forums
Explore these forums that cover the hottest WebRing topics in the last three days.
Miniature Dachshunds
Forums & Chat Ring
Natural Cure ~ Natural Remedies ~ Natural Cure For All Disease
Let Freedom Ring
Ultimate Photography
Advanced Scientific Health Webring
Wandering Daoists
THE JAILHOUSE LAWYER'S WEBRING
The Women's Victory Network
more...
http://dir.webring.com/h/forums (2 of 2)12/02/2008 17:37:43

WebRing: contact.html

Contacting Us At WebRing
The WebRing Service
WebRing is many things: a network of similar web sites, a precise research tool, a web traffic generator. But most
of all, WebRing is an ever-expanding online network of personal and business communities that span every topic
imaginable.
SUPPORT
For all technical issues or specific help requests, please use our WebRing Help system.
Feedback
Your thoughts and ideas are important to us.
For general feedback on WebRing please visit our Forums and post to either the General Members Forum,
or if you're a manager you might wish to use the Community Managers Forum.
Concerns regarding our membership policies? Please email Membership.
Questions regarding the affiliate program should be directed to Affiliate.
Strategic Alliances
Strategic alliances are key to WebRing's enhanced and expanding services on the World Wide Web. If such a
partnership with WebRing might benefit your company, please email Marketing.
Press
WebRing is pleased to cooperate with the press, and has received extensive coverage in online, television and
print media. If your news organization has an interest in WebRing, please contact Pressinfo.
http://dir.webring.com/h/contact.html12/02/2008 17:37:46
WebRing: terms

1. ACCEPTANCE OF TERMS
Welcome to WebRing. WebRing provides its service to you, subject to the following Terms of Service
("TOS"), which may be updated by us from time to time without notice to you. You can review the most
current version of the TOS at any time at: http://dir.webring.com/h/terms. In addition, when using
particular WebRing services, you and WebRing shall be subject to any posted guidelines or rules
applicable to such services which may be posted from time to time. All such guidelines or rules are
hereby incorporated by reference into the TOS.
2. DESCRIPTION OF SERVICE
WebRing currently provides users with access to a rich collection of navigation and directory resources,
and personalized content through the site (the "Service"). You also understand and agree that the
Service may include advertisements and that these advertisements are necessary for WebRing to
provide the Service. Unless explicitly stated otherwise, any new features that augment or enhance the
current Service, including the release of new WebRing Services, shall be subject to the TOS. You
understand and agree that the Service is provided "AS-IS" and that WebRing assumes no responsibility
for the timeliness, deletion, mis-delivery or failure to store any user communications or personalization
settings.
You are responsible for obtaining access to the Service and that access may involve third party fees
(such as Internet service provider or airtime charges). You are responsible for those fees, including those
fees associated with the display or delivery of advertisements. In addition, you must provide and are
responsible for all equipment necessary to access the Service.
Please be aware that WebRing has created certain areas on the Service that contain adult or mature
content. You must be at least 18 years of age to access and view such areas. WebRing has the right to
limit your access to certain areas if WebRing is aware or suspects you are not at least 18 years of age.
3. YOUR REGISTRATION OBLIGATIONS
In consideration of your use of the Service, you agree to: (a) provide true, accurate, current and complete
information about yourself as prompted by the Service's registration form (such information being the
"Registration Data") and (b) maintain and promptly update the Registration Data to keep it true, accurate,
http://dir.webring.com/h/terms (1 of 10)12/02/2008 17:37:50
WebRing: terms
current and complete. If you provide any information that is untrue, inaccurate, not current or incomplete,
or WebRing has reasonable grounds to suspect that such information is untrue, inaccurate, not current or
incomplete, WebRing has the right to suspend or terminate your account and refuse any and all current
or future use of the Service (or any portion thereof). WebRing is concerned about the safety and privacy
of all its users, particularly children. For this reason, WebRing does not allow the creation of accounts by
children under the age of 13. If you are the parent or guardian of a child of any age, it is your
responsibility to determine whether any of the Services and/or Content (as defined in this TOS) are
appropriate for your child.
4. WebRing PRIVACY POLICY
Registration Data and certain other information about you is subject to our Privacy Policy. For more
information, see our full privacy policy at http://dir.webring.com/h/privacy/.
5. MEMBER ACCOUNT, PASSWORD AND SECURITY
You will define or receive a password and account designation upon completing the Service's registration
process. You are responsible for maintaining the confidentiality of the password and account, and are
fully responsible for all activities that occur under your password or account. You agree to (a)
immediately notify WebRing of any unauthorized use of your password or account or any other breach of
security, and (b) ensure that you exit from your account at the end of each session. WebRing cannot and
will not be liable for any loss or damage arising from your failure to comply with this Section 5.
6. MEMBER CONDUCT
You understand that all information, data, text or other materials ("Content"), whether publicly posted or
privately transmitted, are the sole responsibility of the person from which such Content originated. This
means that you, and not WebRing, are entirely responsible for all Content that you upload, post, email,
transmit or otherwise make available via the Service. WebRing does not control the Content posted via
the Service and, as such, does not guarantee the accuracy, integrity or quality of such Content. You
understand that by using the Service, you may be exposed to Content that is offensive, indecent or
objectionable. Under no circumstances will WebRing be liable in any way for any Content, including, but
not limited to, for any errors or omissions in any Content, or for any loss or damage of any kind incurred
as a result of the use of any Content posted, emailed, transmitted or otherwise made available via the
Service.
You agree to not use the Service to:

WebRing: terms
a. upload, post, email, transmit or otherwise make available any Content that is unlawful, harmful,
threatening, abusive, harassing, tortious, defamatory, vulgar, obscene, libelous, invasive of another's
privacy, hateful, or racially, ethnically or otherwise objectionable;
b. harm minors in any way;
c. impersonate any person or entity, including, but not limited to, a WebRing official, forum leader,
guide or host, or falsely state or otherwise misrepresent your affiliation with a person or entity;
d. forge headers or otherwise manipulate identifiers in order to disguise the origin of any Content
transmitted through the Service;
e. upload, post, email, transmit or otherwise make available any Content that you do not have a right to
make available under any law or under contractual or fiduciary relationships (such as inside
information, proprietary and confidential information learned or disclosed as part of employment
relationships or under nondisclosure agreements);
f. upload, post, email, transmit or otherwise make available any Content that infringes any patent,
trademark, trade secret, copyright or other proprietary rights ("Rights") of any party;
g. upload, post, email, transmit or otherwise make available any unsolicited or unauthorized
advertising, promotional materials, or any other form of solicitation, except in those areas (such as
ring Promotions) that are designated for such purpose; it is expressly prohibited on the navigation
code that appears on a member's webiste;
h. upload, post, email, transmit or otherwise make available any material that contains software viruses
or any other computer code, files or programs designed to interrupt, destroy or limit the functionality
of any computer software or hardware or telecommunications equipment;
j. interfere with or disrupt the Service or servers or networks connected to the Service, or disobey any
requirements, procedures, policies or regulations of networks connected to the Service;
k. intentionally or unintentionally violate any applicable local, state, national or international law.
l. "stalk" or otherwise harass another; or
m. collect or store personal data about other users.
n. provide links to or promote non-WebRing services or websites without prior permission.
You acknowledge that WebRing does not pre-screen Content, but that WebRing and its designees shall
have the right (but not the obligation) in their sole discretion to refuse or move any Content that is
available via the Service. Without limiting the foregoing, WebRing and its designees shall have the right
to remove any Content that violates the TOS or is otherwise objectionable. You agree that you must
evaluate, and bear all risks associated with, the use of any Content, including any reliance on the
accuracy, completeness, or usefulness of such Content. In this regard, you acknowledge that you may
not rely on any Content created by WebRing or submitted to WebRing, including without limitation
information in WebRing Message Boards, ring Community Centers, and in all other parts of the Service.
You acknowledge and agree to abide by WebRing's Adult Content Policy.

WebRing: terms
You acknowledge and agree that WebRing may preserve Content and may also disclose Content if
required to do so by law or in the good faith belief that such preservation or disclosure is reasonably
necessary to: (a) comply with legal process; (b) enforce the TOS; (c) respond to claims that any Content
violates the rights of third-parties; or (d) protect the rights, property, or personal safety of WebRing, its
users and the public.
You understand that the technical processing and transmission of the Service, including your Content,
may involve (a) transmissions over various networks; and (b) changes to conform and adapt to technical
requirements of connecting networks or devices.
7. SPECIAL ADMONITIONS FOR INTERNATIONAL USE
Recognizing the global nature of the Internet, you agree to comply with all local rules regarding online
conduct and acceptable Content. Specifically, you agree to comply with all applicable laws regarding the
transmission of technical data exported from the United States or the country in which you reside.
8. CONTENT SUBMITTED OR MADE AVAILABLE FOR INCLUSION ON THE SERVICE
WebRing does not claim ownership of Content you submit or make available for inclusion on the Service.
However, with respect to Content you submit or make available for inclusion on publicly accessible areas
of the Service, you grant WebRing the following world-wide, royalty free and non-exclusive license(s), as
applicable:
With respect to Content you submit or make available for inclusion on publicly accessible areas of
WebRing, the license to use, distribute, reproduce, modify, adapt, publicly perform and publicly display
such Content on the Service solely for the purposes of providing and promoting the specific WebRing
ring to which such Content was submitted or made available. This license exists only for as long as you
elect to continue to include such Content on the Service and will terminate at the time you remove or
WebRing removes such Content from the Service.
"Publicly accessible" areas of the Service are those areas of WebRing that are intended by WebRing to
be available to the general public.
9. INDEMNITY
You agree to indemnify and hold WebRing, and its subsidiaries, affiliates, officers, agents, co-branders or
other partners, and employees, harmless from any claim or demand, including reasonable attorneys'
fees, made by any third party due to or arising out of Content you submit, post, transmit or make
available through the Service, your use of the Service, your connection to the Service, your violation of
the TOS, or your violation of any rights of another.
WebRing: terms
10. NO RESALE OF SERVICE
You agree not to reproduce, duplicate, copy, sell, resell or exploit for any commercial purposes, any
portion of the Service, use of the Service, or access to the Service without the express written permission
of WebRing.
11. GENERAL PRACTICES REGARDING USE AND STORAGE
You acknowledge that WebRing may establish general practices and limits concerning use of the
Service, including without limitation the maximum number of days that message board postings or other
uploaded Content will be retained by the Service, the maximum number of email messages that may be
sent from or received by an account on the Service, the maximum size of any email message that may
be sent from or received by an account on the Service, the maximum disk space that will be allotted on
WebRing's servers on your behalf, and the maximum number of times (and the maximum duration for
which) you may access the Service in a given period of time. You agree that WebRing has no
responsibility or liability for the deletion or failure to store any messages and other communications or
other Content maintained or transmitted by the Service. You acknowledge that WebRing reserves the
right to log off accounts that are inactive for an extended period of time. You further acknowledge that
WebRing reserves the right to change these general practices and limits at any time, in its sole
discretion, with or without notice.
12. GET STARTED SUPPORT SERVICE DESCRIPTION
WebRing, Inc., offers its WebRing 1.0 Members the option of paying a one-time fee to have WebRing
trained staff register your URL, place the WebRing navigation code on that web site, and submit that site
to an appropriate WebRing Community. WebRing 2.0 Members, should they choose to use it, receive the
Get Started Support Service as part of their annual membership fee. WebRing, Inc., reserves the right to
refuse this Service to sites deemed inappropriate, objectionable, unlawful, or dysfunctional, as well as
those sites that do not allow the proper placement and function of the WebRing navigation code.
WebRing, Inc., strives to complete all requests for the Get Started Support Service as soon as possible
based on usual WebRing, Inc. business hours, Monday - Friday 8:00-5:00 PST; however, WebRing, Inc.,
retains the right to delay Services based on Federal holidays, force majeure, and other events that may
occur outside the control of WebRing, Inc.
WebRing, Inc., accepts responsibility for your site only during that time in which the placement of your
web site's navigation code is in process, and only as long as you follow the Get Started Support Service
Member Responsibilities (13). Service does not include any site improvements, repairs, redesign of your
web site, or the creation of a web site.

WebRing: terms
13. GET STARTED SUPPORT SERVICE MEMBER RESPONSIBILITIES
As a Member using Get Started Support Service, you agree to:

a. acquire and provide all information necessary for accessing your web site material to include, but not
limited to, URL of the web site to which the WebRing navigation code is to be applied; web host address,
web site editing software URL, username, password (f), FTP information.
b. grant WebRing, Inc., the right to place the navigation code on an appropriate page of the web site
being processed, a page that works most effectively for the WebRing Community to which you belong or
are submitted to during the Get Started Support Service process.
c. accept placement of WebRing navigation code as final and understand that any further manipulation of
the WebRing navigation code is solely your responsibility.
d. not to access or alter the web site information (password, etc.) at anytime while the WebRing
navigation code placement is in process.
e. monitor actively your submitted email address for WebRing, Inc., correspondence and receipt of
completion while your web site is in process.
f. provide WebRing, Inc., with a temporary password during the time it takes WebRing, Inc., to
successfully place the WebRing navigation code on your web site. Furthermore, you agree to change the
temporary password immediately upon the email receipt of completion of Services.
g. understand that WebRing, Inc. is no longer responsible for anything that may occur to your web site
after the time the email receipt of completion is sent.
h. supply current and direct email address.
i. expect delays in Service based on the aforementioned business hours (h). Requests for help outside of
business hours shall be processed on a first in, first out basis, beginning at the start of a business day or
week. You will also accept delays in service based on Federal holidays, force majeure, and other events
that may occur outside the control of WebRing, Inc.
j. accept sole responsibility for the quality, performance and all other aspects of the your content and the
goods or services provided through the your web site.
k. cooperate fully with WebRing, Inc., in connection with WebRing's performance of the services. Delays
in performance of your obligations under this Agreement will extend the time for WebRing, Inc., to
perform its obligations that depend on your performance.
l. notify WebRing, Inc., of any change in your contact information, as well as any changes that affect
access to the web site being processed.
14. MODIFICATIONS TO SERVICE
WebRing reserves the right at any time and from time to time to modify or discontinue, temporarily or
permanently, the Service (or any part thereof) with or without notice. You agree that WebRing shall not
be liable to you or to any third party for any modification, suspension or discontinuance of the Service.
15. TERMINATION

WebRing: terms
You agree that WebRing, in its sole discretion, may terminate your password, account (or any part
thereof) or use of the Service, and remove and discard any Content within the Service, for any reason,
including, without limitation, for lack of use or if WebRing believes that you have violated or acted
inconsistently with the letter or spirit of the TOS. In the special situation where termination affects ring
Management, WebRing has the right to take over management of ring(s) found to violate the TOS in
letter or spirit. WebRing may also in its sole discretion and at any time discontinue providing the Service,
or any part thereof, with or without notice. You agree that any termination of your access to the Service
under any provision of this TOS may be effected without prior notice, and acknowledge and agree that
WebRing may immediately deactivate or delete your account and all related information and files in your
account and/or bar any further access to such files or the Service. Further, you agree that WebRing shall
not be liable to you or any third-party for any termination of your access to the Service.
16. DEALINGS WITH ADVERTISERS
Your correspondence or business dealings with, or participation in promotions of, advertisers found on or
through the Service, including payment and delivery of related goods or services, and any other terms,
conditions, warranties or representations associated with such dealings, are solely between you and
such advertiser. You agree that WebRing shall not be responsible or liable for any loss or damage of any
sort incurred as the result of any such dealings or as the result of the presence of such advertisers on the
Service.
17. LINKS
The Service may provide, or third parties may provide, links to other World Wide Web sites or resources.
Because WebRing has no control over such sites and resources, you acknowledge and agree that
WebRing is not responsible for the availability of such external sites or resources, and does not endorse
and is not responsible or liable for any Content, advertising, products, or other materials on or available
from such sites or resources. You further acknowledge and agree that WebRing shall not be responsible
or liable, directly or indirectly, for any damage or loss caused or alleged to be caused by or in connection
with use of or reliance on any such Content, goods or services available on or through any such site or
resource.
18. WebRing's PROPRIETARY RIGHTS
You acknowledge and agree that the Service and any necessary software used in connection with the
Service ("Software") contain proprietary and confidential information that is protected by applicable
intellectual property and other laws. You further acknowledge and agree that Content contained in
sponsor advertisements or information presented to you through the Service or advertisers is protected
by copyrights, trademarks, service marks, patents or other proprietary rights and laws. Except as
expressly authorized by WebRing or advertisers, you agree not to modify, rent, lease, loan, sell,
distribute or create derivative works based on the Service or the Software, in whole or in part.
WebRing: terms
19. DISCLAIMER OF WARRANTIES
YOU EXPRESSLY UNDERSTAND AND AGREE THAT:
a. YOUR USE OF THE SERVICE IS AT YOUR SOLE RISK. THE SERVICE IS PROVIDED ON AN "AS
IS" AND "AS AVAILABLE" BASIS. WebRing EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY
KIND, WHETHER EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO THE IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-
INFRINGEMENT.
b. WebRing MAKES NO WARRANTY THAT (i) THE SERVICE WILL MEET YOUR REQUIREMENTS,
(ii) THE SERVICE WILL BE UNINTERRUPTED, TIMELY, SECURE, OR ERROR-FREE, (iii) THE
RESULTS THAT MAY BE OBTAINED FROM THE USE OF THE SERVICE WILL BE ACCURATE
OR RELIABLE, (iv) THE QUALITY OF ANY PRODUCTS, SERVICES, INFORMATION, OR OTHER
MATERIAL PURCHASED OR OBTAINED BY YOU THROUGH THE SERVICE WILL MEET YOUR
EXPECTATIONS, AND (V) ANY ERRORS IN THE SOFTWARE WILL BE CORRECTED.
c. ANY MATERIAL DOWNLOADED OR OTHERWISE OBTAINED THROUGH THE USE OF THE
SERVICE IS DONE AT YOUR OWN DISCRETION AND RISK AND THAT YOU WILL BE SOLELY
RESPONSIBLE FOR ANY DAMAGE TO YOUR COMPUTER SYSTEM OR LOSS OF DATA THAT
RESULTS FROM THE DOWNLOAD OF ANY SUCH MATERIAL.
d. NO ADVICE OR INFORMATION, WHETHER ORAL OR WRITTEN, OBTAINED BY YOU FROM
WebRing OR THROUGH OR FROM THE SERVICE SHALL CREATE ANY WARRANTY NOT
EXPRESSLY STATED IN THE TOS.
20. LIMITATION OF LIABILITY
YOU EXPRESSLY UNDERSTAND AND AGREE THAT WEBRING WILL NOT BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES,
INCLUDING BUT NOT LIMITED TO, DAMAGES FOR LOSS OF PROFITS, GOODWILL, USE, DATA
OR OTHER INTANGIBLE LOSSES (EVEN IF WEBRING HAS BEEN ADVISED OF THE POSSIBILITY
OF SUCH DAMAGES), RESULTING FROM: (i) THE USE OR THE INABILITY TO USE THE SERVICE;
(ii) THE COST OF PROCUREMENT OF SUBSTITUTE GOODS AND SERVICES RESULTING FROM
ANY GOODS, DATA, INFORMATION OR SERVICES PURCHASED OR OBTAINED OR MESSAGES
RECEIVED OR TRANSACTIONS ENTERED INTO THROUGH OR FROM THE SERVICE; (iii)
UNAUTHORIZED ACCESS TO OR ALTERATION OF YOUR TRANSMISSIONS OR DATA; (iv)
STATEMENTS OR CONDUCT OF ANY THIRD PARTY ON THE SERVICE; OR (v) ANY OTHER
MATTER RELATING TO THE SERVICE. IN NO EVENT WILL WEBRING'S TOTAL CUMULATIVE
LIABILITY TO YOU, INCLUDING ANY DIRECT DAMAGES ARISING FROM THIS AGREEMENT,
EXCEED THE SUM YOU PAID TO WEBRING FOR SERVICES YOU PURCHASED HEREUNDER AND
WHICH ARE THE SUBJECT OF AND DIRECTLY AFFECTED BY SUCH CLAIMS.
WebRing: terms
IN NO EVENT WILL WEBRING BE LIABLE IN INDEMNITY TO YOU. THIS INCLUDES, WITHOUT

LIMITATION, LIABILITY FOR LOSS OR CORRUPTION OF DATA.
21. EXCLUSIONS AND LIMITATIONS
SOME JURISDICTIONS DO NOT ALLOW THE EXCLUSION OF CERTAIN WARRANTIES OR THE

LIMITATION OR EXCLUSION OF LIABILITY FOR INCIDENTAL OR CONSEQUENTIAL DAMAGES.
ACCORDINGLY, SOME OF THE ABOVE LIMITATIONS OF SECTIONS 17 AND 18 MAY NOT APPLY
TO YOU.
22. NOTICE
Notices to you may be made via either email or regular mail. The Service may also provide notices of
changes to the TOS or other matters by displaying notices or links to notices to you generally on the
Service.
22. TRADEMARK INFORMATION
WebRing, the WebRing logo, and other WebRing logos and product and service names are trademarks
of WebRing Inc. (the "WebRing Marks"). Without WebRing's prior permission, you agree not to display or
use in any manner, the WebRing Marks.
24. COPYRIGHTS and COPYRIGHT AGENTS
WebRing respects the intellectual property of others, and we ask our users to do the same. If you believe
that your work has been copied in a way that constitutes copyright infringement, or your intellectual
property rights have been otherwise violated, please provide WebRing's Copyright Agent the following
information:
1. an electronic or physical signature of the person authorized to act on behalf of the owner of the
copyright or other intellectual property interest;
2. a description of the copyrighted work or other intellectual property that you claim has been
infringed;
3. a description of where the material that you claim is infringing is located on the site;
4. your address, telephone number, and email address;
5. a statement by you that you have a good faith belief that the disputed use is not authorized by the
copyright owner, its agent, or the law;
6. a statement by you, made under penalty of perjury, that the above information in your Notice is
accurate and that you are the copyright or intellectual property owner or authorized to act on the
copyright or intellectual property owner's behalf.
WebRing: terms
WebRing's Agent for Notice of claims of copyright or other intellectual property infringement can be
reached as follows:
By email: copyrightisssues@webring.com
By mail: Copyright, WebRing Inc., 500 A street, Suite 2, Ashland, Oregon 97520
By Phone: (541) 488-9895
PLEASE: This number is for copyright issues only. For support related questions use the email submit
form on Help/Support
25. GENERAL INFORMATION
The TOS constitute the entire agreement between you and WebRing and govern your use of the Service,
superceding any prior agreements between you and WebRing. You also may be subject to additional
terms and conditions that may apply when you use affiliate services, third-party content or third-party
software. The TOS and the relationship between you and WebRing shall be governed by the laws of the
State of Oregon without regard to its conflict of law provisions. You and WebRing agree to submit to the
personal and exclusive jurisdiction of the courts located within the county of Jackson, Oregon. The failure
of WebRing to exercise or enforce any right or provision of the TOS shall not constitute a waiver of such
right or provision. If any provision of the TOS is found by a court of competent jurisdiction to be invalid,
the parties nevertheless agree that the court should endeavor to give effect to the parties' intentions as
reflected in the provision, and the other provisions of the TOS remain in full force and effect. You agree
that regardless of any statute or law to the contrary, any claim or cause of action arising out of or related
to use of the Service or the TOS must be filed within one (1) year after such claim or cause of action
arose or be forever barred.
The section titles in the TOS are for convenience only and have no legal or contractual effect.
26. VIOLATIONS
Please report any violations of the TOS to our Support group.

http://dir.webring.com/help/

WebRing Links WebRing Help System - Top Help Top

Here are a few links that may be useful to you,
Here are the help results for the page you were on, or the keywords you searched
but please look for a help topic to the right, and
help with:
use the email support link if the help page(s) do
not answer your question.
Welcome to WebRing's interactive context-sensitive help system. Browse the list of
. WebRing Directory common topics below. If one covers the topic you're interest in, click to learn more.
. Learn more about WebRing
If you can't find what you want in the list below you might try entering a word or two in
the search box that describes the trouble you're having.
If you still can't find the help you're looking for then use the link below to contact support
immediately.
Video Tutorials
We now provide a number of video tutorials to assist you in getting the WebRing
NavBar on your page.
Did this answer your question(s)?

The above information does not pertain to my problem, I would like to mail support
Help topics (browse this list and click for more detailed help):
http://dir.webring.com/help/ (1 of 2)12/02/2008 17:37:54

http://dir.webring.com/help/
Need help with the navigation code, including placing it on your web site?
I need to delete my Account/User ID
Want to learn more about ring navigation, or the Hub page?
Why can't I access management functions for my ring?
I want help with Ring management
Need help managing (one of) your ring membership(s)?
Are you have a problem with the Ring Checker (including sites being moved between
active and suspended)?
I'm Trying to contact a member, Ring Manager, or support.
Questions about the WebRing directory?
Try here if you have questions not covered by the above topics (These include
arbitration, ads, definition of terms and basic WebRing information.)
Are these topic areas of any use?

The above topics do not pertain to my problem, I would like to mail support
If you are unable to find a question that fits your issue, try searching our help documents below:
Go!
http://dir.webring.com/help/ (2 of 2)12/02/2008 17:37:54

WebRing: privacy

WebRing is concerned about your privacy. Please read the following to learn more about our privacy policy.
NOTICE: Click here for important information about safe surfing from the Federal Trade Commission.
This Privacy Policy covers WebRing's treatment of personal information that WebRing collects when you use the WebRing site, and when you
use WebRing's services. This policy also covers WebRing's treatment of any personal information that WebRing's business partners share
with WebRing or that WebRing may collect on a partner's site.
This policy does not apply to the practices of companies that WebRing does not own or control, or to people that WebRing does not employ
or manage.
Information Collection and Use
WebRing collects personal information when you register for a WebRing account, when you use WebRing products or services, when
you visit WebRing pages. WebRing may also receive personal information from our business partners.
When you register with WebRing, we ask for your email address and birth date. Once you register with WebRing and sign in to our
services, you are not anonymous to us.
WebRing also automatically receives and records information on our server logs from your browser WebRing cookie information and
the page you requested.
WebRing uses information for three general purposes: to customize the advertising and content you see, to fulfill your requests for
certain products and services, and to provide traffic statistics to our ring managers. None of the statistics reported include personal
information about any WebRing user.
Information Sharing and Disclosure
WebRing will not sell or rent your personal information to anyone.

WebRing may send personal information about you to other companies or people when:
We have your consent to share the information;
We need to share your information to provide the product or service you have requested;
We need to send the information to companies who work on behalf of WebRing to provide a product or service to you. (Unless
we tell you differently, these companies do not have any right to use the personal information we provide to them beyond what is
necessary to assist us.);
We respond to subpoenas, court orders or legal process; or
We find that your actions on our web sites violate the WebRing Terms of Service, or any of our usage guidelines for specific
http://dir.webring.com/h/privacy (1 of 2)12/02/2008 17:37:57

WebRing: privacy
products or services.
Cookies
WebRing may set and access WebRing cookies on your computer.

WebRing allows other companies that are presenting advertisements on some of our pages to set and access their cookies on your
computer. Other companies' use of their cookies is subject to their own privacy policies, not this one. Advertisers or other companies
do not have access to WebRing's cookies.
Your Ability to Edit and Delete Your Account Information and Preferences
WebRing gives you the ability to edit your WebRing Account Information and preferences at any time.
Security
Your WebRing Account Information is password-protected for your privacy and security.
Changes to this Privacy Policy
WebRing may amend this policy from time to time. If we make any substantial changes in the way we use your personal information we
will notify you by posting a prominent announcement on our pages.
Tim's email addy is tkilleen@webring.com

http://dir.webring.com/h/privacy (2 of 2)12/02/2008 17:37:57

SimpleNet
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http://www.simplenet.com/jump/webring/ (1 of 2)12/02/2008 17:38:08

SimpleNet
COPYRIGHT SimpleNet, Inc. | All Rights Reserved | 888-243-3225
http://www.simplenet.com/jump/webring/ (2 of 2)12/02/2008 17:38:08

StatCounter Free invisible Web tracker, Hit counter and Web stats
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Copyright 1999-2008 StatCounter, All rights reserved. Privacy Policy | Terms and Conditions

Davshomepage
Back to Last update:
homepage 9/1/2006
Welcome to my site
Decode IR
RC5 code PICmicro Sites
Panasonic code Get this free Prev | Ring Hub | Join | Rate|
software Next
Daewoo protocol
WebRing Inc.
Search
Sony code
Pic sourcecode for
You can find on my site:
Sony IR protocol
JVC protocol Information about infrared light:
Tinyserir-RC5
Decode ir: On this page you can find a description about the basics of using infrared light for remote control,
RC5 receiver
what you need to decode it and what you can do with it: for example control you pc, windows, winamp or mp3
pic18f bootloader player.
PIC sourcecodes
Detailed description of the folowing different remote protocols:
Leds
Constant current RC5 protocol: Originally developed by Phillips and the most popular for hobby projects.
source for Leds Sony SIRC protocol:Also popular for hobby but less than the rc5 protocol
Always winning with Panasonic protocol
roulette JVC protocol
Daewoo protocol
Datasheets
Links
Who am I
http://users.telenet.be/davshomepage/index.htm (1 of 3)12/02/2008 17:38:23

Davshomepage
Control your pc with an infrared remote protocol, Pic sourcecodes and hobby projects:
Pic sourcecode for sony ir protocol: Here you can find the sourcecode and hexfiles to decode infrared signals of
a sony remote control with a pic microcontroller. With the buttons 0..9 you can control the output pins of the
controller.
The code is also serial transmitted on an output pin you can directly connect it to a pc and control windows or
mediaplayer and etc..
Pic sourcecodes:Here you can find different source codes for the microchip pic microcontrollers like the
pic16f84,pic16f628,pic12f629,pic12f675.
Tinyserir chip: A preprogrammed pic microcontroller for decoding RC5 infrared remote controls.
Tinyserirchip: Here you can find the description, the testprogram and datasheets of the tinyserirchip. You can
use this cheap and easy to use chip to control your pc, plc, robot and everything with a serial port. Because
windows is not realtime it can be hard to decode the fast ir signals. Because you need to sample many times it can
also slow down your system many times. But with the use of the tinyserirchip you can solve all these problems.
A microchip pic18f bootloader: The easy way to program your pics.
Bootloader page Yep here you can find how to make your own simple bootloader based on the application note
00851 of microchip, but I changed this a little bit.
Leds and constant current source information.
Leds: On this page you can find out what leds are, how you can connect it properly without troubles. How you
need to calculate the right value of the series resistor.
Constant current source: Here a detailed descripton of a constant current source with a LM317, how to use and
calculate them and of course the schematic (circuit). You can use it to connect white or blue leds, Luxeon
lumileds

Davshomepage
Always winning in the casino with roulette: it's not about cheating or other illegal actions but a simple trick.
Allways winning with roulette: Here you can read a tip for free how you can allways win with a roulette game
in a casino or online casino's. It's simple and pure mathematical not difficult to understand how it works.
Links and datasheets:
Links: A page with links of other electronic related pages.

Datasheets: Here you can some datasheets of electronic components.

Using infrared for remote controls
Infrared light and signals
Since a long time the consumer electronics industy has been employing infrared remote controls for the
control of television, VCR's and many other products. This same technic is popular In industrial- and
officeapplications like control your pc to eliminate expensive keypads and cables. It's easier to use the
infrared light than cables who always crossing each other.
We humans can't see infrared light because the wavelenght of infrared light is below the visible
spectrum(Some animals can see it and use it as a target for killing the prey). Because we don't see ir
light we use it for remote control purposes. In remote controls the light source is a led but around us
there are many objects who are emitting infrared light. The brighest source is the sun. In fact everything
that radiates heat is also emitting ir light like flames, light bulbs, and even our body.
Decoding infrared signals

The only hardware you need for decoding IR signals is an infrared receiver. There are two main
principles of ir remote controle: using a modulated beam at a frequency about 40kHz or the second is
an non-modulated beam of IR light and has a restricted range.
The three layers of an infrared signal

Three typical layers are used by remote contrals. The names used for these layers has not been
standardized. But we can call it the infrared, the modulation and the serial data.
The infrared layers is the means of transmission. We can't see infrared light because the wavelenght is
too long to see. Altough you cannot see the infrared beam, it behaves the same as light, so if you can't
see the target device, you can't control it with a ir remote control. To control applications through
opaque materials, radiofrequency signals are used.
http://users.telenet.be/davshomepage/infrared-decode.htm (1 of 3)12/02/2008 17:38:25

The modulation layer refers to the fact that each burst of infrared signal is often modulated at a
frequency between 32.75 kHz and 56.8 kHz. This is done to diminish the effects of ambient light. This
layer, however, is optional. Some infrared formats do not modulate their outputs, sending pulses of
unmodulated infrared light instead. This is done to extend the remote controls battery life and to
reduce the cost of the remote control device.
The serial data layer has the information containing a command. This is typically coded in the lengths
of infrared bursts or in the lengths of gaps between infrared bursts. Ex. A long gap or burst is
interpreted as a '1', a short gap or burst is interpreted as a '0'.
Transmitting and receiving IR lights

Transmitting IR light is fairly simple done by using an infrared led. Like normal leds emmiting light
waves in the visible ranges, ir leds are doing this with a light invisible for human eyes. But when you
will see the ir beam, take a webcam and point the remote control to the cam and you will see a flashing
light.
Receiving and decoding the signal is a lot harder. The ir light is captured by an ir sensitive photodiode
with the highest spectral sensivity around 950nm.
The output signal is optical filtered, amplified and passed through a signal filter tuned to the frequency

of the emitted signal frequency. The best and most easy to use are the integrated 3 leg ir receivers like
the Vishay TSOP1836 and the Siemens SFH505A. The output of these devices is TTL compatible, the
optical filter, amplifier with automatic gain control, tuned filter, and demodulator are integrated.
PC infrared remote control
A study of different remote control protocols can be found on the other pages of my site.You can also
find the source code for a pic16f628 to decode the sony infrared protocol. With this you can control
you pc with an infrared remote control. It's now only available for the sony code, but I will add in the
future other protocols also. With a program running on the pc it will be easy to control windows,
winamp or other applications.
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RC5 phillips infrared remote control page
Phillips RC5 infrared remote protocol page
Most audio and video systems are equipped with an infrared remote control.
A common used standard protocol for infrared data communication is the RC5 code, originally
developed by Phillips. This code has an instruction set of 2048 different instructions and is divided into 32
address
of each 64 instructions. Every kind of equipment use his own address,
so this makes it possible to change the volume of the TV without change the volume of the hifi.
The transmitted code is a dataword wich consists of 14 bits and is defined as:
2 startbits for the automatic gain control in the infrared receiver.

1 toggle bit (change everytime when a new button is pressed on the ir transmitter)
5 address bits for the systemaddress
6 instructionbits for the pressed key
The picture under are waveforms from my digital oscilloscope of rc5 codes with pushed buttons 1,2,3,4. You can
good see the startbits and the toggle bit (These are inverted signals because they were captured directly on the
TSOP1836). Read further for more info.
http://users.telenet.be/davshomepage/rc5.htm (1 of 3)12/02/2008 17:38:27

The RC5 code uses the bifase modulation technic which means that every bit consists of 2 parts which are never
the same.
So a bit is always a high/low or a low/high transisition. By the RC5 code a 1 is a low high transisition
and a 0 is high low transisition. For all the bits the most significant bit is transmitted first.
Remember also that the outputsignal of the integrated receivers is inverted:
Detecting an IR signal the output of the integrated receiver will be 0V.
The duration time of each bit is equal to 1,778 ms, and the total time of a full rc5 code is 24,778 ms.
The space between two transmitted codes is 50 bit times or 88,889ms.
To improve noise rejection the pulses are modulated at a carrier frequence
The carrier frequency of the rc5 code is 36 kHz so take always a receiver with a response
frequency of 36 kHz.
There are plenty of Detectors for receiving the bitstream of an IR remote control but the best
I ever used is the TSOP1836 of VISHAY. (Datasheet available on my site).

The TSOP1836 is a 3 pin device that receives the infrared bursts and gives out the demodulated bitstream at the
output. The RC5 code is an easy protocol to decode with a pic mircrocontroller . I will show an example to
control your PC when it's finished
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Description of the panasonic infrared protocol (REC-80)
Panasonic's old infrared remote protocol

An other infrared remote protocol I will explain is an older Panasic remote protocol.
The protocol is similar with the RECS-80 protocol but it use more bits than the RECS-80
protocol. For the datatransmission Panasonic uses the pulse-place modulation.
For the communication a pulse is used with a fixed length, followed by a pause wich represents
the logical state of the bit.
2048 codes are defined in this protocol, divided in 5 bits of custom code and 6 bits of data
code. The custom code is a value wich represents the manufacturer code and the data code
is a value wich represents the pressed button on the remote control.
The full transmitted code is 22 bits: First a header is sent then the custom code (5 bits),
then the data code, followed by the inverse of the custom code and the invers of the data code,
and to terminate a stopbit is added to the code.

The invers transmitted bits are very usefull for the error detection.
Each first part of a bit is always a high level with a fixed time and is followed by a low level
where the time defines if the bit is a logic 1 or a logic 0.
Timing diagram:
T =420 s to approx 424 s in the USA and Canada
T=454 s to approx 460 s in Europe and others
The header is 8T high and 8T low

A 1 is coded 2T high and 6T low
A 0 is coded 2T high and 2T low
http://users.telenet.be/davshomepage/panacode.htm (1 of 2)12/02/2008 17:38:29

Description of the panasonic infrared protocol (REC-80)
Back to homepage
http://users.telenet.be/davshomepage/panacode.htm (2 of 2)12/02/2008 17:38:29

Untitled Document
Daewoo infrared remote protocol
By the Daewoo protocol a logical 0 bit exists of a high puls with a duration time of 550 s followed
by a low puls of 450 s this means that the total duration time of a logical zero bit is 1ms.
A logical 1 bit is formed by a high on time of 550 s followed by low signal of 1450 s this means
also that the total duration time of a logical one bit is 2 ms.
The carrier frequency of the infrared signal is 38 kHz. When you will decode the signal with an
integrated receiver module you need a receiver module wich is tuned on 38 kHz like the TSOP1838
fabricated by Vishay. It will function also with a 36 kHz module but the sensitivity is less than by a
38 kHz module.
Because the receiver (mostly in hobby applications a microprocessor) needs to trigger on a new
received code the protocol starts with a start bit of 8ms high level pulse and a 4 ms low level pulse.
After this the 7 address bits and 7 command bits are sent. But the two words are divided by a 550s
high level signal and 4ms low level signal. Terminating the protocol is done with an another
high level signal of 550s.

The time between two startbits of bitstreams when the button on the remote control is being pressed =60 ms.
http://users.telenet.be/davshomepage/daewoo.htm (1 of 2)12/02/2008 17:38:30

Untitled Document
Back to homepage
http://users.telenet.be/davshomepage/daewoo.htm (2 of 2)12/02/2008 17:38:30

Sony IR (infrared) remote protocol code
SONY infrared remote protocol
The sony ir code

The Sony remote control is based on the Pulse-Width signal coding scheme.
The code exists of 12 bits sent on a 40kHz carrier wave. The code starts with a header of 2,4ms or
4 times T where T is 600S. The header is followed by 7 command bits and 5 adres bits.
The address and commands exists of logical ones and zeros. A logical one is formed by
a space of 600S or 1T and a pulse of 1200 S or 2T. A logical zero is formed by a space of 600 S
and pulse of 600S.
The space between 2 transmitted codes when a button is being pressed is 40mS
The bits are transmitted least significant bits first. The total length of a bitstream is always 45ms.
The following bitmaps are waveforms measured with a digital oscilloscope. The signals were transmitted with a sony
remote control
http://users.telenet.be/davshomepage/sony.htm (1 of 4)12/02/2008 17:38:34



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Decoding the Sony IR protocol (SIRC) with a pic
Decoding Sony IR protocol with a pic16f628
Today I'm started to write the firmware to decode ir signals because many people asked for it. On this page I will
explain how I'm doing it with a pic16f628. The code will be written in assembler. Maybe later when I have good
reactions on this topic I will publish my code of the tinyserirchip for the Phillips RC5 code.
Because many newbies and also hardcore electronists don't like it to make inmediatly huge printed circuit boards,
so I will keep the hardware to a minimum that you can start with a breadboard (the way I did it to test the
firmware), experimental pcb's.
These are the steps to do:
Get the electronic components (cheap components approx. 10 Eur.)

Place them on a pcb, schematic see further (Easiest and fast way is on a piece of experimental board)
Programming a pic microcontroller or order one by me for 7 Eur (email me at davshomepage@pandora.be)
Get a Sony remote control (12bit) or an universal remote control
Here the fun can begin, see how the outputs toggle by pushing on the buttons of the infrared remote control
So whats the minimum: Because we work with IR

light we need an ir receiver. The easiest way to
receive modulated IR signals from remote controls
is with an integrated module like those ones from
Vishay or Siemens. I have the best experiences with
the TSOP serie from Vishay.
http://users.telenet.be/davshomepage/decodesony.htm (1 of 4)12/02/2008 17:38:36

Like you can read on my Sony IR protocol page the

carrier frequency is 40kHz this means I use a
TSOP1840. The output of this component is TTL
compatible and we can connect it directly on an
input pin of the microcontroller.
To decode and translate the output datastream of the
ir module we need a microcontroller, here I take a
pic16f628. Because it's easy available for the
hobbyist, very cheap (cheaper than the pic16f84)
and I'm familar with programming pic chips. To
make a visualisation when a valid ir code is received
we need also a led. I toke a white led because i have
many of them but when you change the resistor
value you can take other colors. To do something
with the received ir signals we need also outputs.
The outputs are output pins of the microcontroller,
we will use 8 of them to drive external power stages
etc.
I will add also a function that sends the data to a computer. So it will be possible to control
your pc with the received infrared code. Then with a program running on the pc it will be
possible to control winamp or other programs. At this moment the program will decode the
sony protocol. When you push a button from 1..8 on a remote control you toggle the bits 0..7
on portB. When you push button 0 all outputs will be cleared.
The circuit of the hardware

The component values are:

R1 if you use a white led 100ohm, if you use a normal led 270 ohm
C1 = 100nF
C2 = 10F /16V
IR receiver = TSOP1840
CN1 = 8 pins header
The power supply is not included in the circuit, do a google websearch with the keyword 7805 voltage regulator
and you will find hundreds of circuits.
The sourcecode
Before you download the sourcecode I'm asking two little things:
You don't rip the code (instead make a link to this page) and don't make money with it
Click on the links below to download the sourcecodes.
I need to do still some work on the sourcecode, but the sourcecode is working, just I need to add code to send the
received ir codes to a pc.
View the sourcecode:
Download the hexfile:
Many people asked me to change the code that it only responds to a specific address here you find this.
Below you can find a version for the pic16f84 you can activate also control the first four outputs and the last
together with channel buttons.
With the volume buttons you toggle outputs 1,3,5,7 or 2,4,6,8.
Downloading the sourcecode and hexfile is free, but if you appreciate my work you can make a donation via
paypal with the button below or take a look on the ads.
The pictures are send to by users who made this project, please send me your pictures to then I can publish them
and encourage other people to build this nice project.
Ahmed Abd El-Rahman from Egypt his project.

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Description of the JVC infrared protocol
JVC infrared remote protocol
The JVC infrared remote protocol is almost equal to the daewoo protocol.
It are just the timings and the spacer between the address and data bits who differs a little bit.
By the JVC protocol a logical 0 bit exists of a high puls with a duration time of 600 s followed
by a low puls of 550 s this.
A logical 1 bit is formed by a high on time of 600 s followed by low signal of 1600 s.
The carrier frequency of the infrared signal is 38 kHz. When you will decode the signal with an
integrated receiver module you need a receiver module wich is tuned on 38 kHz like the TSOP1838
fabricated by Vishay. It will function also with a 36 kHz module but the sensitivity is less than by a
38 kHz module.
Because the receiver (mostly in hobby applications a microprocessor) needs to trigger on a new
received code the protocol starts with a start bit of 8ms high level pulse and a 4 ms low level pulse.
After this the 7 address bits and 7 command bits are transmitted.
Terminating the protocol is done with an another high level signal of 600s.
The time between two startbits of bitstreams when the button on the remote control is being pressed =
60 ms but the start header is only once transmitted in the beginning of the keypress.
http://users.telenet.be/davshomepage/jvc.htm (1 of 2)12/02/2008 17:38:37

Description of the JVC infrared protocol
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http://users.telenet.be/davshomepage/jvc.htm (2 of 2)12/02/2008 17:38:37

Tinyserir RC5
Tinyserir-RC5
What is it?
Datasheet: tinyeng.pdf
Tinyserir-RC5 is a tiny microcontroller, it's a pic12f629 microcontroller who has the firmware on board
for decoding RC5 infraredsignals and send them serial to a device with a RS232 communication port,
mostly a PC.
You can ask yourself, what can I realise with this chip, oh they're plenty of applications where you can
use the tinyserirchip, like controlling winamp with your infrared remote control while you are reading a book
There is chosen for the RS232 protocol because with the USB port today, the RS232 port is free and
have no futher function.
Like the name says the tinyserir-RC5 chip can decode infrared signals coming from an infraredreceiver.
The RC5 code is common used protocol originally developped by Philips (C) and still used by plenty of
brands for controlling there devices wireless.
When you don't have a RC5 remote controller you can use a universal remote controller which can be
100% sure programmed to send RC5 codes.
Tinyserir decodes signals coming from an infrared receiver module wich is tuned for 36kHz.
An example of a compatible receiver is a TSOP1836 from Vishay.
The RS232 output pin is a pin who can be wired directly to a Basic stamp or via TTL-RS232
level converter to a free serial port of the PC, and sends messages with a baudrate of 9600bps.
Tinyserir-RC5 sends exists of the following parts: A header wich indicates if it is a reset message or
an infrared message.
If it is a reset message, a header, the name and version number aretransmitted. If it is a message for
a received infrared code a header, the toggle bit, the address of the RC5 code and the command of the
RC5 code are transmitted.
The toggle bit indicates if a button on the remote control is being pressed or released during two
received codes. The address indicates if it is a TV or a satelite receiver or something else, and the
command indicates wich button is pressed on the remote control.
All the data which are transmitted via the rs232 pin are ASCII characters, so it is possible
http://users.telenet.be/davshomepage/tinyeng.htm (1 of 4)12/02/2008 17:38:40

Tinyserir RC5
to view the codes in hyperterminal wich is standard included in Windows.
The transmitted messages are clear and every part is easy to recognize for make it simple to decode the
messages with Delphi or visual basic. Many systems are decoding directly the output of the infrared receiver
but with these method your PC slower and less accurate because your system needs to poll the input in realtime what
becomes a great problem for windows. But with the tinyserirchip your program only needs.
to read the ASCII characters in the serial input buffer of the RS232 port.
So you don't need to take care about the timing of the relative fast pulses (+-889 S) or other processes who
are running on your system who can disturb the measuring of the infrared pulses.
Tinyserir sends only messages when a valid RC5 signal isreceived, this means when the timing of the
bitlengths are between the specifications and the bitphases are inverted, if not simply no message is
transmitted.
Following examples are the messages how they appear in hyperterminal or the input buffer as ascii
characters.
A reset messages looks like :R;Tinyserir-RC5;1.00;

Tinyserir RC5
The first character of the message is always the double point. The second is the header R when it's a
reset message. After this a seperator ";" the name of the chip and the version number of the firmware.
All the messages ends with a cariage return and a linefeed.
The header and the separate characters makes it easy to recognize the different parts of the messages.
The reset message is always transmitted as first after a reset of the chip.
A message is also transmitted when a valid RC5 code is decoded.
The chip sends a messages like this: :C;1;000;006;

First the double point followed by the second character C to indicate it's a received RC5 code.
After this a separator and the toggle bit is transmitted. The toggle bit indicates if a button on the
remote control is being pressed or released between two received codes.
After this again a separator follows and 3 numbers to indicate the address of the rc5 code. This is 000 for a
TV remote control or a VCR is 005. After this a separator to end this part of the message followed by
3 numbers which indicates the pressed button on the remote control.If we press for example on the
button 6 the tinyserir will transmit 006 followed by a separator and to end the message a carriage return
+ a linefeed. (ASCII 13 + 10)
There are also two ledoutputs who can drive directly led's for some indication: like 1 led that blinks
with a fixed frequentie when the firmware is running and another led flashes when receiving infrared pulses.
How to order?
Order now one or more pieces by clicking on the buy now button.
For the payment you need a Paypal account.
Customers from Belgium and Netherlands can order via the dutch page.
The chips are shipped in the next 3 workdays.
What's the price?
1 piece : 9 Euro + shipment

Shipment: 5 Euro
Is there testsoftware available?

Tinyserir RC5
The first steps to see if your hardware works, can be done with hyperterminal or with the
following testprogram for windows 95/98/ME/XP.
Click here to download the testprogram
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Untitled Document
RC5, panasonic receiver
Here you can view pictures of a receiver I made for some friends.
There are 2 versions of it. A version which understand the RC5 protocol and a version who
understand the old panasonic protocol.
The receiver has 7 outputs who are activated or deactivated by pressing one of the corresponding
buttons on the transmitter. Easy with one touch you can control several electronic systems like
your garden spots or the waterfall pump.
The distance between transmitter and receiver is up to 15m.
This version of the receiver has also a light sensor wich can turn off 3 outputs after a programmable
darkness time. This is usefull to save energy in a garden lightning system.
The user has also an indication led on the receiver which is illuminated 3 seconds when the
receiver receives a correct code.
Pictures
The first picture is the receiver. The receiver contains the Infrared sensor, light sensor and
the high efficiency led.
Click on the picture for 640*480 picture
The follow picture is a foto of the whole system built in a vynckier housing
You can see the main processor board and the relais (only 2 ouputs used).
The right foto is build in a general electric housing with the relais placed on a PCB where 4 ouputs
are used
http://users.telenet.be/davshomepage/receiver.htm (1 of 2)12/02/2008 17:38:42

Untitled Document
Click on the pictures for a 640*480 picture
The follow picture is a detail foto of the processor board

The processor is a pic6f84 who decodes the received infrared codes and switch the outputs.
The right foto is the waterfall (pump) who is controlled by the receiver.
Click on the pictures for a 640*480 picture
http://users.telenet.be/davshomepage/receiver.htm (2 of 2)12/02/2008 17:38:42

Make your own easy and free pic18fx52 bootloader
You are searching for a free and easy bootloader? You can find it here.
What is a bootloader for the pic18fx52?
A bootloader is a small piece of firmware (max 512 bytes for the pic18fx52) in the beginning of the
program memory to quickly and easily download your own developed firmware in the pic micro.
Usually the comport of the pc is used for the communication between your PC and your picmicro
application.
My application at this moment: a servo motor controller for positioning
an axis of a milling machine.
Why should I program my pics via a bootloader?
A programmer can do this also. Yeah right but when you are developing an application you need to test
http://users.telenet.be/davshomepage/bootloader.htm (1 of 5)12/02/2008 17:38:44

many times the new written code. To do this you need to take the micro out of his socket, place it in the
programmer, programming it and removing it back to place him again in the application socket. After a
few times you have broken pins, painfull fingers and wasted a lot of time. Now you just need to start the
download software. Download your program to the pic and doing a reset. So you have more time to
spent on your project then change all the time the pic micro. Believe me once you did it this way you
will not doing it otherwise again.
The bootloader itself
The bootloader I'll show you is the application note

AN851 from microchip
, but when you do it like it's described in the app note you still need to make some changes in the
sourcecode before it will work. For this reason and because I've read on some forums that many people
have problems with it I show how you can do it. And downloading a working hex file and assembler file
on this page.
The bootloader sourcecode that I changed a little bit.
I've changed the original sourcecode because when you download it from microchips website it will not
work. The firmware likes to be written for a microcontroller with 2 serial ports. And at the end before
the subroutine waitrise they placed an org 0x00A. Why I don't know, but this is wrong and the code does
not work with this. So I removed it. To start the bootloader software the data on the last internal eeprom
address must be FF, when it is another value it jumps to the new reset vector at 0X0200h.
I changed this and used the RA,0 input pin to select wether to start the bootloader firmware or the
user program. When RA,0 is high it starts the bootloader when low it starts the userprogram. This
way it is easy with a jumper to select this and a reset button to reset the processor.
Click here to view the changed sourcecode.
Click here to view the hexfile.
How to get the bootloader in the chip.
You just need one more time using your old programmer to programing it into the pic. I'm using an
jdm programmer
with my selfmade adapter for 40pin devices. (don't laugh with me but this is the way i'm doing, see the
foto). But it works and its the cheapest adapter.

You just connect with wires the pins on the 18pin socket to the 40 pin socket.
-----18pin-----40pin-----
MCLR-pin4-------pin1-----
GND--pin5-------pin31----
+5V--pin14------pin32----
Data-pin13------pin40----
Clk--pin12------pin39----
Don't forget also to set the config bytes because they are not included in the hex file: For an Xtal
oscillator of 20Mhz I set, Config 1 (hex) FAFF, config 2 FEFC, config 3 FEFF, config 4 FFFA, config
5,6,7 FFFF
The download software.
To communicate with the bootloader firmware in the pic, you need also software that runs on your pc.
Microchip added a little and simple but effective program to download the userprogram into the pic.

Click here to download the user software.
The memory organisation.
At this moment the pic18 devices are using the first 512 bytes of program memory as the boot block.
Future devices may expand this but however this bootloader fits in the first 512 bytes. The bootblock
can be write protected to prevent accidental overwriting.
REMAPPED VECTORS
Since the hardware RESET and interrupt vectors lie within the boot area and cannot be edited if the
block is protected, they are remapped through software to the nearest parallel location outside the boot
block. Remapping is simply a branch for interrupts, so PIC18F users should note an additional latency of
2 instruction cycles to handle interrupts. Upon RESET, there are some boot condition checks, so the
RESET latency is use additional instruction cycles.
WRITING CODE The bootloader operates as a separate entity, which means that an application can be
developed with very little concern about what the bootloader is doing. This is as it should be; the
bootloader should be dormant code until an event initiates a boot operation. Under ideal circumstances,
bootloader code should never be running during an applications intended normal operation. When
developing an application with a resident bootloader, some basic principles must be kept in mind:
Writing in Assembly When writing in assembly, the boot block and new vectors must be considered. For
modular code, this is generally just a matter of changing the linker script file for the project. If an
absolute address is assigned to a code section, the address must point somewhere above the boot block.
For those who write absolute assembly, all that is necessary is to remember that for PIC18F devices, the
new RESET vector is at 200h, and the interrupt vectors are at 208h and 218h. For PIC16F87XA devices,
the RESET vector is at 100h and the interrupt vector is at 104h. No code, except the bootloader, should
reside in the boot block.
Writing in C When using the MPLAB C18 C compiler to develop PIC18F firmware for an application,
the standard start-up object (c018.o or c018i.o) must be rebuilt with the new RESET vector. Like
modular assembly, the linker file must be changed to incorporate the protected boot block and new
vectors.
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PICmicro Sites
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WebRing Inc.
Search

Untitled Document
16 * 16 bit signed multiply
Negate 24 bit
Add signed 32 bit
subb signed 32 bit
Do you want see more code examples like rc5 decode routines type it in and click the search button.
Search
http://users.telenet.be/davshomepage/picsource.htm12/02/2008 17:38:45
The led page
leds
LEDs(Light emitting diodes) are little lights used in many products. You can find them in toys, synoptic panels,
car lights, garden lights, house lights, remote controls etc.
You can find them in the classic colors red, green, yellow,orange,infrared but also the newer colors blue, white,
UV, pink.
The famous history of the leds begun in the 60's.
Leds are current driven devices. The brightness is proportional to the current through the led. Usually a resistor
connected to a voltage source limits the current in most applications. Mostly this is the easiest and cheapest
solution.
A current of 20mA for a 5mm led is the nominent current for most devices, but always check datasheets or
application notes before connecting leds to power supplies. Because one little mistake can send your led to
heaven. Never go higher then 25mA else the lifetime of your led will be shorter
Also important is the direction of the current thus also the polarity of the voltage. You can compare leds with
diodes. In one direction they conduct current and will be illuminated, in the inversed direction they stop the
current and remain dark. Now how can you see what the positive lead(anode) is and wich the negative lead
(cathode). Well the longest lead is the anode the other the shortest is the cathode(flat side on the package).
http://users.telenet.be/davshomepage/leds.htm (1 of 3)12/02/2008 17:38:47

The led page
A bad connected voltage higher than the backward voltage typical 4 to 5V will damage the led)
The forward voltage of the led differs from color to color. Some typical voltages are:
Red: +-1.8V
yellow: +-2V
Green:+-2.1V
Blue: +-3.2V
White: +-3.2V
Calculate it:
Now the most important formula to connect the led with a series resistor at a voltage:
If: I forward (typ:20mA)

Uf: forward voltage (see above)
R: series resistor in ohm
U: Power supply voltage
R = ( U - Uf ) / If
Example:
White led with a nominal current of 20mA and forward voltage of 3.2V will be connected to a voltage of 12V
what resistor do i need?
R = ( 12V - 3.2V ) / 0.02A
R= 440 ohm
So the resistors must be at least 440ohm this means we take a real resistor of 470ohm
Some advice: Don't raise the input voltage too high, because all the energy will be wasted in the resistor.
When the power dissipation is high, the resistor needs to be bigger and more expensive.
The power rating of the resistor needs to be at least:
U: Input voltage
Uf: Forward voltage of the led(s) (sum the forward voltages of all the leds together when more then 1 led)
Pmin: Min power rating of the resistor
Iled: nominal current of the led

The led page
Pmin = ( U - Uf ) * If
Example:
When you take the values of the example above, our resistor of 440ohm must be rated:
Pmin = ( 12V - 3.2V ) * 0.02A
Pmin= 0.176Watt
This means we take a resistor with a nominal power rating of 1/4 Watt
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Constant current source with LM317
Current source with LM317
Current source
A current source is an electrical or electronic device that delivers or absorbs electric current. A current source is the
dual of a voltage source. Current sources can be theoretical or pratical. I will handle only the practical with the use of a
LM317.
Why using a current source instead of just a simple cheap resistor? In many situations a resistor will be enough but also
some devices need a constant current irrespective of the voltage: ex. a 20mA current loop transmitter. Also LEDs are
current-driven devices that require current limiting when driven from a voltage source. In most applications, it is
desirable to drive leds with a constant current source. The current source is used to regulate the current through the led
regardless of powersupply voltage variations or changes in forward voltage drops(Vf) between LEDs.
LM317
The LM317 is a monolitic integrated circuit. It's a 3 terminal positive
voltage regulator designed to supply more than 1.5A of load current
with an output voltage adjustable over a 1.2 to 37V. It employs
internal current liniting, thermal shut-down and safe area
compensation. The LM317 is cheap, thermal protected, up to 1.5A and
easy available.
The schematic
http://users.telenet.be/davshomepage/current-source.htm (1 of 3)12/02/2008 17:38:48

Power dissipation
Because the LM317 is a linear regulator and needs a voltage drop of about 3V, the dissipated power will be the voltage
drop over the LM317 multiplied by the current of the circuit.
P=power loss
U=supply voltage
Uf=voltage drop device
I=current
P = ( U - Uf ) * I
Tip:
When you have a device with a specific voltage drop and a relative high current(ex. a white lumiled: 3.2V, 0,35A 1W)
keep the input voltage as low as possible, but keep in mindthat the LM317 needs a voltage drop of 3V.
Example with a white lumiled:

The led needs a forward voltage of 3.2V. To minimize the power losses we will connect the led to a voltage of +-7V
(Voltage drop LM317+forward voltage led+1V reserve)
A bad example with a white lumiled:

What is the power loss when we connect the led to 11.7V: Well when the the forward voltage of the led is 3,2V and the
current is 350mA by a power voltage of 11,7V then with the law of ohm we can find a power loss of +-3W: 3 times the
led power (certainly not economical).
I'm sure the LM317 will become very hot. The LM317 devices have internal shutdown to protect from overheating but
in all working conditions the junction temperature must be within the range of 0 to 125 deg celcius. So a heatsink
maybe required at maximum power loads and maximum ambient temperature.
P = ( U - Uf ) * I

P = ( 12V - 3.2V ) * 0.35A
P = 3W
When it's impossible to lower the voltage of the powersupply and the current is high maybe a switched current source
will be better.<> I will explain this in the future.
Current adjustment:
Now we know the needed input voltages but still don't have a constant output current. For this we gone abuse the
voltage regulator. We place a resistor in series with the LM317 and the output device (ex. a led) and connect the adj pin
over the resistor. Because the LM317 will regulate the voltage on the adj input allways to 1.25V, we become a constant
current through the resistor and connected device
How it works: Over the resistor there is always a voltage present of 1.25V
This means when the current decrease, normaly the voltage over the resistor will be lower also but what happens now:
the regulator lets increase his output voltage to adjust a constant voltage over the resistor of 1.2V
So we can calculate with ohms law what resistor is needed to get a specific current.
R=U/I
R = 1.25V / I
Example: We will supply 3 lumileds 1W power rated in serie with a 12V battery. The nominal current for the leds is
0,35A We can find the proper resistor value with the formula above:
R = 1.25V / I
R = 1.25V /0,35A = 3.57 ohm
Thus we need a resistor of 3.57 ohm but will not find one with this value. To solve this problem take a value that's
higher. Here in the example we will take one of 3,9 ohm.
The real current will be then I = U / R = 1,25V / 3.9ohm = 0,32A what not will be a problem (it extends the lifetime of
the leds)
Power rating of the resistor:

It's easy because:
P=U*I
P = 1,25 * 0.32A = 0.4W

In real we take a resistor with a 10% higher power rating: here we find 1/2 Watt.
Going further:
Back to homepage

Win always with the roulette (online casino)
Roulette game
I know this sound like music in the ears and it is not relevant with my other electronic pages, but trust
me it works and I tried it many times and it lucks allways. Many sites are asking a lot of money for this
easy method, but I will show it on this little page.
I think everybody knows how you can play roulette, but my method works just with playing on color,
pair, unpair...
Thus all the options where you have one chance on 2 to win and of course they payout two times the bet.
What's the trick.
Well when you bet for example 1$ on the color red, and it is red well lucky you receive 2$ and thus wins
inmediatly 1$. No serious now: You bet 1$ on red and it is black. No problem you loose your bet but,
and next game you bet 2$ on red (double your bet).
But again it was black: no problem next game you double again your bet, so this will be now 4$. Now
the roulette choose red.
Bingo:
Why bingo well lets see once we played 3 times and have bet a total of 7$. Last game it was 4$ and
received thus 8$. This means we spent 7$ and received 8$ thus we won 1$.
When you allways double your bet after you lost, at the first time you win, you win your starting
bet.
And this you can apply on all games where they pay 2 times the bet when you win.
But now you will ask what if the zero was played: no problem keep your color and the next time when
it's your color you win your bet.
Will you try it for free you can do it by online casino were you can play for free just for the fun.
Another example: lets start us with 2$ on red and loose 4 games, the fifth game it is red: well we will
win 2$: We lost first game 2$, second game 4$, third game 8$, fourth game 16$, fifth game 32$ so a
total of 62$ but because we receive 64$(32$*2) we are winning 2$ (the beginning bet).
Write it once down on a paper with different situations or colors or try it once with an online free casino
game and you will see that it works, or do a search to find other tips and tricks on the web.
http://users.telenet.be/davshomepage/win-roulette.htm (1 of 2)12/02/2008 17:38:49

Win always with the roulette (online casino)
I do it always this way and like it when we go once with the family or friends to the casino to play some
money.
Just the different is the others are allways loosing money and i win. Nice.
Good luck!!!
Back to homepage
http://users.telenet.be/davshomepage/win-roulette.htm (2 of 2)12/02/2008 17:38:49

Untitled Document
Datasheets
PIC16F84
Errata PIC16F84
Programming the pic16f84
TSOP1836
I2C bus specifications
MAX232 Linedriver
Back to homepage
http://users.telenet.be/davshomepage/datasheets.htm12/02/2008 17:38:50
Links to other electronic pages
Links:
Microchip (manufacturer of pic microcontrollers)

Elektuur (Magazine about electronics)
The educational encyclopedia (TIP:) (A free educational encyclopedia)
elektronica.Startkabel.nl (Dutch) (The place to be to start with electronics)
epanorama.net (Just everything about electronics also a lot about infrared projects)
Circuitsonline (Dutch) (Geweldige site met veel schakelingen over diverse onderwerpen)
Click on the icon to get a copy of the 100% free mozilla firefox webbrowser. It's faster it's safer.
http://users.telenet.be/davshomepage/links.htm12/02/2008 17:38:50
Davshomepage
Hi,
It's me the owner of this Website.
Name: De Vleeschauwer David
Address: Langemunt 59
Zip/postal code: 9420
City: Aaigem
Country: Belgium (Europe)
email: davshomepage@pandora.be
http://users.telenet.be/davshomepage/itsme.htm12/02/2008 17:38:51
BS Club - PIC Interpreters Club
BSSClub
Email us!
New! Index of useful literature
New! Basic Stamp 1 divided by four ST1-64 code version 2 available online!
High Language Interpreters Club for Microcontrollers

This page is dedicated to the people that are interested in building, testing, and using various higher
language interpreters for Microchip PIC processors.
Club Membership
Club Membership is currently unavailable.
Reverse Engineering Disclaimer
The club will not support any software or hardware development, based on the reverse engineering (i.e.
"poping") of read-protected chips. This prohibited techniques also include using non-standard
environmental conditions (e.g. non standard voltage, frequency, or temperature) for reading otherwise
unreadable data from hardware modules or chips.
Current project CORE ST1-64 ver2.0

CORE ST1-64 is a virtual machine running on a PIC16C84 or PIC16F84 microcontroller
that interprets the intermediate code, stored in the internal on-chip 64 byte EEPROM
memory. The machine is fully compatible with Parallax Basic Stamp 1 Basic interpreter
with the only exception - the program memory has only 64 bytes. The compatibility
includes compatible download protocol and debugging facilities. For development can be used the original
development software by Parllax or Windows development software by TEP.
Interpreter code for CORE ST1-64 version 1.0 is now available.
Before downloading it please subscribe our mailing list (if you did not it previusly). You will be noticed
about further development and experiences of others. Now you can
Download the ST1-64 code

If the above button does not work, please try this link.
http://www.geocities.com/SiliconValley/Cable/7772/ (1 of 9)12/02/2008 17:39:00

The file was downloaded 1511 times until March 22, 2000.
Compiler from source language (currently only BASIC) to the intermediate code of CORE ST1-64. The
compiler ST1.EXE is included in the distribution. The syntax of the input language of this compiler is
compatible with the Basic Stamp I language with some extensions, that will be useful in future types of
core. The compiler after compiling displays the size of compiled programs in bytes, so the STMPSIZE
utility is no longer needed.
This compiler allows compiling the Basic program into the intermediate code (the default action of the
compiler), downloading the program to the ST1-64 chip using parallel port interface (with /l option) or
serial port interface (with /s) option and debugging the program (with /d option).
The compiler also generates the output file with the binary intermediate code named CODE.OBJ. The name
of this file can be changed using the /o command line option.
The ST1 compiler uses in present version for downloading the parallel interface that is vulnerable to
interrupts. For maximal reliability it should be run under clear MS-DOS (not the DOS window under
Windows). You can use it also in the DOS window under Windows, but the downloading is not allways
succesful and sometimes you should repeat it. In near future will be implemented downloading using serial
interface that is not vulnerable to interrupts.
Compiler is written using LEX and YACC tools and is prepared to be multilanguage compiler with multiple
code generation modules. Future versions will support more languages (the BS1 syntax is only moderate
start) and code generation modules for interpreters with more memory and also direct code generation for
microcontroller.
Circuit. The basic circuit for parallel downloading is very simple. The ST1 compiler supports both serial
and parallel port downloading (the original DOS Stamp software downloads only via the printer port).
Serial port downloading requires an 'adapter' to convert the +/- 12V serial signals down to a safe 5V.
This adapter is designed to adapt the original 'printer port cable' for use with the serial port. Naturally you
could also construct a new cable arrangement from scratch. Note that pin 6 and 7 on the serial connector
must be linked. Note also that the adapter requires a 5V power source, which can be sourced from the
Stamp's 5V output pin.
There are two versions of the conversion cable. The first one uses transistors and the second one uses
MAX202 or MAX232 circuit.
You can look at ELECTRONICA ESTUDIO site where is the schematics and PCB
layout of the ST1/64 hardware under the name "Clon Stamp 64". You can also order a
kit here.
Other compilers. If you are not satisfied with the above compiler, other compilers can be obtained from a
number of sources. The currently known possibilities are following:
The first possibility is to use an original Basic Stamp I editor for MS/DOS developed by Parallax
(BASIC Stamp is a registered trademark of Parallax, Inc.). This editor is called STAMP.EXE and is

freely downloadable from the Parallax site or from Parallax FTP server.
The second possibility is to use a BS/4 Editor written by Antti Lukats from Silicon Studio Ltd. that
was developed for the BS/4 project and is freely downloadable from the Dontronics page Basic
Stamp Divided By Four.
Note that this editor uses different downloading protocol than CORE ST1-64, so you have to use the
BSAVE command (see our note to Parallax software) and then download it using BSLOAD.EXE
downloader by Parallax. If there will be enough interest we can maybe develop a CORE ST1-64
version with BS/4 compatible download protocol. When using current version of BS/4 Editor you
cannot use DEBUG command.
The third possibility is to use a nice Windows based sofware created by TEP. The software is
downloadable from TEP site. According to the authors: This Windows software has been developed
because the original Parallax DOS software was not suitable for schools running Windows NT
networks, or for any schools who prevent DOS access for system protection reasons.
This software is fully compatible with programs written in the DOS software, and programs written
in either system can be exchanged without modification. However this software downloads to the
Stamp via the serial port, rather than via the printer port as used with the original DOS software.
See the Download Cable section for further details.
BSSClub note: The serial downloading should be without problems possible also for CORE ST1-64
chip, but we did not check it. We encourage our users to test it and to let us know about results.
If there is available any other suitable compiler, please let us know.
Documentation
For users unfamiliar with the Basic Stamp system we strongly recommend the original Basic Stamp
manual, which is available in pdf format from the Parallax Web site at http://www.parallaxinc.com.
Bug History
- Version 0.1, Initial Release

- Version 2.0, November, 1999
Added compiler ST1.EXE
Added and tested serial port dovnloading circuit
Added GIF version of circuit schematics
Removed ID locations programming in hex file
Added two versions of hex file - for 16C84 and 16F84
You are encouraged to report bugs and errors using the Implementation error report
Distribution
This software is property of BSSClub and you are free to use it for your personal use as you see fit.
However, this software is not public domain and you may not redistribute it in any way with any product or
service. If you would like to mirror the official distribution on your Web or FTP site, contact BSSClub and
we will not unreasonably withold our permission to do so provided you agree not to charge for the software,
not to modify it in any way, and you agree to keep the most current version.
Disclaimers
This software is provided free and is as-is. BSSClub makes no warantee as to its fitness for any purpose
whatsoever. Basic Stamps are a product and registered trademarks of Parallax Inc. BSSClub is in no way
affiliated with Parallax.

An older project BS/4 - Basic Stamp Divided By Four by Antti Lukats
Some time ago, Antti Lukats of Sistudios came up with a Basic Stamp divided by four. The original basic
Stamp One has 256 bytes for tokens in an external 256 byte EEPROM (BASIC Stamp is a registered
trademark of Parallax, Inc.). Antti's has just 64, which is the internal data eeprom storage of the PIC16C84
and PIC16F84 EEPROM version PICmicros.
This is an ideal starting point for Students, and Hobbyists, and may well be suitable for small Industrial
Applications.
Schematics of the board for this project is here and the whole PDF document can be downloaded from here.
Important note! If you are going to build this circuit, consider that the circuit for the following
project will be slightly different and this circuit will no be usable for them. We recommend you to
slightly wait and build the circuit suitable for both projects.
It appears that possible additional development on this project is not forthcoming, so this code is placed on

the web free for personal use only and can be downloaded from the Dontronics page Basic Stamp Divided
By Four.
The BS/4 project contains some unimplemented features and some errors.
Known unusual features: loading protocol different from original BS1, using P7 in SERIN and SEROUT
commands will force HOST port to be used instead of P7 Pin.
Firmware v 0.01 (alpha) known bugs: DEBUG not working, POT not working, SLEEP and NAP not
working, SERIN working only partially
You may report further bugs and errors using the Implementation error report
Other project - Picaro by Tom Napier
A Stamp-like Interpreted Controller

For years, Tom's been itching to control the instruction sets of processors. Using a PIC, some memory, and
an interpreter, he bypasses the processor hurdle and writes his own language. He shows you how to do it,
too.
Unfortunately, this interpreter can be programmed only in a special assembly language. The article
describing the controller is here in PDF format.
Download source code and binaries: picaro_UPDATED!.ZIP
Other project - Tiny51 Basic presented by Dontronics
The Jesstec Tiny-51 Interpreter is an adaptation of the old Intel Tiny Basic Interpreter and has been
designed to run out of serial EEPROM, one or two enhancements have been done, and a PC front end
developed which will allow programs to be written without line numbers and downloaded to the system.
Download binaries from Dontronics page.
Implementation error report
Here you may report the bugs or errors that you have discovered in our projects.
What project error are you reporting: CORE ST1-64 Error Report
Your name: (Do not hit return)

Your email: (Do not hit return)
Please provide your source code
Please provide error condition and description
SEND CLEAR
PIC and Basic Stamp Books
BASIC Stamp / Stamp 2 / SX
Microcontroller Projects With Basic Stamps.

Paperback - 300 pages Bk&Cd Rom edition (October 1999)
ISBN: 0879305878
This book is much better than the regular Stamp manual. It starts out explaining how
everything works and then covers each of the commands by function which is a great idea
instead of alphabetizing them). After that the author shows you how things work by bringing
you through a series of projects. Unlike some books most of these projects are simple enough to breadboard
in 10 or 15 minutes. There are a few projects that are more complicated at the end so you can get some feel
for how do do a real design too (like the morese code keyer that has a pcb).
Programming and Customizing the Basic Stamp Computer.

Paperback - 350 pages Bk&Cd-Rom edition (March 1998)
McGraw-Hill; ISBN: 0079136842
A book/CD-ROM tutorial on the BASIC Stamp single-board computer, which runs a PIC
Microcontroller and doesn't require any assembly language programming. Offers a primer on
basic electronics, and coverage of both BASIC Stamp I and II, from understanding BASIC
programs to PBASIC toolboxes and applications. Includes 12 complete projects demonstrating applications,
and a reference guide. The accompanying CD-ROM provides software tools for developing PIC
applications.

The Basic Stamp 2 - Tutorial and Applications.

Spiral-bound - 170 pages 1 edition (February 1998)
Peter H. Anderson; ISBN: 0965335763
Basic Stamp: An Introduction to Microcontrollers.

Paperback - 416 pages (March 1997)
Butterworth Heinemann; ISBN: 0750698918
Covers both the hardware and software sides of the Parallax BASIC Stamp 1 and 2
microprocessor operation and design. The BASIC Stamp is built on PIC microcontroller
hardware and uses PBASIC as its programming language, which makes it simple to use, but
versatile enough to solve professional problems. Once the hardware operations and PBASIC instruction sets
are established, applications suitable for designers as well as home hobbyists are presented. These
applications can be used as is or can be modified.
Microchip PIC
Easy PIC'n: A Beginners Guide to Using PIC16/17 Microcontrollers from Square 1

David Benson; June 1999; Square One Electronics
PIC'n Up Pace: An Intermediate Guide to Using PIC Microcontrollers from Square 1

David Benson; June 1999; Square One Electronics
Serial PIC'n: PIC Microcontroller Serial Communications

Roger L. Stevens; May 3, 1999
PIC'n Techniques, PIC Microcontroller Applications Guide

David Benson; January 1, 1999
PIC: Your Personal Introductory Course

John Morton; August 1998; Newnes
Design With PIC Microcontrollers

John B. Peatman; November 1997; Prentice Hall
Microcontroller Cookbook: PIC & 8051

Mike James; November 4, 1997; Butterworth-Heinemann
Programming and Customizing the PIC Microcontroller (Book+Disk)

Michael Predko; September 1997; McGraw-Hill
Atmel AVR
Programming and Customizing the AVR Microcontroller (Book+CD)

Dhananjay V. Gadre; January 2000; McGraw-Hill

AVR RISC Microcontroller Handbook

Claus Kuhnel; September 1998; Newnes
Handbook of Microcontrollers (Re 8051, 68HC05, Atmel AVR, PIC, Stamp, +CD)
Michael Predko; July 1998; McGraw Hill
Basic Stamp Documentation and Links
Basic Stamp FAQ maintained by Al Williams

Parallax Basic Stamp mailing lists
Basic Stamp mailing list archive
L.O.S.A. List Of Stamp Applications
Official documentation and software is on the Parallax WWW site
Copy of Basic Stamp documentation
An article Decoding the Basic Stamp by Chuck McManis
HTH's Hardware Hacker filbibliotek index and directory
Stamp-like and Stamp-compatible products
TEP Basic Stamp Microcontroller (BS I board compatible HW)
Scott Edwards counterfeit Basic Stamp (BS I board compatible HW)
StampBus microcontroller (BS I board compatible HW)
BS1-Mp Micro-controller using the Basic Stamp BS1-IC module (BS I board compatible HW)
BS/4 Basic Stamp Divided By Four (BS I/4 chip compatible HW)
The Wedge board (BS II board compatible HW)
Homebrew Stamp II Board (BS II board compatible HW)
Homebrewed Stamp (BS II board compatible HW)
TEP Stamp home page with Windows Stamp 1 software
BS1 emulator by AWC
Links
AWC Electronics offers the ASP-II prototyping system for Parallax Basic Stamp Microprocessor modules,
the companion ASP-A Lab kit, and Pak-II Math Coprocessor that brings 32-bit floating point math to
almost any microcontroller. Al Williams also maintains the Basic Stamp FAQ.
Dontronics
Introduction to the BASIC Stamp by Peter H. Anderson
Pbasic's Basic Stamp Homepage with copy of original Stamp documentation
Silicon Studio
Microcontroller Development

WARS - Winnipeg Area robotics Society

EDU-PIC - how to use PICs in educational purposes. They are also planning to make cheap developement
platforms available for students and/or other interested parties.
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http://c.webring.com/cgi-bin/drive?done=http%3A%2F%2FC%2Ewebring%2Ecom%2Fwrman%3Fring%3Dpicmicro%3Bsid%3D11%3Baddsite?sid=11&ring=picmicro&addsite12/02/2008 17:39:03
OneStat Basic - Resumen
292302 -
Davshomepage
Vistas de pgina por hora de 12/02/2008 (Hoy) Imprimir Exportar Info
Per-odo: Hoy
Mostrar: Horas
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OneStat Basic - Resumen
http://www.onestat.com/aspx/reports.aspx?nav=i (2 of 2)12/02/2008 17:39:12

Front Door
Front Door
At Spy Quip World we import, Most of the products on this It could be a co-director or key
manufacture and distribute an site are manufactured to member of staff trying to
extensive range of order and may require secure confidential information
Professional Audio/Video professional installation. If before leaving to start their
surveillance equipment. With a you chose to install yourself, own business. It may be just a
proven track record of many we will guide you but there simple case of deception by a
years standing as specialists in will be no return of the trusted partner.
this field, we pride ourselves goods if the unit is not faulty You may have a strong
on our service and equipment and you fail to get it working. suspicion or just a niggling
which is second to none. Our doubt. Perhaps you just want
excellent reputation has Disloyal or conspiracy is reassurance that you are not
earned respect from all our usually conducted through under attack. Whatever your
clients. discussion. By its very reasons for wishing to establish
We offer confidential advice to nature little is committed to the integrity of another person,
meet each customers needs. writing. It may be positive knowledge of a
In our showroom you will dishonesty, involving fraud situation is preferred to
receive friendly, professional or attempts to exploit uncertainty.
help with demonstrations of situations for personal gain.
our equipment. Alternatively, It might be the theft of trade
we can advise on your secrets from within or
requirements and except outside. It could be a
orders over the internet, competitor conspiring to
telephone, fax or post. subvert employees or
compromise a company's
trading.
http://www.spyquipworld.com.au/ (1 of 2)12/02/2008 17:39:26

Front Door
Spy Quip World

1915A Dandenong Rd
Clayton VIC 3168
Ph: (03) 9543 8660 Fax: (03) 9543 8669
Email: sales@spyquipworld.com.au
Private Security Licence Number 71671650S
ASIAL Member Number 024303
http://www.spyquipworld.com.au/ (2 of 2)12/02/2008 17:39:26

http://users.tpg.com.au/users/talking/index_of_chapters.html
INDEX
[A little background on TALKING ELECTRONICS]
[Basic Electronics Theory - A 65 page

interactive course on basic electronics - only
the first 3 pages are FREE: P1 P2 P3]
THE PIC COURSE:

Read each Chapter then press NEXT
on the top of each page to go to the next chapter . . .
NEW! Data Sheets for PIC16F84
Chapter 0 (read this first) Mouseover for ON / Mouseover for OFF

BASIC vs Assembly Code
10 Quirks of the '508A
10 Tricks for 508A - New!
Our two PIC books
Programming PIC Chips - Part1
Programming PIC Chips - Part2
PIC12c508A Instruction-Set
Explaining the Instruction-Set
508A Hex Addresses - NEW!
508A Details - NEW!
25mA
Performing MATHS
A to D
50 Questions on the '508A
Data sheets for PIC16F84 - NEW!
Library of Routines:
Page1: library_A-to-bug-1
Page2: library_button-to-2Buttons-2
Page3: library_button-to-carry-3
Page4: library_carry-to-endlessloop-4
Page5: library_equates-to-labels-5
Page6: library_LSB-to-output-6
Page7: library_pageo-to-pgmJumps-7
Page8: library_pgmSpace-to-sleep-8
Page9: library_sound-9
Page10: library_sourcing-to-timeDelays-10
Page11: library_timing-to-z-11
http://users.tpg.com.au/users/talking/index_of_chapters.html (1 of 2)12/02/2008 17:39:35

http://users.tpg.com.au/users/talking/index_of_chapters.html
These are the Chapters we have put on the Web for the PIC12C508A and PIC16F84 micros
and the secret behind our programming course lies in the "Library of Routines
Chapter." This full chapter is available on our CD for $10.00 posted.
The way the course works is you are actually programming and down-loading into
a PIC16F84. You then have the option of transferring the program into a PIC12C508A to
make the project as cheap and compact as possible.
We also have a project called "5x7 Video Screen" and this provides a number of
experiments for the PIC16F84, so you have a wide choice of experiments.
Colin.
http://users.tpg.com.au/users/talking/index_of_chapters.html (2 of 2)12/02/2008 17:39:35

http://users.tpg.com.au/users/talking/index_of_pic_projects.html
PROJECTS INDEX
The first project is essential when designing new projects and for trouble-shooting
The second project leads you to a lot of programming.
The third project programs PIC chips including 12c508A and 16F84
The Dial Alarm-1 shows what can be done with a PIC12c508A
Logic Probe with Pulser au$25.80 plus post

Page1 - Introduction, How the circuit works, The Program,
Page2 - Construction, Burning the Chip
Page3 - Using the Logic Probe
Page4 - Using the Logic Pulser
Page5 - Going Further - adding sounds and tones
5x7 Display au$59.90 plus post

Index Page - a list of over 18 pages for the 5x7 Display
Multi Chip PIC Programmer au$10.20 plus post

You will also need the serial cable: au$5.30 plus post
Programs many different PIC chips
Introduction
Construction
Using
"In Circuit" ELECTROLYTIC TESTER au$7.75 plus post

Tests electrolytics "in circuit."
Introduction
Construction
DIAL ALARM -1
au$x.xx plus post
A complete dialling alarm the size of a pack of cigarettes using a PIC12c508A
Page 1
Page2
http://users.tpg.com.au/users/talking/index_of_pic_projects.html12/02/2008 17:39:41
Talking Electronics Education
WELCOME
TO
TALKING ELECTRONICS
This is our fast mirror site!
To go to our "old page" click HERE
To go to our other site in Australia, click HERE
Remember our "easy" address: http://all.at/te
For Kit prices, click HERE
Bookmark this site!
The pages below became so popular that they exceeded the download allotment of our web-space
provider, Geocities and were constantly turned off.
They have now been transferred to our new site: TALKING ELECTRONICS Interactive
Edition.
This new site is larger and is accessed on a subscription-basis of $19.95.
TALKING ELECTRONICS is the largest electronics magazine in the US and it now has a totally
separate web edition called TALKING ELECTRONICS Interactive Edition.
Click HERE to go to our new site.
I know you will like it as it is being constantly updated and a new issue is presented every month.
See sample pages by clicking the links on the introductions page.
It also has a new section called FREE Projects where you will find projects to teach programming
of PIC chips and a new range of projects for robots.
Page 1: Resistor Colour Code Calculator

The LED For "Standard" 5% resistors - fantastic for beginners
Ohm's Law
Resistor Colour Code Calculator
Resistors in parallel
For 1% resistors - first on the web!
Resistors in series
"Resistors in Series" calculator "Resistors in Parallel" calculator
Charging a capacitor
Interactive problems on CIRCUITS - 7 pages
Page 2: Ohm's Law Calculator
Capacitors in parallel Capacitors in A computer program works out any value in an Ohm's Law
series The Diode equation.
Page 3: Making Sinewaves
The Sinewave Create sinewaves with the mouse - an amazing interactive effect
Signal through a capacitor Waveforms to show how sinewaves are created by the simple "periodic" rise
Reading a GRAPH The Transistor and fall of a signal. View a sinewave being "read."
Page 4: PNP or NPN Testing transistors
The transistor driving a globe Transistor Database
Charging a capacitor
Surface-mount transistor marking database
http://www.geocities.com/talkingelectronics/index.html (1 of 4)12/02/2008 17:39:48

Page 5: All about capacitors

The Multivibrator Describes the 3 main types of capacitor:
The Flip-Flop Ceramic, polyester and electrolytic. These cover the full range of
Square wave oscillator values.
Page 6:
Testing the Multivibrator on a CRO
Page 7: "5-PROJECTS" - 19 pages!

The LED Flasher 5 simple projects built on a small PC board to gain practical
knowledge in the theory we have covered.
Project 1: The High Gain Amplifier Project 2: The LED Flasher
Project 3: The Flip Flop Project 4: Fibre Optics
Project 5: Simple Siren Cost of "5-Projects" A$20.00
Page 8: How the Brushless Motor works - The FAN in your computer!
Types of transistor stages
Page 9: PROJECTS: Beeper Bug

Sinewave oscillators: Metal Detector
Page 10: Navigation map

How DIGITAL CIRCUITS work.
Page 11: Touch Switch circuit. Demonstrates the NAND gate.

DIGITAL BUILDING BLOCKS:
AND, OR, NAND, NOR, NOT, XOR
Page 12:
How a gate works. Making a gate
Page 13: Interactive Schmitt Oscillator circuit Problem

The Schmitt Trigger Oscillator Interactive Schmitt Oscillator circuit Problem
More on the Schmitt Trigger - with transistors
Page 14: 3 Xenon Flasher circuits from disposable cameras

Connecting an input device to a circuit. Solar Charger - charge ANY battery from solar cells
Page 15:
The voltages on a common-emitter
stage and emitter follower stage.
Page 16: A Simple INTERACTIVE test

The current and voltages in a 2-stage An Auto-Scoring test
circuit. Another INTERACTIVE test
Test 4! A self-correcting test
Test 5! Another self-correcting test
Test 6! More self-correcting questions
Page 17:
A simple test you can e-mail to Colin
Mitchell for marking. FEEDBACK
Page 18:
Touch Switch Circuit
Page 19:
Super-Alpha Pair
Page 20:
Interfacing to Gates
Page 21:
More on interfacing to Gates!
Page 22:

Page 23:
Page 24:
Page 25:
Even more on interfacing to Gates!
This is the end of this course. PIC Projects are HERE
Go to PIC Programming!!!!!!
What are we at?

What is our policy?
These are easy questions to answer. We are one of Australia's largest producers of electronic
kits and educational articles. We have sold over 100,000 kits without any advertising at all
because we PROMOTE our products through educational articles.
The "1,000 Questions on Electronics" article will give beginners an understanding of
electronics and we will show suitable kits and books to buy from us to advance to the next
stage. (available soon)
Our article on PIC Programming (Australian website) will get beginners into programming
PIC16F84 and PIC12C508A microcontrollers.
Our articles in our other publications see( "BOOKS" on our Aust site) cover more than 100
other educational kits - mostly of a simple nature. When I say educational, I mean the article
has been specifically written to fully explain how the circuit works and help you get it going if it
fails to operate.
This is what stands us out. You actually LEARN electronics with us and thousands of
customers have said they have gained more from our books and kits than a $700 educational
course!
There is an enormous amount of material available from Talking Electronics in the form of
books and kits. Start with "1,000 Questions on Electronics" and as you can see on the map
above, we have a section containing projects and each has a kit you can make so you can
master the practical side.
You can also get the complete set of "Electronics Notebooks 1-6" with hand-written pages
similar to black-board learning. These books also contain a number of kits including TEST
EQUIPMENT. You can buy the kits from us and by putting them together you are on the path
to LEARNING ELECTRONICS. The main thrust is DIGITAL ELECTRONICS but a number of
analogue circuits are also included.
SEARCH HERE . . .
This Site The Web

To see more of our WEB RINGS "click HERE"
The Electronic Sites Alliance

webring is owned by
Feliks Pinkhusovich.
Want to join the

Electronic Sites Alliance?
[Skip Prev] [Prev] [Next] [Skip Next] [Random] [Next 5] [List Sites]
This Robotics and EE Webring site owned by Colin

Mitchell. Want to join the ring? Get the info.
[ Prev. Site | Skip Prev. Site | Random Site | List Sites | Next 5 Sites | Next Site ]
15-2-2004

http://talking-electronics.netfirms.com/index.html
Web Hosting by Netfirms | Free Domain Names by Netfirms
TALKING ELECTRONICS
PIC16F84 Data Pages
GOTO: Logic Probe GOTO: 5x7 Display GOTO: PIC LAB-1 GOTO: Multi Chip Programmer
Talking Electronics has a new website: TALKING ELECTRONICS Interactive
Kits, Books and Surveillance Equipment
Join Talking Electronics mailing list by clicking HERE.
INDEX OF DATA PAGES for

PIC16F84 chip
Page 1 Pinout of PICF84 chip. More Pin-outs click HERE Page

1a Hex Addresses for PIC12c508A and PIC16F84
Page 2 General Description of PICF84
Page 3 Block diagram of PICF84 chip
Page 4 Pinout description
Page 5 Memory Map
Page 6 Register File summary Option register
Page 7 Status Register
Page 8 Intcon Register
Page 9 Program Counter
Page 10 Direct and Indirect Addressing
Page 11 In/Out Ports: PortA
Page 12 PortB
Page 13 Timer Module and register
Page 14 Data EEPROM Memory
Page 15 EECON Registers Reading & Writing EEPROM
Page 16 Special features of the chip Config word
Page 17 Oscillator Types
Page 18 Oscillator Types
Page 19 Reset
Page 20 Reset
Page 21 Time-out Brown-out
Page 22 Interrupts Watchdog Timer
Page 23 Sleep In-Circuit-Programming
Page 24 Instruction Set Summary - Notes
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http://talking-electronics.netfirms.com/index.html
Page 25 PIC16F84 INSTRUCTION SET

- hard-to-follow descriptions
Page 25a TE's PIC16F84 INSTRUCTION SET
- easy-to-follow descriptions!
Page 26 ADDLW ADDWF ANDLW ANDWF
Page 27 BCF BSF BTFSC
Page 28 BTFSS CALL CLRF CLRW CLRWDT
Page 29 COMF DECF DECFSZ
Page 30 GOTO INCF INCFSZ IORLW
Page 31 IORWF MOVF MOVLW MOVWF
Page 32 NOP OPTION RETFIE RETLW RETURN
Page 33 RLF RRF SLEEP SUBLW
Page 34 SUBWF SWAPF XORLW XORWF TRIS
Page 35 P
Page 36 P
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http://www.geocities.com/talkingelectronics/fullindex.html
TALKING
ELECTRONICS
This is a full and complete index of everything on all Talking Electronics Sites.
PIC Projects Basic Electronics PIC Theory
- It is still under construction!
Resistor Colour Code Calculator for 5% resistors

Basic Electronics Course
Burning an F84
Burning a '508A
Capacitors in Parallel
Capacitors in Series
Capacitor Values
Circuit for F84
Circuit for '508A
Construction & Burning the Logic Probe with Pulser
Constructing the Logic Probe with Pulser
Data Sheets for PICF84
Full program for Probe/ Pulser/Tones/Sounds
F84 Burner Circuit -- using Multi Chip Programmer
F84 Burner Circuit -using 5x7 Video Screen
Glass-Break Detector
Going Further - see Logic Probe with Pulser
Hex File for '508A
Hex File for F84
How the Logic Probe with Pulser circuit works
Logic Probe with Pulser
LoPIC - see Logic Probe with Pulser
More Programming for the Logic Probe with Pulser
Multi Chip Programmer
NTC - Negative Temperature Co-efficient - Thermal Probe
PICF84 - Instructions Set
PICF84 - Programming the chip - with instructions
PICF84 - Programming the Chip - see burning the chip
PIC Projects
PIC Theory
Pin-out PIC16F84
Pin-out '508A
Programming the PIC16F84 microcontroller
Pulser - see Logic Probe with Pulser
Resistors in Parallel
Resistors in Series
Resistor Values - common or PREFERRED values
Schmitt Trigger using Transistors
Series Circuits - resistors in series
http://www.geocities.com/talkingelectronics/fullindex.html (1 of 3)12/02/2008 17:39:55

Series Circuits - capacitors in series

Testing Piezo's
Temperature Probe
Tolerance - resistor tolerance - 5% - gold band
Tolerance - resistor tolerance - 1% - red band
Transistor - Common Emitter Circuit
Transistor - Common Base Circuit
Transistor Schmitt Trigger
Transistor - Common Collector Circuit - also known as Emitter Follower
Using the Probe section of the Logic Probe with Pulser
Using the Logic Pulser
5% Resistors
1% Resistors
Parallel Circuits - resistors in series
Parallel circuits - capacitors in series
Basic Electronics Course:
Page 1
Page 2
Page 3
Page 4
Page 5
Page 6
Page 7
Page 8
Page 9
Page 10
Page 11
Page 12
Page 13
Page 14
Page 15
Page 16
Page 17
Page 18
Page 19
Page 20
Page 21
Page 22
Page 23
Page 24
Page 25
'508A Burner Circuit


Links
TALKING ELECTRONICS
Here are at least 2,500 links:
Jim of Newfound Electronics Links - at least 100 links
David L. Jones of Tronnort Technology Links - quite a number of links
RadioLocman circuits archive - over 9,000 circuits
SatCure Electronics - many links
David Tait's Links
Michaels Links
Simon of "Electronics 2000" links
The EE Compendium Links
101 Electronics Links - 100's of Links
Data Bookshelf Links
Dontronics Links
ePanorama Links - at least 1,000 links
mikroElektronika Magazine Links
Robotics UK Links - lots of electronics links
Larry's Links - 159 great links
Tony van Roon's - Circuits and Links
A few things on this page, at the moment
Electronic circuits and Links
CIRCUIT LINKS:
Electronic circuits
Robot ideas
http://users.tpg.com.au/users/talking/Links.html (1 of 2)12/02/2008 17:40:08

Links
2N3904General purpose NPN transistor (pdf file)

2N3906 General purpose PNP transistor (pdf file)
D. Dimario's circuits - 30 circuits
Circuits - about 35 circuits
OTHER LINKS:
Acronym's. (a word created via the first letters of other words) A B C D E F G H I J K L
M N O P Q R ST U V W X Y Z
Famous Quotes. Authors name: A B C D E F G H I J K L M N O P Q R S T

U V W X Y Z
Byt grafik kort utan att verka p garantisedeln! - you must see this. How to change the graphics card
on your PC without opening the case (which would ruin the warranty with some computers)? Text in
Swedish, but pictures by themselves tell the story.
Back to main page
http://users.tpg.com.au/users/talking/Links.html (2 of 2)12/02/2008 17:40:08

Welcome to talkingelectronics.com.au
Welcome to Talking Electronics!
Click to go to Interactive Site
For all enquiries, please contact Colin

Mitchell on 0417 329788
Before placing any order or for any

technical questions etc, please email
me:
Colin Mitchell: talking@tpg.com.au
http://www.talkingelectronics.com/12/02/2008 17:40:11
http://users.tpg.com.au/users/talking/Logic%20Probe%20with%20Pulser-Intro.html
Tuesday, February 12, 2008
LoPIC
There are 5 pages
in this project:
Intro (this page)
LOGIC PROBE
Construction&Burning
Using the Probe
Using the Pulser
with PULSER
Going Further
Here are the articles/ pages/ 13966

data/features etc:
Burning an F84
Burning a '508A
Buy a kit
Circuit for F84 (here)
Circuit for '508A (here)
Circuit Symbols
Construction
Data Sheets for PICF84
Full program for Probe/
Pulser/Tones/Sounds
F84 Burner Circuit
-- using Multi Chip Pgmr
F84 Burner Circuit
-using 5x7 Display
'508A Burner Circuit
Going Further
INTRODUCTION
Hex File for '508A
This project is a combination Logic Probe and Logic Pulser. It is capable of testing all sorts of digital
Hex File for F84 and microcomputer projects. You will find it extremely handy when designing a project as the golden
How circuit works(here) rule is to test everything in steps and stages during the design-and-construction process.
More Programming If you are not sure how a Logic Probe or Pulser works, let me explain.
Multi Chip Programmer Suppose you have a PIC project (or any type of digital project) with an output line that is connected to a
Parts List (here) LED. But the LED does not illuminate. The fault could be in the microcontroller, the program, the LED or
Pin-out PIC16F84 (here) the wiring. To "hone-in" on the problem, the quickest thing to do is measure the voltage on the output
Pin-out '508A (here) line. You can do this with a multimeter but a Logic Probe / Logic Pulser has other features, as you will
Prices for kit etc (here)
Program for F84 see.
Program for '508A Firstly the Logic Probe:
Soldering the parts To use the Logic Probe, the earth lead of the Probe is connected to the negative rail of the project-under-
Testing Piezo's test and both the Logic Probe and the project are turned on. The tip of the Logic Probe is then placed on
Testing Transistors the pin (or the component) to be tested. The sound from the Logic Probe will tell you if the point is
Using the Probe HIGH, LOW or contains a SIGNAL. A low-frequency sound will indicate a LOW and a HIGH frequency
Using the Pulser sound will indicate a HIGH. The Logic Probe also contains a red (HIGH) LED and a green (LOW) LED. If
a signal is present BOTH LEDs will illuminate and the tone will be a mixture of HIGH and LOW. The
illumination of the LEDs will correspond to the percentage of HIGH and LOW signal. If the signal is a
fairly low frequency, the LEDs will "oscillate." The oscillations don't correspond to the frequency but are
simply a notification of its presence.
Now we come to the other half of the project.
The Logic Pulser section is designed to produce a low-frequency HIGH-LOW waveform that can be
injected into a LED to turn it on and off, or into a speaker to produce a buzz. The current from the
Pulser is limited to about 20mA so that if you touch any point on a project, the component will not be
damaged. However, the current is just enough to turn on a LED and prove it is connected around the
correct way.
The clever part of the project is highlighted by the dual feature of the Logic Pulser. The output goes
HIGH-LOW at approx 2Hz and every second pulse consists of a HIGH that has a 1kHz tone contained
within the HIGH. This means you can probe a speaker and it will produce a 1kHz beep.
To create all these features with individual chips would take 2 or 3 chips and the board would be twice
the size. But with the PIC12c508A, this project can be made very compact and low-cost.
http://users.tpg.com.au/users/talking/Logic%20Probe%20with%20Pulser-Intro.html (1 of 9)12/02/2008 17:40:27

Most Logic Probes are fairly expensive, because they come in a fancy case. The skill is to produce a
cheap probe, and that's what we have done. The only difference is the speed of operation. Some of the
expensive probes will detect very brief pulses. Our probe is only suitable for pulses up to about 1/10
microsecond - that is: circuits with a frequency of 10MHz - or a glitch of a similar duration.
But our probe has other advantages. It has an audible output as well as visual. This means you can hear
what you are doing and speeds up the process of checking a layout when you have a lot of points to
test.
Some time ago Talking Electronics produced a Logic Probe with an audible output. But it required a lot
of components. The '508A micro (or F84) has simplified the project to less than 20 components!
HOW THE CIRCUIT WORKS

We have provided a circuit for both the PIC16F84 chip and PIC12c508A chip. Both circuits are the same
and use the same program. The only difference is the R-C oscillator components for the F84 micro. The
'508A has an inbuilt 4MHz oscillator. The only other difference is the 33k on the input line to make sure
the line goes low. The 16F84 required a 100k to keep this line low but the '508A needed 33k - possibly
due to the older technology in the chip.
The diagrams below show the two circuits:

Click for PIC16F84 data sheets
In this article we show how you can build either version and the chip you use will depend on if you want
to burn your own program using a PIC12c508A-blank (a blank or empty '508A) or a PIC16F84 or buy a
ready-programmed chip (PIC12c508A-Logic1).
That decision is covered in other parts of the article. In this section we will explain how the circuit works.
First we have to explain why the circuit is so complex. It's mainly because the PIC chip is not able to
detect a tri-state input and this has necessitated a little extra circuitry.
The tip of the Logic Probe line must be able to detect a HIGH and LOW input as well as when the tip is
not connected to anything. This is a tri-state requirement but the input to the PIC chip can only detect a
HIGH or LOW.
The second problem that has to be addressed is the fact that when the probe is not connected to
anything, none of the tones must be emitted. Most of the Logic Probes using a PIC chip have LEDs as
the indicators and one LED is always glowing before and after a test procedure. This has to be avoided
with tones as it would be quite annoying.
To get around the problem the program was written to take the probe line HIGH and LOW very quickly
and monitor the input to see if it reflected the way the line was being driven.
If it did, the conclusion is the input is not connected to anything.
If the line remains HIGH, the HIGH tone will be produced and if it remains LOW, the LOW tone will be
produced.
To detect a pulse or frequency, the input line is taken HIGH-LOW 8 times and if the high and low values
do not match-up, the conclusion is an input frequency is being detected.
This is the requirement, now it's necessary to put these requirements into a program along with a 2Hz
frequency on the pulser line to test a LED and speaker and a beep after 5-minutes to tell the user to turn
the probe off.
That's the requirement of the project.
Firstly we will look at the circuit in detail.

The front-end consists of an emitter-follower stage (also called a common-collector stage). We have
studied this circuit in our basic electronics course (page15 and page16) and shown how raising the base
causes the emitter to rise. This is the type of stage we need since the input has to rise to nearly rail
voltage for the circuit to detect a HIGH. The stage has another advantage. It creates a high-impedance
input so that the Logic Probe does not "load" the circuit it is testing. (Read about the meaning of LOAD
THE CIRCUIT in the basic electronics course, page 13).
This stage amazingly converts the Logic Probe from a 1MHz Probe to 10MHz Probe. It does this by
charging a delay circuit made up of a 100k resistor and 47p capacitor. When the tip of the Probe detects
a very fast pulse (signal) it passes it to the base and the transistor rises very quickly. The emitter rises
and charges the 47p capacitor and the transistors falls back. The capacitor remains charged for a few
more microseconds (it is discharged by the 100k resistor). The program produces a "window" of about
12 microseconds in which the input is read 5 times. If the pulse or "glitch" occurs during this "window,"
the circuit will pick it up and the program turns on the HIGH LED.
The program produces this window every 22 microseconds for more than 1,000 loops then output a
LOW to the pulser section and repeats the above. If the signal is from a high-frequency oscillator (or
repeated glitches), it will keep charging the capacitor at regular intervals and the program will flash the
HIGH LED.
The 10k resistor on the base of the input transistor prevents damage to the transistor if the voltage is
above 6v.
The Logic Pulser section has a 100R resistor to prevent damage to the output of the micro, if the tip is
placed in a short-circuit condition. The 100R resistor also limits the output current to less than 25mA so
that it will not damage any circuit being tested.
WHICH CIRCUIT DO I CHOOSE?

As you can see from the diagrams above, we have provided two versions of the Logic Probe with
Pulser. One version uses the PIC16F84 chip and the other uses the PIC12c508A chip. They both work
the same and they are basically identical but the circuit you choose will depend on your programming
facilities.
As you know, this project is part of a course to get you into programming PIC chips. The whole aim is to
master this field as cheaply as possible. We have done everything to keep costs down and many
experimenters will be able to do this course with very little outlay.
However some things cost money and even the cost of downloading and using the phone-line is an
expense, so some costs will inevitably be involved.
This project can be constructed on matrix board, using your own components and all you will need to
buy is a PIC chip. Or you can buy the PC board separately, or a complete kit. If you have bought the
Multi-Chip Programmer, you will be able to program your own '508A PIC chips and build the '508A
version of the Logic Probe.
We have produced two PC boards, one for the '508A and one for the F84. This gives you at least three
different paths to follow:
1. Build the '508A version using a pre-programmed chip. or
2. Build the '508A version and burn the chip yourself (you will need the Multi-Chip Programmer) or
3. Build the F84 version and burn the chip yourself - this gives you the opportunity to work with the
program and change any of the features.
To cover all the possibilities, here is the list of parts and kits you can buy for the Logic Probe with
Pulser. All you have to do is click HERE to order the kit.
LoPIC - '508A version

All components incl batteries, PC board & pre-programmed '508A-logic1 chip
$22.60 plus $2.20 post
LoPIC PC Board - '508A version $3.80 plus $2.20 post
LoPIC - '508A version

All components incl batteries, PC board & Blank '508A chip
$21.60 plus $2.20 post (you will need the '508A programmer - our universal
programmer)

LoPIC - PIC16F84 version

All components incl batteries, PC board & Blank PICF84 chip
$25.80 plus $2.20 post (you will need a PICF84 programmer - Use the: 5x7 Display Project or our
Universal Programmer)
LoPIC PC Board - PIC16F84 version $4.00 plus $2.20 post
Colin Mitchell recommends the Logic Probe with Pulser-PICF84 version. You can work on the
program and change any of the features.
LoPIC
PARTS LIST with F84 chip
Cost: $25.80 plus postage
1 - 100R 1/4 watt

2 - 220R "
2 - 4k7 "
2 - 10k "
2 - 100k "
1 - 22p NPO ceramic
1 - 47p ceramic
1 - 3mm red LED
1 - 3mm green LED
1 - 1N 4148 signal diode
2 - BC 547 transistors or similar
1 - 18pin IC socket
1 - mini piezo diaphragm
1 - on/off slide switch
4 - LR932 button cells
1 - black earth clip
1 - 30cm black hook-up flex
1 - 30cm tinned copper wire
1 - 30cm very fine solder
2 - long pins for probe tips
1 - PIC16F84 microcontroller chip (you
program the chip)
1 - Logic Probe-F84 PC board
(You will need either the 5x7 Display Project or the
Universal Programmer to program the chip)
LoPIC
PARTS LIST with '508A-logic1 with
pre-programmed chip
Cost $22.60 plus postage

1 - 100R 1/4 watt

2 - 220R "
1 - 4k7 "
2 - 10k "
1 - 33k "
1 - 100k "
1 - 47p ceramic
1 - 3mm red LED
1 - 3mm green LED
1 - 1N 4148 signal diode
2 - BC 547 transistors or similar
1 - 8pin IC socket
1 - mini piezo diaphragm
1 - on/off slide switch
4 - LR932 button cells
1 - black earth clip
1 - 30cm black hook-up flex
1 - 30cm fine tinned copper wire
1 - 30cm very fine solder
2 - long pins for probe tips
1 - PIC12c'508A-logic1 Pre-programmed chip
1 - Logic Probe-'508A PC board
(You will need the Universal Programmer to program the
chip if you don't buy the pre-programmed chip)
PIC12c'508A-logic1 Pre-programmed chip

Cost $10.20 incl postage
LoPIC -'508A PC board

LoPIC - F84 PC board

For any other combination of parts/chips/

boards ask for quote HERE
BUY A KIT
THE PROGRAM
The program is basically very simple. But since it has two different features (in the Logic Probe/Pulser
section), running at the same time, the complexity builds up.
There is also another section called "Sounds" on the "Going Further" page. We will not be covering this
section at the moment.
First of all, let's try to simplify the Logic Probe/Pulser program.
When a Low is detected, a LOW tone is emitted from the piezo and the green LED is illuminated. When

a HIGH is detected, the HIGH tone is produced and the red LED is illuminated. When a Pulse or
oscillation is detected, both the HIGH and LOW tones are produced and both the red and green LEDs
are illuminated. Depending on the proportion of the HIGH and LOW signal, the LEDs will have a varying
degree of brightness and if the frequency is very low, the LEDs will oscillate. If a glitch or pulse is
detected, the red LED will flicker.
The program is also required to produce a 2Hz pulse from the PULSER section that is suitable for
testing both a LED and speaker and after 1 minute of non-operation the project sends out a burst to tell
you to turn it OFF.
Both these programs are running at the same time and this can be seen in the Main routine. The Main
routine consists of 4 parts. It starts by producing the LED ON period of time shown in the diagram
below. This takes 1/4sec or 250,000 cycles. The next part of the Main routine produces the LED OFF
time and this also takes 250,000 cycles The third section of the Main routine toggles the Pulser line and
produces an output that produces an on-off waveform at the equivalent of 1,000 times per second. The
final part of the Main routine is identical to the LED OFF section.
These 4 sections are constantly looping and the signal it produces appears on the PULSER line.
But the more-complex section is the LOGIC PROBE. It has a bigger job to do and requires a lot more
thought in programming.
The first complexity is the need for a tri-state input. The Logic Probe must be able to detect a HIGH, a
LOW and when the probe is not connected to anything. But the input of PIC chip is not tri-state. So,
something has to be done to create this feature.
If a tri-state input is not created, when the tip is "floating," the input will detect either a high or low and
one of the LEDs will be illuminated. But more annoying is one of the tones will be produced.
To prevent this, the input is taken HIGH-LOW via another line and if the program detects the tip as
following the high-low signals, it interprets this as a high impedance (floating) state and all tones and
LEDs are turned off.
When probing a digital project, any signal will easily over-ride the signals we are giving the "font end"
and the program will respond by turning ON the tones and LEDs.
Since the program responds very quickly to the signals on the input, the sound from the piezo and the
illumination of the LEDs will provide a variety of effects.
It is very easy to determine if the signal is a constant HIGH or LOW or the amount of activity (frequency)
on the line. Even a 1uS pulse (glitch) will be picked up.
Obviously this is not a 100MHz logic Probe but it is certainly suitable for all the digital projects we will be
describing in the PIC series.
The secret in the design of the Logic Probe is in the front end. We have described the operation of the
transistor in the front end and now we will see how the program uses the information it gets from the
input line (pin9) to turn on the appropriate LEDs and tones.
Take one small portion of the routine where the output line RB4 is HIGH and this sends a HIGH to the
input line (pin 9). If the tip of the probe is not connected to anything, the input will detect a HIGH. If the
tip is connected to a circuit and a HIGH is present, the input will also see this as a HIGH. It is the
"intelligence" of the program that determines if the HIGH is to be counted as "HIGH IMPEDANCE" or a
"HIGH." We will cover this in a moment. One feature of the front end is the "pulse extender" consisting of
the 47p capacitor on the input line. This capacitor is charged every time the line goes high and is
gradually discharged through the 33k or 100k resistor across it. This capacitor extends very brief pulses
so that the micro sees them as a HIGH.
The input line is only open for a period of 1uS at a time and if the pulse is not present at the exact
moment, the micro will not detect a HIGH. Even if the input is open for 2uS, it is only the last 1uS that
records the information as the micro must read the line and during the next few instructions it deals with

the information it receives.

This takes a minimum of 2-3uS and the line can be open again for another measurement.
This is exactly what we have done. We have read the line 5 times, in quick succession, during the
"Input" sub-routine and this gives us a very good chance of detecting a pulse (or glitch). These are
signals that appear only once in a very long (computer) time.
Opening the line like this is called "gating the line" as it is not open all the time. You have to be lucky to
detect a signal, but if the line is open on a regular basis, the chance of detecting a signal is very high.
Now, how does the program determine if the HIGH is from an external source or part of the "high
impedance" determination?
In the "Input" sub-routine, two files are incremented. File 1E is the HIGH file and 1F is the LOW file. The
routine sends out a HIGH on RB4 and the state of the input (RB3) is detected. If it is HIGH, file 1E is
incremented, if it is LOW, file 1F is incremented. This is repeated 8 times and any combination of results
will be obtained, depending on the waveform being detected.
The program then goes to another sub-routine "TestA" and makes an assumption that if the number of
HIGH's is less than 3, a pulse is present.
If the HIGH's and LOW's equals 8 each, the assumption is "High Impedance" and nothing is turned on.
If the number of HIGH's is zero, the program assumes the input signal is a constant LOW.
If the number of LOWs is zero, the program assumes the input is a constant HIGH.
The program then goes to another sub-routine and turns on the appropriate LED and activates the
piezo.
Every time the Main routine makes a loop, it increments the "Alarm" file (file 11h). This file is then tested
to see if it is 40h. At 40h the program goes to Alarm to beep the piezo to tell the user to turn off the
project. If the Logic Probe is in use, file 11h is zeroed and only after 1 minute of non-use is the beep
produced.
The only technical (difficult to follow) instruction in the program, which we have not covered in our
discussion, is the subtract operation and test the carry flag. This is covered in our theory section in the
Library of Routines under Comparison.
ONE LAST TRICK!

The last three lines of the F84 program set RB5 to output. I know this keeps resetting the line to output
but the instructions in the Start routine did not always set the line and when the LoPIC probe was turned
on (on some occasions), the output was very weak. The problem is in reset, and although an internal
delay is activated to allow all the lines and files to settle-down before programming starts, this does not
always solve the problem.
If you encounter a fault like this, introduce a delay before the program or repeat the set-up instructions.
IMPROVING THE PROGRAM

Obviously the LoPIC program could be improved. It all depends on how you consider a good program
should be laid out and how you like to create each of the operations. We have especially kept the
routines simple so you can follow them through and see how they work.
However this does not stop you looking at the program and seeing what changes can be made to
reduce the byte count. You can even devise different ways to do a particular task.
You can also add features and modify those we have produced. The more you work on the program the
more your programming skills will improve. We have already reduce some of the routines. We shortened
the Alarm routine by introducing an instruction to toggle the Alarm line and this saved 10 instructions.
We introduced a Delay routine for the Main routine and this saved a few lines of instructions. In fact the
program has gone through more than 30 revisions and corrections and improvements. Getting the
program to work with the '508A took a lot of problem-solving, until we realised the 100k front-end resistor
had to be reduced to 33k.
All the problem-solving was done with the two tricks we have covered in our Theory section. The first
trick is to place a "Stop" instruction in the program to see how far the micro has progressed through the
program.
Anywhere in the program, insert the two instructions:
Stop NOP
GOTO Stop
Make sure you remove the instructions after use.
If you need to find out if the micro has reached a particular location, introduce a Tone routine.
At any location, insert the following instructions:
Tone1 MOVLW 080h ;The duration of the High & Low

MOVWF 15h
LoopX DECFSZ 15h,1
GOTO LoopX
MOVLW 20 ;To toggle GP5
XORWF 06,1 ;Toggle GP5
GOTO Tone1
If you want to check the situation at another location, remove the instructions above and insert the
following at the new location. Use a Tone with a different frequency, so that you know the new location
has been reached:
Tone2 MOVLW 040h ;The duration of the High & Low

MOVWF 15h
LoopY DECFSZ 15h,1
GOTO LoopY
MOVLW 20 ;To toggle GP5
XORWF 06,1 ;Toggle GP5
GOTO Tone2
USING THE PROJECT

This project has two main uses. It detects the "condition" of a line - HIGH, LOW or SIGNAL via the Logic
Probe section, while the other end tests devices such as LEDs, speakers, coils etc. The Logic Pulser
will also act as a "signal injector" for testing and repairing audio equipment or as a "digital injector" to
"clock" digital lines.
You can use the Logic Probe as a CONTINUITY TESTER (because the green LED comes on when
zero voltage is detected between the tip and clip), however you have to be careful as a Continuity Tester
is really testing for zero potential between two points and if, say, the two points have a 1.5v cell in line
with another 1.5v cell around the opposite way, the potential between the two points would be zero, but
you could not classify them as having "continuity" as the word continuity means a direct path. The Logic
Probe will produce a low tone and the green LED will illuminate but the two point will not have a DIRECT
PATH!
However, when it's all said and done, it's a multi-function piece of test equipment that will come in very
handy. The amazing thing is, it uses less than 20 components!
Now, to using the project. Don't forget, the project is two pieces of test equipment in one. It's a double-
ended project and because of the large amount of information we have produced on its use, we have
covered them both separately.
Click Here Push ONLY ONCE!
Go to: "Constructing the Logic Probe and burning the chip"

http://users.tpg.com.au/users/talking/5x7%20Display%20Index.html
5x7 DISPLAY
Data Sheets for the INDEX
PIC16F84 chip can be
found HERE
This project consists of 10 Chapters (and over 20 pages):
PIC Pinouts Chapter 1 - Index (this page)
Chapter 2 - Introduction
Chapter 3 - Construction
Chapter 4 - Burning a Chip also called "Programming" or "Downloading"
Click HERE to Chapter 5 - Display Effects a page of .gif files showing the effects you can produce
buy the Chapter 6 - Testing The Test Routine and 3 Testing Routines
5x7 Display Chapter 7 - Experiments 11 Pages of experiments Expts 1 - 28
kit Chapter 8 - Piezo Experiments 2 pages of experiments Expts 1P - 8P
Chapter 9 - EEPROM Experiments - not yet finished
au$59.90 Chapter 10 - Programming Starts Here - helpful hints on how to produce a program
plus post
us$46.25
plus post
The complete 5x7 Display
http://users.tpg.com.au/users/talking/5x7%20Display%20Index.html (1 of 6)12/02/2008 17:40:36

In a nutshell, here is what you do:

1. Read the 9 Chapters of the 5x7 Display project
2. Buy and build the 5x7 Display project
3. Download the 5x7hexFiles.zip file containing all the .hex files
4. Download IC_Prog(v04) to carry out the burning operation.
Latest version: IC-Prog v05 see also: IC-Prog help-line and IC-Prog
message Board To compile your .asm files to .hex you will need:
MPASM.
5. Read the notes on Page 3 of the Multi-Chip Programmer, on
configuring your computer to run the software.
If the 5x7 Display does not program correctly on your computer,
we have a Multi Chip Programmer project which has a different
circuit to create a higher programming voltage from your serial
port.
6. Build another project such as the Logic Probe or start designing
your own project . . . . your programming world has started.
If you are starting from "Ground Zero" and know little or nothing about electronics, go to our BASIC
ELECTRONICS course.
You must be able to recognise components such as capacitors, diodes, zeners, transistors and
resistors to build 5x7 Display project. This information is covered in our BASIC ELECTRONICS course
and a complete set of circuit symbols can be found HERE.
If you want some simple books on electronics, see our range of Notebooks and project books by
Talking Electronics at: http://www.talkingelectronics.com
If you have not constructed any electronics projects, you should see the range of simple kits by Talking
Electronics. There are over 200 kits to choose from and they can be found at: http://www.
talkingelectronics.com Build at least two or three of these kits to get your hand into soldering and
working with electronics components, before working on the 5x7 Display project.
There is an enormous amount of information from Talking Electronics to get you up to the stage of
being able to understand electronics jargon as well as being able to read circuit diagrams and
assemble simple projects. Look through this information before starting this project so you can follow
our assembly procedure and be assured it will be assembled without the possibility of dry joints or
damage to the components. .
The 5x7 Display Project starts you at the beginning with programming but the more you understand
about electronics-in-general, the more you will gain from the project.
The project covers three basic areas:
1: The mechanics. The soldering side of the project.
2: The electronics. The creation, reading and understanding of the circuit and creating circuits to suit
your own projects.
3: The program. The programming side.
START HERE:
You are now ready to start.
You will need the 5x7 Display Project. It is available from Talking Electronics for $59.90 plus $4.40
pack and post. While you are waiting for your kit to arrive (It's a same-day mail-out service but the mail
may take 2-7 days for arrival) you can cover the programming section. There's at least 3 days worth of
study in this section and it's all presented on the web with hyperlinks to each section. You can even go
through the experiments before your kit arrives and become familiar with how the programmes are
structured. It has been shown (Cocoa-Cola research) that it takes three exposures (of advertising) to
get 90% acceptance. The first pass gathers 50 - 80%, the second pass increases this to 90% and the
third pass brings retention to 95%.
With programming you have to be very near 100% if you don't want too many mistakes in a program. If
you have 5 mistakes in a 100 line program, it may take hours to trouble-shoot.
That's why electronics is a "perfect science." Things have to be "spot-on" for the project to work.
So, the more you study, the closer you will be to getting a program up-and-running the first time.

On some occasions a program has worked the first time. It's most gratifying and the more you work on
your theory, the more chance you have of getting a routine working. Not only that, increased
experience enables you to create more-complex programs. So it's benefit's all around.
Without any more discussion, here are the steps:
Step 1: Read the Introduction chapter. It will take you to the Display Effects page where you can see
some of the examples that can be created with this project.
Step 2: Read Construction-Part1 chapter. It covers the 5x7 Display section of the circuit including the
PIC chip, the CD 4017 shift-chip, the switches and driver transistors.
Construction-Part2 chapter covers the In-Circuit programmer section of the circuit. These two circuits
are combined on the PC board however they have been described separately to keep the diagrams
simple. These two pages also describe the assembly of the PC board. You can build the whole project
or just fit the first column of LEDs. The first 6 experiments require just the first column of LEDs and the
other experiments require the whole screen.
Step 3: To make sure the project works correctly, we have produced a set of TEST PROGRAMS.
These test the chips, the LEDs and the wiring to the components. They are intended for those who
have built the project on their own board or "Matrix Board" and need diagnostic tests. They are not
needed if you have put the project together from a kit as the "experiments" start you at the beginning of
programming.
We do not recommend you build the project on Matrix Board as the added work in wiring up the
components is considerable. We had to start in this way as no board was available but for the cost of a
PC board, the final result is worth the cost. PC boards are available separately from Talking Electronics.
If you want to try the test programs, they are located at:
Testing Page1,
Testing Page2,
Testing Page3.
The project comes with a pre-programmed PIC chip, containing a TEST ROUTINE. When the chip is
inserted into the project and switched on, it goes through a number of routines to display each of the
LEDs, patterns on the screen and tones from the piezo. When you program this chip, the Test Routine
will be lost. If you don't want to lose it, you can use another chip for your programming. The Test
Routine can be found at: Test Routine.
The only test we have not covered is "Burning." This is the most important (and most complex) of the
tests. The only way this can be checked is by carrying out an actual burning operation and the first
experiment will do this.
Step 4: The next step is to burn a routine into the PIC chip. This is done with the chip "in situ" on the
board. That's the advantage of "in circuit" programming. The chip does not have to be removed from
the board to be programmed.
Simply connect the cable to the serial port of the computer and fit the 4-pin US telephone plug into the
5x7 Display board.
Some of the voltages for the chip are obtained from the computer during programming mode, but the
5v from the computer does not have enough current to drive the transistor on pin 12, so the power
switch on the 5x7 project must be kept ON during programming.
The 13v required by the chip to set it into programming mode is obtained from the serial port of the
computer (as a complex combination of the voltages on two lines!). This arrangement has been
necessary so that almost any serial port will be suitable for connecting to the project.
Before carrying out any "Burning," you need to go to the first page of experiments:
Experiments Page1 and study the first experiment.
After studying it, you can download the .hex file at the end of the experiment, by either copying and
pasting the block of numbers into a text program such as TEXTPAD or NOTEPAD and then using the
burning program (called PIP-02) to load the data into the PIC chip on your 5x7 project. Alternately you
can download a .zip file containing all the .hex files for the project and select Expt-1.hex for
downloading into the PIC chip via the PIP-02 program. For more information see: "Burning a Chip."
To download the burning program (PIP-02) click HERE.
Step 5: As you go through the experiments, they get progressively more complex. We have produced
three different sets of experiments and you should look through them all and carry them out "in
parallel." In other words you can jump from one group to the other as they all cover different features
and they all need to be carried out.

Test Routine. This is the Experiments Page1

Piezo Experiments Page1
routine that comes in the Experiments Page2
Piezo Experiments Page2
chip to test your project. Experiments Page3
Testing Page1, . . . then go to Expt 27.
Experiments Page4
Testing Page2, Experiments Page5
Testing Page3. Experiments Page6
Experiments Page7
Experiments Page8 Programming Starts Here
Experiments Page9 - a study of the routines
used in this project.
Experiments Page10
Experiments Page11
Here is a detailed list of the pages shown above, with the main
features of each experiment / routine:
To download all the .hex files as a .zip: click HERE.
Test Routine. Tests the LEDs on the screen (individually) and the piezo
diaphragm (comes with the PIC chip when purchasing the kit).
Testing Page1 First column of LEDs flash at 3Hz.
First column scanned from bottom to top.
Bottom LED moves from left to right
Testing Page2, Data from "Ghost" files to "Display."
"TE MOVING SIGN." Letters are scrolled across display.
Testing Page3. Turns on a LED when button A is pressed.
Detects buttons A, B and C and turns on LEDs.
Buttons A, B and C (with debounce) and LEDs flash.
Experiments Page1 Expt 1: Turn on a LED. That's all. A LED turns ON

Expt 2: Flash a LED. A LED flashes at 2Hz
Expt 3: Scan up. LEDs in the first column turn on individually.
Expt 4: Scan up and down.
Expt 5a: Turn on a LED via button A (with poor debounce)
Expt 5b: Turn on a LED via "A" (with switch debounce)
Expt 6: Reaction GAME. LEDs in column 1 turn on individually
(up and down) and button A should be pressed when the centre LED is
illuminated.
Experiments Page2 Expt 7: Column shift right. Each column of LEDs turn on.
Expt 8: Column shift right/left. The column of LEDs shifts back
and forth.
Expt 9: Across/back - up/down. A column of LEDs turns on
across the display then up and down the display.
Experiments Page3 Expt 10: Button A starts/stops the action of expt 9.
Expt 11: Elevator display. Button A and B cause numbers to go
up and down on the display similar to those in an elevator.
Experiments Page4 Expt 12: "RUNNING SIGN" See Testing Page 2. "TE Moving
Sign." Letters run across the display.
Experiments Page5 Expt 13: Single Digit Up-Counter. 0-9 Up counter with button A
to increment the display.
Expt 14: Two Digit up Counter. 00-99 Up counter with button A
to increment the display.
Experiments Page6 Expt 15: Five Digit Up Counter. Button A increments the
display.

Expt 15a: Five Digit Up Counter with Reset. Button A increments

the display. Button C resets the count.
Expt 16: Two Digit Up/Down Counter using buttons A and C.
Experiments Page7 Expt 17: Animation-1. A single CELL is displayed on the
screen.
Expt 18: Animation-2. Five cells are displayed on the screen.
Expt 19: Animation-3. Wipe-Up turns off the rows of LEDs, from
bottom to top.
Expt 19a: Combines Expt 18 and 19.
Experiments Page8 Expt 20: Animation-4. Five Cell animation then Wipe-Up, then
Wipe-Down.
Expt 21: Animation-5. SLASH. A diagonal line moves up the
screen.
Expt 22: Animation-6. SPLASH. Similar to a stone dropped into
a pond.
Experiments Page9 Expt 23: Press button A for SPLASH - with debounce.
Expt 24: Press button A to Start/stop action. Button A is a toggle
button.
Expt 25: "Bull's Eye." A simple Hit-the-LED-game.
Experiments Page10 Expt 26: "LED Dice"
Experiments Page11 Expt 27: "LED Dice with Sound-1"
Expt 28: "LED Dice with Sound-2"
Piezo Experiments Page1 Expt 1P: Making a TONE.

Expt 2P: Producing a BEEP.
Expt 3P: Beep after button A, B and C.
Expt 4P: Hee Haw Siren.
Piezo Experiments Page2 Expt 5P: Calling Hee Haw routine.
Expt 6P: Making a NOTE.
Expt 7P: Creating a SCALE.
Expt 8P: Creating a TUNE.
Programming Starts Here Page1 - a study of the routines used in this project. You
can access this page at any time and study how the routines are created. In fact it's
a good idea to refer to this page as soon as you start the experiments.
Programming Starts Here Page2 - more routines and how they work
Step 6: Step 6 is all yours. It's the next logical step in this course. By the time you get to this step you
will be able to call yourself a "semi-master" of the PIC chip. You will be able to produce simple
programs for displays, buttons and output devices.
If you are like me, you will want to go further and use some of these skills to produce your own projects.
Already you must have a number of ideas that could be turned into a microprocessor project.
Things like alarms, interfaces, games and counters etc.
And this is where Talking Electronics can help. They have produced a number of projects and
experimental boards suited to getting you into this next phase of development.
They have produced two streams. The first stream uses the PIC16F84 as the main chip and the
second stream uses a smaller version called the 12C508A.
Many of the projects you are thinking about will require only a few input/output lines and the
PIC12C508A will be suited for the job.
For instance, if you want to design a small project and have it mass produced, the cost will have to be
as low as possible. This is where the PIC12C508A comes in. It it less than half the cost of a PICF84
and enables very low-cost projects to be produced and you will be competitive with overseas imports. It
is also available in surface-mount form so very small projects can be produced. But it takes lots of
steps to get from an idea to the finished design and TE has the parts, PC boards and ideas to help
you.
The only problem with the PIC12C508A is it is not as friendly as the PICF84 and it's only by following

our course that you will be able to design economical projects with it. The PIC12C508A course starts
with Chapter 0. Go to this chapter and you are on your way. This chapter will lead you into hundreds of
pages of programming, ideas, projects and theory on both the PIC12C508A and PIC16F84 and they
will keep you up all night for WEEKS!
Send me an email when you finish!
All the best,
Colin Mitchell,
TALKING ELECTRONICS.
(click on envelope
to send email)
Note: The PIC12C508A has 5 port lines - called in/out lines. The only limitation is: port line GP3 must
be input. If you have a project requiring 4 outputs and 1 input (or 3 outputs and 2 inputs etc) - the
'508A is the one to choose. There are ways to expand the lines or put two different devices on the
same line, so read the pages we have produced before dismissing this amazingly versatile device.
No longer do you have to work with gates

and individual chips, the microcontroller
is equal to a dozen or more gates, all in
the one package! And all our programming is:

MULTI CHIP Programmer re-direction
MULTI CHIP
PROGRAMMER
This project has moved to our POPTRONICS Interactive website:
http://www.poptronics.com/interactive/FreeProjects/FreeProjectsIndex.html
Buy Multi-Chip Programmer kit
http://users.tpg.com.au/users/talking/MultiChipPgmr-Intro.html12/02/2008 17:40:40
http://users.tpg.com.au/users/talking/MultiChipPgmr-Disasm.html
Page1
DISASSEMBLING A PROGRAM
Page2 (Reading the .hex file of a PIC16F84)
Page3 Page 4
This section does not use the Multi-Chip Programmer but it is in this section as it is a part of the
process of programming. If you take a .hex program from a book or magazine, or read a program from
a chip, the block of digits is almost impossible to read. Sometimes it is important to know if the numbers
refer to a particular program and you may wish to know if it is the latest version. You may also need to
make a modification.
The program in this article (the program is called Disasm) will take a .hex file from a PIC16F84 and
convert it back into a layout very similar to the set of instructions in an .asm file. The only difference is
the absence of annotations and labels.
The program is called Disasm (for Dis-assembly program) and the files you need to get this program
up-and-running, are contained in a self-extracting .exe file called 84Disasm.exe
The files are:
About.frm 3k FRM File
Cmdialog.vbx 19k VBX File
Disasm.exe 15k Application File This is the file you use (see below).
Disasm.frm 10k FRM File
Disasm.mak 1k MAK File
Disasm.txt 1k Text Document
To put these files on your computer, create a new Folder (go to Explore) and call it: Disassembler
To download the above 6 files in a 56k self-extracting .exe file, click HERE
Disasm requires an Application Extension File: Vbrun300.dll You may already have it on your
computer. If not, to download a 226k .zip file Vbrun300.zip click HERE
Unzip .exe & .zip into the Disassembler folder.

Two files are needed in C:\Windows\System. Move Cmdialog.vbx and Vbrun300.dll into C:\Windows
\System
Installation is now complete.
USING DISASM
Disasm will disassemble your .hex files. Firstly you will need a .hex file. Create a new folder and call it:
5x7 Display Files.
To download all the .hex files for the 5x7 Display Project, click HERE.
Unzip them into 5x7 Display Files folder.
To make it easy, you can put them onto a disk and access them in drive A as 84 Disasm only sees the
first 8 letters of each name and this is very difficult to follow!
You will need to unzip 84disasm.exe to get DISASM.EXE
When you access Disasm on the "click HERE" below, you are accessing your own computer , so make
sure the folder is in "C."
http://users.tpg.com.au/users/talking/MultiChipPgmr-Disasm.html (1 of 2)12/02/2008 17:40:45

http://users.tpg.com.au/users/talking/MultiChipPgmr-Disasm.html
You are now ready to use Disasm.

To access Disasm, click HERE.
To run Disasm, double-click on the icon: and a window will appear.
Click on File. Click on Open. Double-click on the open folder: c:\ The folders on drive C will
appear. Move down the list until 5x7dis~1 appears. Double-click on 5x7dis~1. The .hex files in this
folder will appear in the window. Double-click on the file you want to disassemble. It will disassemble
immediately. You can open two or more .hex windows (Disasm windows) at the same time to compare
listings.
To save a disassembled file you MUST rename the extension to .asm, otherwise you will LOSE the
original .hex listing.
To save a file, click on File. Click on Save as: Click on the highlighted file in the address window to de-
highlight it. Change the extension to .asm Click ok.
If you are working on a project, you must keep a back-up copy of your program on a floppy, just in
case something goes wrong. It is very difficult to re-build something that is lost, especially if it is a
written piece of work.
http://users.tpg.com.au/users/talking/MultiChipPgmr-Disasm.html (2 of 2)12/02/2008 17:40:45

http://users.tpg.com.au/users/talking/ElectroTestr-1.html
Buy a kit "In Circuit"

Page2 ELECTROLYTIC
TESTER
Page3
Page4
PIC Pinouts Page:1

INTRODUCTION
This project comes in two versions:
as an "add-on" for the 5x7 project (pages 1&2) and as a "stand-alone" project (pages3&4).
Read both sections before deciding on which version you will build.
This project adds three features to our Microcontroller Course. It shows:

The versatility, cheapness and adaptability of a microprocessor project.
INTRODUCTION
Firstly, we will describe the "add-on" version for the 5x7 Display as this is the cheapest version and, quite
frankly, it only deserves a few dollars as a piece of test equipment.
It's "all the rage" to have an Electrolytic Tester for servicing equipment and yet I have serviced over 36,000
appliances without one. Possibly it took me a long time to realise electrolytics have the capability of drying
out because old-style electros were inherently very reliable and, of-course, they were not old when the
equipment was being repaired.
Now . . . it's not impossible to live without one. All you have to do is replace all the electros in a faulty
piece of equipment, then turn it on and see the results.
Charles had a stereo amplifier in for repair recently and he started at one end of the board and replaced
every electro. He tried the amplifier at regular intervals and as the electros were replaced, the output
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improved. After replacing the last few, the output was fantastic.
Russell had the same experience. He was servicing a fax machine. After about 50 electros, the screen
came on with the correct start-up instructions, the beep tone was correct, the machine automatically
answered the line and the fax was readable. All these faults gradually developed over the years. And they
were all due to electro's drying out!
Faulty electros create enormously unusual faults. All due to drying out.
Only last week Charles had a 4 watt amplifier (operating from a plug-pack) and the background hum was
excessive. A new 1,000u electro in the power supply reduced the hum to near-zero.
In this case ripple voltage was getting into the amplifier. Exactly the same thing can occur with a more-
complex piece of equipment. The motor and thermal heaters in a fax machine produce glitches and "noise"
on the power rails and this gets into other sections of the circuit. Electrolytics are designed to absorb these
ripples by acting very similar to miniature rechargeable batteries. They absorb the spike when it is higher
than normal, and deliver energy to the power rail when the rail voltage is lower than normal.
Sometimes (very rarely) an electro is designed to pass a signal from one stage to another. If the electro is
dry, the amplitude of the signal delivered by it will be lower than expected and faulty processing may occur.
There are a few other areas where electros are used (such as integrating and separating signals) and it is
not connect to either power rail, but most of the time they are connected across the power rails.
In most cases the circuit surrounding an electro can be classified as low-impedance. This means it is difficult
to test electros while they are "in-circuit" (because components such as chips are closely connected to them
- and they have a low resistance). But if the voltage on the electro is below rail voltage, the effect of the
surrounding components is minimised.
Basically electros cannot be tested with a multimeter unless you provide a voltage to charge them and then
measure how long it takes them to discharge through a known resistance. That's why you need an
Electrolytic Tester.
THE BOARD
The PC board for the Electrolytic Tester is shown below. It is connected to the 5x7 Display project with 4
leads. The termination on the 5x7 Project is a 5-pin plug (one dummy pin for alignment)). Two "test leads"
are taken from the Electrolytic Tester PC board to the electrolytic-under-test. One has an earth clip
(crocodile or alligator clip) and the other has an E-Z clip (a long clip with a very small hook on the end that
clamps around a lead).
The figure below shows the Electrolytic Tester PC board connected to the 5x7 Display. The leads are
identified as positive, RA1, RA0, earth.

The ELECTROLYTIC TESTER connected to the 5x7 Display
TWO WAYS
There are two ways to test an electro "in-circuit."
The first method is to determine the time needed for it to charge to a known voltage.
The other is to charge the electro then discharge it through a known resistance.
Both methods have an inherent inaccuracy due to the surrounding circuit components being connected to
the electro. When the electro is out of circuit, the current from the tester will charge the electro to a certain
value in a known time. From this we determine its value. When the electro is "in-circuit", some of the current
will flow to the surrounding components and the electro will take longer to charge. The test will think a larger
electro is being tested and will produce an over-value.
To avoid this we have opted for the discharge method.
If the surrounding components have a very low impedance, the reading from the tester will be lower than
expected. In this case, the answer is to remove the electro from the circuit and re-test it.
"ADD-ON" FOR THE 5x7 DISPLAY

This project is an add-on for the 5x7 Display. It has been designed to show how easily you can add to an
existing project.
The Electrolytic Tester section consists of 7 components on a small PC board. This board connects to 4-
pins on the 5x7 Display with 4 lines.
The operation of the project is done by the program in the microcontroller. The components on the
Electrolytic Tester PC board are merely interfacing components. They connect the lines of the micro to
the electrolytic-under-test.
The 220R limits the charge/discharge current to a known value and the transistor detects when the electro
has discharged.


The circuit looks very simple but the two components in the "font end" provide a very accurate discharge-
time.
These two components are the 220R and the voltage-reference (made up of the two green LEDs). A green
LED produces a characteristic voltage across it of 1.9v. Two LEDs have a voltage of 3.8v across them and
this voltage remains very constant. This voltage behaves exactly the same as if a 3v8 zener diode was in
circuit. The advantage of the LED(s) is visual. You can see when the electro is charging.
The electrolytic-under-test is charged to 3.8v. This gives it a known amount of energy and if it is 1u, it will
have "one-unit" of energy. If it is a 100u, it will have 100 units of energy. If we place a resistor across this
electrolytic, it will take one unit of time to discharge the 1u and 100 units of time to discharge the 100u. The
resistor we are talking about is the 220R when the micro line is taken to 0v. Our second accurate voltage-
point is the lower voltage-level. This is detected by the base of a transistor. The electrolytic is discharged
between 3.8v and 0.7v. Between these points the discharge-rate is fairly linear.
MORE ADD-ONS
This project shows how add-ons can be connected to a project. You have already seen how the 5x7 matrix
can be used to display figures and letters as well as animation. Using this knowledge gives you an
enormous scope for creating a really impressive project by merely adding a front-end. The 4 lines to the
5x7 use two port lines that can be configured as input or outputs and although the lines are already
connected to another device, with clever circuitry you can add other things to these lines. If you need any
more lines, they can be taken from under the 5x7 board via a separate plug-and-socket.
Examples of projects that can be connected to the 5x7 are:
A Heart-Rate monitor, an Ultrasonic Tape Measure and a Blood Alcohol Detector. There are lots of other
ideas and anything that needs a readout can be connected.
PROTO BOARD
No matter what you design, Talking Electronics has made it easy to get you started. We have a small proto
board about 4cm x 3cm containing long pads and a positive and negative rail as shown below. It has no
holes and has been designed for prototyping. It is called Experiment Board MkIII.
Our method of prototyping may be new to many readers, but has been described many times in our 20
years of publishing.
Experimenter Board MkIII $3.30 plus post.

To order click HERE
The only real way to prototype a project is on a board shown above. It is very difficult to build a project on a

board with holes and circular lands because you have to turn it over to join up the components and this
takes a lot of complex thinking. You may have seen a lot of "scratch-pad" areas on development systems
consisting of holes and circular lands. But have you tried to use them! They are not really suited for
development work. They are for the next stage in a design. Once you get a circuit working you can transfer
it to an area where it can be added to a micro. But where do you do the actual designing? This is the
purpose of the Experimenter Board. It allows great flexibility and ease in placing components without much
effort. This is important when you are designing something. You don't want to be distracted by the
placement of the components.
With our design, the parts are soldered (with long leads) to the lands and almost no jumper wires are
needed. All the parts sit in a "birds-nest" or "rats-nest" arrangement and you can see exactly how everything
is connected without looking under the board. No only is this quicker, but fewer mistakes are made. At the
end of the development work, the parts can be taken off the board and re-used or fitted onto a "scratch-pad"
as explained above. This is what I used in developing the Electrolytic Tester and it makes prototyping so
much easier.
The next stage in the development process is making the PC board. But firstly a circuit diagram is drawn
and the board is created on one of the PC board drawing packages. An overlay or top-layer is always
included on all our boards and this is one of the things that stand us out from most other magazines and
books. Our overlays include the value of every component and the board has the name of the project. Many
magazines have a code-number on the board and this might be ok for the month of issue, but who can
remember a code number in 2 year's time! That's why so many magazines have fallen over and the same
with kit suppliers, and even manufacturers! It's simple things like this that make your product accepted or
rejected.
You can get PC boards manufactured for as little as $100, on a panel 25cm x 15cm, so it's not impossible to
produce a project yourself and get it fully developed without any outside help.
Obviously our 5x7 concept is very "experimentally orientated" but it's the only way to get an idea up-and-
running. Once you get the concept working, the final design can take a completely different form. But
without prototype-ability, it is very difficult to start.
From start-to-finish, the Electrolytic Tester took 2 full days of programming. Most of the program was taken
from the 5-Digit counter and one of the software items you need to develop a project like this is MPASM.
This program takes your ASCII file (.asm file) and produces a .hex file for loading into PIP-02. To download
MPASM, click HERE.
Go to: Construction, Burning the program

into the chip and Using the Tester

http://users.tpg.com.au/users/talking/DialAlarm-1-Page1.html
Buy a kit
DIAL ALARM-1
Page2 A complete dialing alarm the size of a pack of cigarettes.
Page3 - its features will amaze you . . .
Page4 Page 1.
PIC Pinouts
This is the lowest cost dialing alarm on the market and shows what can be done with an 8-pin
microcontroller. The complete circuit is shown below. You cannot see all the features of this project by
looking at the circuit - most of them are contained in the program. So, read on and see what we have
included. . .
Click on the 5 red dots to see each section operating
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Dial Alarm-1 has a single input (although a number of sensors can be placed in parallel on the same
input line). The circuit requires a trigger pulse to turn on a BC 557 transistor. This delivers power to the
microcontroller. The micro starts to execute the program and outputs a high on GP2 to keep the "turn-
on" circuit active. It also turns on the LED in the opto-coupler and this causes the line to be "picked up"
via a high-gain Darlington transistor. The micro then dials two phone numbers and executes a series of
events to alert the called party of an intrusion. The circuit also has a sensitive microphone with a high-
gain amplifier. This is connected to the phone line when the alarm is triggered.
When the first number is dialled, a Hee Haw signal is sent down the line to alert the listener of an
intrusion in the "target" area. Amplified audio of the room is then passed down the line. This signal is
clear enough to detect conversations and/or movement in the target area and the listener can
determine the situation. A second number is then called and the process is repeated. The two numbers
are then called again and the alarm closes down. Simple but brilliant. The flow Diagram for the alarm is
shown below:
Dial Alarm-1 Flow Diagram
Use Dial Alarm-1 as a "Back-Up" Alarm

This alarm has been developed in response to a number of recent large robberies reported in the
news. Robberies are a constantly increasing crime, but very few are reported, unless they have a
"twist." Recently, the robbers navigated the conventional alarm system and broke into the night safe in
the Manager's office. The haul was quite significant and it's surprising such a large amount of cash was
kept on the premises. The weakest link in most alarm systems are the PIR detectors, used to detect
movement. It's a known fact that they are very easy to foil. It's so easy we are forbidden to print details

of how to do it. But many thieves must be aware of the trick and that's why a back-up system is
essential.
The cheapest back-up system is the use of the phone line. I know what you are going to say. Cutting
the telephone line is an easy matter and offers little security. But finding the line in a premises is
not very easy and if there are two or more incoming lines, it's difficult to know which is connected to the
dialler. Nothing is infallible, but for a lot less than $50 you can build this project and have a back-up to
protect your property.
The other advantage of our design is the "set and forget feature." The alarm is designed to ring your
mobile and if you keep your phone beside you 24 hours a day, you can have this peace of mind,
whether you are in your office, factory, holiday house or quietly dining at your favourite restaurant.
You can protect any area where a telephone line can be installed. This includes houses-under-
construction and outlying sheds.
Talking Electronics has been producing security devices for more than 15 years and this project is a
culmination of those years of experience.
The high-sensitivity amplifier is our development and comes from our highly successful Infinity Bug.
This device connects to the phone line anywhere in the world and when the number is rung, the infinity
bug answers the call and lets you listen in to the activities in the room. It's just like being there. We
have used the same circuit in this project. When it is activated, you can easily work out if it has been
triggered by staff, a family member or an intruder. At least it prevents 90% of false alarms and offers
enormous peace of mind.
The secret lies in the placement of the triggering device. We have provided only one input (trigger
input). And there's a reason for this. The idea is to place the sensor near the target area or on an actual
device, near the microphone.
For instance, it you are protecting a house, a thief always goes to the main bedroom and rummages
through the drawers and cupboards. In this case a drawer that is never used should be wired with a
magnetic switch (reed switch) or a movement detector such as a mercury switch. These switches can
be housed in a plastic case for easy screwing to a wall or door and are very reliable in operation. When
the drawer is pulled out or the door opened, the switch is activated. If you are protecting a wall safe,
the switch is placed near the safe in a clipboard or picture so that when the board or picture is moved,
the alarm is activated. If a room is to be monitored, the switch is placed on the door so that when it is
opened, the alarm is activated. If other valuables are being protected (such as a VCR, scanner etc) a
suggestion is to place a clipboard against the item. The idea is the clipboard has to be moved to get at
the "valuables." The clipboard contains a magnet and the switch is nearby. The clipboard keeps the
switch open (or closed) and when it is moved, the alarm is activated.
The ideal arrangement is to avoid touching the clipboard, drawer, door or other "prop" during normal
activities and this keeps the alarm activated at all times.
Another suitable trigger device is a pressure mat. This is something that can be avoided by "those in
the know" and you can monitor an area during your absence. The alarm can be used for other things
too. You can determine when your business premises are opened up in the morning by placing a
pressure mat or reed switch on a door. The same can apply to a particular room in your establishment.
The purpose of this article is not only to produce the worlds smallest dialling alarm but also show you
how the program runs so you can modify any of the routines to suit your own particular requirements.
The program can be re-written to dial only one number for two rings then hang up, or three rings, then
again after 2 minutes or any combination to suit your requirements. Many mobile phones identify the
caller on the display and you can keep track of the exact time of arrival and departure of different
personnel.
The alarm can be programmed to monitor machinery and dial your mobile when a breakdown occurs. It
can monitor water level or even your mail box. The possibilities are unlimited and it's just a matter of
modifying the program to suit your own needs.
But before you change any of the program you have to understand what the program does and be
capable of changing the instructions without upsetting the operation of the alarm.
Remember: A little knowledge is a dangerous thing. Before doing any re-writing of the program you
need to read our notes on programming and carry out one small modification at a time.
This is really a very advanced project. The fact that is looks simple is the power of the microcontroller.
It's taking the place of at least 10 chips in a normal alarm.
Timing, tones and tunes have all been converted to instructions of a program. And the advantage of a
program is the simplicity of alteration. A time-interval can be changed or a phone number altered with a
few lines of code. Even new features can be added without the need for additional hardware. This
project uses the '508A to its maximum and shows what can be done with an 8-pin microcontroller.
Before we go any further we must state that this project cannot be connected to the public telephone

system. Only approved devices can be connected to the Public Phone System and any experimental
device must be approved for experimentation and connected via a "telephone Line Separating Device."
These are available from Altronic Imports for approx $100.
This is unfortunately the case and when we discuss connecting the project "to the line," we are referring
to an experimental telephone system such as the one we have put together at Talking Electronics, to
test and develop projects such as these.
See the section "Testing The Project" on Page 2 for more details of the Test Circuit. It consists of 27v
derived from 9v batteries, a 12v relay, a telephone and a socket, all in series. The 12v relay is included
to limit the current.
THE CIRCUIT
The circuit consists of 6 building blocks.
1. The turn-on circuit. Click HERE to see the circuit working (or click the red dot in the circuit above).
2. The tone detector. Click HERE to see the circuit working. ( " " " )
3. The DTMF wave-shaping circuit. Click HERE to see the circuit working. ( " " " )
4. The high-gain audio amplifier. Click HERE to see the circuit working. ( " " " )
5. The opto-coupler. Click HERE to see the circuit working. ( " " " )
6. The microcontroller.
1. THE TURN-ON CIRCUIT

The project is connected to a 6v supply at all times and to extend the battery life, the circuit turns off
after use. The current drops to less than 1uA and the only components connecting the battery to the
project are the "turn-on" items.
These consist of a BC 557 transistor, 2M2 turn-off resistor, 100k bleed resistor, and the top 100u
electrolytic. The components to turn on the "turn-on" circuit are the sensing device such as a reed
switch or mercury switch, the lower 100u electrolytic and 100k bleed resistor. The components to keep
the turn-on circuit ON, are the microcontroller, diode and 100k separating resistor.
It sounds quite complicated but here's how it works. The trigger device must be AC coupled to the
project so the alarm only carries out one alarm operation and resets. If the trigger device was directly
coupled to the turn-on circuit, the project would never turn off, even though we could design the
program to carry out only one dialing operation.
The sensing device must only give a TRIGGER PULSE to the circuit so it can reset after its operation,
ready for another trigger pulse.
The only way to turn a reed switch activation into a pulse is to AC couple it. To pass the signal through
a capacitor. This is what we mean by AC coupling - it means PULSE COUPLING or NOT DIRECT
COUPLING.
The way the turn-on circuit works is this: The top electrolytic is charged very quickly by connecting its
negative lead to the negative rail of the project.
This effectively charges the capacitor and supplies a voltage to the base of the BC557 to turn it on.
Energy from the electrolytic passes into the base of the transistor and allows current to flow between
collector and emitter leads.
This flow of current activates the rest of the project. The microcontroller starts up and and the Watch-
Dog Timer resets the program to the beginning after about one second (if the program did not start
correctly) and takes over the job of turning on the BC 557, by taking GP2 low via the diode and 100k
resistor. This action keeps the top 100u charged.
Going back to the action of the tilt switch; instead of taking the top 100u directly to the negative rail as
discussed above, it is taken to the negative rail via an uncharged 100u and this is similar to a "piece of
wire" when it is in a discharged condition. It gets charged (to approx 3v) and the project turns on.
If the reed switch remains closed and the micro goes through its set of operations and closes down,
the top 100u discharges while the lower charges to 6v. This will take a long time but eventually the
transistor will turn off, even though the reed switch remains closed.
When the reed switch opens, the circuit cannot be re-activated until the lower 100u is discharged (or
partially discharged) and this will take a long time through the 100k across it (and the upper 100u).
What an enormously complex operation for such a simple circuit!
At the end of an alarm-cycle the micro is placed in a holing loop at Main8. To get the micro to re-start at
address 000, the chip must see a definite LOW. This will naturally occur when the project is sitting for a
long period of time, waiting for a trigger pulse. If you are experimenting, make sure the rail voltage has
been completely removed before re-starting the project.

2. THE TONE DETECTOR

The simplest building block in the project is the Tone Detector. It is designed to detect any tone of
about 500Hz on the phone line such as a whistle or DTMF. When this tone is detected, the alarm will
turn off. In this case the hardware does the detection.
The circuit amplifies the signal on the phone line and this turns on a transistor. On the output of the
transistor is a 4u7 electrolytic. It is charged via a 100k resistor. The stage sits with the collector at rail
voltage, due to the biasing components keeping the transistor off. When a signal is delivered, the
transistor turns on and the collector goes low. This causes the electrolytic to get discharged via the
diode. At the same time, the electrolytic is getting charged via the 100k and if the frequency of the
signal is rapid enough the electrolytic will be fully discharged and this will be detected by the micro as a
LOW.
Designing a project is a combination of good circuit and good program design. This section is a typical
example. Originally, the signal was fed into the micro and a program detected the high's and low's. This
was very unreliable. By adding the diode and electrolytic, the circuit does all the detection and the
program only has to detect a high or low. Much simpler to implement and guaranteed to work.
3. THE DTMF WAVE-SHAPING CIRCUIT

Dialing a phone number is carried out by sending a tone down the line. So that whistling can not carry
out a dialing operation, the telephone company decided to make the tone impossible to produce "by
accident."
Each dialing tone consists of two frequencies, sent at exactly the same time. These frequencies must
be in the shape of a sinewave as the detecting device "locks onto" each of the frequencies at the same
time and produces a very-fast result. The only problem is a micro can only produce a square wave.
To convert a square wave into a sinewave, we need a wave shaping circuit. In essence this consists of
charging and discharging a capacitor with a square wave and "picking off" the waveform.
The charging of a capacitor is exponential but if we take the beginning of the curve and compare it to a
sinewave, the two match up fairly closely.
That's what we have done. We have charged a capacitor very quickly via a resistor so that it is nearly
fully charged and then we begin to discharge it. The result is a fairly "peaky" sine wave. The waveform
is picked off the capacitor via a high value resistor and passed into a high impedance emitter-follower
circuit. The two tones are produced separately by the micro and combined after wave-shaping. This
reduces interference between one waveform with the other.
The component values have been especially chosen to produce a high amplitude signal, as the emitter
follower transistor does not increase the amplitude, only the current-driving capability into the phone
line.
THE CHOKE
The choke has been placed in the emitter of the driver transistor to have the maximum effect on the
signal. When it was placed in the collector, it had no noticeable improvement.
The effect of a coil (choke) is to "smooth out" the shape of a waveform. It does this by taking some of
the energy from a rising signal and delivering it during a fall in amplitude. This makes the "peaky"
waveform "rounded."
The coil actually produces a negative feedback on the circuit. You already know that a rise or fall in
amplitude on the base of a transistor will create a fall or rise in the collector voltage. Well, the same
thing happens if you keep the base fixed and raise or lower the voltage on the emitter. The voltage on
the collector rises or falls by a larger amount. This is due to the gain of the transistor.
The improvement made by the choke increased the dialing accuracy from 80% to 100%.
The improvement in the waveshape could not be detected on a CRO so it's not always possible to get
test equipment to help you with a design. Sometimes it's your knowledge of componentry that gets you
through.
Getting the DTMF generator to work was one of the most difficult parts of this project as the tone
detectors at the exchange are very "exacting" and critical. To improve the chances of instant
recognition, we have included a crystal in the circuit.
Although we have generated the tones in the micro, there are tone-generating chips and these have a
16 tone capability, with only 12 tones used on the telephone keypad. The additional 4 tones are shown
on the diagram below as A, B, C and D. The two symbol keys are called "star" and "hash."
The extra tones can be generated by the program but are not needed in our situation. In the early days
of DTMF, the 4 extra tones were used by the telephone companies to route the calls and create call-
charges. The basis of defeating these charges was through "blue boxes" held to the mouth-piece, while
creating the extra tones. Things have been tightened up since then.

4. THE HIGH GAIN AMPLIFIER

The high gain amplifier is the two-transistor amplifier at the bottom of the circuit. It is used to pick up
sounds in the target area during an alarm activation. It is directly coupled to the phone line via a bridge.
The bridge delivers the correct polarity to the circuit, irrespective of the polarity of the phone line and
the change in impedance of any of the components connected to the phone line will result in a signal
being sent down the line. The output stage of the high-gain amplifier is one of these components and it
is biased ON via a 220k resistor. This turns it ON only very slightly, so that the audio signal will drive it
correctly. The "load" for the transistor is all the other components connected in series with the transistor
and this includes the "holding-in" relay and any isolating transformer at the exchange. The components
across the transistor do not form part of the "wanted" load and they actually reduce the output.
However they must be included as part of the DTMF section.
So, we have a two-transistor high-gain amplifier. A 20mV signal from the microphone will produce a
1,000mV signal on the collector of the first transistor and this will be passed to the output transistor.
The amplitude of the waveform across the output transistor is about 2 -3v.
The unusual layout of the circuit may be confusing. The pre-amplifier section is powered from the 5v
supply while the output transistor is driven from the phone line. Although the voltage on one side of the
100n on the base of the output transistor is different to the other side, this does not affect the operation
of the circuit. It is the AC signal through the 100n that is amplified by the buffer (output) transistor and
providing the negative rail of the pre-amplifier and the emitter of the buffer transistor are fixed and rigid
with reference to one another, no motor-boating (instability) will occur.
The audio amplifier is gated "off" when the DTMF tone is sent down the line. The supply for the pre-
amplifier is obtained from an output of the micro and this line goes high before the tone is transmitted.
This charges the 47u and the voltage across the BC 557 is very low. Without the ability to amplify the
audio in the target zone, the signal on the phone line will not be upset when the DTMF is transmitted.
5. THE OPTO-COUPLER
The opto-coupler is the device that does the job of a normal phone. In other words it "picks up the
phone line." The micro outputs a LOW on pin 5 (GP2) as soon as the program is activated by the
mercury switch and this keeps the "turn-on" circuit activated. This line also goes to the opto-coupler
and a LED in the opto-coupler is also turned ON. The illumination of the LED turns on a phototransistor
inside the opto-coupler and the resistance between collector and emitter leads of the photo-transistor is
reduced and this pulls the base of a Darlington transistor towards the positive rail.
The Opto-coupler can be connected directly to the phone circuit but the transistor must be turned on
much harder. This requires the LED in the opto-coupler to be driven much harder and puts a very
heavy demand on the battery.
At the conclusion of each "telephone call" pin 5 goes HIGH and this is the same as "hanging up the
phone." The electrolytics in the "turn-on" circuit will keep the micro active during the short period of time
between phone calls.
6. THE MICROCONTROLLER
The heart of the project is the microcontroller. It is an 8-pin chip with 5 input/output lines and one output-
only line. The output lines change from low-to-high-to-low very quickly and each line can deliver a
maximum of 25mA.
The program inside the micro determines what happens on each of the lines and the parts around the
micro are merely interfacing components. In other words they adapt or modify or amplify a signal to suit
the micro or phone line.
The micro never stops "running" and it executes instructions at the rate of one million per second (1
MIPS).
You need to understand PIC language to program the micro and Talking Electronics has produced
PIC Programming pages on the web to help you develop a program.

THE PHONE VOLTAGE

Before designing any project for operation on the phone line, you have to understand how the 50v line
operates. It's not like a normal 50v power supply. You cannot simply design something for 50v and
connect it to the phone line.
The phone line is actually a 50v battery (actually slightly higher than 50v - about 52v. However some of
the newer phone systems deliver a voltage as low as 35 - 40v) with a 1k relay in series with one line.
When you short the two phone lines together, the relay pulls in to indicate the handset has been lifted.
Under these circumstances the current flowing through the line will be 50/1,000 = 50mA. The relay will
drop out at 15mA and so you can add devices to the phone line until the current falls to about 15mA
without the line dropping out. It is best to keep the current high to prevent the line dropping out.
Most phones drop about 8 - 12v across them when they are working and this voltage can be used by
the phone for the amplifying circuits, tone generators etc. Our design has a separate supply, however it
could be designed to use the phone voltage, if you wish. The 10v across the BC 337 audio output
transistor gives the transistor plenty of voltage for a good output waveform. The audio is sensitive
enough to hear a clock ticking in the target area.
CONNECTING MORE INPUT DEVICES

More than one trigger device can be fitted to the alarm provided they are connected in parallel as
shown in the diagram below.
Go to: Page 2

http://users.tpg.com.au/users/talking/TaxiPhonePage1.html
Buy a kit
TAXI PHONE
Page 1
TETRIS
This project is a dedicated device. It dials a single phone number when the handset is lifted. There are
two different modes of operation.. A slide-switch on the PC board allows the project to operate in
automatic or manual mode. If the switch is in "auto dial" mode, a pre-programmed phone number is
AUTOMATICALLY dialled when the phone is lifted. If the switch is in "push to dial," the project dials
the number when the phone is lifted and "push to dial" button is pressed. This allows the phone to be
used as a normal phone.
The complete circuit is shown below:
TAXI PHONE hasn't been designed exclusively as a taxi phone, that's just the name we gave it.
It's the simplest phone dialing project you can get and since the program is so simple, it's an ideal place
to start.
The concept has so many possibilities. Take the example of a "Free Taxi Phone." Imagine a phone at
the front of a night club or restaurant, to ring a taxi.
As soon as you pick up the phone, it automatically dials a nominated taxi company and by quoting a
code number, or sending a DTMF code down the line, the company knows where to pick you up.
Or take the example of a doctor's surgery, police station, fire station or real estate office.
A cheap wall phone can be mounted outside the premises for after-hour's use. By lifting the handset
the call will be directed to an operator, the owner of the business or a representative.
The same can apply at professional suites, or land-development projects. The proliferation of mobile
phones has brought remote communication into the hands of nearly everyone but this project still has
its uses.
http://users.tpg.com.au/users/talking/TaxiPhonePage1.html (1 of 6)12/02/2008 17:41:08

It's cheaper and free to the user. A customer would prefer to use the "Company Phone" than his own
mobile.
Take the example of a "House for Sale." By lifting the phone connected to the sale board, you could be
in touch with the agent and arranging a meeting before your enthusiasm is diverted to another property.
Or the example of a Panic Phone for a granny, babysitter convenience store. All they need do is lift the
receiver and the call goes through. This is already available at some exchanges but the emergency
number is only dialed if the exchange does not detect any other number being dialed within 3 seconds.
In the Auto mode, our design prevents the phone being used for any other purpose. This can be an
advantage in some circumstances, such as a boarding house or as a "hot line." It prevents the phone
being used for any other calls.
The commercial advantage is also enormous. Imagine a phone at an airport or railway station linked to
a local hotel or tourist attraction. A small display would highlight the features of the establishment and
the free phone could be used to make a booking.
Even booking mini cruises and tours at the departure points could be made, when no-one is in
attendance.
It all adds to the efficient running of a business and reduces the cost of attendance during the low
periods.
I am sure we can all think of a use for a dedicated phone like this and even one at the front door of your
own house would be "magic."
How many times has a friend dropped by or a delivery been made when you were absent?
Either the goods were left on the door step or brought back three day's later. How inconvenient. A
simple phone call to your mobile could keep you in touch with everything.
The same with business addresses and suites. By providing a phone at the door, the owner will never
miss a prospective client.
Not only that. The image and efficiency will rise in the eye of your customers.
So, after seeing the potential of this project, why not put it together and use it yourself or sell it to others.
The only problem is a project like this has to be approved by the authorities for connection to a public
telephone system. The cost of approval could be anything up to $5,000 to $10,000 or more and
the delay in approval could be 6 months or more.
Lots of ideas like this have not seen the marketplace, for this very reason. The cost of compliance is
enormous. That's why we have presented the article as an idea, mainly to show what can be done with
the '508A microcontroller.
Once you build the project, you can modify it to suit almost any requirement.
We have included a number of ideas but it's certain we haven't thought of everything.

When the handset is "on the hook" (handset down), no current flows in the telephone line and thus the
project is not activated.
As soon as the handset is lifted, current flows in the line and the diodes in the bridge rectifier direct the
current to flow in the project so that the top rail becomes positive.
The purpose of the bridge is to create a positive and negative rail, no matter which way the project is
connected to the line.
The zener diode and the LED form a zener reference voltage of approx 5.6v and this allows the chip to
be powered with its correct voltage of 5v to 5.6v
In microprocessor-terms, this voltage rises very gradually to full voltage (partially due to the 100u
electrolytic across the rails) when the phone is lifted. The '508A has a delayed reset feature inside the
chip but there is no guarantee it will see the delayed reset AFTER the full rail voltage. If it does not
work, the micro will start anywhere in the program and fail to ring the number.
The answer is to utilise the watchdog timer. This is a completely separate oscillator that counts for
18mS and resets the micro. If this timer is enabled, you must make sure your program resets the
watchdog timer before the 18mS has expired. This is especially difficult to do if you have delay routines
or operations such dialing a telephone number, as they run for longer than 18mS. It can be done, but it
takes a lot of programming skills.
Fortunately the watchdog timer duration can be increased by feeding it into a divider circuit (it's called a
divider but in fact it actually multiplies the duration).
By setting bits 0, 1 and 2 in the OPTION register, the WDT time-interval can be increased to 128 x
18mS = 2.3 seconds. This is what we have done. The only occasions when the WDT needs to be
cleared is before entering a delay routine.
If the micro gets powered up and the program counter starts the micro part-way through a routine
where it gets "locked-up", it could take two seconds or more for the watchdog timer to time-out and

reset the micro.

This concept is not foolproof. It is essential the check the program for loops containing CLRWDT
instructions, where the micro can enter the loop and never emerge.
If the micro enters the program at an undefined point, it may carry out instructions such RETLW and
RETURN with a "junk" RETURN address from the stack and jump to any location in memory.
At the moment the only place the micro can get stuck is at Main5, where a loop has been created to
hold it from escaping. The entrance to this loop is only 3 instructions wide and the chance of the micro
getting into it is fairly remote.
Under normal operating conditions the voltage across the micro will start from 0v and the micro will
start at the beginning of the program. This will allow us to create a program to dial a pre-programmed
number contained in table1.
This table has a rather unusual feature. It is burnt with the initial phone number at the beginning of the
table. A further 100 RETLW 0FFh instructions are added to the table for future use. If you need to
change the phone number, the old number (including 0E) is burnt down to 00, i.e: to 00 00, and the
next ten locations used for the new number. This allows the number to be changed up to 9 or 10 times.
This is a brilliant concept for a chip that is supposed to be a one-time programmable device.
To allow this feature to be used, the chip must not be code-protected.
COMPONENTS
Some of the components used in the project are identified in the diagram below:
Identifying the components used in this project
CONSTRUCTION
As with all the projects designed by Talking Electronics, the PC board has an overlay that identifies all
the components and their orientation. This is an essential part of a good design as you may be
repairing the project at a later date and need to know the value or type of a component. All the boards
also have a solder mask to assist in keeping the solder to the surrounding land. And the boards are roll-
tinned to make soldering a very quick process. Naturally the boards are fibre-glass based and this
helps you to work with a first-class product.
Anything you design should come up to this standard as it smartens up the project and finishes off the
presentation.
It's an easy job to solder the components to the board, making sure the resistors, phone sockets, slide
and push switch, bridge, IC socket and zener diode fit against the board while the transistor, LED,
crystal and electrolytics are mounted slightly above the board to prevent heat-damage. The ceramic
capacitors and choke can be fitted up to the board or slightly above it - there is no fixed rule for this
type of component.
Take care when soldering and snip the lead very close to the joint after the soldering has been carried
out. One project came in for repair and it took 30 minutes for us to realise one of the leads of a resistor
had been snipped off close to the board before the soldering had been done. The resistor was sitting in
position via one lead and the solder hadn't taken to the other lead. That's why we insist on soldering
before cutting the lead.
If you hold a finger on the component while soldering you will know how hot each part is getting. If you
can't hold your finger on it, you are taking too long.
A constant-heat soldering iron improves the quality of the soldering 100%. Keeping the temperature at
about 320C will prevent overheating any of the parts.

The last thing that makes a neat connection is the use of fine solder. That's why we have included it in
the kit. You will never go back to thick solder again.
There are only two things that will prevent the project from working. Faulty soldering and the wrong
placement of a component. The circuit works and the PC board has been tested. Take a little care with
checking the value of the resistors and even use a multimeter to check the resistance as it is very easy
to mistake a 100R resistor for 10k.
Don't forget, the positive lead of the electro is identified on the board while the negative lead is
identified on the body of the component.
The short lead of the LED is the cathode and this corresponds with the line on the symbol on the board.
The IC socket has a cut-out at one end and the bridge must match-up with the markings on the board.
The crystal and choke can be placed around either way but the tactile switch has legs that are spaced
wider in one direction to assist in placement. The zener diode has a line or stripe at one end and this
corresponds with the line on the board.
Finally, the transistor has an outline on the board to help with placement. A little bit of care during
assembly will save hours of frustration and checking. The board looks easy to assembly because it is
neatly laid-out. That's why you have to be doubly-careful. After building 10 or more of our projects you
will find it easy to place the components.
But start slowly because we use only the best and smallest components on the market and some of the
parts-identification is very difficult to read.
Taxi Phone
PARTS LIST
Cost: $xx.80 plus $2.20 postage
4 - 100R
1 - 220R
1 - 3k3
3 - 10k
1 - BC547 transistors
2 - 18p ceramics
1 - 4MHz crystal
1 - 100n monoblock or ceramic
2 - 1u 16v electrolytics
1 - 100u electrolytic
1 - 10mH choke
1 - 8 pin IC socket
1 - 3v3 400mW zener
(or 3v9Z and 3mm red LED)
1 - 3mm green LED
1 - DF04 diode bridge
2 - SPDT slide switches
1 - PC mount push-switch
2 - 4-pin modular telephone sockets
1 - PIC12c508A microcontroller chips
1 - TAXIPHONE PC board
TABLES
The Taxi Phone program uses three tables. The first stores the telephone number, the second holds
the delay value for the low frequency of the DTMF tone and table3 holds the high tone delay value.
A table is the only way to hold data for a routine - it cannot be stored within the program.
MORE ON HOW THE CIRCUIT AND PROGRAM WORKS

When the power is applied (the handset lifted), the automatic reset for the chip comes into operation to

reset the Program Counter to address zero. If this does not happen, the micro will jump to a random
part of the program and begin executing code.
If it does not come across a CLRWDT instruction, the watchdog timer will count down 2.3 seconds and
cause a reset. The program will then GOTO the main routine and look for NOP's in the table, to find the
beginning of the phone number.
It will then GOTO Dial1 sub-routine. This routine picks up the first digit to be dialed from Table1 and
uses the value from the table to jump down Table2 to find the delay value for the low tone. It loads
the low-tone file with the value and then goes to Table3 and jumps down the table for the high-tone
value. The micro then goes to the DTMF routine where the low and high tone files are decremented and
when the count is zero, the appropriate output line is toggled and decrementing continues. This
process continues for A0h (160) loops to produce a dual tone for approx 1/10th second.
A short delay is then executed and the jump counter for table 1 is incremented so that the next digit is
picked up. This process continues until the End of Table marker (E) is detected. The micro then goes to
a closed loop and continues in this loop until the handset is replaced.
The 10k across the supply rail makes sure the 100u is fully discharged so that the micro detects a LOW
and starts at address 000 when power is applied. This feature, along with the watchdog timer, ensures
the micro starts correctly. Each feature was omitted in a test run and it was proven that they were
necessary.
This project has a number of different applications and the circuit can be modified to suit different
requirements.
One of the features of the circuit is to dial a number when a button is pressed. This gives the phone a
dual role and the number is only dialed when the button is pressed. The button could be for a Taxi
service, a hot line to a visa card approval centre or a pre-dial access number such as 1478 to a long-
distance low-cost telephone company such as One Tel. The only components required are a push-
switch and pull-up resistor.
A few lines of code are needed so that the micro detects the state of GP3. When GP3 is high, the
button is not pressed and the program waits in a loop until the button is pressed. If GP3 is LOW, the
micro automatically dials the number.
USING GOTO INSTRUCTIONS

You will notice we have used GOTO instructions to move from one sub-routine to another. This is a
very unusual way to implement a move as most programs are written with CALL and RETURN
instructions. In fact we prepared the program with CALL instructions and changed them to GOTO
to show how GOTO commands can be used.
When using a GOTO instruction from one sub-routine to another, it means you are limiting yourself to a
DEFINITE path for the micro.
A CALL instruction allows a sub-routine to be CALLed from any other sub-routine and the micro will go
back to the previous sub-routine.
But when you have a very simple program like this one, where a sub-routine is only being CALLED
once and it always RETURNs to the same place, a GOTO instruction can be used.
In this program you will notice GOTO Dial1 and GOTO DTMF have been used. This type of HARD
DIRECTION can only be done after the whole program has been completed. A GOTO instruction does
not affect the stack and if you have a program with a CALL instruction CALLing another routine, a
further CALL cannot be made with the PIC12C508A and thus a GOTO instruction may be possible.
THE ZENER REFERENCE

The 3v3 and red LED form a zener reference for the micro and this simply means a fixed voltage for the
processor so that it is not damaged by over-voltage.
We normally pass over the word ZENER very quickly but the way a zener reference (zener voltage)
works is quite a complex thing to describe.
In simple terms the chip has an impedance (value of resistance) and as the voltage rises from zero, it
begins to turn on and a current flows. During this time the zener reference (the zener diode and LED)
do not turn on as NO CURRENT flows through a zener diode or LED until the voltage across them
reaches the zener reference voltage.
The red LED we have used has a characteristic voltage of 2.1v and this is exactly equivalent to a zener
reference of 2.1v. In other words, the LED will not turn on or take any current until the voltage across it
is 2.1v.
This means the combined zener reference is 3.3 + 2.1 = 5.4v At 5.35v all the current flows through the
chip and as the voltage rises to 5.4v, the zener diode and LED "breakdown." If the voltage tries to
rise above 5.4v, current flows through the zener branch to keep the voltage at exactly 5.4v.

The 100u across the zener regulator provides a reservoir of current for the times when the micro draws
a higher current when producing the DTMF tones.
The 100n across the chip prevents high frequency instability in a project such as this where the supply
rail is not a low impedance supply.
In this case the supply is fed via a dropper resistor and all sorts of high-frequency oscillations can start
up when the supply rails cannot supply a very high current. This is what we mean by a low impedance
supply.
THE VOLTAGE ACROSS THE PROJECT

When a project operates in series with an existing load (the telephone, in this case), a design problem
is encountered. It's an easy problem to solve, once you know the mathematics.
This type of circuit is called a "LEECH" design as it takes some of the current from the telephone, for its
operation. This may sound a surprising thing to say but, the current through the phone drops
(a small amount) when the dialer is fitted.
The operation of the phone is not affected by the dialer as some electronic circuits are very tolerant -
especially telephones, as they are required to work with a very wide operating voltage.
We will not be going over the mathematics except to say that the voltage developed across a 100R
resistor is about 3.5v in the leach project, when a standard telephone is connected to the line.
This gives 5.6v + 3.5v = 9.1v across the power rails for the buffer transistor. Since the output of the
DTMF wave-shaper circuit is about 3.5v, the emitter-follower will produce about 2.5v into the phone
line (there is a base-emitter loss of about 0.7v and a loss across the 100R in the emitter).
The purpose of the 100R feeding the zener regulator is to provide the lightest load for the buffer
transistor.
As you can see, the buffer is producing a signal that is being fed into the phone line. This amplitude
also appears across the 100R feeding the zener regulator. If the 100R were removed, the signal would
be fed directly into the zener circuit and be totally absorbed.
By raising the value of the 100R, the output signal from the circuit will be increased but the voltage drop
across the circuit will also increase and this may detract from the operation of the phone.
Since we only need 1v - 2v DTMF waveform down the line for the exchange to detect the frequencies,
there is no point in providing a higher amplitude.
Go to Page 2

LitE Line Electroluminescent string!
is an electroluminescent polymer fibre, available in five sizes.
1. The thinnest is 0.7mm diameter and is called "MicroLitE Line".

This size is only available in OEM quantities and must be totally encapsulated in the product you
are developing.
2 The next size is 1.25mm diameter and is called "MiniLitE Line".

This size is ideal for sewing into garments and fitting into other items where its extremely thin
diameter and high flexibility is an advantage. Available end of July 2001
3. The next size is 2.3mm diameter and is called "MidiLitE Line".

This size has a larger diffusion surface area and therefore the light-output is enhanced due to
the scattering effect within the fibre.
4. The next size is 3.2mm diameter and is called "MaxiLitE Line".

This size has a much larger diffusion surface area and therefore the light-output is enhanced due
to the scattering effect within the fibre. This size is recommended for signage and visual displays.
5. The largest size is oval 3.2x5mm. It is called "MonsterLitE Line".

This is a twin light emitting fibre cable, and exhibits a much larger broadside surface and
therefore the light-output is almost double. This fibre is the recommended size for large signage
and visual displays.
All sizes can be purchased in full rolls of 250 metres or cut to any length.
The articles on the following pages concentrate on the 2.3mm size however the information can be
used for all sizes.
requires an AC voltage of approx 100v @600Hz to produce a very good brightness. This
can be obtained via a miniature inverter and these are available from 3v to 12v operation. For the
3v inverter supplied in the kits described below, up to 1 metre of can be illuminated.
The supply current requirement is 45mA.
can be bent and twisted to any shape and can be used to create all types of signs, from
miniature lighting effects on pictures and prints to signs for "in-store" advertising such as
"EXIT," "WELCOME" or "OPEN". comes in a range of 12 colours, here are a few:
http://www.geocities.com/talkingelectronics/SpaceLight-P1.html (1 of 4)12/02/2008 17:41:17

When supplied in short lengths, it comes in a loose coil. For long lengths, it comes on a spool.
When creating a sign, it is normally placed in a groove in a sheet of clear perspex to create a
"mystical" effect, where everything seems to be "hanging" in space. can be glued in
position with clear silicon sealant. Some glues, such as "super glue" become white when set and
detract from the clearness of the sign. Of course can be wrapped around items or
threaded through holes in a sheet of foam or simply hung by fine threads to give a "spiders web"
effect. A more-open display will create more intrigue. It can also be used under water or in
automobiles, around or outside a house to produce the house-number or to highlight the outline of
a window or door. It can also be used to identify a dangerous step or illuminate a keyhole -
anything decorative to safety to security. The possibilities are limitless.
Here are some of the signs you can produce with :
is almost identical to working with a miniature version of neon. All the advertising signs,
effects and displays you have seen using neon, can now be made in a miniature form with
. The final result is almost identical but the cost is considerably less and the voltages
are not the very high voltages required for neon.
Both and Neon signs can be constantly illuminated or placed in "flashing" mode.
has one additional advantage. It can be put into a "dimming" mode as shown in the
example below.
Place your mouse over the display to so see it dim:
GETTING STARTED
To get you started in this "Wonderful World of Illumination," we have 5 kits available:
KIT 1 US$19.00 incl. postage Order NOW!

KIT 1 consists of 5 lengths of different coloured electroluminescent (each 10cm long)
plus a 3v inverter with batteries. All you have to do is prepare the ends of each piece of
electroluminescent and solder them to the flying lead from the inverter. The 5 pieces
can be connected to the lead or added end-to-end to get an effect 50 cm long.


KIT 2 consists of 1 length of coloured electroluminescent 50cm long plus a 3v
inverter with batteries. Please specify the colour required (red is normally supplied in the
kit). Connect the electroluminescent to the flying lead of the inverter.

KIT 3 consists of 2 lengths of coloured electroluminescent 50cm long plus 1 small
flat panel of electroluminescence suitable for backlighting a small sign on a model railway
display, plus a 3v inverter with batteries. Connect the electroluminescent pieces to the
flying lead of the inverter as explained above.

KIT 4 consists of 5 lengths of different coloured electroluminescent (each 10cm
long) plus a kit of components to make your own 3v inverter (batteries included). If you are
into electronics, this is the project for you. You will see how electroluminescence works and
how the power supply operates. The kit Order-Number is: TE-3V-INV-4

KIT 5 consists of 2 lengths of different coloured electroluminescent 10cm long
plus 2 small flat panels of electroluminescence suitable for backlighting a small sign on a
model railway display, plus a kit of components to make your own 3v inverter (batteries
included). This kit is also for the electronics experimenter. You will get an understanding of
how electroluminescence works and how the power supply operates. The kit Order number
is: TE-3V-INV-5
GOING FURTHER
Once you have put together a kit and seen the effects you can produce, you will want to go
further. You can buy the electroluminescent by the metre and we will assist you
with the type of inverter needed for the length of .
THE NEXT STEP:

The next step is to email Charles Rener of Stelar Laboratories and specify the colour of
the you want and the number of the kit.
If you want to know more about EL (Electroluminescence) and "How it Works," click HERE.
If you want to see details on how to build the inverter kit, click HERE.
If you want more details on Basic Electronics, click HERE.
LABORATORIES
Specialists in electroluminescence since 1965
564 Glen Huntly Rd., Elsternwick, 3185
Victoria, Australia.
Tel: +61 3 9532 9990
Fax:
+61 3 9532 9998

Director: Charles J. Rener ADE, MBI Mobile: 0419 300 999

E-Mail: starlite@netstar.com.au
Manufacturer - Importer / Exporter - Wholesaler - Distributor
Electroluminescent Signs & Displays, Fibre Optic Signs and displays
Animated Displays, Design & Research, Business Promotion Products
.
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PIC-Devel [Fecha] [Tema] 08-09-2007 17:23:36
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Sage
Sage
Embedded Systems,
Publishers
From their Australian offices in Perth, Western Australia, the Sage group provides hardware / software design,
specialist electronic components, electronic modules and desktop publishing services.
Sage Telecommunications is our specialist electronic design division. We provide quality hardware and software
engineering solutions. We offer design packages from concept through to manufactured product.
Embedded system hardware

and software design services.
DonTronics range of
SimmStick products.
Electronic components,
PIC processors, LCD's.
Blue Squirrel internet and

productivity tools.
Sage Pages is our publishing division. As well as general desktop publishing we publish specialist interest books. We are currently
http://www.sages.com.au/ (1 of 5)12/02/2008 17:43:11
Sage
reprinting Australian Aviation history books that have been out of print for a number of years.
The Flying Boat Days, Peter Phillipp's fascinating

tale of the early aviation history of Lord Howe
Island.
Halfway To Heaven, Fred Hoinville's Classic

autobiography about Australia's first commercial
skywriter and gliding champion...
Silk and Barbed Wire, These are stories of twenty-

two Allied airmen shot down in World War II over
Europe, their survival in pow camps, their attempts
to escape and their final liberation.
A Bomber Command Survivor, Stanley E Harrison's

personnel tale detailing the rigorous ordeal facing a
team of young men in one of historys blackest times.
Bombs and Barbed Wire, Wilf Hodgson's unique

wartime memoirs written whilst returning home to
Australia after surviving the war.
Authors, Sage Pages is constantly looking for new titles. If you have written, know of an author or are interested in an out of print book
about Australian Aviation history contact Sage Pages. We would be most interested in talking to you.
Sage Pages is the Proud sponser of the

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MICROCONTROLADORES
MICROCONTROLADORES
Hola. Antes que nada quiero dejar bien claro lo siguiente:
1. Mis conocimientos de electrnica son bsicos.

2. Esta no pretende ser una pagina sobre conocimientos avanzados.
3. Cualquier aporte es bien recibido.
4. No se donde esta Elvis.
Links
Si vieron mi pgina principal sabrn que soy estudiante de Ingeniera
Tips Informtica y no electrnica, en el ITBA ( Instituto Tecnolgico de Buenos
Aires).
Programadores
Que hago escribiendo sobre micros? Bueno el ao pasado curse Electrnica III
Cdigos (Electrnica digital), all tuve la oportunidad de aprender, entre otras cosas, a
programar las GAL. Este verano se me ocurri armar un proyecto que requera
Herramientas este tipo de circuito integrado, al comenzar el desarrollo me di cuenta que una
GAL22v10 no tenia la cantidad suficiente de patas. La solucin era poner dos
chips, pero esto derivaba en mayor espacio. Uno de los requerimientos era el
FAQ
menor tamao posible. Aqu recurr al libro en busca de una GAL mas grande
y me encontr con un capitulo sobre micros. Realmente no me dio mucha
Proyecto informacin pero la suficiente como para interesarme y buscar mas en la
WWW. Me dirig al buscador infoseek y busque MICROCONTROLLERS. El
Pgina principal resultado fue miles de links a paginas sobre el tema, pero una me llamo la
atencin ya que pareca ser la ms popular entre los resultados: Microchip.
Ingrese a este sitio y encontr una cantidad enorme de informacin y
herramientas como:
Hojas de datos de la lnea completa de micros.

Excelente programa para editar, compilar, simular y programar micros.
Completisimas notas de aplicaciones de todo tipo para toda la lnea.
De todo lo que all haba baje lo siguiente: hoja de datos del PIC16F84,
MPLAB 4.0 y varias notas de aplicacin. Con esto fue suficiente para que
luego de unos meses mi proyecto pase del diseo a la fase de testeo de
hardware.
Pasos a seguir para un principiante:
1. Bajar y leer la hoja de datos del PIC16F84.
http://www.geocities.com/TheTropics/2174/micro.html (1 of 2)12/02/2008 17:44:00

MICROCONTROLADORES
2. Bajar el MPLAB 4.0.

3. Bajar notas de aplicacin y probarlas.
4. Desarrollar un proyecto propio.
5. Armar o comprar un programador.
[Links] [Tips] [Programadores] [Cdigos] [Herramientas] [Pgina principal] [FAQ] [Proyecto]
Mi e-mail es acdc@pinos.com cualquier duda o aporte ser atendido.
Volver a la pgina principal.
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http://www.geocities.com/TheTropics/2174/micro.html (2 of 2)12/02/2008 17:44:00

Welcome to Duetronix
Site Navigation
Duetronix Services and product offering listed below: Last Update : December 2007
Product Resources Profile Sales and Distribution
Development Systems Project Examples / Documentation About Duetronix Ordering
ProtoPro 18 FAQ Standards & Compliance 2008 Pricing
ProtoPro 20 Contact Distributors
ProtoPro 28
ProtoPro 40
Products Under Development -
Coming Soon!
ProtoProXCL TM
ProtoDEV TM
| Products And Services |

See the 2008 Pricing Guide for January Promotion!! $8.75 for order QTY 30 and above.
Why purchase a ProtoPro Series Product
The ProtoPro Series of products is designed to enable a developer or hobbyist to develop new products and
systems rapidly. The system includes the most common and useful tracked in circuitry that enables the
developer to focus on writing the application rather than be side tracked by hardware issues.
Using the ProtoPro Series in your projects offers the following advantages
Reduces the time required to develop the target application circuitry

Improved hardware test, QA reliability - Fewer unknowns !
Ease of assembly
Custom additions on proto area enhances the design
Embedded Design Systems
Duetronix offers Embedded Design tools for the hobbyist and professional. The products are quality
manufactured and designed with the intention of enabling system design that is easy and effective.
The following development systems are available:
ProtoPro 18 - Support for 18 pin Microcontroller family from Microchip
ProtoPro 20 - Support for 8, 14 & 20 pin Microcontroller family from Microchip
Resources for these products are available here
Product Resources
Project Examples
PICmicro Sites
Next
WebRing Inc. Search
http://www.duetronix.co.za/ (1 of 2)12/02/2008 17:44:06

Welcome to Duetronix
Powered by WebRing.
Copyright (c) 2007 Duetronix, South Africa
http://www.duetronix.co.za/ (2 of 2)12/02/2008 17:44:06

Australian Electronics WebRing

TELL A
FRIEND!
Australian Electronics WebRing Add Your
Manager: downunderrm Web Site.
Join Here!
Iron WebMaster
Featuring websites dedicated to Electronics as a hobby or business in Australia. This
webring features sites with free schematics, ideas, kit builders, magazines, manufacturers
Round 2 VOTING
and parts suppliers. If your looking for any of the above, or similar, within Australia, then
this is the right ring for you.
Ads by Google
Hytronic Electronics Australian Electronics WebRing Poll
Electronic Transformer Various Ballasts and Motion Sensors. www. Which description best describes what you are
hytronik.com looking for?
Only members who are logged in may register a vote. You
Flexible printed circuits are either not logged in or not a WebRing member. Use the
Get a flex circuits in 24 hrs. Specializing in small to medium. www. Sign In link at top to log in or register for a WebRing User ID.
uniflexcircuits.com
A Hobbyist looking for circuit ideas
School or Factory Bells
School Bell, Ring Class Change Factory Break or School Bells. www.ats- Need someone to help me design a product
usa.com
Just curious in Electronics
Mobile IDE (development)
I am a Ring Member checking my site
WinDev Mobile: RAD, IDE, 5GL, free database. For Windows mobile &
CE. www.windev.com/mobile Just surfing, nothing in particular
Other / None of the above
submit my vote

http://g.webring.com/hub?ring=aering&home (1 of 4)12/02/2008 17:44:20

Ring sites Showing 1 - 20 of 43 Next Ads by Google
20 > x86 Embedded Controllers
Ledsales - LEDs, neons, even a kit or two C/C++ Program
Dedicated to bringing you the cheapest superbright LEDs in Australia, as well as more unusual lighting items www.tern.com
of the present and past, such as colour sequencing LEDs, neon glow bulbs, nixie tubes and other interesting PIC Programmers
goodies. Low cost PIC programmers
and kits Many PIC chips,
Beyond Logic
kits, books & tools
Beyond Logic has Information on Embedded Linux, CMOS Image Sensors, USB, AT Keyboard interfacing,
www.electronics123.com
Embedded Ethernet, Windows NT/2000 Device Drivers, RS232 / SPP / ECP & EPP Ports etc.
Electronic India
Grantronics Pty Ltd Custom electronic design
We design and manufacture custom electronics, mainly using single chip microcontrollers. and development service in
India.
computer software printers inkjet cartridges www.mansi.ws
Save money on hundreds of high quality name brand office. Free - Embedded Journal
You'll laugh, You'll cry You'll
JED Microprocessors - Embedded Computers Design Embedded Systems
JED Microprocessors designs and builds scientific and industrial computers using a number of formats, www.embeddedtechjournal.com
including PC/104 ISA and STD bus. Latest developments include Autralian made boards supporting the Tiny Advertise on this Site
Tiger BASIC module, compiled on a PC, with up to 50 analog/digital I/O.
Make MONEY!
Gooligum Electronics
Design and supply of electronic kits, mainly based on PIC microcontrollers, with an emphasis on fun. Add
Pay-Per-Play
Sesame Electronics Pty Ltd ads to your website
We make Printed Circuit Boards.
Make MONEY!
Telelink Communications
Add
One stop wireless shop! Agents for LPRS U.K., Aerocomm U.S.A., Circuit Design Japan & MK Consultants U.
Pay-Per-Play
K.
ads to your website
Sage Telecommunications
Sage Telecommunications ( Hardware / Software Engineers, distributers of Dontronic's SimmStick products,
LCD's and RF data modules ) and Sage Pages ( Republishers of Fred Hoinville's classic 'Halfway to
Heaven' )

Electronics for Beginners

A Beginners guide to electronics.
Talking Electronics
Designers of simple educational electronic projects.
Robins Electronic Circuits

A Collection of Electronic Circuits which include a home brew heater, lead acid battery charger, intermittent
wiper controller, dry cell rejuvenator, carputer for ford premium sound icc etc.
Power Converter Technologies Pty Ltd

Specialists in all types of switched mode power supply design.
Bob Parker's Electronic Stuff

Information on projects including the ESR meter I've had published in the old "Electronics Australia"
magazine, plus interesting links and other stuff.
Elliott Sound Products - The Audio Pages

Audio Electronics - Professional results for the DIY enthusiast.
Jennaron Research
Specialising in Embedded Systems and Controllers, Jennaron Research is an Australian company based in
Melbourne with a long history of electronic systems hardware and software design.
Reltronics - TopoR - topological PCB autorouter

TopoR is a powerful, having no analogue, advanced topological PCB autorouter.
Embedded Control Technology

Embedded design with ARM, MSP430, AVR, PIC, etc.
DonTronics - In Business Since 1964 - Home of SimmStick

Eagle Air Australia Pty. Ltd.

PIC hardware design, programming and consulting.

20 >



TELL A
FRIEND!
Australian Electronics WebRing Add Your
Manager: downunderrm Web Site.
Join Here!
Iron WebMaster
Featuring websites dedicated to Electronics as a hobby or business in Australia. This
webring features sites with free schematics, ideas, kit builders, magazines, manufacturers
Round 2 VOTING
and parts suppliers. If your looking for any of the above, or similar, within Australia, then
this is the right ring for you.
Ads by Google
Hytronic Electronics Australian Electronics WebRing Poll
Electronic Transformer Various Ballasts and Motion Sensors. www. Which description best describes what you are
hytronik.com looking for?
Only members who are logged in may register a vote. You
Flexible printed circuits are either not logged in or not a WebRing member. Use the
Get a flex circuits in 24 hrs. Specializing in small to medium. www. Sign In link at top to log in or register for a WebRing User ID.
uniflexcircuits.com
A Hobbyist looking for circuit ideas
Electronic India
Custom electronic design and development service in India.. www.mansi. Need someone to help me design a product
ws
Just curious in Electronics
Circuit Simulation
I am a Ring Member checking my site
Find Electronics Solutions For Your Business. Get It Done Now!. www.
business.com Just surfing, nothing in particular
Other / None of the above
submit my vote

http://g.webring.com/hub?ring=aering (1 of 3)12/02/2008 17:44:30

Ring sites < Prev 10 | Next Ads by Google
10 > WinQcad - PCB software
Schematic Capture, PCB
Layout, state of the art
Ark Computers Autorouter, g-code
Ark Computers specialises in PSX conversions and accessories.We also sell mod chips www.winqcad.com
x86 Embedded Controllers
Ledsales - LEDs, neons, even a kit or two
Dedicated to bringing you the cheapest superbright LEDs in Australia, as well as more unusual lighting items
of the present and past, such as colour sequencing LEDs, neon glow bulbs, nixie tubes and other interesting
C/C++ Program
goodies.
www.tern.com
Beyond Logic Free - Embedded Journal

Beyond Logic has Information on Embedded Linux, CMOS Image Sensors, USB, AT Keyboard interfacing, You'll laugh, You'll cry You'll
Embedded Ethernet, Windows NT/2000 Device Drivers, RS232 / SPP / ECP & EPP Ports etc. Design Embedded Systems
www.embeddedtechjournal.com
Grantronics Pty Ltd ICPP - Pro Photo College
We design and manufacture custom electronics, mainly using single chip microcontrollers. Nationally Accredited. Top
Grads! Australia - Melbourne
computer software printers inkjet cartridges and Sydney
Save money on hundreds of high quality name brand office. www.icpp.net
JED Microprocessors - Embedded Computers
JED Microprocessors designs and builds scientific and industrial computers using a number of formats, Make MONEY!
including PC/104 ISA and STD bus. Latest developments include Autralian made boards supporting the Tiny
Tiger BASIC module, compiled on a PC, with up to 50 analog/digital I/O. Add
Pay-Per-Play
Gooligum Electronics ads to your website
Design and supply of electronic kits, mainly based on PIC microcontrollers, with an emphasis on fun.
Make MONEY!
Sesame Electronics Pty Ltd
Add
We make Printed Circuit Boards.
Pay-Per-Play
Telelink Communications ads to your website
One stop wireless shop! Agents for LPRS U.K., Aerocomm U.S.A., Circuit Design Japan & MK Consultants U.
K.

Sage Telecommunications ( Hardware / Software Engineers, distributers of Dontronic's SimmStick products,
LCD's and RF data modules ) and Sage Pages ( Republishers of Fred Hoinville's classic 'Halfway to
Heaven' )

10 >

Sage
Embedded Systems,
Publishers
Sage Telecommunications is a specialist electronic design house. We provide quality hardware and software engineering solutions. We
offer design packages from concept through to manufactured product. See our summary of services.
We have developed software and firmware for a number of OEM's.
We have developed the Sentinel and RCU remote monitoring system and firmware for various professional audio consoles for
Elan Audio.
We have also developed queuing systems for Queue Systems WA.
We have also had significant input into the design and development of several PMR base station control units for a number of
major equipment manufacturers.
Currently providing upgrade, development and maintenance services to a major gas pipeline operator.
New Simmstick Application Page
Internet Productivity and Automation Tools
Sage Telecommunications is now a

Blue Squirrel Affiliate.
http://www.sages.com.au/SageTelecoms.html (1 of 3)12/02/2008 17:44:39

Development tools and prototype boards
Sage Telecommunications resells the Dontronic range of SimmStick products.
16*2 LCD's only AUS$22 ( inc GST )

DT102 RS232/RS485 Mini Terminal
Firmware for the DT102 RS232 Mini Terminal
Free test software for the DT102
PIC16F877-20/P now in stock only AUS$25

The Home of SimmStick
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Send mail to webmaster@sages.com.au with questions or comments about this web site.
Copyright 1998-2004 Sage Telecommunications Pty Ltd
Last modified: January 06, 2004

An online guide to Electronics for Beginners
Links
Pheedback.Org - Independent Consumer Feedback and Reviews on organisations around globe.

Led you light shine - A whole world of LED's funny, with some cool stuff and information.
USB Review - Great reviews on all those cool little electronic devices for your computer.
Bloject.org - The project blog. A great place to record and show off your project or to learn off
other peoples projects.
the.lawn.mower - A disturbing devotion to all things lawn mower.
ELECTRONICS HOBBYIST - A great collecting of electronics links and information.
home
Electronics Club - Some brilliant advice and example circuits.
Electricity Circuit Innovations - electronics design, PCB manufacturing, prototype development. - Some very
Components good circuits.
Electronics 2000 - Information for electronics enthusiasts. Includes technical data, calculators,
Semiconductors
software downloads, beginners guide and more!
Tips Electronic Kits - Hundreds of Electronic Kits and Projects at ElectronicKits.com
Examples Beginner's World
Robot Room - Robot schematics, books, and circuits for mini Sumo, line following, BEAM, and
search
electronic projects. Instructions on making robots at home. Basic help and tips on how to build
forum robotic sensors. Homemade autonomous bots for a hobby! By David Cook.
links 101 Science - A Whole lot of great science links.
about Robot books - A great selection of books on robotics.
mail e4b Electronics Club - A good resource for sample projects.
Electronics Tutorials by Electronics Tutorials with VK2TIP
ElectronicsTeacher.com - Electronic Tutorials, Electronic Project Kits, Robotics Guide for Students,
Amateur and Professionals. Computer Architecture and Digital Circuits.
Circuit Innovations
Acroname - Parts and information on robotics.
PLC Technician - Distance Programmable Logic Controllers (PLC) Training Programs.
Electronic Kits - Hundreds of Electronic Kits and Projects at ElectronicKits.com
EZ Systems - Computers, Peripherals & Networking
Electronic Circuit Diagrams - A collection of circuits for lots of different projects.
CircuitDB - Free electronics circuit design database.
Talking Electronics - Information and links on electronics.
Dieting News - get away from your desk and get fit.
We also belong to
http://electronics-for-beginners.com/links.php (1 of 3)12/02/2008 17:44:45

The FIS Robotics and EE Webring

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http://www.trash.net/~luethi/microchip/projects/dcf77_test/dcf_test.hex
:020000040000FA
:020000006E2868
:0800080045288C0081018316DC
:100010000313C030810508008C008101831603138F
:10002000C030810501308104831203130B110B1DB5
:1000300017288C0B162808009900051208308C0030
:100040002D2019180516191C0512990C2D208C0B42
:10005000212805162D202D2008000C308D00332876
:1000600001308D0033288D0B332808009A01642855
:100070001011950303193F2802301C2091019301B0
:100080009401950112081C2008008B138B1B452836
:100090009C00030E9D0083010A089E008A018313C1
:1000A00004089F000B1C6528861B5C28101C642814
:1000B00010109014910A6428101864281014101558
:1000C0009201901C920A90100B101F0884001E08C9
:1000D0008A001D0E83009C0E1C0E0900831603135C
:1000E00081010512831203130516910192019301F8
:1000F000940195018B018B158B17832849300520BE
:1001000002301320901001309307031C8A289407B3
:0E0110000318950A90187E28101938208328AD
:02400E00F13F80
:00000001FF
http://www.trash.net/~luethi/microchip/projects/dcf77_test/dcf_test.hex12/02/2008 18:26:08
Circuit Design Inc. Radio technical reference Design guide
TX/RX | Transceiver | Audio | Modem | Accessories | Selection | Compliance | Tech Ref.
Technical Reference
This document was prepared as guidance for those who intend to design radio systems using RF radio modules.
We hope you find this document useful for acquiring background information. We believe it will result in shortening
the time required for design, and will help you to develop an attractive product.
Introduction Radio control
What is a radio module? Knowledge required for design
What are radio waves? Radio transmission terminology
What is an antenna?

Propagation loss in free space / over flat terrain

Electric field intensity and received power in free space / over flat terrain
Mutual conversion of decibel value and true value
Okumura - Hata curve
Radio wave propagation characteristics
Creating a channel plan in order to avoid third-order intermodulation interference and the near-far problem
Height pattern calculation
Fresnel zone calculation
Radio application examples
http://www.cdt21.com/products/tech_info/default.asp (1 of 2)12/02/2008 19:07:06

Circuit Design Inc. Radio technical reference Design guide
Electric field intensity at the receiving point < Fresnel zone and height pattern >
Difference between Wide band and Narrow band Radio Module (173 KB)
Feature of Circuit Design narrow band modules (313 KB)
RF module for sending audio signal in European 863-865 MHz band (1448 KB)
UART Interface board (133 KB)
Narrowband FM transceiver STD-302 (148 KB)
FM narrowband transmitters & receivers (120 KB)
Building a sensor network in a factory (898 KB)
Natural disaster monitoring and warning system using SRD (842 KB)

Phone:++81-263-82-1024 FAX:++81-263-82-1016 E-mail:
http://www.cdt21.com/products/tech_info/default.asp (2 of 2)12/02/2008 19:07:06

uClinux -- Embedded Linux Microcontroller Project -- Home Page
Embedded Linux/Microcontroller Project

The Linux/Microcontroller project is a port of Linux
to systems without a Memory Management Unit
(MMU).
Pronounced "you-see-linux", the name uClinux comes

from combining the greek letter "mu" and the english
capital "C". "Mu" stands for "micro", and the "C" is for
"controller". uClinux first ported to the Motorola
MC68328: DragonBall Integrated Microprocessor. The
first target system to successfully boot is the PalmPilot
Home using a TRG SuperPilot Board with a custom boot-
loader created specifically for our Linux/PalmPilot
port.
What is uClinux?
Status
July 2007
Getting started with uClinux Greg Ungerer has been posting patches against the dist
for those wishing to follow the mid-release updates. The
FAQ Patches can be found at the following link: http://www.
uclinux.org/pub/uClinux/dist/patches/ Feed back on
uCsimm Hardware Project these patches can be posted to the uClinux-dev mailing
list. If you wish to subscribe to the mailling list you can
uClinux Ports do it here https://mailman.uclinux.org/mailman/listinfo/
uclinux-dev/.
The Developers
July 2007
E-Mail Forum The current uClinux-dist release is dated January 30,
2007. Here is a quick links to the tar.gz and tar.bz2
packages.
Contact us
http://www.uclinux.org/uClinux/dist/uClinux-
HTTP download
http://www.uclinux.org/ (1 of 3)12/02/2008 19:07:36

dist-20070130.tar.gz
CVS repository http://www.uclinux.org/uClinux/dist/uClinux-
dist-20070130.tar.bz2
Sponsor Links
June 2007
Again this year several uClinux developers will all be at
the Ottawa Linux Symposium (Ottawa Canada June 27-
30). Checkout the sessions that Robin Getz will be
presenting at the conference.
Session on "More Linux for Less" with Robin

Getz on June 27th at Noon.
BOF on "Embedded Linux" with Tim Bird June
27 at 6PM.
June 2007
The Freescale Technolgy Forum is holding many
session on embedded Linux / uClinux this year
(Orlando Florida June 25-28).
This Open Source Project Sponsored By: Hands on Workshop "Getting Started with
uClinux on Cost-Effective 32 bit Devices
(MCF5207/MCF5208)" with Tatiana Orofino on
June 26.
Hands on Workshop "Introduction to Embedded
Linux on ColdFire Processors (MCF5475/
MCF5485)" with Cory Tate on June 27th.
Hands on Workshop "Configuring and Use of
Coldfire Embedded Voip Kit with uClinux
(MCF5328/MCF5329)" with Michael Durrant on
June 27th.
ANI Technologies Corp. Hands on Workshop "Building an MP3 Player
on the uClinux Operating System Using the
ColdFire MCF5249)" with Fabio Estevam on
June 28th.
old news items
Copyright 1998 - 2002 D. Jeff Dionne and Michael Durrant Copyright 2001 - 2007 Arcturus Networks Inc.
uClinux, Clinux, uCsimm, Csimm, uCdimm, Cdimm, Arcturus and the logos versions are Trademarks of Arcturus
Networks Inc.

SnapGear and logo are Trademarks of SnapGear Inc.

USB Hub .Org
home
Welcome to the USB Hub, where our crack team of nerds are chained to
the office
computers with lots of USB ports trying out every USB device we can find.
your home
We let you know what we think of them and give you a place to share your
hotlists
thoughts on them as well.
search
forum What have we been up to lately?
links USB Pig Radio/Speaker

about
The USB Pig Radio/speaker is an amazing example of a
mail us
product that sounds much better than it is. And I don't
mean the sound is good. What could possibly go wrong
with a plastic pig that lets you listen to your favourite radio station
and/or works as a speaker to amplify tunes from your ipod or PC?.
Well for starters, the radio function is pants. The manufacturers
have gone for the one button push-to-scan radio carcass that
comes in your average free drug company distributed radio. So to
say find
http://www.usb-hub.org/ (1 of 3)12/02/2008 19:22:01

USB Hub .Org
LaCie Huby - Rockin USB Hub
The LaCie Huby is the best looking usb hub I have ever
seen. And I've seen one or two. Obviously LaCie realised
that consumers are after useful things that look good on the desk.
The Huby provides 4 U
USB Missile Launcher
The USB missile launcher is probably not what the boffins
who invented the USB protocol had in mind when they
created our favourite port, but I truly believe that it is the very
pinnacle of USB device
The USB coffee warmer and hub combination.
The USB coffee warmer and hub combination that we
tested is of the cheap, mass produced and Chinese variety.
The warming part consists of a circular metal pad that heats up in
USB Massager
Our next entry in the cheap and superfluous dept is the
tiny but mighty USB massager. I wasn't sure what to expect
when the box arrived in the mail, and, truth be told I was s
What have our readers been up to?

USB Hub .Org
From: Anon(13) on 2006-11-15 05:03:28
Cool - pymissle already imported into the OpenBSD ports tree (-
current).
From: Anon(13) on 2006-10-10 06:14:18
http://java.roysolberg.com/usb/ <-- Java version
From: Anon(13) on 2006-10-01 00:33:00
Have a look at this - http://crave.cnet.co.uk/
peripherals/0,39029462,49283728,00.htm?r=2 A battery that
charges over USB!
copyright 2006 | By Ray Gerrard

PLC Technician Certificate Home Study Training
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http://www.plctechnician.com/ (1 of 3)12/02/2008 19:23:37

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Duetronix - Projects And Documentation
| Home Page |
|Duetronix - Project Assistance|
To assist the hobbyist the following projects and code samples are available for download. These applications are available without charge for non comercial use.
Adobe Acrobat 6.0 or higher is required to view the files below.
Application Notes
001 - Hello World Beginner's Project: Discusses basic details about PIC Microcontrollers, includes sample code that toggles single LED.
002 - PIC I/O Basics Beginner's Project: Introduction for beginners to PIC I/O.
Project Code
Project samples under development
ProtoPro : Quick Assembly Guides

QAG 18 ProtoPro Quick Assembly Guide (Assembly Instructions): Discusses assembly details. Includes circuit diagram.
Disclaimer: The following code samples are provided without waranty. They may be used entirely for educational purposes and may not be used for comercial purposes.
Use them entrirely at your own risk.
| CONTACT DETAILS |
email info@duetronix.co.za
Copyright (c) 2007 Duetronix, South Africa
http://www.duetronix.co.za/projects.htm12/02/2008 19:31:40
http://www.trash.net/~luethi/microchip/projects/adc_test/nsc12130.asm
;***************************************************************************
;
; NSC ADC12130 Software Interface on PIC 16F84 V1.02
; ===================================================
;
;
; V1.02: Added LCDcflag (LCD command/data flag) to comply with
; latest LCD modules.
; (19.04.2004)
;
; V1.01: Updated to latest revision of m_lcd_bf.asm
; (31.12.2000)
;
;
;
;
; SPECIFICATIONS:
; ===============
; Required Hardware: NSC ADC12130, dot matrix LCD display
;
;
; DESCRIPTION:
; ============
; This is a communication test routine between the PIC16F84 and
; the NSC ADC12130 12 bit A/D Converter based on the software-
; implemented SSP (Synchronous Serial Port) interface.
; The following features are implemented:
http://www.trash.net/~luethi/microchip/projects/adc_test/nsc12130.asm (1 of 9)12/02/2008 19:39:17

; - Status Read of A/D configuration

; - Readout of A/D value and display on LCD Display.
;
; Output format: 16 bit unsigned, MSB first, CH0 single-ended :
; 0 0 0 0 MSB <12 bit data> LSB
;
;***************************************************************************
ERRORLEVEL -207 ; Found label after column 1.

ERRORLEVEL -302 ; Register in operand not in bank 0.
PROCESSOR 16F84


goto MAIN

goto MAIN ; no Interrupt Service Routine
LCDtris equ TRISB

LCDport equ PORTB

#define DO PORTA,2 ; serial data output
#define DI PORTA,4 ; serial data input




;*** CH0 : CH0 vs CH1, df : differential mode, format, first bit ***
CONSTANT CH0df12MSB = b'00000000'
CONSTANT CH0df16MSB = b'00010000'
CONSTANT CH0df12LSB = b'00010000'
CONSTANT CH0df16LSB = b'00010100'

#define LCDbusy FLAGreg,0x00 ; LCD busy flag
b16_cnt equ BASE+d'7' ; counter for 16 bit binary output

AD_cnt set BASE+d'8' ; counter for A/D readout
HI equ BASE+d'9'
LO equ BASE+d'10'


#include "..\m_lcd_bf.asm"
;***** MACROS *****
ADinit macro
BANK1
movwf TRISA
BANK0

endm ; SCK low
ADenable macro
andwf PORTA,1
endm
ADdisable macro
iorwf PORTA,1
endm

movlw ADcommand
call AD_cmd
endm

movlw d'8'
movwf AD_cnt

ad_loop
bcf DO
bsf DO

rlf SSPSR,1

btfsc DI
bsf SSPSR,0

bcf SCK ; clock low
decfsz AD_cnt,1
goto ad_loop
RETURN
;************** MAIN **************
MAIN LCDinit
ADinit
LCDchar 'N'
LCDchar 'S'
LCDchar 'C'
LCDchar ' '
LCDchar 'A'
LCDchar 'D'
LCDchar 'C'
LCDchar '1'
LCDchar '2'

LCDchar '1'
LCDchar '3'
LCDchar '0'
LCDchar ' '
LCDchar 'C'
LCDchar 'I'
LCDchar 'N'
LCDline 2
LCDchar 'T'
LCDchar 'e'
LCDchar 's'
LCDchar 't'
LCDchar '-'
LCDchar 'I'
LCDchar 'n'
LCDchar 't'
LCDchar 'e'
LCDchar 'r'
LCDchar 'f'
LCDchar 'a'
LCDchar 'c'
LCDchar 'e'
WAITX d'16',d'7'
;*** Display Default Configuration of the A/D: Status Read ***
ADenable
ADcmd StatusRead
ADdisable
LCDcmd LCDCLR
LCDchar 'S'
LCDchar 't'
LCDchar 'a'
LCDchar 't'
LCDchar 'u'
LCDchar 's'

ADenable
ADcmd Unsigned
movfw SSPSR
movwf HI ; get upper 8 bits of status data
; get remaining bit of status data :
clrf LO
btfsc DI
bsf LO,7 ; store remaining status bit
bcf SCK ; clock low
ADdisable
LCD_DDAdr 0x07 ; display status data: 9 bits (!)

LCDbin_16 ; default: 13 bit, MSB first, signed
WAITX d'25',d'7'
;*** Set Aquisition Time to 34 CCLK Cycles ***
ADenable
WAIT 0x01
ADenable
WAIT 0x03
ADenable
WAIT 0x01
;*** Display Current Configuration of the A/D: Status Read ***

ADenable
ADcmd StatusRead ; Note: the returned bit length
ADdisable ; corresponds to the preceeding command
WAIT 0x01
ADenable
;*****************
;ADcmd CH1se16MSB ; CH1, single-ended, 16 bit, MSB first
;*****************
movfw SSPSR
movwf HI ; get upper 8 bits of status data
; get remaining bit of status data :
clrf LO
btfsc DI
bsf LO,7 ; store remaining status bit
bcf SCK ; clock low
ADdisable
LCD_DDAdr 0x07 ; display status data: 9 bits (!)

LCDbin_16 ; now: 16 bit, MSB first, unsigned
;*** A/D Value Readout ***
Loop ; wait at least Tacq + Tconv = (34 + 44) Tclk

; = 78 Tclk = 20 us @ 4 MHz
ADenable
;*****************
;ADcmd CH1se16MSB ; CH1, single-ended, 16 bit, MSB first
;*****************
movfw SSPSR
movwf HI
ADcmd DummyCmd
movfw SSPSR
movwf LO
ADdisable

LCD_DDAdr 0x40 ; display A/D data

LCDbin_16
goto Loop ; re-entry

END

http://www.trash.net/~luethi/microchip/projects/LCDx_test/LCDx_test.asm
;***************************************************************************
;
; LCD TEST ROUTINE for demonstration of LCD animation V1.03
; =========================================================
;
;
; V1.03: Added line test and 'walking square'.
; (06.06.2004)
;
; V1.02: Improved animation.
; (19.04.2004)
;
; V1.01: Added user-defined characters, defined in macro
; LCDspecialChars in assembler module file m_lcdx.asm.
; (x.x.1999?)
;
; V1.00: Initial release, for Hitachi HD44780 LCD controllers
; and compatibles.
; (16.05.1999)
;
;
;
;
; SPECIFICATIONS:
; ===============
; Processor: Microchip PIC 16X84
; Clock Frequency: 4.00 MHz (HS mode)
; LCD Transmission Mode: 4 Bit on D4 - D7 (MSB),
; uses high nibble of the LCD port
; LCD Connections: 7 Wires
; (4 Data, 3 Command)
http://www.trash.net/~luethi/microchip/projects/LCDx_test/LCDx_test.asm (1 of 9)12/02/2008 19:44:10

; Total LCD Connections: 10 Wires

; (4 Data, 3 Command, 1 Vdd, 1 GND, 1 Contrast)
; Required Hardware: HD44780 compatible dot matrix LCD
; (2x16, 2x20 or 2x40 characters)
;
;
; DESCRIPTION:
; ============
; Demonstrates LCD initialization and the use of various LCD commands.
; Shows 2 self-defined characters and 15 special characters.
;
;***************************************************************************

;PROCESSOR 16F84
;#include "p16f84.inc"
PROCESSOR 16F84a
#include "p16f84a.inc"

__CONFIG _CP_OFF & _WDT_OFF & _PWRTE_ON & _HS_OSC

goto MAIN

goto MAIN ; no ISR


CONSTANT LCDWAIT = 0x01 ; clk in [0..5] MHz
CONSTANT LCDSPEED = 0x00 ; clk in [0..9] MHz
TEMP1 equ BASE+d'6' ; Universal Temporary Register

TEMP2 equ BASE+d'7'

#define LCDcflag FLAGreg,0x01
;*** LCD module versions for fixed ports (e.g. PortB) ***
LCDtris equ TRISB
LCDport equ PORTB
; #include "..\..\m_lcd.asm"
#include "..\..\m_lcdx.asm" ; with user-defined characters
; #include "..\..\m_lcd_bf.asm"
; #include "..\..\m_lcdxbf.asm" ; with user-defined characters
;*** configurable LCD module versions for modular ports (e.g. PortA & PortB) ***
; LCDport equ PORTA
; #define LCD_EN PORTB,0x01 ; Enable Output / "CLK"
; #define LCD_RS PORTB,0x02 ; Register Select
; #define LCD_RW PORTB,0x03 ; Read/Write
; #include "..\..\m_lcde.asm"
; #include "..\..\m_lcde_bf.asm"
; #include "..\..\m_lcdexbf.asm" ; with user-defined characters

;***** MACROS *****
;************** MAIN **************
MAIN
LCDinit ; LCD Initialization
LCDchar 'C'
LCDchar 'h'
LCDchar 'a'
LCDchar 'r'
LCDchar 'a'
LCDchar 'c'
LCDchar 't'
LCDchar 'e'
LCDchar 'r'
LCDchar 's'
LCDchar ':'
LCDchar ' '
LCDchar 0x00 ; user-defined characters

LCDchar 0x01
LCDline 2 ; change to position on the second line
LCDchar 0xE0
LCDchar 0xE1
LCDchar 0xE2
LCDchar 0xE3
LCDchar 0xE4
LCDchar 0xE5
LCDchar 0xE8
LCDchar 0xEF
LCDchar 0xF3
LCDchar 0xF4
LCDchar 0xF5
LCDchar 0xF6

LCDchar 0xF7
LCDchar 0xF8
LCDchar 0xFD
WAITX d'20',d'7'
LCDcmd LCDCLR
LCDchar 'P'
LCDchar 'I'
LCDchar 'C'
LCDchar '1'
LCDchar '6'
LCDchar 'F'
LCDchar '8'
LCDchar '4'
LCDchar ' '
LCDchar 'L'
LCDchar 'C'
LCDchar 'D'
LCDchar 't'
LCDchar 'e'
LCDchar 's'
LCDchar 't'
movlw 0x03 ; repeat INTRO three times

movwf TEMP1
INTRO LCD_DDAdr 0x44 ; change to position on the second line

LCDchar '*'
WAIT 0x80
LCDchar '*'
WAIT 0x80
LCDchar '*'
WAIT 0x80
LCDchar '*'
WAIT 0x80
LCDchar '*'
WAIT 0x80
LCDchar '*'
WAIT 0x80
LCDchar '*'

WAIT 0x80
LCDchar '*'
WAIT 0x80
LCD_DDAdr 0x44
LCDchar ' '
LCDchar ' '
LCDchar ' '
LCDchar ' '
LCDchar ' '
LCDchar ' '
LCDchar ' '
LCDcmd LCDCL ; cursor move direction left

LCDchar '*'
WAIT 0x80
LCDchar '*'
WAIT 0x80
LCDchar '*'
WAIT 0x80
LCDchar '*'
WAIT 0x80
LCDchar '*'
WAIT 0x80
LCDchar '*'
WAIT 0x80
LCDchar '*'
WAIT 0x80
LCDchar '*'
WAIT 0x80
LCD_DDAdr 0x4B
LCDchar ' '
LCDchar ' '
LCDchar ' '
LCDchar ' '
LCDchar ' '
LCDchar ' '
LCDchar ' '
LCDcmd LCDCR ; cursor move direction right
decfsz TEMP1,f
goto INTRO
LCDchar ' '

WAITX d'8',d'7'
LCDcmd LCDCLR
LCDcmd LCDL4
LCDchar 'L'
LCDchar 'i'
LCDchar 'n'
LCDchar 'e'
LCDchar ' '
LCDchar '4'
LCDcmd LCDL3
LCDchar 'L'
LCDchar 'i'
LCDchar 'n'
LCDchar 'e'
LCDchar ' '
LCDchar '3'
LCDcmd LCDL2
LCDchar 'L'
LCDchar 'i'
LCDchar 'n'
LCDchar 'e'
LCDchar ' '
LCDchar '2'
LCDcmd LCDL1
LCDchar 'L'
LCDchar 'i'
LCDchar 'n'
LCDchar 'e'
LCDchar ' '
LCDchar '1'
WAITX d'16',d'7'
LCDcmd LCDCH ; cursor home

movlw d'80'
movwf TEMP1
LOOP1 LCDchar 0xFF ; send black square (positive)
decfsz TEMP1,f
goto LOOP1
WAITX d'16',d'7'

LCDchar 0xFE ; send white square (negative)
movlw d'2' ; outer loop

movwf TEMP1
LOOP2 movlw d'40' ; inner loop
movwf TEMP2
LOOP2b WAIT 0xA0
LCDcmd LCDSR ; 'walking square' on line 1
decfsz TEMP2,f
goto LOOP2b
LCDchar 0xFF
LCDcmd LCDL2 ; 'walking sqare' on line 2
LCDchar 0xFE
decfsz TEMP1,f
goto LOOP2
LCDcmd LCDCLR ; clear LCD
LOOP3 WAIT 0xFF

LCD_DDAdr 0x00
LCDchar 'H'
LCDchar 'e'
LCDchar 'l'
LCDchar 'l'
LCDchar 'o'
LCDchar ' '
WAIT 0xFF
LCD_DDAdr 0x41
LCDchar ' '
LCDchar ' '
LCDchar ' '
LCDchar 'W'
LCDchar 'o'
LCDchar 'r'
LCDchar 'l'
LCDchar 'd'
movlw 0x07
movwf TEMP1
LO_1 WAIT 0xC0
LCDcmd LCDSR ; shift right LCD display content
decfsz TEMP1,f
goto LO_1
WAIT 0xFF
LCD_DDAdr 0x00
LCDchar 'H'

LCDchar 'e'
LCDchar 'r'
LCDchar 'e'
LCDchar b'00100111'
LCDchar 's'
WAIT 0xFF
LCD_DDAdr 0x41
LCDchar 'P'
LCDchar 'I'
LCDchar 'C'
LCDchar '1'
LCDchar '6'
LCDchar 'F'
LCDchar '8'
LCDchar '4'
movlw 0x07
movwf TEMP1
LO_2 WAIT 0xC0
LCDcmd LCDSL ; shift left LCD display content
decfsz TEMP1,f
goto LO_2
goto LOOP3
END

http://www.trash.net/~luethi/microchip/projects/LCDx_test/LCDx_test.hex
:020000040000FA
:020000003A289C
:080008003A288C0081018316E7
:100010000313C030810508008C008101831603138F
:10002000C030810501308104831203130B110B1DB5
:1000300017288C0B162808008E00E13086050E0D5F
:100040001E398604080086132628861706138F009B
:100050000F080F0E1C2033200F081C203320E13026
:1000600086058613080001300C20861686120130A2
:100070000C20080083160313013086058312031336
:10008000861206138613E130860504300C200330F7
:100090001C20332001300C2008301C20332001307C
:1000A0000C2002301C20332001300C20283023206B
:1000B0000C3023200130232008300C204030232036
:1000C00006302520413023200830252042302320CF
:1000D00004302520433023200A30252044302320BB
:1000E0001130252045302320113025204630232093
:1000F0000E30252047302320003025204830232093
:100100000E30252049302320113025204A3023206D
:10011000113025204B302320113025204C30232056
:10012000113025204D3023200A3025204E30232049
:100130001B3025204F302320003025208030232005
:10014000433025206830252061302520723025205D
:10015000613025206330252074302520653025202E
:1001600072302520733025203A302520203025207C
:100170000030252001302520C0302320E03025200C
:10018000E1302520E2302520E3302520E430252011
:10019000E5302520E8302520EF302520F3302520DC
:1001A000F4302520F5302520F6302520F7302520A5
:1001B000F8302520FD30252014300520073013208D
:1001C0000130232050302520493025204330252080
:1001D0003130252036302520463025203830252066
:1001E00034302520203025204C3025204330252058
:1001F000443025207430252065302520733025209B
:100200007430252003309200C43023202A3025206A
:1002100080300C202A30252080300C202A302520E8
:1002200080300C202A30252080300C202A302520D8
:1002300080300C202A30252080300C202A302520C8
:1002400080300C202A30252080300C20C430232020
:10025000203025202030252020302520203025204A
:100260002030252020302520203025200430232058
:100270002A30252080300C202A30252080300C2088
http://www.trash.net/~luethi/microchip/projects/LCDx_test/LCDx_test.hex (1 of 2)12/02/2008 19:44:16

http://www.trash.net/~luethi/microchip/projects/LCDx_test/LCDx_test.hex
:100280002A30252080300C202A30252080300C2078
:100290002A30252080300C202A30252080300C2068
:1002A0002A30252080300C202A30252080300C2058
:1002B000CB30232020302520203025202030252041
:1002C00020302520203025202030252020302520DA
:1002D00006302320920B04292030252008300520E9
:1002E0000730132001302320D43023204C30252028
:1002F000693025206E3025206530252020302520CE
:1003000034302520943023204C302520693025209E
:100310006E302520653025202030252033302520E3
:10032000C03023204C302520693025206E30252018
:1003300065302520203025203230252080302320B4
:100340004C302520693025206E3025206530252051
:100350002030252031302520103005200730132093
:100360000230232050309200FF302520920BB42918
:10037000103005200730132002302320FE302520C6
:100380000230920028309300A0300C201C30232033
:10039000930BC42902302320FF302520C0302320B6
:1003A000FE302520920BC22901302320FF300C2083
:1003B0008030232048302520653025206C302520D2
:1003C0006C3025206F30252020302520FF300C2078
:1003D000C13023202030252020302520203025202A
:1003E000573025206F302520723025206C30252095
:1003F0006430252007309200C0300C201C302320B0
:10040000920BFC29FF300C2080302320483025201F
:1004100065302520723025206530252027302520A5
:1004200073302520FF300C20C13023205030252090
:1004300049302520433025203130252036302520F5
:1004400046302520383025203430252007309200D2
:0E045000C0300C2018302320920B282AD62909
:02400E00F23F7F
:00000001FF
http://www.trash.net/~luethi/microchip/projects/LCDx_test/LCDx_test.hex (2 of 2)12/02/2008 19:44:16

http://www.trash.net/~luethi/microchip/projects/counter/counter.asm
;***************************************************************************
;
; LCDv16 Test Routine for PIC 16XXX V1.02
; =======================================
;
;
; V1.02: Added binary representation of counter value
; (05.01.2005)
;
; V1.01: Clean up and adaptation to latest module versions
; (31.12.2000)
;
; V1.00: Initial release
; (26.03.1999)
;
;
;
;
; SPECIFICATIONS:
; ===============
; Processor: Microchip PIC 16C84, PIC 16F84
;
;
; DESCRIPTION:
; ============
; Demonstrates LCD initialization and the use of some LCD commands, as
http://www.trash.net/~luethi/microchip/projects/counter/counter.asm (1 of 4)12/02/2008 19:45:19

; well as 16 bit binary to decimal conversion module file m_lcdv16.asm,

; and 16 bit binary LCD output module m_lcdb16.asm (for debugging).
;
;***************************************************************************

PROCESSOR 16F84
#include "p16f84.inc"


goto MAIN

goto MAIN ; no ISR
LCDtris equ TRISB

LCDport equ PORTB

LO equ BASE+d'5'
HI equ BASE+d'6'

#define BCflag FLAGreg,0x00 ; blank checker for preceeding zeros
#include "..\..\m_lcd.asm"
#include "..\..\m_lcdv16.asm" ; 16 bit binary to decimal conversion
#include "..\..\m_lcdb16.asm" ; 16 bit binary debug output on LCD
;***** MACROS *****
;************** MAIN **************
MAIN
clrf HI
clrf LO
LCDchar 'C'
LCDchar 'n'
LCDchar 't'
LCDchar '-'
LCDchar 'V'
LCDchar 'a'
LCDchar 'l'
LCDchar 'u'
LCDchar 'e'
LCDchar ':'
m_loop LCD_DDAdr 0x0B ; goto specific LCD position on line 1

LCDval_16 ; decimal representation
LCD_DDAdr 0x40 ; goto specific LCD position on line 2

LCDbin_16 ; decimal representation
movlw 0x01 ; increment LO with addwf

addwf LO,f ; => affects carry bit
addcf HI,f ; add carry bit to HI

; no jumps necessary !
WAIT 0x40
goto m_loop
END

http://www.trash.net/~luethi/microchip/projects/counter/counter.hex
:020000040000FA
:0200000087284F
:0800080087288C00810183169A
:100010000313C030810508008C008101831603138F
:10002000C030810501308104831203130B110B1DB5
:1000300017288C0B162808008E00E13086050E0D5F
:100040001E398604080086132628861706138F009B
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:1000900003308E005D20252064308D008E015D20B0
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:1000B0008E0110145D20252008008C010E0814020A
:1000C000031C7128031D68280D081302031C7128E6
:1000D0000E0894020D089302031C94038C0A10145A
:1000E0005E2830300C07101C203008001414120851
:1000F0009300083095003030931B31302520930D4C
:10010000950B7B28141C08001410110878288316FE
:100110000313013086058312031386120613861318
:10012000E130860504300C2003301C2033200130E0
:100130000C2008301C20332001300C2002301C2001
:10014000332001300C20283023200C3023200130B4
:10015000232008300C2092019101433025206E307D
:100160002520743025202D30252056302520613063
:1001700025206C30252075302520653025203A302B
:1001800025208B3023203B20C030232076200130D7
:0C01900091070318920A40300C20C1288F
:02400E00F13F80
:00000001FF
http://www.trash.net/~luethi/microchip/projects/counter/counter.hex12/02/2008 19:45:32
http://www.trash.net/~luethi/microchip/projects/debug/debug.asm
;***************************************************************************
;
; LCDb16 Test Routine for PIC 16XXX V1.01
; =======================================
;
;
; V1.01: Clean up and adaptation to latest module versions
; (05.01.2005)
;
; V1.00: Initial release
; (02.08.1999)
;
;
;
;
; SPECIFICATIONS:
; ===============
; Processor: Microchip PIC 16C84, PIC 16F84
;
;
; DESCRIPTION:
; ============
; Demonstrates LCD initialization and the use of some LCD commands, as
; well as 16 bit binary LCD output module m_lcdb16.asm (for debugging).
;
;***************************************************************************
http://www.trash.net/~luethi/microchip/projects/debug/debug.asm (1 of 3)12/02/2008 19:45:54


PROCESSOR 16F84


goto MAIN

goto MAIN ; no ISR
LCDtris equ TRISB

LCDport equ PORTB
LO equ BASE+d'5'
HI equ BASE+d'6'

#include "..\..\m_lcd.asm"
#include "..\..\m_lcdb16.asm" ; 16 bit binary debug output on LCD
;***** MACROS *****
;************** MAIN **************
MAIN
clrf HI
clrf LO
LCD_DDAdr 0x02
LCDchar 'L'
LCDchar 'C'
LCDchar 'D'
LCDchar 'b'
LCDchar '1'
LCDchar '6'
LCDchar '-'
LCDchar 'T'
LCDchar 'e'
LCDchar 's'
LCDchar 't'
LCDchar ':'
m_loop LCD_DDAdr 0x40 ; set cursor to the beginning of

; the second line
LCDbin_16
incfsz LO,1
goto IN_1
incf HI,1
IN_1 WAIT 0x40

goto m_loop
END

http://www.trash.net/~luethi/microchip/projects/debug/debug.hex
:020000040000FA
:020000004C288A
:080008004C288C0081018316D5
:100010000313C030810508008C008101831603138F
:10002000C030810501308104831203130B110B1DB5
:1000300017288C0B162808008E00E13086050E0D5F
:100040001E398604080086132628861706138F009B
:100050000F080F0E1C2033200F081C203320E13026
:1000600086058613080001300C20861600008612D3
:1000700001300C2008001414120893000830950079
:100080003030931B31302520930D950B4028141CE4
:100090000800141011083D2883160313013086054B
:1000A00083120313861206138613E130860504308B
:1000B0000C2003301C20332001300C2008301C2081
:1000C000332001300C2002301C20332001300C2062
:1000D000283023200C3023200130232008300C202E
:1000E00092019101823023204C302520433025207D
:1000F000443025206230252031302520363025201F
:100100002D302520543025206530252073302520C2
:10011000743025203A302520C03023203B20910F19
:0A0120009228920A40300C208C282F
:02400E00F13F80
:00000001FF
http://www.trash.net/~luethi/microchip/projects/debug/debug.hex12/02/2008 19:46:02
http://www.trash.net/~luethi/microchip/projects/keyboard/scan_deb/scan_deb.asm
;***************************************************************************
;
; AT Keyboard Scan Code Debug Interface V1.02
; ===========================================
;
;
; V1.02: Re-structured entire ISR and RS232 echo sub-routines
; (18.04.2004)
; V1.01: Changed keyboard data pin to PORTA,4 (open-collector).
; (16.08.2003)
;
;
;
;
; SPECIFICATIONS:
; ===============
; RS232 Baud Rate: 19200 baud (depends on the module included)
; Serial Output: 19200 baud, 8 bit, no parity, 1 stopbit
; Keyboard Routine Features: Capability of uni-directional
; communication between microcontroller
; and keyboard
; Acquisition Methodology: Non-preemptive, interrupt-based
; keyboard scan pattern acquisition
; Code Size of entire Program: 208 instruction words
; Required Hardware: AT Keyboard, MAX 232
; Required Software: RS232 terminal (recommended: Excel 97
; RS232-Debug-Interface)
;
http://www.trash.net/~luethi/microchip/projects/keyboard/scan_deb/scan_deb.asm (1 of 7)12/02/2008 19:46:33

; DESCRIPTION:
; ============
; Developed and tested on PIC 16F84.
; Any key stroke on the keyboard connected to the PIC will send the
; corresponding key scan code to the computer terminal via the RS232
; connection.
; Verification of keyboard scan patterns and to get the scan code of
; unknown keys on non-english or non-german keyboards.
;
; The keyboard scan code capture and decoding is done by an interrupt
; service routine. The event, which triggers the interrupt is a falling
; edge on the keyboard clock line at the KBDclkpin (PORTB,0).
; The keyboard data (scan code) will be fetched at the KBDdatapin
; (PORTA,4).
; There is only RS232 transmission, so only the TXport is connected.
; No reception is necessary because there aren't any output devices
; attached to the microcontroller and PORTB,0 is already used by the
; keyboard clock line. The configuration of the KBDclkpin (PORTB,0)
; interrupt is done by the RS232init procedure (although used by the
; keyboard), because all settings are the same.
;
;
; IMPORTANT:
; ==========
; To get all parts of a complete scan pattern, it is recommended to
; use this code in compliance with the above specifications.
; Otherwise, consecutive interrupt calls are launched before the
; termination of the ISR. As a consequence, parts of scan patterns
; will not be displayed or in worst case, a system crash will happen.
; Of course, it is possible to use this code with a faster crystal
; and/or with RS232 modules specified for higher baud rates.
;
;
; CREDITS:
; ========
; - Craig Peacock, the author of the excellent page about keyboards
; "Interfacing the PC's Keyboard" available at his website:
; http://www.beyondlogic.org/keyboard/keybrd.htm
; - Steve Lawther for inspirations concerning the scan code fetch
; routine.
;
;***************************************************************************

;***** EXCLUDE COMPILATION MESSAGES & WARNINGS *****

PROCESSOR 16F84
; embed configuration data within .asm file


goto MAIN
; interrupt service routine at ORG 0x04 declared below

#define KBDdatapin PORTA,0x04 ; keyboard data input port
#define KBDdatatris TRISA,0x04 ; (open-collector pin)
#define KBDclkpin PORTB,0x00 ; keyboard clock input port (IntB)
#define KBDclktris TRISB,0x00 ; @ INTF interrupt source (RB0)

TEMP2 set BASE+d'1'
TEMP3 set BASE+d'2'
TEMP4 set BASE+d'3'
TXD equ BASE+d'4' ; RS232 TX-Data register

RXD equ BASE+d'5' ; RS232 RX-Data register


ISRtmp1 equ BASE+d'10' ; ISR temporary register

ISRtmp2 equ BASE+d'11' ; ISR temporary register
KBD equ BASE+d'12' ; keyboard data register
ORG 0x50
#include "..\..\m_bank.asm" ; standard macros
;#include "..\..\m_rs096.asm" ; 9600 baud, not recommended
#include "..\..\m_rs192.asm" ; 19200 baud @ 4 MHz
ISR ;************************
;************************

goto ISR
;**************************

;**************************
;*** Until now, already 16 cycles (16 us) have been passed ***
btfsc KBDdatapin ; test start bit of keyboard data input
goto KBDabort ; no valid start bit, abort
movlw 0x08 ; 8 data bits to receive / counter
movwf ISRtmp1
waitHI btfss KBDclkpin ; loop, wait for kbd clk HIGH transition
goto waitHI
waitLO btfsc KBDclkpin ; loop, wait for kbd clk LO transition
goto waitLO
btfss KBDdatapin
goto KBD_1
bsf KBD,0x07
goto KBD_2
KBD_1 bcf KBD,0x07
KBD_2 decfsz ISRtmp1,W ; skip if ISRtmp1 == 1
rrf KBD,F ; do this only 7 times
decfsz ISRtmp1,F
goto waitHI ; loop 8 times
;*** ignore parity bit, check stop bit: ***
movlw 0x02 ; set counter
movwf ISRtmp1
waitHIp btfss KBDclkpin ; loop, wait for kbd clk HIGH transition
goto waitHIp
waitLOp btfsc KBDclkpin ; loop, wait for kbd clk LO transition
goto waitLOp
decfsz ISRtmp1,F
goto waitHIp
btfsc KBDdatapin ; check if stop bit is valid
goto KBD_3 ; if valid, continue execution of ISR
KBDabort clrf KBD ; else, abort / invalid data
goto ISRend ; terminate execution of ISR
;*** STALL KEYBOARD TO DECODE DATA ***

KBD_3 BANK1 ; hold keyboard (with kbd clk low):
bcf KBDclktris ; set clk line to output
BANK0
bcf KBDclkpin ; set keyboard clk line low (stall)
movfw KBD

;*** DISABLE STALL ***

BANK1
bsf KBDclktris ; set clk line back to input (and goes high)
BANK0 ; (release stall)
;***********************************
;***********************************
_ISR_RS232error
_ISR_RS232end
;*****************************************
;*****************************************

;************** MAIN **************
ORG 0xB0
MAIN BANK1
clrf OPTION_REG ; PORTB pull-ups enabled
bsf KBDclktris
bsf KBDdatatris
BANK0
WAIT d'5'

MLoop movlw d'39' ; store amount of table items in counter

movwf TEMP3
_LOOP movlw HIGH WelcomeTable ; get correct page for PCLATH

movwf PCLATH ; prepare right page bits for table read
movfw TEMP3 ; get actual count-down value
sublw d'39' ; table offset: w = d'39' - TEMP3
call WelcomeTable ; call lookup table
SENDw
decfsz TEMP3,F ; decrement counter
goto _LOOP
WAITX d'255',d'7' ; wait 17 seconds @ 4 MHz
goto MLoop
WelcomeTable
addwf PCL,F
DT "PIC 16F84 Keyboard Decoder connected" ; create table
retlw CR ; Carriage Return
retlw LF ; Line Feed
WTableEND retlw LF ; Line Feed
IF (high (WelcomeTable) != high (WTableEND))

ERROR "Welcome table hits page boundary!"
ENDIF
END

http://www.trash.net/~luethi/microchip/projects/keyboard/scan_deb/scan_deb.hex
:020000040000FA
:02000000B02826
:080008008B138B1B04289200EE
:10001000030E930083010A0894008A0183130408E5
:100020009500051A2C2808309600061C152806187D
:100030001728051E1D2898171E289813160B980CB4
:10004000960B152802309600061C24280618262830
:10005000960B2428051A2E2898013C288316031392
:100060000610831203130610180867208316031363
:100070000614831203138B101508840014088A00D9
:0A008000130E8300920E120E090009
:1000A0008C00810183160313C030810508008C0089
:1000B000810183160313C03081050130810483124E
:1000C00003130B110B1D62288C0B61280800900094
:1000D000051008308C00782010180514101C05102D
:1000E000900C78208C0B6C28051478207820080060
:1000F0000C308D007E2801308D007E288D0B7E28EF
:06010000080091013B28FC
:1001600083160313810106140516831203138316E5
:1001700003130510061401138312031305148B10C7
:100180000B168B170530572027308E0000308A0061
:100190000E08273CD32067208E0BC628FF30502046
:1001A00007305E20C4288207503449344334203459
:1001B0003134363446343834343420344B346534B6
:1001C000793462346F3461347234643420344434AA
:1001D000653463346F34643465347234203463348A
:1001E0006F346E346E34653463347434653464341F
:0601F0000D340A340A344C
:02400E00F13F80
:00000001FF
http://www.trash.net/~luethi/microchip/projects/keyboard/scan_deb/scan_deb.hex12/02/2008 19:46:36
1 2 3 4
VDD
PIC 16C74A PS/2 Connector R2_1

VDD 10k
D XT1_1 D
R1_1 J1_1 R3_1
10k
10k C1_1 4.000 MHz C2_1 1 KBD_Data
10p 10p 2
SW1_1 VDD 3 VSS
4 VDD
SW-PB VSS VSS 5 KBD_Clk
11
32
6
C3_1 MAX232
U1_1 CON6
RS232.sch
13 14
VDD
VDD
VSS 4n7 OSC1/CLKIN OSC2/CLKOUT
1 15
MCLR/VPP RC0/T1OSO/T1CKI
2 16 PIC TXD
RA0 RC1/T1OSI/CCP2
3 17 PIC RXD
C RA1 RC2/CCP1 C
PAD_OUT 4 18
RA2 RC3/SCK/SCL
5 23 VDD VDD
RA3 RC4/SDI/SDA Dot Matrix LCD Display
6 24 VSS VSS
KBD_Data RA4/T0CKI RC5/SDO LCD.sch
7 25
RA5/SS RC6/TX/CK
33 26
KBD_Clk RB0/INT RC7/RX/DT LCD RS
34 19 LCD RS
RB1 RD0/PSP0 LCD R/W
35 20 LCD D4 LCD R/W
RB2 RD1/PSP1 LCD E
36 21 LCD D5 LCD E
RB3 RD2/PSP2
37 22 LCD D6
RB4 RD3/PSP3 LCD D4
38 27 LCD D7 LCD D4
RB5 RD4/PSP4 LCD D5
39 28 LCD E LCD D5
RB6 RD5/PSP5 LCD D6
40 29 LCD R/W LCD D6
PAD_IRQ RB7 RD6/PSP6 VDD LCD D7
8 30 LCD RS LCD D7
RE0/RD//AN5 RD7/PSP7
VSS
VSS
B 9 10 VDD B
U2_1 C5_1 RE1/WR/AN6 RE2/CS/AN7
C4_1 VDD VDD
PIC16C74-04/JW(40) VSS VSS
100n
VSS
12
31
220n
VSS
PIEZO-BUZZER
VSS Dot Matrix LCD Display
VSS
Digital Power Supply Numeric Foil Keypad (HD44780 compatible)
PowerSupply.sch Keypad.sch
VDD VDD VDD VDD PAD_OUT PAD_OUT Title

VSS VSS VSS VSS PAD_IRQ PAD_IRQ AT Keyboard Box with PIC16C74A
A A
Written by Date
7-Oct-2003
Peter Luethi
Revision Page
1 2 3 4
1 2 3 4
CON1_2
D VDD LCD_CON14 D
R1_2
10k
Contrast
VDD
R/W
VSS
D0
D1
D2
D3
D4
D5
D6
D7
RS
E
1
10
11
12
13
14
1
2
3
4
5
6
7
8
9
POT1_2
VSS
C 2 C
10k R2_2
10k R3_2
10k R4_2
10k R5_2
Contrast VDD
Contrast
5k
LCD D7
3
LCD RS LCD D6
LCD R/W LCD D5

VSS
LCD E LCD D4
VDD
B B
VDD VDD
VSS VSS Title

LCD Display
A A
Written by Date
7-Oct-2003
Peter Luethi
Revision Page
1 2 3 4
1 2 3 4
VDD
CON1_3 VDD VDD VDD
D D
Key5
Key3 13
Key3
Key6 12
Key9 11 R4_3
R3_3
Key# 10 10k
16k
R1_3 R2_3 Key2 9
8
1k 1k Key5 8 PAD_IRQ
U1_3A
Key8 7
Vref 2 C1_3
Key0 6
Key6 Key8 1 int 5n
Key1 5
Vkeypad3
Key4 4 R9_3
Key7 3 1k VSS
R5_3 R7_3 Key* 2 TLC393
4
1k 1k 1
C The comparator serves for interrupt C
CON13 pulse generation: Whenever a key
Key9 Key0 is hit, the comparator input
VSS VSS difference is positive and a 5 V
interrupt pulse is generated at the
R6_3 R8_3 output (PAD_INT).
Vsin
1k 1k According to Microchip, minimum
charging time for A/D converter
Key7 input (Rs = 10 k, Cin = 51 pF) is 12
Key# Key1 us.
VDD
R10_3 R12_3 R14_3 PAD_OUT
8
V1_3 1k 1k 1k
B B
VSIN U1_3B C2_3
DC Magnitude * 6 5n
Key2 Key4 Key* VDD
AC Magnitude * 7
AC Phase * R16_3 5 VSS
100k VSS
VSS Offset 2.35
R11_3 R13_3 R15_3 VDD VDD
Amplitude 2.35 TLC393
Frequency 1000 1k 1k 5k V2_3
4
Delay * +5V
Damping Factor *
VSS VSS
Phase Delay * VSS
* Title
* VSS VSS
* Numeric Foil-Keypad Decoding Circuitry
A * A
Written by Date
* 7-Oct-2003
* Peter Luethi
* Revision Page
*
1 2 3 4
1 2 3 4
D D
PIC16C74A RS232
(Direction seen from controller) (Direction seen from host)
RS232 DTR
RS232 TXD VSS
PIC TXD 5V TXD
PIC RXD 5V RXD
JP1_4 RS232 RXD
RS232 DSR
1
JMP 5V DSR
VSS JP2_4 5V DTR
VDD
C C
1
6
2
7
3
8
4
9
5
1
JMP VSS
1
JP3_4
C1_4 C2_4 JMP
10u 10u
CON1_4
DB9
16
2
6
U1_4
13 12
V+
VCC
V-
RS232 TXD R1 IN R1 OUT 5V RXD
RS232 8 9 5V
RS232 DTR R2 IN R2 OUT 5V DTR
11 14
5V TXD T1 IN T1 OUT RS232 RXD
B 5V 10 7 RS232 B
5V DSR T2 IN T2 OUT RS232 DSR
1 4
GND
C1+ C2+
3 5
C1 - C2 -
C3_4 MAX232CPE(16) C4_4
10u 15 10u
VDD
VDD
VSS
C5_4
100n
VSS Title
VSS RS232 Interface using MAX232
A A
Written by Date
7-Oct-2003
Peter Luethi
Revision Page
1 2 3 4
1 2 3 4
D D
SW1_5
SWITCH
VDD
1
2
3
J1_5 U1_5 VDD
7805
VIN1 VIN2 1 3
GND
VVIN VOUT
V
IN OUT
PHONEJACK STEREO C1_5 GND C2_5 C3_5
VSS 100u 10u 100n
2
C C
VSS
5 Volt digital power supply for VSS
digital logic: PIC16C74A,
MAX232, AT Keyboard.
VDD
R1_5
332
B B
D1_5
LED
VSS
Title
Power Supply
A A
Written by Date
7-Oct-2003
Peter Luethi
Revision Page
1 2 3 4
0.000ms 1.000ms 2.000ms 3.000ms 4.000ms 5.000ms
vref 294.15mV
293.90mV
vkeypad 2.000 V
0.000 V
vsin 5.000 V
0.000 V
vkeypad-vref 1.500
-0.500
int 5.000 V
-3.000 V
http://www.trash.net/~luethi/microchip/projects/adc_test/nsc12130.hex
:020000040000FA
:02000000762860
:0800080076288C0081018316AB
:100010000313C030810508008C008101831603138F
:10002000C030810501308104831203130B110B1DB5
:1000300017288C0B162808008E00E13086050E0D5F
:100040001E39860408009214262892108F003A2048
:10005000921C86170F080F0E1C2036200F081C203C
:100060003620E13086058613061308008616000048
:100070008612080086131214831603131E3086049A
:100080008312031306178616061E1210861200002E
:10009000362012184328061383160313E130860511
:1000A00083120313080017141508980008309300F2
:1000B0003030981B31302520980D930B5828171C91
:1000C0000800171016085528990008309400991F49
:1000D0000511991B0515990D0000851500001910D3
:1000E000051A19148511940B672808008316031349
:1000F0000130860583120313861206138613E1303E
:10010000860504300C2003301C20362001300C20E2
:1001100008301C20362001300C2002301C203620F4
:1001200001300C20283023200C30232028302320BD
:100130000130232083160313F0308500831203134C
:10014000033085004E3025205330252043302520B4
:1001500020302520413025204430252043302520E3
:1001600031302520323025203130252033302520F4
:1001700030302520203025204330252049302520CF
:100180004E302520C03023205430252065302520D6
:1001900073302520743025202D302520493025202E
:1001A0006E302520743025206530252072302520C2
:1001B00066302520613025206330252065302520DC
:1001C0001030052007301320FC30850530306420C6
:1001D000033085040130232053302520743025203E
:1001E000613025207430252075302520733025207E
:1001F000FC30850534306420190895008515000011
:100200009601051A9617851103308504873023203F
:1002100053201930052007301320FC308505F830B5
:1002200064200330850401300C20FC30850520302B
:1002300064200330850403300C20FC308505243015
:1002400064200330850401300C20FC3085053030FB
:1002500064200330850401300C20FC308505843097
:10026000642019089500851500009601051A961757
:1002700085110330850487302320532001300C2062
http://www.trash.net/~luethi/microchip/projects/adc_test/nsc12130.hex (1 of 2)12/02/2008 19:48:55

http://www.trash.net/~luethi/microchip/projects/adc_test/nsc12130.hex
:10028000FC30850584306420190895008514003001
:1002900064201908960003308504C03023205320C1
:0202A0003E29F5
:02400E00F13F80
:00000001FF
http://www.trash.net/~luethi/microchip/projects/adc_test/nsc12130.hex (2 of 2)12/02/2008 19:48:55

1 2 3 4
Separate every data connection with an extra ground connection.

The additional resistor of 221 Ohm in the AD_CLK clock line helps
to minimize supply voltage noise and applies an optimized waveform
VDD without any overshoots at the A/D converter clock input.
D D
R1_1 PIC 16F84 DIN
16k
AD_CLK
SW1_1 VDD
VA_1 VDD
XT1_1 R2_1
SW-PB 4.000 MHz 221
14
C1_1
16
9
IC_PIC1_1
16 15 IC_AD1_1
VDD
4 7 D4 15 5
AV+
DV+
MCLR RB1 CCLK EOC
/CS 17 8 D5 SCKL 14 4
RA0 RB2 SCLK DOR
/CONV 18 9 D6 DOUT 13 12
C RA1 RB3 D IN D OUT C
DOUT 1 10 D7 /CONV 10
RA2 RB4 CONV
SCKL 2 11 E /CS 11
RA3 RB5 CS
DIN 3 12 R/W 1
RA4/T0CKI VSS RB6 CH0
6 13 RS 2
RB0/INT RB7 CH0 CH1
3 A_GND VREF-
CH1 COM
DGND
PIC16F84-04/P(18) 6
V REF-
7
5
V REF+
ADC12130CIN(16) CB1_1
CIRCUIT BREAKER
8
VSS
VREF- VREF+
1
VREF+ VREF+
D4
C2_1 C4_1 LCD D4
B D5 VSS VSS B
LCD D5
1u 100n D6 (HD44780 compatible)
VREF- VREF- LCD D6
D7 VDD VDD
LCD D7 XT2_1
VDD VDD E XTAL-OSCILLATOR C5_1 C6_1
LCD E C7_1
10u 100n
R/W 10n
C3_1 LCD R/W
VSS VSS
100n RS
VDD
CLK
LCD RS
VSS
VSS VSS
VA_1 VA_1 Title

VDD
C8_1 C9_1 C10_1 AD_CLK NSC ADC12130 Interface to PIC16F84
10u 100n C11_1
A 10n A
100n Written by Date
A_GND A_GND 16-Aug-2003
VSS Peter Luethi
Revision Page
1 2 3 4
http://www.trash.net/~luethi/microchip/projects/dcf77_test/dcf_test.asm
;***************************************************************************
;
; Test routine for DCF77 bit stream decoding V1.01
; ================================================
;
; written by Peter Luethi, 18.01.2003, Germany
;
; V1.01: Updated to comply with latest m_rsxxx.asm modules
; (27.04.2004)
;
;
;
;
;
; SPECIFICATIONS:
; ===============
; Acquisition Methodology: Preemptive, interrupt-based
; DCF77 PWM data decoding
; Required Hardware: PWM based DCF77 decoder,
; RS232 level shifter (MAX232)
; Required Software: DCF77_Visualizer.xls (Excel)
; or equivalent RS232 terminal
;
;
; DESCRIPTION:
; ============
; The DCF77 bit stream decoder delivers PWM data specified to be
http://www.trash.net/~luethi/microchip/projects/dcf77_test/dcf_test.asm (1 of 7)12/02/2008 19:50:06

; logical 0 (100 ms low) or logical 1 (200 ms low).

; Default state of the DCF77 PWM line is high.
; This program performs software based PWM decoding, which is done
; using a busy wait routine and a busy flag.
; DCF77 PWM data is applied on portB,7 and recognized with portB
; change interrupts. A falling edge starts the busy wait routine,
; running for exactly 150 ms, with busy flag set. On exit, the
; busy flag is cleared.
; The subsequent DCF77 rising edge will either occur around 100 ms
; or 200 ms after the beginning of the busy wait routine - and can
; then be decoded to logic 0 or 1, according to the current busy
; flag state.
; The controller transmits RS232 data every DCF77 rising edge,
; i.e. every completed bit. With clean DCF77 reception, there
; will be an RS232 transmission every second.
; On the 59th bit ('minute mark'), there is no DCF77 bit, and
; the software will preceed 0x2 to the transmission of the first
; bit (bit 0) of the next 59 bit DCF77 stream.
;
;
; IMPLEMENTED FEATURES:
; =====================
; - DCF77 PWM data decoding, 'minute mark' capture
; - Uni-directional RS232 data transmission
; (used portA,4 for RS232 TX -> needs 6k pull-up resistor!)
;
; LIMITATIONS:
; ============
; - Only RS232 transmission, no reception.
; - No DCF77 parity bit decoding and error handling.
; - No error handling on bad DCF77 reception.
; (data consistency check)
;
;
;***************************************************************************


PROCESSOR 16F84


goto MAIN

#define DCF_IN PORTB,7 ; chip select, active low

; portA,4 needs 6k pull-up resistor (open-collector)!
#define TXport PORTA,4 ; RS232 output port, could be
#define TXtris TRISA,4 ; any active push/pull port

; No RS232 input used in this project.
CONSTANT BASE = 0x0C ; Base address of user file registers 16F84

TEMP1 set BASE+d'0'
TEMP2 set BASE+d'1'
TEMP3 set BASE+d'2'
; general
FLAGreg equ BASE+d'4' ; register containing various flags
#define DCFprev FLAGreg,0x00 ; previous state of DCF_IN
#define BUSYflag FLAGreg,0x01 ; flag for DCF busy wait
#define XMITflag FLAGreg,0x02 ; flag for RS232 transmission
CNT equ BASE+d'5' ; DCF77 bit counter, cleared every minute

DAT equ BASE+d'6' ; DCF data bit (0/1)

LO equ BASE+d'7' ; for 24 bit counter
MED equ BASE+d'8' ; for 24 bit counter
HI equ BASE+d'9' ; for 24 bit counter
; RS232

ISR_TMP3 equ BASE+d'15' ; temporary register for ISR
#include "..\m_rs192.asm"
;***** MACROS *****
XMIT bcf XMITflag ; clear transmit flag (for ISR)

decf HI,f ; decrement HI
skpnz ; skip if not zero
goto _xmit1
movlw 0x02 ; 'start signal', send 0x2
SENDw ; HI was > 1, send start signal
clrf CNT ; reset counter every full minute
_xmit1 clrf LO ; clear 24 bit counter registers
clrf MED
clrf HI
movfw DAT ; get DCF data
SENDw ; transmit content of DAT register
RETURN

ISR ;************************
;************************

goto ISR
;**************************
;**************************

btfss INTCON,RBIF ; check RBIF interrupt flag
goto ISRend ; unexpected interrupt
;goto _ISR_DCF ; on portB change, goto DCF decoding
;**********************
;*** DCF77 DECODING ***
;**********************
_ISR_DCF
btfsc DCF_IN ; check DCF input, skip if cleared
goto _DCF_rise ; DCF_IN = 1
;goto _DCF_fall ; DCF_IN = 0
_DCF_fall ;*** falling edge on DCF input ***

; check previous DCF state
btfss DCFprev
goto _DCF_end ; previous state has been 0, exit
; proceed
bcf DCFprev ; set DCFprev to 0
bsf BUSYflag ; request another wait loop (in main)

incf CNT,f ; increment bit counter every second

goto _DCF_end ; terminate DCF ISR
_DCF_rise ;*** rising edge on DCF input ***

; check previous DCF state
btfsc DCFprev
goto _DCF_end ; previous state has been 1, exit
; proceed: decide whether it has been a logical 0 (100 ms low)
; or logical 1 (200 ms low)
bsf DCFprev ; set DCFprev to 1
bsf XMITflag ; request RS232 transmission (in main)
clrf DAT ; reset DCF data register
btfss BUSYflag ; check, if DCF busy wait flag still on
incf DAT,f ; if no longer active, logic 1 (> 150 ms)
bcf BUSYflag ; reset DCF busy flag
_ISR_RS232error ; just a dummy label for m_rs096.asm
_DCF_end bcf INTCON,RBIF ; clear RBIF interrupt flag
;*****************************************
;*****************************************

;************** MAIN **************
MAIN BANK1
clrf OPTION_REG ; enable portB pull-ups
; RS232 reception not used
;bsf RXtris ; set input with weak pull-up
;bcf OPTION_REG,INTEDG ; RS232 interrupt on falling edge

BANK0
clrf CNT ; initialize bit counter
clrf DAT ; initialize DCF data register
clrf LO ; clear 24 bit counter registers
clrf MED
clrf HI
clrf INTCON ; disable all interrupt sources, clear flags
bsf INTCON,RBIE ; enable portB change interrupt
bsf INTCON,GIE ; global interrupt enable
goto m_loop ; start within main loop
busy_loop ; *** inner loop ***

; this loop is executed whenever a falling DCF_IN edge has been
; sampled in the interrupt service routine
WAITX d'73', d'2' ; busy wait (150 ms)
bcf BUSYflag ; clear busy flag (for ISR)
m_loop ; *** main loop ***

; 24 bit counter
movlw 0x01
addwf LO,f ; increment LO => affects carry bit
skpc ; skip on carry
goto _next ; if no carry, exit
addwf MED,f ; if carry, increment MED
addcf HI,f ; add MED's carry to HI (every 840 ms)
_next
btfsc BUSYflag ; check for new loop request by ISR
goto busy_loop ; start inner loop
btfsc XMITflag ; check for new TX request by ISR
call XMIT ; call RS232 TX routine
goto m_loop ; return to main loop
END

http://www.trash.net/~luethi/microchip/projects/alti/CDP-TX02.pdf
Embedded Secure Document

The file http://www.trash.net/~luethi/microchip/projects/alti/CDP-TX02.pdf is a secure document that
has been embedded in this document. Double click the pushpin to view.
http://www.trash.net/~luethi/microchip/projects/alti/CDP-TX02.pdf12/02/2008 20:00:44
Circuit Design Inc. Embedded industrial radio modem Low power module 434 MHz 869 MHz 863 MHz
TX/RX | Transceiver | Audio | Modem | Accessories | Selection | Compliance | Tech Ref.
Full product list
Transmitter/Receiver Transceiver Accessories

CDP-TX-02F-R STD-302N ANT-LEA-01 / 02-R
CDP-RX-02F-R STD-302N-R ANT-RIG-01 / 02-R
CDP-TX-02FP-R ANT-01-R
CDP-RX-02FP-R Audio module ANT-400-R
WA-TX-03-R
CDP-TX-02E-R WA-RX-03-R CBL-TMP-01/05/10-R
CDP-RX-02E-R WA-TX-01-R CBL-BNC-01-R
CDP-TX-02EP-R WA-RX-01A-R CBL-SMA-05/10-R
CDP-RX-02EP-R
Radio modem AC-400-R
CDP-TX-04S-R
MU-1-R CCR-UTR-01
CDP-RX-03BS-R
MU1-LIK WA-DC-01 Discontinued
CDP-RX-03AS-R
MU1-UIK
MU1-RIK
CDT-TX-01
CDT-RX-01A
CCR-STD-302


Phone:++81-263-82-1024 FAX:++81-263-82-1016 E-mail:
http://www.cdt21.com/products/ (1 of 2)12/02/2008 20:01:03

Circuit Design Inc. Embedded industrial radio modem Low power module 434 MHz 869 MHz 863 MHz
http://www.cdt21.com/products/ (2 of 2)12/02/2008 20:01:03

UHF Narrow Band Single Channel Transmitter/Recever
CDP-TX-01 / CDP-RX-01S
The crystal-controlled single frequency radio data module CDP-TX-01 (transmitter) and CDP-RX-01S (receiver)
are suitable for various application fields, such as wireless data communication, remote control, telemetry or
wireless security systems.
The small size and low power consumption of the CDP-01 make it ideal for mobile applications where its interference
resistance and effective range are far superior to that of similar RF modules based on wide band SAW-resonator
frequency generators.
Feature
European I-ETS 300 220 compliance
Very small compact integrated device with
robust metal housing
Low current consumption
FM narrow band modulation and
high frequency stability
High sensitivity 300m range
Application
Remote control systems
Security systems
Alarms
Telemetry systems
Common Item
Communication form
Specification
One way
Oscillation system Crystal
Frequency range 433.920MHz, 434.075MHz
Number of RF channels Single (fixed)
Frequency stability +/-2.5kHz (-10 to +55 degree C)
Baud rate 300 to 4800bps
Operating temp. range -10 - +60 degrees C
CDP-TX-01 Transmitter type Fixed channel

RF output power 10mW +0,-3dB at 50ohm
(Transmitter) Transmitter start up time 10msec
Modulation FM Narrow
Data input level 5V
Input signal Digital
Deviation 2.5kHz
Spurious emission <-60dBm (<1GHz)
Adjacent channel power <200nW
Supply voltage 5.5 - 10V
Supply current 18mA (typ.)
Dimensions 36 X 26 X 10 mm
Weight 9.8g
CDP-RX-01S Receiver type Double Superheterodyne fixed channel

Sensitivity -120dBm (12dB/SINAD at CCITT filter)
(Receiver) Selectivity +/-5kHz at -6dB point
Demodulation FM Narrow
Distortion < 5% at 1kHz
S/N ratio 50dB overall (AF out)
Data output Digital
Supply Voltage 4.5 to 14V DC
Supply current 10mA (typ)
Dimensions 50 X 30 X 7.5mm
Weight 19g
Specifications are subject to change without prior notice
CIRCUIT DESIGN, INC. International Business Division
Im Gree 79, CH-8566 Ellighausen, Fon +41(71)698 6480, Fax +41(71)698 6481, e-mail: info@awirelessworld.ch, www.wirelessworldag.com
Electronics / RC Modeling
Piper Cherokee
Wingspan: 1.60 m
Engine: Super Tigre .91
Control: Engine, Elevator, Ailerons, Rudder
Description: This model is currently under construction.
It's going to be an evaluation platform for my electronic applications to be
checked. I intend to put my digital altimeter on it.
http://www.trash.net/~luethi/radiocontrol/modeling/cherokee/cherokee.html (1 of 3)12/02/2008 20:02:41

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1 2 3 4
Fourth Order Non-inverting Sallen-Key (SK)

Butterworth Lowpass Filter Stage
D D
fc = 10 Hz
C1_3
C5_3
33n
C3_3
470n
A_GND A_GND
150n
11
11
C U1_3A U1_3B C
IN R1_3 A R2_3 3 R3_3 R4_3 5
IN0
95k 95k 1 B 87k 87k 7 OUT
CH0
2 6
V1_3
For Simulation C2_3 LM324N(14) C4_3 LM324N(14)
VPULSE
4
4
DC Magnitude 2.5 150n 68n

AC Magnitude 1
AC Phase 0
A_GND
Initial Value .3 A_GND VA_2 A_GND VA_2
Pulsed Value 4.7
Time Delay 0
Rise Time 1u
Fall Time 1u
B Pulse Width .5 B
Period 1 After having carried out only slight alterations on the
Phase Delay * filter characteristics and its components (changed
* from Chebyshev to Butterworth filter characteristics),
* The op-amp LMC660 is specified as single supply,
the initially used LMC660 quad op-amp started
* rail-to-rail quad op-amp up to 15 Volt VCC.
oscillating. So I had to replace the LMC660 with a
* But there shows up a very bad non-linear
* LM324 quad op-amp. Conclusion: 'Analog circuitry
characteristic: If the input voltage is in the range .85
* that has not been tested explicitely does not work.'
VCC - 1.0 VCC, the output quickly jumps to 1.0 VCC.
This behavior destroys the whole filter characteristic in
VA_2 VA_2
the upper voltage range.
V2_3 Therefore, to cope with this problem, either the supply
C6_3 voltage has to be increased or it has to be assured Title
+6.8V For Simulation
100n that the input signals never reach the critical level. In 4th Order Butterworth Filter Stage
this case, the supply voltage level has been lifted.
A A_GND A_GND A
Written by Date
23-Apr-2001
Peter Luethi
Revision Page
1 2 3 4
1 2 3 4
Fourth Order Non-inverting Sallen-Key (SK)

Butterworth Lowpass Filter Stage
D D
fc = 10 Hz
C1_4
C5_4
33n
C3_4
470n
A_GND A_GND
150n
11
11
C U1_3C U1_3D C
IN R1_4 A R2_4 10 R3_4 R4_4 12
IN1
95k 95k 8 B 87k 87k 14 OUT
CH1
9 13
C2_4 LM324N(14) C4_4 LM324N(14)
4
4
150n 68n
A_GND VA_2 A_GND VA_2
B B
After having carried out only slight alterations on the
filter characteristics and its components (changed
from Chebyshev to Butterworth filter characteristics),
The op-amp LMC660 is specified as single supply,
the initially used LMC660 quad op-amp started
rail-to-rail quad op-amp up to 15 Volt VCC.
oscillating. So I had to replace the LMC660 with a
But there shows up a very bad non-linear
LM324 quad op-amp. Conclusion: 'Analog circuitry
characteristic: If the input voltage is in the range .85
that has not been tested explicitely does not work.'
VCC - 1.0 VCC, the output quickly jumps to 1.0 VCC.
This behavior destroys the whole filter characteristic in
the upper voltage range.
Therefore, to cope with this problem, either the supply
voltage has to be increased or it has to be assured Title
VA_2 VA_2
that the input signals never reach the critical level. In 4th Order Butterworth Filter Stage
this case, the supply voltage level has been lifted.
A A_GND A_GND A
Written by Date
23-Apr-2001
Peter Luethi
Revision Page
1 2 3 4
1 2 3 4
Separate every data connection with an extra ground connection.

The additional resistor of 221 Ohm in the AD_CLK clock line helps to
minimize supply voltage noise and applies an optimized waveform
VDD without any overshoots at the A/D converter clock input.
D XT1_5 D
R1_5
DIN
10k C1_5 4.000 MHz C7_5
AD_CLK
10p 10p
SW1_5 VDD
VA_1 VDD
SW-PB VSS VSS R2_5
221
14
C2_5 PIC TXD
9
U1_5 16
16 15 U2_5
VSS 1n OSC1/CLKIN OSC2/CLKOUT
4 7 RB1 D4 15 5
MCLR RB1 CCLK EOC
VDD
/CS 17 8 RB2 D5 SCKL 14 4
AV+
DV+
RA0 RB2 SCLK DOR

/CONV 18 9 RB3 D6 DOUT 13 12
C RA1 RB3 D IN D OUT C
DOUT 1 10 RB4 D7 /CONV 10
RA2 RB4 CONV
SCKL 2 11 RB5 E /CS 11
RA3 RB5 CS
DIN 3 12 RB6 R/W 1
RA4/T0CKI RB6 CH0
RB0 6 13 RB7 RS 2
VSS
RB0/INT RB7 CH0 CH1
3
CH1 COM
PIC16F84-04/P(18) 6
V REF-
5
7
DGND
PIC RXD V REF+

C9_5 ADC12130CIN(16)
8
VDD VSS VSS

10n
VREF- VREF+
VREF+ VREF+ D4 (HD44780 compatible)
B RB0 LCD D4 VSS B
1
VREF- VREF- RB1 D5
VSS
2 LCD D5
VDD
RB2
3 D6
RB3 LCD D6 VDD VDD
4 XT2_5
VDD VDD RB4 D7
5 LCD D7 XTAL-OSCILLATOR C10_5 C11_5
RB5 C12_5
6 E 10u 100n
C3_5 RB6 LCD E 10n
7
100n RB7 R/W VSS VSS
8 LCD R/W
CON3X8_PWR
VSS VSS
RS
VDD
VSS
CLK
CON1_5 LCD RS
VA_1 VA_1 Title

VDD
C4_5 C5_5 Data Acquisition and Processing
C6_5 AD_CLK
10u 100n C8_5
A 10n A
100n Written by Date
A_GND A_GND 23-Apr-2001
VSS Peter Luethi
Revision Page
1 2 3 4
1 2 3 4
LCD1_6
D VDD LCD CONNECTOR D
R1_6
10k
VSS
VDD
Contrast
RS
R/W
E
D0
D1
D2
D3
D4
D5
D6
D7
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
POT1_6
VSS
C 2 C
Contrast VDD
Contrast
10k R2_6
10k R3_6
10k R4_6
10k R5_6
5k
LCD D7
3
LCD RS LCD D6
LCD R/W VDD LCD D5

VSS
LCD E LCD D4
B B
The LCD display (or here its connector)

serves for future enhancements or helps to
make debugging easier in case some
problems occur. The entire microcontroller
application is designed to work with a
VDD VDD
wireless transmitter and does not require an
LCD on the transmitting part of the
VSS VSS Title
application.
A A
Written by Date
23-Apr-2001
Peter Luethi
Revision Page
1 2 3 4
1 2 3 4
D D
PIC16F84 RS232
(Direction seen from controller) (Direction seen from host)
RS232 DTR
RS232 TXD VSS
PIC TXD 5V TXD
PIC RXD 5V RXD
JP1_7 RS232 RXD
RS232 DSR
1
JMP 5V DSR
VSS JP2_7 5V DTR
VDD
1
6
2
7
3
8
4
9
5
C 1 C
JMP VSS
1
JP3_7
C2_7 C4_7 JMP
10u 10u
CON1_7
DB9
2
6
16
U1_7
13 12
RS232 TXD R1 IN R1 OUT 5V RXD
V-
V+
RS232 8 9 5V
VCC
RS232 DTR R2 IN R2 OUT 5V DTR
11 14
5V TXD T1 IN T1 OUT RS232 RXD
B 5V 10 7 RS232 B
5V DSR T2 IN T2 OUT RS232 DSR
1 4
C1+ C2+
3 5
GND
C1 - C2 -
C3_7 MAX232CPE(16) C5_7
10u 15 10u
VDD_RS
VDD
VSS
C1_7
100n
VSS Title
VSS RS232 Interface using MAX232
A A
Written by Date
23-Apr-2001
Peter Luethi
Revision Page
1 2 3 4
1 2 3 4
5 Volt analog power supply 6.68 Volt analog

for pressure sensor and power supply for
D D
A/D converter (analog operational amplifier of
supply input) active filter stages.
U1_8 VA_1 U3_8

78L05 78L05
1 V 3 1 V 3
VBAT VVIN VOUT
OUT VA_1 VBAT VVIN VOUT
OUT VA_2
IN IN
GND
GND
GND GND
C1_8
2
2
VDD
10u
The positive and negative reference voltages for
A_GND D2_8 the NSC ADC12130 adjust the input range of
C R1_8 1N4001 the AD converter according to the signals being C
C6_8 C7_8
332 converted. So the maximum resolution is
A_GND
achieved for the input signals.
D3_8 10u 100n In our case, the minimum voltage is the analog
1N4001 ground potential and the maximum voltage is the
maximum output level of the pressure sensor, 5
D1_8 D4_8 V, therefore we connect the positive reference
5 Volt digital power supply for
LED 1N4001 input to VA_1.
digital logic (PIC16F84,
MAX232,...) and A/D
converter (digital supply input).
VA_1
VDD
VSS A_GND
VREF+
B B
C8_8 C9_8
U2_8 VDD
VBAT
78L05
1u 100n
1 V 3
VBAT VVIN VOUT
OUT
IN VBAT 8 - 10 Volt VREF-
GND
GND C2_8 C3_8 Do not exceed 10 Volt
because of the
A_GND
2
10u 100n wireless transmitter !
+
BAT1_8 C4_8 C5_8
BATTERY
100u 100n
I
VSS Title
VSS
CB1_8
1 Power Supplies & Reference Voltage
A CBrk A_GND A
Written by Date
23-Apr-2001
Peter Luethi
A_GND A_GND Revision Page
1 2 3 4
http://www.trash.net/~luethi/microchip/projects/alti/alti_tx.hex
:02000000F728DF
:0800080069288C0081018316B8
:10001000C030810508008C0081018316C030810545
:100020000130810483120B110B1D14288C0B132833
:1000300008009A00861008308C002A201A188614AE
:100040001A1C86109A0C2A208C0B1E2886142A2033
:100050002A2008001D308D0030280B308D003028FC
:100060008D0B302808002D200618452808308C00FC
:100070002A2006189B17061C9B130C0B9B0C8C0B41
:1000800038282A20061C9B0108009B01EE289500B9
:1000900008309400951F0511951B0515950D00005E
:1000A000851500001510051A15148511940B4A28A2
:1000B00008001908840017088000840A18088000C6
:1000C000840A04089900283C031D08002030990088
:1000D00008008B138B1B69289C00030E9D00830175
:1000E0000A089E008A01831304089F000D3019201E
:1000F0000A3019200A3019205030192052301920A6
:100100004530192043301920493019205330192027
:10011000493019204F3019204E3019202030192035
:10012000443019204930192047301920493019200E
:1001300054301920413019204C301920203019201A
:10014000413019204C3019205430192049301920E1
:100150004D301920453019205430192045301920D0
:10016000523019200D3019200A3019203130192051
:100170003930192039301920393019202D30192003
:100180003230192030301920303019203130192008
:1001900020301920623019207930192020301920A0
:1001A000503019206530192074301920653019201D
:1001B00072301920203019204C3019207530192048
:1001C00065301920743019206830192069301920E1
:1001D0000D3019200A3019200A3019201F08840018
:1001E0001E088A001D0E83009C0E1C0E090083163B
:1001F0008610061401138312861490308B04831624
:10020000F03085008312033085006620FC308505C0
:10021000343047200330850401300B20FC30850545
:10022000F83047200330850401300B20FC30850571
:10023000203047200330850403300B20FC30850537
:10024000243047200330850401300B20FC30850525
:100250008430472085140030472003308504103057
:1002600096009701980101300B20FC308505843001
:10027000472015088E0085140030472015088F0090
:10028000033085040F0897070318980A0E0898078B
http://www.trash.net/~luethi/microchip/projects/alti/alti_tx.hex (1 of 2)12/02/2008 20:03:21

http://www.trash.net/~luethi/microchip/projects/alti/alti_tx.hex
:10029000960B3329F0309705970E980E18059704A2
:1002A0000F309805592097019801203084000008EC
:1002B00097070318980A840A00089807840A040814
:1002C000283C031D5729970C970C1713181817175C
:1002D000971398189717980C980C181398131708D9
:1002E000910018089000FC308505C4304720851423
:1002F00000304720033085041030960097019801A4
:1003000001300B20FC308505C430472015088E00D5
:1003100085140030472015088F00033085040F082E
:1003200097070318980A0E089807960B8029F03053
:100330009705970E980E180597040F309805170823
:1003400093001808920054301920553019201008D5
:1003500019201108192012081920130819202F300C
:0803600019203F301920262965
:02400E00F13F80
:00000001FF
http://www.trash.net/~luethi/microchip/projects/alti/alti_tx.hex (2 of 2)12/02/2008 20:03:21

http://www.trash.net/~luethi/microchip/projects/alti/alti_tx.asm
;***************************************************************************
;
; Precision Digital Altimeter Transmitter with NSC ADC12130
; =========================================================
;
;
; V1.02: Re-structured entire ISR and RS232 echo sub-routines
; to comply with latest LCD modules.
; (18.04.2004)
;
; V1.01: Some refinements (23.04.2001)
;
;
;
;
;
; SPECIFICATIONS:
; ===============
; Required Hardware: NSC A/D Converter ADC12130
; Motorola MPXS4100 A
; Quad Op-Amp LM324
; - for remote use: Wireless Transmitter 9600 bps
; - for use with PC: RS232 level shifter (MAX232)
; Serial Output: 9600 baud, 8 Bit, No Parity, 1 Stopbit
;
;
; DESCRIPTION:
; ============
http://www.trash.net/~luethi/microchip/projects/alti/alti_tx.asm (1 of 17)12/02/2008 20:03:25

; This program has been designed for the Precision Digital Altimeter
; transmitter based on the PIC 16F84, the NSC ADC12130 12 bit A/D
; converter and the Motorola MPXS4100 A absolute pressure sensor.
; For further processing and visualization of the acquired data,
; there is another PIC with LCD display or a personal computer
; necessary. The serial output data of this transmitter has common
; RS232 format, so you can either use it directly connected to a
; personal computer or in conjunction with a wireless interface.
; If used with a personal computer, make sure there is a RS232
; level shifter (MAX232) between the PIC and the computer.
;
; The whole transmitter consists of 4 sections:
;
;
; 1. Data Acquisition & Analog Pre-Processing:
; ============================================
; The MPXS4100 A absolute pressure sensor is connected to A/D
; input channel 0. Two fourth order Butterworth active low pass
; filters (fc = 10 Hz) are implemented in front of the A/D channels
; 0 and 1 - realized with a quad Op-Amp - to minimize noise and to
; prevent aliasing.
;
; 2. A/D Conversion:
; ==================
; To convert the analog to digital data with adequate resolution,
; the NSC ADC12130 12 bit A/D converter has been used here.
; The communication between the A/D converter and the PIC is done with
; a software based SSP (Synchronous Serial Port) interface.
; Output format: Sign bit, MSB <12 bit data> LSB, X X X
;
; 3. Digital Data Processing:
; ===========================
; After analog filtering and A/D conversion, the data has still some
; noise, what results in slightly toggling values.
; If we want to get rid of that, we have to implement a math routine,
; which calculates the actual value out of the actual sample and the
; previous ones.
; In this program it has been realized with a four stage ring buffer,
; which stores four 16 bit values (12 valid bits). Each of these values
; is the average calculated from 16 previously acquired 12 bit A/D
; samples. The current output value results from the average of this
; ring buffer. So one output value will be calculated every 16 A/D
; samples, with a history of 48 (=64-16) samples. The last acquired

; value has only a weight of a quarter.

; The NSC ADC12130 provides 2 input channels (CH0, CH1). I have used
; the same digital signal processing methods for both of them.
;
; 4. Data Transmission:
; =====================
; The calculated output value is handled over to an RS232 routine.
; It is then transmitted serially to either a MAX232 or a wireless
; transmitter.
; Here, the m_rs096.asm module has been used to provide compatibility
; to wireless transmitters. Most of them support only up to 9600 bps.
; If you want to use this routine with a higher transmission rate (e.g.
; with a PC interface), you can only change the included m_rs098.asm
; to another one.
;
;
; IMPLEMENTATION:
; ===============
; The following features are implemented in the PIC 16F84:
; - Readout of A/D values
; - Digital Data Processing (as described above)
; - RS232 transmission @ 9600 baud
; - (No RS232 reception needed, only implemented to show complete
; RS232 interface for tests or further enhancements.)
;
;
;***************************************************************************
ERRORLEVEL -207 ; found label after column 1.

ERRORLEVEL -302 ; register in operand not in bank 0.
PROCESSOR 16F84



goto MAIN


#define DO PORTA,2 ; PIC serial data output
#define DI PORTA,4 ; PIC serial data input
#define TXport PORTB,1 ; RS232 output port, could be

#define TXtris TRISB,1 ; any active push/pull port

; The RS232 data capture in the ISR has no functional purpose
; in this project, implemented only for test use.





CONSTANT BufferBASE = BASE+d'20' ; start address of ring buffer
CONSTANT BufferLENGTH = d'8' ; number of buffer registers,
; what means four 16 bit buffer
; samples

TEMP1 set BASE+d'0'
TEMP2 set BASE+d'1'
; general
HI equ BASE+d'2' ; high nibble of data
LO equ BASE+d'3' ; low nibble of data
; A/D converter
AD_cnt equ BASE+d'8' ; counter
; various flags
; average routine

sum_cnt equ BASE+d'11' ; counter

sum_LO equ BASE+d'12' ; summation registers
sum_HI equ BASE+d'13'
; ring buffer
RB_pnt equ BASE+d'14' ; pointer, BufferBASE offset
; RS232

; ATTENTION: check beginning of ring buffer (Constant Declaration) !!!
#include "../m_bank.asm"
#include "../m_wait.asm"
#include "../m_rs096.asm"
;***** MACROS *****
ADinit macro
BANK1
movwf TRISA
BANK0
endm ; SCK low
ADenable macro
andwf PORTA,1
endm

ADdisable macro
iorwf PORTA,1
endm

movlw ADcommand
call AD_cmd
endm
RBinit macro
call RB_init
endm
;*** A/D Converter ***

movlw d'8'
movwf AD_cnt
ad_loop
bcf DO
bsf DO

rlf SSPSR,1

btfsc DI
bsf SSPSR,0

bcf SCK ; clock low
decfsz AD_cnt,1
goto ad_loop
RETURN

RB_main movfw RB_pnt ; get saved pointer
movwf FSR ; put to FSR
movfw sum_LO ; get low nibble of sample
movfw sum_HI ; get high nibble of sample
movfw FSR ; load pointer to w
movwf RB_pnt ; save pointer
skpz ; skip on zero
RETURN ; normal exit
RB_init movlw BufferBASE ; else buffer overrun, init pointer
movwf RB_pnt ; set pointer to start location of ringbuffer
RETURN
;*** RS232 service routine for ISR calls ***

RSservice
; send only status back
SEND CR
SEND LF
SEND LF
SEND 'P'
SEND 'R'
SEND 'E'
SEND 'C'
SEND 'I'
SEND 'S'
SEND 'I'
SEND 'O'
SEND 'N'
SEND ' '
SEND 'D'
SEND 'I'
SEND 'G'

SEND 'I'
SEND 'T'
SEND 'A'
SEND 'L'
SEND ''
SEND 'A'
SEND 'L'
SEND 'T'
SEND 'I'
SEND 'M'
SEND 'E'
SEND 'T'
SEND 'E'
SEND 'R'
SEND CR
SEND LF
SEND '1'
SEND '9'
SEND '9'
SEND '9'
SEND '-'
SEND '2'
SEND '0'
SEND '0'
SEND '1'
SEND ''
SEND 'b'
SEND 'y'
SEND ''
SEND 'P'
SEND 'e'
SEND 't'
SEND 'e'
SEND 'r'
SEND ''
SEND 'L'
SEND 'u'
SEND 'e'
SEND 't'
SEND 'h'
SEND 'i'
SEND CR
SEND LF

SEND 'E'
SEND 'c'
SEND 'h'
SEND 'o'
SEND ':'
SEND TAB
movfw RXD ; get RS232 data
SEND CR
SEND LF
SEND LF
RETURN
; only for test use, no functional purpose (yet...)
ISR ;************************
;************************

goto ISR
;**************************
;**************************


; catch-all
;******************************
;******************************
_ISR_RS232
;***********************************
;***********************************
_ISR_RS232error
_ISR_RS232end
;*****************************************
;*****************************************



;************** MAIN **************
MAIN ;**************************************************************
;*** INITIALIZATION ***
;**************************************************************
RS232init
ADinit
RBinit

ADenable
ADcmd Unsigned
ADdisable
WAIT 0x01
;*** Set Acquisition Time to 34 CCLK Cycles ***

ADenable
WAIT 0x01

ADenable
WAIT 0x03

ADenable

WAIT 0x01
;**************************************************************
;*** MAIN LOOP ***
;**************************************************************
LOOP
;**************************************************************
;*** A/D CHANNEL 0 READOUT (get the samples) ***
;**************************************************************

ADcmd DummyCmd
ADdisable

movwf sum_cnt
clrf sum_LO
clrf sum_HI
AV_CH0 ;*** START OF THE AVERAGE BUILDING ROUTINE ***

; wait at least Tacq + Tconv = (34 + 44) Tclk
; = 78 Tclk = 20 us @ 4 MHz
ADenable
movfw SSPSR
ADcmd DummyCmd
movfw SSPSR
ADdisable
; result in HI, LO



goto AV_CH0
;------------------------------------------------

swapf sum_HI,1
;*** END OF AVERAGE, FILL RING BUFFER ***
;**************************************************************
;*** FILL IN RING BUFFER & CALCULATE AVERAGE ***
;**************************************************************
call RB_main ; fill the ring buffer with new values

; stored in sum_LO, sum_HI
;*** BUILD AVERAGE OF RING BUFFER ***

clrf sum_LO
clrf sum_HI
movlw BufferBASE
movwf FSR ; set pointer to the beginning of the ring buffer
F_LOOP movfw INDF ; load (low) value from pointed register
movfw INDF ; load (high) value from pointed register
movfw FSR ; get current pointer

skpz ; skip on zero: buffer overrun, exit

GOTO F_LOOP ; not yet finished; resume
;*****************************************************************
;*** You have to adapt the following division routine by hand, ***
;*** if you alter the amount of buffer registers. ***
;*** Default: divide by 4 (BufferLENGTH = 8 bytes) ***
;*****************************************************************
bcf sum_LO,6 ; clear 2. MSB of sum_LO

btfsc sum_HI,0 ; check LSB of sum_HI
bsf sum_LO,6 ; set 2. MSB of sum_LO if condition is true
bcf sum_LO,7 ; clear MSB of sum_LO
btfsc sum_HI,1 ; check 2. LSB of sum_HI
bsf sum_LO,7 ; set MSB of sum_LO if condition is true

;*** END OF RING BUFFER AVERAGE ***
movfw sum_LO
movwf CH0_LO
movfw sum_HI
movwf CH0_HI
;**************************************************************
;*** A/D CHANNEL 1 READOUT ***
;**************************************************************

ADcmd DummyCmd
ADdisable


movwf sum_cnt
clrf sum_LO
clrf sum_HI
AV_CH1 ; wait at least Tacq + Tconv = (34 + 44) Tclk

; = 78 Tclk = 20 us @ 4 MHz
ADenable
movfw SSPSR
ADcmd DummyCmd
movfw SSPSR
ADdisable
; result in HI, LO

goto AV_CH1
;------------------------------------------------

swapf sum_HI,1
;*** END OF AVERAGE ***

movfw sum_LO
movwf CH1_LO
movfw sum_HI
movwf CH1_HI
;**************************************************************
;*** SEND DATA TO PC, MSB FIRST ***
;**************************************************************
SEND 'T' ;*** FRAMING: start sequence ***

SEND 'U' ; U = b'01010101'
SENDw
movfw CH0_LO
SENDw
SENDw
movfw CH1_LO
SENDw
SEND '/' ;*** FRAMING: stop sequence ***
SEND '?' ; ? = b'00011111'
; check for ISR flag

btfsc RSflag ; check RS232 data reception flag
goto LOOP ; re-entry

END

Datenlogger
Eigenbau-Datenlogger V1.5
Die Bauanleitung eines Datenloggers ist unter folgender Adresse zu finden:
http://www.rconline.net/magazin-2000/daten-logger/daten-logger.shtml
(sorry, an english description is only for the new Logger available -> Logger-V2_english )
Diese Seite hier soll die oben genannte Seite ergnzen (zuerst bitte die oben angegebene Seite lesen).
Also ab und zu mal hier vorbeischauen, denn wenn's was neues ber den Datenlogger gibt, dann ist es hier zu finden.
(letze nderung: 31.12.2007)
Achtung: Im Originalstromlaufplan ist ein Widerstand nicht richtig dimensioniert.
Bitte diesen (47k) durch 150k ersetzen.
http://home.arcor.de/d_meissner/d_logger.htm (1 of 15)12/02/2008 20:05:29

Datenlogger
folgend die Anschlubelegung des Steckers zur seriellen Schnittstelle zum PC:
Hier noch eine etwas vereinfachte Schaltung des Loggers, welche sich auf der gleichen Platine unterbringen lt und mit ein paar Bauelementen weniger auskommt:
(hierfr die Softwareversionen "Dlog_v8i" oder "Dlog_v9x" verwenden)

Datenlogger

Datenlogger
Eine Leiterplatte mit etwas verndertem Layout, dadurch noch etwas kleiner und sogar durchkontaktiert, kann von Jonas Romblad unter folgender Adresse bezogen
werden:
Jonas Romblad
Sensoren:
Folgend ein paar Anregungen zu Sensoren welche man an den, noch freien analogen Eingang des Loggers anschlieen kann:
Dazu kann man z.B. die zweite Hlfte des noch freien Operationsverstrkers nutzen.
Das Layout ist zwar nicht dafr optimal vorbereitet, aber mit ein paar Brcken (lten bzw. durchritzen) bekommt man das schon noch auf der Platine unter.
Bei den Schaltungen habe ich versucht mit je einem Verstrker pro Sensor auszukommen.
Fr einige Sensoren wrde vielleicht eine aufwendigere Schaltung bessere Ergebnisse liefern. Mein Motto dazu lautet aber:
"NICHT SO GENAU WIE MGLICH MESSEN, SONDERN SO GENAU WIE NTIG"
Datenlogger
Spannungssensor:
Wenn jemand die Akkuspannung interessiert, kann er einfach einen Widerstand als "Sensor"
benutzen.
Je nach dem, wie gro die zu messende Spannung ist, kann die Gre des Widerstand entsprechend
angepat werden.
Die angegebene Dimensionierung geht bis etwas ber 40V.
Temperatursensor:
Eine andere, ziemlich einfache Schaltung ist der Temperatursensor.

Der verwendete Heileiter (NTC Typ M87) ist zwar nicht der schnellste, was aber fr die meisten
Anwendungen nicht strt.
Es gibt aber auch Sensoren mit einer Ansprechzeit von < 0,7s.
Wer darauf Wert legt, sollte die Schaltung entsprechend anpassen.
Motor-Speedsensor:

Datenlogger
Eine sehr einfache Mglichkeit die Geschwindigkeit zu messen ist, einen Motor als Genarator zu
betreiben, welcher von einem kleinen Flgelrad angetrieben wird.
Als Motoren eignen sich z.B. Motoren aus defekten Servos.
Falls der Motor nicht bei geringen Geschwindigkeiten anluft kann man mit einem richtig
dimensionierten Widerstand nach Plus etwas nachhelfen.
Differenzdrucksensor (z.B. fr Speed):
Wer die Geschwindigkeit nicht mit dem Minipropeller messen mchte, kann natrlich
ein Staurohr an den Logger anschlieen.
Sicher ist ein Staurohr kleiner als der Minipropeller und auch mechanisch nicht so
anfllig gegen Beschdigungen.
Man mu allerding 2 Schluche vom Sensor zum Staurohr verlegen.
Ich persnlich bevorzuge den Minipropeller, weil da nur 3 Drhte zum Logger verlegt
werden mssen.
Die Dimensionierung ist fr ca. 60m/s ausgelegt, (der Drucksensor kann wesentlich
mehr). Wer schneller fliegt, sollte den 1M-Widerstand entsprechend verkleinern.
Fr Geschwindigkeiten unter 8m/s halte ich den Sensor allerdings nicht fr sonderlich
brauchbar.

Datenlogger
Das links abgebildete Staurohr hat 3,6mm-Durchmesser.
Das Staurohr kann relativ einfach aus den Elementen alter Teleskopantennen
gefertigt werden.
Die Elemente sind dnnwandig, in mehreren Durchmessern verfgbar und gut
ltbar.
Das Staurohr sollte vorn einen runden "Kopf" haben.

Die seitlichen Bohrungen sollten ringsherum angebracht werden.
Die im Bild angegebenen Werte entsprechen der Theorie nach Prandtl, sind
allerdings bei meinem ersten Staurohr nicht exakt eingehalten.
Stromsensor fr den E-Motor:
Wer wissen mchte wieviel Strom sein E-Motor im Flug bentigt, sollte mal
den Stromsensor ausprobieren.
Den Shunt (0,001 Ohm) bekommt man nicht auf die Platine des Loggers.
Ich habe den einfach eingeschrumpft und in der Nhe des Motorstellers
untergebracht. Einfach 2 Drhte zum Logger verlegen und los gehts.
Aber ACHTUNG: Die Schaltung funktioniert nicht zusammen mit BEC-

Stellern (Kurzschlugefahr!)!
Mit der Dimensionierung kann man ziemlich hohe Strme messen.

Mehr als 60A habe ich im Flug allerdings noch nicht ausprobiert.
Stromsensor fr ein Servo:

Datenlogger
Auch wenn das nicht unbedingt jeder brauchen kann, hier eine Schaltung mit
der man den Servostrom loggen kann.
Die ursprngliche Idee war, mal rauszubekommen welche Krfte/Momente
im Flug auf ein Servo wirken (der Servostrom ist proportional zur Belastung).
Man kann die Schaltung ntrlich auch dazu benutzen, um mal zu sehen, wie
sich der Einsatz zustzlicher Gerte z.B. Kreisel auf die Stromaufnahme
auswirkt.
DMS-Sensor (DMS=Dehnungsmestreifen):
Hier die Weiterentwicklung des "Ruderkraftmessers".
Da einige Leute glaubten, da die Servo-Strommessung nicht besonders gut fr

Ruderkraftmessungen geeignet ist, habe ich mal einen Dehnungsmestreifen (DMS)
auf den Servohebel geklebt und versucht dieses Problem mit einem etwas anderen
Sensor zu erfassen.
Wer gern Fahrad fhrt, kann vielleicht mal ein DMS auf den Pedalhebel kleben und
mir dann die geloggten Daten schicken :-).
Magnetischer Drehzahl-Sensor:

Datenlogger
Der Drehzahlsensor kann anstelle des Speedsensors mit Kodescheibe an den Logger angeschlossen
werden.
Um die relativ geringen Frequenzen messen zu knnen, sollte die Loggersoftware in der Version "_v9i"
oder "_v9x" verwendet werden.
Bei diesen beiden Versionen werden nicht die Impulse in einer definierten Zeit gezhlt
(Frequenzmessung) , sondern es wird die Zeit fr eine Umdrehung gemessen (Periodendauermessung).
Die Drehzahl bzw. Frequenz kann dann nachtrglich berechnet werden (f=1/t).
Optischer Drehzahl-Sensor:
Dieser Drehzahlsensor kann wie der magnetische Drehzahlsensor benutzt werden. Der
Vorteil gegenber dem magnetischen Sensor ist, dass kein Magnet an den Motor adaptiert
werden mu. Es reicht den Sensor in der Nhe der Luftschraube anzubringen, oder noch
besser einen Lichtleiter zwischen Sensor und Luftschraube einzubauen.

Datenlogger
Linearer Beschleunigungs-Sensor:
Der lineare Beschleunigungssensor kann zwei senkrecht aufeinanderstehende

Beschleunigungen messen (ca. +-3g).
Da am Datenlogger nur 1 analoger Kanal, neben Hhe zur Verfgung steht,
kann auch nur eine Beschleunigung analog erfasst werden.
Wer unbedingt auch den zweiten Kanal parallel betreiben mchte, kann
diesen anstelle eines RC-Kanales anschlieen.
Dann mu der Digitalausgang des ADXL verwendet werden.
Das gleichzeitige Loggen von anderen RC-Kanlen funktioniert dann
allerdings nicht mehr.
Die Kalibrierung des Sensors ist ziemlich einfach, da auf der Erde ja ziemlich
berall genau 1g herscht.
Folgend die letzten aktuellen Softwareversionen des Datenloggers:
Dlog_v7i.zip(3k) fr Logger mit RS-232 Treibertransistoren, Frequenzmeeingang

Dlog_v8i.zip(3k) fr Logger ohne RS-232 Treibertransistoren, Frequenzmeeingang
Datenlogger
Dlog_v9i.zip(3k) fr Logger mit RS-232 Treibertransistoren, Periodendauermeeingang

Dlog_v9x.zip(3k) fr Logger ohne RS-232 Treibertransistoren, Periodendauermeeingang
Verndert wurden hierbei:
Konfiguration ber den PC, bzw. Palm-Pilot

einstellbare Abtastraten: 0,15s, 0,25s, 0,5s, 1s und 5s
Zustzliches Integrieren des 2. analogen Kanals, fr Kapazittsanzeige bei Telemetriebetrieb
Die Versionen "9i" und "9x" dienen zum Anschlu von magnetischen Drehzahl- oder Speedsensoren
Ein Windowsprogramm zum Konfigurieren des Datenlogger und Auslesen der Daten kann unter folgender URL downloadbar:
http://www.sprut.de/electronic/soft/logger.htm
Folgend drei Programme fr Palm-Pilot-Benutzer:
Logger_prc.zip (10k)
Das Programm dient der bertragung der Loggerdaten in den Palm und Speicherung dieser.
Es knnen beliebig viele Datenstze (Flge) im Palm gespeichet werden, bis halt der Speicher im Palm voll ist (ein Flug belegt dabei max. 32kb,
normalerweise aber viel weniger).
Des weiteren werden die wichtigten Daten grafisch dargestellt und knnen vermessen werden.
Dadurch ist es bereits auf dem Flugplatz mglich, Aussagen zu den einzelnen Flugabschnitten zu treffen.
Die verwendeten Sensoren knnen durch Eingabe von entsprechenden Konstanten angpat werden.
Zuhause kann der Palm-Pilot anstelle des Loggers an den PC angeschlossen werden (serielle Schnittstelle).
Unter Nutzung des oben erwhnten Windowsprogrammes werden die Flugdaten dann zum PC bertragen.

Datenlogger
Wer den Logger als Variometer einsetzen mchte, oder auch nur die Flugdaten live am Boden sehen mchte, sollte das folgende Programm fr den Palm mal
ausprobieren:
Telemetrie.zip (36k) (funktioniert erst ab PALM-OS3.0, Mathlib.prc mu installiert sein)

Datenlogger
Es arbeitet mit dem Loggerprogramm zusammen, d.h. z.B. mit Telemetrie aufgezeichneten Daten knnen bei Bedarf gespeichert und anschlieend mit dem
Loggerprogramm vermessen werden.
Wer neben dem Hhensensor auch den Speedsensor benutzt, kann das Vario auf Energiekompensation (hnlich einer TEK-Dse ("0001")) und/oder auch
Fahrtkompensation (Bercksichtigung der Modellpolaren ("0010"/"0011")) umschalten.
Bei Fahrtkompensation mu die Polare des Flugzeugs natrlich erst eingegeben werden (Palm-Programm dafr liegt bei).
Die jenigen, die sich fr das ganze interessieren, aber noch keinen Logger besitzen, sollten das folgende
Simulationsprogramm auf ihrem PC installieren und anschlieend mal reell aufgezeichnete Flugdaten im Telemetrieformat damit zum Palm senden:
Log_sim_csv.zip (200k)
Neu: Spezielle Version fr E-Hubschrauber

Datenlogger
Noch neuer: Datenlogger, Version 2.5-2.9
Da ich immer wieder gefragt werde, woher bestimmte Teile bezogen werden knnen, hier eine paar Links:
www.reichelt.de (PICs, EEPROMs, OPVs, Sensoren, viele Kleinteile)

www.elpro.org (LTC1288, MPX4100A, LP2951, LM358, PIC16F84, 24C256, Keramikschwinger, die anderen Kleinteile)
www.conrad.de (MPX4100A, LM358, PIC16F84, Keramikschwinger, die anderen Kleinteile)
www.rs-components.com (LTC1288, LP2951, LM358, PIC16F84)
www.farnell.com (PIC16F84, LP2951, 24C256)
www.elv.de (MS5534A)
Ich bin natrlich nicht der einzige der sich mit Datenloggern bzw. Telemetrie beschftigt.
Folgend noch ein paar Anregungen zum Thema:
http://www.kapelec.com/altiose1.htm
http://www.kapelec.com/altivie1.htm
http://home.tiscali.de/luftbild/ep_1.html
http://www.ganzfix.de/MiniLogger/
http://www.k-webdesign.com/modellflug/
http://www.skynavigator.ch/
http://www.lomcovak.cz/eindex.html
http://www.flyheli.de
http://www.eagletreesystems.com
http://www.ulrich-roehr.de/elektronik/telemetrie/telemetrie.html
Datenlogger
http://www.cs.uni-magdeburg.de/~hsteinha/index.html
http://www.electronic-engineering.ch/microchip/projects/alti/alti.html
http://www.taniwha.com/~paul/fc/
http://www.rocznik.de/Marko/electronic/project/projekte.html
(falls Ihr noch Links zum Thema findet, bitte Mail an mich )
Startseite Modelle Flugplatz Flugplatzordnung Schwerpunktberechnung Geschwindigkeitsmessung Links

Interfacing the PC's Keyboard.
Tuesday, February 12th, 2008
Interfacing the AT keyboard.
Why would you want to interface the Keyboard? The IBM keyboard can be a cheap alternative to a keyboard on a
Microprocessor development system. Or maybe you want a remote terminal, just couple it with a LCD Module.
Maybe you have a RS-232 Barcode Scanner or other input devices, which you want to use with existing software which only
allows you to key in numbers or letters. You could design yourself a little box to convert RS-232 into a Keyboard
Transmission, making it transparent to the software.
An interfacing example is given showing the keyboard's protocols in action. This interfacing example uses a 68HC705J1A
MCU to decode an IBM AT keyboard and output the ASCII equivalent of the key pressed at 9600 BPS.
Note that this page only deals with AT Keyboards. If you have any XT keyboards, you wish to interface, consider placing them
in a museum. We will not deal with this type of keyboard in this document. XT Keyboards use a different protocol compared to
the AT, thus code contained on this page will be incompatible.
PC Keyboard Theory
The IBM keyboard you most probably have sitting in front of you, sends scan codes to your computer. The scan codes
tell your Keyboard Bios, what keys you have pressed or released. Take for example the 'A' Key. The 'A' key has a scan
code of 1C (hex). When you press the 'A' key, your keyboard will send 1C down it's serial line. If you are still holding it
down, for longer than it's typematic delay, another 1C will be sent. This keeps occurring until another key has been
pressed, or if the 'A' key has been released.
However your keyboard will also send another code when the key has been released. Take the example of the 'A' key
again, when released, the keyboard will send F0 (hex) to tell you that the key with the proceeding scan code has been
released. It will then send 1C, so you know which key has been released.
Your keyboard only has one code for each key. It doesn't care it the shift key has been pressed. It will still send you the
same code. It's up to your keyboard BIOS to determine this and take the appropriate action. Your keyboard doesn't
even process the Num Lock, Caps Lock and Scroll Lock. When you press the Caps Lock for example, the keyboard will
send the scan code for the cap locks. It is then up to your keyboard BIOS to send a code to the keyboard to turn on the
Caps lock LED.
Now there's 101 keys and 8 bits make 256 different combinations, thus you only need to send one byte per key, right?
Nop. Unfortunately a handful of the keys found on your keyboard are extended keys, and thus require two scan code.
These keys are preceded by a E0 (hex). But it doesn't stop at two scan codes either. How about E1,14,77,E1,F0,14,
F0,77! Now that can't be a valid scan code? Wrong again. It's happens to be sent when you press the Pause/break key.
Don't ask me why they have to make it so long! Maybe they were having a bad day or something?
When an extended key has been released, it would be expect that F0 would be sent to tell you that a key has been
released. Then you would expect E0, telling you it was an extended key followed by the scan code for the key pressed.
However this is not the case. E0 is sent first, followed by F0, when an extended key has been released.
http://www.beyondlogic.org/keyboard/keybrd.htm (1 of 10)12/02/2008 20:11:18

Keyboard Commands
Besides Scan codes, commands can also be sent to and from the keyboard. The following section details the function
of these commands. By no means is this a complete list. These are only some of the more common commands.
Host Commands
These commands are sent by the Host to the Keyboard. The most common command would be the setting/
resetting of the Status Indicators (i.e. the Num lock, Caps Lock & Scroll Lock LEDs). The more common and
useful commands are shown below.
ED Set Status LED's - This command can be used to turn on and off the Num Lock,
Caps Lock & Scroll Lock LED's. After Sending ED, keyboard will reply with ACK
(FA) and wait for another byte which determines their Status. Bit 0 controls the
Scroll Lock, Bit 1 the Num Lock and Bit 2 the Caps lock. Bits 3 to 7 are ignored.
EE Echo - Upon sending a Echo command to the Keyboard, the keyboard should reply
with a Echo (EE)
F0 Set Scan Code Set. Upon Sending F0, keyboard will reply with ACK (FA) and
wait for another byte, 01-03 which determines the Scan Code Used. Sending 00
as the second byte will return the Scan Code Set currently in Use
F3 Set Typematic Repeat Rate. Keyboard will Acknowledge command with FA and wait
for second byte, which determines the Typematic Repeat Rate.
F4 Keyboard Enable - Clears the keyboards output buffer, enables Keyboard
Scanning and returns an Acknowledgment.
F5 Keyboard Disable - Resets the keyboard, disables Keyboard Scanning and returns
an Acknowledgment.
FE Resend - Upon receipt of the resend command the keyboard will re- transmit
the last byte sent.
FF Reset - Resets the Keyboard.
Commands
Now if the Host Commands are send from the host to the keyboard, then the keyboard commands must be sent
from the keyboard to host. If you think this way, you must be correct. Below details some of the commands which
the keyboard can send.
FA Acknowledge
AA Power On Self Test Passed (BAT Completed)
EE See Echo Command (Host Commands)
FE Resend - Upon receipt of the resend command the Host should re-transmit the last
byte sent.
00 Error or Buffer Overflow
FF Error or Buffer Overflow
Scan Codes

The diagram below shows the Scan Code assigned to the individual keys. The Scan code is shown on the bottom of
the key. E.g. The Scan Code for ESC is 76. All the scan codes are shown in Hex.
As you can see, the scan code assignments are quite random. In many cases the easiest way to convert the
scan code to ASCII would be to use a look up table. Below is the scan codes for the extended keyboard &
Numeric keypad.
The Keyboard's Connector
The PC's AT Keyboard is connected to external equipment using four wires. These wires are shown below for the 5 Pin
DIN Male Plug & PS/2 Plug.
1. KBD Clock
1. KBD Clock
2. GND
2. KBD Data
3. KBD Data
3. N/C
4. N/C
4. GND
5. +5V (VCC)
5. +5V (VCC)
5 Pin DIN PS/2 6. N/C

A fifth wire can sometimes be found. This was once upon a time implemented as a Keyboard Reset, but today is left
disconnected on AT Keyboards. Both the KBD Clock and KBD Data are Open Collector bi-directional I/O Lines. If
desired, the Host can talk to the keyboard using these lines.
Note: Most keyboards are specified to drain a maximum 300mA. This will need to be considered when powering your
devices
The Keyboard's Protocol
Keyboard to Host
As mentioned before, the PC's keyboard implements a bi-directional protocol. The keyboard can send data to the Host
and the Host can send data to the Keyboard. The Host has the ultimate priority over direction. It can at anytime
(although the not recommended) send a command to the keyboard.
The keyboard is free to send data to the host when both the KBD Data and KBD Clock lines are high (Idle). The KBD
Clock line can be used as a Clear to Send line. If the host takes the KBD Clock line low, the keyboard will buffer any
data until the KBD Clock is released, ie goes high. Should the Host take the KBD Data line low, then the keyboard will
prepare to accept a command from the host.
The transmission of data in the forward direction, ie Keyboard to Host is done with a frame of 11 bits. The first bit is a
Start Bit (Logic 0) followed by 8 data bits (LSB First), one Parity Bit (Odd Parity) and a Stop Bit (Logic 1). Each bit
should be read on the falling edge of the clock.
The above waveform represents a one byte transmission from the Keyboard. The keyboard may not generally change
it's data line on the rising edge of the clock as shown in the diagram. The data line only has to be valid on the falling
edge of the clock. The Keyboard will generate the clock. The frequency of the clock signal typically ranges from 20 to
30 Khz. The Least Significant Bit is always sent first.
Host to Keyboard
The Host to Keyboard Protocol is initiated by taking the KBD data line low. However to prevent the keyboard from
sending data at the same time that you attempt to send the keyboard data, it is common to take the KBD Clock line low
for more than 60us. This is more than one bit length. Then the KBD data line is taken low, while the KBD clock line is
released.
The keyboard will start generating a clock signal on it's KBD clock line. This process can take up to 10mS. After the first
falling edge has been detected, you can load the first data bit on the KBD Data line. This bit will be read into the
keyboard on the next falling edge, after which you can place the next bit of data. This process is repeated for the 8 data
bits. After the data bits come an Odd Parity Bit.

Once the Parity Bit has been sent and the KBD Data Line is in a idle (High) state for the next clock cycle, the keyboard
will acknowledge the reception of the new data. The keyboard does this by taking the KBD Data line low for the next
clock transition. If the KBD Data line is not idle after the 10th bit (Start, 8 Data bits + Parity), the keyboard will continue
to send a KBD Clock signal until the KBD Data line becomes idle.
Interfacing Example - Keyboard to ASCII Decoder
Normally in this series of web pages, we connect something to the PC, to demonstrate the protocols at work. However
this poses a problem with the keyboard. What could be possibly want to send to the computer via the keyboard
interface?
Straight away any devious minds would be going, why not a little box, which generates passwords!. It could keep
sending characters to the computer until it finds the right sequence. Well I'm not going to encourage what could
possibly be illegal practices.
In fact a reasonably useful example will be given using a 68HC705J1A single chip microcontroller. We will get it to read
the data from the keyboard, convert the scan codes into ASCII and send it out in RS-232 format at 9600 BPS. However
we won't stop here, you will want to see the bi-directional use of the KBD Clock & Data lines, thus we will use the
keyboards status LEDS, Num Lock, Caps Lock and Scroll Lock.
This can be used for quite a wide range of things. Teamed up with a reasonably sized 4 line x 40 character LCD panel,
you could have yourself a little portable terminal. Or you could use it with a microcontroller development system. The
68HC705J1A in a One Time Programmable (OTP) is only a fraction of the cost of a 74C922 keyboard decoder chip,
which only decodes a 4 x 4 matrix keypad to binary.
The keyboard doesn't need to be expensive either. Most people have many old keyboards floating around the place. If
it's an AT Keyboard, then use it (XT keyboards will not work with this program.) If we ever see the introduction of USB
keyboards, then there could be many redundant AT keyboards just waiting for you to hook them up.
Features
Before we start with the technical aspects of the project, the salesman in me wants to tell you about the features
packed into the 998 bytes of code.
Use of the keyboard's bi-directional protocol allowing the status of the Num Lock, Caps Lock and Scroll Lock to
be displayed on the Keyboards LEDs.
External Reset Line activated by ALT-CTRL-DEL. If you are using it with a Microcontroler development system,
you can reset the MCU with the keyboard. I've always wanted to be able to use the three fingered solute on the
HC11!

Scroll Lock and Num Lock toggles two Parallel Port Pins on the HC705. This can be used to turn things on or off,
Select Memory Pages, Operating Systems etc
"ALTDEC" or what I call the Direct Decimal Enter Routine. Just like using a PC, when you enter a decimal
number when holding down one of the ALT keys the number is sent as binary to the target system. E.g. If you
press and hold down ALT, then type in 255 and release ALT, the value FF (Hex) will be sent to the system. Note.
Unlike the PC, you can use both the numeric keypad or the numbers along the top of the keyboard.
"CTRLHEX" or you guessed it, Direct Hexadecimal Enter Routine. This function is not found with the PC. If you
hold CTRL down, you can enter a Hexadecimal number. Just the thing for Development Systems or even
debugging RS-232 Comms?
Output is in ASCII using a RS-232 format at 9600 BPS. If using it with a development System, you can tap it in
after the RS-232 Line Transceivers to save you a few dollars on RS-232 Level Converters.
Schematic & Hardware
The schematic below, shows the general connections of the keyboard to the HC705.
The TXD pin, while it transmits in RS-232 format, is not at RS-232 Voltage Levels. If you want to connect it to RS-232
Devices then you will need to attach a RS-232 Level Converter of some kind. If you are using it with a development
system, you can bypass both RS-232 Level Converters and connect it directly to the RXD pin of the MCU. However the
keyboard can't be a direct replacement for a terminal on a development system, unless you want to type in your code
each time! You may want to place a jumper or switch inline to switch between your RS-232 Port and the Keyboard.
The Keyboard requires open collector/open drain outputs. This is achieved by using the Data Direction Register (DDR).
A zero is written to the port which is internally latched. The DDR is then used to toggle the line from logic 0 to high
impedance. If the port pin is an output, a logic zero will be present on the pin, if the port is set to be an input, the port
will be high impedance which is pulled high by the external resistors.
The circuit is designed to run on a 4Mhz crystal (2Mhz Bus Speed). The timing for the RS-232 transmission is based on
the bus speed, thus this crystal has to be 4 Mhz. If you are lucky enough to have a 4 Mhz E Clock on your development
system you can use it.
The power supply can also create a slight problem. A standard keyboard can drain about 300mA max, thus it would be
recommended to use it's own regulator rather than taking a supply from elsewhere. Decoupling capacitors are not
shown on the general schematic but are implied for reliable operation. Consult your MC68HC705J1A Technical Data

Manual for more Information.
Reading Bytes from the Keyboard.
Now it is time to look at the code. I cannot include a description of all the code in this article. The list file is just on 19
pages. Most of it (hopefully) is easy to follow. (Just like other good code, count the number of spelling errors while you
are at it!)
Remember the KBD Clock line? If you take it low, the keyboard will buffer any keys pressed. The Keyboard will only
attempt to send when both the Data and Clock lines are idle (high). As it can take considerable time to decode the keys
pressed, we must stop the keyboard from sending data. If not, some of the data may be lost or corrupted.
Receive ldx #08 ;Number of Bits

clr PAR ;Clear Parity Register
bclr clk,DDRA ;Clear to Send
brset clk,PORTA,* ;wait on idle Clock

brset data,PORTA,Receive ;False Start Bit, Restart
The program, will keep the KBD Clock line low, unless it is ready to accept data. We will use a loop to retrieve the data
bits from the keyboard, thus we will load index register X with the number of bits be want to receive. PAR will be used to
verify the parity bit at the end of the transmission. We must clear this first.
We can then place the KBD Clock line in the idle state so that the keyboard will start transmitting data if a key has been
pressed. The program then loops while the clock line is Idle. If the KBD clock goes low, the loop is broken and the KBD
Data pin is read. This should be the start bit which should be low. If not we branch to the start of the receive routine and
try again.
Recdata ror byte

jsr highlow ;Wait for high to low Transition
brset data,PORTA,Recset
bclr 7,byte
jmp Recnext
Recset bset 7,byte
inc PAR
Recnext decx
bne Recdata ;Loop until 8 bits been received
Once the start bit has been detected, the 8 data bits must follow. The data is only valid on the falling edge of the clock.
The subroutine highlow shown below will wait for the falling edge of the clock.
highlow brclr clk,PORTA,* ;Loop until Clk High

brset clk,PORTA,* ;Loop until Clk Low
rts
After the falling edge we can read the level of the KBD Data line. If it is high we can set the MSbit of the byte or if it is
clear, we can clear it. You will notice if the bit is set, we also increment PAR. This keeps track of the number of 1's in
the byte and thus can be used to verify the Parity Bit. Index register X is decremented as we have read a bit. It then
repeats the above process, until the entire 8 bits have been read.
lda PORTA ; MSb is Parity.

rola ; Shift MSbit to LSbit.
rola ; thru carry
eor PAR
and #$01

beq r_error
After the 8 data bits, comes the dreaded parity bit. We could ignore it if we wanted to, but we may as well do something
about it. We have been keeping a tally of the number of 1's in PAR. The keyboard uses odd parity, thus the parity bit
should be the complement of the LSbit in memory location, PAR. By exclusive OR-ing PAR with the Parity Bit, we get a
1 if both the bits are different. I.e a '1' if the parity bit checks out.
As we are only interested in the LSbit we can quite happy XOR the accumulator with PAR. Then we single out the LSb
using the AND function. If the resultant is zero, then a parity error has occurred and the program branches to r_error.
jsr highlow
brclr data,PORTA,r_error ;Stop Bit Detection
bset clk,DDRA ;Prevent Keyboard from sending data

;(Clear to Send)
rts
After the Parity Bits comes the Stop Bit. Once again we can ignore it if we desire. However we have chosen to branch
to an error routine if this occurs. The stop bit should be set, thus an error occurs when it is clear.
r_error lda #$FE ;Resend

sta byte
jsr Transmit
jmp Receive ;Try again
What you do as error handling is up to you. In most cases it will never be executed. In fact I don't yet know if the above
error handling routine works. I need to program another HC705 to send a false parity bit. I've tried it out in close
proximity to the Washing Machine, but I really need a controlled source!
When an error occurs in the Parity or Stop Bit we should assume that the rest of the byte could have errors as well. We
could ignore the error and process the received byte, but it could have unexpected results. Instead the keyboard has a
resend command. If we issue a resend (FE) to the keyboard, the keyboard should send the byte back again. This is
what occurs here.
You may notice that we branch to the error routine which transmits a resend command straight away, without waiting
for the corrupt transmission to finish. This is not a problem, as the keyboard considers any transmission to be
successful, if the 10th bit is sent, i.e. the parity bit. If we interrupt the transmission before the parity bit is sent, the
keyboard will place the current byte in it's buffer for later transmission.
Reading a byte doesn't really require bi-directional data and clock lines. If you can process the byte fast enough then no
handshaking (RTS) is required. This means you no longer need to fiddle with the Data Direction Register. I have
successfully done this with the HC705, outputting only scan codes on a parallel bus. But as you can imagine, you must
be quick in order to catch the next transmission.
Writing Bytes to the Keyboard.
The following routine given here is a generic one which can be used for your own purposes. During normal execution of
this program the KBD clock line should be low, to prevent data being sent when the MCU isn't ready for it. However in
this example, we take low the KBD clock line and wait for the 64uS which is pointless as the line is already low and has
been like this for quite some time, since the end of the last transmission or reception.
transmit ldx #$08 ;8 Data Bits

bset clk,DDRA ;Set Clock Low
lda #$13 ;Delay 64uS
jsr delay

clra ;Clear Parity Register

bset data,DDRA ;Set Data Low
bclr clk,DDRA ;Release Clock Line
jsr highlow
The program then initiates the Host to Keyboard transmission by taking the KBD data line low and releasing the KBD
clock line. We must then wait for a high to low transition on the KBD clock, before we load the first bit on the KBD data
line.
loop ror byte

bcs mark
space bset data,DDRA ; Clear Bit
jmp next
mark bclr data,DDRA ; Clear Bit
inca ; Parity Calculation
next jsr highlow ; Wait for high to low transition
decx
bne loop
The loading of the individual bits on the KBD data line is done in very similar fashion to the read cycle. The X register is
used to keep track of the number of bits sent. Also simular to the read cycle, we increment the accumulator so we can
calculate the parity bit later on.
and #$01
bne clr_par
set_par bclr data,DDRA
jmp tr_ackn
clr_par bset data,DDRA
tr_ackn jsr highlow
After the data bits have been sent, it is now time to send the parity bit. Unlike the read cycle, we can't ignore the parity
bit. If we do the keyboard will issue a resend (FE) command if the parity bit is incorrect, a 50% probability!
bclr data,DDRA ;Release Data Line

jsr highlow
brset data,PORTA,error ;Check for Ack
brclr clk,PORTA,* ;Wait for idle line
bset clk,DDRA ;Prevent Keyboard from sending data

;(Clear to Send)
rts
Once the Parity bit has been set and the falling edge of the KBD clock detected, we must release the KBD data line,
and wait for another falling edge of the KBD clock to see if the Keyboard has acknowledged the byte. The keyboard
does this by pulling the KBD data line low. If it is not low, then the program branches to an error handler. If all has been
successful, the MCU pulls down the KBD clock, to prevent it from transmitting.
error lda #$FF ;Reset

sta byte
jsr transmit
rts
We have taken a harsher approach to handing any transmit errors. Ideally we should wait for the keyboard to send a
resend command and then retransmit the byte. However what we have done is to issue a reset to the keyboard. So far
I've never had an error, however if this starts to become a problem, then a better error handler could be written.

Download Source Code
Download Keybrd05.zip - Source code for 68HC705J1A (20,604 Bytes)
View .Lst (List) File
Links to other information.
Two Line Mini- Roger Schaefer has developed a Mini RS-232 Terminal using the 68HC11. As an
Terminal input device the terminal uses a standard IBM compatible PC keyboard. In a
normal full duplex mode the controller converts the keyboard scan codes to ASCII
and transmits them to the RS-232 output. Input from the RS-232 is displayed on the
LCD.
Copyright 1999-2005 Craig Peacock - 15th June 2005.

http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/kbd_1xx.asm
;***************************************************************************
;
; AT Keyboard Interface V1.04
; ===========================
;
;
; V1.04: Re-structured ISR to comply with latest modules, added
; label _ISR_RS232error
; (19.04.2004)
;
; V1.03: Improved AT keyboard and RS232 initialization,
; fixed RBIF/INTF interrupt initialization issue.
; Changed keyboard data pin to PORTA,4 (open-collector).
; (16.08.2003)
;
; V1.02: Made forward compatible (yes, this is feasible) by
; implementing/completing ALT and CTRL flags. Added
; labels to support non-implemented ALT and CTRL
; enhancements. (3.1.2002)
;
; V1.01: Changed from non-preemptive to preemptive interrupt-based
; keyboard scan pattern acquisition scheme.
; Now only the scan pattern acquisition is carried out
; during the interrupt service routine, the decoding
; happens during normal operation mode when the flag
; "KBDflag" has been set after having completed the entire
; scan pattern reception. (16.7.2001)
;
;
;
;
;
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/kbd_1xx.asm (1 of 16)12/02/2008 20:11:27

; SPECIFICATIONS:
; ===============
; Keyboard Routine Features: Capability of uni-directional
; and keyboard
; routine, with decoding to ASCII
; characters during normal operation
; Required Software: RS232 terminal
;
;
; ABSTRACT:
; =========
; This routine converts AT keyboard scan patterns to ASCII characters
; and transmits them afterwards to the target device by using the
; RS232 transmission protocol.
; Support of english (QWERTY) and modified swiss-german (QWERTZ)
; 'codepages'. This implementation features no visual interface.
; Unidirectional data flow: Transmission only for characters typed on
; the local keyboard.
;
;
; DESCRIPTION:
; ============
; corresponding scan code from the keyboard to the microcontroller.
; Afterwards, the microcontroller converts the keyboard scan code to
; ASCII characters and sends them to the computer terminal via the
; RS232 connection.
;
; The keyboard scan pattern capture and decoding is done by an
; interrupt service routine. The event, which triggers the interrupt
; is a falling edge on the keyboard clock line at the KBDclkpin
; (PORTB,0). The keyboard data (scan code) will be fetched at the
; KBDdatapin (PORTA,4).

; There is only RS232 transmission, so only the TXport (PORTA,0) is

; connected. Since PORTB,0 is already used by the keyboard clock line,
; there exists no possibility to use it also for RS232 reception.
; The configuration of the KBDclkpin interrupt is done by the
; KEYBOARDinit macro.
;
; For the AT keyboard layout, English and modified Swiss-German
; 'codepages' are supported:
; QWERTY and QWERTZ keyboard layout
;
;
; =====================
; - Uni-directional communication between microcontroller application
; and remote RS232 client.
; - Uni-directional communication between microcontroller and keyboard.
; - Support for all keyboard characters typed with shift button active
; and inactive.
; - English and modified Swiss-German 'codepages' available
; (QWERTY and QWERTZ)
; Include the desired keyboard lookup tables at the correct location.
; - Caps Lock implemented
; - Num Lock always active
; - Possibility to implement short-cuts or user defined characters
; for 'Esc', 'Num Lock', 'Scroll Lock' and 'F1' - 'F12' keys
;
; - Further enhancement, not implemented: Support of ASCII conversion
; from direct ALT-DEC and CTRL-HEX entries, e.g. ALT + 6 + 4 = @
; or CTRL + 3 + F = ?
;
;
; LIMITATIONS:
; ============
; - No support for ALT-GR characters.
; - Minimized keyboard routine with support for only uni-directional
; communication from keyboard to controller, therefore no control
; over keyboard status LEDs.
; - No support for arrow buttons, 'Home', 'Del', 'PageUp', 'PageDown',
; 'Insert', 'End' because there exists no character/command
; corresponding to the ASCII character map. (But it is possible to
; use them for short-cuts or user defined characters, if the special
; code routine (0xE0) is altered.)
;
;

; NOTE:
; =====
; This program needs 'ORG' directives to locate tables within entire
; memory pages. To allow for slight modifications, the code has not
; been optimized to the utmost extent regarding program memory
; placement. This can be carried out using the program memory window
; of MPLAB showing the hexadecimal representation of the code.
;
;
; CREDITS:
; ========
; - Steve Lawther for inspirations concerning the scan code fetch
; routine (for bring-up version 1.00 of this program).
;
;***************************************************************************

PROCESSOR 16F84

;ORG 0x00 processor reset vector, declared below

;ORG 0x04 interrupt service routine, declared below


TEMP1 set
BASE+d'0' ; Universal temporary register
TEMP2 set
BASE+d'1' ; ATTENTION !!!
TEMP3 set
BASE+d'2' ; They are used by various modules.
TEMP4 set
BASE+d'3' ; If you use them, make sure not to use
; them concurrently !
FLAGreg equ BASE+d'4' ; register containing keyboard and other flags
TXD equ
BASE+d'5' ; RS232 TX-Data register
RXD equ
BASE+d'6' ; RS232 RX-Data register (not used here, but m_rs232
; requires its declaration)
KBDcnt equ BASE+d'7' ; IRQ based keyboard scan pattern counter
KBD equ BASE+d'8' ; keyboard scan code & ascii data register
KBDcopy equ BASE+d'9' ; keyboard scan code register

ORG 0x190
;***** MACROS *****

KEYBOARDinit macro
BANK1
bsf KBDclktris ; set keyboard clock line to input explicitely
bsf KBDdatatris ; set keyboard data line to input explicitely
bcf OPTION_REG,INTEDG ; keyboard interrupt on falling edge
BANK0
bsf INTCON,INTE ; enable RB0/INT interrupts
endm
ISR ;************************
;************************

goto ISR
;**************************
;**************************
;*****************************************
;*** KEYBOARD SCAN PATTERN ACQUISITION ***
;*****************************************
;*** check start bit ***

tstf KBDcnt ; check
bnz _KBDdat ; branch on no zero

goto _KBDabort ; no valid start bit, abort

goto _INCF ; exit
;*** keyboard scan pattern acquisition ***

_KBDdat movfw KBDcnt ; get kbd scan pattern acquisition counter
sublw d'8' ; w = d'8' - KBDcnt (*)
bnc _KBDpari ; branch if negative (carry == 0)
btfss KBDdatapin ; get keyboard data input
bcf KBD,0x07 ; (bit operations do not alter zero flag)
btfsc KBDdatapin
bsf KBD,0x07
bz _INCF ; exit on zero (zero flag still valid from (*))
goto _INCF ; exit
;*** ignore parity bit ***

_KBDpari movfw KBDcnt ; get kbd scan pattern acquisition counter
sublw d'9' ; w = d'9' - KBDcnt
bnc _KBDstp ; branch if negative (carry == 0)
goto _INCF ; exit
;*** check stop bit ***

_KBDstp btfss KBDdatapin ; check if stop bit is valid
goto _KBDabort ; if not set, abort
bsf KBDflag ; else set reception flag to decode KBD
;*** stall keyboard ***
; to prevent the arrival of more data before having finished decoding
BANK1 ; hold keyboard (with kbd clk low):
BANK0
;*** disable RB0/INT interrupt line ***
goto _KBDterm ; terminate successfully
_KBDabort clrf KBD ; abort / invalid data

_KBDterm clrf KBDcnt ; reset kbd scan pattern acquisition counter
goto _KBDend ; terminate execution of keyboard ISR
;***********************************
;***********************************


_INCF incf KBDcnt,F ; increment acquisition counter

_ISR_RS232error
_KBDend bcf INTCON,INTF ; clear RB0/INT interrupt flag
;*****************************************
;*****************************************

;***** KEYBOARD SCAN PATTERN DECODING SUBROUTINE *****
KBDdecode
;**********************************************************
;*** KEYBOARD SCAN CODE PRE-DECODING, SET / CLEAR FLAGS ***
;**********************************************************
;*** check key release scan code (F0) ***

movfw KBD ; get scan code
movwf KBDcopy ; make backup of scan code for later use
sublw 0xF0 ; check if FO has been sent:
bnz _KBD_1 ; branch if no 'release' scan code occured
bsf RELflag ; set key release flag if 'release' occured
bcf SPEflag ; clear special code flag always on release
goto _ClrStall ; abort with nothing to display

_KBD_1 btfss RELflag ; check release flag, exit if cleared:

goto _KBD_2 ; release flag has not been set, branch
;*** release flag has been set / key release is in progress: ***
bcf RELflag ; clear key release flag
;*** if release of SHIFT key, clear shift flag: ***
movfw KBD ; check left shift button (0x12):
sublw 0x12 ; subtract, check if zero
bz _clrSHI ; if zero, branch
movfw KBD ; check right shift button (0x59):
skpnz ; skip on non zero
_clrSHI bcf SHIflag ; clear shift flag
;*** check for CAPS LOCK activity: ***
movfw KBD ; check caps lock key release:
bnz _clrALT ; if not zero, branch
btfss CAPflag ; check flag, clear flag if set:
goto _setCAP ; flag has not been set, branch
bcf CAPflag ; clear flag
_setCAP bsf CAPflag ; set flag if cleared
;*** check for ALT activity: ***
_clrALT movfw KBD ; check ALT key release:
bnz _clrCTRL ; if not zero, branch (to next check)
bcf ALTflag ; clear flag
goto _ALTdec ; goto ALT-DEC-Entry conversion/display routine
; /not implemented, enhancement/
;*** check for CTRL activity: ***
_clrCTRL movfw KBD ; check CTRL key release:
bnz _ClrStall ; if not zero, branch / exit
bcf CTRLflag ; clear flag
goto _CTRLhex ; goto CTRL-HEX-Entry conversion/display routine
;****************************************************
;* The following table has to be located within one *
;* page to allow for correct lookup functionality. *
;* Therefore, additional ISR code has been moved *
;* further down. *
;****************************************************

;*********************************************************************
;* LOOKUP TABLE FOR KEYBOARD-SCAN-CODE TO ASCII-CHARACTER CONVERSION *
;*********************************************************************
;ORG 0x?? ; if necessary, move table
#include "..\tables\eng_main.asm" ; English 'codepage'

;#include "..\tables\ger_main.asm" ; modified Swiss-German 'codepage'
;****************************************************
;* The following code belongs also to the interrupt *
;* service routine and has been moved down to this *
;* place to allow the main keyboard decode lookup *
;* table to be located within one page. *
;* The code below may be arranged on another page, *
;* but that doesn't matter. *
;****************************************************
;********************************
;*** SCAN CODE RANGE CHECKING ***
;********************************
_KBD_2 ;*** check if special code (0xE0) has been submitted previously ***
btfss SPEflag
goto _KBD_3
;*** decoding of scan code with preceding special code (0xE0) ***
; (decoding currently only necessary for 'E0 4A' = '/')
movfw KBD
sublw 0x4A ; 0x4A - w
bnz _NOSUP ; branch on non-zero
movlw '/' ; store '/' in KBD
movwf KBD
goto _OUTP
_NOSUP ;*** check if scan code 0x5A or smaller has occurred ***
movfw KBD
bc _KBD_3 ; carry if result positive or zero, branch
;*** range exceeded (above 0x5A) ***
; it's one of the following keys: arrow button, 'Home', 'Del',
; 'PageUp', 'PageDown', 'Insert', 'End'
; these keys are currently not used, so
goto _ClrStall
_KBD_3 ;*** check if scan code 0x61 or smaller has occurred ***

movfw KBD
sublw 0x61 ; 0x61 - w
bc KBD_dec ; carry if result positive or zero, goto table
movlw d'14'
subwf KBD,F ; KBD = KBD - d'14'
;*** check if scan code 0x61 (0x6F-d'14') or smaller has occurred ***
movfw KBD
sublw 0x61 ; 0x61 - w
bnc _KBD_4 ; no carry if result negative, goto _KBD_4
movlw d'25'
addwf KBD,F ; KBD = KBD + d'25'
goto KBD_dec
_KBD_4 ;*** check if scan code 0x78 (0x86 - d'14') or higher has occurred ***
movfw KBD
sublw 0x77 ; 0x77 - w
bc KBD_dec ; carry if result zero or positive, branch
;*** no character to display: ***
;*** check for special code (0xE0): 0xD2 = 0xE0 - d'14' ***
movfw KBD
sublw 0xD2 ; 0xD2 - w
bsf SPEflag ; special code occurred, set flag
;*******************************************************
;*** SCAN CODE DECODING & ASCII CHARACTER CONVERSION ***
;*******************************************************
;*** DECODE SCAN CODE ***

KBD_dec movlw HIGH KBDtable ; get correct page for PCLATH
movfw KBD
call KBDtable ; GET CORRESPONDING KEYBOARD CHAR IN LOOKUP TABLE
movwf KBD ; save result to KBD
tstf KBD ; test KBD to get the zero flag
bz _ClrStall ; abort if KBD is zero / invalid entry, nothing to display
;*** check for ALT-DEC-Entry ***

;btfsc ALTflag ; check flag
;goto _ALTstr ; jump if set
;*** check for CTRL-HEX-Entry ***


;btfsc CTRLflag ; check flag

;goto _CTRLstr ; jump if set
;*** convert only LETTERS to capital letters: ***

; a letter in KBD value has to be in range from 0x61 to 0x7A
movfw KBD
sublw 0x60 ; 0x60 - w
bc _SHICHR ; carry if result greater or equal zero = no letter, exit
movfw KBD
bnc _SHICHR ; no carry if result negative = no letter, exit
;*** there is now a letter in KBD, check conversion to capital letter: ***
movfw KBD
btfsc CAPflag ; check caps lock flag
goto _SHIset ; flag has been set
btfss SHIflag ; check shift flag
goto _OUTP ; no flag, exit
goto _cnvCAP ; flag has been set, convert to capital letter
_SHIset btfsc SHIflag ; check shift flag
goto _OUTP ; flag has been set, exit
_cnvCAP addlw d'224' ; convert to capital letter (+ d'224')
movwf KBD
;goto _OUTP ; (uncomment in case _OUTP will be moved)
;*************************************
;*** KEYBOARD DATA OUTPUT TO RS232 ***
;*************************************
_OUTP ;*** RS232 ***

movfw KBD
goto _ClrStall ; (uncomment in case _ClrStall will be moved)
;************************************************
;*** SPECIAL COMMANDS I (with special output) ***
;************************************************
_CRLF SEND CR ; on 'Enter', send CR and LF to RS232

movlw LF ; put LF to w, return
RETURN
;**********************************************************
;*** STALL RELEASE & CLEAR KEYBOARD DATA RECEPTION FLAG ***
;**********************************************************

_ClrStall
BANK1
bcf KBDflag ; clear keyboard data reception flag
bsf INTCON,INTE ; re-enable interrupt RB0/INT
RETURN
;****************************************************
;*** SPECIAL COMMANDS II (without special output) ***
;****************************************************
_SHIFT bsf SHIflag ; set shift flag

RETLW 0 ; clear w to obtain invalid entry
_ALT bsf ALTflag ; set ALT flag

_CTRL bsf CTRLflag ; set CTRL flag

;***********************************************
;*** ALT-DEC & CTRL-HEX STORING & CONVERSION ***
;***********************************************
; store typed numbers in CTRLreg1 - CTRLreg3
_CTRLstr ; /not implemented, enhancement/
_ALTstr ; /not implemented, enhancement/
_ALTdec ; PRE: ALT + [1..3] numbers (e.g. ALT + 6 + 4 = @) in CTRLreg1 - 3

; POST: convert ALT-DEC-Entry after release of ALT key, return
; ascii value converted from numbers
_CTRLhex ; PRE: CTRL + [1..2] letters/numbers (e.g. CTRL + 3 + F = ?)

; in CTRLreg1 - 2
; ascii value as concatenated hex value from numbers
; catch all handler for non-implemented features:

goto _ClrStall ; abort & exit (nothing to display/send)
;*****************************************************************
;*** SCAN CODE DECODING & ASCII CONVERSION FOR 'SHIFT' ENTRIES ***

;*****************************************************************
_SHICHR ;*** special character decoding typed with shift button active ***
; check for active shift button, if not active, branch
btfss SHIflag
goto _OUTP ; branch
; check for 'backspace', 'tab', 'linefeed' and 'carriage return' :
; (here, KBD has already been converted to ASCII character values)
movfw KBD
sublw d'13' ; d'13' - w
bc _OUTP ; carry if result zero or positive, branch
;*** range check: abort if KBDcopy greater than 0x61 ***

; (KBDcopy has the value of the original keyboard scan code)
movfw KBDcopy
sublw 0x61 ; 0x61 - w
bnc _OUTP ; no carry if result negative, branch
;*** check if KBDcopy greater than 0x3C ***
movfw KBDcopy
sublw 0x3C ; 0x3C - w
bc _SHICH1 ; carry if result zero or positive, branch
movlw d'61'
subwf KBDcopy,F ; KBDcopy = KBDcopy - d'61'
goto _SHICH3
;*** check if KBDcopy greater than 0x24 ***
_SHICH1 movfw KBDcopy
sublw 0x24 ; 0x24 - w
movlw d'35'
goto _SHICH3
;*** else ***
_SHICH2 movlw d'4'
addwf KBDcopy,F ; KBDcopy = KBDcopy + d'4'
_SHICH3 movlw HIGH KBDSHIFTtable ; get correct page for PCLATH

movfw KBDcopy
call KBDSHIFTtable ; GET CORRESPONDING KEYBOARD CHAR IN LOOKUP TABLE
goto _OUTP
;*******************************************************
;* The following table has also to be located within *

;* one page to allow for correct lookup functionality. *

;*******************************************************
;**********************************************************************
;* LOOKUP TABLE FOR SPECIAL CHARACTERS TYPED WITH SHIFT BUTTON ACTIVE *
;**********************************************************************
#include "..\tables\eng_shif.asm" ; English 'codepage'

;#include "..\tables\ger_shif.asm" ; modified Swiss-German 'codepage'
;***** END OF SCAN PATTERN DECODING SUBROUTINE *****
;************** MAIN **************
MAIN ORG 0x00
BANK1
goto _MAIN
ORG 0x1E0
_MAIN ;*** RS232 INITIALIZATION ***

; Do not call RS232init, since we have no RS232 reception and
; PORTB,0 is already used by the keyboard.
; (Note: KEYBOARDinit and RS232init are almost equal)
; Initialize only RS232 transmission (TXport):
bcf TXtris ; set RS232 output
BANK0
;*** AT KEYBOARD INITIALIZATION ***

KEYBOARDinit ; keyboard initialization
clrf KBDcnt ; clear IRQ based scan pattern counter
clrf FLAGreg ; clear all flags (keyboard & other)
;*** ENABLE ALL INTERRUPTS ***

movlw b'11111000'
andwf INTCON,F ; clear all interrupt flags

;*** define amount of table items for startup message ***

#define tab_items d'42'
movlw tab_items ; store amount of table items in counter
movwf TEMP3
;*** transmit startup message ***

_ILOOP movlw HIGH WelcomeTable ; get correct page for PCLATH
sublw tab_items ; table offset: w = tab_items - TEMP3
SENDw
goto _ILOOP
;******************************
goto _MLOOP
;******************************
ORG 0x210 ; align table within page
WelcomeTable
addwf PCL,F ; add offset to table base pointer
DT "PIC 16F84 AT Keyboard Decoder connected" ; create table
WTableEND retlw LF ; Line Feed

ENDIF
END

Assembler Source
;**********************************************************************
;
; AT Keyboard Lookup Table
; ========================
;
;
;
;
;
; VERSION:
; ========
; English keyboard layout (QWERTY 'codepage')
;
;
; DESCRIPTION:
; ============
; Keyboard lookup table
;
;**********************************************************************
addwf PCL,F
retlw A'9' ; F9 -> 9 0x01
retlw 0 ;
retlw A'5' ; F5 -> 5
retlw A'3' ; F3 -> 3
retlw A'1' ; F1 -> 1
retlw A'2' ; F2 -> 2
retlw A'2' ; F12 -> 2
retlw 0 ;
retlw A'0' ; F10 -> 0
retlw A'8' ; F8 -> 8 0x0A
retlw A'6' ; F6 -> 6
retlw A'4' ; F4 -> 4
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/eng_main.html (1 of 3)12/02/2008 20:11:34

Assembler Source
retlw 0x09 ; TAB

retlw A'~' ;
retlw 0 ;
retlw 0 ; 0x10
retlw 0 ;
retlw 0 ;
retlw 0 ;
retlw 0 ; 0x19
DT "zsaw2" ;
retlw 0 ;
retlw 0 ; 0x20
DT "cxde43";
retlw 0 ;
retlw 0 ;
retlw A' ' ; SPACE
DT "vftr5" ;
retlw 0 ;
retlw 0 ; 0x30
DT "nbhgy6";
retlw 0 ;
retlw 0 ;
retlw 0 ;
DT "mju78" ;
retlw 0 ;
retlw 0 ; 0x40
DT ",kio09";
retlw 0 ;
retlw 0 ;
DT ".?l;p" ;
retlw A'-' ;
retlw 0 ;
retlw 0 ; 0x50
retlw 0 ;
DT "'" ;
retlw 0 ;
retlw A'[' ;
retlw A'+' ;
retlw 0 ;
retlw 0 ;
retlw 0 ; CAPS LOCK, check and alter CAPflag on key release
goto _SHIFT ; SHIFT
goto _CRLF ; CR,LF 0x5A

Assembler Source
retlw A']' ;
retlw 0 ;
retlw A'|' ;
retlw 0 ;
retlw 0 ;
retlw 0 ;
retlw A'<' ; 0x61
;*** begin compression (scan code - d'14') ***
DT "0.2568"
retlw 0 ; ESCAPE 0x76
retlw 0 ; NUM LOCK
DT "1+3-*9"
retlw 0 ; SCROLL LOCK 0x7E
;*** begin compression (scan code - d'14' + d'35') ***
retlw 0x08 ; BACKSPACE
retlw 0 ;
retlw 0 ;
retlw A'1' ; 0x82
retlw A'7' ;
retlw A'4'
KBDtableEND retlw A'7'
IF (high (KBDtable) != high (KBDtableEND))

ERROR "Keyboard lookup table hits page boundary!"
ENDIF

http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/eng_main.asm
;**********************************************************************
;
; AT Keyboard Main Lookup Table
; =============================
;
;
;
;
; VERSION:
; ========
;
; DESCRIPTION:
; ============
; Keyboard lookup table, 'main' refers to decoding of all keys
; typed without any shift key active.
;
;**********************************************************************
addwf PCL,F
retlw A'9' ; F9 -> 9 0x01
retlw 0 ;
retlw A'5' ; F5 -> 5
retlw A'3' ; F3 -> 3
retlw A'1' ; F1 -> 1
retlw A'2' ; F2 -> 2
retlw A'2' ; F12 -> 2
retlw 0 ;
retlw A'0' ; F10 -> 0
retlw A'8' ; F8 -> 8 0x0A
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/eng_main.asm (1 of 3)12/02/2008 20:11:38

retlw A'6' ; F6 -> 6

retlw A'4' ; F4 -> 4
retlw 0x09 ; TAB
retlw A'~' ;
retlw 0 ;
retlw 0 ; 0x10
retlw 0 ;
retlw 0 ;
retlw 0 ;
retlw 0 ; 0x19
DT "zsaw2" ;
retlw 0 ;
retlw 0 ; 0x20
DT "cxde43";
retlw 0 ;
retlw 0 ;
retlw A' ' ; SPACE
DT "vftr5" ;
retlw 0 ;
retlw 0 ; 0x30
DT "nbhgy6";
retlw 0 ;
retlw 0 ;
retlw 0 ;
DT "mju78" ;
retlw 0 ;
retlw 0 ; 0x40
DT ",kio09";
retlw 0 ;
retlw 0 ;
DT ".?l;p" ;
retlw A'-' ;
retlw 0 ;
retlw 0 ; 0x50
retlw 0 ;
DT "'" ;
retlw 0 ;
retlw A'[' ;
retlw A'+' ;

retlw 0 ;
retlw 0 ;
goto _SHIFT ; SHIFT
retlw A']' ;
retlw 0 ;
retlw A'|' ;
retlw 0 ;
retlw 0 ;
retlw 0 ;
retlw A'<' ; 0x61
DT "0.2568"
retlw 0 ; NUM LOCK
DT "1+3-*9"
retlw 0 ;
retlw 0 ;
retlw A'1' ; 0x82
retlw A'7' ;
retlw A'4'

ENDIF

Assembler Source
;**********************************************************************
;
; AT Keyboard Lookup Table
; ========================
;
;
;
;
;
; VERSION:
; ========
; Modified SWISS-GERMAN keyboard layout (QWERTZ 'codepage')
;
;
; DESCRIPTION:
; ============
; Keyboard lookup table
;
;**********************************************************************
addwf PCL,F
retlw A'9' ; F9 -> 9 0x01
retlw 0 ;
retlw A'5' ; F5 -> 5
retlw A'3' ; F3 -> 3
retlw A'1' ; F1 -> 1
retlw A'2' ; F2 -> 2
retlw A'2' ; F12 -> 2
retlw 0 ;
retlw A'0' ; F10 -> 0
retlw A'8' ; F8 -> 8 0x0A
retlw A'6' ; F6 -> 6
retlw A'4' ; F4 -> 4
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/ger_main.html (1 of 3)12/02/2008 20:11:46

Assembler Source
retlw 0x09 ; TAB

retlw A'' ;
retlw 0 ;
retlw 0 ; 0x10
retlw 0 ;
retlw 0 ;
retlw 0 ;
retlw 0 ; 0x19
DT "ysaw2" ;
retlw 0 ;
retlw 0 ; 0x20
DT "cxde43";
retlw 0 ;
retlw 0 ;
retlw A' ' ; SPACE
DT "vftr5" ;
retlw 0 ;
retlw 0 ; 0x30
DT "nbhgz6";
retlw 0 ;
retlw 0 ;
retlw 0 ;
DT "mju78" ;
retlw 0 ;
retlw 0 ; 0x40
DT ",kio09";
retlw 0 ;
retlw 0 ;
DT ".-lp'";
retlw 0 ;
retlw 0 ; 0x50
retlw 0 ;
retlw A'' ;
retlw 0 ;
retlw A'' ;
retlw A'^' ;
retlw 0 ;
retlw 0 ;
goto _SHIFT ; SHIFT
retlw A'!' ;

Assembler Source
retlw 0 ;
retlw A'$' ;
retlw 0 ;
retlw 0 ;
retlw 0 ;
retlw A'<' ; 0x61
DT "0.2568"
retlw 0 ; NUM LOCK
DT "1+3-*9"
retlw 0 ;
retlw 0 ;
retlw A'1' ; 0x82
retlw A'7' ;
retlw A'4'

ENDIF

http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/ger_main.asm
;**********************************************************************
;
; AT Keyboard Main Lookup Table
; =============================
;
;
;
;
; VERSION:
; ========
;
; DESCRIPTION:
; ============
; Keyboard lookup table, 'main' refers to decoding of all keys
; typed without any shift key active.
;
;**********************************************************************
addwf PCL,F
retlw A'9' ; F9 -> 9 0x01
retlw 0 ;
retlw A'5' ; F5 -> 5
retlw A'3' ; F3 -> 3
retlw A'1' ; F1 -> 1
retlw A'2' ; F2 -> 2
retlw A'2' ; F12 -> 2
retlw 0 ;
retlw A'0' ; F10 -> 0
retlw A'8' ; F8 -> 8 0x0A
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/ger_main.asm (1 of 3)12/02/2008 20:11:49

retlw A'6' ; F6 -> 6

retlw A'4' ; F4 -> 4
retlw 0x09 ; TAB
retlw A'' ;
retlw 0 ;
retlw 0 ; 0x10
retlw 0 ;
retlw 0 ;
retlw 0 ;
retlw 0 ; 0x19
DT "ysaw2" ;
retlw 0 ;
retlw 0 ; 0x20
DT "cxde43";
retlw 0 ;
retlw 0 ;
retlw A' ' ; SPACE
DT "vftr5" ;
retlw 0 ;
retlw 0 ; 0x30
DT "nbhgz6";
retlw 0 ;
retlw 0 ;
retlw 0 ;
DT "mju78" ;
retlw 0 ;
retlw 0 ; 0x40
DT ",kio09";
retlw 0 ;
retlw 0 ;
DT ".-lp'";
retlw 0 ;
retlw 0 ; 0x50
retlw 0 ;
retlw A'' ;
retlw 0 ;
retlw A'' ;
retlw A'^' ;
retlw 0 ;

retlw 0 ;
goto _SHIFT ; SHIFT
retlw A'!' ;
retlw 0 ;
retlw A'$' ;
retlw 0 ;
retlw 0 ;
retlw 0 ;
retlw A'<' ; 0x61
DT "0.2568"
retlw 0 ; NUM LOCK
DT "1+3-*9"
retlw 0 ;
retlw 0 ;
retlw A'1' ; 0x82
retlw A'7' ;
retlw A'4'

ENDIF

Assembler Source
;**********************************************************************
;
; AT Keyboard SHIFT Lookup Table
; ==============================
;
;
;
;
;
; VERSION:
; ========
;
;
; DESCRIPTION:
; ============
; Keyboard lookup table for special characters typed with SHIFT
; button active.
;
;**********************************************************************
KBDSHIFTtable ; some of the items are located here with 'compressed' offset
addwf PCL,F
DT "&*$#<" ; 0x3D - 0x41
retlw 0 ;
retlw 0 ;
DT ")(" ; 0x45 - 0x46
retlw 0 ;
DT "%>/" ; 0x48 - 0x4A
retlw 0 ;
retlw A':' ; "\" 0x4C
retlw 0 ;
DT "_`^" ; 0x4E - 0x50
retlw 0 ;
retlw A'"' ; 0x52
retlw 0 ;
DT "{=" ; 0x54 - 0x55
retlw 0 ;
retlw A'!' ; 0x57
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/eng_shif.html (1 of 2)12/02/2008 20:11:55

Assembler Source
retlw 0 ;
retlw 0 ;
retlw 0 ;
retlw A'}' ; 0x5B
retlw 0 ;
retlw 0x5C ; 0x5D
retlw 0 ;
retlw A'@' ; 0x5F
retlw 0 ;
KBDSHIFTtableEND retlw A'>' ; 0x61 (not used in english but left for completion)
IF (high (KBDSHIFTtable) != high (KBDSHIFTtableEND))

ERROR "Keyboard lookup SHIFTtable hits page boundary!"
ENDIF
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/eng_shif.html (2 of 2)12/02/2008 20:11:55

http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/eng_shif.asm
;**********************************************************************
;
; AT Keyboard Shift Lookup Table
; ==============================
;
;
;
;
; VERSION:
; ========
;
; DESCRIPTION:
; ============
; button active.
;
;**********************************************************************
addwf PCL,F
DT "&*$#<" ; 0x3D - 0x41
retlw 0 ;
retlw 0 ;
DT ")(" ; 0x45 - 0x46
retlw 0 ;
DT "%>/" ; 0x48 - 0x4A
retlw 0 ;
retlw A':' ; "\" 0x4C
retlw 0 ;
DT "_`^" ; 0x4E - 0x50
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/eng_shif.asm (1 of 2)12/02/2008 20:11:59

http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/eng_shif.asm
retlw 0 ;
retlw A'"' ; 0x52
retlw 0 ;
DT "{=" ; 0x54 - 0x55
retlw 0 ;
retlw A'!' ; 0x57
retlw 0 ;
retlw 0 ;
retlw 0 ;
retlw A'}' ; 0x5B
retlw 0 ;
retlw 0x5C ; 0x5D
retlw 0 ;
retlw A'@' ; 0x5F
retlw 0 ;
KBDSHIFTtableEND retlw A'>' ; 0x61 (not used in english but left for completion)

ENDIF
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/eng_shif.asm (2 of 2)12/02/2008 20:11:59

Assembler Source
;**********************************************************************
;
; AT Keyboard SHIFT Lookup Table
; ==============================
;
;
;
;
;
; VERSION:
; ========
;
;
; DESCRIPTION:
; ============
; button active.
;
;**********************************************************************
addwf PCL,F
DT "/(#*;" ; 0x3D - 0x41
retlw 0 ;
retlw 0 ;
DT "=)" ; 0x45 - 0x46
retlw 0 ;
DT "%:_" ; 0x48 - 0x4A
retlw 0 ;
retlw 0x5C ; "\" 0x4C
retlw 0 ;
DT "?@&" ; 0x4E - 0x50 (replaced by #)
retlw 0 ;
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/ger_shif.html (1 of 2)12/02/2008 20:12:02

Assembler Source
retlw '{' ; 0x52

retlw 0 ;
DT "[~" ; 0x54 - 0x55
retlw 0 ;
retlw A'+' ; 0x57
retlw 0 ;
retlw 0 ;
retlw 0 ;
retlw A']' ; 0x5B
retlw 0 ;
retlw A'}' ; 0x5D
retlw 0 ;
retlw A'"' ; 0x5F
retlw 0 ;
KBDSHIFTtableEND retlw A'>' ; 0x61

ENDIF
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/ger_shif.html (2 of 2)12/02/2008 20:12:02

http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/ger_shif.asm
;**********************************************************************
;
; AT Keyboard Shift Lookup Table
; ==============================
;
;
;
;
; VERSION:
; ========
;
; DESCRIPTION:
; ============
; button active.
;
;**********************************************************************
addwf PCL,F
DT "/(#*;" ; 0x3D - 0x41
retlw 0 ;
retlw 0 ;
DT "=)" ; 0x45 - 0x46
retlw 0 ;
DT "%:_" ; 0x48 - 0x4A
retlw 0 ;
retlw 0x5C ; "\" 0x4C
retlw 0 ;
DT "?@&" ; 0x4E - 0x50 (replaced by @)
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/ger_shif.asm (1 of 2)12/02/2008 20:12:06

http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/ger_shif.asm
retlw 0 ;
retlw '{' ; 0x52
retlw 0 ;
DT "[~" ; 0x54 - 0x55
retlw 0 ;
retlw A'+' ; 0x57
retlw 0 ;
retlw 0 ;
retlw 0 ;
retlw A']' ; 0x5B
retlw 0 ;
retlw A'}' ; 0x5D
retlw 0 ;
retlw A'"' ; 0x5F
retlw 0 ;
KBDSHIFTtableEND retlw A'>' ; 0x61

ENDIF
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/ger_shif.asm (2 of 2)12/02/2008 20:12:06

http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/kbd_104_eng.hex
:020000040000FA
:10000000831603138101E0298B138B1B04289600B0
:10001000030E970083010A0898008A0183130408DD
:1000200099009308031D1728051A3328362813084A
:10003000083C031C2328051E9413051A9417031962
:100040003628940C36281308093C031C2828362827
:10005000051E33281017831603130610831203138B
:1000600006100B123428940193013728930A8B1041
:100070001908840018088A00170E8300960E160EC1
:10008000090014089500F03C031D492810141011B4
:100090002829101CE32810101408123C03195328B7
:1000A0001408593C031990101408583C031D5E288D
:1000B000901D5C2890112829901528291408113CBE
:1000C000031D6428101236291408143C031D282926
:1000D00090123629820700343934003435343334F1
:1000E0003134323432340034303438343634343409
:1000F00009347E3400340034322930290034342964
:10010000713431340034003400347A34733461345F
:1001100077343234003400346334783464346534F2
:100120003434333400340034203476346634743458
:1001300072343534003400346E34623468346734D9
:10014000793436340034003400346D346A34753414
:1001500037343834003400342C346B3469346F3421
:1001600030343934003400342E343F346C343B3472
:1001700070342D34003400340034273400345B34C0
:100180002B34003400340034302924295D34003409
:100190007C340034003400343C3430342E34323477
:1001A0003534363438340034003431342B3433347D
:1001B0002D342A34393400340834003400343134D6
:1001C000373434343734101DF12814084A3C031DE9
:1001D000EC282F309400212914085A3C0318F128E8
:1001E00028291408613C031807290E3094021408CA
:1001F000613C031CFE281930940707291408773C3A
:10020000031807291408D23C0319101528290030B7
:100210008A0014086A2094009408031928291408F5
:10022000603C0318372914087A3C031C372914084A
:1002300090191D29901C21291F2990182129E03E81
:1002400094001408A72128290D30A7210A3008009E
:100250008316031306148312031310130B160800DE
:100260009014003410160034901600342829901C85
:10027000212914080D3C031821291508613C031C91
:10028000212915083C3C031848293D309502512985
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/kbd_104_eng.hex (1 of 2)12/02/2008 20:12:13

:100290001508243C03184F292330950251290430B6
:1002A000950701308A0015085721940021298207FB
:1002B00026342A34243423343C34003400340034CB
:1002C00029342834003425343E342F3400343A3471
:1002D00000345F3460345E340034223400347B34C4
:1002E0003D34003421340034003400347D34003493
:0A02F0005C340034403400343E3426
:100320008C00810183160313C030810508008C0006
:10033000810183160313C0308105013081048312CB
:1003400003130B110B1DA2298C0BA129080091008E
:10035000051008308C00B82111180514111C051067
:10036000910CB8218C0BAC290514B821B8210800D8
:100370001D308D00BE2908308D00BE298D0BBE2991
:060380000800920137287D
:1003C0000510831203130514831603130614051670
:1003D0000113831203130B1693019001F8308B0560
:1003E0008B172A308E0002308A000E082A3C102219
:0C03F000A7218E0BF329101B4120FB29D4
:10042000820750344934433420343134363446342E
:100430003834343420344134543420344B3465342B
:10044000793462346F346134723464342034443427
:10045000653463346F346434653472342034633407
:100460006F346E346E34653463347434653464349C
:060470000D340A340A34C9
:02400E00F13F80
:00000001FF

http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/kbd_104_sg.hex
:020000040000FA
:10000000831603138101E0298B138B1B04289600B0
:10001000030E970083010A0898008A0183130408DD
:1000200099009308031D1728051A3328362813084A
:10003000083C031C2328051E9413051A9417031962
:100040003628940C36281308093C031C2828362827
:10005000051E33281017831603130610831203138B
:1000600006100B123428940193013728930A8B1041
:100070001908840018088A00170E8300960E160EC1
:10008000090014089500F03C031D492810141011B4
:100090002829101CE32810101408123C03195328B7
:1000A0001408593C031990101408583C031D5E288D
:1000B000901D5C2890112829901528291408113CBE
:1000C000031D6428101236291408143C031D282926
:1000D00090123629820700343934003435343334F1
:1000E0003134323432340034303438343634343409
:1000F0000934A7340034003432293029003434293B
:100100007134313400340034003479347334613460
:1001100077343234003400346334783464346534F2
:100120003434333400340034203476346634743458
:1001300072343534003400346E34623468346734D9
:100140007A3436340034003400346D346A34753413
:1001500037343834003400342C346B3469346F3421
:1001600030343934003400342E342D346C34F634C9
:1001700070342734003400340034E4340034FC3468
:100180005E34003400340034302924292134003412
:1001900024340034003400343C3430342E343234CF
:1001A0003534363438340034003431342B3433347D
:1001B0002D342A34393400340834003400343134D6
:1001C000373434343734101DF12814084A3C031DE9
:1001D000EC282F309400212914085A3C0318F128E8
:1001E00028291408613C031807290E3094021408CA
:1001F000613C031CFE281930940707291408773C3A
:10020000031807291408D23C0319101528290030B7
:100210008A0014086A2094009408031928291408F5
:10022000603C0318372914087A3C031C372914084A
:1002300090191D29901C21291F2990182129E03E81
:1002400094001408A72128290D30A7210A3008009E
:100250008316031306148312031310130B160800DE
:100260009014003410160034901600342829901C85
:10027000212914080D3C031821291508613C031C91
:10028000212915083C3C031848293D309502512985
http://www.trash.net/~luethi/microchip/projects/keyboard/v1xx/kbd_104_sg.hex (1 of 2)12/02/2008 20:12:20

:100290001508243C03184F292330950251290430B6
:1002A000950701308A0015085721940021298207FB
:1002B0002F34283423342A343B34003400340034BF
:1002C0003D342934003425343A345F3400345C340E
:1002D00000343F344034263400347B3400345B3403
:1002E0007E3400342B340034003400345D34003468
:0A02F0007D340034223400343E3423
:100320008C00810183160313C030810508008C0006
:10033000810183160313C0308105013081048312CB
:1003400003130B110B1DA2298C0BA129080091008E
:10035000051008308C00B82111180514111C051067
:10036000910CB8218C0BAC290514B821B8210800D8
:100370001D308D00BE2908308D00BE298D0BBE2991
:060380000800920137287D
:1003C0000510831203130514831603130614051670
:1003D0000113831203130B1693019001F8308B0560
:1003E0008B172A308E0002308A000E082A3C102219
:0C03F000A7218E0BF329101B4120FB29D4
:10042000820750344934433420343134363446342E
:100430003834343420344134543420344B3465342B
:10044000793462346F346134723464342034443427
:10045000653463346F346434653472342034633407
:100460006F346E346E34653463347434653464349C
:060470000D340A340A34C9
:02400E00F13F80
:00000001FF

1 2 3 4
PIC16F84 MAX232
D D
VDD
XT1
R1 VDD
10k 4.000 MHz VSS

C1 C2
C4
10p 10p C3
S1 VDD 10u
10u
VSS VSS
SW-PB
14
C5
16
2
6
U1
16 15 U2
VDD
4 7 13 12
V+
VCC
V-
MCLR RB1 R1 IN R1 OUT
17 8 RS232 8 9 5V
C PIC TXD RA0 RB2 R2 IN R2 OUT C
18 9 11 14
RA1 RB3 PIC TXD T1 IN T1 OUT RS232 RXD
1 10 5V 10 7 RS232
RA2 RB4 T2 IN T2 OUT
2 11 1 4
GND
RA3 RB5 C1+ C2+
3 12 3 5
KBD_Data RA4/T0CKI RB6 C1 - C2 -
VSS
6 13
KBD_Clk RB0/INT RB7
C6 MAX232CPE(16) C7
PIC16F84-04/P(18) 10u 10u
15
5
VDD
VDD
VSS VSS
VDD
C8
B 100n VDD B
VSS
C9
VSS
100n
VDD VSS
VSS
PS/2 Connector R2
RS232 SUB1
10k 5
VSS
R3 9
J1
10k 4
1 KBD_Data (Direction seen from host) 8
2 3
3 VSS 7 Title
4 VDD
RS232 RXD
2 AT Keyboard Interface with PIC16F84
5 KBD_Clk 6
A 6 1 A
Written by Date
16-Aug-2003
CON6 Peter Luethi
DB9 Revision Page
1 2 3 4
;***************************************************************************
;
; AT Keyboard Interface V2.04 (with LCD Display)
; ===============================================
;
;
; latest LCD modules. Re-structured ISR, added label
; _ISR_RS232error
; (17.04.2004)
;
; Fixed ALT-DEC and CTRL-HEX issue on right side keys.
; Added special LCD treatment for 'tabulator' key.
; (14.08.2003)
;
; V2.02: Implemented support for ASCII conversion from direct ALT-DEC
; and CTRL-HEX entries. Accepts both keypad and keyboard
; numbers, as well as upper and lower case letters [a..f].
; (02.01.2002)
;
; V2.01: Implemented host to keyboard transmission. Bi-directional
; communication between controller and keyboard is now
; possible, for configuration purposes and to control the
; keyboard LEDs. (31.03.2001)
;
;
;
;
;

; SPECIFICATIONS:
; ===============
; Keyboard Routine Features: Capability of bi-directional
; and keyboard (keys & LEDs)
; (incl. LCD display and RS232 activities)
; Required Hardware: AT Keyboard, MAX 232,
; HD44780 compatible dot matrix LCD
;
;
; ABSTRACT:
; =========
; RS232 transmission protocol. Support of english (QWERTY) and modified
; swiss-german (QWERTZ) 'codepages'. This implementation features a dot
; matrix LCD display as visual interface, but only for transmitted
; characters typed on the local keyboard (unidirectional data flow).
;
;
; DESCRIPTION:
; ============
; ASCII characters and transmits them to the personal computer across
; the RS232 link.
; This program features also the capability of bi-directional
; communication between controller and keyboard for configuration
; purposes and to control the keyboard LEDs.
;


;
; In case you want RS232 reception and keyboard decoding simultaneously,
; you'll have to configure either the keyboard clock line or the RS232
; RX data line to another separate interrupt source and to alter the
; RS232 data fetch interface to a preemptive one. But then you'll also
; run into troubles by using the LCD modules, because they are written
; to work on entire 8 bit ports (such as PORTB on 16XXX, and PORTC &
; PORTD on 16X74).
; So if you really appreciate to run the RS232 terminal entirely on a
; PIC 16X84 - from a technical perspective it is possible - you'll have
; to rewrite the LCD modules and the software RS232 reception routine.
; Be aware that there won't be a lot of code space remaining for other
; enhancements after putting all terminal related stuff onto the 16X84.
;
;
;
; =====================
; - Bi-directional communication between microcontroller and keyboard.
; - Bi-directional communication between microcontroller and LCD
; display.
; - Visualization of transmitted characters on local LCD.
; - Parametrizable LCD display width: constant 'LCDwidth'
; and inactive.


; - Support of ASCII conversion from direct ALT-DEC entries, e.g.
; ALT + 6 + 4 = @ (ALT + [1..3] numbers)
; - Support of ASCII conversion from direct CTRL-HEX entries, e.g.
; CTRL + 3 + F = ? (CTRL + [1..2] letters/numbers)
; - ALT-DEC and CTRL-HEX features work for both, keypad and keyboard
; numbers, as well as with upper and lower case letters [a..f]
;
;
;
; LIMITATIONS:
; ============
;
;
; NOTE:
; =====
;
;
; CREDITS:
; ========
;
;***************************************************************************


PROCESSOR 16F84



LCDport equ PORTB

LCDtris equ TRISB
#define LCDwidth d'40' ; define character width of LCD
; display

CONSTANT LF = d'10' ; line feed
CONSTANT CR = d'13' ; carriage return
CONSTANT TAB = d'9' ; tabulator
CONSTANT BS = d'8' ; backspace
CONSTANT SL = d'0' ; control bit for keyboard scroll lock LED
CONSTANT NL = d'1' ; control bit for keyboard num lock LED
CONSTANT CL = d'2' ; control bit for keyboard caps lock LED
TEMP1 set BASE+d'0' ; Universal temporary register

TEMP2 set BASE+d'1' ; ATTENTION !!!
TEMP3 set BASE+d'2' ; They are used by various modules.
TEMP4 set BASE+d'3' ; If you use them, make sure not to use
TEMP5 set BASE+d'4' ; them concurrently !

TEMP6 set BASE+d'5'

TEMP7 set BASE+d'6'

FLAGreg2 equ BASE+d'8'



#define KBDtxf FLAGreg,0x07 ; keyboard transmission flag
#define PARITY FLAGreg2,0x00 ; parity bit to be calculated
#define KBDexpf FLAGreg2,0x01 ; keyboard expect function flag
#define LCDbusy FLAGreg2,0x02 ; LCD busy flag
#define LCDcflag FLAGreg2,0x03 ; LCD command/data flag
#define LCD_ln FLAGreg2,0x04 ; LCD line flag: 0 = line 1, 1 = line 2
KBDleds equ BASE+d'18' ; keyboard LEDs' status register
KBDexpval set BASE+d'3' ; temporary KBD expected response value
LCDpos equ BASE+d'19' ; LCD output position counter
CTRLcnt equ BASE+d'20' ; counter for CTRL/ALT stuff

CTRLreg1 equ BASE+d'21' ; storage registers for ALT-DEC and
CTRLreg2 equ BASE+d'22' ; CTRL-HEX conversion routines
CTRLreg3 equ BASE+d'23'
ORG 0xC0


#include "..\..\m_lcd_bf.asm"
;***** MACROS *****
KEYBOARDinit macro
BANK1
BANK0
endm
KBDcmd macro _KBDcmd ; this macro transmits the literal _KBDcmd

movlw _KBDcmd ; to the AT keyboard
movwf KBD
call ODDpar ; calculate odd parity of TX data
call KBDcomd ; transmit contents of KBD reg. to keyboard
endm
KBDcmdw macro ; this macro transmits the value of w to the

movwf KBD ; AT keyboard
endm
KBDexp macro _KBDresp ; keyboard expect function: busy wait for kbd response
movlw _KBDresp ; load expected kbd response
call KBDexpt
endm
KBDcomd ;*** host to keyboard command transmission ***

bcf KBDdatatris ; set data line to output
BANK0
bcf KBDclkpin ; set keyboard clk line low
bcf KBDdatapin ; set keyboard data line low
movlw 0x20 ; load temporary counter
movwf TEMP1

_KBDtx1 decfsz TEMP1,F ; wait loop: approx. 60 us @ 4 MHz

goto _KBDtx1 ; loop
clrf KBDcnt ; init kbd scan pattern acquisition counter
BANK1
bsf KBDclktris ; release keyboard clk line, set to input
BANK0
bsf KBDtxf ; set keyboard TX flag
_KBDtx2 btfsc KBDtxf ; wait loop: poll for completion
goto _KBDtx2 ; not yet completed, loop
RETURN
ODDpar ;*** odd parity = NOT(XOR(bits[0..7])) ***

movwf TEMP3 ; target, which the parity bit is built from
movlw 0x08
movwf TEMP4 ; loop counter
clrf TEMP5 ; the ones' counter / bit counter
_ODDpar btfsc TEMP3,0x00 ; check for ones
incf TEMP5,F ; increment ones' counter
rrf TEMP3,F
decfsz TEMP4,F ; decrement loop counter
goto _ODDpar
bcf PARITY ; clear parity
btfss TEMP5,0x00 ; check ones' counter for even value
bsf PARITY ; if even, set parity bit (= odd parity)
RETURN
KBDexpt ;*** keyboard expect function: busy wait for kbd response ***
movwf KBDexpval ; load expected kbd response to KBDexpval
bsf KBDexpf ; set flag
_KBDexp btfsc KBDexpf ; wait loop: poll for completion
goto _KBDexp ; not yet completed, loop
RETURN
LCDchgln ; change alternating between LCD line 1 and 2

movlw LCDwidth ; get LCD character width
movwf LCDpos ; and store in position counter
btfss LCD_ln ; check LCD line flag
goto _line2 ; if cleared, goto line 2
_line1 LCD_DDAdr 0x00 ; move cursor to beginning of first line
bcf LCD_ln ; clear flag
_cl_1 LCDchar ' ' ; put subsequent blanks on LCD to clear line
decfsz LCDpos,F ; decrement counter

goto _cl_1
LCD_DDAdr 0x00 ; reset cursor to beginning of line
clrf LCDpos ; reset LCD position counter
RETURN
_line2 LCD_DDAdr 0x40 ; move cursor to beginning of second line
bsf LCD_ln ; set flag
goto _cl_2
RETURN
ISR ;************************
;************************

goto ISR
;**************************
;**************************

; NOT NECESSARY WITHIN THIS PROGRAM
;btfsc INTCON,INTF ; check RB0/INT interrupt flag
;goto _ISR_KBD ; if set, it was a keyboard interrupt

_ISR_KBD ;*** check origin of keyboard interrupt ***

btfss KBDtxf ; check keyboard TX flag
goto _ISR_KBDacq ; if cleared, keyboard data acquisition,
;goto _ISR_KBDxmit ; else keyboard data transmission
;******************************************
;*** HOST TO KEYBOARD DATA TRANSMISSION ***
;******************************************
_ISR_KBDxmit
;*** data transmission ***
movfw KBDcnt ; get kbd scan pattern acquisition counter
bnc _KBDparo ; branch if negative (carry == 0)
btfss KBD,0x00 ; serial transmission of keyboard data
bcf KBDdatapin
btfsc KBD,0x00
bsf KBDdatapin
rrf KBD,F ; rotate right keyboard TX data register
goto _INCF ; exit
;*** parity transmission ***

_KBDparo movfw KBDcnt ; get kbd scan pattern acquisition counter
bnc _KBDrel ; branch if negative (carry == 0)
btfss PARITY ; put parity bit on keyboard data line
bcf KBDdatapin
btfsc PARITY
bsf KBDdatapin
goto _INCF ; exit
;*** data and parity transmission completed, turn around cycle ***
_KBDrel movfw KBDcnt ; get kbd scan pattern acquisition counter
bnc _KBDack ; branch if negative (carry == 0)
BANK1
bsf KBDdatatris ; release keyboard data line, set to input
BANK0
goto _INCF ; exit
_KBDack movfw KBDcnt ; get kbd scan pattern acquisition counter

bnc _INCF ; exit if negative (carry == 0)
clrf KBDcnt ; reset kbd scan pattern acquisition counter

bcf KBDtxf ; clear keyboard transmission flag

goto _KBDend
;*****************************************
;*****************************************
_ISR_KBDacq
tstf KBDcnt ; check
goto _INCF ; exit

btfsc KBDdatapin
bsf KBD,0x07
goto _INCF ; exit

goto _INCF ; exit

btfsc KBDexpf ; check for active expect function flag
goto _KBDchk ; if set, goto expect value checking routine
BANK0


_KBDchk movfw KBDexpval
subwf KBD,W ; w = KBD - w
bnz _KBDabort ; check zero flag, branch should never occur
bcf KBDexpf ; clear flag
goto _KBDend ; exit ISR successfully

;***********************************
;***********************************

_ISR_RS232error
;*****************************************
;*****************************************


KBDdecode
;**********************************************************
;**********************************************************

bz _clrSHI ; if zero, branch (to next check)
bnz _clrALT ; if not zero, branch (to next check)
bcf CAPflag ; clear caps lock flag
;*** switch keyboard's caps lock LED off ***
bcf KBDleds,CL ; clear caps lock bit


_setCAP bsf CAPflag ; set caps lock flag
;*** switch keyboard's caps lock LED on ***
bsf KBDleds,CL ; set caps lock bit
;****************************************************
;* further down. *
;****************************************************
;*********************************************************************
;*********************************************************************
ORG 0x361 ; if necessary, move table

;****************************************************


;****************************************************
ORG 0x190 ; move, if necessary
;********************************
;********************************
btfss SPEflag
goto _KBD_3
; check for ALT-DEC or CTRL-HEX activity
btfsc ALTflag
goto _KBD_3
btfsc CTRLflag
goto _KBD_3
movfw KBD
movwf KBD
goto _OUTP
movfw KBD
; it's one of the following keys: arrow button (up, dn, rt, lt), 'Home',
; 'Del', 'PageUp', 'PageDown', 'Insert', 'End'
goto _ClrStall
movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'14'

movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'25'
goto KBD_dec
movfw KBD
sublw 0x77 ; 0x77 - w
movfw KBD
;*******************************************************
;*******************************************************

movfw KBD

btfsc ALTflag ; check flag
goto _ALTstr ; jump if set

btfsc CTRLflag ; check flag
goto _CTRLstr ; jump if set

movfw KBD
sublw 0x60 ; 0x60 - w

movfw KBD
movfw KBD
movwf KBD
;***************************************************
;*** KEYBOARD DATA OUTPUT TO RS232 & LCD DISPLAY ***
;***************************************************
_OUTP ;*** RS232 ***

movfw KBD
;*** LCD: treat 'backspace' as special case ***
movfw KBD ; check for backspace (d'8')
BNEQ d'8', _TAB ; branch if KBD != 8
;*** it is now a 'backspace' ***
movfw LCDpos ; load actual LCD cursor position
skpz ; check for position zero, skip if so
decf LCDpos,F ; decrement LCD cursor position
movfw LCDpos ; move cursor position to w
goto _LCDmsk ; if currently at line 1, goto mask
addlw 0x40 ; else, add offset (LCD line 2)
_LCDmsk iorlw b'10000000' ; mask
movwf TEMP6 ; store LCD DDRAM address pattern
call LCDcomd ; call LCD command subroutine
LCDchar ' ' ; overwrite displayed character with blank
movfw TEMP6 ; read back LCD DDRAM address pattern
goto _ClrStall ; exit
_TAB ;*** LCD: treat 'tabulator' as special case ***
movfw KBD ; check for tabulator (d'9')
BNEQ d'9', _chkLn ; branch if KBD != 9

;*** it is now a 'tabulator', just add one extra space ***

movfw LCDpos ; get LCD position counter
BREG LCDwidth-0x1, _TAB2 ; check for 'near EOL'
LCDchar ' ' ; add extra space, if not near EOL
incf LCDpos,F ; and increment LCD position counter
_TAB2 movlw a' '
movwf KBD ; store second space in KBD
;*** check for necessary change of LCD line ***
_chkLn movfw LCDpos ; get LCD position counter
BRS LCDwidth, _LCDout ; branch if w < LCDwidth
call LCDchgln ; call LCD change line subroutine
_LCDout incf LCDpos,F ; increment LCD position counter
movfw KBD
;************************************************
;************************************************
_CRLF call LCDchgln ; call LCD change line subroutine

SEND CR ; on "Enter", send CR and LF to RS232
SEND LF
;**********************************************************
;**********************************************************
_ClrStall
BANK1
RETURN
;****************************************************
;****************************************************


goto _alt_2
_alt_2 clrf CTRLcnt ; clear counter for CTRL/ALT conversion stuff
clrf CTRLreg1 ; clear storage registers for CTRL-HEX
clrf CTRLreg2 ; and ALT-DEC conversion routines
clrf CTRLreg3
;***********************************************
;***********************************************
_CTRLstr ; check for capital letter [A..F], i.e. KBD in [0x41..0x46]
movfw KBD
sublw 0x40 ; 0x40 - w
bc _ALTstr ; carry if result >= 0, go to number check
movfw KBD
sublw 0x46 ; 0x46 - w
bnc _CTRLstr2 ; no carry if result negative, go to next check
; valid capital letter [A..F], convert to lower case (+ 0x20)
bsf KBD,0x5 ; KBD += 0x20
goto _CTRLstr3 ; jump for storing
_CTRLstr2 ; check for lower case letter [a..f], i.e. KBD in [0x61..0x66]
movfw KBD
sublw 0x60 ; 0x60 - w
movfw KBD
sublw 0x66 ; 0x66 - w
bc _CTRLstr3 ; carry if result >= 0, valid lower case letter [a..f]
_ALTstr ;*** check for number, i.e. KBD in [0x30..0x39]: ***
movfw KBD
sublw 0x29 ; 0x29 - w
bc _ClrStall ; carry if result >= 0, no number, exit
movfw KBD
sublw 0x39 ; 0x39 - w
bnc _ClrStall ; no carry if result negative, no number, exit
_CTRLstr3 ;*** store letter/number now ***
tstf CTRLcnt
bnz _cnt_1 ; branch if not zero
incf CTRLcnt,F ; increment counter (0->1)
movfw KBD
movwf CTRLreg1 ; store first number
goto _ClrStall ; abort & exit
_cnt_1 decfsz CTRLcnt,W ; decrement counter, don't store

goto _cnt_2 ; counter > 1

movfw KBD
movwf CTRLreg2 ; store second number
_cnt_2 movfw CTRLcnt
sublw 0x02 ; 0x02 - w
bnz _ClrStall ; if result not zero: overflow, abort & exit
movfw KBD
movwf CTRLreg3 ; store third number

tstf CTRLcnt ; check, if counter has been incremented
bz _ClrStall ; if not, abort & exit
movlw 0x30
subwf CTRLreg1,F ; CTRLreg1 = CTRLreg1 - 0x30
;*** check if counter == 1 ***
decf CTRLcnt,F ; decrement counter
bnz _altd_1 ; branch if not zero
movfw CTRLreg1 ; get the only stored value
movwf KBD ; store in output register
goto _altd_3 ; jump
_altd_1 ;*** check if counter == 2 ***
;*** check ok, convert now ***
movlw HIGH BCDtable ; get correct page for PCLATH
;*** 10's in CTRLreg1, 1's in CTRLreg2 ***
movfw CTRLreg1 ; get the first stored value (10's)
call BCDtable ; BCD2BIN conversion through lookup table
addwf CTRLreg2,W ; add value in W to reg 2, store in W
goto _altd_3 ; jump
_altd_2 ;*** else counter >= 3 ***
;*** 100's in CTRLreg1, 10's in CTRLreg2, 1's in CTRLreg3 ***
;*** range check: CTRLreg1 <= 2 ***

sublw 0x02 ; 0x02 - w

bnc _ClrStall ; no carry if result negative, abort & exit
addlw d'10' ; add offset for lookup table
movwf CTRLreg1 ; store new value back to register
movfw CTRLreg2 ; get the second stored value (10's)
addwf CTRLreg1,F ; add value in W to reg 1, and store
movfw CTRLreg3 ; get the third stored value (1's)
addwf CTRLreg1,W ; add both registers, store in W
_altd_3 clrf CTRLcnt ; invalidate counter
goto _OUTP ; output
;*******************************************************
;*******************************************************
;ORG 0x??
BCDtable ; lookup table for BCD2BIN conversion

addwf PCL,F
retlw d'0' ; 0 BCD for 10's
retlw d'10' ; 10
retlw d'20' ; 20
retlw d'30' ; 30
retlw d'40' ; 40
retlw d'50' ; 50
retlw d'60' ; 60
retlw d'70' ; 70
retlw d'80' ; 80
retlw d'90' ; 90
retlw d'100' ; 100
BCDtableEND retlw d'200' ; 200
IF (high (BCDtable) != high (BCDtableEND))

ERROR "Lookup table for BCD2BIN conversion hits page boundary !"
ENDIF


; in CTRLreg1 - 2
movlw 0x30
; if CTRLregs have numbers, now in [1..9]
; if CTRLregs have letters [a..f], now in [0x31..0x36]
; (no plausiblity checks necessary since done during storing)
;*** first register ***
btfss CTRLreg1,0x5 ; in [0x31..0x36], bit 5 is set
goto _ctrh_1 ; it's a number, branch to next check
; it's a letter: subtract offset, result afterwards in [d'10'..d'15']
movlw d'39'
subwf CTRLreg1,F ; CTRLreg1 = CTRLreg1 - W
_ctrh_1 ;*** second register ***
goto _ctrh_2 ; it's a number, branch
movlw d'39'
_ctrh_2 ;*** check if counter == 1 ***
bnz _ctrh_3 ; branch if not zero
goto _ctrh_4 ; jump
_ctrh_3 ;*** else counter >= 2, conversion ***
swapf CTRLreg1,W ; swap nibbles, store in W
iorwf CTRLreg2,W ; merge both registers, store in W
_ctrh_4 clrf CTRLcnt ; invalidate counter
goto _OUTP ; output
;*****************************************************************
;*****************************************************************


btfss SHIflag
goto _OUTP ; branch
movfw KBD
sublw d'13' ; d'13' - w

movfw KBDcopy
sublw 0x61 ; 0x61 - w
movfw KBDcopy
movlw d'61'
goto _SHICH3
sublw 0x24 ; 0x24 - w
movlw d'35'
goto _SHICH3
;*** else ***
_SHICH2 movlw d'4'

movfw KBDcopy
goto _OUTP
;*******************************************************
;*******************************************************

;**********************************************************************
;**********************************************************************
ORG 0x3DA ; if necessary, move table

;************** MAIN **************
MAIN ORG 0x00
BANK1
goto _MAIN
ORG 0x2C0

BANK0

;*** LCD INITIALIZATION ***

LCDinit ; LCD display initialization
movlw LCDwidth
movwf LCDpos ; init LCD output position counter

movlw b'11111000'

;*** AT KEYBOARD INITIALIZATION II ***

movlw b'00000010'
movwf KBDleds ; init keyboard LEDs' status register
clrf FLAGreg ; clear all flags (keyboard & others)
clrf FLAGreg2

movwf TEMP6

movwf TEMP7 ; create backup of fetched item
SENDw ; RS232 output
movfw TEMP7
LCDw ; LCD output
goto _ILOOP
SEND CR ; carriage return
SEND LF ; line feed
SEND LF
;*** reset keyboard ***

KBDcmd 0xFF ; reset keyboard

;*** switch scroll lock LED on (example) ***

bsf KBDleds,SL ; set scroll lock bit


;******************************
goto _MLOOP
;******************************
;ORG 0x??
WelcomeTable
DT "PIC 16F84 AT Keyboard Decoder connecte" ; create table
WTableEND DT "d"

ERROR "WelcomeTable hits page boundary!"
ENDIF
END

http://www.trash.net/~luethi/microchip/projects/keyboard/v2xx/kbd_201.asm
;***************************************************************************
;
; AT Keyboard Interface V2.02b (with LCD Display)
; ================================================
;
;
; V2.02b: Added LCDcflag (LCD command/data flag) to comply with
; latest LCD modules. Re-structured ISR, added label
; _ISR_RS232error
; (19.04.2004)
;
; V2.01b: Changed keyboard data pin to PORTA,4 (open-collector).
; (14.08.2003)
;
; V2.01a: Made forward compatible (yes, this is feasible) by
;
; V2.01: Implemented host to keyboard transmission. Bi-directional
; communication between controller and keyboard is now
; possible, for configuration purposes and to control the
; keyboard LEDs. (31.3.2001)
;
;
;
;
;
; SPECIFICATIONS:
; ===============
http://www.trash.net/~luethi/microchip/projects/keyboard/v2xx/kbd_201.asm (1 of 22)12/02/2008 20:15:08

; communication between controller
; and keyboard
;
;
; ABSTRACT:
; =========
; RS232 transmission protocol. Support of english (QWERTY) and modified
; swiss-german (QWERTZ) 'codepages'. This implementation features an
; LCD display as visual interface, but only for transmitted characters
; typed on the local keyboard (unidirectional data flow).
;
;
; DESCRIPTION:
; ============
; the RS232 link.
;


;
; In case you want RS232 reception and keyboard decoding simultaneously,
; you'll have to configure either the keyboard clock line or the RS232
; RX data line to another separate interrupt source and to alter the
; RS232 data fetch interface to a preemptive one. But then you'll also
; run into troubles by using the LCD modules, because they are written
; to work on entire 8 bit ports (such as PORTB on 16XXX, and PORTC &
; PORTD on 16X74).
; So if you really appreciate to run the RS232 terminal entirely on a
; PIC 16X84 - from a technical perspective it is possible - you'll have
; to rewrite the LCD modules and the software RS232 reception routine.
; Be aware that there won't be a lot of code space remaining for other
; enhancements after putting all terminal related stuff onto the 16X84.
;
;
;
; =====================
; display.
; - Visualization of transmitted characters on local LCD.
; and inactive.
;


; or CTRL + 3 + F = ?
;
;
; LIMITATIONS:
; ============
;
;
; NOTE:
; =====
;
;
; CREDITS:
; ========
;
;***************************************************************************

PROCESSOR 16F84




#define KBDdatatris TRISA,0x04
#define KBDclktris TRISB,0x00
LCDport equ PORTB

LCDtris equ TRISB
; display


TEMP6 set BASE+d'5'
TEMP7 set BASE+d'6'





#define KBDtxf FLAGreg,0x07 ; keyboard transmission flag
ORG 0xC0
;***** MACROS *****
KEYBOARDinit macro
BANK1
bsf KBDclktris ; set input with weak pull-up
bsf KBDdatatris ; set input with weak pull-up
bcf OPTION_REG,INTEDG ; keyboard interrupt on falling edge (INTB)
BANK0

movlw b'11111000'
movlw b'10010000'
iorwf INTCON,F ; enable global & RB0/INT interrupts
endm

movwf KBD
endm

endm
call KBDexpt
endm

BANK0
movwf TEMP1
goto _KBDtx1
BANK1
BANK0


RETURN

movlw 0x08
rrf TEMP3,F
goto _ODDpar
RETURN
RETURN

goto _cl_1
RETURN


goto _cl_2
RETURN
ISR ;************************
;************************

goto ISR
;**************************
;**************************

; NOT NECESSARY WITHIN THIS PROGRAM
;btfsc INTCON,INTF ; check RB0/INT interrupt flag
;goto _ISR_KBD ; if set, it was a keyboard interrupt


;******************************************
;******************************************
_ISR_KBDxmit
bcf KBDdatapin
btfsc KBD,0x00
bsf KBDdatapin
goto _INCF ; exit

bcf KBDdatapin
btfsc PARITY
bsf KBDdatapin
goto _INCF ; exit
BANK1
BANK0
goto _INCF ; exit

goto _KBDend
;*****************************************
;*****************************************

_ISR_KBDacq
tstf KBDcnt ; check
goto _INCF ; exit

btfsc KBDdatapin
bsf KBD,0x07
goto _INCF ; exit

goto _INCF ; exit

BANK0



;***********************************
;***********************************

_ISR_RS232error
;*****************************************
;*****************************************


KBDdecode
;**********************************************************
;**********************************************************



;****************************************************
;* further down. *
;****************************************************
;*********************************************************************
;*********************************************************************

;****************************************************

;****************************************************
;********************************
;********************************
btfss SPEflag
goto _KBD_3
;*** decoding of scan code with preceeding special code (0xE0) ***
movfw KBD
movwf KBD
goto _OUTP
movfw KBD
goto _ClrStall
movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'14'
movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'25'
goto KBD_dec
movfw KBD
sublw 0x77 ; 0x77 - w


movfw KBD
;*******************************************************
;*******************************************************

movfw KBD



movfw KBD
sublw 0x60 ; 0x60 - w
movfw KBD
movfw KBD


movwf KBD
;***************************************************
;***************************************************
_OUTP ;*** RS232 ***

movfw KBD
sublw d'8' ; d'8' - w
bnz _chkLn ; if not zero, branch
;*** it is now a backspace ***
sublw LCDwidth - 1 ; w = LCDwidth - 1 - w
bc _LCDout ; branch if res positive or zero
movfw KBD

;************************************************
;************************************************

SEND LF
;**********************************************************
;**********************************************************
_ClrStall
BANK1
RETURN
;****************************************************
;****************************************************



;***********************************************
;***********************************************



; in CTRLreg1 - 2

;*****************************************************************
;*****************************************************************
btfss SHIflag
goto _OUTP ; branch
movfw KBD
sublw d'13' ; d'13' - w

movfw KBDcopy
sublw 0x61 ; 0x61 - w
movfw KBDcopy
movlw d'61'
goto _SHICH3
sublw 0x24 ; 0x24 - w
movlw d'35'
goto _SHICH3

;*** else ***

_SHICH2 movlw d'4'

movfw KBDcopy
goto _OUTP
;*******************************************************
;*******************************************************
;**********************************************************************
;**********************************************************************

;************** MAIN **************
MAIN ORG 0x00

clrf FLAGreg2
goto _MAIN
ORG 0x230
_MAIN KEYBOARDinit ; Keyboard initialization

movlw b'00000010'


movlw LCDwidth
;*** RS232 INITIALIZATION ***

BANK1
BANK0

movwf TEMP6

movfw TEMP7
LCDw ; LCD output
goto _ILOOP
SEND LF ; line feed
SEND LF





;******************************
goto _MLOOP
;******************************
;ORG 0x310
WelcomeTable
WTableEND DT "d"

ENDIF
END

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1 2 3 4
PIC16F84 MAX232
VDD
D XT1 D
R1 VDD
VSS
10k C1 4.000 MHz C2 C4
C3
10p 10p 10u
S1 VDD 10u
VSS VSS
16
SW-PB
2
6
14
C5 U2
U1
13 12
V+
VCC
V-
16 15 R1 IN R1 OUT
VDD
VSS 4n7 OSC1/CLKIN OSC2/CLKOUT RS232 8 9 5V
4 7 D4 R2 IN R2 OUT
MCLR RB1 11 14
17 8 D5 PIC TXD T1 IN T1 OUT RS232 RXD
PIC TXD RA0 RB2 5V 10 7 RS232
18 9 D6 T2 IN T2 OUT
C RA1 RB3 1 4 C
GND
1 10 D7 C1+ C2+
RA2 RB4 3 5
2 11 E C1 - C2 -
RA3 RB5
3 12 R/W
KBD_Data RA4/T0CKI VSS RB6 C6 MAX232CPE(16) C7
6 13 RS
KBD_Clk RB0/INT RB7 10u 10u
15
PIC16F84-04/P(18)
5
VSS
VDD
VDD
VSS SUB1 VDD
C8
5
100n VSS VDD
B
VSS
LCD D4
D4 RS232 9
4 C9 B
VSS D5
LCD D5 8 100n
(Direction seen from host) VSS
D6 3
VDD LCD D6
7 VSS
D7
LCD D7 2
RS232 RXD
PS/2 Connector R2 LCD E
E 6
1
10k R/W
R3 LCD R/W
J1
10k RS DB9
LCD RS
1 KBD_Data
2
3 VSS Title
4 VDD AT Keyboard Interface with PIC16F84
5 KBD_Clk (HD44780 compatible)
A 6 A
Written by Date
16-Aug-2003
CON6 Peter Luethi
Revision Page
1 2 3 4
;***************************************************************************
;
; ===============================================
;
;
; latest LCD modules. Changed controller type to flash
; device, i.e. PIC16F77.
; (17.04.2004)
;
; V3.04: Fixed issue in RS232 hardware reception service routine.
; Reads now both data bytes out of double-buffered RX FIFO.
; Tries to eliminate some sporadic reception hangs under
; heavy full-duplex traffic scenarios.
; In case of FIFO overrun errors in the USART receive logic,
; the service routine performs a partial reset of the USART
; receive logic. No specific error handling for RS232
; reception framing errors.
; (17.10.2003)
;
; Fixed ALT-DEC and CTRL-HEX issue on right side keys.
; (14.08.2003)
;
; V3.02: Implemented support for ASCII conversion from direct ALT-DEC
; and CTRL-HEX entries. Accepts both keypad and keyboard
; numbers, as well as upper and lower case letters [a..f].
; (03.01.2002)
;
;
;


;
;
;
; SPECIFICATIONS:
; ===============
; Processor: Microchip PIC 16F77 (16C74A)
; Clock Frequency: 4.00 / 8.00 MHz XT
; Throughput: 1 / 2 MIPS
; RS232 Baud Rate: 9600 / 19200 baud with BRGH = 1
;
;
; ABSTRACT:
; =========
; Fully operating RS232 terminal with completely bi-directional
; communication capabilities. This program converts AT keyboard scan
; patterns to ASCII characters and transmits them afterwards to the
; target device by using the RS232 transmission protocol. Both RS232
; data reception and transmission possible.
; 'codepages'. Entry of user data on local AT keyboard and visualization
; on dot matrix LCD display.
;
;

; DESCRIPTION:
; ============
; Developed and tested on Microchip PIC 16F77, previously on PIC 16C74A.
;
; the RS232 link.
; Visualization of received data on the first line, user-entered data
; on the second line of the dot matrix LCD display. This routine is
; best used with a 2 line by 20 or 40 characters LCD display.
;
; KBDdatapin (PORTA,4). The configuration of the KBDclkpin interrupt
; is done by the KEYBOARDinit macro.
;
; RS232 data exchange is carried out by using the internal USART of
; the PIC 16C74A. RS232 data reception is done on an interrupt
; based acquisition scheme, provided by the USART.
;
;
;
; =====================
; - Bi-directional communication between microcontroller application
; display.
; - Visualization of received and transmitted characters on local LCD.
; and inactive.


; ALT + 6 + 4 = @ (ALT + [1..3] numbers)
;
;
;
; LIMITATIONS:
; ============
;
;
; NOTE:
; =====
;
;
; CREDITS:
; ========
;
;***************************************************************************


PROCESSOR 16F77
;PROCESSOR 16C74A
;#include "p16c74a.inc"

__CONFIG _CP_OFF & _WDT_OFF & _PWRTE_ON & _HS_OSC & _BODEN_ON


LCDport equ PORTB

LCDtris equ TRISB
; display



TEMP6 set BASE+d'5'
TEMP7 set BASE+d'6'

#define KBDtxf FLAGreg2,0x00 ; keyboard transmission flag
#define RX2flag FLAGreg2,0x06 ; two RS232 bytes received
RXreg equ BASE+d'10' ; first RS232 RX-Data register

RXreg2 equ BASE+d'11' ; second RS232 RX-Data register
RXtemp equ BASE+d'12' ; intermediate data register for LCD output


LCDpos1 equ BASE+d'22' ; LCD output position counter



ORG 0x100
;***** MACROS *****
KEYBOARDinit macro
BANK1
BANK0
endm
RS232init macro
BANK1 ; Asynchronous USART assignment:
bsf TXSTA,BRGH ; BRGH = 1
movlw d'25' ; baud rate assignment: 9600 baud
movwf SPBRG
BANK0
bsf RCSTA,SPEN ; enable serial port
BANK1
bsf PIE1,RCIE ; enable serial reception interrupt
bsf TXSTA,TXEN ; enable serial transmission
BANK0
bsf INTCON,PEIE ; enable peripheral interrupts
bsf RCSTA,CREN ; enable continuous reception
endm
SEND macro send_char

movlw send_char
call _RSxmit
endm
SENDw macro
call _RSxmit
endm


movwf KBD
endm

endm
call KBDexpt
endm
_RSxmit BANK1
_RSbusy btfss TXSTA,TRMT ; check, if previous transmission
goto _RSbusy ; has been terminated
BANK0
movwf TXREG ; send next char
RETURN

BANK0
movwf TEMP1
goto _KBDtx1
BANK1
BANK0


RETURN

movlw 0x08
rrf TEMP3,F
goto _ODDpar
RETURN
RETURN
RSdisplay ;*** LCD display routine for received RS232 characters ***
; first byte in RXreg
movfw RXreg ; retrieve data
movwf RXtemp ; store data
call _RSdisp ; call output subroutine
btfss RX2flag ; check for second data byte received
goto RSdispEND
; second byte in RXreg2, i.e. RX2flag = 1
movfw RXreg2 ; retrieve data
bcf RX2flag ; reset flag
btfss RCSTA,OERR ; check for RX overrun (overrun error bit)
goto RSdispEND
; buffer overrun, severe error, reset USART RX logic

bcf RCSTA,CREN ; reset USART RX logic, clear RCSTA,OERR

bcf RCSTA,FERR ; reset framing error bit
bsf RCSTA,CREN ; re-enable continuous reception
RSdispEND
BANK1
bsf PIE1,RCIE ; re-enable USART reception interrupt
BANK0 ; (interrupt flag already cleared in ISR)
RETURN
_RSdisp ; output subroutine for serial data received

movfw RXtemp ; check first for backspace
BNEQ 0x08, _RSclr ; no backspace, branch to next check
movfw LCDpos1 ; else, decrement LCD cursor position
bz _RSend ; if zero, do nothing & exit
decf LCDpos1,F ; decrement cursor position
movfw LCDpos1 ; load cursor position to w
iorlw b'10000000' ; mask
LCDchar ' ' ; erase with blank character
goto _RSend ; exit
_RSclr movfw LCDpos1 ; check now for line end: get LCD position counter
BRS LCDwidth, _RSdsp1 ; if not at the line end, branch to next check
bcf LCD_ln ; line flag = 0 (LCD line 1)
call LCDclrline ; call LCD clear line subroutine
_RSdsp1 movfw LCDpos1 ; load cursor position to w
call LCDcomd ; call LCD command subroutine to place cursor
movfw RXtemp ; check for carriage return
BRG 0x0D, _RSdsp2 ; branch on w > 0x0D
skpz ; skip on zero: it was a carriage return
goto _RSend ; else terminate
_RScr bcf LCD_ln ; line flag = 0 (LCD line 1)
goto _RSend ; exit
_RSdsp2 movfw RXtemp
LCDw ; display RS232 data on LCD
incf LCDpos1,F ; increment LCD position counter
_RSend bcf RSflag ; reset RS232 data reception flag
RETURN
LCDclrline ;*** clears either LCD line 1 or 2 ***

btfsc LCD_ln ; check LCD line flag
goto _clrln2 ; if flag is set, clear LCD line 2

_clrln1 movwf LCDpos1 ; store LCD char width in position counter

LCD_DDAdr 0x00 ; move cursor to beginning of first line
_clr1 LCDchar ' ' ; put subsequent blanks on LCD to clear line
decfsz LCDpos1,F ; decrement counter
goto _clr1
clrf LCDpos1 ; reset LCD position counter
RETURN
LCD_DDAdr 0x40 ; move cursor to beginning of second line
goto _clr2
RETURN
ISR ;************************
;************************

goto ISR
;**************************
;**************************


goto _ISR_KBD ; if set, there was an AT keyboard interrupt
btfsc PIR1,RCIF ; check for USART interrupt

goto _ISR_RS232 ; if set, there was an USART interrupt
;******************************
;******************************
_ISR_RS232
movfw RCREG ; get RS232 data (first RX FIFO entry)
movwf RXreg ; store first data byte
btfss PIR1,RCIF ; check flag for second RX FIFO entry
goto _ISR_RS232_A ; no second byte received, branch
movfw RCREG ; get RS232 data (second RX FIFO entry)
movwf RXreg2 ; store second data byte
bsf RX2flag ; set flag to indicate second byte received
_ISR_RS232_A
BANK1 ; (for display routine)
bcf PIE1,RCIE ; disable USART reception interrupt
BANK0 ; (will be re-enabled in normal subroutine)
goto _RS232end ; exit ISR
;****************************
;*** AT KEYBOARD DECODING ***
;****************************
;******************************************
;******************************************
_ISR_KBDxmit
bcf KBDdatapin

btfsc KBD,0x00
bsf KBDdatapin
goto _INCF ; exit

bcf KBDdatapin
btfsc PARITY
bsf KBDdatapin
goto _INCF ; exit
BANK1
BANK0
goto _INCF ; exit

goto _KBDend
;*****************************************
;*****************************************
_ISR_KBDacq
tstf KBDcnt ; check
goto _INCF ; exit



btfsc KBDdatapin
bsf KBD,0x07
goto _INCF ; exit

goto _INCF ; exit

BANK0

;***********************************

;***********************************
_RS232end
;bcf PIR1,RCIF ; cleared by hardware: USART RX interrupt flag
;*****************************************
;*****************************************

KBDdecode
;**********************************************************
;**********************************************************





;****************************************************
;* further down. *
;****************************************************
;*********************************************************************
;*********************************************************************
;#include "..\tables\eng_main.asm" ; English 'codepage'

#include "..\tables\ger_main.asm" ; modified Swiss-German 'codepage'
;****************************************************
;****************************************************
;********************************
;********************************
btfss SPEflag
goto _KBD_3


btfsc ALTflag
goto _KBD_3
btfsc CTRLflag
goto _KBD_3
movfw KBD
movwf KBD
goto _OUTP
movfw KBD
goto _ClrStall
movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'14'
movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'25'
goto KBD_dec
movfw KBD
sublw 0x77 ; 0x77 - w
movfw KBD

;*******************************************************
;*******************************************************

movfw KBD



movfw KBD
sublw 0x60 ; 0x60 - w
movfw KBD
movfw KBD
movwf KBD

;***************************************************
;***************************************************
_OUTP ;*** RS232 ***

movfw KBD
movfw LCDpos2 ; load actual LCD cursor position
bz _ClrStall ; if zero, do nothing & exit
decf LCDpos2,F ; decrement LCD cursor position
addlw 0x40 ; add offset (LCD line 2)
movfw LCDpos2 ; get LCD position counter
incf LCDpos2,F ; and increment LCD position counter
_TAB2 movlw a' '
;*** check for necessary clearing of LCD line ***
_chkLn movfw LCDpos2 ; get LCD position counter
bsf LCD_ln ; line flag = 1 (LCD line 2)
_LCDout movfw LCDpos2 ; load cursor position to w
movfw KBD


;************************************************
;************************************************
_CRLF bsf LCD_ln ; line flag = 1 (LCD line 2)

SEND LF
;**********************************************************
;**********************************************************
_ClrStall
BANK1
RETURN
;****************************************************
;****************************************************

goto _alt_2
clrf CTRLreg3
;***********************************************
;***********************************************


movfw KBD
sublw 0x40 ; 0x40 - w
movfw KBD
sublw 0x46 ; 0x46 - w
movfw KBD
sublw 0x60 ; 0x60 - w
movfw KBD
sublw 0x66 ; 0x66 - w
movfw KBD
sublw 0x29 ; 0x29 - w
movfw KBD
sublw 0x39 ; 0x39 - w
tstf CTRLcnt
movfw KBD
movfw KBD
sublw 0x02 ; 0x02 - w
movfw KBD


movlw 0x30
goto _altd_3 ; jump
goto _altd_3 ; jump
sublw 0x02 ; 0x02 - w


goto _OUTP ; output
;*******************************************************
;*******************************************************
;ORG 0x??

addwf PCL,F
retlw d'10' ; 10
retlw d'20' ; 20
retlw d'30' ; 30
retlw d'40' ; 40
retlw d'50' ; 50
retlw d'60' ; 60
retlw d'70' ; 70
retlw d'80' ; 80
retlw d'90' ; 90
retlw d'100' ; 100
IF (high (BCDtable) != high (BCDtableEND))

ENDIF

; in CTRLreg1 - 2
movlw 0x30


movlw d'39'
movlw d'39'
goto _ctrh_4 ; jump
goto _OUTP ; output
;*****************************************************************
;*****************************************************************
btfss SHIflag
goto _OUTP ; branch
movfw KBD
sublw d'13' ; d'13' - w

movfw KBDcopy

sublw 0x61 ; 0x61 - w

movfw KBDcopy
movlw d'61'
goto _SHICH3
sublw 0x24 ; 0x24 - w
movlw d'35'
goto _SHICH3
;*** else ***
_SHICH2 movlw d'4'

movfw KBDcopy
goto _OUTP
;*******************************************************
;*******************************************************
;**********************************************************************
;**********************************************************************
;#include "..\tables\eng_shif.asm" ; English 'codepage'

#include "..\tables\ger_shif.asm" ; modified Swiss-German 'codepage'

;************** MAIN **************
MAIN ORG 0x00
BANK1
goto _MAIN
ORG 0x440
_MAIN ;*** configure port A ***

; Note: Initially, I have spent approx. 25 hours on debugging
; this AT keyboard interface in conjunction with the PIC 16C74A,
; because the port A inputs are set to analog inputs by default !!!
; Configure RA0, RA1, RA2, RA3, RA5 to analog inputs,

; but leave RA4, RE0, RE1, RE2 as digital I/O ports.
; Analog reference voltage is VDD.
movlw b'00000010'
movwf ADCON1
BANK0

;*** AT KEYBOARD INITIALIZATION I ***


movlw b'11111000'
clrf PIR1 ; clear all interrupt flags

movlw b'00000010'
clrf FLAGreg2


movlw LCDwidth
movwf LCDpos1 ; init LCD output position counters
clrf LCDpos2

movwf TEMP6

movfw TEMP7
LCDw ; LCD output
goto _ILOOP
SEND LF ; line feed
SEND LF

;bsf DEBUG0 ; ### DEBUGGING ###
;KBDexp 0xFA ; expect 0xFA => issue with some keyboards



;******************************
call RSdisplay ; if set, call display routine
goto _MLOOP
;******************************
WelcomeTable
WTableEND DT "d"

ENDIF
END

;***************************************************************************
;
; ===============================================
;
;
; V3.01b: Added LCDcflag (LCD command/data flag) to comply with
; (17.04.2004)
;
;
;
;
;
;
; SPECIFICATIONS:
; ===============
; Clock Frequency: 4.00 / 8.00 MHz XT
; Throughput: 1 / 2 MIPS
; RS232 Baud Rate: 9600 / 19200 baud with BRGH = 1


;
;
; ABSTRACT:
; =========
; communication capabilities. This program converts AT keyboard scan
; patterns to ASCII characters and transmits them afterwards to the
; target device by using the RS232 transmission protocol. Both RS232
; data reception and transmission possible.
;
;
; DESCRIPTION:
; ============
; Developed and tested on Microchip PIC 16C74A.
; the RS232 link.
;
;


;
;
;
; =====================
; display.
; and inactive.
;
; or CTRL + 3 + F = ?
;
;
; LIMITATIONS:
; ============
;
;
; NOTE:
; =====


;
;
; CREDITS:
; ========
;
;***************************************************************************

PROCESSOR 16F77
;PROCESSOR 16C74A

__CONFIG _CP_OFF & _WDT_OFF & _PWRTE_ON & _XT_OSC & _BODEN_ON


#define KBDclktris TRISB,0x00
LCDtris equ TRISB
LCDport equ PORTB


; display
CONSTANT BASE = 0x20 ; Base address of user file registers


TEMP6 set BASE+d'5'
TEMP7 set BASE+d'6'

RXreg equ BASE+d'9' ; RS232 RX-Data register




ORG 0xC0
;***** MACROS *****
KEYBOARDinit macro
BANK1
bsf KBDclktris ; set input with weak pull-up
bsf KBDdatatris ; set input with weak pull-up
BANK0
movlw b'10010000'
iorwf INTCON,F ; enable global & RB0/INT interrupts
bcf INTCON,RBIF ; clear uninitialized RBIF flag
endm
RS232init macro
movlw d'25' ; baud rate assignment: 9600 baud
movwf SPBRG
BANK0
BANK1
BANK0
movlw b'11000000' ; enable gobal and peripheral interrupts
iorwf INTCON,F


endm

movlw send_char
call _RSxmit
endm
SENDw macro
call _RSxmit
endm

movwf KBD
endm

endm
call KBDexpt
endm
_RSxmit BANK1
BANK0
RETURN


BANK0
movwf TEMP1
goto _KBDtx1
BANK1
BANK0
RETURN

movlw 0x08
rrf TEMP3,F
goto _ODDpar
RETURN
RETURN
RSdisp ;*** LCD display routine for received RS232 characters ***
bc _RSdsp1 ; branch if res positive or zero


movfw RXreg ; check for carriage return
sublw 0x0D ; w = 0x0D - w
bnc _RSdsp2 ; no carry if result negative, branch
bz _RScr ; branch on zero: carriage return
_RSbspc movfw RXreg ; else, check for backspace
sublw 0x08 ; w = 0x08 - w
bnz _RSend ; no backspace, exit
goto _RSend ; exit
goto _RSend ; exit
_RSdsp2 movfw RXreg
BANK1
RETURN

goto _clr1
RETURN


goto _clr2
RETURN
ISR ;************************
;************************

goto ISR
;**************************
;**************************

btfsc INTCON,INTF ; check RB0/INT interrupt flag
goto _ISR_KBD ; if set, it was a keyboard interrupt
;goto _ISR_RS232 ; else, it was a USART interrupt
;******************************

;******************************
_ISR_RS232
movfw RCREG ; get RS232 data
movwf RXreg
goto _RS232end ; exit

;******************************************
;******************************************
_ISR_KBDxmit
bcf KBDdatapin
btfsc KBD,0x00
bsf KBDdatapin
goto _INCF ; exit

bcf KBDdatapin
btfsc PARITY
bsf KBDdatapin
goto _INCF ; exit

BANK1
BANK0
goto _INCF ; exit

goto _KBDend
;*****************************************
;*****************************************
_ISR_KBDacq
tstf KBDcnt ; check
goto _INCF ; exit

btfsc KBDdatapin
bsf KBD,0x07
goto _INCF ; exit

goto _INCF ; exit



BANK0

;***********************************
;***********************************
_RS232end
bcf PIR1,RCIF ; clear USART RX interrupt flag

;*****************************************

;*****************************************

KBDdecode
;**********************************************************
;**********************************************************



;****************************************************
;* further down. *
;****************************************************

;*********************************************************************
;*********************************************************************

;****************************************************
;****************************************************
;********************************
;********************************
btfss SPEflag
goto _KBD_3
movfw KBD
movwf KBD
goto _OUTP
movfw KBD
goto _ClrStall

movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'14'
movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'25'
goto KBD_dec
movfw KBD
sublw 0x77 ; 0x77 - w
movfw KBD
;*******************************************************
;*******************************************************

movfw KBD





movfw KBD
sublw 0x60 ; 0x60 - w
movfw KBD
movfw KBD
movwf KBD
;***************************************************
;***************************************************
_OUTP ;*** RS232 ***

movfw KBD
;*** LCD: treat "Backspace" as special case ***
sublw d'8' ; d'8' - w
bnz _chkLn ; if not zero, branch
;*** it is now a backspace ***


movfw KBD
;************************************************
;************************************************

SEND LF
;**********************************************************
;**********************************************************
_ClrStall
BANK1
RETURN
;****************************************************
;****************************************************




;***********************************************
;***********************************************


; in CTRLreg1 - 2

;*****************************************************************
;*****************************************************************
btfss SHIflag
goto _OUTP ; branch
movfw KBD
sublw d'13' ; d'13' - w


movfw KBDcopy
sublw 0x61 ; 0x61 - w
movfw KBDcopy
movlw d'61'
goto _SHICH3
sublw 0x24 ; 0x24 - w
movlw d'35'
goto _SHICH3
;*** else ***
_SHICH2 movlw d'4'

movfw KBDcopy
goto _OUTP
;*******************************************************
;*******************************************************
;**********************************************************************
;**********************************************************************


;************** MAIN **************
MAIN ORG 0x00
BANK1
clrf OPTION_REG ; INTEDG bit cleared => INTB on falling edge
goto _MAIN
ORG 0x1A0
_MAIN bsf KBDclktris ; set keyboard clock line as input explicitely

bsf KBDdatatris ; set keyboard data line as input explicitely
;*** configure port A to digital inputs !!! ***
; Note: I have spent approx. 25 hours on debugging the keyboard
; interface in conjunction with the PIC 16C74A, because the
; port A inputs are set to analog inputs by default !!!
movlw b'00000111'
movwf ADCON1
BANK0
movlw b'11111000'


KEYBOARDinit ; Keyboard initialization
movlw b'00000010'
clrf FLAGreg2

movlw LCDwidth
clrf LCDpos2



movwf TEMP6

movfw TEMP7
LCDw ; LCD output
goto _ILOOP
SEND LF ; line feed
SEND LF



;******************************
call RSdisp ; if set, call display routine
goto _MLOOP

;******************************
WelcomeTable
DT "PIC 16C74A AT Keyboard Decoder connecte" ; create table
WTableEND DT "d"

ENDIF
END

http://www.trash.net/~luethi/microchip/projects/keyboard/v3xx/kbd_3xx_eng.hex
:020000040000FA
:10000000831603138101402C8B138B1B0428AD0036
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:1002E00028148B100B16281873290800A200083058
:1002F000A300A4012218A40AA20CA30B7A29A81017
http://www.trash.net/~luethi/microchip/projects/keyboard/v3xx/kbd_3xx_eng.hex (1 of 4)12/02/2008 20:18:09

:10030000241CA8140800A300281528198529080012
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:100980008821BD2C8207503449344334203431341B
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:0409D00065346434F2
:02400E00F23F7F
:00000001FF

http://www.trash.net/~luethi/microchip/projects/keyboard/v3xx/kbd_3xx_sg.hex
:020000040000FA
:10000000831603138101402C8B138B1B0428AD0036
:10001000030EAE0083010A08AF008A0183130408AF
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:1002F000A300A4012218A40AA20CA30B7A29A81017
http://www.trash.net/~luethi/microchip/projects/keyboard/v3xx/kbd_3xx_sg.hex (1 of 4)12/02/2008 20:18:18

:10030000241CA8140800A300281528198529080012
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:100980008821BD2C8207503449344334203431341B
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:1009C000203463346F346E346E346534633474347D
:0409D00065346434F2
:02400E00F23F7F
:00000001FF

1 2 3 4
PIC16C74A MAX232
VDD
D XT1 D
R1 VDD
VSS
10k C1 4.000 MHz C2 C4
C3
10p 10p 10u
S1 VDD 10u
VSS VSS
16
SW-PB
2
6
11
32
C5 U2
U1
13 12
V+
VCC
V-
13 14 RS232 TXD R1 IN R1 OUT PIC RXD
VDD
VDD
VSS 4n7 OSC1/CLKIN OSC2/CLKOUT RS232 8 9 5V
1 15 R2 IN R2 OUT
MCLR/VPP RC0/T1OSO/T1CKI 11 14
2 16 PIC TXD T1 IN T1 OUT RS232 RXD
RA0 RC1/T1OSI/CCP2 5V 10 7 RS232
3 17 T2 IN T2 OUT
C RA1 RC2/CCP1 1 4 C
GND
4 18 C1+ C2+
RA2 RC3/SCK/SCL 3 5
5 23 C1 - C2 -
RA3 RC4/SDI/SDA
6 24
KBD_Data RA4/T0CKI RC5/SDO C6 MAX232CPE(16) C7
7 25
RA5/SS RC6/TX/CK PIC TXD 10u 10u
15
33 26
KBD_Clk RB0/INT RC7/RX/DT PIC RXD
D4 34 19
RB1 RD0/PSP0
D5 35 20
RB2 RD1/PSP1
D6 36 21 VSS
RB3 RD2/PSP2
D7 37 22 VDD
RB4 RD3/PSP3 VDD
E 38 27
RB5 RD4/PSP4
R/W 39 28
RB6 RD5/PSP5
RS 40
8
RB7 RD6/PSP6
29
30
C8
100n
PS/2 Connector R2
RE0/RD//AN5 RD7/PSP7 10k
VSS
VSS
B 9 10 R3 B
RE1/WR/AN6 RE2/CS/AN7 J1
VSS 10k
PIC16C74-04/JW(40) 1 KBD_Data
2
12
31
3 VSS
D4
LCD D4 SUB1 4 VDD
D5 5 KBD_Clk
LCD D5 VSS 5
D6
LCD D6
RS232 VSS
9
6
VDD 4 CON6
D7 (Direction seen from host)
LCD D7 8
VDD
E 3
LCD E RS232 TXD Title
C9 7
R/W
LCD R/W
VSS
100n
RS232 RXD
2 AT Keyboard Interface with PIC16C74
RS 6
A LCD RS A
VSS 1 Written by Date
20-Aug-2003
Dot Matrix LCD Display Peter Luethi
DB9 Revision Page
(HD44780 compatible) Dietikon, Switzerland 3.03 1 of 1
1 2 3 4
Conrad Electronic - Europas fhrendes Versandhandelsunternehmen fr Elektronik und Technik
Conrad Shop cXtreme.de Conrad-Security Licht-direct.de Business-Shop Tipps & Infos DVD+Games Verleih Handys Modellbauclub PDF-Kataloge Filialen Kontakt Jobs Impressum AGB ber Conrad
http://www1.conrad.de/scripts/wgate/zcop_b2c/~flN0YXRlPTEwNDM5ODYxMTA=?~...EA_S_BROWSE&glb_user_js=Y&shop=B2C&p_init_ipc=X&~cookies=1&scrwidth=102412/02/2008 20:20:21
http://www.trash.net/~luethi/microchip/projects/keyboard/kbd_box/kbd_box_205.asm
;***************************************************************************
;
; AT Keyboard Box V2.05 (with LCD Display and Keypad)
; ====================================================
;
; written by Peter Luethi, 06.08.2003, Dresden, Germany
;
; (17.04.2004)
;
; V2.04: Changed RS232 transmission sub-routine: checks now
; PIR1,TXIF instead of TXSTA,TRMT
; (29.10.2003)
;
; V2.03: Implemented watchdog timer for user-customization phase.
; After 12 seconds of inactivity, the user-customization
; process is terminated. Then, the default baud rate settings
; (9600 baud) are configured, and normal full-duplex operation
; mode is established.
; (17.10.2003)
;
; (17.10.2003)
;
; V2.01: Added dynamic RS232 baud rate configuration through
; AT keyboard (16.10.2003)
;
; V2.00: Added dynamic RS232 baud rate setup (customizable by
; user through keypad), changed clock frequency from
; 4 MHz to 14.745600 MHz in order to support 1200 baud
; up to 115200 baud (15.10.2003)
;
http://www.trash.net/~luethi/microchip/projects/keyboard/kbd_box/kbd_box_205.asm (1 of 41)12/02/2008 20:20:51


;
;
;
;
; SPECIFICATIONS:
; ===============
; Throughput: 3.7 MIPS
; RS232 Baud Rate: Customizable by user (BRGH = 0),
; any setting from 1200 baud - 115200 baud
; Serial Output: default setup: 9600 baud, 8 bit,
; no parity, 1 stopbit
; Numeric Keypad Features: Interrupt-based acquisition,
; direct 8 bit A/D conversion
; Optional Hardware: Piezo beeper with decoupling capacitor
;
;
; ABSTRACT:
; =========
; communication capabilities. Multiple input devices are attached,
; such as an AT keyboard and a small numeric foil-keypad.

; The application features a dot matrix LCD display to visualize

; the data received from the RS232 client on the first line, and
; the characters typed on the locally attached keyboard on the
; second line. There is also a piezo-beeper for acoustic feedback.
; This program converts AT keyboard scan patterns to ASCII characters
; and transmits them afterwards to the target device by using the RS232
; transmission protocol. Both RS232 data reception and transmission
; are possible.
; Dynamic configuration of RS232 baud rate setting at start-up
; (user-customization with 1200 baud - 115200 baud), with 12 seconds
; inactivity time-out. In case the time-out applies, the
; user-customization process terminates with the current setting.
; Default setting after power-up is 9600 baud.
;
;
; DESCRIPTION:
; ============
;
; Using a specific quartz crystal with a frequency of 14.745600 MHz,
; we can address all baud rates from 1200 baud up to 115200 baud
; without any error ratio (0.00% deviation!).
; All aspects of RS232 transmission and reception are handled by PIC
; hardware resources and interrupts.
;
; Any key stroke on the AT keyboard connected to the PIC will send the
; the RS232 link.
; best used with a 2 line by 20 or 40 character LCD display.
;


;
; The numeric foil-keypad is equipped with a specific resistor cascade
; to decode the values through direct 8 bit A/D conversion using the
; PIC-internal A/D converter.
; The advantage is a very low pin usage: Only two pins are necessary
; for proper detection and decoding of all keypad entries.
; One pin provides the analog value, the other pin serves for interrupt
; generation whenever a key of the keypad is touched. The interrupt is
; used to start the A/D conversion.
;
; During the interrupt service routine, only a short busy wait (analog
; settling time) and the A/D conversion - using the internal RC
; oscillator - is carried out. Before leaving the ISR, the 8 bit A/D
; result is stored in a specific register and a dedicated flag is set.
;
; Decoding of the A/D value is done during normal operation (activated
; by the flag) using two look-up tables. The first look-up table (LUT1)
; contains the expected 8 bit values of the keypad to check for valid
; entries. A numeric window of 3 allows for slight analog deviations
; during matching. The matching algorithm just scans the entire LUT1
; until the received keypad A/D result matches a LUT1 entry. The amount
; of loops carried out in LUT1 determines the position of the
; corresponding symbol/character in LUT2. At the end, RS232 transmission
; and LCD display update are carried out.
;
;
; Dynamic configuration of RS232 baud rate setting at start-up
; (user-customization with 1200 baud - 115200 baud). A watchdog timer
; implemented using TMR1 checks for inactivity during the customization
; process. After 12 seconds of inactivity, the user-customization process
; terminates with the current setting. At power-up, the default setting
; is 9600 baud, which will be configured after the time-out - unless no
; user-customization takes place.
;
;
;

; =====================
; - Dynamic configuration of RS232 baud rate setting at start-up.
; and remote RS232 client by hardware-based RS232 transmission.
; display.
; - Supports foil-keypad input through direct 8 bit A/D conversion
; and look-up table.
; - Piezo-beeper for acoustic feedback of keypad entries.
; and inactive.
; ALT + 6 + 4 = @ (ALT + [1..3] numbers)
;
;
;
; LIMITATIONS:
; ============
;
;
; NOTE:
; =====

;
;
; CREDITS:
; ========
;
;***************************************************************************

PROCESSOR 16F77
;PROCESSOR 16C74A


CONSTANT BEEP_ENABLE = d'1' ; Piezo beeper, default: enabled

CONSTANT KEYPAD_DELAY = 0x50 ; busy wait
;0x40 ; busy wait (64 us @ 16 MHz)
CONSTANT KEYPAD_SIZE = d'12' ; amount of keypad buttons

CONSTANT KEYPAD_WINDOW = d'6' ; window size for A/D value matching

CONSTANT LCDwidth = d'40' ; define character width of LCD
; display
CONSTANT KBD_conf_value = d'7' ; keyboard configuration time-out value
CONSTANT WDT_CNT_value = d'85' ; watchdog timer value for user-customization
; (equals 12 seconds time-out)

#define KBDclkpin PORTB,0x00 ; keyboard clock input port
LCDport equ PORTD

LCDtris equ TRISD
#define PADOUTpin PORTA,0x00 ; numeric keypad analog input

#define PADOUTtris TRISA,0x00
#define PADIRQpin PORTB,0x07 ; numeric keypad interrupt pin
#define PADIRQtris TRISB,0x07 ; @ RBIF interrupt source (RB4:7)
#define BEEPport PORTE,0x00 ; output port for piezo beeper

#define BEEPtris TRISE,0x00
; debug LEDs
;#define DEBUG0tris TRISC,0x00 ; Port C !
;#define DEBUG1tris TRISC,0x01
;#define DEBUG0 PORTC,0x00 ; Port C !
;#define DEBUG1 PORTC,0x01




TEMP6 set BASE+d'5' ; Don't use them in the ISR!
TEMP7 set BASE+d'6'

#define BCflag FLAGreg2,0x06 ; blank checker for preceding zeros
#define KPflag FLAGreg2,0x07 ; numeric foil-keypad reception flag
#define CUST_fl FLAGreg3,0x00 ; user-customization flag for RS232
#define WDTflag FLAGreg3,0x02 ; watchdog time-out flag




ISR_TEMP1 equ BASE+d'17' ; temporary registers for ISR

KBDexpval equ BASE+d'22' ; temporary KBD expected response value

KPval equ BASE+d'29' ; A/D value for keypad decoding
RS232_CUST equ BASE+d'30' ; register for RS232 communication setup

CUST_CNT equ BASE+d'31' ; counter for customization routine
CUST_POS equ BASE+d'32' ; counter for current table position
WDT_CNT equ BASE+d'33' ; time-out counter for customization
ORG 0x430
IF BEEP_ENABLE == 1 ; conditional assembly
#include "..\..\m_beep.asm" ; Piezo beeper
ENDIF
;***** MACROS *****
KEYPADinit macro
BANK1
bsf PADOUTtris ; set numeric keypad to (analog) input
bsf PADIRQtris ; set numeric keypad interrupt pin to input
BANK0
;movlw b'01000001' ; select Fosc/8, CH0, A/D ON
movlw b'11000001' ; select RC Osc, CH0, A/D ON
movwf ADCON0

bcf INTCON,RBIF ; ensure interrupt flag is cleared

bsf INTCON,RBIE ; enable PORTB4:7 change interrupts
endm
KEYBOARDinit macro
BANK1
BANK0
endm
RS232init macro ; call with customized setup value in w (RS232_CUST)

movwf SPBRG ; adjust baud rate
bcf TXSTA,BRGH ; BRGH = 0
BANK0
BANK1
BANK0
endm

movlw send_char
call _RSxmit
endm
SENDw macro
call _RSxmit
endm

movwf KBD
endm


endm
call KBDexpfun
endm
WDT_SETUP ;*** sub-routine for IRQ-based WDT timer using TMR1 ***
movwf WDT_CNT ; set self-defined watchdog (customization time-out)
bcf WDTflag ; clear WDT time-out flag
clrf TMR1L
clrf TMR1H
bcf PIR1,TMR1IF ; reset TMR1 interrupt flag
BANK1
bsf PIE1,TMR1IE ; enable TMR1 interrupt
BANK0
; configure & enable TMR1:
; prescaler = b'11', OSCEN = 0, _T1SYNC = 0, TMR1CS = 0, TMR1ON = 1
movlw b'00110001'
movwf T1CON
RETURN
WDT_STOP ; stop and reset watchdog timer

BANK1
bcf PIE1,TMR1IE ; disable TMR1 interrupt
BANK0
bcf T1CON,TMR1ON ; stop TMR1
bcf WDTflag ; reset watchdog flag
RETURN
_RSxmit ;*** check transmit buffer register empty flag ***

_RSbusy btfss PIR1,TXIF ; check, if TXREG is empty (TXIF = 1)
goto _RSbusy ; TXIF = 0, wait
RETURN


BANK0
movwf TEMP1
goto _KBDtx1
BANK1
BANK0
;bsf DEBUG0 ;#######################
;bcf DEBUG0 ;#######################
RETURN

movlw 0x08
rrf TEMP3,F
goto _ODDpar
RETURN
KBDexpfun ;*** keyboard expect function: busy wait for kbd response ***
_KBDexp btfsc WDTflag ; check for watchdog expiration
goto _KBDexp_timeout ; abort in case of time-out

btfsc KBDexpf ; wait loop: poll for completion

RETURN
_KBDexp_timeout
bcf KBDexpf ; reset flag in case of time-out
clrf KBDcnt
RETURN
call _RSdisp ; call output sub-routine
goto RSdispEND
call _RSdisp ; call output sub-routine
goto RSdispEND
RSdispEND
BANK1
RETURN
_RSdisp ; output sub-routine for serial data received

call LCDcomd ; call LCD command sub-routine
goto _RSend ; exit

call LCDclrline ; call LCD clear line sub-routine
call LCDcomd ; call LCD command sub-routine to place cursor
call LCDclrline ; call LCD clear line sub-routine
goto _RSend ; exit
RETURN
KEYPADout ;*** numeric foil-keypad output routine (LCD display & RS232) ***
BEEP d'240', d'4' ; acoustic feedback
ENDIF
movlw KEYPAD_SIZE-0x1 ; get amount of keypad buttons
movwf TEMP6 ; prepare loop counter
_KPlut1 ; loop through keypad look-up table 1
movlw HIGH KeypadTable1 ; get correct page for PCLATH
movfw TEMP6 ; retrieve loop counter value
call KeypadTable1 ; call lookup table
addlw 0x0 - KEYPAD_WINDOW/2 ; w - WINDOW/2
movwf TEMP7 ; store retrieved value in temp register
subwf KPval,w ; KPval - w = w
bnc _KPreloop ; no carry if result negative, branch
movfw TEMP7
BRES KEYPAD_WINDOW, _KPlut2 ; A/D value in window, branch
_KPreloop decfsz TEMP6,f ; decrement loop counter, exit if zero
goto _KPlut1 ; loop again
_KPlut2 ; get now corresponding symbol from keypad look-up table 2


btfsc CUST_fl ; if set, user-customization in progress, branch
goto USER_CUST1
; send symbol now to attached I/O devices: LCD & RS232
SENDw ; RS232 transmission of symbol in w
movwf KBD ; to be able to call LCDout_line2
call LCDout_line2 ; shared subroutine for LCD output
bcf KPflag ; reset keypad reception flag
bsf INTCON,RBIE ; re-enable PORTB4:7 change interrupts
RETURN
USER_CUST1 ;*** user-customization of RS232 settings (baud rate setup) ***

movwf TEMP6 ; store value
BNEQ a'*', _CUST1_SET ; if no '*', branch to next check
call _CUST1_CHANGE ; call common 'change' sub-routine
goto _CUST1_END ; now terminate
_CUST1_SET
movfw TEMP6
BNEQ a'#', _CUST1_END ; if no '#', branch to exit
bcf CUST_fl ; clear flag to indicate setup is finished
_CUST1_END ; termination
movlw WDT_CNT_value ; load watchdog counter value
movwf WDT_CNT ; reset self-defined watchdog (customization time-out)
RETURN
_CUST1_CHANGE
; RS232_CUST = 1 (115200), 3 (57600), 5 (38400), 11 (19200)
; CUST_CNT = 7 6 5 4
; RS232_CUST = 23 (9600), 47 (4800), 95 (2400), 191 (1200)
; CUST_CNT = 3 2 1 0
; change configuration value
clrf CUST_POS ; reset table position counter
incf CUST_CNT,F ; increment counter to change configuration
movfw CUST_CNT
BRES 0x7, _CUST1_C ; branch if still in [0..7]
clrf CUST_CNT ; it was > 7, reset to 0
_CUST1_C ;*** calculate table position of the current display output to change ***
movfw CUST_CNT
movwf TEMP7 ; get configuration counter value
bz _CUST1_D ; skip loop in case of zero (1200 baud)
_CUST1_LOOP1
movlw d'4' ; delta

addwf CUST_POS,F ; adjust offset

goto _CUST1_LOOP1 ; loop again
; on exit, we have the correct offset in CUST_POS for CUST_Table1
_CUST1_D ;*** adjust LCD output (through look-up table) ***
LCD_DDAdr 0x46 ; set LCD cursor position
movlw d'4' ; prepare loop counter
movwf TEMP7
_CUST1_LOOP2
movlw HIGH CUST_Table1 ; get correct page for PCLATH
movfw CUST_POS ; get current table position
call CUST_Table1 ; look-up character to display
LCDw ; display character
incf CUST_POS,F ; increment position counter
goto _CUST1_LOOP2 ; loop again
; on exit, we have updated the LCD display content
;*** adjust RS232 communication configuration value ***
movlw HIGH CUST_Table2 ; get correct page for PCLATH
movfw CUST_CNT
call CUST_Table2 ; retrieve baud rate value for initialization
movwf RS232_CUST ; => store in intermediate config register
RETURN
LCDout_line2 ;*** shared LCD subroutine for AT keyboard and foil-keypad ***
; Pre: Character stored in register KBD
; Post: Output on LCD line 2
; check for necessary clearing of LCD line 2
movfw KBD ; retrieve character
RETURN


goto _clr1
RETURN
goto _clr2
RETURN
ISR ;************************
;************************

goto ISR

;**************************
;**************************

btfsc INTCON,RBIF ; check for RB[7:4] port change interrupt

goto _ISR_KEYPAD ; if set, there was a keypad stroke

btfsc PIR1,TMR1IF ; check for TMR1 interrupt

goto _ISR_TMR1 ; if set, there was a TMR1 interrupt
;**************************************************************
;*** TMR1 INTERRUPT - WATCHDOG TIMER FOR USER-CUSTOMIZATION ***
;**************************************************************
_ISR_TMR1
decf WDT_CNT,F ; decrement watchdog counter
bnz _ISR_TMR1_A ; if not zero, exit
; watchdog has timed out:
bsf WDTflag ; set WDT time-out flag
bcf CUST_fl ; prepare abort of user-customization:
; clear flag to indicate setup has to finish
_ISR_TMR1_A
bcf PIR1,TMR1IF ; reset TMR1 interrupt flag
goto ISRend ; exit ISR
;******************************
;******************************
_ISR_RS232
movfw RCREG ; get RS232 data
movwf RXreg

;*******************************
;*** NUMERIC KEYPAD DECODING ***
;*******************************
_ISR_KEYPAD
btfss PADIRQpin ; check if active one
goto _KEYPADend ; else, exit ISR
bcf INTCON,RBIE ; disable PORTB4:7 change interrupts
movlw KEYPAD_DELAY ; busy wait (64 us @ 4 MHz)
movwf ISR_TEMP1
_KPloop1 decfsz ISR_TEMP1,f
goto _KPloop1
; A/D input charge time completed, continue
bsf ADCON0,GO ; turn conversion ON
_KPloop2 btfsc ADCON0,GO ; check A/D status flag
goto _KPloop2 ; wait until the end of conversion
movfw ADRES ; fetch result of A/D conversion
movwf KPval ; store A/D keypad value
bsf KPflag ; set keypad reception flag
goto _KEYPADend ; exit ISR
;****************************
;****************************
;******************************************
;******************************************
_ISR_KBDxmit
bcf KBDdatapin
btfsc KBD,0x00
bsf KBDdatapin
goto _INCF ; exit


bcf KBDdatapin
btfsc PARITY
bsf KBDdatapin
goto _INCF ; exit
BANK1
BANK0
goto _INCF ; exit

goto _KBDend
;*****************************************
;*****************************************
_ISR_KBDacq
tstf KBDcnt ; check
goto _KBDabort1 ; no valid start bit, abort
goto _INCF ; exit

btfsc KBDdatapin

bsf KBD,0x07
goto _INCF ; exit

goto _INCF ; exit

goto _KBDabort2 ; if not set, abort
BANK0
bnz _KBDabort3 ; check zero flag, branch should never occur
_KBDabort1 ;bsf DEBUG1 ; ### DEBUGGING ###

goto _KBDabort
goto _KBDabort
;bcf KBDexpf ; reset flag ### DEBUGGING ###
;***********************************


;***********************************
_RS232end
bcf PIR1,RCIF ; clear USART RX interrupt flag
_KEYPADend
bcf INTCON,RBIF ; clear RB[7:4] port change interrupt flag

;*****************************************
;*****************************************

KBDdecode
;**********************************************************

;**********************************************************



;****************************************************
;* further down. *
;****************************************************
;*********************************************************************
;*********************************************************************
ORG 0x220 ;(280) ; if necessary, move table

;****************************************************
;****************************************************
;********************************
;********************************

btfss SPEflag
goto _KBD_3
btfsc ALTflag
goto _KBD_3
btfsc CTRLflag
goto _KBD_3
movfw KBD
movwf KBD
goto _OUTP
movfw KBD
goto _ClrStall
movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'14'
movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'25'
goto KBD_dec
movfw KBD
sublw 0x77 ; 0x77 - w

movfw KBD
;*******************************************************
;*******************************************************

movfw KBD



movfw KBD
sublw 0x60 ; 0x60 - w
movfw KBD
movfw KBD


movwf KBD
;***************************************************
;***************************************************
_OUTP btfsc CUST_fl ; if set, user-customization in progress, branch

goto USER_CUST2
;*** RS232 ***
movfw KBD
_TAB2 movlw a' '
_chkLn call LCDout_line2 ; shared LCD output subroutine
USER_CUST2 ;*** user-customization of RS232 settings (baud rate setup) ***

movfw KBD ; retrieve value

BNEQ a'a', _CUST2_SET ; if no 'a', branch to next check
call _CUST1_CHANGE ; call common 'change' sub-routine
ENDIF
goto _CUST2_END ; now terminate
_CUST2_SET
movfw KBD
BNEQ a's', _CUST2_END ; if no 's', branch to exit
bcf CUST_fl ; clear flag to indicate setup is finished
ENDIF
_CUST2_END ; termination
movwf WDT_CNT ; reset self-defined watchdog (customization time-out)
;************************************************
;************************************************
_CRLF btfsc CUST_fl ; if set, user-customization in progress, branch

SEND LF
;**********************************************************
;**********************************************************
_ClrStall
BANK1
RETURN
;****************************************************

;****************************************************


goto _alt_2
clrf CTRLreg3
;***********************************************
;***********************************************
movfw KBD
sublw 0x40 ; 0x40 - w
movfw KBD
sublw 0x46 ; 0x46 - w
movfw KBD
sublw 0x60 ; 0x60 - w
movfw KBD
sublw 0x66 ; 0x66 - w
movfw KBD
sublw 0x29 ; 0x29 - w
movfw KBD
sublw 0x39 ; 0x39 - w
tstf CTRLcnt


movfw KBD
movfw KBD
sublw 0x02 ; 0x02 - w
movfw KBD

movlw 0x30
goto _altd_3 ; jump


goto _altd_3 ; jump
sublw 0x02 ; 0x02 - w
goto _OUTP ; output
;*******************************************************
;*******************************************************
;ORG 0x??

addwf PCL,F
retlw d'10' ; 10
retlw d'20' ; 20
retlw d'30' ; 30
retlw d'40' ; 40
retlw d'50' ; 50
retlw d'60' ; 60
retlw d'70' ; 70
retlw d'80' ; 80
retlw d'90' ; 90

retlw d'100' ; 100

IF (HIGH (BCDtable) != HIGH (BCDtableEND))

ENDIF

; in CTRLreg1 - 2
movlw 0x30
movlw d'39'
movlw d'39'
goto _ctrh_4 ; jump
goto _OUTP ; output

;*****************************************************************
;*****************************************************************
btfss SHIflag
goto _OUTP ; branch
movfw KBD
sublw d'13' ; d'13' - w

movfw KBDcopy
sublw 0x61 ; 0x61 - w
movfw KBDcopy
movlw d'61'
goto _SHICH3
sublw 0x24 ; 0x24 - w
movlw d'35'
goto _SHICH3
;*** else ***
_SHICH2 movlw d'4'

movfw KBDcopy
goto _OUTP

;*******************************************************
;*******************************************************
;**********************************************************************
;**********************************************************************

;************** MAIN **************
MAIN ORG 0x00
BANK1
goto _MAIN
ORG 0x100


movlw b'00000010'
movwf ADCON1
; bcf DEBUG0tris ; DEBUGGING !!!

; bcf DEBUG1tris
; bcf DEBUG2tris
; bcf DEBUG3tris
; bcf DEBUG4tris

; bcf DEBUG5tris
; bcf DEBUG6tris
; bcf DEBUG7tris
BANK0
; bcf DEBUG0
; bcf DEBUG1
; bcf DEBUG2
; bcf DEBUG3
; bcf DEBUG4
; bcf DEBUG5
; bcf DEBUG6
; bcf DEBUG7
;*** PIEZO BEEPER INITIALIZATION ***

BEEPinit ; beeper initialization
ENDIF

;*** NUMERIC KEYPAD INITIALIZATION ***

KEYPADinit ; keypad initialization

movlw b'11111000'

movlw b'00000010'
clrf FLAGreg2
clrf FLAGreg3

movlw LCDwidth


clrf LCDpos2
;*** CUSTOMIZATION MESSAGE ***

#define tab_size1 d'38' ; define amount of table items to display
movlw tab_size1 ; store amount of table items in counter
movwf TEMP6
; LCD start-up/customization message
_ILOOP movlw HIGH StartupTable ; get correct page for PCLATH
sublw tab_size1 ; table offset: w = tab_size1 - TEMP6
call StartupTable ; call lookup table
LCDw ; LCD output
goto _ILOOP ; loop again
;*** AT KEYBOARD INITIALIZATION III ***


;*** acoustic introduction ***
BEEP d'255', d'4' ; "device is ready"
WAIT 0x80
BEEP d'240', d'4'
ENDIF

;*** RS232 USER CUSTOMIZATION & INITIALIZATION ***

LCD_DDAdr 0x40
#define tab_size2 d'40' ; define amount of table items to display
movwf TEMP6
; transmit startup message
_ILOOP2 movlw HIGH RS_Table1 ; get correct page for PCLATH
call RS_Table1 ; call lookup table
LCDw ; LCD output
goto _ILOOP2 ; loop again
bsf CUST_fl ; enable customization flag

movlw d'23' ; default: 9600 baud @ 14.7456 MHz
movwf RS232_CUST ; store default baud rate value
movlw d'3' ; default
movwf CUST_CNT ; counter for customization loop
; set up watchdog timer for user-customization (12 seconds)

; global interrupt is already enabled
call WDT_SETUP ; call sub-routine for IRQ-based WDT timer
;******************************
_ILOOP3 btfsc KPflag ; check foil-keypad reception flag
call KEYPADout ; if set, call output routine
btfsc KBDflag ; check scan pattern reception flag
btfsc CUST_fl ; if customization flag is cleared, exit loop
goto _ILOOP3 ; loop again
;******************************
; stop watchdog timer for user-customization

call WDT_STOP ; stop & reset watchdog

WAIT 0x80
WAIT 0x80
BEEP d'240', d'4'
ENDIF

; RS232 initialization
bcf INTCON,GIE ; enable global interrupt
movfw RS232_CUST ; retrieve customized baud rate value
movlw b'11111000'
LCDcmd LCDCLR ; clear entire LCD display
;*** START-UP MESSAGE ***

; define amount of table items for start-up message
#define tab_size3 d'39'
movwf TEMP6
; transmit message
_ILOOP4 movlw HIGH WelcomeTable ; get correct page for PCLATH
movfw TEMP7
LCDw ; LCD output
goto _ILOOP4
SEND LF ; line feed
SEND LF
;******************************
btfsc KPflag ; check foil-keypad reception flag
goto _MLOOP ; loop forever
;******************************

ORG 0x600 ; if necessary, move look-up tables
StartupTable
DT "Customization of Serial Communication" ; create table
StartupTableEND DT ":"
IF (HIGH (StartupTable) != HIGH (StartupTableEND))
ERROR "StartupTable hits page boundary!"
ENDIF
WelcomeTable
DT "PIC16F77 AT Keyboard Box V2.05 stand-b" ; create table
WTableEND DT "y"
IF (HIGH (WelcomeTable) != HIGH (WTableEND))
ENDIF
RS_Table1
DT "RS232 9600 baud a/* alter s/# selec" ; create table
RS_Table1END DT "t"
IF (HIGH (RS_Table1) != HIGH (RS_Table1END))
ERROR "RS_Table1 hits page boundary!"
ENDIF
CUST_Table1
DT " 12" ; create table
DT " 24"
DT " 48"
DT " 96"
DT " 192"
DT " 384"
DT " 576"
DT "115"
CUST_Table1END DT "2"
IF (HIGH (CUST_Table1) != HIGH (CUST_Table1END))
ERROR "CUST_Table1 hits page boundary!"
ENDIF
CUST_Table2
retlw d'191' ; 1200 baud


CUST_Table2END retlw d'1' ; 115200 baud
IF (HIGH (CUST_Table2) != HIGH (CUST_Table2END))
ERROR "CUST_Table2 hits page boundary!"
ENDIF
KeypadTable1
retlw d'76' ;*
retlw d'90' ;7
retlw d'105' ;4
retlw d'120' ;1
retlw d'135' ;0
retlw d'151' ;8
retlw d'167' ;5
retlw d'184' ;2
retlw d'201' ;#
retlw d'218' ;9
retlw d'236' ;6
KeypadTable1END retlw d'254' ; 3
IF (HIGH (KeypadTable1) != HIGH (KeypadTable1END))
ERROR "KeypadTable1 hits page boundary!"
ENDIF
KeypadTable2
DT "*7410852#96" ; create table
KeypadTable2END DT "3"
ENDIF
END
; A/D conversion values for numeric foil-keypad using different clocks:

; =====================================================================
; unbounce keypad IRQ and keypad analog signals using 5 nF capacitors
; symbol 14.7456 MHz 4 MHz

;* 76 76
;7 90 91
;4 105 106
;1 120 121
;0 135 137
;8 151 152
;5 167 168
;2 184 185
;# 201 201
;9 218 218
;6 236 236
;3 254 254

http://www.trash.net/~luethi/microchip/projects/keyboard/kbd_box/kbd_box_205_eng.hex
:020000040000FA
:1000000083160313810100298B138B1B0428AD0079
:10001000030EAE0083010A08AF008A0183130408AF
:10002000B0008B1838280B182A288C1A21280C1895
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:1002B0005129FF30B300CF24B624ED30B300CF2452
:1002C000B624FA30DC243508B300CF24B624FA3043
http://www.trash.net/~luethi/microchip/projects/keyboard/kbd_box/kbd_box_205_eng.hex (1 of 5)12/02/2008 20:21:26

:1002D000DC24ED30B300CF24B624FA30DC2435140E
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:100C9000743461346E3464342D34623479348207B0
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:02400E00F23F7F
:00000001FF

http://www.trash.net/~luethi/microchip/projects/keyboard/kbd_box/kbd_box_205_sg.hex
:020000040000FA
:1000000083160313810100298B138B1B0428AD0079
:10001000030EAE0083010A08AF008A0183130408AF
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http://www.trash.net/~luethi/microchip/projects/keyboard/kbd_box/kbd_box_205_sg.hex (1 of 5)12/02/2008 20:21:30

:1002D000DC24ED30B300CF24B624FA30DC2435140E
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http://www.trash.net/~luethi/microchip/projects/keyboard/morse_1x/morse_1x.asm
;***************************************************************************
;
; AT Keyboard Interface with Morse Code V1.02
; ===========================================
;
;
; V1.02: Re-structured ISR and RS232 echo sub-routines
; (11.04.2004)
;
; (16.08.2003)
;
;
;
;
;
; SPECIFICATIONS:
; ===============
http://www.trash.net/~luethi/microchip/projects/keyboard/morse_1x/morse_1x.asm (1 of 23)12/02/2008 20:23:44


;
;
; ABSTRACT:
; =========
; RS232 transmission protocol. Further, there is a Morse port where
; typed characters are transmitted in Morse code.
; 'codepages'. This implementation features no visual interface.
; Unidirectional data flow: Transmission only for characters typed on
; the local keyboard.
;
;
; DESCRIPTION:
; ============
; RS232 connection.
;
;
;
; Morse code feature:
; All legal ASCII characters specified within the Morse alphabet
; are translated to a 16 bit pattern through a look-up table.
; Within these bit patterns, two consecutive ones followed by a
; zero indicate a dash, a dot is encoded as single one followed

; by a zero.
; The Morse code has different lengths for encoding, e.g.
; e=. b = -... 1 = .---- ? = ..--..
; therefore 16 bits are necessary to support all of them.
; For instance, 'b' is encoded in 16 bits as b'1101_0101_0000_0000'
; Subsequent zeros at the end within a pattern are considered as
; termination and are ignored. The Morse pattern is signaled as
; pulse-width modulated stream at the Morse port, active high.
;
; Acoustic feedback of Morse code output through additional
; Piezo beeper possible.
;
;
; =====================
; and inactive.
;
; or CTRL + 3 + F = ?
;
; - Morse code translation and PWM output at Morse port, active high
; - Acoustic feedback through Piezo beeper, default enabled
;
;
; LIMITATIONS:
; ============


;
;
; NOTE:
; =====
;
;
; CREDITS:
; ========
;
;***************************************************************************

PROCESSOR 16F84




#define MRSport PORTA,0x02 ; Morse code PWM output port

#define MRStris TRISA,0x02
#define BEEPport PORTA,0x03 ; Piezo beeper output port

; Morse output - wait constants

CONSTANT M_PRESC = d'6' ; prescaler for all Morse waits
CONSTANT INTER_W = 0x06 ; inter dash-dot wait
CONSTANT CHAR_W = 0x08 ; inter character wait (add. to INTER_W)
; ### IF PIEZO BEEPER IS DISABLED (BEEP_ENABLE = d'0') ###

CONSTANT DOT_W = 0x05 ; duration related, short wait, dot
CONSTANT DASH_W = 0x11 ; duration related, long wait, dash
; ### ELSE PIEZO BEEPER ENABLED (BEEP_ENABLE = d'1') ###
CONSTANT DOT_FREQ = d'145' ; frequency related, for dot
CONSTANT DOT_PRESC = d'1' ; duration related, for dot
CONSTANT DASH_FREQ = d'250' ; frequency related, for dash
CONSTANT DASH_PRESC = d'5' ; duration related, for dash
TEMP1 set
BASE+d'0' ; Universal temporary register
TEMP2 set
BASE+d'1' ; ATTENTION !!!
TEMP3 set
BASE+d'2' ; They are used by various modules.
TEMP4 set
BASE+d'3' ; If you use them, make sure not to use
; them concurrently !
FLAGreg equ BASE+d'4' ; register containing keyboard and other flags
;FLAGreg2 equ BASE+d'5'
; RS232 registers

TXD equ
BASE+d'6' ; RS232 TX-Data register
RXD equ
BASE+d'7' ; RS232 RX-Data register (not used here,
; but m_rs232 requires its declaration)
; AT keyboard registers and flags

; Morse code transmit registers

#define MRSflag FLAGreg,0x07 ; Morse flag, valid buffer
MRStmp0 equ BASE+d'15' ; temporary register
MRS_pnt set BASE+d'18' ; table pointer
MRS_cnt set BASE+d'19' ; one's counter
MRS_lbuf equ BASE+d'20' ; buffer, low byte
MRS_hbuf equ BASE+d'21' ; buffer, high byte
MRS_lo equ BASE+d'22' ; TX register, low byte
MRS_hi equ BASE+d'23' ; TX register, high byte
ORG 0x240
ENDIF
;***** MACROS *****

KEYBOARDinit macro
BANK1
BANK0
endm
ISR ;************************
;************************

goto ISR
;**************************
;**************************
;*****************************************
;*****************************************

tstf KBDcnt ; check


goto _INCF ; exit

btfsc KBDdatapin
bsf KBD,0x07
goto _INCF ; exit

goto _INCF ; exit

BANK0

;***********************************
;***********************************



_ISR_RS232error
;*****************************************
;*****************************************

KBDdecode
;**********************************************************
;**********************************************************



;****************************************************
;* further down. *

;****************************************************
;*********************************************************************
;*********************************************************************

;****************************************************
;****************************************************
;********************************
;********************************
btfss SPEflag
goto _KBD_3
movfw KBD
movwf KBD
goto _OUTP
movfw KBD


goto _ClrStall
movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'14'
movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'25'
goto KBD_dec
movfw KBD
sublw 0x77 ; 0x77 - w
movfw KBD
;*******************************************************
;*******************************************************

movfw KBD




movfw KBD
sublw 0x60 ; 0x60 - w
movfw KBD
movfw KBD
movwf KBD
;**********************************************************
;*** KEYBOARD DATA OUTPUT TO RS232 & MORSE CODE BUFFERS ***
;**********************************************************
_OUTP ;*** RS232 ***

movfw KBD
movwf MRStmp0 ; local copy for Morse code support
;*** Morse Code ***
;check for proper Morse code value (a-z, 0-9, special chars)
;*** A-Z, a-z => 0x41 - 0x5A, 0x61 - 0x7A ***
movfw MRStmp0
BRG 0x7A, _ClrStall ; macro, exit if above 0x7A
movfw MRStmp0
BRS 0x41, _MRSnum ; branch on w < 0x41
; w >= 41, must be alphabetic character or invalid
bcf MRStmp0,0x5 ; x - 0x20 if x in [0x60-0x7A]

movfw MRStmp0
BRS 0x41, _ClrStall ; branch on w < 0x41
;now in 0x41 - 0x5A, calculate table pointer
rlf MRStmp0,W ; get ASCII character value, multiply 2
addlw d'146' ; subtract (wrap-around addition)
movwf MRS_pnt ; store calculated pointer
goto _MRS_dec ; goto decoding
_MRSnum ;*** 0-9 => 0x30 - 0x39 ***

movfw MRStmp0
BRS 0x30, _MRSspc1 ; branch on w < 0x30
movfw MRStmp0
BRG 0x39, _MRSspc2 ; branch on w > 0x39
;now in 0x30 - 0x39, calculate table pointer
_MRSspc1 ;*** special chars < 0x30 ***

;" 0x22, ' 0x27, ( 0x28, ) 0x29, , 0x2C, ; - 0x2D, . 0x2E
movfw MRStmp0
BNEQ 0x22, _MRSspc1a ; wasn't ", try next one
movlw d'72' ; load discrete pointer
goto _MRSspc3
_MRSspc1a movfw MRStmp0
BNEQ 0x27, _MRSspc1b ; wasn't ', try next one
goto _MRSspc3
_MRSspc1b movfw MRStmp0
BNEQ 0x28, _MRSspc1c ; wasn't '(', try next one
goto _MRSspc3
_MRSspc1c movfw MRStmp0
BNEQ 0x29, _MRSspc1d ; wasn't ')', try next one
goto _MRSspc3
_MRSspc1d movfw MRStmp0
BNEQ 0x2C, _MRSspc1e ; wasn't ',', try next one
goto _MRSspc3
_MRSspc1e movfw MRStmp0
BNEQ 0x2D, _MRSspc1f ; wasn't '-', try next one

goto _MRSspc3
_MRSspc1f movfw MRStmp0
BNEQ 0x2E, _ClrStall ; wasn't '.' - exit
goto _MRSspc3
_MRSspc2 ;*** special chars > 0x39: : 0x3A, ? 0x3F ***

movfw MRStmp0
BNEQ 0x3A, _MRSspc2a ; wasn't ':', try next one
goto _MRSspc3
BNEQ 0x3F, _ClrStall ; wasn't '?', invalid, exit
;goto _MRSspc3
_MRSspc3 movwf MRS_pnt ; store calculated pointer
;prepare decoding
_MRS_dec bsf MRSflag ; if valid, set flag
movwf MRS_pnt ; store value in pointer
;get corresponding Morse code lookup-table entry
;and store entries in morse buffer (high & low)
movlw HIGH MORSEtable ; get correct page for PCLATH
movfw MRS_pnt ; get pointer for high value
call MORSEtable ; call lookup-table
movwf MRS_hbuf ; store in high buffer
incf MRS_pnt,f ; increment pointer for low value
movfw MRS_pnt ; get pointer
movwf MRS_lbuf ; store in low buffer
;************************************************
;************************************************
_CRLF SEND CR ; on 'Enter', send CR and LF to RS232

movlw LF ; put LF to w, return
RETURN
;**********************************************************

;**********************************************************
_ClrStall
BANK1
RETURN
;****************************************************
;****************************************************



;***********************************************
;***********************************************


; in CTRLreg1 - 2


;*****************************************************************
;*****************************************************************
btfss SHIflag
goto _OUTP ; branch
movfw KBD
sublw d'13' ; d'13' - w

movfw KBDcopy
sublw 0x61 ; 0x61 - w
movfw KBDcopy
movlw d'61'
goto _SHICH3
sublw 0x24 ; 0x24 - w
movlw d'35'
goto _SHICH3
;*** else ***
_SHICH2 movlw d'4'

movfw KBDcopy
goto _OUTP

;*******************************************************
;*******************************************************
;**********************************************************************
;**********************************************************************

ORG 0x1B0
;***** MORSE OUTPUT SUBROUTINE *****
MORSEout
movfw MRS_lbuf ; copy buffers to output registers
movwf MRS_lo
movfw MRS_hbuf
movwf MRS_hi
bcf MRSflag ; reset Morse flag
clrf MRS_cnt ; clear one's counter
movlw 0x2
movwf MRStmp0 ; set up outer loop counter
_MRSloop1
movlw 0x8
movwf MRStmp1 ; set up inner loop counter
; in first pass, take high value, in second pass, take low value
btfsc MRStmp0,1 ; check for first outer loop pass
movfw MRS_hi ; get high value
btfss MRStmp0,1 ; check for second outer loop pass
movfw MRS_lo ; get low value
movwf MRStmp2 ; store in temp register
_MRSloop2
btfss MRStmp2,0x7 ; check for 1
goto _MRSout ; it has been a zero, signal now
incf MRS_cnt,F ; increment one's counter
goto _MRSnext ; continue loop
_MRSout ;*** check for next dash/dot to signal ***

tstf MRS_cnt ; test register

skpnz ; skip on not zero
goto _MRSnext ; if zero, goto next loop
;*** put now dash/dot to Morse output port ***
bsf MRSport ; set Morse port
movfw MRS_cnt ; move counter to w
BREG 0x2, _MRSdash ; if >= 2, jump to dash
BEEP DOT_FREQ,DOT_PRESC ; (short beep, dot)
ELSE
WAITX DOT_W,M_PRESC ; (short wait, dot)
ENDIF
goto _MRSclr
_MRSdash
BEEP DASH_FREQ,DASH_PRESC ; (long beep, dash)
ELSE
WAITX DASH_W,M_PRESC ; (long wait, dash)
ENDIF
_MRSclr bcf MRSport ; clear Morse port
WAITX INTER_W,M_PRESC ; (inter dot-dash wait)
_MRSnext rlf MRStmp2,F ; rotate left
decfsz MRStmp1,F
goto _MRSloop2 ; INNER LOOP
decfsz MRStmp0,F
goto _MRSloop1 ; OUTER LOOP
WAITX CHAR_W,M_PRESC ; (inter character wait)
RETURN
;***** END OF MORSE OUTPUT SUBROUTINE *****
;************** MAIN **************
MAIN ORG 0x00
BANK1
goto _MAIN
ORG 0x180



bcf MRStris ; set Morse port to output
bcf BEEPtris ; set Piezo beeper port to output
ENDIF
BANK0
bcf MRSport ; set default state: logical 0


movlw b'11111000'

movwf TEMP3

SENDw
goto _ILOOP
if BEEP_ENABLE == 1 ; conditional assembly

BEEP 0xFF, 0x02
BEEP 0x90, 0x03
BEEP 0xC0, 0x03
endif

;******************************
btfsc MRSflag ; check for new Morse buffer content
call MORSEout ; if set, call Morse output subroutine
goto _MLOOP ; endless loop
;******************************
ORG 0x2D0 ; align table within page
WelcomeTable
DT "PIC 16F84 AT Keyboard Decoder connected" ; create table
WelcomeTableEND retlw LF ; Line Feed
IF (high (WelcomeTable) != high (WelcomeTableEND))

ENDIF
MORSEtable
addwf PCL,1
retlw 0xDB ; 0, Hi-Byte
retlw 0x6C ; Lo-Byte
retlw 0xB6 ;1
retlw 0xD8
retlw 0xAD ;2
retlw 0xB0
retlw 0xAB ;3
retlw 0x60
retlw 0xAA ;4
retlw 0xC0
retlw 0xAA ;5
retlw 0x80
retlw 0xD5 ;6
retlw 0x40
retlw 0xDA ;7
retlw 0xA0
retlw 0xDB ;8
retlw 0x50
retlw 0xDB ;9

retlw 0x68
retlw 0xB0 ;A
retlw 0x0
retlw 0xD5 ;B
retlw 0x0
retlw 0xD6 ;C
retlw 0x80
retlw 0xD4 ;D
retlw 0x0
retlw 0x80 ;E
retlw 0x0
retlw 0xAD ;F
retlw 0x0
retlw 0xDA ;G
retlw 0x0
retlw 0xAA ;H
retlw 0x0
retlw 0xA0 ;I
retlw 0x0
retlw 0xB6 ;J
retlw 0xC0
retlw 0xD6 ;K
retlw 0x0
retlw 0xB5 ;L
retlw 0x0
retlw 0xD8 ;M
retlw 0x0
retlw 0xD0 ;N
retlw 0x0
retlw 0xDB ;O
retlw 0x0
retlw 0xB6 ;P
retlw 0x80
retlw 0xDA ;Q
retlw 0xC0
retlw 0xB4 ;R
retlw 0x0
retlw 0xA8 ;S
retlw 0x0
retlw 0xC0 ;T
retlw 0x0
retlw 0xAC ;U
retlw 0x0
retlw 0xAB ;V

retlw 0x0
retlw 0xB6 ;W
retlw 0x0
retlw 0xD5 ;X
retlw 0x80
retlw 0xD6 ;Y
retlw 0xC0
retlw 0xDA ;Z
retlw 0x80
retlw 0xB5 ;"
retlw 0x68
retlw 0xB6 ;'
retlw 0xDA
retlw 0xD6 ; ()
retlw 0xD6
retlw 0xDA ;,
retlw 0xB6
retlw 0xD5 ;-
retlw 0x58
retlw 0xB5 ;.
retlw 0xAC
retlw 0xDB ;:
retlw 0x54
retlw 0xAD ;?
MORSEtableEND retlw 0xA8
IF (high (MORSEtable) != high (MORSEtableEND))

ERROR "Morse table hits page boundary!"
ENDIF
END

http://www.trash.net/~luethi/microchip/projects/keyboard/morse_1x/morse_1x_eng.hex
:020000040000FA
:1000000083160313810180298B138B1B042897000F
:10001000030E980083010A0899008A0183130408DB
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http://www.trash.net/~luethi/microchip/projects/keyboard/morse_1x/morse_1x_eng.hex (1 of 3)12/02/2008 20:23:59

:1003000005100511851183120313051405118316B9
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http://www.trash.net/~luethi/microchip/projects/keyboard/morse_1x/morse_1x_sg.hex
:020000040000FA
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http://www.trash.net/~luethi/microchip/projects/keyboard/morse_1x/morse_1x_sg.hex (1 of 3)12/02/2008 20:24:19

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;***************************************************************************
;
; AT Keyboard Interface with Morse Code V2.02
; ===========================================
;
;
; latest LCD modules.
; (11.04.2004)
;
; (16.08.2003)
;
;
;
;
;
; SPECIFICATIONS:
; ===============


;
;
; ABSTRACT:
; =========
; RS232 transmission protocol. Further, there is a Morse port where
; typed characters are transmitted in Morse code.
; 'codepages'. This implementation features an LCD display as visual
; interface, but only for transmitted characters typed on the local
; keyboard (unidirectional data flow).
;
;
; DESCRIPTION:
; ============
; RS232 connection.
;
;
;

; Morse code feature:

; All legal ASCII characters specified within the Morse alphabet
; are translated to a 16 bit pattern through a look-up table.
; Within these bit patterns, two consecutive ones followed by a
; zero indicate a dash, a dot is encoded as single one followed
; by a zero.
; The Morse code has different lengths for encoding, e.g.
; e=. b = -... 1 = .---- ? = ..--..
; therefore 16 bits are necessary to support all of them.
; For instance, 'b' is encoded in 16 bits as b'1101_0101_0000_0000'
; Subsequent zeros at the end within a pattern are considered as
; termination and are ignored. The Morse pattern is signaled as
; pulse-width modulated stream at the Morse port, active high.
;
; Acoustic feedback of Morse code output through additional
; Piezo beeper possible.
;
;
; =====================
; and inactive.
;
; or CTRL + 3 + F = ?
;
; - Morse code translation and PWM output at Morse port, active high
; - Acoustic feedback through Piezo beeper, default enabled
;
;
; LIMITATIONS:
; ============


;
;
; NOTE:
; =====
;
;
; CREDITS:
; ========
;
;***************************************************************************

PROCESSOR 16F84




#define MRSport PORTA,0x01 ; Morse code PWM output port

#define MRStris TRISA,0x01
LCDtris equ TRISB ; LCD port (B1-B7)

LCDport equ PORTB ; LCD port (B1-B7)
; display
#define BEEPport PORTA,0x03 ; Piezo beeper output port

; Morse output - wait constants

CONSTANT M_PRESC = d'6' ; prescaler for all Morse waits
CONSTANT INTER_W = 0x06 ; inter dash-dot wait
CONSTANT CHAR_W = 0x08 ; inter character wait (add. to INTER_W)
; ### IF PIEZO BEEPER IS DISABLED (BEEP_ENABLE = d'0') ###

CONSTANT DOT_W = 0x05 ; duration related, short wait, dot
CONSTANT DASH_W = 0x11 ; duration related, long wait, dash
; ### ELSE PIEZO BEEPER ENABLED (BEEP_ENABLE = d'1') ###
CONSTANT DOT_FREQ = d'145' ; frequency related, for dot
CONSTANT DOT_PRESC = d'1' ; duration related, for dot
CONSTANT DASH_FREQ = d'250' ; frequency related, for dash

CONSTANT DASH_PRESC = d'5' ; duration related, for dash

TEMP6 set BASE+d'5'
TEMP7 set BASE+d'6'

; RS232 registers
RXD equ BASE+d'10' ; RS232 RX-Data register (not used here,
; but m_rs232 requires its declaration)
; AT keyboard registers and flags

; Morse code transmit registers

#define MRSflag FLAGreg,0x07 ; Morse flag, valid buffer
MRS_pnt set BASE+d'21' ; table pointer
MRS_cnt set BASE+d'22' ; one's counter

MRS_lbuf equ BASE+d'23' ; buffer, low byte

MRS_hbuf equ BASE+d'24' ; buffer, high byte
MRS_lo equ BASE+d'25' ; TX register, low byte
MRS_hi equ BASE+d'26' ; TX register, high byte
; LCD registers and flags

ORG 0x220
ENDIF
;***** MACROS *****
KEYBOARDinit macro
BANK1
BANK0
endm


goto _cl_1
RETURN
goto _cl_2
RETURN
ISR ;************************
;************************

goto ISR
;**************************
;**************************
;*****************************************
;*****************************************


tstf KBDcnt ; check
goto _INCF ; exit

btfsc KBDdatapin
bsf KBD,0x07
goto _INCF ; exit

goto _INCF ; exit

BANK0

;***********************************


;***********************************

_ISR_RS232error
;*****************************************
;*****************************************

KBDdecode
;**********************************************************
;**********************************************************



;****************************************************


;* further down. *
;****************************************************
;*********************************************************************
;*********************************************************************

;****************************************************
;****************************************************
;********************************
;********************************
btfss SPEflag
goto _KBD_3
movfw KBD
movwf KBD
goto _OUTP
movfw KBD


goto _ClrStall
movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'14'
movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'25'
goto KBD_dec
movfw KBD
sublw 0x77 ; 0x77 - w
movfw KBD
;*******************************************************
;*******************************************************

movfw KBD




movfw KBD
sublw 0x60 ; 0x60 - w
movfw KBD
movfw KBD
movwf KBD
;***********************************************************************
;*** KEYBOARD DATA OUTPUT TO RS232, LCD DISPLAY & MORSE CODE BUFFERS ***
;***********************************************************************
_OUTP ;*** RS232 ***

movfw KBD
movwf MRStmp0 ; local copy for Morse code support


movfw LCDpos ; get LCD position counter
incf LCDpos,F ; and increment LCD position counter
_TAB2 movlw a' '
BRS LCDwidth, _LCDout ; branch if w < LCDwidth
movfw KBD
;*** Morse Code ***

;check for proper Morse code value (a-z, 0-9, special chars)
;*** A-Z, a-z => 0x41 - 0x5A, 0x61 - 0x7A ***
movfw MRStmp0
BRG 0x7A, _ClrStall ; macro, exit if above 0x7A
movfw MRStmp0
BRS 0x41, _MRSnum ; branch on w < 0x41
; w >= 41, must be alphabetic character or invalid
bcf MRStmp0,0x5 ; x - 0x20 if x in [0x60-0x7A]
movfw MRStmp0
BRS 0x41, _ClrStall ; branch on w < 0x41
;now in 0x41 - 0x5A, calculate table pointer


_MRSnum ;*** 0-9 => 0x30 - 0x39 ***

movfw MRStmp0
BRS 0x30, _MRSspc1 ; branch on w < 0x30
movfw MRStmp0
BRG 0x39, _MRSspc2 ; branch on w > 0x39
;now in 0x30 - 0x39, calculate table pointer
_MRSspc1 ;*** special chars < 0x30 ***

;" 0x22, ' 0x27, ( 0x28, ) 0x29, , 0x2C, ; - 0x2D, . 0x2E
movfw MRStmp0
BNEQ 0x22, _MRSspc1a ; wasn't ", try next one
goto _MRSspc3
BNEQ 0x27, _MRSspc1b ; wasn't ', try next one
goto _MRSspc3
_MRSspc1b movfw MRStmp0
BNEQ 0x28, _MRSspc1c ; wasn't '(', try next one
goto _MRSspc3
_MRSspc1c movfw MRStmp0
BNEQ 0x29, _MRSspc1d ; wasn't ')', try next one
goto _MRSspc3
_MRSspc1d movfw MRStmp0
BNEQ 0x2C, _MRSspc1e ; wasn't ',', try next one
goto _MRSspc3
_MRSspc1e movfw MRStmp0
BNEQ 0x2D, _MRSspc1f ; wasn't '-', try next one
goto _MRSspc3
_MRSspc1f movfw MRStmp0
BNEQ 0x2E, _ClrStall ; wasn't '.' - exit
goto _MRSspc3

_MRSspc2 ;*** special chars > 0x39: : 0x3A, ? 0x3F ***

movfw MRStmp0
BNEQ 0x3A, _MRSspc2a ; wasn't ':', try next one
goto _MRSspc3
BNEQ 0x3F, _ClrStall ; wasn't '?', invalid, exit
;goto _MRSspc3
_MRSspc3 movwf MRS_pnt ; store calculated pointer
;prepare decoding
_MRS_dec bsf MRSflag ; if valid, set flag
movwf MRS_pnt ; store value in pointer
;get corresponding Morse code lookup-table entry
;and store entries in morse buffer (high & low)
movlw HIGH MORSEtable ; get correct page for PCLATH
movfw MRS_pnt ; get pointer for high value
movwf MRS_hbuf ; store in high buffer
incf MRS_pnt,f ; increment pointer for low value
movfw MRS_pnt ; get pointer
movwf MRS_lbuf ; store in low buffer
;************************************************
;************************************************

SEND LF
;**********************************************************
;**********************************************************
_ClrStall
BANK1

RETURN
;****************************************************
;****************************************************



;***********************************************
;***********************************************


; in CTRLreg1 - 2

;*****************************************************************
;*****************************************************************

btfss SHIflag
goto _OUTP ; branch
movfw KBD
sublw d'13' ; d'13' - w

movfw KBDcopy
sublw 0x61 ; 0x61 - w
movfw KBDcopy
movlw d'61'
goto _SHICH3
sublw 0x24 ; 0x24 - w
movlw d'35'
goto _SHICH3
;*** else ***
_SHICH2 movlw d'4'

movfw KBDcopy
goto _OUTP
;*******************************************************
;*******************************************************

;**********************************************************************
;**********************************************************************

ORG 0x1E0
;***** MORSE OUTPUT SUBROUTINE *****
MORSEout
movfw MRS_lbuf ; copy buffers to output registers
movwf MRS_lo
movfw MRS_hbuf
movwf MRS_hi
bcf MRSflag ; reset Morse flag
movlw 0x2
movwf MRStmp0 ; set up outer loop counter
_MRSloop1
movlw 0x8
movwf MRStmp1 ; set up inner loop counter
; in first pass, take high value, in second pass, take low value
btfsc MRStmp0,1 ; check for first outer loop pass
movfw MRS_hi ; get high value
btfss MRStmp0,1 ; check for second outer loop pass
movfw MRS_lo ; get low value
movwf MRStmp2 ; store in temp register
_MRSloop2
btfss MRStmp2,0x7 ; check for 1
goto _MRSout ; it has been a zero, signal now
incf MRS_cnt,F ; increment one's counter
goto _MRSnext ; continue loop
_MRSout ;*** check for next dash/dot to signal ***
tstf MRS_cnt ; test register
skpnz ; skip on not zero
goto _MRSnext ; if zero, goto next loop
;*** put now dash/dot to Morse output port ***

bsf MRSport ; set Morse port

movfw MRS_cnt ; move counter to w
BREG 0x2, _MRSdash ; if >= 2, jump to dash
BEEP DOT_FREQ,DOT_PRESC ; (short beep, dot)
ELSE
WAITX DOT_W,M_PRESC ; (short wait, dot)
ENDIF
goto _MRSclr
_MRSdash
BEEP DASH_FREQ,DASH_PRESC ; (long beep, dash)
ELSE
WAITX DASH_W,M_PRESC ; (long wait, dash)
ENDIF
_MRSclr bcf MRSport ; clear Morse port
WAITX INTER_W,M_PRESC ; (inter dot-dash wait)
_MRSnext rlf MRStmp2,F ; rotate left
decfsz MRStmp1,F
goto _MRSloop2 ; INNER LOOP
decfsz MRStmp0,F
goto _MRSloop1 ; OUTER LOOP
WAITX CHAR_W,M_PRESC ; (inter character wait)
RETURN
;***** END OF MORSE OUTPUT SUBROUTINE *****
;************** MAIN **************
MAIN ORG 0x00
BANK1
goto _MAIN
ORG 0x180


bcf MRStris ; set Morse port to output

bcf BEEPtris ; set Piezo beeper port to output
ENDIF
BANK0
bcf MRSport ; set default state: logical 0


movlw LCDwidth

movlw b'11111000'

movwf TEMP6

movfw TEMP7
LCDw ; LCD output
goto _ILOOP
SEND LF ; line feed
SEND LF

if BEEP_ENABLE == 1 ; conditional assembly

BEEP 0xFF, 0x02
BEEP 0x90, 0x03
BEEP 0xC0, 0x03
endif
;******************************
btfsc MRSflag ; check for new Morse buffer content
call MORSEout ; if set, call Morse output subroutine
goto _MLOOP ; endless loop
;******************************
ORG 0x2D8 ; align table within page
WelcomeTable
WTableEND DT "d"

ENDIF
MORSEtable
addwf PCL,1
retlw 0xDB ; 0, Hi-Byte
retlw 0x6C ; Lo-Byte
retlw 0xB6 ;1
retlw 0xD8
retlw 0xAD ;2
retlw 0xB0
retlw 0xAB ;3
retlw 0x60
retlw 0xAA ;4
retlw 0xC0
retlw 0xAA ;5
retlw 0x80
retlw 0xD5 ;6
retlw 0x40

retlw 0xDA ;7
retlw 0xA0
retlw 0xDB ;8
retlw 0x50
retlw 0xDB ;9
retlw 0x68
retlw 0xB0 ;A
retlw 0x0
retlw 0xD5 ;B
retlw 0x0
retlw 0xD6 ;C
retlw 0x80
retlw 0xD4 ;D
retlw 0x0
retlw 0x80 ;E
retlw 0x0
retlw 0xAD ;F
retlw 0x0
retlw 0xDA ;G
retlw 0x0
retlw 0xAA ;H
retlw 0x0
retlw 0xA0 ;I
retlw 0x0
retlw 0xB6 ;J
retlw 0xC0
retlw 0xD6 ;K
retlw 0x0
retlw 0xB5 ;L
retlw 0x0
retlw 0xD8 ;M
retlw 0x0
retlw 0xD0 ;N
retlw 0x0
retlw 0xDB ;O
retlw 0x0
retlw 0xB6 ;P
retlw 0x80
retlw 0xDA ;Q
retlw 0xC0
retlw 0xB4 ;R
retlw 0x0
retlw 0xA8 ;S
retlw 0x0

retlw 0xC0 ;T
retlw 0x0
retlw 0xAC ;U
retlw 0x0
retlw 0xAB ;V
retlw 0x0
retlw 0xB6 ;W
retlw 0x0
retlw 0xD5 ;X
retlw 0x80
retlw 0xD6 ;Y
retlw 0xC0
retlw 0xDA ;Z
retlw 0x80
retlw 0xB5 ;"
retlw 0x68
retlw 0xB6 ;'
retlw 0xDA
retlw 0xD6 ; ()
retlw 0xD6
retlw 0xDA ;,
retlw 0xB6
retlw 0xD5 ;-
retlw 0x58
retlw 0xB5 ;.
retlw 0xAC
retlw 0xDB ;:
retlw 0x54
retlw 0xAD ;?
MORSEtableEND retlw 0xA8
IF (high (MORSEtable) != high (MORSEtableEND))

ERROR "Morse table hits page boundary!"
ENDIF
END

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http://www.trash.net/~luethi/microchip/projects/rs232/commtest1/commtest1.asm
;***************************************************************************
;
; RS232 Communication Test for PIC 16XXX V1.03
; ============================================
;
;
; V1.03: Added transmission of status message ('@') every 2.75 s
; when PIC terminal is idle. Used therefore 24 bit counter.
; (31.12.2004)
;
; V1.02: Fixed copy/paste issue of ISR context store/restore
; (nobody is perfect): Erroneously erased INTCON,INTF
; clearing, resulting in endless ISR calling...
; Re-structured entire ISR and RS232 echo sub-routines
; (11.04.2004)
;
; V1.01: ISR context restore improvements
; (30.12.2000)
;
;
;
;
;
; SPECIFICATIONS:
; ===============
; RS232 Baud Rate: 9600 baud, 8 bit, no parity, 1 stopbit
; Required Hardware: MAX 232, dot matrix LCD display
http://www.trash.net/~luethi/microchip/projects/rs232/commtest1/commtest1.asm (1 of 11)12/02/2008 20:29:25

; Acquisition Methodology: Interrupt-based RS232 data acquisition,

; with LCD display output and RS232 echo
; during normal operation
;
;
; DESCRIPTION:
; ============
; featured PICs.
; This program handles all aspects of
; Transmission (register TXD) and
; Display of received ASCII characters sent from RS232 host and
; their decimal representation on the dot matrix LCD display.
; The microcontroller sends feedback of received RS232 characters back
; to the terminal window. When the PIC terminal is idle, it sends a
; status message '@' to the PC every 2.75 seconds.
;
; Shows the implementation and function of the modules m_wait.asm,
; m_lcd.asm, m_lcdv08.asm, and m_rs096.asm on the PIC16F84.
;
;
; =====================
; and remote RS232 client by software-based RS232 transmission.
; - Display of received character on dot matrix LCD.
;
;***************************************************************************

PROCESSOR 16F84
; embed Configuration Data within .asm File



goto MAIN ; main program

CONSTANT LCDWAIT = 0x02 ; LCD wait for initialization

CONSTANT LCDSPEED = 0x01 ; configure according to PIC clock

LCDtris equ TRISB

LCDport equ PORTB

TEMP5 set BASE+d'4' ; them concurrently! No use in ISR!
LO equ BASE+d'5'
LO_TEMP equ BASE+d'6'

#define LCDbusy FLAGreg,0x01 ; LCD busy flag
#define BCflag FLAGreg,0x03 ; blank checker for preceeding zeros
TXD equ BASE+d'8' ; TX-Data register

RXD equ BASE+d'9' ; RX-Data register

LOcnt equ BASE+d'14' ; low byte of 24 bit counter

MEDcnt equ BASE+d'15' ; medium byte of 24 bit counter
HIcnt equ BASE+d'16' ; high byte of 24 bit counter
#include "..\..\m_lcd.asm" ; standard version (fixed delay)
;#include "..\..\m_lcd_bf.asm" ; fast, bi-directional version
#include "..\..\m_lcdv08.asm"
#include "..\..\m_rs096.asm" ; standard RS232 baud rate
;***** MACROS *****
COUNTERinit ; *** Initialize 24 bit counter for status message wait interval ***
clrf LOcnt ; init counter
clrf MEDcnt ; init counter
movlw d'6'
movwf HIcnt ; init counter
RETURN
RSservice ; *** RS232 echo & LCD display routine for received RS232 characters ***
LCD_DDAdr 0x45
movfw RXD ; get received RS232 data
LCDw ; send to LCD display
LCD_DDAdr 0x4D
movfw RXD
movwf LO
LCDval_08 ; display decimal value
SEND TAB
SEND 'r'
SEND 'e'

SEND 'c'
SEND 'e'
SEND 'i'
SEND 'v'
SEND 'e'
SEND 'd'
SEND ''

SEND ''
SEND 'o'
SEND 'n'
SEND ''
SEND 'M'
SEND 'i'
SEND 'c'
SEND 'r'
SEND 'o'
SEND 'c'
SEND 'h'
SEND 'i'
SEND 'p'
SEND ''
SEND 'P'
SEND 'I'
SEND 'C'
SEND '1'
SEND '6'
SEND 'F'
SEND '8'
SEND '4'
SEND LF ; Line Feed

RETURN

ISR ;************************
;************************

goto ISR
;**************************
;**************************
;*** determine origin of interrupt ***

; catch-all
;******************************
;******************************
_ISR_RS232
;***********************************


;***********************************
_ISR_RS232error
_ISR_RS232end
;*****************************************
;*****************************************

;************** MAIN **************
MAIN LCDinit ; LCD Initialization

RS232init ; RS232 Initialization
;*** START-UP MESSAGE of LCD ***

LCDchar 'R'
LCDchar 'S'
LCDchar '2'

LCDchar '3'
LCDchar '2'
LCDchar ' '
LCDchar 'C'
LCDchar 'o'
LCDchar 'm'
LCDchar 'm'
LCDchar 'u'
LCDchar 'n'
LCDchar 'i'
LCDchar 'c'
LCDchar 'a'
LCDchar '-'
LCDline 2
LCDchar 't'
LCDchar 'i'
LCDchar 'o'
LCDchar 'n'
LCDchar ' '
LCDchar 'o'
LCDchar 'n'
LCDchar ' '
LCDchar 'P'
LCDchar 'I'
LCDchar 'C'
LCDchar '1'
LCDchar '6'
LCDchar 'F'
LCDchar '8'
LCDchar '4'
;*** START-UP MESSAGE to RS232 ***

; this is done by reading a look-up table
movwf TEMP5
; transmit message


decfsz TEMP5,f ; decrement counter
goto _ILOOP1
WAITX 0x1A, b'00000111' ; wait some time
; a little bit animation...

SEND 'a'
SEND 'n'
SEND 'i'
SEND 'm'
SEND 'a'
SEND 't'
SEND 'i'
SEND 'n'
SEND 'g'
SEND ' '
SEND 'L'
SEND 'C'
SEND 'D'
SEND '.'
SEND '.'
SEND '.'
SEND LF ; Line Feed
movlw d'16'
movwf TEMP5
_SHL1 LCDcmd LCDSL ; shift left LCD display content
WAIT 0xC0
decfsz TEMP5,f
goto _SHL1
; finally, reset/clear LCD

LCDcmd LCDCLR
LCDchar 'R'
LCDchar 'S'
LCDchar '2'
LCDchar '3'
LCDchar '2'

LCDchar ' '

LCDchar 'R'
LCDchar 'e'
LCDchar 'c'
LCDchar 'e'
LCDchar 'p'
LCDchar 't'
LCDchar 'i'
LCDchar 'o'
LCDchar 'n'
LCDchar ':'
LCDline 2
LCDchar 'C'
LCDchar 'h'
LCDchar 'a'
LCDchar 'r'
LCD_DDAdr 0x47
LCDchar 'V'
LCDchar 'a'
LCDchar 'l'
LCDchar 'u'
LCDchar 'e'
SEND 'r'
SEND 'e'
SEND 'a'
SEND 'd'
SEND 'y'
SEND '.'
SEND '.'
SEND '.'
SEND LF ; Line Feed
call COUNTERinit ; initialize 24 bit counter
;******************************
_MLOOP btfsc RSflag ; check RS232 data reception flag
call COUNTERinit ; reset 24 bit counter

; status message wait counter

decfsz LOcnt,f ; decrement low byte of 24 bit counter
goto _MLOOP ; loop
decfsz MEDcnt,f ; decrement medium byte of 24 bit counter
goto _MLOOP ; loop
decfsz HIcnt,f ; decrement high byte of 24 bit counter
goto _MLOOP ; loop
; now, all bytes of 24 bit counter are zero, transmit status message...
; send status message every 2.75 s

SEND '@'
SEND CR
SEND LF
;******************************
;ORG 0x230 ; if necessary, move look-up tables
WelcomeTable
retlw CR
retlw LF
DT "Microchip PIC16F84 connected and stand-by..." ; create table
retlw CR
WTableEND retlw LF
ENDIF
END

http://www.trash.net/~luethi/microchip/projects/rs232/commtest1/commtest1.hex
:020000040000FA
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http://www.trash.net/~luethi/microchip/projects/rs232/commtest1/commtest1.hex (1 of 2)12/02/2008 20:29:29

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:00000001FF

;***************************************************************************
;
; Hardware RS232 Test Routine for PIC 16F77 V1.05
; ===============================================
;
;
; V1.05: Added transmission of status message ('@') every 2.75 s
; when PIC terminal is idle. Used therefore 24 bit counter.
; (31.12.2004)
;
; latest LCD modules. Changed controller type from PIC16C74A
; to flash device, i.e. PIC16F77.
; (18.04.2004)
;
; V1.03: Moved LCD and RS232 output from interrupt service routine
; to normal operation sub-routine, activated through flag.
; (28.10.2003)
;
; (28.10.2003)
;
; V1.01: Updated to latest revision of m_lcdv08.asm
; (28.12.2000)
;
;
;


;
;
; SPECIFICATIONS:
; ===============
; RS232 Configuration: 9600 with BRGH = 1
; Required Hardware: MAX 232, dot matrix LCD display
; Acquisition Methodology: Preemptive, interrupt-based RS232
; data acquisition, with LCD display
; output and RS232 echo during normal
; operation
;
; ABSTRACT:
; =========
; Fully hardware controlled RS232 reception and transmission.
; Display of received ASCII characters sent from PC via RS232 and
; their corresponding decimal value on the dot matrix LCD.
; the terminal window. When the PIC terminal is idle, it sends a
; status message '@' to the PC every 2.75 seconds.
;
;
; DESCRIPTION:
; ============
; Developed and tested on Microchip PIC 16C74A.
;
; Although it's not recommended to use BRGH = 1 with the 16C74A,
; I've tested the device on 9600 baud and it runs without any
; issues. Referring to the specification, the error using this
; selection in conjunction with a 4 MHz crystal is 0.16%. This is
; sufficient for error-free communication within this application.
;
; This program handles all aspects of transmission and reception
; through interrupts.
;
; Program shows the implementation and function of the modules m_bank.asm,

; m_wait.asm, m_lcd.asm and m_lcdv08.asm on the PIC16F77 or PIC16C74A.

;
;
; =====================
;
;***************************************************************************

PROCESSOR 16F77
;PROCESSOR 16C74A



LCDtris equ TRISB ; LCD on portB

LCDport equ PORTB





#define RX2flag FLAGreg,0x03 ; two RS232 bytes received
LO equ BASE+d'8' ; binary to decimal output (8 bit)






;#include "..\..\m_lcd_bf.asm" ; fast, bi-directional version (busy flag)
#include "..\..\m_lcdv08.asm" ; 8 bit to decimal conversion for LCD
;***** MACROS *****
RS232init macro
movlw d'25' ; 9600 baud @ 4.00 MHz, BRGH = 1
movwf SPBRG
BANK0
BANK1
BANK0
endm

movlw send_char
call _RSxmit
endm
SENDw macro
call _RSxmit
endm
movlw d'6'
RETURN
_RSxmit BANK1
BANK0


RETURN
goto RSdispEND
goto RSdispEND
RSdispEND
BANK1
RETURN

LCD_DDAdr 0x45
movfw RXtemp
LCDw ; ascii character output
LCD_DDAdr 0x4D
movfw RXtemp
movwf LO
LCDval_08 ; numeric ascii value output
; send echo back to PC
SEND TAB
SEND 'r'
SEND 'e'
SEND 'c'
SEND 'e'
SEND 'i'

SEND 'v'
SEND 'e'
SEND 'd'
SEND ' '
movfw RXtemp ; retrieve value
SENDw ; send across RS232 line
SEND ' '
SEND 'o'
SEND 'n'
SEND ' '
SEND 'M'
SEND 'i'
SEND 'c'
SEND 'r'
SEND 'o'
SEND 'c'
SEND 'h'
SEND 'i'
SEND 'p'
SEND ' '
SEND 'P'
SEND 'I'
SEND 'C'
SEND '1'
SEND '6'
SEND 'F'
SEND '7'
SEND '7'
SEND LF ; Line Feed
RETURN
ISR ;************************
;************************

goto ISR


;**************************
;**************************

;******************************
;******************************
_ISR_RS232
_ISR_RS232_A
;goto _ISR_RS232end ; exit ISR
_ISR_RS232end
;*****************************************


;*****************************************

;************** MAIN **************
MAIN
LCDinit ; LCD initialization
;*** ENABLE INTERRUPTS ***

movlw b'11111000'
LCDchar 'R'
LCDchar 'S'
LCDchar '2'
LCDchar '3'
LCDchar '2'
LCDchar ' '
LCDchar 'C'
LCDchar 'o'
LCDchar 'm'
LCDchar 'm'
LCDchar 'u'

LCDchar 'n'
LCDchar 'i'
LCDchar 'c'
LCDchar 'a'
LCDchar '-'
LCDline 2
LCDchar 't'
LCDchar 'i'
LCDchar 'o'
LCDchar 'n'
LCDchar ' '
LCDchar 'o'
LCDchar 'n'
LCDchar ' '
LCDchar 'P'
LCDchar 'I'
LCDchar 'C'
LCDchar '1'
LCDchar '6'
LCDchar 'F'
LCDchar '7'
LCDchar '7'

movwf TEMP5
; transmit message
goto _ILOOP1

; a little bit animation...

SEND 'a'
SEND 'n'
SEND 'i'
SEND 'm'
SEND 'a'
SEND 't'
SEND 'i'
SEND 'n'
SEND 'g'
SEND ' '
SEND 'L'
SEND 'C'
SEND 'D'
SEND '.'
SEND '.'
SEND '.'
SEND LF ; Line Feed
movlw d'16'
movwf TEMP5
_SHL1 LCDcmd LCDSL ; shift left LCD display content
WAIT 0xC0
decfsz TEMP5,f
goto _SHL1

LCDcmd LCDCLR
LCDchar 'R'
LCDchar 'S'
LCDchar '2'
LCDchar '3'
LCDchar '2'
LCDchar ' '
LCDchar 'R'
LCDchar 'e'
LCDchar 'c'
LCDchar 'e'
LCDchar 'p'
LCDchar 't'
LCDchar 'i'

LCDchar 'o'
LCDchar 'n'
LCDchar ':'
LCDline 2
LCDchar 'C'
LCDchar 'h'
LCDchar 'a'
LCDchar 'r'
LCD_DDAdr 0x47
LCDchar 'V'
LCDchar 'a'
LCDchar 'l'
LCDchar 'u'
LCDchar 'e'
SEND 'r'
SEND 'e'
SEND 'a'
SEND 'd'
SEND 'y'
SEND '.'
SEND '.'
SEND '.'
SEND LF ; Line Feed
;******************************
_MLOOP btfsc RSflag ; check RS232 data reception flag
; status message wait counter

goto _MLOOP ; loop
goto _MLOOP ; loop
goto _MLOOP ; loop

; now, all bytes of 24 bit counter are zero,

; i.e. RS232 has been idle for approx. 2.75 s,
; therefore, transmit now status message...
; send status message

SEND '@'
SEND CR
SEND LF
;******************************
WelcomeTable
retlw CR
retlw LF
retlw CR
WTableEND retlw LF
ENDIF
END

:020000040000FA
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:020470000A344C
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:00000001FF

http://www.trash.net/~luethi/microchip/projects/rs232/dual_rs232/16F77dual.asm
;***************************************************************************
;
; Dual RS232 Software Interface for PIC 16F77 V1.00
; =================================================
;
;
;
;
;
;
; SPECIFICATIONS:
; ===============
; RS232 Configuration: 9600 with BRGH = 1
; Required Hardware: two MAX 232 for two RS232 interfaces,
; dot matrix LCD display
; Acquisition Methodology: SW-based RS232: Interrupt-based RS232
; data acquisition
; HW-based RS232: Preemptive,
; interrupt-based RS232 data acquisition
; with LCD display output and RS232 echo
; during normal operation
;
;
; ABSTRACT:
; =========
; Dual RS232 terminal: Two independent RS232 interfaces, with
http://www.trash.net/~luethi/microchip/projects/rs232/dual_rs232/16F77dual.asm (1 of 15)12/02/2008 20:30:34

; display of received ASCII characters and corresponding decimal

; values on the dot matrix LCD. ASCII values entered on one terminal
; window are transmitted by the first RS232 link to the controller,
; displayed on the LCD, and further transmitted across the second
; RS232 link to the other terminal window.
; the issueing terminal window. When the PIC terminal is idle, it
; sends a status message '@' to both terminals every 2.75 seconds.
;
;
; DESCRIPTION:
; ============
; Developed and tested on PIC16F77.
; This program incorporates two independent RS232 interfaces, one
; HW-based and one SW-based RS232 interface.
; The HW-based RS232 interface uses the PIC-internal USART (and
; interrupts), configured to standard 9600 baud @ 4 MHz PIC clock.
; The SW-based RS232 interface is based on the module file m_rs096.asm,
; which performs interrupt-based RS232 reception on PortB0 (INTCON,INTF)
; at 9600 baud @ 4 MHz PIC clock.
;
; This program handles all aspects of RS232
; Transmission (register TXD) and
;
; Although it's not recommended to use BRGH = 1 with the 16C74A,
; I've tested the device on 9600 baud and it runs without any
; issues. Referring to the specification, the error using this
; selection in conjunction with a 4 MHz crystal is 0.16%. This is
; sufficient for error-free communication within this application.
;
; Program shows the implementation and function of the modules m_bank.asm,
; m_wait.asm, m_lcd.asm, m_lcdv08.asm, and m_rs096.asm on the PIC16F77
; or PIC16C74A.
;
;
; =====================
; - Dual RS232: Two independent RS232 interfaces.
; and two remote RS232 clients by both, hardware- and software-based
; RS232 transmission.

;
;***************************************************************************

PROCESSOR 16F77
;PROCESSOR 16C74A




LCDtris equ TRISB ; LCD on portB

LCDport equ PORTB




#define RSflagSW FLAGreg,0x00 ; SW-based RS232 data reception flag
#define RSflagHW FLAGreg,0x01 ; HW-based RS232 data reception flag
#define RX2flag FLAGreg,0x02 ; two RS232 bytes received (HW RS232)

TXD equ BASE+d'8' ; TX-Data register (SW-based RS232)

RXD equ BASE+d'9' ; RX-Data register (SW-based RS232)



#include "..\..\m_rs096.asm" ; standard SW-based RS232
;#include "..\..\m_lcd_bf.asm" ; fast, bi-directional version (busy flag)
#include "..\..\m_lcdv08.asm" ; 8 bit to decimal conversion for LCD
;***** MACROS *****

RS232init2 macro ; for HW-based RS232 reception

BANK1 ; asynchronous USART assignment:
movwf SPBRG
BANK0
BANK1
BANK0
endm
SEND2 macro send_char

movlw send_char
call _RSxmit
endm
SEND2w macro
call _RSxmit
endm
movlw d'6'
RETURN
_RSxmit BANK1 ; for HW-based RS232 transmission

BANK0
RETURN
; display on LCD

LCD_DDAdr 0x07
movfw RXD
LCDw ; ascii character output on LCD
LCD_DDAdr 0x0D
movfw RXD
movwf LO
SEND TAB
SEND 't'
SEND 'r'
SEND 'a'
SEND 'n'
SEND 's'
SEND 'm'
SEND 'i'
SEND 't'
SEND 't'
SEND 'e'
SEND 'd'
SEND ' '
SENDw ; transmit across RS232 line
SEND2w ; transmit across other RS232 line
SEND ' '
SEND 't'
SEND 'o'
SEND ' '
SEND 'l'
SEND 'i'
SEND 'n'
SEND 'k'
SEND ' '
SEND '2'
SEND LF ; Line Feed
bcf RSflagSW ; reset RS232 data reception flag
RETURN
RSservice2 ; *** RS232 echo & LCD display routine for received RS232 characters ***


goto RSdispEND
goto RSdispEND
RSdispEND
bcf RSflagHW ; reset RS232 data reception flag
BANK1
RETURN

; display on LCD
LCD_DDAdr 0x47
movfw RXtemp
LCDw ; ascii character output on LCD
LCD_DDAdr 0x4D
movfw RXtemp
movwf LO
SEND2 TAB
SEND2 't'
SEND2 'r'
SEND2 'a'
SEND2 'n'
SEND2 's'
SEND2 'm'
SEND2 'i'
SEND2 't'

SEND2 't'
SEND2 'e'
SEND2 'd'
SEND2 ' '
SEND2w ; transmit across RS232 line
SENDw ; transmit across other RS232 line
SEND2 ' '
SEND2 't'
SEND2 'o'
SEND2 ' '
SEND2 'l'
SEND2 'i'
SEND2 'n'
SEND2 'k'
SEND2 ' '
SEND2 '1'
SEND2 CR ; Carriage Return
SEND2 LF ; Line Feed
RETURN
ISR ;************************
;************************

goto ISR

;**************************
;**************************

goto _ISR_RS232_SW ; if set, there was a keypad stroke

goto _ISR_RS232_HW ; if set, there was an USART interrupt
; catch-all
;***************************************
;*** SW-BASED RS232 DATA ACQUISITION ***
;***************************************
_ISR_RS232_SW
bsf RSflagSW ; enable RS232 data reception flag
;***********************************
;***********************************
_ISR_RS232error
_ISR_RS232end

;***************************************
;*** HW-BASED RS232 DATA ACQUISITION ***
;***************************************
_ISR_RS232_HW
goto _ISR_RS232_HW_A ; no second byte received, branch
_ISR_RS232_HW_A
bsf RSflagHW ; enable RS232 data reception flag
;goto _ISR_RS232end_HW ; exit ISR
_ISR_RS232end_HW
;*****************************************
;*****************************************

;************** MAIN **************
MAIN

LCDinit ; LCD initialization

RS232init ; RS232 initialization (SW-based RS232)
RS232init2 ; RS232 initialization (HW-based RS232)
;*** ENABLE INTERRUPTS ***

movlw b'11111000'

movwf TEMP5
; transmit message
movwf TEMP4
SENDw ; RS232 output (on SW-based RS232)
movfw TEMP4
SEND2w ; RS232 output (on HW-based RS232)
goto _ILOOP1
LCDchar 'D'
LCDchar 'u'
LCDchar 'a'
LCDchar 'l'
LCDchar ' '
LCDchar 'R'
LCDchar 'S'
LCDchar '2'
LCDchar '3'
LCDchar '2'
LCDchar ' '

LCDchar 'R'
LCDchar 'e'
LCDchar 'c'
LCDchar 'e'
LCDchar 'p'
LCDline 0x2
LCDchar 't'
LCDchar 'i'
LCDchar 'o'
LCDchar 'n'
LCDchar ' '
LCDchar 'o'
LCDchar 'n'
LCDchar ' '
LCDchar 'P'
LCDchar 'I'
LCDchar 'C'
LCDchar '1'
LCDchar '6'
LCDchar 'F'
LCDchar '7'
LCDchar '7'

LCDcmd LCDCLR
LCDchar 'R'
LCDchar 'X'
LCDchar '1'
LCDchar ' '
LCDchar 'C'
LCDchar 'h'
LCD_DDAdr 0x09 ; goto specific LCD position
LCDchar 'V'
LCDchar 'a'
LCDchar 'l'
LCDline 0x2 ; line 2 on LCD

LCDchar 'R'
LCDchar 'X'
LCDchar '2'
LCDchar ' '
LCDchar 'C'

LCDchar 'h'
LCD_DDAdr 0x49 ; goto specific LCD position
LCDchar 'V'
LCDchar 'a'
LCDchar 'l'

movwf TEMP5
; transmit message
call ReadyTable ; call lookup table
movwf TEMP4
SENDw ; RS232 output (on SW-based RS232)
movfw TEMP4
SEND2w ; RS232 output (on HW-based RS232)
goto _ILOOP2
;******************************
_MLOOP ; first software-based RS232 link (no USART, just IRQs)
btfsc RSflagSW ; check RS232 data reception flag
btfsc RSflagSW ; check RS232 data reception flag
; second hardware-based RS232 link (USART & IRQs)

btfsc RSflagHW ; check RS232 data reception flag
btfsc RSflagHW ; check RS232 data reception flag
call RSservice2 ; if set, call RS232 echo & LCD display routine
; status message wait counter for idle transmission (approx. 2.75 s)

goto _MLOOP ; loop
goto _MLOOP ; loop


goto _MLOOP ; loop
; now, all bytes of 24 bit counter are zero,

; i.e. RS232 has been idle for approx. 2.75 s,
; therefore, transmit now status message...
; send status message

SEND '@' ; to SW-based RS232
SEND CR
SEND LF
SEND2 '@' ; to HW-based RS232
SEND2 CR
SEND2 LF
;******************************
WelcomeTable
retlw CR
retlw LF
DT "Dual RS232 Reception"
retlw CR
retlw LF
DT "===================="
retlw CR
retlw LF
retlw CR
WTableEND retlw LF
ENDIF
ReadyTable
DT "ready for transmission..." ; create table
retlw CR

RTableEND retlw LF
IF (HIGH (ReadyTable) != HIGH (RTableEND))
ERROR "ReadyTable hits page boundary!"
ENDIF
END

http://www.trash.net/~luethi/microchip/projects/rs232/dual_rs232/16F77dual.hex
:020000040000FA
:0200000059297C
:080008001A29A00081018316F2
:100010000313C03081050800A0008101831603137B
:10002000C030810501308104831203130B110B1DB5
:100030001728A00B16280800A80005100830A000FB
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:1000C00041200130A1002516672041200800A00131
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:100200001C2020307B2074307B206F307B202030FE
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:10027000A90CA00B32292D20061C36282514412953
http://www.trash.net/~luethi/microchip/projects/rs232/dual_rs232/16F77dual.hex (1 of 3)12/02/2008 20:30:38

:100280000B168B1050291A08AA008C1E4A291A082E
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:100510003734203463346F346E346E34653463346E
:10052000743465346434203461346E34643420347B

:100530007334743461346E3464342D3462347934F9
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:020580000A343B
:02400E00F23F7F
:00000001FF

http://www.trash.net/~luethi/microchip/projects/rs232/scope/scope.asm
;***************************************************************************
;
; RS232 Scope V1.02 Test Routine for PIC 16XXX
; ============================================
;
;
; V1.02: Re-structured ISR to comply with latest modules,
; added label _ISR_RS232error
; (19.04.2004)
;
; V1.01: Minor refinements (20.08.1999)
;
;
;
;
;
; SPECIFICATIONS:
; ===============
; Required Hardware: MAX232
; Required Software: MS Excel 97
;
;
; DESCRIPTION:
; ============
; Developed and tested on PIC16F84.
http://www.trash.net/~luethi/microchip/projects/rs232/scope/scope.asm (1 of 7)12/02/2008 20:31:03

; Demonstrates the RS232 data fetch from an Excel Worksheet with

; Visual Basic.
; Routine shows 16 bit Table Read and RS232 Transmission with Framing.
; The table data contains one half of a 16 bit "Sync"-function
; (sin(x)/x), which is read alternating top-down and bottom-up to
; get the entire function with minimal program code.
; There is a table configuation section where you have to declare,
; whether to send the top and bottom table item twice on
; direction change.
;
;
; Program shows the implementation and function of the modules
; m_bank.asm, m_wait.asm, and m_rs192.asm on the PIC16F84.
;
;
; REMARKS:
; ========
; The table was generated with the
; "Automatic Table Generator for MPLAB Assembler",
; an Excel Worksheet with Visual Basic macro written by myself.
;
;***************************************************************************

;PROCESSOR 16F84A
;#include "p16f84a.inc"
PROCESSOR 16F84


goto MAIN


goto MAIN ; no Interrupt Service Routine (ISR)
#define TXport PORTA,0 ; RS232 output port, could be

#define TXtris TRISA,0 ; any active push/pull port

#define TblUpDn FLAGreg,0x00 ; table read direction :
; top down: 0, bottom up: 1
LO equ BASE+d'8'
HI equ BASE+d'9'
TXD equ BASE+d'10'
RXD equ BASE+d'11'
TblPtr equ BASE+d'12' ; table pointer
;***** TABLE CONFIGURATION *****
#define TABLE_ITEMS d'46' ; number of 16 bit words

#define TOP_TWICE a'F' ; a'T' = (true) send top/bottom item
#define BOTTOM_TWICE a'F' ; twice on direction change
#include "..\..\m_bank.asm" ; standard macros

#include "..\..\m_rs192.asm" ; specify desired RS232 module
ISR ; not used ( ISRend necessary for m_rs232.asm )
_ISR_RS232error
ISRend bcf INTCON,INTF ; clear interrupt flag RB0/INT
RETFIE ; enable INTCON,GIE

;************** MAIN **************
MAIN RS232init
clrf TblPtr
bcf TblUpDn
loop movfw TblPtr

call Table ; get Hi-Byte
movwf HI
incf TblPtr,1 ; increment table pointer
movfw TblPtr
call Table ; get Lo-Byte
movwf LO
;*** Table Read : top down ***

btfsc TblUpDn ; checks indicator, skip if clear
goto bottom_up ; if set -> bottom up
incf TblPtr,1 ; increment table pointer
;*** Check for end of Table ***

movlw (TABLE_ITEMS * 2) ; index of bottom LO
subwf TblPtr,0 ; TblPtr - w -> w
skpz ; check zero bit, skip if zero
goto xmit ; EXIT
bsf TblUpDn ; end of table, change direction
IF BOTTOM_TWICE == a'T'
incf TblPtr,1
ELSE
decf TblPtr,1
ENDIF
bottom_up
;*** Table Read : bottom up ***
movlw d'3'
subwf TblPtr,1
;*** Check for top of Table ***

movlw d'1'-d'3' ; index of top LO - 3 (->subwf)

subwf TblPtr,0 ; TblPtr - w -> w

skpz ; check zero bit, skip if zero
goto xmit ; EXIT
bcf TblUpDn ; top of table, change direction
clrf TblPtr ; reset table pointer to top
IF TOP_TWICE != a'T'
incf TblPtr,1
incf TblPtr,1
ENDIF
xmit
;*** FRAMING: start sequence ***
SEND 'T'
SEND 'X'
;*** DATA: HI & LO Byte ***

movfw HI
SENDw
movfw LO
SENDw
;*** FRAMING: stop sequence ***

SEND '/'
SEND 'T'
WAITX d'7',d'7'
goto loop
Table
addwf PCL,1
retlw 0x38 ; Hi-Byte
retlw 0x4B ; Lo-Byte
retlw 0x36
retlw 0x78
retlw 0x32
retlw 0xE1
retlw 0x2E
retlw 0x29
retlw 0x29
retlw 0x37
retlw 0x25
retlw 0x06
retlw 0x22

retlw 0x79
retlw 0x22
retlw 0x2B
retlw 0x24
retlw 0x48
retlw 0x28
retlw 0x87
retlw 0x2E
retlw 0x29
retlw 0x34
retlw 0x21
retlw 0x39
retlw 0x3D
retlw 0x3C
retlw 0x68
retlw 0x3C
retlw 0xDE
retlw 0x3A
retlw 0x59
retlw 0x35
retlw 0x28
retlw 0x2E
retlw 0x29
retlw 0x26
retlw 0xA6
retlw 0x20
retlw 0x1A
retlw 0x1B
retlw 0xEE
retlw 0x1B
retlw 0x2B
retlw 0x1E
retlw 0x45
retlw 0x24
retlw 0xF1
retlw 0x2E
retlw 0x29
retlw 0x38
retlw 0x4E
retlw 0x41
retlw 0x67
retlw 0x47
retlw 0x7C

retlw 0x48
retlw 0xFA
retlw 0x45
retlw 0x02
retlw 0x3B
retlw 0xB0
retlw 0x2E
retlw 0x29
retlw 0x1E
retlw 0x8F
retlw 0x0F
retlw 0xB3
retlw 0x04
retlw 0xB9
retlw 0x00
retlw 0x94
retlw 0x05
retlw 0x8C
retlw 0x14
retlw 0xCE
retlw 0x2E
retlw 0x29
retlw 0x4F
retlw 0xF9
retlw 0x77
retlw 0x45
retlw 0xA0
retlw 0x1E
retlw 0xC6
retlw 0x1B
retlw 0xE4
retlw 0xEF
retlw 0xF9
retlw 0x06
retlw 0xFF
retlw 0xFF
END

http://www.trash.net/~luethi/microchip/projects/rs232/scope/scope.hex
:020000040000FA
:020000003A289C
:080008003A288C0081018316E7
:100010000313C030810508008C008101831603138F
:10002000C030810501308104831203130B110B1DB5
:1000300017288C0B162808009600051008308C0035
:100040002D2016180514161C0510960C2D208C0B4F
:10005000212805142D202D2008000C308D00332878
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:1000B0009802FE301802031D612813109801980A57
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:1001100029343434213439343D343C3468343C346B
:10012000DE343A345934353428342E3429342634E4
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:1001400045342434F1342E34293438344E34413497
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:10016000B0342E3429341E348F340F34B334043475
:10017000B9340034943405348C341434CE342E34F1
:1001800029344F34F93477344534A0341E34C6341E
:0E0190001B34E434EF34F9340634FF34FF340A
:02400E00F13F80
:00000001FF
http://www.trash.net/~luethi/microchip/projects/rs232/scope/scope.hex12/02/2008 20:31:05
http://www.trash.net/~luethi/microchip/projects/keyboard/box_dbg/box_dbg.asm
;***************************************************************************
;
; AT Keyboard Box V0.04 - Debug and Calibration version
; =====================================================
; (calibration program for numeric foil keypad, with LCD display)
;
;
; latest LCD modules. Changed controller type from PIC16C74A
; to flash device, i.e. PIC16F77.
; (17.04.2004)
;
; (17.10.2003)
;
; V0.02: Changed clock frequency from 4 MHz to 14.745600 MHz.
; (15.10.2003)
;
;
;
;
;
; SPECIFICATIONS:
; ===============
http://www.trash.net/~luethi/microchip/projects/keyboard/box_dbg/box_dbg.asm (1 of 34)12/02/2008 20:36:29


; Throughput: 3.7 MIPS
; RS232 Baud Rate: 9600 baud with BRGH = 0
; Numeric Keypad Features: Interrupt-based acquisition,
; direct 8 bit A/D conversion
;
;
; ABSTRACT:
; =========
; communication capabilities. Multiple input devices are attached,
; such as an AT keyboard and a small numeric foil-keypad.
; The application features a dot matrix LCD display to visualize
; the data received from the RS232 client on the first line, and
; the characters typed on the locally attached keyboard on the
; second line. There is also a piezo-beeper for acoustic feedback.
; This program converts AT keyboard scan patterns to ASCII characters
; and transmits them afterwards to the target device by using the RS232
; transmission protocol. Both RS232 data reception and transmission
; are possible.
;
;
; DESCRIPTION:
; ============
;

; Using a specific quartz crystal with a frequency of 14.745600 MHz,

; we can address all baud rates from 1200 baud up to 115200 baud
; without any error ratio (0.00% deviation!).
; All aspects of RS232 transmission and reception are handled by PIC
; hardware resources and interrupts.
;
; Any key stroke on the AT keyboard connected to the PIC will send the
; the RS232 link.
;
;
; The numeric foil-keypad is equipped with a specific resistor cascade
; to decode the values through direct 8 bit A/D conversion using the
; PIC-internal A/D converter.
; The advantage is a very low pin usage: Only two pins are necessary
; for proper detection and decoding of all keypad entries.
; One pin provides the analog value, the other pin serves for interrupt
; generation whenever a key of the keypad is touched. The interrupt is
; used to start the A/D conversion.
;
; During the interrupt service routine, only a short busy wait (analog
; settling time) and the A/D conversion - using the internal RC
; oscillator - is carried out. Before leaving the ISR, the 8 bit A/D
; result is stored in a specific register and a dedicated flag is set.
;
; Decoding of the A/D value is done during normal operation (activated
; by the flag) using two look-up tables. The first look-up table (LUT1)
; contains the expected 8 bit values of the keypad to check for valid
; entries. A numeric window of 3 allows for slight analog deviations
; during matching. The matching algorithm just scans the entire LUT1

; until the received keypad A/D result matches a LUT1 entry. The amount
; of loops carried out in LUT1 determines the position of the
; corresponding symbol/character in LUT2. At the end, RS232 transmission
; and LCD display update are carried out.
;
;
;
;
; =====================
; display.
; - Supports foil-keypad input through direct 8 bit A/D conversion
; and look-up table.
; - Piezo-beeper for acoustic feedback of keypad entries.
; and inactive.
; ALT + 6 + 4 = @ (ALT + [1..3] numbers)
;
;
;

; LIMITATIONS:
; ============
;
;
; NOTE:
; =====
;
;
; CREDITS:
; ========
;
;***************************************************************************
ERRORLEVEL -207 ; found label after column 1.

ERRORLEVEL -302 ; register in operand not in bank 0.
PROCESSOR 16F77
;PROCESSOR 16C74A




CONSTANT KEYPAD_DELAY = 0x50 ; busy wait
CONSTANT KEYPAD_SIZE = d'12' ; amount of keypad buttons
CONSTANT KEYPAD_WINDOW = d'6' ; window size for A/D value matching
CONSTANT LCDwidth = d'40' ; define character width of LCD
; display

#define KBDclkpin PORTB,0x00 ; keyboard clock input port
LCDport equ PORTD

LCDtris equ TRISD
#define PADOUTpin PORTA,0x00 ; numeric keypad analog input
#define PADOUTtris TRISA,0x00
#define PADIRQpin PORTB,0x07 ; numeric keypad interrupt pin
#define PADIRQtris TRISB,0x07 ; @ RBIF interrupt source (RB4:7)
#define BEEPport PORTE,0x00 ; output port for piezo beeper

#define BEEPtris TRISE,0x00



TEMP6 set BASE+d'5' ; Don't use them in the ISR!
TEMP7 set BASE+d'6'

#define BCflag FLAGreg2,0x06 ; blank checker for preceding zeros
#define KPflag FLAGreg2,0x07 ; numeric foil-keypad reception flag


ISR_TEMP1 equ BASE+d'17' ; temporary registers for ISR





KPval equ BASE+d'30' ; A/D value for keypad decoding
; debug LEDs
;#define DEBUG0tris TRISC,0x00 ; Port C !
;#define DEBUG0 PORTC,0x00 ; Port C !
ORG 0x490
#include "..\..\m_lcdv08.asm"
ENDIF
;***** MACROS *****
KEYPADinit macro
BANK1

bsf PADOUTtris ; set numeric keypad to (analog) input

bsf PADIRQtris ; set numeric keypad interrupt pin to input
BANK0
;movlw b'01000001' ; select Fosc/8, CH0, A/D ON
movlw b'11000001' ; select RC Osc, CH0, A/D ON
movwf ADCON0
bsf INTCON,RBIE ; enable PORTB4:7 change interrupts
endm
KEYBOARDinit macro
BANK1
BANK0
endm
RS232init macro
bcf TXSTA,BRGH ; BRGH = 0
;movlw d'25' ; 9600 baud @ 16.00 MHz, BRGH = 0
;movlw d'25' ; 9600 baud @ 4.00 MHz, BRGH = 1
movwf SPBRG
BANK0
BANK1
BANK0
endm

movlw send_char
call _RSxmit
endm
SENDw macro
call _RSxmit
endm


movwf KBD
endm

endm
call KBDexpt
endm
_RSxmit BANK1
BANK0
RETURN

BANK0
movwf TEMP1
goto _KBDtx1
BANK1
BANK0


RETURN

movlw 0x08
rrf TEMP3,F
goto _ODDpar
RETURN
RETURN
goto RSdispEND
goto RSdispEND


RSdispEND
BANK1
RETURN

goto _RSend ; exit
goto _RSend ; exit
RETURN
KEYPADout ;*** numeric foil-keypad output routine (LCD display & RS232) ***
movfw KPval ; retrieve A/D keypad value
movwf LO
BEEP d'240', d'4'
LCD_DDAdr 0x40 ; set display cursor at second line

LCDchar 'V'
LCDchar 'a'
LCDchar 'l'
LCDchar ' '
LCDchar '='
LCDchar ' '
LCDval_08 ; display value in LO
LCDchar ' '
LCDchar ' '
movlw KEYPAD_SIZE-0x1 ; get amount of keypad buttons
movwf TEMP6 ; prepare loop counter
_KPlut1 ; loop through keypad look-up table 1
addlw 0x0 - KEYPAD_WINDOW/2 ; w - WINDOW/2
movwf TEMP7 ; store retrieved value in temp register
bnc _KPreloop ; no carry if result negative, branch
movfw TEMP7
BRES KEYPAD_WINDOW, _KPlut2 ; A/D value in window, branch
_KPreloop decfsz TEMP6,f ; decrement loop counter, exit if zero
goto _KPlut1 ; loop again
_KPlut2 ; get now corresponding symbol from keypad look-up table 2
SENDw ; RS232 transmission of char in w
LCDw ; display char in working register
RETURN



goto _clr1
RETURN
goto _clr2
RETURN
ISR ;************************
;************************

goto ISR
;**************************
;**************************


btfsc INTCON,RBIF ; check for RB[7:4] port change interrupt

goto _ISR_KEYPAD ; if set, there was a keypad stroke

;******************************
;******************************
_ISR_RS232
_ISR_RS232_A
;*******************************
;*** NUMERIC KEYPAD DECODING ***
;*******************************
_ISR_KEYPAD
btfss PADIRQpin ; check if active one
goto _KEYPADend ; else, exit ISR
bcf INTCON,RBIE ; disable PORTB4:7 change interrupts
movlw KEYPAD_DELAY ; busy wait (64 us @ 4 MHz)
movwf ISR_TEMP1
_KPloop1 decfsz ISR_TEMP1,f
goto _KPloop1
; A/D input charge time completed, continue
bsf ADCON0,GO ; turn conversion ON
_KPloop2 btfsc ADCON0,GO ; check A/D status flag
goto _KPloop2 ; wait until the end of conversion
movfw ADRES ; fetch result of A/D conversion
movwf KPval ; store A/D keypad value

bsf KPflag ; set keypad reception flag

goto _KEYPADend ; exit ISR
;****************************
;****************************
;******************************************
;******************************************
_ISR_KBDxmit
bcf KBDdatapin
btfsc KBD,0x00
bsf KBDdatapin
goto _INCF ; exit

bcf KBDdatapin
btfsc PARITY
bsf KBDdatapin
goto _INCF ; exit
BANK1
BANK0
goto _INCF ; exit


goto _KBDend
;*****************************************
;*****************************************
_ISR_KBDacq
tstf KBDcnt ; check
goto _INCF ; exit

btfsc KBDdatapin
bsf KBD,0x07
goto _INCF ; exit

goto _INCF ; exit



BANK0

;***********************************
;***********************************
_KEYPADend
bcf INTCON,RBIF ; clear RB[7:4] port change interrupt flag

_RS232end
;*****************************************

;*****************************************

KBDdecode
;**********************************************************
;**********************************************************



;****************************************************
;* further down. *
;****************************************************
;*********************************************************************


;*********************************************************************

;****************************************************
;****************************************************
;********************************
;********************************
btfss SPEflag
goto _KBD_3
btfsc ALTflag
goto _KBD_3
btfsc CTRLflag
goto _KBD_3
movfw KBD
movwf KBD
goto _OUTP
movfw KBD


goto _ClrStall
movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'14'
movfw KBD
sublw 0x61 ; 0x61 - w
movlw d'25'
goto KBD_dec
movfw KBD
sublw 0x77 ; 0x77 - w
movfw KBD
;*******************************************************
;*******************************************************

movfw KBD




movfw KBD
sublw 0x60 ; 0x60 - w
movfw KBD
movfw KBD
movwf KBD
;***************************************************
;***************************************************
_OUTP ;*** RS232 ***

movfw KBD


_TAB2 movlw a' '
movfw KBD
;************************************************
;************************************************

SEND LF
;**********************************************************
;**********************************************************
_ClrStall
BANK1

RETURN
;****************************************************
;****************************************************


goto _alt_2
clrf CTRLreg3
;***********************************************
;***********************************************
movfw KBD
sublw 0x40 ; 0x40 - w
movfw KBD
sublw 0x46 ; 0x46 - w
movfw KBD
sublw 0x60 ; 0x60 - w
movfw KBD
sublw 0x66 ; 0x66 - w

movfw KBD
sublw 0x29 ; 0x29 - w
movfw KBD
sublw 0x39 ; 0x39 - w
tstf CTRLcnt
movfw KBD
movfw KBD
sublw 0x02 ; 0x02 - w
movfw KBD

movlw 0x30
goto _altd_3 ; jump


goto _altd_3 ; jump
sublw 0x02 ; 0x02 - w
goto _OUTP ; output
;*******************************************************
;*******************************************************
;ORG 0x??

addwf PCL,F
retlw d'10' ; 10
retlw d'20' ; 20

retlw d'30' ; 30
retlw d'40' ; 40
retlw d'50' ; 50
retlw d'60' ; 60
retlw d'70' ; 70
retlw d'80' ; 80
retlw d'90' ; 90
retlw d'100' ; 100
IF (HIGH (BCDtable) != HIGH (BCDtableEND))

ENDIF

; in CTRLreg1 - 2
movlw 0x30
movlw d'39'
movlw d'39'


goto _ctrh_4 ; jump
goto _OUTP ; output
;*****************************************************************
;*****************************************************************
btfss SHIflag
goto _OUTP ; branch
movfw KBD
sublw d'13' ; d'13' - w

movfw KBDcopy
sublw 0x61 ; 0x61 - w
movfw KBDcopy
movlw d'61'
goto _SHICH3
sublw 0x24 ; 0x24 - w
movlw d'35'
goto _SHICH3
;*** else ***
_SHICH2 movlw d'4'


movfw KBDcopy
goto _OUTP
;*******************************************************
;*******************************************************
;**********************************************************************
;**********************************************************************

;************** MAIN **************
MAIN ORG 0x00
BANK1
goto _MAIN
ORG 0x170



movlw b'00000010'
movwf ADCON1
; bcf DEBUG0tris ; for DEBUGGING !!!

; bcf DEBUG1tris
; bcf DEBUG2tris
; bcf DEBUG3tris
; bcf DEBUG4tris
; bcf DEBUG5tris
; bcf DEBUG6tris
; bcf DEBUG7tris
BANK0
; bcf DEBUG0
; bcf DEBUG1
; bcf DEBUG2
; bcf DEBUG3
; bcf DEBUG4
; bcf DEBUG5
; bcf DEBUG6
; bcf DEBUG7
;*** PIEZO BEEPER INITIALIZATION ***

BEEPinit ; beeper initialization
ENDIF


;*** NUMERIC KEYPAD INITIALIZATION ***

KEYPADinit ; keypad initialization

movlw b'11111000'


movlw b'00000010'
clrf FLAGreg2

movlw LCDwidth
clrf LCDpos2
;*** START-UP MESSAGE ***

#define tab_size d'39'
movlw tab_size ; store amount of table items in counter
movwf TEMP6
; transmit message
sublw tab_size ; table offset: w = tab_size3 - TEMP6
movfw TEMP7
LCDw ; LCD output
goto _ILOOP
SEND LF ; line feed
SEND LF
;*** AT KEYBOARD INITIALIZATION III ***




BEEP d'255', d'4' ; "device is ready"
WAIT 0x80
BEEP d'255', d'4'
WAITX 0x10,0x7
BEEP d'200', d'4'
WAIT 0x80
BEEP d'180', d'3'
ENDIF
;******************************
btfsc KPflag ; check foil-keypad reception flag
;******************************
WelcomeTable
DT "PIC16F77 AT Keyboard Box V0.04 stand-b" ; create table
WTableEND DT "y"
ENDIF
KeypadTable1

retlw d'76' ;*
retlw d'90' ;7
retlw d'105' ;4
retlw d'120' ;1
retlw d'135' ;0
retlw d'151' ;8
retlw d'167' ;5
retlw d'184' ;2
retlw d'201' ;#
retlw d'218' ;9
retlw d'236' ;6
KeypadTable1END retlw d'254' ; 3
ENDIF
KeypadTable2
DT "*7410852#96" ; create table
KeypadTable2END DT "3"
ENDIF
END
; A/D conversion values for numeric foil-keypad using different clocks:

; =====================================================================
; unbounce keypad IRQ and keypad analog signals using 5 nF capacitors
; symbol 14.7456 MHz 4 MHz
;* 76 76
;7 90 91
;4 105 106
;1 120 121
;0 135 137
;8 151 152
;5 167 168
;2 184 185
;# 201 201
;9 218 218
;6 236 236
;3 254 254

http://www.trash.net/~luethi/microchip/projects/keyboard/box_dbg/box_dbg_eng.hex
:020000040000FA
:1000000083160313810170298B138B1B0428AD0009
:10001000030EAE0083010A08AF008A0183130408AF
:10002000B0008B1834280B1826288C1A18288C2816
:100030001A08AA008C1E1F281A08AB0029142714BE
:10004000831603138C12831203138C28861F8828AF
:100050008B115030B100B10B2B281F151F192E2802
:100060001E08BE00A8178828281C5A283208073CFA
:10007000031C4028331C051233180516B30C8A28BC
:100080003208083C031C4928A81C0512A8180516AC
:100090008A283208093C031C5328831603130516CB
:1000A000831203138A2832080B3C031C8A28B201EE
:1000B00028108B28B208031D6028051A85288A2875
:1000C0003208083C031C6C28051EB313051AB3172D
:1000D00003198A28B30C8A283208093C031C7128AA
:1000E0008A28051E852828197E28A717831603133A
:1000F00006108312031306100B12862823083302FE
:10010000031D85282811B2018B28B301B2018B2869
:100110000B108C28B20A8B10300884002F088A003C
:100120002E0E8300AD0E2D0E09003308B400F03CF6
:10013000031D9D28A714A711752BA71CF92AA7102A
:100140003308123C0319A7283308593C0319271117
:100150003308583C031DCC28271EBD282712ED303C
:10016000B30034251B25FA30412535113508B3007D
:1001700034251B25FA304125752B2716ED30B300A9
:1001800034251B25FA30412535153508B3003425B3
:100190001B25FA304125752B3308113C031DD2284D
:1001A000A712B62B3308143C031D752B2713ED2B18
:1002E00002309F00831203130910831603130910B1
:1002F0008312031383160313181117309900831206
:1003000003139817831603138C169816831203137E
:100310000B17181683160313061405160113831200
:1003200003130B1683160313051486178312031386
:10033000C1309F008B15F8308B058C018D018B1718
:100340000230B500B201A701A801831603130130E2
:10035000880583120313881208138813E130880577
:10036000043097240330A724C12401309724083097
:10037000A724C124013097240230A724C1240130CE
:1003800097242830AE240C30AE242830AE2401301F
:10039000AE242830B600B7012730A50002308A000D
:1003A0002508273C1B22A60013252608B024A50BF0
:1003B000CE290D3013250A3013250A301325FF30BE
http://www.trash.net/~luethi/microchip/projects/keyboard/box_dbg/box_dbg_eng.hex (1 of 4)12/02/2008 20:36:48

:1003C000B30034251B25ED30B30034251B25FA304E
:1003D00041253508B30034251B25FA304125ED3081
:1003E000B30034251B25FA30412535143508B300F8
:1003F00034251B25FA304125FF30A0000430FC24B1
:1004000080309724FF30A0000430FC24103090246A
:1004100007309E24C830A0000430FC24803097248C
:10042000B430A0000330FC24A71B952027184625D4
:10043000A81B7F25142A82075034493443343134B1
:10044000363446343734373420344134543420344D
:100450004B346534793462346F34613472346434CB
:10046000203442346F3478342034563430342E34CF
:100470003034343420347334743461346E3464343E
:100480002D346234793482074C345A3469347834E8
:1004900087349734A734B834C934DA34EC34FE34B2
:1004A00082072A34373434343134303438343534F4
:0A04B0003234233439343634333447
:1005000082070034393400343534333431343234F2
:1005100032340034303438343634343409347E34B0
:10052000003400347F2B7D2B0034812B7134313427
:100530000034003400347A34733461347734323424
:100540000034003463347834643465343434333400
:1005500000340034203476346634743472343534E4
:10056000003400346E34623468346734793436349D
:100570000034003400346D346A3475343734383420
:10058000003400342C346B3469346F3430343934F3
:10059000003400342E343F346C343B3470342D340A
:1005A000003400340034273400345B342B340034FE
:1005B000003400347D2B6E2B5D3400347C340034E9
:1005C000003400343C3430342E3432343534363454
:1005D00038340034003431342B3433342D342A345D
:1005E000393400340834003400343134373434348E
:1005F0003734A71D0B2BA71A0B2B271B0B2B3308EC
:100600004A3C031D062B2F30B3003F2B33085A3CC6
:1006100003180B2B752B3308613C0318212B0E306C
:10062000B3023308613C031C182B1930B307212B8C
:100630003308773C0318212B3308D23C0319A71544
:10064000752B02308A0033088022B300B3080319E7
:10065000752BA71A992B271B872B3308603C03188F
:10066000062C33087A3C031C062C3308271A3B2B34
:10067000271D3F2B3D2B27193F2BE03EB3003308AE
:1006800013253308083C031D532B37080319752B1A
:10069000B7033708403E8038A500AE242030B02490
:1006A0002508AE24752B3308093C031D602B370841

:1006B000263C031C5E2B2030B024B70A2030B30048
:1006C0003708273C0318662BA816B5253708403E87
:1006D0008038AE243308B024B70A752BA816B52588
:1006E0000D3013250A301325003483160313061426
:1006F00083120313A7130B16080027150034A7163F
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:10072000A12B3308603C0318992B3308663C03184F
:10073000A12B3308293C0318752B3308393C031CC3
:10074000752BB808031DA82BB80A3308B900752B00
:10075000380BAE2BB80A3308BA00752B3808023CA8
:10076000031D752BB80A3308BB00752BB808031995
:10077000752B3030B902BA02BB02B803031DC32B7C
:100780003908B300DD2BB803031DCD2B03308A00DD
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:1007A000752B03308A0039080A3EDF23B9003A0866
:1007B000DF23B9073B083907B300B8013F2B820795
:1007C00000340A3414341E34283432343C34463471
:1007D00050345A3400346434C834B8080319752BC3
:1007E0003030B902BA02B91EF72B2730B902BA1E4F
:1007F000FB2B2730BA02B803031D012C3908B300C4
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:10083000243C03181E2C2330B402202C0430B407AF
:1008400004308A0034082624B3003F2B8207263464
:100850002A34243423343C34003400340034293422
:100860002834003425343E342F3400343A340034F4
:100870005F3460345E340034223400347B343D34E1
:10088000003421340034003400347D3400345C34CE
:080890000034403400343E3412
:10092000A000810183160313C03081050800A000D8
:10093000810183160313C0308105013081048312C5
:1009400003130B110B1DA22CA00BA12C0800A2005D
:10095000E1308805220D1E39880408002816B12CC4
:100960002812A300C524281E88172308230EA724B5
:10097000C1242308A724C124E13088058813081363
:10098000080088160000881208008813A81583162E
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:1009A000A81188120000C124A819CE2C08138316A0
:1009B0000313E13088058312031308003C08BD00CF
:1009C00028136430A100EC240A30A100EC2401308B
:1009D000A1002817EC240800A00121083D02031CF7

:1009E000F62CA00A2108BD022817EE2C3030200773
:1009F000281F2030B0240800A100810183160313B2
:100A000007308100831203130B1109140E250910FE
:100A10000E250B1D052DA10B042D08002008A2009A
:100A2000A20B102D080083160313981C152D83129A
:100A30000313990008000B12831603130610051206
:100A400083120313061005122030A000A00B262DE0
:100A5000B2018316031306148312031328148B1098
:100A60000B162818312D0800A2000830A300A4019D
:100A70002218A40AA20CA30B382DA810241CA81419
:100A80000800A30028152819432D08002A08AC00E7
:100A90005A25291C542D2B08AC005A252910981CC6
:100AA000542D181218111816831603138C1683125E
:100AB000031308002C08083C031D682D3608031991
:100AC0007D2DB60336088038AE242030B0247D2D2D
:100AD0003608273C03186E2DA812B5253608803835
:100AE000AE242C080D3C031C7A2D031D7D2DA8126D
:100AF000B5257D2D2C08B024B60A271008003E0825
:100B0000BC00F030A0000430FC24C030AE245630CD
:100B1000B0246130B0246C30B0242030B0243D309B
:100B2000B0242030B024DE242030B0242030B02483
:100B30000B30A50002308A0025084322FD3EA600A6
:100B40003E02031CA82D26083E02063C0318AA2DCF
:100B5000A50B9A2D02308A00250850221325B024B7
:100B60002030B024A8138B1508002830A81AC32DF4
:100B7000B6008030AE242030B024B60BBB2D8030C0
:100B8000AE24B6010800B700C030AE242030B02437
:0C0B9000B70BC62DC030AE24B701080022
:02400E00F23F7F
:00000001FF

http://www.trash.net/~luethi/microchip/projects/keyboard/box_dbg/box_dbg_sg.hex
:020000040000FA
:1000000083160313810170298B138B1B0428AD0009
:10001000030EAE0083010A08AF008A0183130408AF
:10002000B0008B1834280B1826288C1A18288C2816
:100030001A08AA008C1E1F281A08AB0029142714BE
:10004000831603138C12831203138C28861F8828AF
:100050008B115030B100B10B2B281F151F192E2802
:100060001E08BE00A8178828281C5A283208073CFA
:10007000031C4028331C051233180516B30C8A28BC
:100080003208083C031C4928A81C0512A8180516AC
:100090008A283208093C031C5328831603130516CB
:1000A000831203138A2832080B3C031C8A28B201EE
:1000B00028108B28B208031D6028051A85288A2875
:1000C0003208083C031C6C28051EB313051AB3172D
:1000D00003198A28B30C8A283208093C031C7128AA
:1000E0008A28051E852828197E28A717831603133A
:1000F00006108312031306100B12862823083302FE
:10010000031D85282811B2018B28B301B2018B2869
:100110000B108C28B20A8B10300884002F088A003C
:100120002E0E8300AD0E2D0E09003308B400F03CF6
:10013000031D9D28A714A711752BA71CF92AA7102A
:100140003308123C0319A7283308593C0319271117
:100150003308583C031DCC28271EBD282712ED303C
:10016000B30034251B25FA30412535113508B3007D
:1001700034251B25FA304125752B2716ED30B300A9
:1001800034251B25FA30412535153508B3003425B3
:100190001B25FA304125752B3308113C031DD2284D
:1001A000A712B62B3308143C031D752B2713ED2B18
:1002E00002309F00831203130910831603130910B1
:1002F0008312031383160313181117309900831206
:1003000003139817831603138C169816831203137E
:100310000B17181683160313061405160113831200
:1003200003130B1683160313051486178312031386
:10033000C1309F008B15F8308B058C018D018B1718
:100340000230B500B201A701A801831603130130E2
:10035000880583120313881208138813E130880577
:10036000043097240330A724C12401309724083097
:10037000A724C124013097240230A724C1240130CE
:1003800097242830AE240C30AE242830AE2401301F
:10039000AE242830B600B7012730A50002308A000D
:1003A0002508273C1B22A60013252608B024A50BF0
:1003B000CE290D3013250A3013250A301325FF30BE
http://www.trash.net/~luethi/microchip/projects/keyboard/box_dbg/box_dbg_sg.hex (1 of 4)12/02/2008 20:36:52

:1003C000B30034251B25ED30B30034251B25FA304E
:1003D00041253508B30034251B25FA304125ED3081
:1003E000B30034251B25FA30412535143508B300F8
:1003F00034251B25FA304125FF30A0000430FC24B1
:1004000080309724FF30A0000430FC24103090246A
:1004100007309E24C830A0000430FC24803097248C
:10042000B430A0000330FC24A71B952027184625D4
:10043000A81B7F25142A82075034493443343134B1
:10044000363446343734373420344134543420344D
:100450004B346534793462346F34613472346434CB
:10046000203442346F3478342034563430342E34CF
:100470003034343420347334743461346E3464343E
:100480002D346234793482074C345A3469347834E8
:1004900087349734A734B834C934DA34EC34FE34B2
:1004A00082072A34373434343134303438343534F4
:0A04B0003234233439343634333447
:1005000082070034393400343534333431343234F2
:100510003234003430343834363434340934A73487
:10052000003400347F2B7D2B0034812B7134313427
:100530000034003400347934733461347734323425
:100540000034003463347834643465343434333400
:1005500000340034203476346634743472343534E4
:10056000003400346E346234683467347A3436349C
:100570000034003400346D346A3475343734383420
:10058000003400342C346B3469346F3430343934F3
:10059000003400342E342D346C34F6347034273467
:1005A000003400340034E4340034FC345E3400346D
:1005B000003400347D2B6E2B21340034243400347D
:1005C000003400343C3430342E3432343534363454
:1005D00038340034003431342B3433342D342A345D
:1005E000393400340834003400343134373434348E
:1005F0003734A71D0B2BA71A0B2B271B0B2B3308EC
:100600004A3C031D062B2F30B3003F2B33085A3CC6
:1006100003180B2B752B3308613C0318212B0E306C
:10062000B3023308613C031C182B1930B307212B8C
:100630003308773C0318212B3308D23C0319A71544
:10064000752B02308A0033088022B300B3080319E7
:10065000752BA71A992B271B872B3308603C03188F
:10066000062C33087A3C031C062C3308271A3B2B34
:10067000271D3F2B3D2B27193F2BE03EB3003308AE
:1006800013253308083C031D532B37080319752B1A
:10069000B7033708403E8038A500AE242030B02490
:1006A0002508AE24752B3308093C031D602B370841

:1006B000263C031C5E2B2030B024B70A2030B30048
:1006C0003708273C0318662BA816B5253708403E87
:1006D0008038AE243308B024B70A752BA816B52588
:1006E0000D3013250A301325003483160313061426
:1006F00083120313A7130B16080027150034A7163F
:10070000822B2717B801B901BA01BB0100343308A5
:10071000403C0318992B3308463C031C912BB3161D
:10072000A12B3308603C0318992B3308663C03184F
:10073000A12B3308293C0318752B3308393C031CC3
:10074000752BB808031DA82BB80A3308B900752B00
:10075000380BAE2BB80A3308BA00752B3808023CA8
:10076000031D752BB80A3308BB00752BB808031995
:10077000752B3030B902BA02BB02B803031DC32B7C
:100780003908B300DD2BB803031DCD2B03308A00DD
:100790003908DF233A07B300DD2B3908023C031C7C
:1007A000752B03308A0039080A3EDF23B9003A0866
:1007B000DF23B9073B083907B300B8013F2B820795
:1007C00000340A3414341E34283432343C34463471
:1007D00050345A3400346434C834B8080319752BC3
:1007E0003030B902BA02B91EF72B2730B902BA1E4F
:1007F000FB2B2730BA02B803031D012C3908B300C4
:10080000042C390E3A04B300B8013F2B271D3F2BAF
:1008100033080D3C03183F2B3408613C031C3F2B6D
:1008200034083C3C0318172C3D30B402202C34080B
:10083000243C03181E2C2330B402202C0430B407AF
:1008400004308A0034082624B3003F2B82072F345B
:10085000283423342A343B340034003400343D340B
:100860002934003425343A345F3400345C340034A5
:100870003F344034263400347B3400345B347E34DF
:1008800000342B340034003400345D3400347D34C3
:080890000034223400343E3430
:10092000A000810183160313C03081050800A000D8
:10093000810183160313C0308105013081048312C5
:1009400003130B110B1DA22CA00BA12C0800A2005D
:10095000E1308805220D1E39880408002816B12CC4
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:1009A000A81188120000C124A819CE2C08138316A0
:1009B0000313E13088058312031308003C08BD00CF
:1009C00028136430A100EC240A30A100EC2401308B
:1009D000A1002817EC240800A00121083D02031CF7

:1009E000F62CA00A2108BD022817EE2C3030200773
:1009F000281F2030B0240800A100810183160313B2
:100A000007308100831203130B1109140E250910FE
:100A10000E250B1D052DA10B042D08002008A2009A
:100A2000A20B102D080083160313981C152D83129A
:100A30000313990008000B12831603130610051206
:100A400083120313061005122030A000A00B262DE0
:100A5000B2018316031306148312031328148B1098
:100A60000B162818312D0800A2000830A300A4019D
:100A70002218A40AA20CA30B382DA810241CA81419
:100A80000800A30028152819432D08002A08AC00E7
:100A90005A25291C542D2B08AC005A252910981CC6
:100AA000542D181218111816831603138C1683125E
:100AB000031308002C08083C031D682D3608031991
:100AC0007D2DB60336088038AE242030B0247D2D2D
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:100B1000B0246130B0246C30B0242030B0243D309B
:100B2000B0242030B024DE242030B0242030B02483
:100B30000B30A50002308A0025084322FD3EA600A6
:100B40003E02031CA82D26083E02063C0318AA2DCF
:100B5000A50B9A2D02308A00250850221325B024B7
:100B60002030B024A8138B1508002830A81AC32DF4
:100B7000B6008030AE242030B024B60BBB2D8030C0
:100B8000AE24B6010800B700C030AE242030B02437
:0C0B9000B70BC62DC030AE24B701080022
:02400E00F23F7F
:00000001FF


Home | NTP Home Page | NTP Project Page | NTP Documentation | NTP Public Servers
(Original in German available from the address below. Translation errors courtesy of
Peter Lamb, Swiss Fed. Inst. of Technology)
Physikalisch-Technische Bundesanstalt (PTB) Braunschweig, Febuar 1984

Lab 1.21
Bundesalle 100
D-3300 Braunschweig
Legal basis and responsibility for the transmissions from DCF77
The 1978 law on time standards defines legal time in Germany on the
basis of Coordinated World Time (UTC) and gives the PTB responsibility
for the keeping and broadcasting of legal time. As well as this, the
time standards law empowers the Federal government to issue regulations
for the introduction of Summer Time.
Legal time in the FRG is either Middle European Time (MEZ - German
abbreviation) or, in case of its introduction Middle European Summer
Time (MESZ). The following relationships hold between UTC and MEZ and
MESZ.
MEZ(D) = UTC(PTB) + 1h
MESZ(D) = UTC(PTB) + 2h
Legal time is generated in the PTB Atomic Clock Building in Braunschweig

and it is broadcast mainly through the LF transmitter DCF77 which the
PTB rents from the German Post Office (DBP). The PTB has sole
responsibility for the control of DCF77, while the DBP has
responsibility for the transmitter and antennas. Queries should be
directed to the above address or by telephone to 0531/592 1212 or
0531/592 1210, or by telex to 952822 ptb d.
DCF77 Specifications
Location: Mainflingen transmitter complex, (50:01N, 09:00E), about

25km south-east of Frankfurt a. Main.
Carrier Frequency: Standard frequency 77.5kHZ, derived from the PTB

atomic clocks. Relative deviation of the carrier from
http://www.eecis.udel.edu/~mills/ntp/dcf77.html (1 of 8)12/02/2008 20:39:21

specifications:

The carrier phase is controlled so that deviations

relative to UTC(PTB) are never greater than +-0.3us.
Larger phase and frequency variation observed at the
receiver are due to summation of ground and space waves.
Power output: Transmitter power 50kw, estimated emitted power approx.

25kW.
Antenna: 150m high (backup antenna 200m high) vertical

omnidirectional antenna with top capacitance.
Transmission times: 24-hour continuous service. Short interruptions (of

a few minutes) are possible if, because of technical
problems or servicing, the service must be switched to a
backup transmitter or antenna. Thunderstorms can cause
longer interruptions to the service.
Time signal: The carrier is amplitude-modulated with second marks. At
the beginning of each second (with the exception of the
59th second of each minute), the carrier amplitude is
reduced to 25% for the duration of either 0.1 or 0.2
seconds. The start of the carrier reduction marks the
precise beginning of the second. The minute is marked by
the absence of the previous second mark.
The second marks are phase-synchronous with the carrier.

There is a relatively large uncertainty possible in the
time of the second mark which depends on the receiver
position. The causes are the relatively low bandwidth of
the antenna, space wave and other interference sources.
Despite this, it is possible to achieve accuracy better
than 1ms at distances of several hundred kilometers.
Time code: The transmission of the numerical values for minute,

hour, day, weekday, month and year are BCD-encoded
through the pulse duration modulation of the second
marks. A second mark with duration 0.1s encodes a binary
0 and a duration of 0.2s encodes 1. The order of encoding
is shown in the following diagram [replaced by a table in
this translation]. The three test bits P1, P2 and P3
extend the 3 major sections of the time code (7 bits for

minutes, 6 bits for the hour and 22 bits for the date,
including the week day number) to maintain an even count
of 1's.
The second marks No. 17 and 18 indicate the time system

for the transmitted time codes. In the case of
transmission of MEZ, mark 18 has a duration of 0.2s and
mark 17 a duration of 0.1s. If MESZ is being transmitted,
this is reversed. Furthermore, an approaching transition
from MEZ to MESZ or back is announced by extending mark
16 from 0.1 to 0.2s for one hour prior to the changeover.
Encoding Scheme [diagram in original]
Mark number(s) Encodes (01.s=0, 0.2s=1)
0 Minute, always 0 (0.1s)
1-14 Reserved
15 0=Normal antenna, 1=backup antenna
16 1=Approaching change from MEZ to MESZ or back
17,18 Time zone 0,1=MEZ; 1,0=MESZ
19 The leap second is encoded in this bit one hour prior to

occurrence.
20 Start bit for encoded time, always 1
21-27 1, 2, 4, 8, 10, 20, 40 Minutes (mark 21=1 minute)
29-34 1,2,4,8,10,20 Hours (mark 29=1 hour)
36-41 Day in month (1, 2, 4, 8, 10, 20)
42-44 Day in week (1,2,4)

45-49 Month number (1, 2, 4, 8, 10)
50-57 Year (1, 2, 4, 8, 10, 20, 40, 80)

58 P3 maintains even parity for marks 36-58 There is no mark

transmitted for the 59th second.
Literature
P. Hetzel, "Die Zeitsignal- und Normalfrequenzaussendungen der PTB ueber

den Sender DCF77: Stand 1982" [The PTB time signal and standard
frequency transmissions from DCF77: Status 1982] in "Funkuhren" [Radio
clocks], W. Hilberg, Oldenburg Publishers, Munich & Vienna 1983, pp 42-
57.
G Becker & P. Hetzel, "Vortraege ueber DCF77" [Lectures: DCF77], PTB

Reports, PTB-Me-23 (1979), pp 185-253. Braunschweig 1984
Additional information: DCF77
Since July 1983, the DCF77 carrier has been phase modulated in a test
configuration. The phase modulation is a pseudorandom binary sequence
sent twice each second. The clock frequency of the binary sequence is
645.833...Hz and the phase shift \Delta\tau about 3% of the period
(\^{=} 10\deg). Equal numbers of shifts of +\Delta\tau and -\Delta\tau
are always sent, so that the mean frequency remains unchanged, and the
use of DCF77 as a frequency standard is unaffected. The timecode is
encoded in the sequence by inverting the sequence or not. Not inverted
sequence corresponds to a 0 bit. The sequence is alleged to be generated
by a 9 bit shift register which is coupled back on positions 5 and 9.
The polynomial might be: x^9 + x^4 + 1.
Because the pseudo-random bitstring has a strictly deterministic nature,

the correlation analysis at the receiver end leads to a correlation
function with triangular form, and thereby to timing information. Early
test results show that the time information received with the help of
pseudo-random phase modulation is more resistant to interference and
more accurate (standard deviation \approx 10\mu s during the day and
\approx 25\mu s at night) than the conventional method using amplitude
modulated second marks. Since this new modulation method is compatible
with previous usage of DCF77, and that the users have made no
difficulties known to us, the tests have been extended. The transmission
of the pseudo-random phase distortion still has experimental status, and
should not be seen as a permanent commitment. Further information will
be made available in the future.
Announcement bit for a leap second

The DCF77 control unit is currently being modified so that in future an

announcement bit for a leap second can be sent. It is expected that for
the first time on 1st July 1985 the second mark Nr. 19 will be extended
to a length of 0.2s for one hour prior to the introduction of a leap
second. Intelligent receivers will then be able to recognise the
discontinuity and maintain correct indicated time in spite of a 61s
minute.
Availability
The clock was made by a local radio amateur.
Empfangsanlage DCF77 (SFr 690. complete, also available in kit form)
Walter Schmidt
Eichwisrain 14
8634 Hombrechtikon
Switzerland
LF reciever and decoder for the German time standard DCF77. As yet
untested. Has a 1s impulse output driven direct from the reciever, which
could be used in a similar manner to the pulse output on the Spectracom.
Internal crystal-controlled clock reset each minute by the DCF77 minute
mark. Indication available to program of whether currently synchronised,
and a count of how long since the last synchronisation is available if
running unsynchronised. Returns time with resolution 0.1s, but probably
synchronised to the time of command reception, and not to the 0.1s
counter. I will try to get the firmware changed if this is the case.
Other sources
Die folgende Liste ist einer Information der PTB entnommen. Fuer evtl.
Tippfehler wird nicht gehaftet (;-) (Umlaute sind in ASCII Umschrift
(ae,oe,ue,ss) dargestellt.)
Am 1 Juli 1993 wurde diese Liste auf die neuen Postleitzahlen

umgestellt. Die alten Postleitzahlen stehen in runden Klammern - einige
konnten nicht korrigiert werden (Korrekturen werden gerne angenommen).
Bei Erweiterungen/Aenderungen bitte email an time@informatik.uni-
erlangen.de
Note: This document was corrected for the new zip codes on July 1st
1993. The old zip codes are in parenthesis. Some zip codes could not be
converted.
Last update: 91/06/05 - 13:34:36

Januar 1989 (PTB Original)
Hersteller/Vetriebsfirmen von DCF77-Empfangsgeraeten

----------------------------------------------------
1. Funkuhren fuer Zeitdienst-Systeme (z. B. Funkuhren fuer Uhren-

anlagen und Turmuhr-Zentralen; modulare Funkuhren mit RS 232-
Schnittstelle fuer Rechner; funkgesteuerte Schaltuhren, Zeit-
kodegeneratoren und Aussenuhren)
kodegeneratoren und Aussenuhren)
Auerswald GmbH & Co. KG Vor den Grashoefen 1

Tel.: 05306/92000 38162 (3302) Cremlingen,
OT Schandelah
Electronic Design Buero Zeilstrasse 56

Herwig Braun GmbH 72793 (7417) Pfullingen
Tel.: 07121/71560
Ferrari electronic GmbH Beusselstrasse 27

Tel.: 030/3965021 10553 (1000) Berlin (21)
Gesellschaft fuer Datensysteme (GDS) Hindenburgstrasse 13

Tel.: 05306/7010 38162 (3302) Cremlingen
OT Schandelah
Heliowatt Werke Wilmersdorfer Str. 39

Elektrizitaets-Gesellschaft mbH 10627 (1000) Berlin (12)
Tel.: 030/31908-01
Hopf Elektronik Postfach 18 47

Tel.: 02351/45038 58468 (5880) Luedenscheid
Philip Hoerz Moltkestrasse 6

Turmuhren 89077 (7900) Ulm
Tel.: 0731/37168
Marcel Kreutler Postfach 37 44
Zeit- und Informationstechnik 67050 (7500) Karlsruhe (1)
Tel.: 0721/85281
Landis & Gyr GmbH Friesstrasse 20 - 24

Tel.: 069/40020 60388 (6000) Frankfurt (60)

Lennartz Elektronic GmbH Bismarkstrasse 136 - not translated

Tel.: 07071/3088 (7400) Tuebingen
Werner Meinberg Elektronik Auf der Landwehr 22

Tel.: 05281/2018 31812 (3280) Bad Pyrmont
Aus dem Moore Postfach 21 41

Turmuhr-Elektronik 32361 (4994) Preussisch
Tel.: 05742/5225 Oldendorf 2
Moser-Baer AG CH-3454 Sumiswald

Tel.: 0041/34/721144 Schweiz
Noelpp-Informationssysteme GmbH Friedensstrasse 41

Tel.: 06101/87592 61118 (6368) Bad Vilbel (2)
Heinrich Perrot Postfach 13 51

Turmuhrenfabrik 75353 (7260) Calw-Heumaden
Tel.: 07051/12055
Precitel SA Avenue du Mail 59

Tel.: 0041/38/247555 CH-2000 Neuchatel
Schweiz
Georg Rauscher Wuerzburgerstrasse 4

Turmuhrenfabrik 93059 (8400) Regensburg
Schwille-Elektronik Benzstrasse 1
Tel.: 089/9031041 85551 (8011) Kirchheim
Siemens AG Postfach 53 29
Tel.: 0511/1290 30053 (3000) Hannover (1)
Telefunken electronic Ringlerstrasse 17

Tel.: 0841/8811 85057 (8070) Ingolstadt
Telenorma Uhren GmbH Postfach 44 32 - not translated

Tel.: 069/266-1 (6000) Frankfurt (1)
ZERA Elektronische Pruefgraete Postfach 11 60

Cremer & Co. 53621 (5330) Koenigswinter
Tel.: 02223/22075
2. Funkuhren fuer den haeuslichen Gebrauch (z. B. Tisch- und Wand-

uhren der Firmen Dugena, Hermle, Junghans, Kundo,...)

Vertrieb durch den Uhrenfachhandel und die Fachabteilungen
von Kauf- und Versandhaeusern
3. Funkuhr-Bausaetze und -Fertiggeraete

Vertrieb durch den Elektronik-Fach- und Versandhandel
4. DCF77-Normalfrequenzempfaenger und Frequenzregler fuer Normal-

frequenzoszillatoren
Goerl HF-Messtechnik Buchenstrasse 2

Tel.: 0821/482613 86356 (8902) Neusaess 4
Rohde & Schwarz Muehldorfstrasse 15
Tel.: 089/4129-0 81671 (8000) Muenchen (80)
0911/86747 (Nuernberg)
Unverdross Technik Tutzinger Hof Platz 6

Tel.: 08151/21198 82319 (8130) Starnberg
Die mit `*' gekennzeichneten Firmen unter 1. haben neben Funkuhren auch
DCF77-Normalfrequenzempfaenger in ihrem Vertriebsprogramm.
Diese Liste wurde erstellt aufgrund von Informationsmaterial, das der

PTB ueber DCF77-Empfangsgeraete vorliegt. Falls neue Produkte auf den
Markt kommen, eine Firma uebersehen wurde oder eine hier aufgefuehrte
Firma die Produktion von DCF77-Empfangsgeraeten einge-stellt hat, bittet
die PTB um Zusendung von entsprechenden Infor-mationen, damit diese
Zusammenstellung aktualisiert werden kann.

Generate Ring Tones on your PIC16F87x.
Wednesday, February 13th, 2008
Generate Ring Tones on your PIC16F87x Microcontroller
Using only a speaker and decoupling capacitor, it is possible to generate tunes or melodies from your Microchip PIC16F87x processor. A timer can be used
to generate each of the eleven musical notes and another timer can be used to time the note duration. You can even choose to support several octaves if
you want a challenge.
The code can form the foundation for a range of applications such as christmas toys to customised doorbells or chimes. Add a DIP switch to support
multiple melodies.
However the hard parts comes from making and coding your own melodies to play. Wouldnt it make sense to use some of the tens of thousands of Mobile
Phone Ring Tones floating around the place. This is what we have done here.
One of the more popular standards is the RTTTL (Ringing Tones Text Transfer Language) specification which is used by Nokia mobile phones. These
tunes can be save and transported using the .RTX ringtone specification. This specification is no more than a ASCII text file which includes the ringtone
name, a control section specifying default attributes and a comma delimited string of notes that can be optionally encoded with the octave and duration.
Understanding RTTTL (Ringing Tones Text Transfer Language)
A simple RTTTL ring tone is the itchy and scratchy theme song which is displayed below :
itchy:d=8,o=6,b=160:c,a5,4p,c,a,4p,c,a5,c,a5,c,a,4p,p,c,d,e,p,e,f,g,4p,d,c,4d,f,4a#,4a,2c7
This ring tone can be split into three sections :
Title : The title of the ring tone starts the string followed by a semicolon. There are varying specifications on its maximum length but it is suggested it
shouldnt be any more than 10 characters long.
Control : The control section sets up default parameters which are carried throughout the melody. The idea is to reduce the size of the string, by
omitting common parameters. Instead of each comma delimited note containing the note, octave and duration information, the octave and duration
can be omitted if it is the same than the specified default.
Note Commands :The body of the ring tone is made up of comma delimited notes prefixed by the optional duration and postfixed by the octave. A
dotted note (.) can be specified after the octave which indicates the duration of the note is extended by 50%, making it 1.5x the original note duration.
http://www.beyondlogic.org/pic/ringtones.htm (1 of 12)13/02/2008 16:34:11
The parameters which can be specified in the control section are :
d (default duration). The default duration can be one of 1, 2, 4, 8, 16, 32 or 64. The default duration can be one of 1, 2, 4, 8, 16, 32 or 64. 1 specifies
a Semibreve (Whole Note), 2 indicates it a Minim (Half Note), 4 is a Crotchet (Quarter Note) etc up to 64 which is a Hemidemisemiquaver (64th
note). .
o (default octave). The default octave (scale) can be 4, 5, 6, or 7.
b (beats per minute). The BPM or tempo can be any one of the following values 25, 28, 31, 35, 40, 45, 50, 56, 63, 70, 80, 90, 100, 112, 125, 140,
160, 180, 200, 225, 250, 285, 320, 355, 400, 450, 500, 565, 635, 715, 800, 900.
s (style). Styles can be S=Staccato, N=Natural, C=Continuous.
l (looping). The loop value can be 0 to 15. 0 disables looping. 15 enables infinite looping. Values between 1 and 14 specify how many loops to make
before stopping.
If any of the parameters is missing from the control section, the following defaults are assumed : 4=duration, 6=scale, 63=beats-per-minute.
The circuit
As you can see the circuit required to generate tones is very simple. The 20MHz crystal controls the timing and can not be substituted with another value
without recalculating the divisors for each tone.

Calculations for 20MHz
The following spreedsheet shows the desired and actual frequencies for each note @ 20MHz. The code supports 4 octaves.

The source code
The code has been written in C and compiled with the Hi-Tech PICC Compiler. HiTech Software have a demo version of the PICC for download which
works for 30 days. A pre-compiled .HEX file has be included in the archive which has been compiled for use with (or without) the ICD.
To add new tones is simply a matter of cut and paste. You may choose to search Overtonez.co.uk or any number of internet sites for new ring tones. Once
you have one, simply cut the note commands into the Melody[ ] array and adjust the defaultduration, defaultoctave and beat_speed to suit.
If you have a Nokia F-Bus cable, you can download your favourite tunes from your phone using software such as Logomanager or the Oxygen Phone
Manager. You can then save them as .rtl files and paste it into your source code.
/*****************************************************************************/
/* */
/* RTTTL Ring Tone Player for Microchip PIC16F87x Microcontrollers */
/* Copyright Craig.Peacock@beyondlogic.org */
/* Version 1.0 17th August 2003 */
/* */
/*****************************************************************************/
#include <pic.h>
#define TONE RB0
void InitTimer(void);
void delayms(unsigned char cnt);

void PlayNote(unsigned short note, unsigned char octave, unsigned int duration);
unsigned char beep;

unsigned char preloadTMR1L;
unsigned char preloadTMR1H;
unsigned short TMR0Count;
unsigned char beat_speed;
#define MissionImpossible
void main(void)
{
unsigned int pointer = 0;
unsigned int octave = 0;
unsigned int duration = 0;
unsigned short note = 0;
unsigned int defaultoctave = 0;
unsigned int defaultduration = 0;
#ifdef AxelF
/* AxelF */
const unsigned char static Melody[] = {"32p,8g,8p,16a#.,8p,16g,16p,16g,8c6,8g,8f,8g,8p,16d.6,8p,16g,16p,
16g,8d#6,8d6,8a#,8g,8d6,8g6,16g,16f,16p,16f,8d,8a#,2g,4p,16f6,8d6,
8c6,8a#,4g,8a#.,16g,16p,16g,8c6,8g,8f,4g,8d.6,16g,16p,16g,8d#6,86,
8a#,8g,8d6,8g6,16g,16f,16p,16f,8d,8a#,2g"};
defaultoctave = 5;
defaultduration = 4;
beat_speed = 125;
#endif
#ifdef HappyBirthday
/* HappyBirthday */
const unsigned char static Melody[] = {"8g.,16g,a,g,c6,2b,8g.,16g,a,g,d6,2c6,8g.,16g,g6,e6,c6,b,a,8f6.,16f6,
e6,c6,d6,2c6,8g.,16g,a,g,c6,2b,8g.,16g,a,g,d6,2c6,8g.,16g,g6,e6,c6,b,
a,8f6.,16f6,e6,c6,d6,2c6"};
defaultoctave = 5;
beat_speed = 125;
#endif
#ifdef Itchy
/* Itchy & Scratcy */
const unsigned char static Melody[] = {"8c,8a5,4p,8c,8a,4p,8c,a5,8c,a5,8c,8a,4p,8p,8c,8d,8e,8p,8e,8f,8g,4p,8d,
8c,4d,8f,4a#,4a,2c7"};
defaultoctave = 6;
beat_speed = 198;
#endif
#ifdef MissionImpossible
/* Mission Impossible */
const unsigned char static Melody[] = {"16d5,16d#5,16d5,16d#5,16d5,16d#5,16d5,16d5,16d#5,16e5,16f5,16f#5,16g5,
8g5,4p,8g5,4p,8a#5,8p,8c6,8p,8g5,4p,8g5,4p,8f5,8p,8p,8g5,4p,4p,8a#5,8p,
8c6,8p,8g5,4p,4p,8f5,8p,8f#5,8p,8a#5,8g5,1d5"};
defaultoctave = 6;
beat_speed = 150;
#endif
TRISB0 = 0; /* Make TONE an output */
beep = 0;
InitTimer();
PEIE = 1;
GIE = 1; /* Enable General Purpose Interrupts */
do {
octave = defaultoctave; /* Set Default Octave */
if ((Melody[pointer] == '3') && (Melody[pointer+1] == '2')) {

duration = 32;
pointer += 2;
}
else if ((Melody[pointer] == '1') && (Melody[pointer+1] == '6')) {
duration = 16;
pointer += 2;
}
else if (Melody[pointer] == '8') {
duration = 8;
pointer++;
}
duration = 4;
pointer++;
}


duration = 2;
pointer++;
}
duration = 1;
pointer++;
} else duration = defaultduration;
if (Melody[pointer + 1] == '#') {
/* Process Sharps */
switch (Melody[pointer]) {
case 'a' : note = 10726;
break;
case 'c' : note = 9019;
break;
case 'd' : note = 8035;
break;
case 'f' : note = 6757;
break;
case 'g' : note = 6024;
break;
}
pointer +=2;
} else {
switch (Melody[pointer]) {
case 'a' : note = 11364;
break;
case 'b' : note = 10123;
break;
case 'c' : note = 9555;
break;
case 'd' : note = 8513;
break;
case 'e' : note = 7584;
break;
case 'f' : note = 7158;
break;
case 'g' : note = 6378;
break;

case 'p' : note = 0;

break;
}
pointer++;
}
if (Melody[pointer] == '.') {
/* Duration 1.5x */
duration = duration + 128;
pointer++;
}
if (Melody[pointer] == '4') {
octave = 4;
pointer++;
} else if (Melody[pointer] == '5') {
octave = 5;
pointer++;
octave = 6;
pointer++;
octave = 7;
pointer++;
}
if (Melody[pointer] == '.') {
/* Duration 1.5x */
duration = duration + 128;
pointer++;
}
PlayNote(note, octave, duration);
} while (Melody[pointer++] == ',');
/* Wait until last note has played */

while(TMR0Count) { };
beep = 0;
/* Loop */
while(1) {};

void PlayNote(unsigned short note, unsigned char octave, unsigned int duration)
{
/* Process octave */
switch (octave) {
case 4 : /* Do noting */
break;
case 5 : /* %2 */
note = note >> 1;
break;
case 6 : /* %4 */
note = note >> 2;
break;
case 7 : /* %8 */
note = note >> 4;
break;
}
/* Wait until last note has played */

while(TMR0Count) { };
beep = 0;
/* Process New Note Frequency */

if (note) {
note = ~note;
preloadTMR1L = (note & 0xFF);
preloadTMR1H = ((note & 0xFF00) >> 8);
}
/* Process Note Duration */

TMR0Count = 255/(duration & 0x7F);
/* If duration is 1.5x add .5 to duration */

if (duration & 0x80) TMR0Count = (TMR0Count + (TMR0Count >> 1));
if (note) beep = 1;
}
void InitTimer(void)
{
/* Initialise Timer 0 */
OPTION = 0b11010111; /* Set TMR0 to Internal CLk, 1:256 */

T0IF = 0; /* Clear TMR0 Flag, ready for use */

T0IE = 1; /* Enable Timer Overflow Interrupt */
/* Initialise Timer 1 */
T1CON = 0b00000001; /* Counter Enabled, Using Ext Pin 1:1 Prescaler */
TMR1IF = 0; /* Clear Flag */
TMR1IE = 1; /* Enable Interrupt */
}
void interrupt interr(void)

{
if (T0IF) {
TMR0 = beat_speed;
if (TMR0Count) TMR0Count--;
T0IF = 0;
}
if (TMR1IF) {
if (beep) TONE = !TONE;
else TONE = 0;
TMR1H = preloadTMR1H;
TMR1L = preloadTMR1L;
TMR1IF = 0; /* Clear Flag */
}
}
The above example compiled with the Mission Impossible theme takes a modest 1K of memory. .
Memory Usage Map:
Program ROM $0000 - $004D $004E ( 78) words

Program ROM $006F - $01BA $014C ( 332) words
Program ROM $05B9 - $07FF $0247 ( 583) words
$03E1 ( 993) words total Program ROM
Bank 0 RAM $0020 - $0038 $0019 ( 25) bytes

Bank 0 RAM $0071 - $0078 $0008 ( 8) bytes
$0021 ( 33) bytes total Bank 0 RAM
Program statistics:
Total ROM used 993 words (12.1%)

Total RAM used 33 bytes (9.0%)

Downloading the Source Code
Version 1.0, 14k bytes
Revision History
17th August 2003 - Version 1.0.
Glossary
Semibreve - Semibreve is the British term for Whole Note. A semibreve is worth 4 beats.
Minim - Minim is the British term for Half Note. A minim is worth 2 beats.
Crotchet - Crotchet is the British term for Quarter Note. A crotchet is worth 1 beat.
Quaver - Quaver is the British term for 8th Note. A quaver is worth 1/2 a beat.
Semiquaver - Semiquaver is the British term for 16th Note. A semiquaver is worth 1/4 of a beat.
Demisemiquaver - Demisemiquaver is the British term for 32nd Note. A demisemiquaver is worth 1/8 of a beat.
Hemidemisemiquaver - Hemidemisemiquaver is the British term for 64th Note. A hemidemisemiquaver is worth 1/16 of a beat.
Octave - With the 12 musical notes, let's call note number one C. If we start on C and work our way up the 12 notes in pitch, we will eventually hit C
again but of a higher pitch (exactly one octave higher). At this point the C we are playing is in the next Octave on from the C we started on. For
example if we started on C4 (4th Octave) we would end up on C5 (5th Octave) and this can keep going endlessly until the frequency of the pitch
reaches beyond our aural hearing frequency range. The same can apply going down in pitch / octaves. So Octave is specifiying what Octave or Pitch/
Frequency Range to play your specified note from.
Staccato - Staccato is a direction to perform a note quickly, lightly, and seperated from the notes before and after it. Staccato performance in
practice reduces the time value of a note by 50%, thus a staccato'd crotchet (quarter note) lasts only as long as a quaver (8th note).
Links
http://www.ringtone-converters.com/christmas - Many Christmas Ring Tone Tunes in RTTTL Format.
http://overtonez.co.uk/frame_me/index.pl - OvertoneZ - Search and download ASCII RTTTL Ring Tones to import into your source code.
http://www.htsoft.com/ HiTech Software - Make the PICC C Cross Compiler for Microchip PIC16x Family of Microcontrollers.
http://www.microchip.com - Microchip PIC Series of Microcontrollers
http://www.microchipc.com - Program Microchip PIC micros with C
Copyright 2003-2007 Craig Peacock & Andrew Toner 6th April 2007.
Musical terms and insight kindy provided by Andrew Toner of http://www.andrewtoner.com

BeyondLogic - CMOS Image Sensors
Wednesday, February
13th, 2008
CMOS Digital Image Sensors
Adding vision to your projects needs not be a difficult task. Whether its machine vision for robot
control or the sampling and storage of images for security, CMOS images sensors can offer many
advantages over traditional CCD sensors. Just some of the technical advantages of CMOS
sensors are,
No Blooming
Low power consumption. Ideal for battery operated
devices
Direct digital output (Incorporates ADC and associated
circuitry)
Small size and little support circuitry. Often just a
crystal and some decoupling is all that is needed.
Simple to design with.
There are many manufacturers making CMOS Image Sensors. Just some of the more notable
ones are Micron who acquired Photobit, OmniVision, ST who acquired VLSI Vision, Mitsubishi and
Kodak.
There are two different categories of CMOS Sensors based on their output. One type will have a
analog signal out encoded in a video format such as PAL, NTSC, S-Video etc which are designed
for camera on a chip applications. With these devices you simply supply power and feed the output
straight into you AV Equipment. Others will have a digital out, typically a 4/8 or 16 bit data bus.
These 'digital' sensors simplify designs, where once a traditional 'analog' camera was feed into a
video capture card for conversion to digital. Today, digital data can be pulled straight from the
sensor.
The main components to a Digital Video Camera design are
http://www.beyondlogic.org/imaging/camera.htm (1 of 8)13/02/2008 16:34:50

CMOS Image Sensor. The heart of the camera. It produces a digital/

analog output representing each pixel. It's support circuitry will normally
include a Crystal Oscillator and power supply decoupling. Some sensors
may need a resistive bias network of some type. All of these
components are normally surface mounted on the back of the PCB and
occupies very little real estate.
The lens Holder. This will be either a plastic or metal mount which
attaches to your PCB and allows a standard size lens to be screwed in.
The screw thread facilitates focusing for fixed lens systems. The base of
the lens mount may also have a IR (Infra Red) filter.
The Lens. This will determine your Field of view among other things.
Lenses range from fish-eye to telescopic and need to be purchased to fit
the parameters of your sensor and lens holder.
Once you have completed the above, you have yourself a imaging system which constantly spits
out a pixel data stream synchronised to a pixel, frame and/or line clocks. Connecting this directly to
a microcontroller/processor system will cause headaches. Trying to clock this raw data in will use
up great amounts of CPU time, if your uC could do it in the first place. If you drop a pixel because
an ISR is doing some thing more privileged, then you have no ability to sample that location again,
and thus no method of error correction.
While the frame rate on many devices can be slowed down by using internal divisors, it still doesn't
reach an acceptable speed nor allow random access to pixels. Reducing the master clock rate of
the device will effect exposure times and other time dependent settings, thus is not an option.
Clearly some additional circuitry will need to be designed.

By using a CPLD/FPGA and RAM, you can program the CPLD to dump the data straight into RAM.
Your micro could then read this RAM through the PLD which could be memory mapped. If you
really want performance (And budget is not a problem), you could use Dual Port RAM. If however
you only want to capture one frame, then the PLD could copy one frame into memory and ignore
subsequent pixel data until an event such as when your device has read all the data out of RAM.
Other options are to use a LVDS (Low Voltage Differential Signalling) serial bus, to relay your data
over a few metres or more. At a high enough clock rate, you won't wait all day for a frame.
The other thing you must not forget is how to control the sensor. Most of it's internal parameters are
controlled by a serial bus, typically I2C for the majority of sensors. This can either be controlled
through a memory mapped Register programmed into your PLD or via an I2C port straight from
your uC. All up this makes quite a cheap way to capture video. Ideal for your Embedded Linux
Systems.
OmniVision Technologies
OmniVision not only develops CMOS Image Sensors, but also support device ICs such as
the OV-511 & OV-518 Advanced Camera to USB Bridge. OmniVision is one of the more

popular manufacturers with devices such as the OV7910 NTSC/PAL Camera on a Chip
being used in many small analog camera modules around the world. This would be the
recommended starting point if you are starting out designing with CMOS Image Sensors.
OV9620
SXGA 1280 x 1024 Colour (OV9620) or Monochrome (OV9121) (1.3 mega-

pixel)
1/2" Optical Format
15 fps @ SXGA
10 bit Raw RGB Data Out
Requires 3.3V and 2.5V supplies
CLCC-48 Package
OV8610
SVGA 800 x 600 Colour

1/3" Optical Format
15 fps @ SVGA
10 bit Raw RGB Data Out
Requires single 3.3V supply < 30mA
CLCC-48 Package
OV7640
640 x 480 Colour (OV7640) or Monochrome (OV7141)

1/4" Optical Format
30fps @ VGA, 60fps @ QVGA
YUV/YCbCr 4:2:2, RGB 4:2:2 or Raw 8 bit RGB Outputs
2.5V Core & Analog Supply / 2.5 or 3.3V I/O supplies. Power Consumption
under 40mW
PLCC-28 Package
OV7620

1/3" Optical Format
0.5 to 30 fps
5V Supply <120mW
48-pin LCC
OV6630

1/4" Optical Format

up to 60 fps

3.3V Core < 20mA / 3.3V or 5V I/O
LCC-48 Package
OmniVision and some third party vendors (e.g.

COMedia) have evaluation modules for the
OmniVision sensors. This allows you to get up to
speed with the sensor, incorporating a PCB with
de-coupling, a Lens and Lens Holder. The
majority of the sensor's signals are broken out to
a header which you can use to interface to your
own designs. The evaluation modules in small A picture of the M3188 Evaluation Module with
quantities are normally much easier to obtain the lens holder removed. The signals can be
than the sensors themselves, and are typically obtained
from the 32 pin header on the top of the module
cheaper as a result.
DIY Electronics (http://www.kitsrus.com) are just one outlet which sells the third party
evaluation boards.
1/3" B/W Camera VGA Module M3188 with Digital Output (OV7110 Sensor)
1/3" Colour Camera VGA Module C3188 with Digital Output (OV7610 Sensor)
1/3" Colour Camera Module NTSC/PAL Out (OV7910 Sensor)
Kodak
In August 2001 Kodak launched it's first two CMOS Images to its Kodak Digital Science
range of image sensors. Kodak has been in the game of CCD Sensors for twenty plus years
with a wealth of imaging expertise and research.
KAC-0311
640 x 480 resolution

1/3" Optical Format
0 - 60 frames per second
Single 3.3V Supply <200mW
48 pin ceramic LCC package
KAC-1310
1.3 megapixel CMOS sensor, 1280 x 1024 resolution

1/2" Optical Format
15 frames a second at 20MHz Clock (Full SXGA)

Single 3.3V Supply, <250mW

48-pin ceramic LCC package
Mitsubishi Chips
Mitsubishi have broken the pack, to produce smaller resolution sensors. These sensors can
typically be used for a range of applications such as finger print sensing, motor detection,
gaming, tracing of moving parts etc. Just one application is the new optical mice flooding the
market place. They use a low resolution Image Sensor to track movement on a wide variety
of surfaces.
Also unique to these sensors is in-built image processing. Both sensors can output edge
enhanced or extracted data, making them ideal for tracking on small robots, industrial control
etc. The sensors can also process 2D images into 1D. The output of each pixel is by the
means of a analog potential, thus this must be fed into an ADC to return digital image data.
M64285FP CMOS Image Sensor
32 x 32 Pixel Black & White, 1/6" Optical Format

5V Supply < 15mW
In Built Edge Extraction
Max 5000 frames per second
Analog Output to uC ADC
10pin SO Package
M64282FP Artificial Retina LSI
128 x 128 Pixel Black & White, 1/4" Optical Format

5V Supply < 15mW
Positive and negative image output, Edge enhancement / extraction
10 to 30 frames per second
16pin TSOP Package
Micron
Micron Imaging has aquired Photobit Corporation and inherited its IP and Image Sensors.
CMOS APS (CMOS active pixel sensor) was first created by a team of JPL engineers lead
by Dr Eric Fossum. Dr Fossum is now Fellow at Micron Tecnology Inc. Micron's Product
range can be sought from Micron's Product Matrix
MI-0111
CIF Resolution - 352 x 288 Colour

1/5 Inch Optical Format

0-30 Frames a Second
3.3V Supply, < 55mW
28-pin CLCC
MI-0330
VGA Resolution - 640 x 480 Colour

1/4 Inch Optical Format
0-30 Frames a Second
3.3V Supply, <100mW
48-pin CLCC
ST Microelectronics Imaging Division
Spectronix have used the ST Sensors in their RoboCam Series. ST also offer a couple of
CoProcessors, a STV0657 Digital CoProcessor, a STV0672 USB CoProcessor and a
STV0680 DSC (Digital Still Camera) CoProcessor. The DSC CoProcessor offers an RS-
232 / USB Interface and on board SDRAM Storage.
VV5301/VV6301
VV5500 Monochrome / VV6500 Colour 648 x 484 VGA Sensor

10bit ADC Output RAW
3.3V-6.0V (Built In Regulator) <25mA
48 LCC Package
Part 2 : Accessories and Modules

Home
Digital Imaging Optics

CMUcam
Spectronix Modules
Neuricam - plCAM Intelligent
Camera
Bayer Colour Filters /
Interpolation Methods
Other CMOS Sensor
Manufacturers


USB in a NutShell - Chapter 1 - Introduction
Wednesday, February
13th, 2008
USB in a NutShell
Making sense of the USB standard
Starting out new with USB can be quite daunting. With the USB 2.0 specification at
650 pages one could easily be put off just by the sheer size of the standard. This is
only the beginning of a long list of associated standards for USB. There are USB
Class Standards such as the HID Class Specification which details the common
operation of devices (keyboards, mice etc) falling under the HID (Human Interface
Devices) Class - only another 97 pages. If you are designing a USB Host, then you
have three Host Controller Interface Standards to choose from. None of these are
detailed in the USB 2.0 Spec.
The good news is you dont even need to bother reading the entire USB standard.
Some chapters were churned out by marketing, others aimed at the lower link layer
normally taken care off by your USB controller IC and a couple aimed at host and hub
developers. Lets take a little journey through the various chapters of the USB 2.0
specification and briefly introduce the key points.
Chapter Name Description Pages
1 Introduction Includes the motivation and scope for USB. 2

The most important piece of information in
this chapter is to make reference to the
Universal Serial Bus Device Class
Specifications. No need reading this chapter.
2 Terms and This chapter is self-explanatory and a 8

Abbreviations necessary evil to any standard.
http://www.beyondlogic.org/usbnutshell/usb1.htm (1 of 7)13/02/2008 16:35:11

3 Background Specifies the goals of USB which are 4

PlugnPlay and simplicity to the end user
(not developer). Introduces Low, Full and
High Speed ranges with a feature list
straight from marketing. No need reading
this chapter either.
4 Architectural This is where you can start reading. This 10

Overview chapter provides a basic overview of a USB
system including topology, data rates, data
flow types, basic electrical specs etc.
5 USB Data This chapter starts to talk about how data 60

Flow Model flows on a Universal Serial Bus. It introduces
terms such as endpoints and pipes then
spends most of the chapter on each of the
data flow types (Control, Interrupt,
Isochronous and Bulk). While its important
to know each transfer type and its properties
it is a little heavy on for a first reader.
6 Mechanical This chapter details the USBs two standard 33

connectors. The important information here
is that a type A connector is oriented facing
downstream and a type B connector
upstream. Therefore it should be impossible
to plug a cable into two upstream ports. All
detachable cables must be full/high speed,
while any low speed cable must be
hardwired to the appliance. Other than a
quick look at the connectors, you can skip
this chapter unless you intend to
manufacture USB connectors and/or cables.
PCB designers can find standard footprints
in this chapter.
7 Electrical This chapter looks at low level electrical 75

signalling including line impedance, rise/fall
times, driver/receiver specifications and bit
level encoding, bit stuffing etc. The more
important parts of this chapter are the device
speed identification by using a resistor to
bias either data line and bus powered
devices vs self powered devices. Unless you
are designing USB transceivers at a silicon
level you can flip through this chapter. Good
USB device datasheets will detail what value
bus termination resistors you will need for

bus impedance matching.
8 Protocol Now we start to get into the protocol layers. 45

Layer This chapter describes the USB packets at a
byte level including the sync, pid, address,
endpoint, CRC fields. Once this has been
grasped it moves on to the next protocol
layer, USB packets. Most developers still
dont see these lower protocol layers as their
USB device ICs take care of this. However
a understanding of the status reporting and
handshaking is worthwhile.
9 USB Device This is the most frequently used chapter in 36

Frame Work the entire specification and the only one I
ever bothered printing and binding. This
details the bus enumeration and request
codes (set address, get descriptor etc) which
make up the most common protocol layer
USB programmers and designers will ever
see. This chapter is a must read in detail.
10 USB Host This chapter covers issues relating to the 23

Hardware host. This includes frame and microframe
and Software generation, host controller requirements,
software mechanisms and the universal
serial bus driver model. Unless you are
designing Hosts, you can skip this chapter.
11 Hub Details the workings of USB hubs including 143

Specification hub configuration, split transactions,
standard descriptors for hub class etc.
Unless you are designing Hubs, you can
skip this chapter.
So now we can begin to read the parts of the standard relevant to our needs. If you
develop drivers (Software) for USB peripherals then you may only need to read
chapters,
4 - Architectural Overview
5 - USB Data Flow Model
9 - USB Device Frame Work, and
10 - USB Host Hardware and Software.
Peripheral hardware (Electronics) designers on the other hand may only need to read
chapters,

4 - Architectural Overview
5 - USB Data Flow Model
6 - Mechanical, and
7 - Electrical.
USB in a NutShell for Peripheral Designers
Now lets face it, (1) most of us are here to develop USB peripherals and (2) it's
common to read a standard and still have no idea how to implement a device. So in
the next 7 chapters we focus on the relevant parts needed to develop a USB device.
This allows you to grab a grasp of USB and its issues allowing you to further research
the issues specific to your application.
The USB 1.1 standard was complex enough before High Speed was thrown into USB
2.0. In order to help understand the fundamental principals behind USB, we omit many
areas specific to High Speed devices.
Introducing the Universal Serial Bus
USB version 1.1 supported two speeds, a full speed mode of 12Mbits/s and a low
speed mode of 1.5Mbits/s. The 1.5Mbits/s mode is slower and less susceptible to EMI,
thus reducing the cost of ferrite beads and quality components. For example, crystals
can be replaced by cheaper resonators. USB 2.0 which is still yet to see day light on
mainstream desktop computers has upped the stakes to 480Mbits/s. The 480Mbits/s
is known as High Speed mode and was a tack on to compete with the Firewire Serial
Bus.
USB Speeds
High Speed - 480Mbits/s
Full Speed - 12Mbits/s
Low Speed - 1.5Mbits/s
The Universal Serial Bus is host controlled. There can only be one host per bus. The
specification in itself, does not support any form of multimaster arrangement. However
the On-The-Go specification which is a tack on standard to USB 2.0 has introduced a
Host Negotiation Protocol which allows two devices negotiate for the role of host. This
is aimed at and limited to single point to point connections such as a mobile phone
and personal organiser and not multiple hub, multiple device desktop configurations.
The USB host is responsible for undertaking all transactions and scheduling
bandwidth. Data can be sent by various transaction methods using a token-based
protocol.
In my view the bus topology of USB is somewhat limiting. One of the original intentions

of USB was to reduce the amount of cabling at the back of your PC. Apple people will
say the idea came from the Apple Desktop Bus, where both the keyboard, mouse and
some other peripherals could be connected together (daisy chained) using the one
cable.
However USB uses a tiered star topology, simular to that of 10BaseT Ethernet. This
imposes the use of a hub somewhere, which adds to greater expense, more boxes on
your desktop and more cables. However it is not as bad as it may seem. Many devices
have USB hubs integrated into them. For example, your keyboard may contain a hub
which is connected to your computer. Your mouse and other devices such as your
digital camera can be plugged easily into the back of your keyboard. Monitors are just
another peripheral on a long list which commonly have in-built hubs.
This tiered star topology, rather than simply daisy chaining devices together has some
benefits. Firstly power to each device can be monitored and even switched off if an
overcurrent condition occurs without disrupting other USB devices. Both high, full and
low speed devices can be supported, with the hub filtering out high speed and full
speed transactions so lower speed devices do not receive them.
Up to 127 devices can be connected to any one USB bus at any one given time. Need
more devices? - simply add another port/host. While most earlier USB hosts had two
ports, most manufacturers have seen this as limiting and are starting to introduce 4
and 5 port host cards with an internal port for hard disks etc. The early hosts had one
USB controller and thus both ports shared the same available USB bandwidth. As
bandwidth requirements grew, we are starting to see multi-port cards with two or more
controllers allowing individual channels.
The USB host controllers have their own specifications. With USB 1.1, there were two
Host Controller Interface Specifications, UHCI (Universal Host Controller Interface)
developed by Intel which puts more of the burden on software (Microsoft) and allowing
for cheaper hardware and the OHCI (Open Host Controller Interface) developed by
Compaq, Microsoft and National Semiconductor which places more of the burden on
hardware(Intel) and makes for simpler software. Typical hardware / software engineer
relationship. . .
With the introduction of USB 2.0 a new Host Controller Interface Specification was
needed to describe the register level details specific to USB 2.0. The EHCI (Enhanced
Host Controller Interface) was born. Significant Contributors include Intel, Compaq,
NEC, Lucent and Microsoft so it would hopefully seem they have pooled together to
provide us one interface standard and thus only one new driver to implement in our
operating systems. Its about time.
USB as its name would suggest is a serial bus. It uses 4 shielded wires of which two
are power (+5v & GND). The remaining two are twisted pair differential data signals. It

uses a NRZI (Non Return to Zero Invert) encoding scheme to send data with a sync
field to synchronise the host and receiver clocks.
USB supports plugnplug with dynamically loadable and unloadable drivers. The user
simply plugs the device into the bus. The host will detect this addition, interrogate the
newly inserted device and load the appropriate driver all in the time it takes the
hourglass to blink on your screen provided a driver is installed for your device. The
end user needs not worry about terminations, terms such as IRQs and port addresses,
or rebooting the computer. Once the user is finished, they can simply lug the cable
out, the host will detect its absence and automatically unload the driver.
The loading of the appropriate driver is done using a PID/VID (Product ID/Vendor ID)
combination. The VID is supplied by the USB Implementor's forum at a cost and this is
seen as another sticking point for USB. The latest info on fees can be found on the
USB Implementors Website
Other standards organisations provide a extra VID for non-commercial activities such
as teaching, research or fiddling (The Hobbyist). The USB Implementors forum has yet
to provide this service. In these cases you may wish to use one assigned to your
development system's manufacturer. For example most chip manufacturers will have a
VID/PID combination you can use for your chips which is known not to exist as a
commercial device. Other chip manufacturers can even sell you a PID to use with their
VID for your commercial device.
Another more notable feature of USB, is its transfer modes. USB supports Control,
Interrupt, Bulk and Isochronous transfers. While we will look at the other transfer
modes later, Isochronous allows a device to reserve a defined about of bandwidth with
guaranteed latency. This is ideal in Audio or Video applications where congestion may
cause loss of data or frames to drop. Each transfer mode provides the designer trade-
offs in areas such as error detection and recovery, guaranteed latency and bandwidth.
Home Chapter 2 : Hardware
Connectors
Electrical
Speed Identification
Power (Vbus)
Suspend Current
Data Signalling Rate
Comments and Feedback?

Comments :
Email
Address : (Optional) Send
Copyright 2001-2007 Craig Peacock, 6th April 2007.

USB in a NutShell - Chapter 7 - PDIUSBD11 and PIC16F87x Example
USB in a NutShell
Making Sense of the USB Standard
Enumeration
Enumeration is the process of determining what device has just been connected to the bus and what parameters it
requires such as power consumption, number and type of endpoint(s), class of product etc. The host will then
assign the device an address and enable a configuration allowing the device to transfer data on the bus. A fairly
generic enumeration process is detailed in section 9.1.2 of the USB specification. However when writing USB
firmware for the first time, it is handy to know exactly how the host responds during enumeration, rather than the
general enumeration process detailed in the specification.
A common Windows enumeration involves the following steps,
1. The host or hub detects the connection of a new device via the device's pull up resistors on the data pair.
The host waits for at least 100ms allowing for the plug to be inserted fully and for power to stabilise on the
device.
2. Host issues a reset placing the device is the default state. The device may now respond to the default
address zero.
3. The MS Windows host asks for the first 64 bytes of the Device Descriptor.
4. After receiving the first 8 bytes of the Device Descriptor, it immediately issues another bus reset.
5. The host now issues a Set Address command, placing the device in the addressed state.
6. The host asks for the entire 18 bytes of the Device Descriptor.
7. It then asks for 9 bytes of the Configuration Descriptor to determine the overall size.
8. The host asks for 255 bytes of the Configuration Descriptor.
9. Host asks for any String Descriptors if they were specified.
At the end of Step 9, Windows will ask for a driver for your device. It is then common to see it request all the
descriptors again before it issues a Set Configuration request.
The above enumeration process is common to Windows 2000, Windows XP and Windows 98 SE.
Step 4 often confuses people writing firmware for the first time. The Host asks for the first 64 bytes of the device
descriptor, so when the host resets your device after it receives the first 8 bytes, it is only natural to think there is
something wrong with your device descriptor or how your firmware handles the request. However as many will tell

you, if you keep persisting by implementing the Set Address Command it will pay off by asking for a full 18 bytes of
device descriptor next.
Normally when something is wrong with a descriptor or how it is being sent, the host will attempt to read it three
times with long pauses in between requests. After the third attempt, the host gives up reporting an error with your
device.
Firmware - PIC16F876 controlling the PDIUSBD11
We start our examples with a Philip's PDIUSBD11 I2C Serial USB Device connected to a MicroChip PIC16F876
(shown) or a Microchip PIC16F877 (Larger 40 Pin Device). While Microchip has got two low speed USB
PIC16C745 and PIC16C765 devices out now, they are only OTP without In-Circuit Debugging (ICD) support which
doesn't help with the development flow too well. They do have four new full speed flash devices with (ICD) support
coming. In the mean time the Philips PDIUSBD11 connected to the PIC16F876 which gives the advantage of
Flash and In-Circuit Debugging.
Click here to enlarge
A schematic of the required hardware is shown above. The example enumerates and allows analog voltages to be
read from the five multiplexed ADC inputs on the PIC16F876 MCU. The code is compatible with the PIC16F877
allowing a maximum of 8 Analog Channels. A LED connected on port pin RB3 lights when the device is
configured. A 3.3V regulator is not pictured, but is required for the PDIUSBD11. If you are running the example
circuit from an external power supply, then you can use a garden variety 78L033 3.3V voltage regulator, however if
you wish to run the device as a Bus Powered USB device then a low dropout regulator needs to be sought.
Debugging can be done by connecting TXD (Pin 17) to a RS-232 Line Driver and fed into a PC at 115,200bps.
Printf statements have been included which display the progress of enumeration.
The code has been written in C and compiled with the Hi-Tech PICC Compiler. They have a demo version (7.86
PL4) of the PICC for download which works for 30 days. A pre-compiled .HEX file has be included in the archive
which has been compiled for use with (or without) the ICD.
#include <pic.h>
#include <stdio.h>
#include <string.h>
#include "usbfull.h"
const USB_DEVICE_DESCRIPTOR DeviceDescriptor = {

sizeof(USB_DEVICE_DESCRIPTOR), /* bLength */
TYPE_DEVICE_DESCRIPTOR, /* bDescriptorType */
0x0110, /* bcdUSB USB Version 1.1 */

0, /* bDeviceClass */
0, /* bDeviceSubclass */
0, /* bDeviceProtocol */
8, /* bMaxPacketSize 8 Bytes */
0x04B4, /* idVendor (Cypress Semi) */
0x0002, /* idProduct (USB Thermometer Example) */
0x0000, /* bcdDevice */
1, /* iManufacturer String Index */
0, /* iProduct String Index */
0, /* iSerialNumber String Index */
1 /* bNumberConfigurations */
};
The structures are all defined in the header file. We have based this example on the Cypress USB Thermometer
example so you can use our USB Driver for the Cypress USB Starter Kit. A new generic driver is being written to
support this and other examples which will be available soon. Only one string is provided to display the
manufacturer. This gives enough information about how to implement string descriptors without filling up the entire
device with code. A description of the Device Descriptor and its fields can be found here.
const USB_CONFIG_DATA ConfigurationDescriptor = {

{ /* configuration descriptor */
sizeof(USB_CONFIGURATION_DESCRIPTOR), /* bLength */
TYPE_CONFIGURATION_DESCRIPTOR, /* bDescriptorType */
sizeof(USB_CONFIG_DATA), /* wTotalLength */
1, /* bNumInterfaces */
1, /* bConfigurationValue */
0, /* iConfiguration String Index */
0x80, /* bmAttributes Bus Powered, No Remote Wakeup */
0x32 /* bMaxPower, 100mA */
},
{ /* interface descriptor */
sizeof(USB_INTERFACE_DESCRIPTOR), /* bLength */
TYPE_INTERFACE_DESCRIPTOR, /* bDescriptorType */
0, /* bInterface Number */
0, /* bAlternateSetting */
2, /* bNumEndpoints */
0xFF, /* bInterfaceClass (Vendor specific) */
0xFF, /* bInterfaceSubClass */
0xFF, /* bInterfaceProtocol */
0 /* iInterface String Index */
},
{ /* endpoint descriptor */
sizeof(USB_ENDPOINT_DESCRIPTOR), /* bLength */
TYPE_ENDPOINT_DESCRIPTOR, /* bDescriptorType */
0x01, /* bEndpoint Address EP1 OUT */
0x02, /* bmAttributes - Interrupt */
0x0008, /* wMaxPacketSize */
0x00 /* bInterval */
},
{ /* endpoint descriptor */
sizeof(USB_ENDPOINT_DESCRIPTOR), /* bLength */
TYPE_ENDPOINT_DESCRIPTOR, /* bDescriptorType */
0x81, /* bEndpoint Address EP1 IN */
0x02, /* bmAttributes - Interrupt */
0x0008, /* wMaxPacketSize */
0x00 /* bInterval */
}
};

A description of the Configuration Descriptor and its fields can be found here. We provide two endpoint descriptors
on top of the default pipe. EP1 OUT is an 8 byte maximum Bulk OUT Endpoint and EP1 IN is an 8 byte max Bulk
IN Endpoint. Our example reads data from the Bulk OUT endpoint and places it in an 80 byte circular buffer.
Sending an IN packet to EP1 reads 8 byte chunks from this circular buffer.
LANGID_DESCRIPTOR LANGID_Descriptor = { /* LANGID String Descriptor Zero */

sizeof(LANGID_DESCRIPTOR), /* bLenght */
TYPE_STRING_DESCRIPTOR, /* bDescriptorType */
0x0409 /* LANGID US English */
};
const MANUFACTURER_DESCRIPTOR Manufacturer_Descriptor = { /* ManufacturerString 1 */

sizeof(MANUFACTURER_DESCRIPTOR), /* bLenght */
TYPE_STRING_DESCRIPTOR, /* bDescriptorType */
"B\0e\0y\0o\0n\0d\0 \0L\0o\0g\0i\0c\0" /* ManufacturerString in
UNICODE */
};
A Zero Index String Descriptor is provided to support the LANGID requirements of USB String Descriptors. This
indicates all descriptors are in US English. The Manufacturer Descriptor can be a little deceiving as the size of the
char array is fixed in the header and is not dynamic.
#define MAX_BUFFER_SIZE 80
bank1 unsigned char circularbuffer[MAX_BUFFER_SIZE];

unsigned char inpointer;
unsigned char outpointer;
unsigned char *pSendBuffer;

unsigned char BytesToSend;
unsigned char CtlTransferInProgress;
unsigned char DeviceAddress;
unsigned char DeviceConfigured;
#define PROGRESS_IDLE 0
#define PROGRESS_ADDRESS 3
void main (void)

{
TRISB = 0x03; /* Int & Suspend Inputs */
RB3 = 1; /* Device Not Configured (LED) */
RB2 = 0; /* Reset PDIUSBD11 */
InitUART();
printf("Initialising\n\r");
I2C_Init();
RB2 = 1; /* Bring PDIUSBD11 out of reset */
ADCON1 = 0x80; /* ADC Control - All 8 Channels Enabled, */

/* supporting upgrade to 16F877 */
USB_Init();
printf("PDIUSBD11 Ready for connection\n\r");
while(1)
if (!RB0) D11GetIRQ(); /* If IRQ is Low, PDIUSBD11 has an Interrupt
Condition */

The main function is example dependent. It's responsible for initialising the direction of the I/O Ports, initialising the
I2C interface, Analog to Digital Converters and PDIUSBD11. Once everything is configured it keeps calling
D11GetIRQ which processes PDIUSBD11 Interrupt Requests.
void USB_Init(void)
{
unsigned char Buffer[2];
/* Disable Hub Function in PDIUSBD11 */

Buffer[0] = 0x00;
D11CmdDataWrite(D11_SET_HUB_ADDRESS, Buffer, 1);
/* Set Address to zero (default) and enable function */

Buffer[0] = 0x80;
D11CmdDataWrite(D11_SET_ADDRESS_ENABLE, Buffer, 1);
/* Enable function generic endpoints */

Buffer[0] = 0x02;
D11CmdDataWrite(D11_SET_ENDPOINT_ENABLE, Buffer, 1);
/* Set Mode - Enable SoftConnect */

Buffer[0] = 0x97; /* Embedded Function, SoftConnect, Clk Run, No LazyClk, Remote
Wakeup */
Buffer[1] = 0x0B; /* CLKOut = 4MHz */
D11CmdDataWrite(D11_SET_MODE, Buffer, 2);
}
The USB Init function initialises the PDIUSBD11. This initialisation procedure has been omitted from the Philips
PDIUSBD11 datasheet but is available from their FAQ. The last command enables the soft-connect pull up resistor
on D+ indicating it is a full speed device but also advertises its presence on the universal serial bus.
void D11GetIRQ(void)
{
unsigned short Irq;
/* Read Interrupt Register to determine source of interrupt */
D11CmdDataRead(D11_READ_INTERRUPT_REGISTER, (unsigned char *)&Irq, 2);
if (Irq) printf("Irq = 0x%X: ",Irq);
Main() keeps calling the D11GetIRQ in a loop. This function reads the PDIUSBD11's Interrupt Register to establish
if any interrupts are pending. If this is the case it will act upon them, otherwise it will continue to loop. Other USB
devices may have a series of interrupt vectors assigned to each endpoint. In this case each ISR will service the
appropriate interrupt removing the if statements.
if (Irq & D11_INT_BUS_RESET) {

printf("Bus Reset\n\r");
USB_Init();
}
if (Irq & D11_INT_EP0_OUT) {

printf("EP0_Out: ");
Process_EP0_OUT_Interrupt();

if (Irq & D11_INT_EP0_IN) {

printf("EP0_In: \n\r");
if (CtlTransferInProgress == PROGRESS_ADDRESS) {
D11CmdDataWrite(D11_SET_ADDRESS_ENABLE,&DeviceAddress,1);
D11CmdDataRead(D11_READ_LAST_TRANSACTION + D11_ENDPOINT_EP0_IN,
Buffer, 1);
CtlTransferInProgress = PROGRESS_IDLE;
}
else {
D11CmdDataRead(D11_READ_LAST_TRANSACTION + D11_ENDPOINT_EP0_IN,
Buffer, 1);
WriteBufferToEndPoint();
}
}
The If statements work down in order of priority. The highest priority interrupt is the bus reset. This simply calls
USB_Init which re-initialises the USB function. The next highest priority is the default pipe consisting of EP0 OUT
and EP1 IN. This is where all the enumeration and control requests are sent. We branch to another function to
handle the EP0_OUT requests.
When a request is made by the host and it wants to receive data, the PIC16F876 will send the PDIUSBD11 a 8
byte packet. As the USbus is host controlled it cannot write the data when ever it desires, so the PDIUSBD11
buffers the data and waits for an IN Token to be sent from the host. When the PDIUSBD11 receives the IN Token
it generates an interrupt. This makes a good time to reload the next packet of data to send. This is done by an
additional function WriteBufferToEndpoint();
The section under CtlTransferInProgress == PROGRESS_ADDRESS handles the setting of the device's address.
We detail this later.

printf("EP1_OUT\n\r");
D11CmdDataRead(D11_READ_LAST_TRANSACTION + D11_ENDPOINT_EP1_OUT, Buffer,
1);
bytes = D11ReadEndpoint(D11_ENDPOINT_EP1_OUT, Buffer);
for (count = 0; count < bytes; count++) {
circularbuffer[inpointer++] = Buffer[count];
if (inpointer >= MAX_BUFFER_SIZE) inpointer = 0;
}
loadfromcircularbuffer(); //Kick Start
}

printf("EP1_IN\n\r");
D11CmdDataRead(D11_READ_LAST_TRANSACTION + D11_ENDPOINT_EP1_IN, Buffer,
1);
loadfromcircularbuffer();
}
EP1 OUT and EP1 IN are implemented to read and write bulk data to or from a circular buffer. This setup allows
the code to be used in conjunction with the BulkUSB example in the Windows DDK's. The circular buffer is defined
earlier in the code as being 80 bytes long taking up all of bank1 of the PIC16F876's RAM.

1);

Buffer[0] = 0x01; /* Stall Endpoint */

D11CmdDataWrite(D11_SET_ENDPOINT_STATUS + D11_ENDPOINT_EP2_OUT, Buffer,
1);
}

1);
D11CmdDataWrite(D11_SET_ENDPOINT_STATUS + D11_ENDPOINT_EP2_IN, Buffer,
1);
}

1);
D11CmdDataWrite(D11_SET_ENDPOINT_STATUS + D11_ENDPOINT_EP3_OUT, Buffer,
1);
}

1);
D11CmdDataWrite(D11_SET_ENDPOINT_STATUS + D11_ENDPOINT_EP3_IN, Buffer,
1);
}
Endpoints two and three are not used at the moment, so we stall them if any data is received. The PDIUSBD11
has a Set Endpoint Enable Command which can be used to enable or disable function generic endpoints (any
endpoints other than the default control pipe). We could use this command to diable the generic endpoints, if we
were planning on not using these later. However at the moment this code provides a foundation to build upon.
void Process_EP0_OUT_Interrupt(void)
{
unsigned long a;
USB_SETUP_REQUEST SetupPacket;
/* Check if packet received is Setup or Data - Also clears IRQ */

D11CmdDataRead(D11_READ_LAST_TRANSACTION + D11_ENDPOINT_EP0_OUT, &SetupPacket,
1);
if (SetupPacket.bmRequestType & D11_LAST_TRAN_SETUP) {
The first thing we must do is determine is the packet we have received on EP0 Out is a data packet or a Setup
Packet. A Setup Packet contains a request such as Get Descriptor where as a data packet contains data for a
previous request. We are lucky that most requests do not send data packets from the host to the device. A request
that does is SET_DESCRIPTOR but is rarely implemented.
/* This is a setup Packet - Read Packet */

D11ReadEndpoint(D11_ENDPOINT_EP0_OUT, &SetupPacket);

/* Acknowlegde Setup Packet to EP0_OUT & Clear Buffer*/

D11CmdDataWrite(D11_ACK_SETUP, NULL, 0);
D11CmdDataWrite(D11_CLEAR_BUFFER, NULL, 0);
/* Acknowlegde Setup Packet to EP0_IN */

D11CmdDataWrite(D11_ENDPOINT_EP0_IN, NULL, 0);
D11CmdDataWrite(D11_ACK_SETUP, NULL, 0);
/* Parse bmRequestType */
switch (SetupPacket.bmRequestType & 0x7F) {
As we have seen in our description of Control Transfers, a setup packet cannot be NAKed or STALLed. When the
PDIUSBD11 receives a Setup Packet it flushes the EP0 IN buffer and disables the Validate Buffer and Clear
Buffer commands. This ensures the setup packet is acknowledged by the microcontroller by sending an
Acknowledge Setup command to both EP0 IN and EP0 OUT before a Validate or Clear Buffer command is
effective. The recept of a setup packet will also un-stall a STALLed control endpoint.
Once the packet has been read into memory and the setup packet acknowledged, we being the parse the request
starting with the request type. At the moment we are not interesting in the direction, so we AND off this bit. The
three requests all devices must process is the Standard Device Request, Standard Interface Request and
Standard Endpoint Requests. We provide our functionality (Read Analog Inputs) by the Vendor Request, so we
add a case statement for Standard Vendor Requests. If your device supports a USB Class Specification, then you
may also need to add cases for Class Device Request, Class Interface Request and/or Class Endpoint Request.
case STANDARD_DEVICE_REQUEST:
printf("Standard Device Request ");
switch (SetupPacket.bRequest) {
case GET_STATUS:
/* Get Status Request to Device should return */
/* Remote Wakeup and Self Powered Status */
Buffer[0] = 0x01;
Buffer[1] = 0x00;
D11WriteEndpoint(D11_ENDPOINT_EP0_IN, Buffer, 2);
break;
case CLEAR_FEATURE:
case SET_FEATURE:
/* We don't support DEVICE_REMOTE_WAKEUP or TEST_MODE */
ErrorStallControlEndPoint();
break;
The Get Status request is used to report the status of the device in terms of if the device is bus or self powered
and if it supports remote wakeup. In our device we report it as self powered and as not supporting remote wakeup.
Of the Device Feature requests, this device doesn't support DEVICE_REMOTE_WAKEUP nor TEST_MODE and
return a USB Request Error as a result.
case SET_ADDRESS:
printf("Set Address\n\r");
DeviceAddress = SetupPacket.wValue | 0x80;
D11WriteEndpoint(D11_ENDPOINT_EP0_IN, NULL, 0);
CtlTransferInProgress = PROGRESS_ADDRESS;
break;
The Set Address command is the only command that continues to be processed after the status stage. All other
commands must finish processing before the status stage. The device address is read and OR'ed with 0x80 and

stored in a variable DeviceAddress. The OR'ing with 0x80 is specific to the PDIUSBD11 with the most significant
bit indicating if the device is enabled or not. A zero length packet is returned as status to the host indicating the
command is complete. However the host must send an IN Token, retrieve the zero length packet and issue an
ACK before we can change the address. Otherwise the device may never see the IN token being sent on the
default address.
The completion of the status stage is signalled by an interrupt on EP0 IN. In order to differentiate between a set
address response and a normal EP0_IN interrupt we set a variable, CtlTransferInProgress to
PROGRESS_ADDRESS. In the EP0 IN handler a check is made of CtlTransferInProgress. If it equals
PROGRESS_ADDRESS then the Set Address Enable command is issued to the PDIUSBD11 and
CtlTransferInProgress is set to PROGRESS_IDLE. The host gives 2ms for the device to change its address before
the next command is sent.
case GET_DESCRIPTOR:
GetDescriptor(&SetupPacket);
break;
case GET_CONFIGURATION:
D11WriteEndpoint(D11_ENDPOINT_EP0_IN, &DeviceConfigured, 1);
break;
case SET_CONFIGURATION:
printf("Set Configuration\n\r");
DeviceConfigured = SetupPacket.wValue & 0xFF;
if (DeviceConfigured) {
RB3 = 0;
printf("\n\r *** Device Configured *** \n\r");
}
else {
RB3 = 1; /* Device Not Configured */
printf("\n\r ** Device Not Configured *** \n\r");
}
break;
//case SET_DESCRIPTOR:
default:
/* Unsupported - Request Error - Stall */
break;
}
break;
The Get Configuration and Set Configuration is used to "enable" the USB device allowing data to be transferred on
endpoints other than endpoint zero. Set Configuration should be issued with wValue equal to that of a
bConfigurationValue of the configuration you want to enable. In our case we only have one configuration,
configuration 1. A zero configuration value means the device is not configured while a non-zero configuration value
indicates the device is configured. The code does not fully type check the configuration value, it only copies it into
a local storage variable, DeviceConfigured. If the value in wValue does not match the bConfigurationValue of a
Configuration, it should return with a USB Request Error.
case STANDARD_INTERFACE_REQUEST:
printf("Standard Interface Request\n\r");
case GET_STATUS:
/* Get Status Request to Interface should return */

/* Zero, Zero (Reserved for future use) */

Buffer[0] = 0x00;
Buffer[1] = 0x00;
break;
case SET_INTERFACE:
/* Device Only supports default setting, Stall may be */
/* returned in the status stage of the request */
if (SetupPacket.wIndex == 0 && SetupPacket.wValue == 0)
/* Interface Zero, Alternative Setting = 0 */
else ErrorStallControlEndPoint();
break;
case GET_INTERFACE:
if (SetupPacket.wIndex == 0) { /* Interface Zero */
Buffer[0] = 0; /* Alternative Setting */
break;
} /* else fall through as RequestError */
//case CLEAR_FEATURE:
//case SET_FEATURE:
/* Interface has no defined features. Return RequestError */
default:
break;
}
break;
Of the Standard Interface Requests, none perform any real function. The Get Status request must return a word of
zero and is reserved for future use. The Set Interface and Get Interface requests are used with alternative
Interface Descriptors. We have not defined any alternative Interface Descriptors so Get Interface returns zero and
any request to Set an interface other than to set interface zero with an alternative setting of zero is processed with
a Request Error.
case STANDARD_ENDPOINT_REQUEST:
printf("Standard Endpoint Request\n\r");
case CLEAR_FEATURE:
case SET_FEATURE:
/* Halt(Stall) feature required to be implemented on all
Interrupt and */
/* Bulk Endpoints. It is not required nor recommended on the
Default Pipe */
if (SetupPacket.wValue == ENDPOINT_HALT)
{
if (SetupPacket.bRequest == CLEAR_FEATURE) Buffer[0] =
0x00;
else Buffer[0] =
0x01;
switch (SetupPacket.wIndex & 0xFF) {
case 0x01 : D11CmdDataWrite(D11_SET_ENDPOINT_STATUS
+ \

D11_ENDPOINT_EP1_OUT, Buffer, 1);

break;
+ \
D11_ENDPOINT_EP1_IN, Buffer, 1);
break;
+ \
break;
+ \
break;
+ \
break;
+ \
break;
default : /* Invalid Endpoint - RequestError */
break;
}
} else {
/* No other Features for Endpoint - Request Error */
}
break;
The Set Feature and Clear Feature requests are used to set endpoint specific features. The standard defines one
endpoint feature selector, ENDPOINT_HALT. We check what endpoint the request is directed to and set/clear the
STALL bit accordingly. This HALT feature is not required on the default endpoints.
case GET_STATUS:
/* Get Status Request to Endpoint should return */
/* Halt Status in D0 for Interrupt and Bulk */
switch (SetupPacket.wIndex & 0xFF) {
case 0x01 : D11CmdDataRead(D11_READ_ENDPOINT_STATUS + \
break;
break;
break;
break;
break;

break;
default : /* Invalid Endpoint - RequestError */
break;
}
if (Buffer[0] & 0x08) Buffer[0] = 0x01;
else Buffer[0] = 0x00;
Buffer[1] = 0x00;
break;
default:
/* Unsupported - Request Error - Stall */
break;
}
break;
The Get Status request when directed to the endpoint returns the status of the endpoint, ie. if it is halted or not.
Like the Set/Clear feature request ENDPOINT_HALT, we only need to report the status of the generic endpoints.
Any undefined Standard Endpoint Requests are handled by USB Request Error.
case VENDOR_DEVICE_REQUEST:
case VENDOR_ENDPOINT_REQUEST:
printf("Vendor Device bRequest = 0x%X, wValue = 0x%X, wIndex = 0x%X\n
\r", \
SetupPacket.bRequest, SetupPacket.wValue, SetupPacket.wIndex);
case VENDOR_GET_ANALOG_VALUE:
printf("Get Analog Value, Channel %x :",SetupPacket.wIndex &
0x07);
ADCON0 = 0xC1 | (SetupPacket.wIndex & 0x07) << 3;
/* Wait Acquistion time of Sample and Hold */
for (a = 0; a <= 255; a++);
ADGO = 1;
while(ADGO);
Buffer[0] = ADRESL;
Buffer[1] = ADRESH;
a = (Buffer[1] << 8) + Buffer[0];
a = (a * 500) / 1024;
printf(" Value = %d.%02d\n\r",(unsigned int)a/100,(unsigned
int)a%100);
break;
Now comes the functional parts of the USB device. The Vendor Requests can be dreamed up by the designer. We
have dreamed up two requests, VENDOR_GET_ANALOG_VALUE and VENDOR_SET_RB_HIGH_NIBBLE.
VENDOR_GET_ANALOG_VALUE reads the 10-bit Analog Value on Channel x dictated by wIndex. This is ANDed
with 0x07 to allow 8 possible channels, supporting the larger PIC16F877 if required. The analog value is returned
in a two byte data packet.
case VENDOR_SET_RB_HIGH_NIBBLE:
printf("Write High Nibble of PORTB\n\r");
PORTB = (PORTB & 0x0F) | (SetupPacket.wIndex & 0xF0);
break;

default:
break;
}
break;
The VENDOR_SET_RB_HIGH_NIBBLE can be used to set the high nibble bits of PORTB[3:7].
default:
printf("UnSupported Request Type 0x%X\n\r",SetupPacket.
bmRequestType);
break;
}
} else {
printf("Data Packet?\n\r");
/* This is a Data Packet */
}
}
Any unsupported request types such as class device request, class interface request etc is dealt with by a USB
Request Error.
void GetDescriptor(PUSB_SETUP_REQUEST SetupPacket)

{
switch((SetupPacket->wValue & 0xFF00) >> 8) {
case TYPE_DEVICE_DESCRIPTOR:
printf("\n\rDevice Descriptor: Bytes Asked For %d, Size of Descriptor %d
\n\r", \
SetupPacket->wLength,DeviceDescriptor.bLength);
pSendBuffer = (const unsigned char *)&DeviceDescriptor;
BytesToSend = DeviceDescriptor.bLength;
if (BytesToSend > SetupPacket->wLength)
BytesToSend = SetupPacket->wLength;
break;
case TYPE_CONFIGURATION_DESCRIPTOR:
printf("\n\rConfiguration Descriptor: Bytes Asked For %d, Size of
Descriptor %d\n\r", \
SetupPacket->wLength, sizeof(ConfigurationDescriptor));
pSendBuffer = (const unsigned char *)&ConfigurationDescriptor;
BytesToSend = sizeof(ConfigurationDescriptor);
break;
The Get Descriptor requests involve responses greater than the 8 byte maximum packet size limit of the endpoint.
Therefore they must be broken up into 8 byte chunks. Both the Device and Configuration requests load the
address of the relevant descriptors into pSendBuffer and sets the BytesToSend to the length of the descriptor. The
request will also specify a descriptor length in wLength specifying the maximum data to send. In each case we
check the actual length against that of what the host has asked for and trim the size if required. Then we call
WriteBuffertoEndpoint which loads the first 8 bytes into the endpoint buffer and increment the pointer ready for the
next 8 byte packet.

case TYPE_STRING_DESCRIPTOR:
printf("\n\rString Descriptor: LANGID = 0x%04x, Index %d\n\r", \
SetupPacket->wIndex, SetupPacket->wValue & 0xFF);
switch (SetupPacket->wValue & 0xFF){
case 0 : pSendBuffer = (const unsigned char *)&LANGID_Descriptor;

BytesToSend = sizeof(LANGID_Descriptor);
break;
case 1 : pSendBuffer = (const unsigned char *)

&Manufacturer_Descriptor;
BytesToSend = sizeof(Manufacturer_Descriptor);
break;
default : pSendBuffer = NULL;

BytesToSend = 0;
}
break;
If any string descriptors are included, there must be a string descriptor zero present which details what languages
are supported by the device. Any non zero string requests have a LanguageID specified in wIndex telling what
language to support. In our case we cheat somewhat and ignore the value of wIndex (LANGID) returning the
string, no matter what language is asked for.
default:
break;
}
}
void ErrorStallControlEndPoint(void)
{
unsigned char Buffer[] = { 0x01 };
/* 9.2.7 RequestError - return STALL PID in response to next DATA Stage
Transaction */
D11CmdDataWrite(D11_SET_ENDPOINT_STATUS + D11_ENDPOINT_EP0_IN, Buffer, 1);
/* or in the status stage of the message. */
D11CmdDataWrite(D11_SET_ENDPOINT_STATUS + D11_ENDPOINT_EP0_OUT, Buffer, 1);
}
When we are faced with an invalid request, invalid parameter or a request the device doesn't support, we must
report a request error. This is defined in 9.2.7 of the specification. A request error will return a STALL PID in
response to the next data stage transaction or in the status stage of the message. However it notes that to prevent
unnecessary bus traffic the error should be reported at the next data stage rather than waiting until the status
stage.
unsigned char D11ReadEndpoint(unsigned char Endpoint, unsigned char *Buffer)

{
unsigned char D11Header[2];
unsigned char BufferStatus = 0;
/* Select Endpoint */
D11CmdDataRead(Endpoint, &BufferStatus, 1);

/* Check if Buffer is Full */

if(BufferStatus & 0x01)
{
/* Read dummy header - D11 buffer pointer is incremented on each read */
/* and is only reset by a Select Endpoint Command */
D11CmdDataRead(D11_READ_BUFFER, D11Header, 2);
if(D11Header[1]) D11CmdDataRead(D11_READ_BUFFER, Buffer, D11Header[1]);
/* Allow new packets to be accepted */
D11CmdDataWrite(D11_CLEAR_BUFFER, NULL, 0);
}
return D11Header[1];
}
void D11WriteEndpoint(unsigned char Endpoint, const unsigned char *Buffer, unsigned

char Bytes)
{
unsigned char D11Header[2];
unsigned char BufferStatus = 0;
D11Header[0] = 0x00;
D11Header[1] = Bytes;
/* Select Endpoint */
D11CmdDataRead(Endpoint, &BufferStatus, 1);
/* Write Header */
D11CmdDataWrite(D11_WRITE_BUFFER, D11Header, 2);
/* Write Packet */
if (Bytes) D11CmdDataWrite(D11_WRITE_BUFFER, Buffer, Bytes);
/* Validate Buffer */
D11CmdDataWrite(D11_VALIDATE_BUFFER, NULL, 0);
}
D11ReadEndpoint and D11WriteEndpoint are PDIUSBD11 specific functions. The PDIUSBD11 has two dummy
bytes prefixing any data read or write operation. The first byte is reserved, while the second byte indicates the
number of bytes received or to be transmitted. These two functions take care of this header.
void WriteBufferToEndPoint(void)
{
if (BytesToSend == 0) {
/* If BytesToSend is Zero and we get called again, assume buffer is smaller
*/
/* than Setup Request Size and indicate end by sending Zero Lenght packet */
} else if (BytesToSend >= 8) {
/* Write another 8 Bytes to buffer and send */
D11WriteEndpoint(D11_ENDPOINT_EP0_IN, pSendBuffer, 8);
pSendBuffer += 8;
BytesToSend -= 8;
} else {
/* Buffer must have less than 8 bytes left */
D11WriteEndpoint(D11_ENDPOINT_EP0_IN, pSendBuffer, BytesToSend);
BytesToSend = 0;
}
}
As we have mentioned previously, WriteBufferToEndPoint is responsible for loading data into the PDIUSBD11 in 8
byte chunks and adjusting the pointers ready for the next packet. It is called once by the handler of a request to
load the first 8 bytes into the endpoint buffer. The host will then send an IN token, read this data and the
PDIUSBD11 will generate an interrupt. The EP0 IN handler will then call WriteBufferToEndpoint to load in the next

packet in readiness for the next IN token from the host.
A transfer is considered complete if all requested bytes have been read, if a packet is received with a payload less
than bMaxPacketSize or if a zero length packet is returned. Therefore if the BytesToSend counter hits zero, we
assume the data to be sent was a multiple of 8 bytes and we send a zero length packet to indicate this is the last
of the data. However if we have less than 8 bytes left to send, we send only the remaining bytes. There is no need
to pad the data with zeros.
void loadfromcircularbuffer(void)
{
unsigned char count;
// Read Buffer Full Status

D11CmdDataRead(D11_ENDPOINT_EP1_IN, Buffer, 1);
if (Buffer[0] == 0){
// Buffer Empty
if (inpointer != outpointer){
// We have bytes to send
count = 0;
do {
Buffer[count++] = circularbuffer[outpointer++];
if (outpointer >= MAX_BUFFER_SIZE) outpointer = 0;
if (outpointer == inpointer) break; // No more data
} while (count < 8); // Maximum Buffer Size
// Now load it into EP1_In
D11WriteEndpoint(D11_ENDPOINT_EP1_IN, Buffer, count);
}
}
}
The loadfromcircularbuffer() routine handles the loading of data into the EP1 IN endpoint buffer. It is normally
called after an EP1 IN interrupt to reload the buffer ready for the next IN token on EP1. However in order to send
out first packet, we need to load the data prior to receiving the EP1 IN interrupt. Therefore the routine is also called
after data is received on EP1 OUT.
By also calling the routine from the handler for EP1 OUT, we are likely to overwrite data in the IN Buffer regardless
of whether it has been sent or not. To prevent this, we determine if the EP1 IN buffer is empty, before we attempt
to reload it with new data.
void D11CmdDataWrite(unsigned char Command, const unsigned char *Buffer, unsigned

char Count)
{
I2C_Write(D11_CMD_ADDR, &Command, 1);
if(Count) I2C_Write(D11_DATA_ADDR_WRITE, Buffer, Count);
}
void D11CmdDataRead(unsigned char Command, unsigned char Buffer[], unsigned char

Count)
{
I2C_Write(D11_CMD_ADDR, &Command, 1);
if(Count) I2C_Read(D11_DATA_ADDR_READ, Buffer, Count);
}
D11CmdDataWrite and D11CmdDataRead are two PDIUSBD11 specific functions which are responsible for
sending the I2C Address/Command first and then send or received data on the I2C Bus. Additional lower level
functions are included in the source code but have not been reproduced here as it is the intend to focus on the

USB specific details.
This example can be used with the bulkUSB.sys example as part of the Windows DDK's. To load the bulkUSB.sys
driver either change the code to identify itself with a VID of 0x045E and a PID of 0x930A or change the bulkUSB.
inf file accompanying bulkUSB.sys to match the VID/PID combination you use in this example.
It is then possible to use the user mode console program, rwbulk.exe to send and receive packets from the circular
buffer. Use
rwbulk -r 80 -w 80 -c 1 -i 1 -o 0
to send 80 byte chunks of data to the PIC16F876. Using payloads greater than 80 bytes is going to overflow the
PIC's circular buffer in BANK1.
This example has been coded for readability at the expense of code size. It compiles in 3250 words of FLASH
(39% capacity of the PIC16F876).
Acknowledgments
A special acknowledgment must go to Michael DeVault of DeVaSys Embedded Systems. This example has been based
upon code written by Michael and been effortlessly developed on the USBLPT-PD11 DeVaSys USB development board
before being ported to the PIC.
Downloading the Source Code
Version 1.2, 14k bytes
Revision History
6th April 2002 - Version 1.2 - Increased I2C speed to match that of comment. Improved PDIUSBD11
IRQ Handling
7th January 2002 - Version 1.1 - Added EP1 IN and EP1 OUT Bulk handler routines and made
descriptors load from FLASH
31st December 2001 - Version 1.0.
Chapter 6 : USB Requests Chapter 8 : A Generic USB Driver
The Setup Packet Coming Soon

Standard Device Requests Chapter 8: Generic USB Driver
Standard Interface Requests Chapter 9: HID Class Description and
Standard Endpoint Requests Example
Comments and Feedback?
Comments :
Email Address : Send
(Optional)
Copyright 2001-2007 Craig Peacock, 6th April 2007.

USB1.1 Integrated Circuits and Development Boards
Wednesday, February
13th, 2008
USB1.1 Integrated Circuits & Development Boards
USB 1.1 Full and Low Speed Devices
Cypress Semiconductor
When someone says USB Microcontroller, Cypress normally springs to

everyones mind. No wonder when Cypress has an extensive range of USB
Microcontrollers in both 1.5Mbps, 12Mbps and 480Mbps versions. They have
acquired AnchorChips and it's EzUSB range and last year also acquired
ScanLogic which has helped to prop up their range of USB controllers.
This range starts with the Cypress M8 Series which is predominantly low speed
1.5Mbps controllers for low speed devices such as mice and keyboards. They
have added two full speed devices to the M8 range, the CY7C64013 and the
CY7C64113. More recently they have added a enCoRe range to their books.
CY7C63001
8 Bit RISC Core Harvard Architecture

6 MHz External Clock / 12 MHz Internal
128 bytes of RAM
2K bytes of EPROM (CY7C63000A)
4K bytes of EPROM (CY7C63001A)
I/O Pins have sink current controls (Isink) 4 Bits 16 Levels (Neat!).
Low Speed Device with 1 Control, 1 Generic Endpoint. (8 Byte
FIFO)
20-pin PDIP, 20-pin SOIC, 24-pin SOIC and 24-pin QSOP
Packages
Should you wish to extend to higher speed devices, Cypresss High Speed USB
MCUs requires specialised programmers and development tools that come at
great cost. Cypress is a good start, should your company desire to sink a bit of
money for some nice toys.
http://www.beyondlogic.org/usb/usbhard.htm (1 of 18)13/02/2008 16:35:53

Cypress Semi's EzUSB Series
Cypress Semiconductor brought out Anchor Chip's EzUSB Series. Anchor had
taken initiative in the USB market with some smart features. One of these was
it's Re-numeration(TM) which allows it's processor to operate without ROM,
EPROM or FLASH. It does this by automatically enumerating without firmware
as a "Default Anchor Device". This then allows you to download 8051 code to
the processor, then renumerate with your newly downloaded code. This is not
only a sought after feature during development, but can also be used in the field
as a means of a re-configurable device or having the ability to download the
code each time the device is used to ensure the firmware is up to date.
Extending on this, EzUSB also has the ability to do enumeration in silicon, thus
making your coding of the enumeration process a breeze.
EZ-USB Family (AN21XX)
Renumeration(TM) allows dynamic programming of RAM.

USB Housekeeping functions including enumeration implemented
in Silicon.
Full Speed 12Mbps Device
Enhanced 8051 core.
Available in 80 PQFP and 44 PQFP
Cypress has enhanced the EzUSB series, bringing out the EZ-USB FX Series.
(They have re-introduced the CY7C64xxx part number of course).
EZ-USB FX Family (CY7C646xx)
Renumeration(TM) allows dynamic programming of RAM.

USB Housekeeping functions including enumeration implemented
in Silicon.
Full Speed 12Mbps Device.
32 Enpoints, 14 BULK/INT EP1..7, 16 ISO EP8.15
Four 64 Byte Slave FIFO either 8 or 16 Bits Wide. Transfer up to
96MBytes/s.
Two UARTS.
Three Timer/Counters.
Enhanced 8051 core.
Available in packages from 52 Pin PQFP to 128 Pin PQFP.
USB I2C/IO Interface Board by DeVaSys

Based on the popular Cypress

AN2131QC Ez-USB Controller,
the USB I2C/IO interface provides
a 20 bit user-configurable digital I/
O port, and an I2C interface. What
makes this board unique over
others is it's driver and firmware
support.
DeVaSys has done all the leg

work in a bid you get you up and
running fast. This includes the
AN2131 firmware, a usbi2cio
driver and a .DLL with Visual Basic
and Visual C++ examples. This
allows the ability to write
usermode programs calling the .dll
without the hassle of worrying
about the firmware and device
drivers. DeVaSys provides a well
documented USB I2C/IO API
Users Guide in .pdf format.
However as you progress in your
USB development, you can write
your own firmware and drivers
treating the board as a normal
AN2131.
DeVaSys has released the USB-

I2C/IO Rev-B at the same low cost
but with additional features.
A special thanks to Michael

DeVault from DeVaSys Embedded
Systems for sending out a USB
I2C/IO Interface Board, USBLPT-
PD11 USB development board
(desktop version) and a USBLPT-
PD11D, USB development board
(dongle version) for evaluation.

USBSimm from J Gordon Electronic Design
If you are just starting out in USB and

wish to purchase a cheap
development platform, then I would
suggest looking no further than the
USBSimm from J Gordon Electronic
Design Inc. Based on a Cypress
AN2132QC EzUSB Controller (8051),
it has all the logic on board for USB,
plus is expanded with 32k of External
RAM (AN2132QC contains 8K
internal), Serial EEPROM for storing
the Vendor and Product ID, two serial
ports, I2C amd 16+ I/O Lines. It fits
into a SimmStick Socket and
measures only 3.5 x 2 inches.
If you are then looking for coding

examples, try John Hyde's book USB
by Example. He has some simple
"button and lights" programs
implementing the HID Class Drivers.
If you are a linux developer on the
other hand, try EzUSB2131 Loader
for Linux for a renumeration driver for
linux.
A special thanks to Rob Severson

from J Gorden Electronic Design Inc
for sending a USBSimm my way to
play with.
Microchip
Microchip has been late to enter the market with their USB Microcontrollers.
Based on their popular PIC16x series devices, these USB controllers use
traditional windowed devices for development rather than Flash which is
common among the newer PIC Micro's. Being a low speed device, you would
have to look closely at their feasibility as they don't support Bulk nor

Isochronous transfers and they are UV Erasable instead of Flash. However

these devices are very easy to purchase with both RS and Farnell selling them
in one off quantities. Given the success of Microchip's 16F877/876 series
complete with ICD (In-CIrcuit Debugger) it's possible that a PDIUSBD11 or 12
hanging off ports make it an better option for the time being.
PIC16C745
8k Program Memory
Low Speed 1Mbps USB Device with 6 Endpoints
Five 8 Bit ADC Channels
Universal Synchronous Asynchronous Receiver Transmitter
(USART/SCI)
28 Pin UV erasable CERDIP / One Time Programmable Plastic
PIC16C765
8k Program Memory
Low Speed 1Mbps USB Device with 6 Endpoints
Eight 8 Bit ADC Channels
Universal Synchronous Asynchronous Receiver Transmitter
(USART/SCI)
40 Pin UV erasable CERDIP / One Time Programmable Plastic
Microchip have released details of their future products which is sure to keep
any Microchip follower happy. They are full speed flash devices with support for
the In-Circuit Debugger. While that may be enough to win the hearts of some, I
like the 18Fxxx architecture which means linear program and data memory.
Yes, no more paging!.
PIC18F2X50
Full Speed USB1.1 Device with 16 endpoints and a 512 byte dual
port buffer
Up to 12 MIPs operation. PLL Generates clock from 12MHz Crystal.
5 Channel 10-bit Analog-to-Digital Converter
PIC18F2450 16Kbyte Program Memory, 1kbyte Data Memory
Linear program memory addressing and Linear data memory
addressing
Pinout compatible with PIC16C745 (USB)
Synchronous Serial Port with SPI Master mode and I2C
Master/Slave mode

In-Circuit Debug (ICD) via two pins

28 pin PDIP, SOIC, SSOP
PIC18F4X50
Full Speed USB1.1 Device with 16 endpoints and a 512 byte dual
port buffer
Up to 12 MIPs operation. PLL Generates clock from 12MHz
Crystal.
8 Channel 10-bit Analog-to-Digital Converter
Linear program memory addressing and Linear data memory
addressing
Pinout compatible with PIC16C765 (USB)
Synchronous Serial Port with SPI Master mode and I2C
Master/Slave mode
In-Circuit Debug (ICD) via two pins
40 pin PDIP, SOIC, SSOP
NetChip Technology, Inc
NetChip provides two USB 1.1 peripheral controllers as well as a function

specific NET1031 Single Chip USB Scanner Controller and a NET1080
TurboConnect Single Chip Host to Host Device.
NET2888 TurboUSB Full Speed Programmable Peripheral Controller
TurboUSB is one of NetChip's first USB controllers which has been

shipping in production volume since April 1997.
USB 1.0 / 1.1 Compliant.

Control Endpoint + 4 Fixed Endpoints
EP1 - 8 Byte BULK OUT
EP2 - 8 Byte INT IN
EP1 - 64 Byte BULK/ISO OUT
EP1 - 64 Byte BULK/ISO IN
CPU and DMA Transfers.

3.3V Operating Voltage, 48 MHz Clock.
48 TQFP Package.
NET2890 FlexUSB Full Speed Programmable Peripheral Controller

An upgrade path to the TurboUSB NET2888 is the pin to pin

compatable NET2890 Peripheral Controller. It provides 4
configurable endpoints with the performance of both CPU and
DMA transfers.
USB 1.1 Compliant.

Control Endpoint + 4 Configurable Endpoints with 128 byte
FIFO each.
CPU and DMA Transfers.
Auto Retry of Failed Packets.
3.3V Device with 5V Tolerant I/O, 48 MHz Clock.
48 TQFP Package. Pin Compatible with NET2888.
Motorola
Motorola has had since 1997, the 68HC705JB2, a 20 pin Low Speed USB MCU
based on their popular HC05 Core. However since late 1997, Ive been trying to
source them. . . . Some distributors have a small quantity (5-10) of the OTP
parts, but this is not much good if you cant source a windowed device for
development. Too bad they are Obsolete now. I may try for some
68HC705JB3 / JB4's now . . .
68HC705JB2 Obsolete / Discontinued
Based on Popular HC05 Core

2048 Bytes User ROM
128 Bytes User RAM
Low Speed 1.5Mbps
1 Control (8 Byte FIFO), 2 Interrupt Endpoints
20 Pin PDIP, 20 Pin SOIC Packages
Motorola have just recently extended their MCU range to include a JB3 & JB4.
These are again low speed devices coming in a 20 or 28 pin package. These
are prequalified parts and Motorola should start production of these ICs any
day now. (April/May 1999).
68HC705JB3

2560 Bytes User ROM
144 Bytes RAM
Low Speed 1.5Mbps

1 Control, 2 Interrupt Endpoints

20 Pin or 28 Pin PDIP or SOIC Packages
68HC705JB4

3584 Bytes ROM
176 Bytes RAM
Low Speed 1.5Mbps
1 Control, 2 Interrupt Endpoints
6 Channel, 8 Bit Analog to Digital Converter
28 Pin PDIP, 28 Pin SOIC Package
Philips Semiconductor
Philips has a nice alternative - A add on full speed USB Device. The problem
with low speed USB Devices, is the restriction of transfer modes. A full speed
device can use Isochronous, Control, Interrupt or Bulk transfer modes. A low
speed device is restricted to Control & Interrupt Modes. Therefore by Philip's
making their Serial USB Device Full Speed, even though the I2C interface is
limited to 1Mbps, the designer has the added flexibility of most transfer modes
(except Isochronous on the PDIUSBD11).
Other added advantages are - why waste time learning a new architecture?
With the USB Interface I.C.s you can use your existing designs, existing code
and existing development tools. All you need to do is modify the design to hang
the USB Device of the bus. What could be cheaper?
PDIUSBD11 - USB Interface Device with Serial Interface
I2C Serial Interface (up to 1 Mbit/s)

12 MHz Crystal Oscillator (12 MHz to 48 MHz Clock Multiplier PLL)
Programmable output clock frequency
Full Speed Device 12Mbps
1 Control, 6 Generic Endpoints (8 Bit Max Packet Size)
Available in 16-pin DIP and SO packages
Read our write-up on Using the PDIUSBD11, 11 Pages, 63Kbyte .PDF

File.
Check out our example of a PDIUSBD11 connected to a MicroChip
PIC16F876
PDIUSBD12 - USB Interface Device with Parallel Bus

High-speed Parallel Interface (up to 2 Mbytes/s)

1MByte/s data transfer rate achievable in Bulk mode
1Mbit/s data transfer rate achievable in Isochronous mode
DMA Support
1 Control, 4 Generic (Dependent of Mode)
Integrated 320 bytes FIFO memory - Packet Size 16 Bytes up to
128 with double buffering.
Available in SO28 and TSSOP28 pin packages
There are disadvantages to these devices, namely board real estate. You
wouldnt make a USB Mouse with these chips. However both come in surface
mount devices giving a very small footprint. They are also not intended for self
powered devices.
Im finding the Philip's I.C.s difficult to source. Some of these manufacturers

should look at Maxims Small Credit Card Order Facilities. On other thoughts,
maybe we should encourage Maxim to make a USB Serial Interface Engine!
(23/05/2002 - Maxim has introduced a future product, the MAX3340E/
MAX3341E ESD Protected USB Level Translators.)
Philips also has a USB Transceiver Chip, the PDIUSBP11. This I.C. will convert
USB into a Digital CMOS Serial stream. Couple this with a FPGA or CPLD and
write your own Serial Interface Engine.
PDIUSBP11 - Universal Serial Bus transceiver
Supports 12Mbit/s Full Speed and 1.5Mbit/s Low Speed Serial

Data Transmission
Use with 5v or 3.3v Logic
14-pin plastic SO, SSOP, TSSOP Packages
USBLPT-PD11 USB development board by DeVaSys (Highly

Recommended)

The USBLPT-PD11 consists

of a Philips PDIUSBD11
connected to the Parallel
Port. It allows USB firmware
to be developed and tested
on a PC with the PC's ease
of recompiling code and rich
debugging methods such as
printf statements or
enumeration logs. By
changing a header file or
two, you can recompile the
code ready for programming
into your embedded system.
The ease of use makes it

ideal for anyone starting out,
or wanting to learn about
USB. John Hyde has put
together a paper "Learning
USB by Doing" featuring the
dongle version of this
development board. With
the dongle version only $59
US it makes it a ideal
platform for starting USB.
The USBLPT-PD11 also

comes in extremely handy
when developing device
drivers. Perhaps your
hardware guys can't get
their act together and
provide you with a prototype
so you can start writing the
driver. With the boss
breathing down your neck,
you can start your driver
development by simulating
the hardware. It also allows
you to simulate errors for
testing, something that may
be awkward to do by
constantly burning new

firmware.
A special thanks to Michael DeVault from DeVaSys Embedded Systems for

sending out a USB I2C/IO Interface Board, USBLPT-PD11 USB development
board (desktop version) and a USBLPT-PD11D, USB development board
(dongle version) for evaluation.
HID Compliant Mouse Kit using PDIUSBD12
USBDeveloper.com has a $59US

PDIUSBD12 development board which
connects to the Parallel Port. With the
same principal than the DevaSys board
above, the board allows firmware to be
developed on the PC in a rich
debugging environment (lots of printf's)
frequently not available with many
microcontroller IDEs. When your code
is perfected, it then can be ported to
your desired microcontroller.
USBDeveloper provides sample source
code to mimic a HID Mouse, but the
board can be used for a range of
applications, not just HID. Buy Now.
$59 USD
Philips Semiconductor: On-The-Go
Philips have released the ISP1161 - the world's first single-chip, integrated host
and device controller conforming to the USB Revision 1.1. It has been used by
Philips to demonstrate USB OTG functionallity, but also makes an excellent
host controller for embedded systems such as Linux. See our write-up of the On-
The-Go Supplement - Point-to-Point Connectivity for USB and further details of
this device.
ISP1161 Full-speed Universal Serial Bus single-chip host and device

controller.
Combines a USB Host Controller and USB Device Controller in a

single chip.
Can function as a USB Host only, USB Device Only or both
simultaneously.
Selectable one or two downstream ports for HC and one upstream
port for DC.
Supports single-cycle burst mode and multiple-cycle burst mode
DMA operations.
Built in separate FIFO buffer RAM for HC (4 kbytes) and DC (2462
bytes).
6 MHz crystal oscillator with integrated PLL for low EMI.
USB device functionally simular to the ISP1181.
USB Host Controller registers compatible to OpenHCI although
accessed though two memory map locations.
Available in a LQFP64 package.
FTDI Future Technology Devices International
FTDI specialises in converting legacy peripherals to Universal Serial Bus. They

offer two devices, one is a USB to asynchronous comms (RS-232) interface and
the other a USB to byte wide FIFO. Due to their ease of use, they are not only
useful for upgrading legacy designs but also for new designs. See our detailed
article on these devices, USB with the simplicity of RS-232
FT8U232AM - USB UltraBaud Transfer IC with RS-232/RS422 and CPU I/

F Options
Asynchronous RS-232 from 300 bps to 920Kbps.

RS422/485 to 2000Kbps.
TXD, RXD, RTS, CTS, DTR, DSR, DCD, RI and TXDEN pins @
TTL Logic Levels.
384 byte receive FIFO / 128 byte transmit FIFO.
Integrated 3.3V regulator.
Serial EEPROM interface for programmable VID/PID and strings.
6 MHz Clock.
Sleep and USB Configured outputs - Suitable for Bus Powered and
Self Powered Applications.
32 pin MQFP Package.
No firmware to program. Device runs straight from the self.
Free Virtual Com Port drivers for Windows 98/ME, Windows 2000/
XP, Linux and MAC.
FT8U245AM - Fast Parallel Data Transfer IC

8 bit Parallel Bus input/output

Data rates up to 1Mbytes/sec
D[0..7], RD/WR, RXF (receive buffer full), TXE (transmit buffer
empty)
384 byte transmit FIFO / 128 byte receive FIFO
Integrated 3.3V regulator
6 MHz Clock
32 pin MQFP Package
No firmware to program. Device runs straight from the self.
Free Virtual Com Port drivers for Windows 98/ME, Windows 2000/
XP, Linux and MAC
FT232BM and FT245BM 2nd Generation Devices
FTDI is in the process of announcing their second generation of '232 and

'245 chips which will begin sampling early in Q3, 2002 and cost about the
same than the first generation. Their additional features include,
reduces external component count with Integrated Power On

Reset and RCCLK circuitry
Improved power management control for USB bus powered and
high current devices
Includes a USB Isocronous data transfer mode
Integrated level converter on UART for 5V and 3.3V logic
USB 1.1 and USB 2.0 compatible (Full Speed only)
Add USB in 10 minutes!
If you wish to try these FTDI devices out before committing them to your design,
then you can get prebuilt prototyping modules from Elexol. These modules are
available in both serial and parallel interface versions. This makes them an ideal
USB add on solution for Microchip, AVR and other microprocessors. The serial
version gives you the flexibility of adding it to your existing asynchronous
comms port leaving the parallel I/O ports free or if you need speed, you can use
the USBMOD2 with a parallel interface capable of 1Mbyte/sec. The 32-pin
600mil IC socket profile allows them to be plugged into phototyping boards with
ease.

USBMOD1 USB to TTL Serial

Module.
Single module High-
Speed USB UART

solution
Based on FTDI FT8U232
High-Speed USB UART

IC
32-pin Dual In-Line
Package (Ideal for

prototyping)
Fits into a standard 32-
pin 600mil IC Socket

Provision for external
EEPROM for USB

enumeration data
No external passive
components required
Module powered from
USB bus (up to 60mA

from USB for user
application)
Click here for PDF
DataSheet
USBMOD2 USB to 8bit

Parallel Data Module
Single module High-
Speed USB UART

solution
Based on FTDI
FT8U245 USB FIFO -

Fast Parallel Data
Transfer IC
Standard 32-pin Dual In-
Line Type Package

(Ideal for prototyping)
Fits directly into a
standard 32-pin 600mil

IC Socket or
Breadboard.
On-board Crystal and
All required Passive

Components
EEPROM for custom
USB enumeration data
Module powered from
USB bus with up to
50mA from USB for
user hardware
Click here for PDF
DataSheet
A special thanks to Brenden Ede from Gigatechnology.com for sending out a

USBMOD USB to TTL Serial and USBMOD2 USB to 8 bit Parallel Data module.
They have been an invaluable addition to my toolbox. Not only is it much faster
than prototyping with a MAX232 on prototyping board, it's also USB and works
with both my Windows and Linux Platforms.
Code Mercenaries IOWarrior
The I/O Warrior from Code Mercenaries is a quick and easy way to add USB to
your products without having to understand the USB specification or write
custom firmware and device drivers. Two programmed devices are available, a
24 pin version and a larger 40 pin version, both enumerating as a common HID
device. The unique feature of these devices is the built in support for various
industry standard protocols such as I2C, SPI, HD44780 Alphanumeric LCDs,
RC5 code IR remote controls, matrix scanning of keypads and driving of LEDs.
The manual also comes with details on how to drive relays, LEDs and opto-
isolating inputs and outputs.
IOWarrior 24
USB 1.1/2.0 Low Speed Compatible Device. Full USB HID 1.1
compliance.
16 general purpose I/O pins
Includes I2C Master Interface (750 bytes/sec throughput)
Supports SPI slave devices up to 2MBit/sec.
Supports HD44780 compatible LCD modules.
Includes Receiver for RC5 coded IR remote control.
Can drive LED matrix of 8x32 LEDs.
Software support for Mac, Linux, and Windows.
SDIP24 or SOIC24 Package
IOWarrior 40
USB 1.1/2.0 Low Speed Compatible Device. Full USB HID 1.1

compliance.
32 general purpose I/O pins
Supports HD44780 compatible LCD modules.
Can read a key or switch matrix of 8x8 size.
Can drive LED matrix of 8x32 LEDs.
Software support for Mac, Linux, and Windows.
DIP40 or SSOP48 Package
I/O Warriors can be purchased in I.C. form for quick integration into your
designs. Code Mercenaries also has two development boards for quick
evaluation and phototyping.
USBMicro - U401 USB I/O Interface
The U401 is a simple USB I/O Digital Interface which is SimmStick(TM)

Compatible. It provides 16 I/O lines which can be individually set as inputs or
outputs. It can be used as a interface to SPI devices with an adjustable clock
rate of 62.5 kHz, 500 kHz, 1 MHz, or 2 MHz, or it can be used with LCD panels
and a whole host of other uses. What more, there is no firmware or any device
drivers to write and debug. This allows the U401 to be effortlessly used as an
simple PC interface in the minimal time. The USBmicro Online Development
Notebook gives details of the API.
National Semiconductor
National Semiconductor has the USBN960x series of USB devices which can
be connected up to your micro, just like the Philip's devices could. This gives
you the ability to make your existing microcontrollers talk USB without the need
for a new set of development tools or training in a new architecture. NatSemi
has combined both a serial and parallel interface version into the one I.C., which

makes sense when it comes to needing to stock only the one I.C. for all your
USB projects.
National Semiconductor's devices are normally easier to obtain than Philips

parts and the datasheets are well written, making this option more attractive if
you are having trouble either sourcing Philips ICs or interpreting their
datasheets.
USBN9603/USBN9604 Full Speed Node Controller with Enhanced

DMA Support
Parallel or Serial Microwire/Plus Interface

8 Bit Parallel Interface - multiplexed or non-multiplexed operation
with nCS, nRD, nWR, INTR, nDACK and DRQ control.
Low EMI, 24 MHz Oscillator
Built in 3.3V Regulator (5V or 3.3V operation)
One Bidirectional Control Endpoint 0 (8 bytes) Three Transmit
Endpoints (64 bytes each) Three Receive Endpoints (64 bytes
each)
USBN9604 - Clock generation reset by nReset - Suited for bus
powered designs using CLKOUT
USBN9603 - Clock generation not reset by nReset - Suited for self
powered designs using CLKOUT
Available in a 28-pin SO or 28-pin CSP Package
They also have an older USBN9602. The biggest problem with this part was its
48MHz Oscillator. The Philip's devices at the time used a PLL to generate the
48MHz internal Clock. The result, a cheap 6 or 12Mhz Crystal could be used
helping with the EMC compliance. This part is no longer recommended for new
designs.
USBN9602 USB Full Speed USB Device
8 Bit Parallel / Microwire Plus

48 MHz Oscillator Circuit
One Bidirectional Control Endpoint 0 (8 bytes) Three Transmit
Endpoints (2*32 and 1*64 bytes) Three Receive Endpoints (2*32
and 1*64 bytes)
28-pin SO package
USB 2.0 Integrated Circuits

USB Protocol Analysers
Additional USB Resources
USB in a Nutshell - Introduction to USB

USB in a Nutshell - Hardware
USB in a Nutshell - USB Protocols
USB in a Nutshell - Endpoint Types
USB in a Nutshell - USB Descriptors
USB in a Nutshell - USB Requests
USB in a Nutshell - Enumeration
USB in a Nutshell - Example PIC16F87x and PDIUSBD11
USB Device Driver Development
USB with the simplicity of RS-232. A look at FTDI's FT8U232AM
On-The-Go Supplement - Point-to-Point Connectivity for USB.
ISP1161 Host Controller for Embedded Systems (uClinux).
PDIUSBD11 USB Interface - Extra Data (.pdf)
Win 2000/XP Driver for DeVaSys USBLPT-PD11 USB Boards
USB Driver for the Cypress USB Starter Kit
Universal Serial Bus Home Page (www.usb.org)
USBMan - The Webs #1 USB Help Source
USB Central / USB Complete (Jan Axelson)
USB by Example (John Hyde)
USB Information - Steve Lawther details some more USB MCU's and devices
USB Designer Links - Quite a comprehensive page of links to manufacturers
and products
USB Developer - Information for students and electronics enthusiasts

PortTalk - A Windows NT/2000 I/O Port Device Driver
Wednesday, February 13th,

2008
PortTalk - A Windows NT I/O Port Device Driver
A problem that plagues Windows NT/2000 and

Windows XP, is it's strict control over I/O ports.
Unlike Windows 95 & 98, Windows NT/2000/XP will
cause an exception (Privileged Instruction) if an
attempt is made to access a port that you are not
privileged to talk too. Actually it's not Windows NT
that does this, but any 386 or higher processor
running in protected mode.
Accessing I/O Ports in protected mode is governed

by two events, The I/O privilege level (IOPL) in the
EFLAGS register and the I/O permission bit map of
a Task State Segment (TSS).
Under Windows NT, there are only two I/O privilege levels used, level 0 & level 3. Usermode programs will run in
privilege level 3, while device drivers and the kernel will run in privilege level 0, commonly referred to as ring 0. This
allows the trusted operating system and drivers running in kernel mode to access the ports, while preventing less
trusted usermode processes from touching the I/O ports and causing conflicts. All usermode programs should talk to
a device driver which arbitrates access.
The I/O permission bitmap can be used to allow programs not privileged enough (I.e. usermode programs) the ability
to access the I/O ports. When an I/O instruction is executed, the processor will first check if the task is privileged
enough to access the ports. Should this be the case, the I/O instruction will be executed. However if the task is not
allowed to do I/O, the processor will then check the I/O permission bitmap.
The I/O permission bitmap, as the name suggests uses a single bit to represent each I/O address. If the bit
corresponding to a port is set, then the instruction will generate an exception however if the bit is clear then the I/O
operation will proceed. This gives a means to allow certain processes to access certain ports. There is one I/O
permission bitmap per task.
Accessing I/O Ports under NT/2000/XP
There are two solutions to solving the problem of I/O access under Windows NT. The first solution is to write a device
driver which runs in ring 0 (I/O privilege level 0) to access your I/O ports on your behalf. Data can be passed to and
from your usermode program to the device driver via IOCTL calls. The driver can then execute your I/O instructions.
The problem with this, is that it assumes you have the source code to make such a change.
Another possible alternative is to modify the I/O permission bitmap to allow a particular task, access to certain I/O
ports. This grants your usermode program running in ring 3 to do unrestricted I/O operations on selected ports, per
the I/O permission bitmap. This method is not really recommended, but provides a means of allowing existing
applications to run under windows NT/2000. Writing a device driver to support your hardware is the preferred
http://www.beyondlogic.org/porttalk/porttalk.htm (1 of 7)13/02/2008 16:40:28

method. The device driver should check for any contentions before accessing the port.
However, using a driver such as PortTalk can become quite inefficient. Each time an IOCTL call is made to read or
write a byte or word to a port, the processor must switch from ring 3 to ring 0 perform the operation, then switch
back. If your intentions were to write, for example a microcontroller programmer which is programmed serially using
a parallel port pin, it would make better sense to send a pointer to a buffer of x many bytes. The device driver would
then serialise the data and generate the handshake necessary in the programming of a PIC device.
Such an example is the USBLPTPD11 driver at http://www.beyondlogic.org/usb/usblptpd11.htm. This driver accepts

a buffer of bytes via the IOCTL_WRITE_I2C IoDeviceCall and then big bangs this out in I2C format on a parallel port
pin. The source code for this driver is available and is well worth a look.
The porttalk device driver comes complete with source code. It provides the facility to modify the IO permission
bitmap and/or write and read to I/O ports via IOCTL calls.
Compatibility - Using existing applications under Windows NT/2000/XP
PortTalk can be used in conjunction with allowio to make existing programs that access the I/O ports work under
Windows NT/2000/XP. As you already know, any 32bit program will cause a Privileged Instruction Exception. Many
hacks have been produced for I/O port access under Windows 95 and 98 such as .DLL libraries. Should you need to
run such a program under Windows NT, an exception will occur. Try PortTalk.
16 Bit Windows and DOS programs will run on virtual machines. In many cases existing applications should be
transparent on Windows NT/2000/XP. However others just refuse to run. The virtual machines has support for
communication ports, video, mouse, and keyboard. Therefore any program using these common I/O ports should
run, however there is often a problem with timing. Other MS-DOS programs accessing specific hardware requires
VDDs (Virtual Device Drivers) written to enable them to be used with Windows NT.
The Virtual Machine will intercept I/O operations and send them to a I/O handler for processing. The way the Virtual
Machine does this, is by giving insufficient rights to I/O operations and creating an exception handler to dig back into
the stack, find the last instruction and decode it. By giving the VDM full rights to I/O ports, it has no means of
intercepting I/O operations, thus creating less problems with timing or the need to provide VDDs for obscurer
hardware.
In order to change a processes IOPM, we must first have the process ID for the process we want to grant access
too. This is accomplished by creating the process ourselves, so we can pass the ProcessID to our device driver. An
small application is used which accepts the program name as an argument. This application then creates the
process (i.e. executes the program) which starts and continues as another process in the system.
Note : We can also register a callback with the operating system which notifies our driver of any processes started
and what their ID is. We can then keep a directory of processes that we want to have access to certain ports. When
this process is executed, the callback informs the driver it has started and what it's process ID is. We could then
automatically change the IOPM of this process. See the Process Monitor driver at Process.zip

When a Windows 32 bit program is started using CreateProcess(), it will return the ProcessID for the 32 Bit Program.
This is passed to the Device Driver using an IOCTL Call.
DOS programs do not have their own ProcessID's. They run under the Windows NT Virtual DOS Machine (NTVDM.
EXE) which is a protected environment subsystem that emulates MS-DOS. When a DOS program is called using this
program, it will get the ProcessID for NTVDM.EXE and as a result changes NTVDM's IOPM.
However if NTVDM is already resident (if another DOS Program is running) it will return a process ID of zero. This
doesn't cause a problem if the NT Virtual DOS Machine's IOPM is already set to allow any IO operation, however if
the first DOS program was called from the command line without using "AllowIo", the NTVDM will not have the
modified IOPM.
Windows 3.1 programs will run using WOW (Windows on Win32). This is another protected subsystem that runs
within the NTVDM process. Running a Win3.1 program will return the ProcessID of NTVDM in accordance with the
problem set out above.
When the device driver has the ProcessID, it finds the pointer to process for our newly created program and sets the
IOPM to allow all I/O instructions. Once the ProcessID has been given to our PortTalk device driver, the allowio
programs finishes.
Running a DOS/Win 3.1 program normally under NTVDM.EXE should not create any major problems. NTVDM will
normally intercept most IO calls and check these resources against the registry to make sure they are not in use.
Should they be in use, a message box will pop as simular to the one shown here, giving the user the option to
terminate the program or ignore the error. If the user chooses to ignore the error, access will NOT be granted to the
offending I/O Port.
However using PortTalk to remove all I/O Protection will grant the application full rights to any port. As a result if it
wants to talk to your mouse on COM1, it will. Result - Your mouse freezes. Using this program should be done at the
discretion of the informed and educated user. If not, system instability will result. One solution to this problem is to be

selective to what ports you allow full access too.
Calling your application using
C:\>allowio Test.exe /a
will grant test.exe exclusive access to all ports. However if you use,
C:\>allowio Test.exe 0x378
this will grant test.exe access only to 0x378 to 0x37F. As one byte represents 8 port addresses and that most
devices will use a bank of 8 or 16 addresses, you need not specify every port address, only one port in the 8 byte
boundary. Thus 0x378 will grant test.exe access to LPT1, including the data, status and control registers.
Starting and installing the driver
In most cases, the PORTTALK.SYS driver isn't required to be explicitly installed. When running the usermode
executable such as allowio.exe, it will check for the device driver and if it cannot be opened, it will install and start the
driver for you. However for this to happen correctly, the PORTTALK.SYS driver must be in the same directory than
the usermode executable ran and the user must have administrator privileges. Once the driver has been installed for
the first time, any user with normal user privileges can access the device driver normally. This is ideal in classroom/
corporate environments where security is paramount.
The driver can also be installed manually using the registry file included. Copy the PORTTALK.SYS to your /
system32/drivers directory and click on the PORTTALK.REG file to load the required registry keys. Then reboot the
computer and on boot-up the PORTTALK.SYS driver will load and start automatically. This is recommended for
classroom/corporate use where the driver can be stored away securely in the system directory.
Checked and Free Driver Versions
Two versions of the driver exist. The standard distribution is a free compiled version which has debugging
statements removed and thus execute faster. However when writing your own code, or debugging problems such as
buffer overuns, a checked version of the driver is provided which displays debugging. These debug messages can
be read with any good debug viewer. One such recommended viewer is the System Internals DebugView which can
be downloaded from their website (http://www.sysinternals.com) for free.
The checked build of the driver is provided in the checked folder of the distribution. Simply replace the PORTTALK.
SYS with this driver and reload to display debug information.
Recompiling the code
The code for the device driver has been compiled using Microsoft Visual C and the Windows 2000 DDK. The source
code is provided, but during the normal development cycle it is not required to be recompiled. It has also been built
for testing purposes on the Windows XP DDK which includes build tools and is no longer dependent on Microsoft
Visual C being installed. (Excellent for Borland Folks)
Manipulating the IOPM (I/O Permission Bitmap)
Changing the IOPM within your Kernel Mode Drivers requires the knowledge of a couple of undocumented calls.
These are Ke386IoSetAccessProcess, Ke386SetIoAccessMap and PsLookupProcessByProcessId.

PsLookupProcessByProcessId(IN ULONG ulProcId,OUT struct _EPROCESS **

pEProcess);
The IOPM routines use a Pointer to Process and not the ProcessID. Therefore our first task is to convert the
ProcessID to a Pointer to Process. There are documented calls such as PsGetCurrentProcess(), however we don't
want the current process but rather the pointer to process of the process we wish to grant access to. This information
is passed to the driver in the form of a processID. We must then use the undocumented call
PsLookupProcessByProcessId to convert our ProcessID to a Pointer to Process.
Once we have a Pointer to Process we can start manipulating the I/O permission bitmap using the following
undocumented calls
void Ke386SetIoAccessMap(int, IOPM *);

void Ke386QueryIoAccessMap(int, IOPM *);
void Ke386IoSetAccessProcess(PEPROCESS, int);
Ke386SetIoAccessMap will copy the IOPM specified to the TSS. Ke386QueryIoAccessMap will read it from the TSS.
The IOPM is a 8192 byte array specifying which ports are allowed access and which ones aren't. Each address is
represented by one bit, thus the 8192 bytes will specify access up to 64K. Any zero bit will allow access, while a one
will deny access.
After the IOPM has been copied to the TSS, the IOPM offset pointer must be adjusted to point to our IOPM. This is
done using the Ke386IoSetAccessProcess. The int parameter must be set to 1 to enable it to be set. Calling the
function with zero will remove the pointer.
Talking to the Device Driver - User Mode APIs
PortTalk also has IOCTLs to allow reading and writing to I/O Ports. In this case, your usermode program would open
the PortTalk device driver and pass data to the driver through IOCTL calls. The driver then talks to the I/O port(s) in
ring 0.
The Porttalk driver contains two IOCTL calls to read from and write to I/O Ports. A c source file, pt_iotcl.c can be
used to provide easy support based on the popular inportb/outportb and inp/outp calls supported in earlier
programming environments. By simply including pt_ioctl.c and calling OpenPortTalk when you program starts and
ClosePortTalk when your program finishes you can have the functionality of the inportb/outportb and inp/outp calls.
#include
#include
#include
void __cdecl main(void)

{
unsigned char value;
printf("IoExample for PortTalk V2.0\nCopyright 2001 Craig Peacock\nhttp://www.
beyondlogic.org\n");
OpenPortTalk();
outportb(0x378, 0xFF);
value = inportb(0x378);
printf("Value returned = 0x%02X \n",value);
outp(0x378, 0xAA);
value = inp(0x378);
printf("Value returned = 0x%02X \n",value);

ClosePortTalk();
}
The sample program above is included in the IoExample directory along with the pt_ioctl.c. The pt_ioctl can be used
as an example of how to load and open the driver and then make IOCTL_WRITE_PORT_UCHAR and
IOCTL_READ_PORT_UCHAR calls.
Downloading the Source, Drivers and Usermode Programs
Version 2.2, 67K bytes
Revision History
6th April 2002 - Version 2.2.
Fixed a debug message typo in the IoExample.
13th January 2002 - Version 2.1, tested on Windows 2000 SP2 and Windows XP RTM.
Added uninstall.exe to deal with older V1.x versions of PortTalk.
12th January 2002 Version 2.0, tested on Windows 2000 SP2 and Windows XP RTM.
Self installs driver for ease of use.
Improved type checking.
Distributed with IoExample code showing use of inportb/outportb() inp/outp() macros and IOCTL
calls.
6th September 2001 Version 1.02

Fixed .reg file after previous fix broke Windows 2000 Support. Now supports Windows NT/2000/
XP.
26th June 2001 Version 1.01

Fixed .reg file to support both Windows 2000 and Windows NT4.
13th March 1999 Version 1.0 first public release for Windows NT4.
Important information for upgrading from PortTalk V1.x
When installing PortTalk V2.x on machines with an older version of V1.x, the existing driver must be un-installed.
Simply run the uninstall.exe contained within the PortTalk package with administrator privileges. After the old driver
has been removed, running allowio.exe or IoExample.exe will detect the absence of PortTalk and re-install the new
driver.
Additionally, the driver can be removed manually. This is only recommended for advanced users. Either
Replace your old porttalk.sys with the new version and reboot.
Delete the HKEY_LOCAL_MACHINE\system\currentcontrolset\services\porttalk key and reboot.
Use the Windows NT Device Driver Installer to stop and remove the PortTalk Driver.
References
Microsoft Windows NT Device Driver Kit

Microsoft Win32 SDK
Intel Architecture Developers Manual - Basic Architecture, Order Number 243190.
Intel Architecture Developers Manual - Instruction Set Reference Manual, Order Number 243191.
Intel Architecture Developers Manual - System Programming Guide, Order Number 243192.

Copyright 1999-2007 Craig Peacock - 6th April 2007.

USB 2 Integrated Circuits
Wednesday, February
13th, 2008
Universal Serial Bus Specification Rev. 2.0

With USB 1.1, there were two Host Controller Interface Specifications, the UHCI
(Universal Host Controller Interface) developed by Intel and the OHCI (Open Host
Controller Interface) developed by Compaq, Microsoft and National Semiconductor.
With the introduction of USB 2.0 a new Host Controller Interface Specification was
needed to describe the register level details specific to USB 2.0. The EHCI (Enhanced
Host Controller Interface) was born which at the time of writing is at revision 1.0.
Significant contributors include Intel, Compaq, NEC, Lucent and Microsoft so it would
hopefully seem they have pooled together to provide us one interface standard and
thus only one driver to implement in our operating systems.
Both XP and Windows 2000 USB 2.0 drivers should be available from the Windows
Update site. However if you don't have a USB 2.0 card installed, it will not appear on
the site (Windows Update searches your PCI bus for the VID/PIDs). Corporate IT Staff
or developers who wish to copy it to multiple computers may download the driver from
Corporate Windows Update site.
In the Linux camp, David Brownell and crew have been busy implementing EHCI.
Monday the 14th of January 2002 saw the release of the 2.5.2 linux kernel which has
USB 2.0 support built in. Once again Linux has support before Windows.
USB 2.0 High Speed Devices
Philips Semiconductor
Philips semiconductor has two USB 2.0 compliant devices in development at the
present moment. One is a USB transceiver, while the other is a USB function device.
ISP1581 Universal Serial Bus 2.0 High Speed Interface Device
http://www.beyondlogic.org/usb/usbhard2.htm (1 of 12)13/02/2008 16:40:44

Philips have scared many off with their ISP1581. At one stage their
website indicated this was a discontinued product, however Wei Leong
Chui (Marketing Manager) from Philips Semiconductor advises us that this
isn't the case. In fact this part is all well and is now in production. Samples
are available from your local Philips distributor.
What makes this product neat over its competitors is the easy bus
interfacing and separate DMA / control buses. The ISP1581 has two
modes of operation, Generic Processor mode and Split Bus Mode. In
Generic Processor Mode it uses AD[7:0] as an address bus and DATA
[15:0] as a 16 bit data bus shared by both the processor and DMA. The
device has all the standard CS, ALE, R/W, RD, DS, WR pins so it can be
mapped into memory on both Intel and Motorola style buses. In Split bus
mode, the processor can control the device using AD[7..0] as a
multiplexed data/address bus and use the DMA bus as a totally separate
and independent bus to transfer data to and from the FIFOs.
Fully compliant with the USB Specification Rev. 2.0, with fall-back to
USB 1.1
High Speed DMA Interface block
14 programmable USB endpoints with 2 fixed control IN/OUT
endpoints
Integrated 8KB FIFO memory
Software controlled connection to the USB bus (SoftConnect)
Low Speed 12MHz External Crystal
3.3V device with 5 V tolerant I/O pads.
Suitable for a Bus Powered Designs with on board 3.3V Regulator.
Memory like interface for control - AD[0..7], CS, ALE, R/W, RD, DS,
WR.
Separate 16 Bit Data Bus and associated DMA Signalling.
Two types of Generic DMA transfer and three types of IDE-specified
transfer - Generic DMA Slave mode; Generic DMA Master mode;
PIO mode for IDE transfers; Multiword DMA mode for IDE transfers
and Ultra DMA mode for IDE transfers
Available in LQFP64 package.
ISP1501 Universal Serial Bus 2.0 Peripheral Transceiver
USB2.0 with Legacy compliant USB 1.1 full-speed transceiver

interface
Integrated Parallel-to-Serial Converter, Bit Stuffing and De-Stuffing,
DPLL and NRZI Encoding and Decoding
LQFP48 Package

USBDeveloper.com's ISP1581 Evaluation Kits
USBDeveloper.com has two ISP1581

development boards to help with ISP1581
firmware and hardware development. The $99
US ISP1581 Generic Kit (pictured right) attaches
to the parallel port allowing firmware to be easily
developed and debugged before being ported to
your embedded microcontroller. A PLCC socket
is provided for an optional 8051 if you wish to
target this MCU. Also on-board is 128Kbytes of
SRAM enabling the testing of ISP1581 DMA
transfers. Buy Now. $99 USD
The ISP1581 Bulk only Mass Storage Kit is

ideal to kick start your Mast Storage Device
development. It comes with the
development board (pictured left) which
contains a ISP1581 USB2.0 Interface IC
and IDE Header, USB Firmware and source
code to drive the ISP1581 via the parallel
Port and a user manual clearly explaining
the Bulk-only Mass Storage Protocol. For
more information on either of these boards
see http://www.usbdeveloper.com (Wei
Leong Chui)
Buy Now. $120 USD
Cypress Semiconductor
Cypress Semiconductor currently has two USB 2.0 offerings, the FX-2 and SX-2. One
includes a 8051 Microcontroller while the other is a DMA slave device designed to
connect to a microprocessor or DSP. Cypress is well known for its re-numeration
feature allowing USB devices with no firmware to enumerate as a default device, have
code downloaded to it from the host and then re-enumerate as a different device
executing the code freshly downloaded to it. It also provides enumeration in silicon,
allowing the developer to code the interesting bits. . .

CY7C68013 EZ-USB FX2
The FX2 is a enhanced 8051 with re-numeration. It has 8kB of RAM on

chip for soft loading of your program, but no ROM or FLASH. The device
uses DMA to transfer data internally allowing it to reach burst data rates of
96Mbytes in and out of the device.
Enhanced 8051 controller running at 12, 24 or 48 MHz

Capable of 96 MBytes Burst Data Rate
7 endpoints with a 512Byte maximum bulk endpoint and 1024Byte
Maximum Isochronous Endpoint Size
8kB of RAM
56 SSOP/100 TQFP/128 TQFP Packages
CY7C68001 EZ-USB SX2
The SX2 loses the 8051 in favour for becoming a slave device controlled
by your DSP or microcontroller in a language and design environment that
you are familiar with. It continues the EZ-USB tradition of silicon
enumeration allowing the SX2 to read its Product and Vendor IDs plus its
descriptors from serial EEPROM (up to 1KB) on power up. This allows the
device to enumerate all chapter 9 descriptors without need of interrupting
the master processor. It has a on-board I2C master device which is used
to connect to the serial EEPROM on boot-up and can be used under
control of your host after bootup and initialisation making it ideal for digital
image sensors and other devices running on a I2C bus.
Unlike the Philips ISP1581, the SX2 has three address pins to select
FIFO2/4/6/8 or command operation and a 8/16-bit data bus shared for
command and FIFO Data. Advanced information would also suggest it is
missing an on board 3.3V regulator thus requiring external circuitry if used
as a bus powered device. Never the less, the silicon numeration continues
to put this device on the favourite list for many.
USB Serial Interface Engine Slave Device

High-speed (480 Mb/s) or Full-speed (12 Mb/s) support
8 / 16 bit data bus
5 Endpoints, 512 byte maximum bulk endpoint, 1024 byte maximum
Isochronous Endpoint
4KByte FIFO
I2C Bus Master Controller (100 KHz or 400KHz)
3.3v Operation, 24MHz External Crystal
External processor can control I2C Master

56 SSOP Package
Advanced Information 497kb
Opal Kelly's XEM3001 FPGA experimentation with High Speed USB 2.0
Interface
The XEM3001 FPGA

experimentation board
from Opal Kelly
combines a
reconfigurable Xilinx
FPGA with a high
speed USB 2.0
interface and plenty of
easily accessible I/O.
Bundled free with each
Opal Kelly
development board is
their innovative "Front
Panel" software which
not only serves as a
quick way of
downloading your
configuration files, but
also helps you debug
your design by
providing a easily way
to create front panel
dialogs with no effort
at all.
Xilinx Spartan 3
FPGA
(XC3S400)
High Speed
USB 2.0 Port
using Cypress
CY68013 FX2
USB
microcontroller
Bus-powered
(self-powered
capable).
On Board Clock

Generator (1
MHz to 150
MHz)
Three 0.1"
headers giving
access to 90
FPGA I/O lines
including 4 clock
inputs
Includes 8 SMD
LEDs and 4
Tactile switches.
JTAG header
included.
Complete with
driver, powerful
C++ class
library (and
Python wrapper)
and FrontPanel
programmers
interface (API)
Business-card
sized 3.5 x
2.0 (88.9mm x
50.8mm).
Bitwise System's QuickUSB Home of the Hi-Speed USB Module That

Makes USB a Snap!
This High Speed USB 2.0 board is

a great solution to quickly add fast
480Mbps USB functionality to your
design. It has a mini high density
SMD 80 pin connector (Hirose FX8-
80S-SV) on underside of the board
which makes it easy to add this
board to your designs without
having to worry about USB 2.0
controlled impedance transmission
lines, firmware and device drivers.
Cypress CY7C68013-128AC
EZ-USB FX2 Controller

80 Pin I/O connector

consisting of :
One 8 or 16-bit high-
speed parallel port,

sustained data rate of
up to 12 MB/s and a
burst rate of up to
48MB/s (for packets
512 bytes)
Up to three general-
purpose 8-bit parallel I/

O ports
Two RS-232 ports (RS-
232 Signalling Levels)

One I2C port
One soft SPI port or
FPGA configuration
port
Complete with driver, DLL
and C library
Small 2" x 1.5" Circuit Board.
Cesys Spartan-II FPGA board with Cypress FX-2 USB 2.0 High Speed
Interface
If you need to prove a High

Speed USB 2.0 design in a
hurry, look no further than
Cesys's Xilinx Spartan-II
FPGA board with the Cypress
FX-2 Controller. The FX-2 is
connected to the FPGA via the
GPIF interface allowing fast
FIFO access and the generous
96 pins of I/O will ensure this
board is not the cause of your
data bottlenecks.
Xilinx XC2S200-
5PQ208C Spartan II
FPGA.
1 Mbyte 15nS SRAM
accessible from the

FPGA.
Cypress EZ-USB FX2
2.0 Full Speed USB
Controller with GPIF
connection to FPGA.
128 kBytes RAM
connected to USB FX-2
Controller.
User programmable
clock from 1MHz to 250
MHz.
Generous 96 pin I/O.
USBee EX 2.0 Experimenter's Board for USB 2.0 High Speed

Development
Designed as a platform for

teaching USB 2.0, this little
board is ideal for students.
Cypress EZ-USB
FX2 2.0 Full Speed
USB Controller.
11 Pin Data
Connector (8 Data
Bits, R/W, Clk and
GND).
3 Pin Power
Connector (+5V,
+3.3V and GND).
1.25" x 2.0" Size with
Mini USB Connector.
NetChip Technology, Inc
Netchip Technology has two USB 2.0 peripheral controllers which can connect to many
microcontroller, microprocessor or DSP systems without any additional glue logic. The
NET 2280 is a USB 2.0 peripheral device with a PCI 2.2 compliant bus. The NET 2270
on the other hand is a smaller 16 bit peripheral housed in a 64 pin TQFP and has a
simpler core without Auto-Enumerate.

Netchip continues to produce excellent documentation for their controllers. They

provide a DMA split bus simular to that of the Philips ISP1581 allowing a DMA
controller / FPGA to feed data in on the DMA bus while at the same time allowing the
microcontroller to send commands and data on the dedicated local CPU bus. They also
provide direct and indirect addressing allowing the CPU to directly address 32
configuration registers or indirectly address them through a REGADDRPTR and
REGDATA register requiring only one address line and two memory locations.
NET2270 16-Bit Programmable USB 2.0 Peripheral Controller
Diagnostic register allows forced USB errors.

AutoRetry of failed packets.
Three Configurable Endpoints + Endpoint 0 with two 1K bytes
double-buffered FIFOs
8 or 16-bit local bus transfers with Dual Channel DMA Support.
Big or little Endian support.
Bus or self powered modes.
3.3V operating voltage, 30 MHz oscillator with internal PLL.
64-pin TQFP package.
NET2272 16-Bit Hi-Speed USB 2.0 Programmable Peripheral Controller
Simplified Software Development with Automatic retry,

AutoRetryTM, of failed packets and Software disconnect, Simulated
DisconnectTM.
Three 1K bytes double-buffered FIFOs, Dynamic Virtual
EndpointTM Technology allows up to 30 independent data streams
Generic 8 or 16-bit local bus transfers with Dual Channel DMA
Support.
Big or little Endian support.
Bus or self powered modes.
2.5V and 3.3V operation with 5V tolerant I/O, 30 MHz oscillator with
internal PLL.
64-pin TQFP package.
NET2280 PCI Hi-Speed USB 2.0 Programmable Peripheral Controller
The Netchip NET2280 PCI Hi-Speed USB 2.0 Programmable Peripheral

Controller is designed for peripherals containing a PCI bus such as
Printers, Embedded single board computers, Set top boxes or PCI
conversion adaptors.
Hi-Speed USB 2.0 (480Mbps)

PCI 2.2 compliant, 32 bit 33 MHz version in both bus mastering or

slave modes
4 Kbyte double-buffered, selectable FIFO IN/OUT Memory
Built in high performance 8051 CPU and 8kB program memory
Four channel DMA controller
120-pin TQFP package
High Speed USB 2.0 IP Cores
Another increasingly popular solution is to integrate the USB 2.0 SIE (Serial Interface
Engine) into a FPGA. However with USB's High Speed signalling running at a
differential 480Mbps, a transceiver is required to convert this signal into a TTL/CMOS
signal your FPGA can handle. To standardise high speed transceivers and allow
portability between transceiver vendors and IP Core vendors, a USB Transceiver
Macrocell Interface (UTMI) Specification was produced.
UTMI Specification
USB 2.0 Transceiver Macrocell Interface, version 1.05(UTMI) specification
(PDF, 415 Kb)
USB 2.0 IP Cores

OpenCores.org USB 2.0 Function Core
USB 2.0 Transceivers

Agere Systems (Lucent) USS2X1, USS2X1W USB 2.0 UTMI 8-Bit and 16-
Bit PHY Chips

Kawasaki KL5KUSB200/201 USB2.0 Transceiver
Philips Semiconductor ISP1504, ISP1505 and ISP1506
SMSC GT3100 USB 2.0 Transceiver Macrocell
Tearing your hair out with High Speed Design?
With USB's high speed differential bus and highly complex protocol, what do you do
when you want to monitor what is going on between your device and the host? Have
you spent days on end hitting your head against the wall? What you need is a USB
Protocol Analyser.
Most developers are now thinking this must be expensive. But at what cost do you
value a days trial and error when you can't see exactly what is going on. Perhaps the
tension is building between the software engineer and the firmware engineer, neither
will admit the problem lies with their end.

Ellisys with their hugely popular USB Tracker has come to the rescue of USB 2.0 High
Speed developers with the USB Explorer 200.
Ellisys USB Explorer 200 New Release

Supports Low Speed (1.5Mbits/s), Full Speed
(12Mbits/s) and High Speed (480Mbps)

Measurement of USB bus states and low level
protocols
Device Bus Powered. No need for external
adaptor.
Speedy USB2.0 Uplink with Internal 32MB FIFO
Memory.
Intutive, Easy to use Interface.
High level decoding of requests and descriptors,
making diagnosing problems a breeze.

Filtering and Highlighting of Events.
Dimensions: 150 x 120 x 65 mm, Weight 850g.
3,470 Swiss Francs (~$2600 USD) and includes
a 2 years of limited warranty.
USB in a Nutshell - Introduction

USB Device Driver Development



Universal Serial Bus Device Driver Development
Wednesday, February
13th, 2008
Trace System's HID Maker
The HIDMaker from Trace System's Inc helps to quickly create in seconds both the
firmware for your HID device and a GUI application program for your Host.
Supporting a varity of development environments on the PC including Visual Basic,
Delphi, and C++ Builder, the HID Builder can be used in conjunction with your
Microchip PIC16C745/765, NatSemi USBN9603/4 connected to a PIC16F877 or
PIC18F452 and the new 18F2550 as soon as Microchip releases these parts to the
market. Firmware can be produced in a range of enviroments including PicBasic
Pro, MPASM, Hi-Tech C, and CCS C.
Trace System's HID Maker Test Suite
Retailing at $149 USD, the HID Maker Test Suite comes with USBWatch and
AnyHID. USB Watch is a software based product which allows the developer to see
what is being sent or received from your USB device even during enumeration.
AnyHID on the other hand can interrogate any HID device regardless of if you wrote
it or not. It can display information about the devices and allows you to effortlessly
get and send reports to test the device. AnyHID comes with full source code in VB,
Delphi, and C++ Builder.
Microsoft Windows Device Driver Kits (DDK)
Microsoft provides Device Driver Kits for all of it's operating systems which includes
example USB device drivers. The Windows 98 and Windows 2000 DDK's is
available for download from www.microsoft.com/ddk. The Windows XP DDK is only
available through MSDN registration or by ordering a copy on CDROM. All the
DDKs except XP requires Visual C to be installed. The windows XP DDK includes
build tools alleviating the need to have a compiler installed.
The DDK's include two USB driver examples, the BulkUSB and IsoUSB plus a USB
filter driver and a USBView utility. Early Win98/ME and Win2K examples are
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plagued by bugs, thus it is recommended you use the WinXP DDK as a foundation
for your new drivers.
Microsoft XP SP1 DDK
Microsoft Windows 2000 DDK
Microsoft Windows 98 DDK
Jungo Ltd
Have you taken one look at the Microsoft DDK and said this is not for me, let your
boss is still waiting for your driver? Don't give up, Jungo has two products to help
you. WinDriver allows you to develop USB drivers in user mode with no knowledge
of DDKs or kernel mode architecture. If on the other hand you have a little kernel
mode experience, but find it takes weeks if not months to write your driver then the
Jungo KernelDriver may be for you. It produces driver templates which can be
modified and compiled with Visual C and the Microsoft DDKs.
Jungo WinDriver
Develop high-performance device drivers in user mode.

No DDK knowledge or kernel level development required.
Supports Windows 95, 98, Me, NT, NT Embedded, 2000, XP, Windows CE,
Linux, Solaris and VxWorks
Write drivers for USB1.1, USB2.0, PCI, CardBus, CompactPCI, ISA, EISA,
ISA-PnP and PCMCIA
Wizards for hardware detection, diagnostics and automatic code generation.
Creates an INF file for installing your device drivers.
Shorter development cycle thus faster time to market.
Ability to run performance critical parts of your driver in kernel mode.
Jungo KernelDriver
Develop high-performance device drivers in kernel mode.

Supports Linux, Windows 95, 98, Me, NT, 2000 and XP.
Test hardware in usermode without writing a line of code. Excellent to test
new hardware from the engineers before pulling your hair out on the drivers.
Creates a shorter development cycle thus faster time to market.
Test your hardware through a graphical user mode application, without having
to write a line of code.
Does not limit access to native DDK calls.

USB Snoopy Pro
When it comes to debugging your USB device drivers or monitoring what other USB
device drivers are doing, USB Snoopy Pro is a free utility certainly worth
downloading. USB Snoopy Pro consists of a user mode program and filter driver
which can be attached to various USB drivers displaying the IRPs passing down to
the lower drivers.
USB Snoopy Pro-0.20 (296kb)
USB in a Nutshell - Introduction to USB

USB Information - Steve Lawther details some more USB MCU's and devices
USB Designer Links - Quite a comprehensive page of links to manufacturers and
products
Copyright 1999-2005 Craig Peacock - 10th November 2005.


2008
With USB's differential bus and highly complex protocol, what do you do when you want to monitor what is
going on between your device and the host? You can't just grab the digital storage oscilloscope and probe
around like you could with less complex traditional serial buses. What you need is a USB Protocol Analyser.
Most developers are now thinking this must be expensive. Yes, many are. But at what cost do you value a
days trial and error when you can't see exactly what is going on. Perhaps the tension is building between the
software engineer and the firmware engineer, neither will admit the problem lies with their code.
While there are the more known players such as CATCs or Catalyst Enterprises, Ellisys had captured the
market with the very functional and easy to use, "USB Tracker" supporting the analysis of low and full speeds.
Just recently, they have built on the great success of the tracker with the Ellisys USB Explorer 200 which now
supports high speed 480Mbps, yet still at an very affordable price.
Ellisys USB Explorer 200

Supports Low Speed (1.5Mbits/s), Full Speed (12Mbits/s) and
High Speed (480Mbps)

Measurement of USB bus states and low level protocols
Device Bus Powered. No need for external adaptor.
Speedy USB2.0 Uplink with Internal 32MB FIFO Memory.
Intutive, Easy to use Interface.
High level decoding of requests and descriptors, making
diagnosing problems a breeze.

Filtering and Highlighting of Events.
3,470 Swiss Francs (~$2600 USD) and includes a 2 years of
limited warranty.
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Ellisys USB Tracker 110 Highly Recommended
Supports Low Speed (1.5Mbits/s) and Full Speed (12Mbits/s)

Unlimited capture time.
USB2.0 Uplink (Backwards compatible with 1.1).
Device Bus Powered. No need for external adaptor.
Power and Activity LEDs. Activity flashes green on receipt of DATA0/1
packet but not captured and red if captured.
Realtime statistics during capture.
Filtering and Highlighing of Events.
1,170 Swiss Francs (~$850 USD) and includes a 2 years of limited
warranty.
The 1.2MB accompanying software installs like a treat and is quite intuitive to use. The events are stored in
an expandable table which makes it easy to navigate hundreds and thousands of events, something that
some competitors more graphical software solutions lacks. The details tab on the right by default only shows
the more important and frequently used fields, helping cut down on cutler and information overload.
The software provides the normal filtering one would expect plus the option of "colouring" (in pascal colours
off course) transactions via endpoints numbers. Any possible breaches of the specification comes up with a
little yellow exclamation mark and the field in red. This quickly helps weed out possible problems with
descriptors etc.
The Software is free which allows others in your organisation to display captured results. It comes with a
couple of demonstration logs including a camera, memorystick and mouse captures. If you are in the market

for an Analyser we recommend you take a minute to download the Ellisys USB show software and see just
what it offers you. I don't believe you will be disappointed.
The USB tracker from Ellisys opens up these powerful tools to the smaller developers who were previously
priced out of the market. While it doesn't do Inrush Current, or Signal Integrity, Skew, Jitters Measurements
etc like the more pricey units it does provide a range of functionality which should help get your next project
out to market quicker.
Another low cost USB Protocol Analyzer is the USB Viewer from USB Developer.com.
USB Developer.com's USB Viewer

Supports Low Speed (1.5Mbits/s) and Full
Speed (12Mbits/s)
USB2.0 Uplink (Backwards compatible
with 1.1).
Device Bus Powered. No need for
external adaptor.
Power and Activity LEDs.
Ability to trigger on PIDs such as Setup,
In, Out, Data0 etc.

Graphical Representation of Data.
128kbyte FIFO Memory.
Download demo software to try before
you buy here.

Buy Now. $950.00 USD

Once again the software is available for download so you can try it out before you buy. The shrink view allows
the user to quickly determine the position of data in amongst SOF etc.
Other Standalone USB Protocol Analysers (Don't require connection to logic Analyser etc)
Ellisys USB Explorer 200

Ellisys USB Tracker 110
USBDeveloper's USB Viewer
FuturePlus Systems FS4120 (USB 2.0 and 1.1)
CATC Inspector USB Bus & Protocol Analyzer
CATC Chief USB Bus & Protocol Analyzer
CATC USBTracer & USBTrainer Classic
Catalyst Enterprises SBAE-10
Data Transit
HiTex USB Agent
Quality Logic (formerly Genoa Technology) USB Expert - Discontinued 27-Dec-02
Transdimension USB Host/Device Exerciser
The following USB Protocol Analysers/probes connect to existing Logic Analyser systems.

FuturePlus Systems FS4100 Universal Serial Bus (USB) Analysis Probe (Connects to Agilent
logic Analyzer for display)

Trust-No-Exe - An executable filter for Windows NT/2000/XP
Its now a common daily occurrence to receive PE viruses such as the recent MyDoom via e-mail. On Windows platforms,
nine out of ten of last year's top viruses were spread via e-mail. While staff training is the best deterrent, wouldnt it be
helpful to prevent users opening un-trusted executables yet being non-restrictive on the opening documents and other less
harmful files?
With typical figures saying 70% of network related attacks come from within your organisation doesn't it make sense to
prevent users running port scanners or other executable tools from floppy disk or CDROM drives yet still allowing the use of
these drives to transfer files and maintain office efficiency.
Or perhaps you have caught users trying to install software on machines. While operating systems are becoming more
secure, it is still possible to install programs as a user or run programs directly from the CDROM drive. Other users may
choose to play games from CDROM drives?
The speed at which viruses can propagate must be a concern for all Administrators. Most sites now have automatic updates
running which frequently update their scanners, sometimes as frequently as twice daily. However it takes time after a virus
is released, to first be detected and identified and then to be added to the virus definitions of all the major virus scanners
before the site administrator even gets their hand on it. Many people will remember the SQL Slammer Worm. Its peak
occurred only three minutes after it was released to the wild. At its peak it was scanning 55 million Internet hosts per second
and had infected at least 75,000 victims.
If any of these issues are of a concern, you need trust-no-exe.
Doesn't Windows NT/2000/XP have an execute permission?
Out of the box, Windows NT/2000 and XP together with a

NTFS file system will provide the administrator with an
execute permission per file. This permission is shared with the
transverse folder right and can be used to prevent an
executable from loading while still allowing it to be read or
written to. However when applied to an executable the user
receives the rather bland message simular to that on your
right. This can confuse the user into thinking an error has
occurred, rather than the fact they are not permitted to access
The standard Windows dialog. Can be confusing for many users.
this file.
However the biggest disadvantage to this scheme is the administrator has no control over drives which do not have a NTFS
file system or compatible network file system. Drives such as a 1.44MB 3.5" Floppy, CDROM, DVD, Zip Drive or even some
network drives do not have adequate security descriptors and thus cannot be secured. Removing or disabling these drives
is one option but doing so greatly effects the productivity that should be gained from a PC Workstation.
What is trust-no-exe?
Trust-no-exe is a executable file filter. It attaches to the operating system and filters all executable files, be it .exe .com .dll .
drv .sys .dpl etc from all drives and all network shares against a list of files or paths, you, the administrator provide as
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trusted applications. If a prohibited executable (one not in the allow list or one explicitly defined in the deny list) is loaded, a
popup box informs the user with an intelligent message that can be customised to your site.
As Trust-no-exe will only allow executables

to load from your allow list, enabling
execution from files in c:\winnt\ (or c:
\windows on XP), and c:\program files\ and
by using normal file permission to restrict the
write-ability of these folders, you can very
quickly obtain a system which only allows
authorised programs which you have
installed to be executed, while still allowing
The Trust-No-Exe Dialog showing path, executable and switches. The text in
normal access (all but execution) to other
the bottom line can be customised to your site, for example "Please contact
files.
Joe Blobs ext 16 if you require access"
On the other hand perhaps you are worried about all these PE viruses, executable Christmas/birthday cards, screen savers
etc that are coming in via email. While most of your users do not click on these programs you are worried about security
holes in your email client, either hiding extensions or embedding files into html messages, or if the virus is so new your virus
scanner has not yet got a signature for it. By using Trust-no-exe, you can prevent users from opening executable email
attachments. The popup message box can be customised to remind users that it is company policy not to open executable
files. But what happens if the executables dont have .exe or hidden extensions? How will trust-no-exe know if they are
executable or data files?
Trust-no-exe hooks into the operating systems routines for creating a process and loading it into memory. If the operating
system attempts to load any compiled code into memory ready to give it execution as a process or thread, trust-no-exe will
jump on it and prevent the code from being loaded into memory. Therefore trust-no-one doesnt rely on the file extension
and can not be easily fooled.

The Trust-No-Exe Control Panel Applet.
Trust-no-exe has been designed for ease of use. Out of the box, a control panel applet is installed which allows for the
configuration to be quickly modified. By default the program files and winnt/windows directories are added which in many
cases is all that is required to make a secured, yet functional system.
New in version 3 is the ability to add a custom message. This allows you to put in a contact name and number should your
users require special access to certain files. The other unique feature of Trust-no-exe is the file denied dialog is a single
executable that is called by the trust-no-exe driver. Therefore you can create your own dialog with company logo should the
need arise. Please contact us if you would like to explore this option. We can assist my providing a Visual C++.net or
Borland C++ Builder Template.
It is just as important, if not more, to have trust-no-exe protection when logged in as an Administrator. Trust-No-Exe protects
your PC all the time regardless of what user is logged in. To install software, or run executables from un-trusted locations,
the administrator can utilise the control panel to stop the driver and briefly interrupt filtering while the software is installed.
Trust-No-Exe also protects tasks running in the SYSTEM account.
Trust-No-Exe Version 3 now has support for installing and cloning settings to groups of computers.
Installing software and modify settings on multiple computers is never fun, yet alone efficient. With Trust-no-exe you need
only install the package on a single workstation. Once installed and appropriately configured, you may utilise the Multiple
Workstation functionality to remotely install it with your configuration on other selected computers. All that is needed is a
single click. Likewise changes to the access list can be distributed almost instantly and with minimal fuss. Computer groups
compatible with beyondexec can be quickly loaded, or you can effortlessly create your own using the built in computer
picker and save it for later use.

Download
Version 3.04 (255KB - .pdf manual included)
Version 3.04 Manual (.pdf)
Revision History
6th February 2004 - Version 3.04 (Free Download) Windows NT/2000/XP.

Added support for DFS (Distributed File System) Network Shares.
Added support for Windows .Net/2003 Server.
Added DenyExe\Refresh registry key to allow for the periodic refreshing of the access lists. This allows third party
registry distribution tools such as ZenWorks to distribute/modify the access lists.

Corrected bug where trust-no-exe allows some unauthorised executables to load under specific circumstances.
13th December 2003 - Version 3.02 (Free download) Windows NT/2000/XP.

Added Event Log Functionality.
Fixed buffer overrun bug in driver affecting sites with many entries in the allow/deny lists.
Tweaked denyexe.exe to fix problem found on some copies of Windows XP SP1 where denyexe would not unload
correctly hence remaining in memory.

Fixed various non-critical bugs.
Tested on Windows XP SP1, Windows 2000 SP4.
2nd August 2003 - Version 3.0 (Free download) Windows NT/2000/XP.

Rewritten Control Panel Applet to reduce code size. Added updated dialogs, Custom Messages and Multiple
Workstation Support. Control Panel Applet now unloads and un-installs properly
Rewritten denyexe.exe to accept custom messages. Reduced code size.
Rewritten GetDriveDeviceObject routine. No longer seeks the A: drive and improved the speed and reliability of the
routine.
Modified HookZwCreateSection routines to improve reliability across WinNT/2000 and XP.
Fixed problem with running programs on network shares mounted on Windows XP.
Modified installer so driver is automatically loaded by the service control manager and not by the system loader.
Modified driver so if registry keys are missing, driver is inactive. This prevents the computer from failing to boot in rare
instances.
Tested on Windows 2000 SP3 & SP4, Windows NT4 SP5 & SP6(a), and Windows XP & SP2.
3rd October 2002 - Version 2.1 (Free download/demo) Windows NT/2000/XP.

Tested on Windows 2000 SP2 & SP3, Windows NT4 SP5 & SP6(a), and Windows XP.
1st October 2002 - Version 2.0.

Added support for Windows NT and Windows XP. Driver now automatically detects the O/S and hooks the appropriate
O/S specific functions.

27 June 2002 - Version 0.9 (Beta/demo) Windows 2000 Only.
First demo release for public evaluation
13 April 2002 - Version 0.2 (Release Candidate).

Added installation program and control panel applet. Tested only on Win2000.
20 February 2002 - Version 0.1.

Proof of Concept.
Other Unique and Innovative Software Solutions from Beyond Logic
Command Line Process Viewer/Killer/Suspender for Windows NT/2000/XP

Want a command line utility to view, kill, suspend or set the priority or affinity of processes, perhaps from a batch file? Kills
rouge processes where Window's Task Manager fails.
BeyondExec - Spawn Processes and/or Shutdown Remote Windows NT/2000/XP WorkStations.

Have you ever wanted to run a process such as an application installer, service pack, virus signature update etc or shutdown a
single or group of remote computers without having the burden of installing any remote client on your target computers?
Bmail - Command Line SMTP Mailer for Batch Jobs

Bmail is a free but lean command line SMTP mail sender. Bmail allows the user to automate the sending of email messages
containing log files, data downloads or error messages on Win32 based computers.
Delete/Copy by Owner utility for Windows NT/2000/XP

Have you ever had the need to find, copy or delete files that were owned by a certain user? A great way to back up files created
by previous employees or to clean workstations when one leaves.
PortTalk - A Windows NT/2000/XP I/O Port Device Driver

A problem that plagues Windows NT/2000/XP, is it's strict control over I/O ports. Unlike Windows 95, 98 or ME, Windows
NT/2000/XP will cause an exception (Privileged Instruction) if an attempt is made to access an I/O port that your program is not
privileged to access. The PortTalk driver allows existing programs to access selected I/O ports.

Win NT/2000/XP Driver for DeVaSys USBLPTPD11(D) USB Development Boards

2008
USBLPTPD11.SYS is a Windows NT/2000/XP driver for the

DeVaSys USBLPT-PD11 series of USB Development Boards. A
device driver is needed for protected operating systems such as
Windows NT, Windows 2000 and Windows XP as direct I/O access is
prohibited and will cause a privileged instruction exception. (See
Porttalk for further information.) The driver has been designed to be
as painless and transparent as possible. On loading, the driver will
interrogate your operating system and parport.sys to obtain the
number of parallel ports you have and their parameters. Handles to
the driver can then be made by opening &QUOT;\\.
\usblptpd11_x&QUOT; where x defines your LPT port number
minus 1. e.g. opening usblptpd11_0 opens a handle to the device
on LPT1, usblptpd11_1 for the device on LPT2 etc.
This allows unlimited number of USBLPTPD11(D) devices to be used

concurrently, the only limitations reflect the number of parallel ports
your system has. On opening a handle to the driver, it will try to
acquire the port from parport.sys. If this is successful, you will be able
to successfully create a handle to the driver. If not, you either have
another program accessing this driver handle or you have a parallel
port device using the same parallel port. On closing the handle to
USBLPTPD11, the driver will release the port so other parallel
devices can access the parallel port.
As the USBLPTPD11 driver communicates with parport.sys, there is no need to pass the driver a Port Address or
Interrupt number. The driver will obtain these details from parport.sys on loading. Simply, if your existing LPT1 port
works, simply connect the DeVaSys USBLPTPD11(D) board to your system and open the handle for LPT1. If you
change Parallel Port details after the driver has been loaded, these changes will not be reflected by the USBLPTPD11
driver until the driver is reloaded.
Starting and installing the driver
In most cases, the USBLPTPD11.SYS driver isn't required to be explicitly installed. When running the usermode
executable such as hidmouse.exe, it will check for the device driver and if it cannot be opened, it will install and start the
driver for you. However for this to happen correctly, the USBLPTPD11.SYS driver must be in the same directory than
the usermode executable and the user must have administrator privileges. It is also wise to run it from a fixed disk,
preferably your main system volume. While this will not effect operation for the first time, when Windows next loads it
will try to load the driver at bootup and report a failure in your event viewer. It will not cause damage to your system,
only an annoying message each time you boot.
Once the driver has been installed for the first time, any user with normal user privileges can access the device driver
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normally. This is ideal in classroom and corporate environments where security is paramount. The driver can also be
installed manually using the registry file included. Copy the USBLPTPD11.SYS to your /system32/drivers directory and
click on the USBLPT.REG file to load the required registry keys. Then reboot the computer and on boot-up the
USBLPTPD11.SYS driver will load and start automatically. This is recommended for classroom/corporate use where the
driver can be stored away securely in the system directory.
Checked and Free Driver Versions
Two versions of the driver exists. The standard distribution is a free compiled version which has debugging statements
removed and thus executes faster. However when writing your own code, or debugging problems, a checked version of
the driver is provided which displays debugging messages such as which call is being made, if the interrupt service
routine was called or the I2C_Read and I2C_Write functions including the number of bytes to send/receive and the
byDevID. These debug messages can be read with any good debug viewer. One such recommended viewer is the
System Internals DebugView which can be downloaded from their website - www.sysinternals.com for free.
The checked build of the driver is provided in the checked folder of the distribution. Simply replace the USBLPTPD11.
SYS with this driver and reload to display debug information.
Recompiling the code
The code for the device driver has been compiled using Microsoft Visual C and the Windows 2000 DDK. The source
code is provided, but during the normal development cycle it is not required to be recompiled. The usermode program,
hidmouse.exe in which all the development work is done will need to be recompiled in order to make changes. The code
was originally compiled in Borland C 5.02. Borland offers their Borland C++ 5.5 command line compiler tools for
download from their web site free of charge. A make file has been included for the command line compiler. To rebuild
the code using the free Borland C 5.5 compiler use
MAKE -f hidmouse.mak
on the command line, otherwise use your perfered development enviroment.

Testing it out
The distribution comes with two files, hidmouselpt1.exe and hidmouselpt2.exe based on DeVaSys's HIDMouse source.
Permission has been sought to redistribute these files with the driver. However please note that the source code
remains Copyright of DeVaSys. Please see the header files for more information.
To test out the driver and your board, simply run hidmouselpt1.exe for a DeVaSys board connected to LPT1. You
should see a dump of the enumeration as shown below, then your device enumerates as a mouse, and you pointer
starts moving in a small square pattern.
USBLPT-PD11 Cypress Mouse Emulation, Copyright 2001 DeVaSys

USBLPT-PD11: The USBLPT-PD11 driver is already running.
PDIUSBD11 Reset - Configured USB waiting for Connection

wIrq = 0x4000 A bus reset occured - Reinitalising PDIUSBD11

wIrq = 0x0004 Irq - Ep0_Out (EpIdx2) Standard Device request - Get Descriptor
(device)
64 USB_CtlTx Loading first 8 bytes
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) 10 Sending packet of 8 bytes p=0x40C6B8
wIrq = 0x4000 A bus reset occured - Reinitalising PDIUSBD11

wIrq = 0x0004 Irq - Ep0_Out (EpIdx2) Standard Device request - Set Address
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) Set Device Address 82
(device) 18
USB_CtlTx Loading first 8 bytes
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) Sending last 2 bytes at p=0x40c6c0
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) End of Transmission, Getting Status Byte 41
wIrq = 0x0004 Irq - Ep0_Out (EpIdx2) RdEpIdx02 Null { 0x00, 0x00 }
(configuration) 9
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) Sending last 1 bytes at p=0x40c6ca
wIrq = 0x000c Irq - Ep0_Out (EpIdx2) Standard Device request - Get Descriptor
(configuration) 255
Irq - Ep0_In (EpIdx3) 26 Sending packet of 8 bytes p=0x40C6CA
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) 18 Sending packet of 8 bytes p=0x40C6D2
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) 10 Sending packet of 8 bytes p=0x40C6DA
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) Sending last 2 bytes at p=0x40c6e2
(device) 18
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) Sending last 2 bytes at p=0x40c6c0

(configuration) 9
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) Sending last 1 bytes at p=0x40c6ca
(configuration) 34
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) 26 Sending packet of 8 bytes p=0x40C6CA
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) 18 Sending packet of 8 bytes p=0x40C6D2
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) 10 Sending packet of 8 bytes p=0x40C6DA
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) Sending last 2 bytes at p=0x40c6e2
wIrq = 0x0004 Irq - Ep0_Out (EpIdx2) Standard Device request - Set Configuration
Setup - Set
Standard Device Configuration 1
wIrq = 0x0004 Irq - Ep0_Out (EpIdx2) Class Interface request - Idle
wIrq = 0x0004 Irq - Ep0_Out (EpIdx2) Standard Interface request - Get Descriptor
(report)
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) 42 Sending packet of 8 bytes p=0x40C6EC
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) 34 Sending packet of 8 bytes p=0x40C6F4
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) 26 Sending packet of 8 bytes p=0x40C6FC
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) 18 Sending packet of 8 bytes p=0x40C704
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) 10 Sending packet of 8 bytes p=0x40C70C
wIrq = 0x0008 Irq - Ep0_In (EpIdx3) Sending last 2 bytes at p=0x40c714
wIrq = 0x0010 Irq - Ep1_In (EpIdx4) Sending Mouse Report of size 3 bytes
Downloading the Source, Drivers and Usermode Programs
Version 1.2, 140K bytes
Revision History
10th November 2001 - Version 1.2.
Modified usermode source code to compile with Visual C, Borland C 5.01 and the free Borland C 5.5
Command Line Compiler.

4th November 2001 - Version 1.1.
Improved automatic loading of driver. Now copies USBLPTPD11.SYS to /system32/drivers directory
on first install.
Added usblpt.reg which was omitted from version 1.0
Re-tested on Windows 2000 SP2 and Windows XP RTM.

31st October 2001 - First official release, version 1.0.

Added parport.sys support enabling more than one USBLPT-PD11 device to be used at the same
time.
Added interrupt support.
Tested on Windows 2000 SP2 and Windows XP RTM.
22nd October 2001 Beta release 0.1.

Tested I2C Routines.
Required Port Address to be passed to driver.
Tested on Windows 2000 SP2 and Windows XP RC1.
Where can I buy one of these USBLPT-PD11 things?
The USBLPT-PD11 USB development board is avaliable from DeVaSys Embedded Systems in two versions, a desktop
and a dongle version. The dongle version starts at $59US.
A special thanks to Michael DeVault from DeVaSys Embedded Systems for sending out a USB I2C/IO Interface Board,
USBLPT-PD11 USB development board (desktop version) and a USBLPT-PD11D, USB development board (dongle
version) for evaluation.
Interrupt support has been provided in the driver.

However Windows 2000 and Windows XP defaults
to &QUOT;Never use an interrupt&QUOT; under
the settings for the Parallel Ports in Device
Manager. If you intend to use interrupts that are
recommended, please change your ports to either
&QUOT;Try not to use an Interrupt&QUOT; or
&QUOT;Use any interrupt assigned to the
port&QUOT;. As Windows 2000 and XP has a bug,
you will need to reboot the machine after making
these changes as the O/S increments the number
of parallel ports you have, even though you have
only changed its parameters. The driver protects
against this bug.
If your system is set up not to use interrupts, a call

to Wait_for_interrupt will return immediately. As
most PDIUSBPD11 routines will simply read the
interrupt register and act if a condition exists, calling
the wait_for_interrupt IOCTL call will be transparent
in systems that support interrupts and those
systems who dont.

Wednesday, February
13th, 2008
Command Line Process Viewer/Killer/Suspender

for Windows NT/2000/XP
Want a small command line utility to view, kill, suspend or set the priority and affinity of processes, perhaps
from a batch file? . . Has a virus disabled your Task Manager? . . or perhaps your Administrator has?
The Command Line Process Utility will function even when the task manager is disabled and/or the
dreaded "Task Manager has been disabled by your Administrator" dialog box appears.
Works on remote machines with the Microsoft Telnet Server (tlntsvr) found on Windows 2000 and XP or
with BeyondExec for Windows NT4/2000/XP.
View processes, owners, and CPU time . .
Command Line Process Viewer/Killer/Suspender for Windows NT/2000/XP V2.01

Copyright(C) 2002-2003 Craig.Peacock@beyondlogic.org
ImageName PID Threads Priority CPU%

[System Process] 0 1 0 100 Error 0x6 : The handle is invalid.
System 8 43 8 0 Error 0x5 : Access is denied.
SMSS.EXE 180 6 11 0 NT AUTHORITY\SYSTEM
CSRSS.EXE 204 11 13 0 NT AUTHORITY\SYSTEM
WINLOGON.EXE 224 16 13 0 NT AUTHORITY\SYSTEM
SERVICES.EXE 252 33 9 0 NT AUTHORITY\SYSTEM
LSASS.EXE 264 16 9 0 NT AUTHORITY\SYSTEM
svchost.exe 436 10 8 0 NT AUTHORITY\SYSTEM
spoolsv.exe 468 15 8 0 NT AUTHORITY\SYSTEM
CrypServ.exe 496 3 13 0 NT AUTHORITY\SYSTEM
hidserv.exe 532 4 8 0 NT AUTHORITY\SYSTEM
jtagserver.exe 560 3 8 0 NT AUTHORITY\SYSTEM
mdm.exe 584 6 8 0 NT AUTHORITY\SYSTEM
nvsvc32.exe 628 2 8 0 NT AUTHORITY\SYSTEM
regsvc.exe 664 2 8 0 NT AUTHORITY\SYSTEM
mstask.exe 704 6 8 0 NT AUTHORITY\SYSTEM
stisvc.exe 728 4 8 0 NT AUTHORITY\SYSTEM
WinMgmt.exe 804 3 8 0 NT AUTHORITY\SYSTEM
mspmspsv.exe 876 2 8 0 NT AUTHORITY\SYSTEM
http://www.beyondlogic.org/solutions/processutil/processutil.htm (1 of 6)13/02/2008 16:41:43

explorer.exe 616 15 8 0 NEPTUNE\Administrator

mixer.exe 1092 3 8 0 NEPTUNE\Administrator
PRISMSTA.exe 1048 1 8 0 NEPTUNE\Administrator
rundll32.exe 952 2 8 0 NEPTUNE\Administrator
DIRECTCD.EXE 960 3 8 0 NEPTUNE\Administrator
internat.exe 1180 1 8 0 NEPTUNE\Administrator
OSA.EXE 1192 2 8 0 NEPTUNE\Administrator
Icq.exe 1200 11 8 0 NEPTUNE\Administrator
devenv.exe 1324 4 8 0 NEPTUNE\Administrator
IEXPLORE.EXE 1140 7 8 0 NEPTUNE\Administrator
CMD.EXE 1340 1 8 0 NEPTUNE\Administrator
Process.exe 1132 1 8 0 NEPTUNE\Administrator
Additional switches can be used to display User and Kernel Times (-t) or the Creation Time of processes (-
c).
Kill Processes . . .
Processes can be killed immediately (terminated without saving files or cleaning up) by specifying either the
name or the PID (Process IDentifier). In cases where there are multiple processes running with the same
name and your desire is to kill a specific process you will need to use the PID.
C:\>process -k 748

Killing PID 748 'winword.exe'
If an image name such as iexplore.exe is specified, the utility will kill all processes by that name.
C:\>process -k iexplore.exe

Killing PID 996 'iexplore.exe'
Close Processes . . .
On the other hand if you want to gracefully close programs by sending them a WM_CLOSE message first,
you can used the -q option. This allows processes to clean up, save files, flush buffers etc. However it can
cause deadlocks. e.g trying to close Microsoft Word when a unsaved, but edited document is open will

generate a dialog box "Do you want to save changes to document 1?". This will prevent winword.exe from
exiting until a user responds to the prompt.
C:\>process -q wordpad.exe

Sending PID 1836 'wordpad.exe' WM_CLOSE Message. Timeout is 60 seconds.
wordpad.exe (PID 1836) has been closed successfully.
When this option is used a WM_CLOSE message is immediately sent to the process. It then waits up to a
default of 60 seconds for the program to clean up and gracefully close before it is killed. The different
timeout can be specified as an option after the PID/Image Name.
Suspend & Resume Processes . . .
Processes can be suspended if you need some extra CPU cycles without having to kill the process outright.
Once the requirement for the extra CPU cycles has passed you may resume the process and carry on from
where you left off. The process is suspended by sleeping all the processes' active threads.
C:\>process -s winword.exe

Suspending PID 748 'winword.exe'
Threads [1084][308]
Suspending a process causes the threads to stop executing user-mode (application) code. It also
increments a suspend count for each thread. Therefore if a process is suspended twice, two resume
operations will be required to resume the process (Decrement the suspend count to zero).
Change the priority of processes . . .
When viewing the list of processes, the 4th column shows the base priority of a process. This is a numeric
value from zero (lowest priority) to 31 (highest priority). You may set the base priority of a process by
specifying one of the priority classes below.
Low 4
BelowNormal 6
Normal 8
AboveNormal 10
High 13
Realtime 24

Please note Windows NT4 does not support the Above Normal and Below Normal priority classes.
Specifying these two parameters on a Windows NT4 machine will result in a " The Parameter is incorrect "
error.
C:\>process -p winword.exe high

Setting PriorityClass on PID 748 'winword.exe' to 128
Change the affinity of processes . . .
The affinity is a mask which indicates on which processors (CPUs) a process can run. This is only useful on
multiprocessor systems. When the -a option is used in conjunction with a process name or PID, the utility
will show the System Affinity Mask and the Process Affinity Mask. The System Affinity Mask shows how
many configured processors are currently available in a system. The Process Affinity Mask indicates on
what processor(s) the specified process can run on.
C:\>process -a wordpad.exe

Getting Affinity Mask for PID 1084 'wordpad.exe'
System : 0x0001 0b00000000000000000000000000000011 [2 Installed Processor(s)]
Process : 0x0001 0b00000000000000000000000000000011
To set the affinity mask, simply append the binary mask after the PID/Image Name. Any leading zeros are
ignored, so there is no requirement to enter the full 32 bit mask.
C:\>process -a wordpad.exe 01

Setting Affinity Mask for PID 1084 'wordpad.exe'
Affinity Mask Successfully Set to 00000000000000000000000000000001
Download
Version 2.03, 25K bytes. (Freeware)

Now supports Windows NT4 Workstation and Server, plus continued support for Windows 2000/XP in a
single executable.
Revision History

5th June 2003 - Version 2.03

Added -c switch which displays the creation times of processes.
29th May 2003 - Version 2.02

Corrected Inaccurate CPU % Times.
Added -t switch which displays both User Mode and Kernel Mode CPU times.
15th May 2003 - Version 2.01

Fixed memory allocation errors for systems with greater than 100 processes.
Application will handle a maximum of 65535 processes.

Fixed bug in -q, -k when used with PID. Specifying a PID would kill all processes with
the same name than the specified process.

Fixed bug with the -a switch when used with PID.
26th April 2003 - Version 2.00pre1 (Pre-Release Beta)

Caved in to overwhelming demand for support for Windows NT4. Rewrote code to
detect operating system and use appropriate API calls plus a couple of undocumented
calls to provide all the functionality of previous versions yet across all three NT
platforms.
Added preliminary support for the setting and display of Affinity Masks for multi
processor systems.
Added support for killing multiple processes by name. e.g using -k iexplorer.exe will kill
all running instances of Internet Explorer, something previously accomplished by a

batch file.
Added the ability to specify the timeout for the -q option.
Improved OpenProcess access so CPU time can now be sought from processes we
don't have adequate rights too.

15th April 2003 - Version 1.03
Modified string to number conversion to correct problem with strings contain leading
numbers. eg process -s 3dsmax.exe would try to suspend the process with PID 3 and
not 3dsmax.exe.
Added -q Send WM_CLOSE message option. This will gracefully issue a WM_CLOSE
message to the program and wait for it to close.

21st December 2002 - Version 1.01
Corrected problems with exit codes
0 = Success (Process found and desired action performed)
1 = Miscellaneous Error.

2 = Cannot find Process (No processes left my this name)
22nd September 2002 - Version 1.00

First release to public.

Allow users to run trusted applications from defined directories, while preventing the execution of non-trusted
programs from floppy disk and CDROM drives or from the users e-mail attachment directory. Stop PE viruses
in their tracks where on Windows platforms year, nine out of ten of the top viruses were spread via e-mail.

Have you ever wanted to run a process such as an application installer, service pack, virus signature update

etc or shutdown a single or group of remote computers without having the burden of installing any remote
client on your target computers?

Bmail is a free but lean command line SMTP mail sender. Bmail allows the user to automate the sending of
email messages containing log files, data downloads or error messages on Win32 based computers.

Have you ever had the need to find, copy or delete files that were owned by a certain user? A great way to
back up files created by previous employees or to clean workstations when one leaves.

A problem that plagues Windows NT/2000/XP, is it's strict control over I/O ports. Unlike Windows 95, 98 or
ME, Windows NT/2000/XP will cause an exception (Privileged Instruction) if an attempt is made to access an
I/O port that your program is not privileged to access. The PortTalk driver allows existing programs to access
selected I/O ports.

Beyond Logic Shutdown for NT/2000/XP

2008
The Windows 2000

Professional Resource
Kit and Windows XP
introduce a shutdown.
exe command line utility
to shutdown local and/
or remote computers.
This utility can be used
in conjunction with the
task schedular or AT
service to shutdown
computers after hours
to help conserve power
(money, and the
environment) or to
reboot your computer
after hours to make it
more reliable.
However a quick play

with these utilities will
fine that they are less
than adequate. First,
they provide limited
options to shutdown,
reboot or logoff.
However shutdown
The limited and bland dialog from standard Microsoft Utilities using InitiateSystemShutdown
does not actually turn
API.
your ACPI compliant
computer off but rather
displays the It is now
safe to turn off your
computer message.
There is no recourse for
the user to cancel the
operation, or an
opportunity to target idle
computers without
logged on users.
http://www.beyondlogic.org/solutions/shutdown/shutdown.htm (1 of 5)13/02/2008 16:42:00

The Beyondlogic shutdown utility on the other hand provides :
Options to shutdown, power-off, reboot, suspend, hibernate, log-off or lock the workstation.
Actually shutdowns ACPI Compliant computers including WinNT4 with the hal.dll.softex Hardware
Abstraction Layer.
Ability to display optional message of a maximum 300 characters.
The shutdown dialog will appear on the active window, should it be the login window, login screen saver,
logged in user's desktop, or on a locked workstation.
Option to allow the user to cancel the operation. (This can be greyed out)
Option to prevent shutdown action occurring on logged-on computers giving your users the flexibly to run
lengthy processes overnight without being disturbed.
The beyondlogic shutdown dialog, giving your users the option to cancel your action
This utility is based on the shutdown module of the popular beyondexec. If you need to shutdown multiple
computers it is recommended to use beyondexec
Usage
Using the industry standard /? switch will
show the utilities parameters. A summary is
shown on the right.
Without any switches specified, a cancellable

shutdown action with a 60 second countdown
will be selected. Windows 2000 and XP users
should always use the shutdown switch to
turn off your computers. The PowerOff switch
is only provided to shutdown Windows NT4
with the softex hardware abstraction layer
installed. (See more details below)
The -c switch can be used to Gray out the

cancel button preventing users from
cancelling the shutdown once initiated. The -i
switch first checks to see if the shell (explorer.
exe) is running to establish if a user is logged

into the workstation. If a user is logged in, the

application exits without displaying anything.
This can be used to give you users the
freedom to run programs on the PC overnight
or can be used to only shutdown idle
machines while not annoying users logged in
and working away.
Scheduling a Shutdown on Windows NT/2000/XP
Windows 2000 and XP contains a GUI task scheduler. However this scheduler doesnt provide the option to
allow processes the right to interact with the desktop. Therefore you need to use the AT service bundled with
NT4/2000 and XP instead.
C:\ at 18:00 /interactive /every:M,T,W,Th,F,S,Su c:\windows\shutdown.exe -i -l 600

-m Management acknowledges your dedication to your work. However if you choose
to
go home now and have a good night, you will be much more productive tomorrow.
The above example shows how you can schedule a shutdown to occur at 6:00pm each night. In this example
shutdown.exe has been copied to c:\windows (Windows XP).
In medium workgroups and larger organisations, the above solution requires shutdown.exe to be copied to all
your computers and the scheduler set up on each computer. Each computer will then shutdown based on it's
own system clock. While many sites sync the workstation clock at log-in, flat CMOS batteries can be a problem
for those sites who don't. It can also be a large task to change the configuration should you need to reschedule
around an event.
Another solution is the popular beyondexec which can be used to run processes or shutdown multiple
workstations on a single or group of remote workstations. In this case you could run a single scheduled task on
a NTP sync'd server to shutdown your group of computers. If you need to change the scheduled time there is
only one setting to change, and it gives you the flexibility to shutdown the workstations on demand such as
moments before a scheduled power outage. The other advantage is there is absolutely nothing you have to
install on your remote computers.
Trouble Shooting
Powerdown on Windows NT 4 / Soft-Off

Windows NT 4 can be made to switch itself off after shutdown should your computer supports power
management. When Service Pack 6/6a is extracted you will find a hal.dll.softex file. If you replace \winnt
\system32\hal.dll with a copy of this file, using -d poweroff with beyondexec will shutdown and poweroff
your ACPI Windows NT 4 Workstation. Failure to replace the hal.dll will result in the poweroff action
rebooting your Windows NT computer.
Locked Workstations
When a workstation is locked, the shutdown, reboot and logout actions will not function correctly unless
the -f (force applications to terminate) switch is specified. The suspend and hibernate actions will function
correctly on a locked workstation. This is a problem associated with the ExitWindowsEx() API provided in
Windows.
Download
Revision History
16th November 2003 - Version 1.01
First release to public. Extracted the shutdown module from BeyondExec for standalone use.

programs from floppy disk and CDROM drives or from the users e-mail attachment directory. Stop PE viruses in
their tracks where on Windows platforms year, nine out of ten of the top viruses were spread via e-mail.

Want a command line utility to view, kill, suspend or set the priority or affinity of processes, perhaps from a batch
file? Kills rouge processes where Window's Task Manager fails.

Have you ever wanted to run a process such as an application installer, service pack, virus signature update etc
or shutdown a single or group of remote computers without having the burden of installing any remote client on
your target computers?

Bmail is a free but lean command line SMTP mail sender. Bmail allows the user to automate the sending of email
messages containing log files, data downloads or error messages on Win32 based computers.

Have you ever had the need to find, copy or delete files that were owned by a certain user? A great way to back
up files created by previous employees or to clean workstations when one leaves.

A problem that plagues Windows NT/2000/XP, is it's strict control over I/O ports. Unlike Windows 95, 98 or ME,
Windows NT/2000/XP will cause an exception (Privileged Instruction) if an attempt is made to access an I/O port
that your program is not privileged to access. The PortTalk driver allows existing programs to access selected I/O
ports.

Console Computer Information Utility for 2000/XP

Want a quick console utility to display the hardware specifications of a PC including Processors Type, Operating
System and Service Pack, Physical and Virtual Memory, Network Addresses, Logical Drive information, Video
Card Type, Hard Disk, CDROM and Printer Information.

USB with the simplicity of RS-232
Wednesday, February
13th, 2008

High Speed USB Controllers for Serial and FIFO Applications
RS-232 was quite simplistic. While the specs defined the electrical characteristics, little
was said about the protocol. RS-232 was a simple communications channel. Send a
binary or ASCII byte down the wire and it gets received by the other end. This allowed
RS-232 to be used effortlessly for just about anything. Most designers would develop
their own protocols which sat on top of RS-232.
Then comes along USB with all its complexities. Enumeration, device descriptors,
endpoints, tokens, message pipes, control/bulk/interrupt/isochronous transfers, WDM
device drivers - enough! No longer is it something you can wack on your
microcontroller in 30 minutes.
However if you are just starting out in USB and want to get something happening
quickly without any hassles of enumeration, device descriptors and the works then
FTDI may have two ICs which interest you. One provides a simple asynchronous
channel, the other a byte wide FIFO interface with little need to even glance at the
USB Spec.
FTDI brought out the FT8U232AM as a legacy USB to RS-232 Converter. It doesnt
require any programming, simply solder the device down and switch it on. While they
can be used for USB to RS-232 adaptors they are also a quick way to make an
existing product USB compliant.
http://www.beyondlogic.org/usb/ftdi.htm (1 of 7)13/02/2008 16:42:10

Lets say you had a

datalogger with a
RS-232 uplink. You
can remove the RS-
232 line drivers and
quad flat pack down
a FT8U232AM in a
MQFP 7mm x 7mm
package and
replace the DB9
with a USB
connector. Quite
possibly you will be
saving some room
in the process.
Then on the PC
side you simply run
a VCOM (Virtual
Comm Port) driver
supplied royalty free
by FTDI which
emulates a com The FT8U232AM/485AM has a 7mm x 7mm package size only
port so your existing slightly larger than a SO8 Package.
application needs
not be changed at
all. This is great if a
third party makes
the software and
you dont have
control over its
interface, or you
want to maintain
compatibility with
older and existing
software.
But won't this device enumerate as a FTDI USB <-> RS-232 making my product look
sub-standard? Yes, you are quite right - if you dont include a serial EEPROM. But for
a extra $1 you can surface mount down a SO8 serial EEPROM and program it with
your PID/VID, manufacturer string, product string and serial number string. Now when
your customers plug in your device they see the "Bells and Whistles USB Data
Logger" made by "my company XYZ."

FT8U232AM - USB UltraBaud Transfer IC with RS-232/RS422 and CPU I/F

Options
Asynchronous RS-232 from 300 bps to 920Kbps.

RS422/485 to 2000Kbps.
TXD, RXD, RTS, CTS, DTR, DSR, DCD, RI and TXDEN pins @ TTL
Logic Levels.
384 byte receive FIFO / 128 byte transmit FIFO.
Integrated 3.3V regulator.
6 MHz Clock.
Sleep and USB Configured outputs - Suitable for Bus Powered and Self
Powered Applications.
32 pin MQFP Package.
Free Virtual Com Port drivers for Windows 98/ME, Windows 2000/XP,
Linux and MAC.
While the external 93C46 can dictate a new set of VID/PID and strings, it can also set
up the maximum power in the USB Configuration Descriptor. This is handy when you
plan to use the FT8U232AM in a bus powered design. The '232AM has a PWRCTL
pin which is tied low for bus powered designs and tied high for self powered designs.
The status of this pin is reflected in the configuration descriptors bmAttributes field,
allowing the '232AM to be used in devices that are bus or self powered without the
need of reprogramming the EEPROM each time or on loss of self power.
In a bus powered design under suspend conditions the entire device can only drain
500uA from Vbus, a limitation imposed by the USB Standard. The '232AM provides a
sleep pin which can be connected to the RS-232 line drivers (in the case of a USB to
RS-232 dongle) or other circuitry to place the devices in sleep modes and hopefully
meeting the low power suspend requirements of the spec.
The '232AM also provides a USBEN output which goes high once the device has been
configured by the host. The FTDI documentation suggests it could be used in devices
with both USB and RS-232 ports to control a multiplexer to switch control between
ports. Another use could be in high powered bus functions which can drain up to
500mA (5 load units) but is not permitted to drain any more than 100mA (1 load unit)
until they are configured. This pin could enable the extra load once the device is
configured, such as charge pumps or LCD/user interfaces etc.
But while this device has many advantages for legacy devices, it shouldnt be
dismissed for new designs either. While the legacy VCOM drivers may put some off on
the PC side, the good news is VCOM isnt the only way to talk to your new
FT8U2XXAM device. You can also use FTDIs direct driver FTD2XX. This does away
with the hassles of legacy com port interfaces and worries of device drivers by

providing a series of .DLL calls your user mode program can call to interrogate your
device.
But designing a new device around the FT8U232AM could lead to performance
problems. While USB has a data rate of 12Mbits per second ignoring protocol
overheads, the FT8U232AM can only handle 2Mbits per second and worse still, many
microcontrollers can only handle a couple hundred bits per second on their
asynchronous interfaces.
Therefore FTDI has an 8 byte parallel FIFO version. It shares the same USB
descriptors, same PID/VID, but removes the asynchronous serial interface in
preference for a bi-directional 8 bit FIFO interface capable of 1Mbytes per second or
8Mbits per second. This device provides RD/WR control lines enabling it to be
memory mapped on a microcontrollers bus, but omits a chip select thus you need
additional glue logic for address decoding.
FT8U245AM - Fast Parallel Data Transfer IC
8 bit Parallel Bus input/output

Data rates up to 1Mbytes/sec
D[0..7], RD/WR, RXF (receive buffer full), TXE (transmit buffer empty)
384 byte transmit FIFO / 128 byte receive FIFO
Integrated 3.3V regulator
6 MHz Clock
32 pin MQFP Package
Free Virtual Com Port drivers for Windows 98/ME, Windows 2000/XP,
Linux and MAC
While it doesnt provide a DMA interface as such, it does provide RXF and TXE pins
indicating the FIFOs status. These could be used to control DMA or interrupts with a
little glue logic, or a more popular choice at present is to map these pins into a status
register, so you can read and write data to the device on one port and check the
FIFO's status on another.
The FT8U245AM lacks the PWRCTL (Bus Powered/Self Powered Input), USBEN
(USB Enabled) and sleep pins that it's '232AM counterpart has. As Fred Dart from
FTDI points out, the '245AM enumerates as a bus powered device. This allows the
device to be used "in practice" as a bus powered device or a self powered device.
When used in a self powered device, the FT8U245AM draws little or no current from
Vbus and thus is well within the power requirements of self powered devices.
It's also possible to detect a sleep condition on the '245AM as the RCCLK input goes
low during suspend. Adding a high impedance CMOS buffer allows the ability to detect

this condition, while not loading or effecting the RC time constant required to maintain
oscillator stability when the device comes out of suspend. In many cases the omission
of these pins isn't a significant limitation, as this device is normally tacked on to a
larger embedded system with it's own power supply. One such example is Jeff
Pollard's PC 104 adaptor published in Circuit Cellar, Issue 132, July 2001.
The serial EEPROM on both devices can be programmed effortlessly over USB with a
application (FTD2XXST EEPROM serialiser and tester utility) from FTDI. There is no
need to program the EEPROM before soldering to your board.
Summary
Only slightly larger than a SO8 package 32 pin QFTP 7mm x 7mm.
Royalty free Virtual COM Port Drivers Win98/ME Win2K/XP and linux.
Direct driver FTD2XX with .DLL usermode interface
No need to worry about the underlying USB protocols.
No wasting time debugging device drivers and firmware.
Comes in both serial and 8 bit FIFO wide versions.
Ability to customise USB descriptor and strings.
Add USB in 10 minutes!
For those of us who can't wait long enough to build a board can find prebuild modules
from Ravar.net. These modules are available in both serial and parallel interface
versions and are priced at US$27ea ($50 AUS). This makes them an ideal USB add
on solution for Microchip, AVR and other microprocessors. The serial version gives
you the flexibility of adding it to your existing asynchronous comms port leaving the
parallel I/O ports free or if you need speed, you can use the USBMOD2 with a parallel
interface capable of 1Mbyte/sec.

USBMOD1 USB to TTL Serial

Module.
Single module High-Speed USB
UART solution
Based on FTDI FT8U232 High-
Speed USB UART IC

32-pin Dual In-Line Package
(Ideal for prototyping)

Fits into a standard 32-pin
600mil IC Socket
Provision for external EEPROM
for USB enumeration data

No external passive
components required
Module powered from USB bus
(up to 60mA from USB for user

application)
Click here for PDF DataSheet
USBMOD2 USB to 8bit Parallel

Data Module
Single module High-Speed
USB UART solution

Based on FTDI FT8U245 USB
FIFO Fast Parallel Data

Transfer IC
Standard 32-pin Dual In-Line
Type Package (Ideal for

prototyping)
Fits directly into a standard 32-
pin 600mil IC Socket or

Breadboard.
On-board Crystal and All
required Passive Components

EEPROM for custom USB

enumeration data
Module powered from USB
bus with up to 50mA from

USB for user hardware
Click here for PDF DataSheet
These modules are also available from DonTronics

Gigatechnology & DonTronics sells the FT8U232AM/BM and FT8U245AM/BM bare

chips. Click for current prices.

USB OTG & USB Host Devices for Linux
Wednesday, February
13th, 2008
While USB has many advantages in the plugnplay and ease of use arena, it could
never be a direct replacement for many RS-232 systems until now. One of the biggest
problems with USB is that its host controlled. Unlike its firewire equivalent, if you
switch off a USB host, nothing else works. USB does not support peer to peer
comunication. One device on the bus must be a host.
This is fine in the general computing environment, but will cause problems in industrial
applications and mobile computing enviroments. For example, a RS-232 modem was
a DCE device. Simply inserting a null modem would allow it to talk to other DCE
devices, so you could connect a modem up to your datalogger, PLC, printer or other
RS-232 device. These devices could either talk together or to a computer. However
with todays USB modems you can connect it up to your computer(host) and well,
thats about it.
Many USB digital cameras can download data to a PC, but you are unable to connect
them directly to your USB printer to print the pictures out or to a CD Burner to
permamently store your holiday snaps, something which is possible with other
communication mediums. PDAs can download and upload data from the PC over it's
USB link, but the user cant connect a printer, mobile phone (modem) or camera to it.
This turns out to be quite a restriction to USBs so called ease of use and simplicity . . .
So to combat these problems, a tack on standard was created to USB 2.0. This is
called the On-The-Go Supplement or OTG for short. The OTG specification details the
"dual role device". This is a device which can function as both a device controller (DC)
and/or a host controller (HC). Aimed at embedded applications the specification
doesnt require a fully blown, resource hungry host capability.
The OTG host can have a targeted peripheral list. This means the embedded device
does not need to have a list of every product and vendor ID or class driver. It can
target only one type of periheral if needed. This could for example be a modem
complying to the Communication Device Class Specification.
The spec also details a Session Request Protocol (SRP) which allows a B-device
http://www.beyondlogic.org/usb/otghost.htm (1 of 4)13/02/2008 16:42:17

(Peripheral) to nudge an A-device to turn on the USB's Vbus so it can communicate

with each other. A Host Negotiation Protocol (HNP) is also added to allow either end
to swap between a host or slave. As power may be a problem with battery operated
hosts, the spec allows for a relaxed power source. A dual-role device needs only
source a minimum of 8 mA on Vbus.
As a device can be either a host (A-device) or peripheral (B-device) and that the USB
specification calls for different types of connectors for upstream and downstream
ports, the OTG spec introduced two additional connectors. One such connector is a
mini A/B connector allowing a mini A or mini B connector to plug into the one
recepticle. A dual-role device is required to be able to detect whether a Mini-A or Mini-
B plug is inserted by determining if the ID pin (an extra pin introduced by OTG) is
connected to ground.
And where would OTG be without its own descriptor? Any dual role host can request
an OTG descriptor from a B-device describing wheather or not it can handle SRP and/
or HNP. Any B-device that supports either HNP or SRP must respond to this request.
The On-The-Go specification is in its last stages of revision. Revision 0.9 released on
September the 5th, 2001 is currently avalible at http://www.usb.org/developers/
onthego/
ISP1161 Full-speed Universal Serial Bus single-chip host and device controller.
Philips have released the ISP1161 - the world's first single-chip, integrated host and
device controller conforming to the USB Revision 1.1. It has been used by Philips to
demonstrate USB OTG functionallity, but also makes an excellent host controller for
embedded systems such as Linux.
Combines a USB Host Controller and USB Device Controller in a single chip.
Can function as a USB Host only, USB Device Only or both simultaneously.
Selectable one or two downstream ports for HC and one upstream port for DC.
Supports single-cycle burst mode and multiple-cycle burst mode DMA
operations.
Built in separate FIFO buffer RAM for HC (4 kbytes) and DC (2462 bytes).
6 MHz crystal oscillator with integrated PLL for low EMI.
USB device functionally simular to the ISP1181.
USB Host Controller registers compatible to OpenHCI although accessed
though two memory map locations.
Available in a LQFP64 package.
The ISP1161 has a standard CS, RD, WR, and D[15..0] bus making interfacing to
most microcontrollers a piece of cake. This particular device only has two address
lines hogging up a minimal 4 locations/ports in memory. The 4 addresses are the HC

data port, HC command port, DC data port and DC command port making it one of
these devices where you send a command first, then data to a different port. However
to speed things along shared DMA functionality is added.
While the Host device is controlled using two memory locations, the register set is
made compatible to the OpenHCI register set further aiding portability. This allowed
the linux OHCI drivers to be ported reasonably easily.
While Philips introduced this device with their OTG promotional release, this device is
not 100% OTG complaint. You have to remember that Philips first released this device
in July 2001, the OTG specification revision 0.9 was released in early September 2001
and is still not fully qualified at time of writing.
As introduced earlier, the OTG Session Request Protocol (SRP) allows devices to turn
on Vbus enabling USB connectivity. This must be done by the B-device using both the
"data-line pulsing" and "VBUS pulsing" methods. The OTG host needs only support
one of these. In data-line pulsing the B-device can turn on its D+ pull up resistor for a
period of 5 to 10mS.
Vbus pulsing is slightly more complicated. If a OTG Complaint B-device is connected

to a standard host such as the one in your computer, pulsing Vbus when your
computer is powered off could lead to damage. This is overcome by the value of
decoupling capacitor on the Vbus line. The USB 2.0 spec calls for a minimum of
120uF on the host's Vbus.
The OTG states that a dual role device should have between 1.0 F and 6.5 F.
Therefore the B device can send a pulse of duration long enough that a 6.5uF
capacitor on the dual role device will charge up beyond 2.1V, yet if connected to a
normal host with a capacitance on Vbus of 120uF or more it will not be charged over
2.0V preventing possible damage to the host. Its own capacitance on Vbus needs to
be facted into this calulation and stricter limits are imposed by the OTG standard.
The ISP1161 does not have hardware functionailty to support SRP or HNP. Philips
however informs us that they will soon offer an OTG host/device controller based on
their proven ISP1161 and an OTG version of their transceiver with OTG SRP & HNP
support. This will probaby come about once the OTG standard is finalised.
But while this device may not be 100% USB OTG complant it does make for a ideal
Host controller for embedded systems. In the linux World Roman Weissgaerber has
released an experimental version of a host controller driver for the Philips ISP1161
HC. His current patch is against Linux-2.4.8 and can be found in the linux-usb-devel
development group.

While Roman has been using the ISA card for his development, others in the
embedded linux community shouldnt find it to hard to port across to uClinux or other
embedded distributions. Philips have been busy writing application notes detailing how
to connect the ISP1161 to varous RISC processors such as the Hitachi SH7709, Intel
StrongARM SA1110, Motorola DragonBall EZ, Fujitsu SPARClite and NEC V832
RISC processors.

BeyondExec - Spawn Processes or Shutdown Remote Windows NT/2000/XP WorkStations

2008
BeyondExec - Spawn Processes and/or

Shutdown Remote Windows NT/2000/XP WorkStations.
Have you ever wanted to run a process such as an application installer/setup, service pack, virus definition update etc
on a group of target computers without having the burden of installing any remote client on your target computers?
Perhaps you have needed to Shutdown, Powerdown, Reboot, Suspend, Hibernate, LogOff or Lock a large number of
workstations at the one time or at certain times from a scheduler and give the user notice and the ability to cancel the
operation beforehand?
BeyondExec offers the following flexibility -
General
Zero set-up time. Simply run the single 110kb utility from the command line.
Omits the need to install client software on remote machines.
Secure. No open TCP/IP ports - utilises already existing SMB named pipes to minimise security risks.
Works with a single remote computer or groups of multiple remote computers.
Multiple computer support is handled by multi-threaded routines speeding up the issuing of jobs.
Command line utility allowing scripting and automation of tasks from batch files or schedulers.
Each workstation allows 3 simultaneous sessions.
Supports renamed Administrator accounts & renamed Administrators groups for added security.
Run Remote Processes

Allows processes to run in either the system or administrator's account.
Can allow or deny processes the right to interact with the logged on user (Desktop).
Ability to run processes with Above Normal, Below Normal, High Priority, Idle, Normal priorities.
Push Windows Hot Fixes/Service Packs/Virus Definition updates out to remote computers etc.
Use with the Command Line Process Viewer to View, Kill, Suspend or adjust the priorities of processes
on remote computers.
or Use with the Console Computer Information Utility for 2000/XP to view/log Specifications of Remote
Computers.
Option to terminate rogue processes after a specified number of seconds.
Remote Shutdown
Ability to shutdown groups of computers (for example at close of business to save on power.)
User can be given notification of shutdown and the option of cancelling (if permitted - Default).
Shutdown dialog will appear on active window, should it be the login window, login screen saver, logged
in users desktop, or on a locked workstation.

The shutdown process will be identical regardless if a user is logged in or not.
A process can be executed prior to shutdown. E.g. you could gracefully shutdown important programs
(open databases) using the Command Line Process Viewer before forcing a shutdown on less important
applications.
Usage
BeyondExec V2.05 - Spawn Remote Processes on Windows NT/2000/XP WorkStations.
http://www.beyondlogic.org/solutions/remoteprocess/BeyondExec.htm (1 of 10)13/02/2008 16:42:25


Usage: terminal \\computer [-options] [program/arguments]
-u Administrator Account Name on Remote Machine.
-p Administrator Password.
-s Use System Account.
-i Allow Process to Interact with Desktop.
-t Terminate Process after x Seconds.
-q Priority. Use {AboveNormal, BelowNormal, HighPriority,
Idle, Normal, Realtime}
-c Copy File to Remote Computer before Executing. (Default Security)
-cs Copy File to Remote Computer before Executing. (Set Security)
-w Don't wait for Process to Finish, Return Immediately.
-b Bypass Remote Driver Checks. (Assumes Driver is Already Running.)
Shutdown Options.
-d Down Computer, e.g. -d Shutdown.
Use {Shutdown|PowerOff|Reboot|Suspend|Hibernate|...
Logoff|LockWorkstation}
-f Force Applications to Terminate.
-m Message for Display to User.
-l Duration to Display Message for. Default is 60Sec
-x Prevent user from Cancelling Shutdown. (Grey Out Button)
-n Ignore Computers in Use.
Multiple Computers
-g Use Multiple Computers Specified by a Group File.
Uninstall
-r Stop and remove the Beyondexec Driver on Remote Computers.
Executing remote processes
To execute a process on a remote machine the command line parameters takes on the following format
beyondexec \\computer [-options] [program/arguments]
where \\computer is the name of the target computer followed by any switches and the program to be executed. Any
switches or command line parameters after the specified program is assumed to belong to the remote process and will
not effect the functioning of Beyondexec.
Alternatively you may have a requirement to run the same task on multiple computers. A group file can be specified
containing the names of the computers you wish to target. In this case the command line takes on the following
format,
beyondexec -g computers.grp [-options] [program/arguments]
where computers.grp is a plain text file containing the name of each computer listed on a new line.
If a program or remote process is not specified, the command line interpreter (cmd.exe) is spawned allowing the user
to access the remote computer simular to that of a telnet session. e.g.
C:\>beyondexec \\neptune
BeyondExec V2.05 - Spawn Remote Processes on Windows NT/2000/XP WorkStations.

[neptune] BeyondExec service already installed on remote machine.

[neptune] Command Successfully Issued to neptune on Pipe 1.

[neptune] Process started, ProcessID = 1444, ThreadID = 1440
Microsoft Windows 2000 [Version 5.00.2195]
(C) Copyright 1985-2000 Microsoft Corp.
C:\Winnt\System32>vol
Volume in drive C is Win2k

Volume Serial Number is E43E-47F3
C:\Winnt\System32>exit
[neptune] Process terminated with exit code 0 after 00:00:23.922s
If beyondexec is not executed with in an account that has the same administrative username and password than on
the remote computer, a standard windows networking dialog box will appear asking for a username and password for
an account that has administrator rights on the remote computer. As this action will halt beyondexec until a password
is entered, it is not suitable for batch jobs. For batch jobs a user account and password can be specified in clear text
using the -u and -p switches.
Beyondexec defaults to running the process in the account it uses to connect. e.g. if you connect to the remote
computer using the administrator account, the process will run in the administrator account on the remote machine. If
there is a need to run the process in the context of the system account (NT AUTHORITY\SYSTEM) you can specify
the -s switch. By default the process cannot interact with the desktop or user. Specifying -i allows the process to be
interactive permitting the display of windows and dialogs. Care should be taken using this option as the currently
logged in user can take control of the process which can be running at elevated system or administrative rights.
To prevent rouge processes from sitting zombie on remote machines, a timeout can be specified. If the process is still
executing (perhaps waiting for user input etc) after this period it will be terminated. This option is specified using the -t
switch followed by the number of seconds (Max Value 4,294,967,296 seconds ~136 years.) By default, Beyondexec
will wait for a process to finish before returning control on the initiating computer. To prevent beyondexec from waiting
for the process to finish, the -w switch can be used.
Quite often you may want to run a process which isn't installed or on the filesystem of the remote machine. One option
is to use net use \\computer drive: to map a drive to an external location. Another option is to get beyondexec to copy
the file to the remote computer for you. Specifying the -c switch will do just this, copying the file to \\[Computer]\ADMIN
$\temp\ on the remote computer and executing it from this location. ADMIN$ is \winnt or \windows depending if you
have Windows 2000 or Windows XP respectively.
Shutdown Options
The shutdown options can be used in conjunction with executing a remote process, or it can be specified as a
standalone event. When specified with a process, the remote computer will attempt to shutdown/reboot/log off etc
once the specified process terminates, or if the process exceeds the time period granted (-t). If a shutdown option is
specified without a remote process, the shutdown event will occur immediately. This is useful for shutting down groups
of computers.
The shutdown method is specified by the -d [action] switch. Valid options are shutdown, reboot, suspend, hibernate,
logout and lockworkstation all case insensitive. The shutdown option will attempt to powerdown your computer should
it support power management. The suspend and hibernate options only function as desired if your hardware and OS is
set up to support it. The lock workstation option is included as some organisations have policies to lock workstations in
the event of the fire alarm etc preventing the thief of sensitive data. LockWorkstation, Suspend & Hibernate functions
are not supported on Windows NT 4.

The shutdown option will issue quit messages to applications causing them to ask to save files etc. Quite often some
machines can be consumed with zombie processes which need a little more of a kick to kill them. If this is the case the
-f switch can be used in conjunction with -d to force applications to cancel. This option should be used with caution to
prevent losing un-saved work, but can guarantee the computer will successfully terminate any non responsive
applications.
Beyondexec has a option to inform the user about the shutdown action in progress using the -m switch. This could
include messages such as "A new virus definition file has been installed on your workstation. Please reboot your
computer as soon as possible so these new signatures can take effect" or you could use a scheduler to send the "Due
to large increases in electricity prices, staff are reminded to switch their computers of at night" message at 6pm each
night. If the user has already gone home, but left their workstation on it would be shutdown to conserve power. Should
a user be working back late, they can click the cancel button and continue working. Alternatively you may choose to
add the -n switch which ignores computers which have logged on users. With this switch you can shutdown all your
idle computers without annoying other users who are logged in.
The shutdown message is displayed to logged on users for a default of 60 seconds. This gives the user the option to
cancel the shutdown and continue working. If no user is currently logged into the workstation, the dialog box will
appear in front of the login screen so confusion doesn't occur if a user logs in and finds the workstation reboots during
the log in process. The length of time the dialog is displayed for can be specified in seconds after the -l switch. If a
zero is specified, the dialog box is inhibited and the shutdown action occurs immediately without the user granted the
option of cancelling the action.
Are you looking for a simular shutdown utility for use with a scheduler on the local computer? If so, look no further than
the Beyond Logic Shutdown Utility for NT/2000/XP. By popular demand, we have extracted the shutdown module of
BeyondExec and placed it in it's own 45kb executable for standalone use. Just the thing to replace the shutdown.exe
utility found in the Windows 2000 Professional Resource Kit or in Windows XP.
Running with Multiple Computers
With the introduction of BeyondExec version 2 comes support for multiple computers. Prior multi-computer support
was limited to batch files which didn't multithread and consequently took long periods of time as each target machine
was sequentially interrogated. Long delays were especially evident when interrogating machines that were switched
off. The multithreading support in version 2 will talk to up to 10 computers simultaneously significantly speeding up
group batch jobs.
Multiple computer support comes in the form of a group file. This is nothing more than a text file which includes the
name of each computer on a new line. This gives the flexibility to have multiple group files such as accounts.grp,
dispatch.grp or lab88.grp etc. Text files can also be stored with the Beyondexec executable on network drives which

can be accessed at multiple workstations. Competing software often requires the use of a network browser to select
each computer and saves it in the registry decreasing flexibility and portability between machines.
Uninstalling
When BeyondExec is used with a remote computer for the first time, it copies and installs a service on this computer.
This service is rexesvr.exe which can be found in /system32/. Should for any reason you want to remove this service
from the remote computer you can use the -r option.
It can also be specified on the command line along with a process to execute. In this case, the service is installed, the
desired application executed and the driver removed without a trace. Note however if you specify this option in
conjunction with a shutdown action, then the driver will be stopped before the shutdown action can complete.
Permanent Installations
By default this service is not automatically started upon each boot. However in situations where it is frequently used, it
may be permanently installed on the remote computer and scheduled to start on each boot. The -b switch can then be
used to bypass the checking and installation of the driver saving time.
Trouble Shooting
Communication with remote machines
The InoculateIT virus scanner (versions 4.0, 4.5, 6.0 on WinNT, Win2000, WinXP) will effect the correct
operation of outgoing named pipes on the host (initiating PC) causing a message simular to
[mars] Cannot open \\mars\pipe\beyondexec-dispatch

[mars] BeyondExec service not running on remote computer or
[mars] remote computer is unavailable.
or
[mars] Cannot open \\mars\pipe\beyondexec1-stdin

[mars] Error 0xE7 : All pipe instances are busy.
The scanner doesn't effect the operation of the beyondexec service on the remote computers, thus the
scanning of outgoing files can be suspended on the workstation/server you intend to initiate jobs from.
This is a bug with InoculateIT. Computer Associates has released a driver patch for InoculateIT which fixes this
named pipe handling bug. (You can use beyondexec to patch all your systems.)
Missing ADMIN$ Shares
When running BeyondExec for the first time on a specific computer I get the following message -
[mars] BeyondExec Service (rexesvr.exe) copy failed.

[mars] Error 0x35 : The network path was not found.
[mars] Cannot Start Service on Remote Computer
or

[mars] BeyondExec Service (rexesvr.exe) copy failed.

[mars] Error 0x43 : The network name cannot be found.
BeyondExec uses the hidden ADMIN$ share to copy the rexesvr service to the remote machine. Some sites
choose to remove this share for security purposes. Check that the hidden share ADMIN$ is present on the
target computer.
314984 HOW TO: Create and Delete Hidden or Administrative Shares on Client Computers
Locked Workstations
When a workstation is locked, the shutdown, reboot and logout actions will not function correctly unless the -f
(force applications to terminate) switch is specified. The suspend and hibernate actions will function correctly on
a locked workstation. This is a problem associated with the ExitWindowsEx() API provided in Windows.
Mapping Network Drives
When using net use h: \\neptune\data /USER:Administrator Password to map a shared drive
with beyondexec, the following error may result
C:\>net use h: \\neptune\data /USER:Administrator Password

System error 1312 has occurred.
A specified logon session does not exist. It may already have been terminated.
BeyondExec impersonates the administrator who connected to the service. As a result BeyondExec can
impersonate the client's security context on the local system, however it cannot impersonate the client on
remote systems. A solution around this to use the full domain\username. e.g.
C:\WINDOWS>net use h: \\neptune\data /USER:neptune\Administrator Password

The command completed successfully.
Beyondexec runs in its own session, thus any network drives mapped by other users or in other sessions are
not available. This is also true when the administrator is logged in and you are running with the same
credentials.
Powerdown on Windows NT 4 / Soft-Off
Windows NT 4 can be made to switch itself off after shutdown should your computer supports power
management. When Service Pack 6/6a is extracted you will find a hal.dll.softex file. If you replace \winnt
\system32\hal.dll with a copy of this file, using -d poweroff with beyondexec will shutdown and poweroff your
ACPI Windows NT 4 Workstation. Failure to replace the hal.dll will result in the poweroff action rebooting your
Windows NT computer.
Distributing Registry Keys : If I run <regfile>.reg nothing happens.
If you try to add a registry file to the remote computer's registry using <regfile>.reg on the command line,
registry editor is spawned an is waiting for the user to answer Yes or No to "Are you sure you want to add the
information in <regfile>.reg to the registry?". To prevent this occurring you need to use the /S switch (Silent)
with regedit. e.g. regedit /S <regfile>.reg
When communicating with Remote Windows XP machines, BeyondExec will not accept the

Administrator Password
Please ensure the Network access : Sharing and security model for local accounts is set to Classic local
user authenticates as themselves This can be found in the Local Security Settings, Local Policies. Note that
this policy is enabled to Guest only local users authenticate as guest by default for a computer running
Windows XP Professional that is joined to a workgroup.
BeyondExec will not accept my blank Administrator Password
[mars] Establishing Connection . . .

[mars] Error 0x52F : Logon failure: user account restriction.
This is normal operation on Windows Workstations with a blank Administrator Password. Windows will not allow
a network connection if the password is blank. Please set your password to something more secure in order to
use Windows Networking and hence BeyondExec.
Example : How can I use Beyondexec to distribute Windows NT 2000 SP4?
Running w2ksp4.exe /? brings up the following switches which can be used to help distribute the service pack.
-u Unattended mode.
-f Force other programs to close when the computer shuts down.
-n Do not back up files for uninstallation.
-o Overwrite OEM files without prompting.
-z Do not restart when installation is complete.
-q Quite mode (no user interaction).
-l List installed hotfixes.
-s:<dir> Intergrate Service Pack files into <dir>.
-d:<dir> Back up files onto <dir>.
The following command installs the Windows 2000 SP4 on the remote computers in quite mode. While we do
not use beyondexec's -i switch to interactivity display the process on the users desktop, we ask the service pack
to run in quite mode so it doesnt prompting for input, effectively halting the process. We choose not to back up
the files for un-installation and do not allow the service pack to reboot the computer. When the service pack
reboots the computer the user gets no warning. Instead we get beyondexec to tell the user that the service pack
has been installed on the computer and that it requires rebooting. This will initiate a count down giving the user
60 seconds to cancel the shutdown before the computer reboots. However if no user is present, e.g. after hours
the computer will reboot to complete the service pack.
c:\>beyondexec -g office.grp -c -d reboot -m "Service Pack 4 has been installed on

your computer.
Could you please reboot you computer as soon as practically possible" g:\temp
\w2ksp4_en.exe -q -n -z
This command line copies the 132MB service pack to the remote computer before it is executed. After the
service pack has been installed, beyondexec deletes the file from %system%\temp to free up this room.
Depending upon your network, you may choose to install the service pack from a network drive.
Example : How can I use Beyondexec to distribute Internet Explorer 6, SP1?

The first set to installing Internet Explorer 6 SP1 is to customise the install to your site. This is done by
downloading the Microsoft IEAK (Internet Explorer Administration Kit) 6. This allows the Administrator to set up
policies, restrictions, proxy settings etc which will be installed for ALL users.
As Internet Explorer doesn't come in a single file, you may choose to install it from a network drive. In this case
create a batch file named ie6sp1.bat or simular and add the following lines :
net use z: \\<Server>\ie6sp1 /USER:<ServerDomain>\<Username> <Password>

z:\ie6setup /q
If you run ie6setup /? it will display a number of switches you can use. /q is to install Internet Explorer in quite
mode.
Then you can use beyondexec to copy this batch file to the remote computer and start it running
beyondexec -g office.grp -cs ie6sp1.bat
where office.grp contain the names of the computers you wish to distribute ie6 onto. The -cs sets the security of
the ie6sp1.bat file so only the Administrator has rights to read and access the file.
Beyondexec can only copy the one file to the remote workstations. How can I copy more?
If you need to copy addition files to your remote computers you may consider using a batch file such as
distribute.bat. Distribute.bat contains the following :
@echo off
For /F %%i IN (%1) DO xcopy /o %2 \\%%i\c$\%3
and will read .grp files used with BeyondExec. To copy the folder c:\winnt\temp\setup to the same place on the
multiple computers use :
distribute computers.grp c:\winnt\temp\setup \winnt\temp\setup
The batch file uses the C$ hidden share and assumes you have the same passwords across all workstations.
Download
Revision History
20th September 2003 - Version 2.05
Removed problem preventing UNC paths being used to execute programs.
Added support to remove file from remote machine after it has been copied using the -c switch.
Added extra switch -cs which copies the file to remote computer with sole Administrator or System rights.
This is good for batch files which contain confidential information, preventing users from viewing the
contents.
Added -q switch to set process priority. Acceptable values are AboveNormal, BelowNormal, HighPriority,
Idle, Normal, Realtime.

Added the ability to modify the security descriptor on the pipes allowing explicit users to use the service
rather than only members of the Administrators Group.

Removed references to user group names allowing support for International versions of Windows. For
example versions prior to 2.04 failed on German Windows as the Administrators Group is called

Administratoren.
Improved support for computers not switched on or present. BeyondExec will no longer block as long

waiting for a response from a non-existent computer. Any blocking present now is a feature of Windows
and not BeyondExec.
18th March 2003 - Version 2.03
Checks file version of service installed on remote computer and updates it accordingly. This omits the need
to use the -r switch prior to updating to a new version and alleviates problems when some clients are
updated and others are forgotten.
Processes running with an Interactive Desktop are now given the correct security privileges to the
WindowStation and Desktop. This caused interactive processes spawned on Windows XP to show only an
ghostly outline on the desktop.
Precopy file (-c) now replaces files if they already exist in the temp directory of the target machine.
Versions prior reported an error requiring the user to manually delete the file in order to update it.
Fixed parsing of precopy file parameters so files can now be copied to the remote machine and executed
with parameters. e.g. beyondexec \\mars -c "process.exe -q notepad.exe"

Added (-n) switch to ignore shutdown proceedings on computers with logged in users.
Rewritten functions so as to re-instate support for Windows NT4 due to popular demand. Tested on
WinNT4 SP6a.
Added poweroff shutdown action for support with Windows NT 4's hal.dll.sofex hardware abstraction layer.
Increased DACL Security on Pipes to Support Windows NT 4.
18 February 2003 - Version 2.02

Added ability to disable cancel button (-x) preventing users from aborting the shutdown action.
Ensures cancel notification dialog box appears on active desktop. When workstation was locked, dialog
would appear on the default (applications) desktop.

11 February 2003 - Version 2.01
Fixed Win2k/WinXP %SystemRoot% compatibility problems.
Included a work around for Windows ExitWindowsEx bug where a call to logoff an user on a workstation
that has no logged on user will cause the workstation to reboot.

20 January 2003 - Version 2.0
Improved reliability and error handling with networked connections.
Added option to terminate rouge processes after a specified number of seconds.
Ability to bypass driver checks speeding up access on frequently used machines.
Added shutdown options allowing the Shutdown (Powerdown), Rebooting, Suspending, Hibernating,
Logging Off and Locking of Workstations with the ability to display a message to the user for a specified
number of seconds.
Multithreaded both server and client applications.
Added group option allowing the one action to be sent to all computers listed in the specified group file.
Added option to stop, and remove driver from client machines.
Discontinued NT4 Support.
1st November 2002 - Version 1.0

First release to public. Supports NT4/2000/XP
Beyond Logic Shutdown Utility for NT/2000/XP

The Windows 2000 Professional Resource Kit and Windows XP introduce a shutdown.exe command line utility to
shutdown local computers. However a quick play with these utilities will fine that they are less than adequate. The
Beyond Logic shutdown.exe actually powers down computers while giving your users the option of cancelling the
operation or allowing you to only target computers without a logged on user.
Allow users to run trusted applications from defined directories, while preventing the execution of non-trusted programs
from floppy disk and CDROM drives or from the users e-mail attachment directory. Stop PE viruses in their tracks where
on Windows platforms year, nine out of ten of the top viruses were spread via e-mail.


Want a command line utility to view, kill, suspend or set the priority or affinity of processes, perhaps from a batch file?
Kills rouge processes where Window's Task Manager fails.

Bmail is a free but lean command line SMTP mail sender. Bmail allows the user to automate the sending of email
messages containing log files, data downloads or error messages on Win32 based computers.

Have you ever had the need to find, copy or delete files that were owned by a certain user? A great way to back up files
created by previous employees or to clean workstations when one leaves.

A problem that plagues Windows NT/2000/XP, is it's strict control over I/O ports. Unlike Windows 95, 98 or ME, Windows
NT/2000/XP will cause an exception (Privileged Instruction) if an attempt is made to access an I/O port that your program
is not privileged to access. The PortTalk driver allows existing programs to access selected I/O ports.
Win32 Pipe Security Editor Windows NT/2000/XP

Do you know what named pipes you have on a system, quietly advertising for something to connect to it? Do you know
how secure each pipe is, whether the associated security descriptor is strong enough?. The Win32 Pipe Security Editor is
the ideal tool for checking the security of your own pipe servers or to set up auditing of existing pipe servers.

Want a quick console utility to display the hardware specifications of a PC including Processors Type, Operating System
and Service Pack, Physical and Virtual Memory, Network Addresses, Logical Drive information, Video Card Type, Hard
Disk, CDROM and Printer Information.

Command Line SMTP Mailer for Windows

2008
Command Line SMTP Mailer for Batch Jobs
Bmail is a free but lean command line SMTP mail sender. Don't get fooled into playing $$$ for huge executables.
Bmail allows the user to automate the sending of email messages containing log files, data downloads or error
messages on Win32 based computers. Together with the freeware utility mpack, you can also send MIME
encoded attachments.
C:\>bmail -s mars -t cpeacock@max -f root@neptune -h -a "Data Download Script

is not Working Correctly" -b "The script on neptune has stopped getting data"
Command Line SMTP Emailer V1.07

Opening connection to mars [192.168.0.10] on port 25
220 mars ESMTP Postfix (Release-20010228)
250 Ok: queued as 04168186A7
Bmail has the following options -
C:\>bmail /?

Usage: bmail [options]
-s SMTP Server Name
-p SMTP Port Number (optional, defaults to 25)
-t To: Address
-f From: Address
-b Text Body of Message (optional)
-h Generate Headers
-a Subject (optional)
-m Filename (optional) Use file as Body of Message
-c Prefix above file with CR/LF to separate body from header
-d Debug (Show all mail server communications)
The mail server name, To: Address and From: Address fields are mandatory. Multiple recipients can be specified
after the -t by separating them by a comma. The SMTP port number is seldomly used, but can be used to force
mail to be sent to a non standard port. The user has two choices for specifying the body of the message. If a single
line body is all that is required, it can be specified on the command line using the -b option. In this case you may
want to also use -a to specify a subject and -h to add TO: and FROM: headers to the body of your message.
However if a larger message body is required, such as a pre-formatted text email, log file, data file or a mime
encoded attachment etc then the body of the message can be read from a file. The file can be specified by the -m
switch. In this case the user can choose to use the -h, -a and -b switches in conjunction with the file, or manually
http://www.beyondlogic.org/solutions/cmdlinemail/cmdlinemail.htm (1 of 4)13/02/2008 16:42:57

enter these headers to the top of your file.
Usage Examples
Below are just some examples showing the use of bmail.
If you simply need to send a quick one line email you can use the following example,
C:\>mail -s smtp.server -t cpeacock@max -f root@neptune -h -a "Subject e.g.

Fatal Error"
-b "Body of message e.g. Fatal Error occurred in cgi script, secure.cgi"

250 Ok: queued as B952E42C6F
Pipes can be utilised to redirect stdout from a process(s) to a log file, then send this file as the body of the
message should an error result.
C:\>[ Some Process ] > stdout.txt

C:\>if errorlevel 1 bmail -s smtp.server -t cpeacock@max -f root@neptune -h -
a "Process
Dump" -m stdout.txt -c

250 Ok: queued as 4AFD1186B7
Note should be taken of the -c switch which separates the body from header with a CR/LF combination. While with
most mail clients it doesn't make any difference, some versions of Outlook will display an empty body, treating
your stdout.txt body as part of the header.
With mpack you can use bmail to send mime attachments.
C:\>echo Please find attached today's build of mail.exe > body.txt

C:\>mpack -s "Today's Build" -d body.txt -c application/exe -o body.msg mail.
exe
C:\>bmail -s smtp.server -t cpeacock@max -f root@neptune -h -m body.msg

250 Ok: queued as 485CB186A7
Download

Revision History
3rd May 2004 - Version 1.07
Fixed daylight saving bias problem in date headers.
Fixed problem where bmail would not exit on all errors such as 552: Mail Box Exceeds Limit etc.
22nd February 2004 - Version 1.06
Added the current time and date to the headers (-h switch).
Modified the parsing of the to: and from: email addresses to improve compatibility.
28th February 2003 - Version 1.05
Feedback from Outlook/Exchange users V1.04 confirmed fixes non display of body. Yay, but. .
Broke MIME Encoded Attachment functionality in the process.

Added -c switch to control the CRLF prefixing the body.
Prefixed body with extra CRLF to assist MS Outlook in displaying correct body of message.
Prefixed body with extra CRLF to assist MS Outlook in displaying correct body of message.
Fixed "unknown" server name problem in response to HELO.
2nd February 2003 - Version 1.02
Added hidden -d (debug) switch to options. This displays all
transactions with the mail server to the screen or you can pipe it to a file.
19th December 2002 - Version 1.01
Increase buffer size to allow compatibility with a wide range of mail servers.
16th December 2002 - Version 1.0

programs from floppy disk and CDROM drives or from the users e-mail attachment directory. Stop PE viruses in their
tracks where on Windows platforms year, nine out of ten of the top viruses were spread via e-mail.

Want a command line utility to view, kill, suspend or set the priority or affinity of processes, perhaps from a batch file?
Kills rouge processes where Window's Task Manager fails.

Have you ever wanted to run a process such as an application installer, service pack, virus signature update etc or
shutdown a single or group of remote computers without having the burden of installing any remote client on your
target computers?

Have you ever had the need to find, copy or delete files that were owned by a certain user? A great way to back up
files created by previous employees or to clean workstations when one leaves.

A problem that plagues Windows NT/2000/XP, is it's strict control over I/O ports. Unlike Windows 95, 98 or ME,
Windows NT/2000/XP will cause an exception (Privileged Instruction) if an attempt is made to access an I/O port that
your program is not privileged to access. The PortTalk driver allows existing programs to access selected I/O ports.

Want a quick console utility to display the hardware specifications of a PC including Processors Type, Operating

System and Service Pack, Physical and Virtual Memory, Network Addresses, Logical Drive information, Video Card
Type, Hard Disk, CDROM and Printer Information.
SMART & Simple for NT/2000/XP

A small and simple utility to instantly view the SMART (Self-Monitoring Analysis and Reporting Technology) attributes
of Hard Disk Drives without first requiring installation.

Wednesday, February
13th, 2008
Have you ever had the need to copy or delete files which were owned by a certain
user?
The Delete-by-Owner (delbyown.exe) Command Line Utility will scan a NTFS or secure
Windows Network file system for files which has an owner matching the one specified.
Matched files may be copied to a designated location or deleted.
For example, you have just had a staff member leave your organisation. You would like
to back up all their files, however many of them are scattered between project folders
and programs across the file system. You have no idea which files were created by this
user. However as this staff member has their own login, and any files created would be
also be owned by them, you can search the file system for files belonging to the staff
member and have them copied to a folder for safe keeping.
delbyown -c h:\backup -r -o harryc -e c:\winnt\profiles c:\*.*
On the other hand you have a public access machine and it's common for users to store
files or create folders just about anywhere on the machine. You can restrict the ability to
do so with normal security permissions, but you don't want to go overboard and
decrease productivity. As the machine was prepared as an Administrator and all the
software has been installed as Administrator you can delete all files not owned by the
Administrators group. You could choose to schedule this action on a regular basis.
delbyown -d -r -o !Administrators -e c:\winnt\profiles c:\*.*
Usage
The Delete-by-Owner utility has the following settings:
http://www.beyondlogic.org/solutions/delbyowner/delbyowner.htm (1 of 4)13/02/2008 16:43:08

Delete/XCopy by Owner V1.01

Usage: delbyown -c [path] -r -o [owner] -e [exclude path] file
delbyown -d -r -o [owner] -e [exclude path] file
delbyown -t -r -o [owner] -e [exclude path] file
-c Copy Files to [destination path.]
-d Delete Files.
-t Test/Display files matching owner.
-e Exclude [Directory].
-o Owner [Account/Group Name].
Accepts not operator e.g. !Administrators
-r Recursive.
The -c copy, -d delete and -t test switches control what operation will be performed. The
test switch simply displays the files that match the owner and is a good way of viewing
what files will be targeted or simply as to find which files are owned by a certain user.
Quite often you may wish to exclude a directory. e.g if you are deleting stray files which
public users have created, you may wish to skip the users' profile. For example c:\winnt
\profiles may be excluded on Windows NT machines, and c:\Document and Settings
from Windows 2000 and Windows XP Workstations.
The -o switch specifies the owner of the file to match against. All operating system files
are normally owned by the Administrators group. As the utility accepts the not operator,
you may choose to use -o !Administrators to delete all files not owned (i.e not installed)
by the Administrator. This should be a good start to tiding up the machine up.
If no -o switch is specified, the utility will retrieve the security descriptor for all the files,
but will not match it with an owner and subsequently perform any operations. This is a
good way to test for any corrupt security descriptors. They should be reported with a
message such as
Error 0x539 : The security ID structure is invalid.
The utility accepts all the normal wildcards. You may choose to only delete *.doc files
owned by cpeacock e.g.
delbyown -d -r -o cpeacock c:\*.doc
or only files in the c:\program files group
delbyown -d -r -o cpeacock "c:\Program Files\"

The -r recursive switch should be self explanatory. It allows the utility to search in any
subdirectories it finds.
Download
Revision History
5th June 2003 - Version 1.02
Improved parsing of path/file/wildcards.
Changed "Deleting files matching" to accurately display action
whether it be deleting, testing or copying.

2nd May 2003 - Version 1.01
Improved error reporting for corrupt security descriptions, unnamed
accounts/groups etc
22nd April 2002 - Version 1.00

Allow users to run trusted applications from defined directories, while preventing the
execution of non-trusted programs from floppy disk and CDROM drives or from the
users e-mail attachment directory. Stop PE viruses in their tracks where on Windows
platforms year, nine out of ten of the top viruses were spread via e-mail.

Want a command line utility to view, kill, suspend or set the priority or affinity of
processes, perhaps from a batch file? Kills rouge processes where Window's Task
Manager fails.
BeyondExec - Spawn Processes and/or Shutdown Remote Windows NT/2000/XP

WorkStations.
Have you ever wanted to run a process such as an application installer, service pack,
virus signature update etc or shutdown a single or group of remote computers without
having the burden of installing any remote client on your target computers?

Bmail is a free but lean command line SMTP mail sender. Bmail allows the user to
automate the sending of email messages containing log files, data downloads or error
messages on Win32 based computers.

A problem that plagues Windows NT/2000/XP, is it's strict control over I/O ports. Unlike
Windows 95, 98 or ME, Windows NT/2000/XP will cause an exception (Privileged
Instruction) if an attempt is made to access an I/O port that your program is not
privileged to access. The PortTalk driver allows existing programs to access selected I/
O ports.

PDIUSBD11 USB Peripheral with I2C Serial Interface
Features
The PDIUSBD11 USB Device with Serial Interface from Philips Semiconductor allows almost any
microcontroller the option of having a USB Interface. Being a full speed device, it allows USB transfer
2
modes including Control, Bulk and Interrupt. It doe not support Isochronous. Its I C Interface can be
1
clocked at a maximum of 1Mbit/s with a theoretical maximum transfer of 568KB/s , thus makes
communication between the microcontroller and PDIUSBD11 quite a bit slower than the 12Mbits/s
achievable with a full speed USB device.
The PDIUSBD11 is a 3.3v device with 5V tolerant I/O. Dont let this put you off when considering your
design. A small low powered 3.3Volt regulator is all that is needed to interface to your 5V logic. The I/O
pins are open drain, thus using pull up resistors to 5V, a 0 to 5v logic output is obtainable. Unlike other
USB peripheral ICs such as Nationals USBN9602 which require a 48Mhz crystal, the PDIUSBD11 uses a
in-built PLL to derive its internal 48MHz from a 12MHz Crystal. Not only does this make it cheaper as
48MHz crystals are hard to obtain, but it also helps reduce EMI.
But with all these positives, there must be some negatives. Lack of documentation is one. Philips gives no
sample circuits in their data sheet, makes little effort to describe any supporting passive components
around it and assumes you will consult the USB Specification for most data. After numerous contacts, and
reading between the lines a basic circuit can be sought. What is more worrying is the software. Philips has
left out critical initialisation information regarding the disabling of the HUB, and has repeatedly specified
wrong commands for the clearing of interrupts. It would be almost impossible to get the PDIUSBD11 going
from just the data sheet alone.
Oscillator
As discussed, the clock is generated by a 12MHz Crystal. The data sheet suggests that no external
components other than the crystal are needed. This is true in many cases, however Guy Jaumotte from
Philip Semiconductor states they are not needed, but are used to guarantee start-up. Its definitely much
easier to add them rather than argue and have oscillator problems later down the track. When designing a
board, its wise to place pads for the capacitors even if you do not add them during manufacture.
USB Termination Resistors
The data sheet would suggest some series termination resistors are required to connect the transceiver to
the USB Cable. This is the classic case where Philips expects you to look up the USB Spec, with little
knowledge of whats actually in the PDIUSBD11. 22ohm 1% resistors have been used in this example,
but its suggested that anything from 22ohms to 44ohms can be used. Their purpose is impedance
matching of the bus. The analog input pins, have an internal pull down resistor of approximately 15K and a
TM
software selectable pull up resistor to D+, known as SoftConnect .
VBUS
VBUS is used to detect a connection to the USB Bus. Without a presence, the PDIUSBD11 doesnt generate
any interrupts or returns a status. VBUS is also used to enable SoftConnect should SoftConnect be enabled
using the Set Mode command. The PDIUSBD11, being 5V tolerant will allow the VBUS pin to be connected
directly to the 5V Bus power supply. However being a 3.3V device, its wise to use a voltage divider
network to obtain 3.3v for the VBUS Pin. However as we will discover complications will result in suspend.
The PDIUSBD11 is 5.5 Volt tolerant (see Data sheet) so you can connect directly the Bus power supply line to the
VBUS pin. However the device Vcc is 3.3 Volt so it make sense to connect the Bus power line via a divider network.
Any combination of resistor will do providing that take into account the maximum voltage drop allowed on Vbus(See
USB specs), the minimum voltage that is recognised as a HIGH in 3.3Volt technology (approx 2Volt) and the maximum
consumption allowed in suspend mode (500microAmp). In a Self power mode, the pin consumes 1 microAmp and you
have to take into account the bus divider network consumption [Vbus - 1.5KOhm - D+ - 15KOhm - GND]
Guy.Jaumotte@Philips.com
Using the PDIUSBD11 April 2002 www.beyondlogic.org

PDIUSBD11 Pin Descriptions
Pin Pin Name Type Description

1 Test Input For normal operation connect to ground.
2 Reset_N Schmitt Trigger Input Reset. PDIUSBD11 provides internal reset circuit, thus may be tied
directly to VCC should an external reset not be needed.
3 XTAL1 Input Connect to 12Mhz Crystal. While the PDIUSBD11 is designed not to
require any additional circuitry, a capacitor (~22pF) to ground will
help guarantee start-up.
4 XTAL2 Output Connect to 12Mhz Crystal. While the PDIUSBD11 is designed not to
require any additional circuitry, a capacitor (~22pF) to ground will
help guarantee start-up.
5 ClkOut 3mA Output Programmable Clock Output. This output defaults to 4MHz which can
be used to clock a microcontroller. This pin will stabilise after 1mS
from power-on and 320S after suspend. If this output is used to
control a microcontroller, care should be taken to ensure the C
comes out of reset after 1mS by using a suitably timed RC network.
6 VCC Power Connect to a 3.3V supply with a tolerance of 0.3Volts.
7 Suspend Bi-Directional This pin is bi-directional, not an output only as the PDIUSBD11 data
OD 6mA Sink sheet states. This line can be tied low to prevent the PDIUSBD11
from going into suspend, or pulled low during suspend to wake up the
PDIUSBD11.
8 INT_N OD Out 6mA Sink Interrupt Output. Interrupt is level sensitive and will go low on an
interrupt occurring and return high once all interrupts have been
cleared. Most microcontrollers will accept only an Edge Sensitive
Interrupt, thus care should be taken at the end of the Interrupt
Service Routine, to check that all interrupts have been dealt with
before returning from interrupt. The other option is to poll the INT_N
Pin.
2
9 SDA OD I/O 6mA Sink I C Serial Data. Bi-directional pin. Use a pull up resistor if talking
directly to a C or follow the I C Specifications for connection to an
2
2
I C Bus.
2
10 SCL OD I/O 6mA Sink I C Serial Clock. Bi-directional pin. Use a pull up resistor if talking
directly to a C or follow the I C Specifications for connection to an
2
2
I C Bus.
11 GND Power Ground.
12 DP AI/O USB D+ Connection. Series termination resistors (22 1%) are
required for impedance matching of USB Bus. The USB Spec 1.1
states that the impedance of each driver is required to be between 28
and 44. The PDIUSBD11s Drive Output Resistance is 29 to 44
max provided 22 1% series resistors are used.
13 DM AI/O USB D- Connection. Series termination resistors (22 1%) are
required for impedance matching of USB Bus. The USB Spec 1.1
states that the impedance of each driver is required to be between 28
and 44. The PDIUSBD11s Drive Output Resistance is 29 to 44
max provided 22 1% series resistors are used.
14 AGND Power Analog ground
15 AVCC Power Analog Supply 3.3V 0.3Volts. Normally connect to VCC through
some suppression to isolate any digital noise.
16 VBUS Input USB Power Sense. Full speed devices are identified by pulling D+ to
3.3V 0.3 Volts via a 1.5k 5% resistor. This is build into the
TM
PDIUSBD11 as part of Philips SoftConnect Technology. However
any USB device is not allowed to supply power to the USB Data lines
when the power has been removed, Thus the requirement of the
PDIUSBD11 to sense the USB Power line. While this pin is 5V
tolerant, it is normally connected to VBUS via a divider network to
reduce it to 3.3volts. Recommended values are 680k & 320k.

Example Schematic
3.3V
Ferrite Bead
C5
R6 0.1uF
320K
VCC VCC VCC VCC
U1
R11 10K
R10 4K7
R7 C3 C6
R8 4K7
R9 4K7
PDIUSBD11 +3.3V
680K
0.1uF 1uF 6 2
VCC RESET
15 5
AVCC CLKOUT
USB1
VCC 16 7 O.D.
1 VBUS SUSPEND Suspend
D- R4 22 13 8 O.D.
2 D- INT INT
D+ R5 22 12 9 O.D.
3 D+ SDA Data
GND 14 10 O.D.
4 AGND SCL Clock
Type B 3 1
OSC1 TEST
4 11
OSC2 GND
Contact No. Signal Name
1 VCC
2 - Data X1 12Mhz
3 + Data C1 C2 VCC U2 78L033 3.3V
4 GND 22pf 22pf 1 3
Vin Vout
USB Contact Numbers per USB1.1 Spec
G
+ C8 + C7 C4
Receptacle Series A Receptical Series B
10uF 10uF 0.1uF
2
2 1
1 2 3 4 3 4
TM
SoftConnect
Note that the USB specification calls for a 1.5k 5% (1425 to 1575) pull up resistor on D+. Philips
specifies a SoftConnect pull up resistor with a range of 1.1k minimum and a maximum of 1.9k which
has a tolerance closer to 30%, than the USB Specs 5%. Philips specifies this in their data sheet ensuring
the design engineer that VSE voltage specification can still be meet and the end designer lies with the
option of using it or not.
Essentially if you use SoftConnect, it is out of spec and not USB compliant. You could use you own
termination resistor, but you have to find a 3.3V source to connect it too, bearing in mind that the VBUS is 5
volts. However as you will need a 3.3 Volt 0.3V supply for the PDIUSBD11 in bus powered designs this
should not be a problem. The other consequence of using an external pull up resistor is that it can only be
connected when VBUS is present. The USB specification states that no power can be applied to the data
lines in the absence of VBUS.This is once again not a problem for bus powered designs as you can still
connect it to your regulated 3.3V supply which is derived from VBUS
Self Powered or Bus Powered? Current Budgeting
The PDIUSBD11 doesnt mention much about power consumption. Power consumption is big business
with USB, if you draw too much current, you violate the USB Spec. The PDIUSBD11 draws around 25mA
during normal operation. The data sheet specifies no minimum, maximum or typical values for power
consumption in fully operational nor suspends states!
A USB device specifies its power consumption expressed in 2mA units in the configuration descriptor. A
device cannot increase its power consumption, greater than what it specifies during enumeration, even if it
loses external power. There are three classes of USB functions, low power bus powered functions, high
power bus powered functions, and self powered functions.

Low power bus powered functions draw all its power from the VBUS and cannot draw any more than one
unit load. USB defines a unit load as 100mA. High power bus powered functions draw all its power from
the bus and cannot draw more than one unit load until they have been configured, after which it can then
drain 5 unit loads (500mA Max)
Self power functions may draw up to 1 unit load from the bus and derive the rest of its power from an
external source. Should this external source fail, it must have provisions in place to draw no more than 1
unit load from the bus. Self powered functions are easier to design to spec as there is not so much of an
issue with power consumption.
Bus Powered
During initialisation and enumeration the maximum power drain that USB 1.1 permits is 100mA. As the
PDIUSBD11 consumes approximately 25mA, there is a 75mA excess for the microcontroller and support
circuitry. A low powered device must be capable of operating on a minimum 4.40V to maximum 5.25v at
the plug of the USB device.
However during suspend, additional constrains come into force. The maximum suspend current is
proportional to the unit load. For a 1 unit load devices (default) the maximum suspend current is 500uA.
This includes current from the pull up and pull down resistors on the bus. The PDIUSBD11 drains
approximately 210uA during suspend. Of this approximately 200uA is due to the internal pull up resistor on
D+. This leaves approximately 290uA to play with.
However this is dependent on what we have done with VBUS. If you have used the 680K/320K voltage
divider then you are sinking 5A into the divider network. The input leakage current of VBUS being a digital
I/O pin is 5A max. Guy Jaumotte suggests this figure is closer to 1A typical. Another consideration is the
required 3.3V regulator for bus powered designs.
Suspend Mode
Every USB device must support suspend. However this is another area the data sheet avoids.
The PDIUSBD11 can enter suspend mode in various ways such as,
Selective Suspend Host sends a suspend command to the attached port.
Global Suspend The host suspends its self.
No activity on bus for more than 3 SOF ~ 3mS.
Each 1mS a SOF (Start of Frame) packet should be sent on the USB. This is the responsibility of the host.
When the bus goes into suspend, the SOF every 1mS will seize to exist. The PDIUSBD11 will wait for 3mS
without the presence of a SOF. It will then allow its Suspend pin to go high, signalling to the microcontroller
that it is about to enter the suspend state and to stop finishing any processing and go to sleep. The entire
USB device (PDIUSBD11, MicroController and Support Circuitry) must not drain anymore than 500uA from
VBUS when in suspend. This of course is not so much of an issue for Self Powered devices. 1mS after the
suspend pin goes low, the ClockOut will go into Lazy Clock Output if this feature is selected. These
features are selected by the Configuration Byte as detailed below.
Configuration Byte
No Lazy Clock
Clock Running
Selected Configuration Current Consumed
(Bit 1) (Bit 2)
ClockOut will switch to Lazy Clock Mode (Frequency ~2.5mA
30KHz 40%) 1mS after suspend pin goes high. Internal (External C will run at
0 0 slower speed, reducing
Clock, Crystal Oscillator and PLL will stop during suspend,
current if connected)
consuming less power.
ClockOut will switch to Lazy Clock Mode (Frequency ~25mA
30KHz 40%) 1mS after suspend pin goes high. Internal External C will run at
0 1 slower speed, reducing
Clock. Crystal Oscillator and PLL are always running
current if connected)
regardless of suspend mode.
Internal Clock, Crystal Oscillator and PLL is stopped ~210A
1 0 (Assuming SoftConnectTM
during suspend as a result, ClockOut seizes to run.
Active)
ClockOut stays at its original speed. The Internal Clock,
~25mA
1 1 Crystal Oscillator and PLL are always running regardless
(+ Full load of attached C)
of suspend mode.

The PDIUSBD11 can come out of suspend in two ways
Pull Suspend Pin Low.
Resume Signal from Bus (Downstream to Device)
The data sheet is rather misleading in this area. With the suspend pin specified as an output only and the
resume command saying This command is normally issued when the device is in suspend, one would
assume you would simply send the Resume Command. This is not the case.
If the microcontroller wishes to wake up the PDIUSBD11, it pulls the suspend pin low. The PDIUSBD11 will
come out of suspend, but cant talk on the Bus as there are no SOF Packets every 1mS. To wake up the
Host, the Send Resume command is then sent to the PDIUSBD11.
2
I C Protocol Interface
2
The PDIUSBD11 uses the Philips I C protocol which can be a little daunting if you have never used it
2
before. Unlike other serial buses such as SPI and Microwire which have individual chip selects, I C sends
an address down the bus after a start condition. Only the device which has the matching address will
respond to the following commands until either a restart condition or a stop/start condition is generated
2
again. As I C is multi-master, a restart condition will allow the host to re-issue an address without giving up
its control of the bus. Sending a stop condition means the device no longer requires the bus and should
another device want to talk on the bus, it can generate a start condition and take over as master.
Instead of the PDIUSBD11 having only one address as you would expect, the PDIUSBD11 has three
addresses for simplicity. This allows information about the data to follow e.g. is it command/data or
2
read/write to be efficiently encoded into the address. This is not entirely correct in the context of the I C
specification, as it has two addresses (Command/Data) and a direction bit (LSBit) which specifies
read/write operations as shown below.
2 Combined
Function I Caddress D
Address
Command Write 0011 011 0 0x36
Data Write 0011 010 0 0x34
Data Read 0011 010 1 0x35
An example Write Command Cycle (Disable Hub Address) is shown below.
Start 0x36 A 0xD0 A Restart 0x34 A 0x00 A Stop

Write
Disable Hub Write Data Data Byte
Command
Multiple commands can be sent after a write command.

Key
Complicating matters further, when reading the PDIUSBD11, it must Master to PDIUSBD11
place its serial line into input mode. However as multiple reads can PDIUSBD11 to Master
be performed after the one Command Read address, it has no A Ack
way of telling when to release the bus. Therefore the master must N Negative Ack
acknowledge all bytes except for the last byte which it must return
an negative acknowledge.
An example Read Command Cycle (Read Interrupt Register) is shown as follows,
Start 0x36 A 0xF4 A Restart 0x35 A 0x00 A 0x40 N Stop

Read
Write
Interrupt Read Data Data Byte 1 Data Byte 2
Command
Register

Initialisation
The wafer of the PDIUSBD11 is the same in both the HUB (PDIUSBH11A) and Device/Function chips
(PDIUSBD11). What Philips Semiconductor omits from the data sheet is that you need to disable the hub
before you can use the embedded function. Failure to do so, will result in setup packets being received on
the HUBs default port and not the embedded functions. They do however mention the initialisation in their
FAQ but have once again missed it in their latest revision of the data sheet, dated 22 July 1999. (Before
that, one could off assumed they lost the original/editable data sheet!)
The PDIUSBD11 is effectively the embedded function 1 of a PDIUSBH11A(HuB). We have taken the silicon of the
PDIUSBH11A and bounded the embedded function 1. This has for consequence that the HUB is still present and
active inside the PDIUSBD11. The Hub part MUST be disabled at power-on and AFTER Bus reset by sending the
command 0xD0(Set Address(Hub)) and writing the data 0x00(Address 0 disabled). The same can be done for the
hub endpoints. Guy.Jaumotte@Philips.com
Another thing you must note, is that the HUB is re-enabled on a Bus Reset. It is therefore, necessary to
disable the hub and enable the Embedded Function every time a Bus Reset Interrupt occurs.
The recommended Initialisation sequence is,
/* Disable Hub Function in PDIUSBD11 */

SET_HUB_ADDRESS(0xD0) to 0x00
/* Set Address to zero (default) and enable function */

SET_ADDRESS_ENABLE(0xD1) to 0x80
/* Enable function generic endpoints */

SET_ENDPOINT_ENABLE(0xD8) to 0x02
/* Set Mode - Enable SoftConnect */

SET_MODE(0xF3) to 0x97; /* Embedded Function, SoftConnect, Clk Run, */
/* No LazyClk, Remote Wakeup */
and byte 2 to 0x0B; /* CLKOut = 4MHz */
Notes :
(1) http://www-eu3.semiconductors.com/usb/products/interface/pdiusbd11/faq/#2.1 PDIUSBD11 FAQ
TM
(2) SoftConnect is a patent pending technology from Philips Semiconductors

PDIUSBD11 Command Summary
Set Address / Enable
Command 0xD0 Set Hub Address Data Command followed by a Write of One Data Byte
0xD1 Set Embedded Function 1s Address with the format below.
0xD2 Embedded Function Two (PDIUSBH11)
0xD3 Embedded Function Three (PDIUSBH11)
7 6 5 4 3 2 1 0
Enable Address
This command will enable the desired function (bit 7) and set its address. A 1 in bit 7 enables the function. The
low seven bits are used to set the functions address. When first powered up, an address of zero is used, until the
Host issues the Set Address Device Request (Chapter 9 USB Spec) during enumeration.
The PDIUSBD11 contains the same silicon than the Philips PDIUSBH11A HUB. As a result, the HUB powers up
enabled and thus needs to be turned off at initialisation and after a Bus Reset.
Set Endpoint Enable
Command 0xD8 Set Endpoint Enable Data Command followed by a Write of One Data Byte
with the format below
7 6 5 4 3 2 1 0
X X X X 0 0 0 0 Power on Reset
Generic
Reserved Reserved Reserved Reserved Reserved Reserved Endpoint Reserved
Enable
When the function is enabled, only its Default Control Pipe (Endpoint 2 & 3) are enabled. During enumeration, your
device will describe to the host the type of Generic Endpoints it wishes to use in the form of an Endpoint Descriptor.
Later during enumeration the host will send the Set Configuration Device Request (Chapter 9 USB Spec). At this
point you can enable your Generic Endpoints. Note that many devices will enable the Generic Endpoints at Power
Up and this does not effect the functionality of the device.
Endpoint No. Endpoint Index Endpoint Type Direction

2 Out
0 Control / Default
3 In
5 Out
1 Generic
4 In
6 Out
2 Generic
7 In
8 Out
3 Generic
9 In
Note : Endpoint 1s endpoint indexes are swapped. This is not an error Index 5 is EP1 Out, Index 4 is EP1 In
Set Mode
Command 0xF3 Set Mode Data Command followed by writing two data bytes
with format below,
Byte 1 - Configuration
7 6 5 4 3 2 1 0
1 0 0 0 1 1 0 1 Power on Reset
Embedded
Soft Debug Clock No Lazy Remote
Function X X
Mode Connect Mode Running Clock Wakeup
Remote Wakeup Setting this bit enables the Remote Wakeup Feature. A bus reset will enable this function.
No Lazy Clock Clearing this bit, ensures the clock will not switch to lazy clock mode (~30kHz) 1ms after
Suspend. This value does not change on a Bus Reset.

Clock Running The setting of this bit will ensure the clock & phase lock loop is always running even in
suspend. Use this mode with self powered devices. Bus powered devices will need to set
this bit to 0 to ensure the maximum load specifications during suspend is meet.
Debug Mode Setting this bit will cause all errors and negative acknowledgments to be reported. If Clear
only OK and babbling is shown.
Soft Connect Setting this bit will enable the pull up resistor on D+ to be connected when VBUS is present.
This value is not changed by reset.
Embedded Function For normal operation, set this bit. The PDIUSBH11 uses this bit to enable multiple
Mode / Future Mode embedded functions. It has not yet be determined if this will work with the hub disabled.
See the PDIUSBH11A data sheet for more details.
Byte 2 Clock Divider

7 6 5 4 3 2 1 0
X X 0 0 0 0 1 1 Power on Reset
X X Clock Divisor
Byte 2 sets the frequency of the clock output. Should you desire either a default 4MHz clock or do not wish to use
the clock then this byte can be ignored. The power on value is 3 giving a default clock out of 4MHz which is quite
common for many microcontrollers. Of course faster microcontrollers can power up on 4Mhz and then set the Mode
to run at their full speed. The expected clock frequency is 48MHz/(N+1) where N is the clock divisor.
The PDIUSBD11 data sheet shows only the low nibble being used. However after accidental playing, it was found
to be the same than the PDIUSBH11A, using the lowest 6 bits for the divisor. Thus care must be taken with the
extra two bits. They are NOT dont cares as the data sheet would suggest.
Read Interrupt Register
Command 0xF4 Read Interrupt Register Data Read Two Data Bytes
Interrupt Register Byte 1

7 6 5 4 3 2 1 0
0 0 0 0 0
0 0 0 Power on Reset
Control
EndPoint Endpoint Endpoint Endpoint Control In Reserved Reserved
Out
Index 7 Index 6 Index 5 Index 4 Endpoint (Hub) (Hub)
Endpoint
Interrupt Register Byte 2

7 6 5 4 3 2 1 0
Bus Endpoint Endpoint
Reserved Reserved Reserved Reserved Reserved
Reset Index 8 Index 9
After an interrupt has occurred a read of this command will show what event caused the interrupt. Each bit is
3
cleared by reading the Read Last Transaction Status . However should a Bus Reset Interrupt occur, reading the
Interrupt Register (0xF4) will clear this flag.
The Interrupt pin on the PDIUSBD11 is an active low signal which gets pulled low after an interrupt has occurred
and remains their until all interrupts are cleared. Most microcontrollers will accept an Edge Sensitive Interrupt,
however few will accept a Level Sensitive Interrupt. There are two ways of approaching this problem. What Philips
does in many of their examples is simply poll the interrupt register continuously and branch to a handler should an
interrupt be pending. This opens up the use of the INT pin on the microcontroller to other possibilities.
The other option is to generate an interrupt on the falling edge and when the first handler has finished, before
returning from the interrupt, check if any other interrupts are still pending and if so handle these. This way, not all
you idle cycles are being taken up with polling the interrupt register.
3
Note : The PDIUSBD11 Data Sheet would suggest that the Interrupt Register is cleared by reading the Read Endpoint Status
Command. This is an error that Philips Semiconductors acknowledges in their FAQ. Please refer to
http://www-eu3.semiconductors.com/usb/products/interface/pdiusbd11/faq.html#4.1 4.1 How is the Interrupt Flag cleared?
nd
Also note that this error is still not fixed in their latest revision of the Data Sheet dated 22 July 1999

Select Endpoint
Command 0x02 Select Control Out Endpoint Data Read One Byte Optional
0x03 Select Control In Endpoint
0x04 Select Generic Endpoint 1 IN
0x05 Select Generic Endpoint 1 OUT
7 6 5 4 3 2 1 0
Buffer
Reserved Reserved Reserved Reserved Reserved Reserved Reserved
Full
This command will select the desired endpoint (Set the Internal Pointer) for a subset of commands. Changing
endpoints will reset the pointer. An optional byte can be read to determine if the Endpoint Buffer selected is full or
empty. This is seldom used in the interest of efficiency, as the Read Endpoint Status command will indicate if the
Buffer is full plus other information. It bit 1 is set, then the Buffer is Full.
Read Last Transaction Status
Command 0x42 Read Last Transaction Status for the Control Out Endpoint Data Read One Byte
0x43 Read Last Transaction Status for the Control In Endpoint
0x44 Read Last Transaction Status for the Generic Endpoint 1 IN
0x45 Read Last Transaction Status for the Generic Endpoint 1 OUT
7 6 5 4 3 2 1 0
Previous Data
Data 0/1 Setup Receive
Status Error Code Transmit
Packet Packet
not Read Success
This command is intended for debugging. It will return a byte showing the status of the last transaction on the
requested Endpoint without resetting any internal pointers set by the Set Endpoint Command.
Code Error
0000 No Error
0001 PID Encoding Error
0010 PID Unknown
0011 Unexpected Packet
0100 Token CRC Error
0101 Data CRC Error
0110 Time Out Error
0111 Babble Error
1000 Unexpected End of Packet
1001 Sent or Received NAK
1010 Sent Stall
1011 Overflow Error
1101 BitStuff Error
1111 Wrong DATA PID

Read Endpoint Status
Command 0x82 Read Control OUT Endpoint Status Data Read One Byte
0x83 Read Control IN Endpoint Status
0x84 Read Generic Endpoint 1 IN Endpoint Status
0x85 Read Generic Endpoint 1 OUT Endpoint Status
7 6 5 4 3 2 1 0
Buffer Data 0/1 Setup
Reserved Reserved Stalled Reserved Reserved
Full Packet Packet
Read Buffer / Write Buffer
Command 0xF0 Read Buffer Data Read up to 10 Bytes

0xF0 Write Buffer Data Write up to 10 Bytes
The same command is sent to Read or Write Data. The desired operation is selected by the data phase. The
PDIUSBD11 contains an area of linear RAM segmented into Endpoint buffers. The Read or Write Commands will
not set the PDIUSBD11s Internal RAM pointer to the start of the particular 8 byte buffer. This is done using the
Select Endpoint Command.
After a byte has been written or read the internal pointer is incremented. Beware that there is no protection from
reading or writing into the next endpoints buffer.
The Data in the Buffer has the following format.
Offset 0 Offset 1 Offset 2 Offset 3 . Offset 9

Reserved Number of bytes
Byte 1 Byte2 Byte 8
Undefined Value to follow
Clear Buffer
Command 0xF2 Data None
After a packet has been received the buffer full flag is set and the PDIUSBD11 will issue NAK to additional packets
send to the endpoint until the Buffer Clear Flag is cleared. Therefore once data has been received it should be read
and on completion of reading the data the clear buffer command should be issued to enable subsequent packets to
be received. Failure to do so will inhibit an more packets being received on this endpoint.
Validate Buffer
Command 0xFA Data None
Once data has been written to a IN Buffer, the Validate Buffer command should be set. This tells the PDIUSBD11
that the data is complete and should be sent when the next IN Token is received.

Set Endpoint Status
Command 0x42 Set Control OUT Endpoint Status Data Write one byte with the following format
0x43 Set Control IN Endpoint Status
0x44 Set Generic Endpoint 1 IN Endpoint Status
0x45 Set Generic Endpoint 1 OUT Endpoint Status
7 6 5 4 3 2 1 0
X X X X X X X 0 Power on Reset
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Stalled
This command can be used to stall endpoints. Endpoints can be stalled, if they are not in use or if a command is
not supported, among other reasons. A Setup Packet will be received regardless if the endpoint is stalled or not.
Should the endpoint be stalled when it receives a Setup Packet, another Set Endpoint Status command will need to
be sent to stall the endpoint again.
If a Zero is written to un-stall an endpoint, even if the endpoint is already un-stalled, the buffer is cleared and If the
endpoint is an IN endpoint, the PDIUSBD11 will send a DATA 0 PID to the host. If the endpoint is an OUT Endpoint
the PDIUSBD11 will wait for a DATA0 PID. This procedure is the same should a Setup Packet un-stall the
Endpoint.
The Set Endpoint Status shares the same command numbering than the Read Last Transaction Status. The data
phase will determine which command is sought after.
Acknowledge Setup
When a Setup Packet is received, the PDIUSBD11 will clear the Control IN Endpoint Buffer, and disable the
Validate Buffer and Clear Buffer commands until the packet is acknowledged by the controller, by sending the
Acknowledge Setup Command to both IN & OUT Control Endpoints.
This prevents the Setup packet from being overridden and any packets being sent back to the host.
Send Resume
This command will send the resume signal upstream to the hub or host. This can be used to wake the host up.
Read Current Frame Number
Command 0xF5 Data Read One or Two Bytes
The Read Current Frame Number can be used to return the current 16 Bit Frame Number of the last SOF received
successfully. The LSByte is returned first, followed by the MSByte.
Copyright 2001, Craig Peacock (Craig.Peacock@beyondlogic.org)

th
Third Release 6 April 2002
th
Second Release 20 December 2001
nd
First Release 22 January 2000 - Draft

Win32 Pipe Security Editor for Windows NT/2000/XP

2008
Win32 Pipe Security Editor Windows NT/2000/XP
Do you know what named pipes you have on a system, quietly advertising for something to connect to it? Do
you know how secure each pipe is, whether the associated security descriptor is strong enough?. The Win32
Pipe Security Editor is the ideal tool for checking the security of your own pipe servers or to set up auditing of
existing pipe servers.
G:\pipeacl
Win32 Pipe Security Viewer V1.0

Available pipes on Local Computer:
\\.\pipe\InitShutdown
\\.\pipe\lsass
\\.\pipe\ntsvcs
\\.\pipe\scerpc
\\.\pipe\net\NtControlPipe1
\\.\pipe\DhcpClient
\\.\pipe\Winsock2\CatalogChangeListener-1a8-0
\\.\pipe\spoolss
\\.\pipe\Winsock2\CatalogChangeListener-e4-0
\\.\pipe\epmapper
\\.\pipe\winreg
\\.\pipe\Winsock2\CatalogChangeListener-298-0
\\.\pipe\atsvc
\\.\pipe\tapsrv
\\.\pipe\ProfMapApi
\\.\pipe\SecondaryLogon
\\.\pipe\ROUTER
http://www.beyondlogic.org/solutions/pipesec/pipesec.htm (1 of 4)13/02/2008 16:43:49

\\.\pipe\POLICYAGENT
\\.\pipe\winlogonrpc
\\.\pipe\WMIEP_f0
\\.\pipe\AlertRPC
\\.\pipe\ScanRPC
\\.\pipe\WMIEP_4dc
\\.\pipe\WMIEP_208
\\.\pipe\SfcApi
\\.\pipe\WMIEP_5ac
\\.\pipe\WMIEP_760
\\.\pipe\beyondexec-dispatch
Given a specific pipe, the security privileges can be viewed or modified via a standard Windows Security
Editor Property Page. The user may view or change the discretionary access-control list (DACL) changing the
access rights to the pipe, the system access-control list (SACL) used for auditing or the owner of the pipe.
This allows for security checks to be made of hidden system services and programs.

Most pipes have a security desciptor hardcoded into the service or executable responsible for the creation of
the pipe. As a result, any changes made to the security of the pipe will only last for the duration the service is
running for. If the pipe is recreated due to stopping the parent service, or if the PC is rebooted the default
security descriptor will be reloaded. This however gives a window of opportunity to audit a pipe while a server
remains operational.
Win32 pipes act as part of the network file system on SMB. As such authentication is required to connect to
most pipes. This authentication can be as weak as NULL session. A registry key dictates which Win32 Pipes
are allowed to be connected with a NULL session. This is a typical key from a Windows 2000 SP3 system.
HKEY_LOCAL_MACHINE\SYSTEM\CurrentControlSet\Services\lanmanserver\parameters
\NullSessionPipes =
COMNAP COMNODE SQL\QUERY SPOOLSS LLSRPC EPMAPPER LOCATOR TrkWks TrkSvr
Usage
G:\pipeacl /?
Win32 Pipe Security Viewer V1.0

Usage:
To display the Security Descriptor Editor for a Win32 Pipe on the local
computer use :
pipeacl \\.\pipe\
To display the Security Descriptor Editor for a Win32 Pipe on a remote

computer use :
pipeacl \\\pipe\
To view current list of available Win32 Pipes on local computer use :

pipeacl or pipeacl -v
Download
Revision History
22nd June 2003 - Version 1.00
First release to public. Tested on Windows XP, Windows 2000 and Windows NT4 with the
Windows NT Security Configuration Editor Installed.
Links :

Security Configuration Manager for NT4 - A required install to run the Win32 Pipe Security Editor on
Windows NT4 boxes.
acltools1.0 - LSA and SAM Security Editors - (Razor)
winsradacl.zip - Interactive Window Station / Desktop DACL Editor - (Keith Brown)
Copyright 2002-2007 Craig Peacock - 6th April 2007

Interfacing the Standard Parallel Port

Table of Contents
Introduction to Parallel Ports
Hardware Properties
Centronics?
Port Addresses
Software Registers - Standard Parallel Port (SPP)
Bi-directional Ports
Using the Parallel Port to Input 8 Bits
Nibble Mode
Using the Parallel Port's IRQ
Parallel Port Modes in BIOS
Parallel Port Modes and the ECP's Extended Control Register
PDF Version
Introduction to Parallel Ports
The Parallel Port is the most commonly used port for interfacing home made projects. This port will allow the input of up
to 9 bits or the output of 12 bits at any one given time, thus requiring minimal external circuitry to implement many
simpler tasks. The port is composed of 4 control lines, 5 status lines and 8 data lines. It's found commonly on the back
of your PC as a D-Type 25 Pin female connector. There may also be a D-Type 25 pin male connector. This will be a
serial RS-232 port and thus, is a totally incompatible port.
For more information on Serial RS-232 Ports See http://www.beyondlogic.org/serial/serial.htm
Newer Parallel Ports are standardized under the IEEE 1284 standard first released in 1994. This standard defines 5
modes of operation which are as follows,
1. Compatibility Mode.
2. Nibble Mode. (Protocol not Described in this Document)
3. Byte Mode. (Protocol not Described in this Document)
4. EPP Mode (Enhanced Parallel Port).
5. ECP Mode (Extended Capabilities Mode).
The aim was to design new drivers and devices which were compatible with each other and also backwards compatible
with the Standard Parallel Port (SPP). Compatibility, Nibble & Byte modes use just the standard hardware available on
the original Parallel Port cards while EPP & ECP modes require additional hardware which can run at faster speeds,
while still being downwards compatible with the Standard Parallel Port.
Compatibility mode or "Centronics Mode" as it is commonly known, can only send data in the forward direction at a
typical speed of 50 kbytes per second but can be as high as 150+ kbytes a second. In order to receive data, you must
change the mode to either Nibble or Byte mode. Nibble mode can input a nibble (4 bits) in the reverse direction. E.g.
from device to computer. Byte mode uses the Parallel's bi-directional feature (found only on some cards) to input a byte
http://www.beyondlogic.org/spp/parallel.htm (1 of 15)13/02/2008 16:44:02

(8 bits) of data in the reverse direction.
Extended and Enhanced Parallel Ports use additional hardware to generate and manage handshaking. To output a byte
to a printer (or anything in that matter) using compatibility mode, the software must,
1. Write the byte to the Data Port.

2. Check to see is the printer is busy. If the printer is busy, it will not accept any data, thus any data which is
written will be lost.
3. Take the Strobe (Pin 1) low. This tells the printer that there is the correct data on the data lines. (Pins 2-9)
4. Put the strobe high again after waiting approximately 5 microseconds after putting the strobe low. (Step 3)
This limits the speed at which the port can run at. The EPP & ECP ports get around this by letting the hardware check
to see if the printer is busy and generate a strobe and /or appropriate handshaking. This means only one I/O instruction
need to be performed, thus increasing the speed. These ports can output at around 1-2 megabytes per second. The
ECP port also has the advantage of using DMA channels and FIFO buffers, thus data can be shifted around without
using I/O instructions.
Hardware Properties
Below is a table of the "Pin Outs" of the D-Type 25 Pin connector and the Centronics 34 Pin connector. The D-Type 25
pin connector is the most common connector found on the Parallel Port of the computer, while the Centronics
Connector is commonly found on printers. The IEEE 1284 standard however specifies 3 different connectors for use
with the Parallel Port. The first one, 1284 Type A is the D-Type 25 connector found on the back of most computers. The
2nd is the 1284 Type B which is the 36 pin Centronics Connector found on most printers.
IEEE 1284 Type C however, is a 36 conductor connector like the Centronics, but smaller. This connector is claimed to
have a better clip latch, better electrical properties and is easier to assemble. It also contains two more pins for signals
which can be used to see whether the other device connected, has power. 1284 Type C connectors are recommended
for new designs, so we can look forward on seeing these new connectors in the near future.
Pin No (D- Pin No Direction Hardware

SPP Signal Register
Type 25) (Centronics) In/out Inverted
1 1 nStrobe In/Out Control Yes
2 2 Data 0 Out Data
3 3 Data 1 Out Data
4 4 Data 2 Out Data
5 5 Data 3 Out Data
6 6 Data 4 Out Data
7 7 Data 5 Out Data
8 8 Data 6 Out Data
9 9 Data 7 Out Data
10 10 nAck In Status
11 11 Busy In Status Yes
Paper-Out / Paper-
12 12 In Status
End
13 13 Select In Status
14 14 nAuto-Linefeed In/Out Control Yes
15 32 nError / nFault In Status
16 31 nInitialize In/Out Control

nSelect-Printer /
17 36 In/Out Control Yes
nSelect-In
18 - 25 19-30 Ground Gnd
Table 1. Pin Assignments of the D-Type 25 pin Parallel Port Connector.
The above table uses "n" in front of the signal name to denote that the signal is active low. e.g. nError. If the printer has
occurred an error then this line is low. This line normally is high, should the printer be functioning correctly. The
"Hardware Inverted" means the signal is inverted by the Parallel card's hardware. Such an example is the Busy line. If
+5v (Logic 1) was applied to this pin and the status register read, it would return back a 0 in Bit 7 of the Status Register.
The output of the Parallel Port is normally TTL logic levels. The voltage levels are the easy part. The current you can
sink and source varies from port to port. Most Parallel Ports implemented in ASIC, can sink and source around 12mA.
However these are just some of the figures taken from Data sheets, Sink/Source 6mA, Source 12mA/Sink 20mA, Sink
16mA/Source 4mA, Sink/Source 12mA. As you can see they vary quite a bit. The best bet is to use a buffer, so the
least current is drawn from the Parallel Port.
Centronics?
Centronics is an early standard for transferring data from a host to the printer. The majority of printers use this
handshake. This handshake is normally implemented using a Standard Parallel Port under software control. Below is a
simplified diagram of the `Centronics' Protocol.
Data is first applied on the Parallel Port pins 2 to 7. The host then checks to see if the printer is busy. i.e. the busy line
should be low. The program then asserts the strobe, waits a minimum of 1uS, and then de-asserts the strobe. Data is
normally read by the printer/peripheral on the rising edge of the strobe. The printer will indicate that it is busy processing
data via the Busy line. Once the printer has accepted data, it will acknowledge the byte by a negative pulse about 5uS
on the nAck line.
Quite often the host will ignore the nAck line to save time. Latter in the Extended Capabilities Port, you will see a Fast
Centronics Mode, which lets the hardware do all the handshaking for you. All the programmer must do is write the byte
of data to the I/O port. The hardware will check to see if the printer is busy, generate the strobe. Note that this mode
commonly doesn't check the nAck either.
Port Addresses
The Parallel Port has three commonly used base addresses. These are listed in table 2, below. The 3BCh base

address was originally introduced used for Parallel Ports on early Video Cards. This address then disappeared for a
while, when Parallel Ports were later removed from Video Cards. They has now reappeared as an option for Parallel
Ports integrated onto motherboards, upon which their configuration can be changed using BIOS.
LPT1 is normally assigned base address 378h, while LPT2 is assigned 278h. However this may not always be the case
as explained later. 378h & 278h have always been commonly used for Parallel Ports. The lower case h denotes that it
is in hexadecimal. These addresses may change from machine to machine.
Address Notes:
3BCh - 3BFh Used for Parallel Ports which were incorporated on to Video
Cards - Doesn't support ECP addresses
378h - 37Fh Usual Address For LPT 1
278h - 27Fh Usual Address For LPT 2
Table 2 Port Addresses
When the computer is first turned on, BIOS (Basic Input/Output System) will determine the number of ports you have
and assign device labels LPT1, LPT2 & LPT3 to them. BIOS first looks at address 3BCh. If a Parallel Port is found here,
it is assigned as LPT1, then it searches at location 378h. If a Parallel card is found there, it is assigned the next free
device label. This would be LPT1 if a card wasn't found at 3BCh or LPT2 if a card was found at 3BCh. The last port of
call, is 278h and follows the same procedure than the other two ports. Therefore it is possible to have a LPT2 which is
at 378h and not at the expected address 278h.
What can make this even confusing, is that some manufacturers of Parallel Port Cards, have jumpers which allow you
to set your Port to LPT1, LPT2, LPT3. Now what address is LPT1? - On the majority of cards LPT1 is 378h, and LPT2,
278h, but some will use 3BCh as LPT1, 378h as LPT1 and 278h as LPT2. Life wasn't meant to be easy.
The assigned devices LPT1, LPT2 & LPT3 should not be a worry to people wishing to interface devices to their PC's.
Most of the time the base address is used to interface the port rather than LPT1 etc. However should you want to find
the address of LPT1 or any of the Line PrinTer Devices, you can use a lookup table provided by BIOS. When BIOS
assigns addresses to your printer devices, it stores the address at specific locations in memory, so we can find them.
Start Address Function

0000:0408 LPT1's Base Address
0000:040A LPT2's Base Address
0000:040C LPT3's Base Address
0000:040E LPT4's Base Address (Note 1)
Table 3 - LPT Addresses in the BIOS Data Area;
Note 1 : Address 0000:040E in the BIOS Data Area may be used as the Extended Bios Data Area in PS/2 and newer
Bioses.
The above table, table 3, shows the address at which we can find the Printer Port's addresses in the BIOS Data Area.
Each address will take up 2 bytes. The following sample program in C, shows how you can read these locations to
obtain the addresses of your printer ports.
#include <stdio.h>
#include <dos.h>
void main(void)
{
unsigned int far *ptraddr; /* Pointer to location of Port Addresses */
unsigned int address; /* Address of Port */

int a;
ptraddr=(unsigned int far *)0x00000408;
for (a = 0; a < 3; a++)

{
address = *ptraddr;
if (address == 0)
printf("No port found for LPT%d \n",a+1);
else
printf("Address assigned to LPT%d is %Xh\n",a+1,address);
*ptraddr++;
}
}
Software Registers - Standard Parallel Port (SPP)
Offset Name Read/Write Bit No. Properties

Base + 0 Data Port Write (Note- Bit 7 Data 7
1) Bit 6 Data 6
Bit 5 Data 5
Bit 4 Data 4
Bit 3 Data 3
Bit 2 Data 2
Bit 1 Data 1
Bit 0 Data 0
Table 4 Data Port
Note 1 : If the Port is Bi-Directional then Read and Write Operations can be performed on the Data Register.
The base address, usually called the Data Port or Data Register is simply used for outputting data on the Parallel Port's
data lines (Pins 2-9). This register is normally a write only port. If you read from the port, you should get the last byte
sent. However if your port is bi-directional, you can receive data on this address. See Bi-directional Ports for more
detail.

Base + 1 Status Port Read Only Bit 7 Busy
Bit 6 Ack
Bit 5 Paper Out
Bit 4 Select In
Bit 3 Error
Bit 2 IRQ (Not)
Bit 1 Reserved
Bit 0 Reserved
Table 5 Status Port
The Status Port (base address + 1) is a read only port. Any data written to this port will be ignored. The Status Port is
made up of 5 input lines (Pins 10,11,12,13 & 15), a IRQ status register and two reserved bits. Please note that Bit 7
(Busy) is a active low input. E.g. If bit 7 happens to show a logic 0, this means that there is +5v at pin 11. Likewise with

Bit 2. (nIRQ) If this bit shows a '1' then an interrupt has not occurred.

Base + 2 Control Port Read/Write Bit 7 Unused
Bit 6 Unused
Bit 5 Enable Bi-Directional Port
Bit 4 Enable IRQ Via Ack Line
Bit 3 Select Printer
Bit 2 Initialize Printer (Reset)
Bit 1 Auto Linefeed
Bit 0 Strobe
Table 6 Control Port
The Control Port (base address + 2) was intended as a write only port. When a printer is attached to the Parallel Port,
four "controls" are used. These are Strobe, Auto Linefeed, Initialize and Select Printer, all of which are inverted except
Initialize.
The printer would not send a signal to initialize the computer, nor would it tell the computer to use auto linefeed.
However these four outputs can also be used for inputs. If the computer has placed a pin high (e.g. +5v) and your
device wanted to take it low, you would effectively short out the port, causing a conflict on that pin. Therefore these lines
are "open collector" outputs (or open drain for CMOS devices). This means that it has two states. A low state (0v) and a
high impedance state (open circuit).
Normally the Printer Card will have internal pull-up resistors, but as you would expect, not all will. Some may just have
open collector outputs, while others may even have normal totem pole outputs. In order to make your device work
correctly on as many Printer Ports as possible, you can use an external resistor as well. Should you already have an
internal resistor, then it will act in Parallel with it, or if you have Totem pole outputs, the resistor will act as a load.
An external 4.7k resistor can be used to pull the pin high. I wouldn't use anything lower, just in case you do have an
internal pull up resistor, as the external resistor would act in parallel giving effectively, a lower value pull up resistor.
When in high impedance state the pin on the Parallel Port is high (+5v). When in this state, your external device can
pull the pin low and have the control port change read a different value. This way the 4 pins of the Control Port can be
used for bi-directional data transfer. However the Control Port must be set to xxxx0100 to be able to read data, that is
all pins to be +5v at the port so that you can pull it down to GND (logic 0).
Bits 4 & 5 are internal controls. Bit four will enable the IRQ (See Using the Parallel Ports IRQ) and Bit 5 will enable the
bi-directional port meaning that you can input 8 bits using (DATA0-7). This mode is only possible if your card supports
it. Bits 6 & 7 are reserved. Any writes to these two bits will be ignored.
Bi-directional Ports
The schematic diagram below, shows a simplified view of the Parallel Port's Data Register. The original Parallel Port
card's implemented 74LS logic. These days all this is crammed into one ASIC, but the theory of operation is still the
same.

The non bi-directional ports were manufactured with the 74LS374's output enable tied permanent low, thus the data
port is always output only. When you read the Parallel Port's data register, the data comes from the 74LS374 which is
also connected to the data pins. Now if you can overdrive the '374 you can effectively have a Bi-directional Port. (or a
input only port, once you blow up the latches output!)
What is very concerning is that people have actually done this. I've seen one circuit, a scope connected to the Parallel
Port distributed on the Internet. The author uses an ADC of some type, but finds the ADC requires transistors on each
data line, to make it work! No wonder why. Others have had similar trouble, the 68HC11 cannot sink enough current (30
to 40mA!)
Bi-directional ports use Control Bit 5 connected to the 374's Output Enable so that it's output drivers can be turned off.
This way you can read data present on the Parallel Port's Data Pins, without having bus conflicts and excessive current
drains.
Bit 5 of the Control Port enables or disables the bi-directional function of the Parallel Port. This is only available on true
bi-directional ports. When this bit is set to one, pins 2 to 9 go into high impedance state. Once in this state you can
enter data on these lines and retrieve it from the Data Port (base address). Any data which is written to the data port will
be stored but will not be available at the data pins. To turn off bi-directional mode, set bit 5 of the Control Port to '0'.
However not all ports behave in the same way. Other ports may require setting bit 6 of the Control Port to enable Bi-
directional mode and setting of Bit 5 to dis-enable Bi-directional mode, Different manufacturers implement their bi-
directional ports in different ways. If you wish to use your Bi-directional port to input data, test it with a logic probe or
multimeter first to make sure it is in bi-directional mode.
Using The Parallel Port to Input 8 Bits.
If your Parallel Port doesn't support bi-directional mode, don't despair. You can input a maximum of 9 bits at any one
given time. To do this you can use the 5 input lines of the Status Port and the 4 inputs (open collector) lines of the
Control Port.

The inputs to the Parallel Port has be chosen as such, to make life easier for us. Busy just happens to be the MSB (Bit
7) of the Status Port, then in ascending order comes Ack, Paper Out and Select, making up the most significant nibble
of the Control Port. The Bars are used to represent which inputs are Hardware inverted, i.e. +5v will read 0 from the
register, while GND will read 1. The Status Port only has one inverted input.
The Control port is used to read the least significant nibble. As described before, the control port has open collector
outputs, i.e. two possible states, high impedance and GND. If we connect our inputs directly to the port (For example an
ADC0804 with totem pole outputs), a conflict will result if the input is high and the port is trying to pull it down. Therefore
we use open collector inverters.
However this is not always entirely necessary. If we were connecting single pole switches to the port with a pull up
resistor, then there is no need to bother with this protection. Also if your software initializes the control port with
xxxx0100 so that all the pins on the control port are high, then it may be unnecessary. If however you don't bother and
your device is connected to the Parallel Port before your software has a chance to initialize then you may encounter
problems.
Another problem to be aware of is the pull up resistors on the control port. The average pull-up resistor is 4.7k. In order
to pull the line low, your device will need to sink 1mA, which some low powered devices may struggle to do. Now what
happens if I suggest that some ports have 1K pull up resistors? Yes, there are such cards. Your device now has to sink
5mA. More reason to use the open collector inverters.
Open collector inverters were chosen over open collector buffers as they are more popular, and thus easier to obtain.
There is no reason, however why you can't use them. Another possibility is to use transistors.
The input, D3 is connected via the inverter to Select Printer. Select Printer just happens to be bit 3 of the control port.
D2, D1 & D0 are connected to Init, Auto linefeed and strobe, respectively to make up the lower nibble. Now this is done,
all we have to do is assemble the byte using software. The first thing we must do is to write xxxx0100 to the Control
Port. This places all the control port lines high, so they can be pulled down to input data.
outportb(CONTROL, inportb(CONTROL) & 0xF0 | 0x04);
Now that this is done, we can read the most significant nibble. This just happens to be the most significant nibble of the
status port. As we are only interested in the MSnibble we will AND the results with 0xF0, so that the LSnibble is clear.
Busy is hardware inverted, but we won't worry about it now. Once the two bytes are constructed, we can kill two birds
with one stone by toggling Busy and Init at the same time.
a = (inportb(STATUS) & 0xF0); /* Read MSnibble */
We can now read the LSnibble. This just happens to be LSnibble of the control port - How convenient! This time we are
not interested with the MSnibble of the port, thus we AND the result with 0x0F to clear the MSnibble. Once this is done,
it is time to combine the two bytes together. This is done by OR'ing the two bytes. This now leaves us with one byte,
however we are not finished yet. Bits 2 and 7 are inverted. This is overcome by XOR'ing the byte with 0x84, which

toggles the two bits.
a = a |(inportb(CONTROL) & 0x0F); /* Read LSnibble */

a = a ^ 0x84; /* Toggle Bit 2 & 7 */
Note: Some control ports are not open collector, but have totem pole outputs. This is also the case with EPP
and ECP Ports. Normally when you place a Parallel Port in ECP or EPP mode, the control port becomes totem
pole outputs only. Now what happens if you connect your device to the Parallel Port in this mode? Therefore,
in the interest of portability I recommend using the next circuit, reading a nibble at a time.
Nibble Mode.
Nibble mode is the preferred way of reading 8 bits of data without placing the port in reverse mode and using the data
lines. Nibble mode uses a Quad 2 line to 1 line multiplexer to read a nibble of data at a time. Then it "switches" to the
other nibble and reads its. Software can then be used to construct the two nibbles into a byte. The only disadvantage of
this technique is that it is slower. It now requires a few I/O instructions to read the one byte, and it requires the use of an
external IC.
The operation of the 74LS157, Quad 2 line to 1 line multiplexer is quite simple. It simply acts as four switches. When
the A/B input is low, the A inputs are selected. E.g. 1A passes through to 1Y, 2A passes through to 2Y etc. When the A/
B is high, the B inputs are selected. The Y outputs are connected up to the Parallel Port's status port, in such a manner
that it represents the MSnibble of the status register. While this is not necessary, it makes the software easier.
To use this circuit, first we must initialize the multiplexer to switch either inputs A or B. We will read the LSnibble first,
thus we must place A/B low. The strobe is hardware inverted, thus we must set Bit 0 of the control port to get a low on
Pin 1.
outportb(CONTROL, inportb(CONTROL) | 0x01); /* Select Low Nibble (A)*/
Once the low nibble is selected, we can read the LSnibble from the Status Port. Take note that the Busy Line is
inverted, however we won't tackle it just yet. We are only interested in the MSnibble of the result, thus we AND the
result with 0xF0, to clear the LSnibble.
a = (inportb(STATUS) & 0xF0); /* Read Low Nibble */

Now it's time to shift the nibble we have just read to the LSnibble of variable a,
a = a >> 4; /* Shift Right 4 Bits */
We are now half way there. It's time to get the MSnibble, thus we must switch the multiplexer to select inputs B. Then
we can read the MSnibble and put the two nibbles together to make a byte,
outportb(CONTROL, inportb(CONTROL) & 0xFE); /* Select High Nibble (B)*/

a = a |(inportb(STATUS) & 0xF0); /* Read High Nibble */
byte = byte ^ 0x88;
The last line toggles two inverted bits which were read in on the Busy line. It may be necessary to add delays in the
process, if the incorrect results are being returned.
Using the Parallel Port's IRQ
The Parallel Port's interrupt request is not used for printing under DOS or Windows. Early versions of OS-2 used them,
but don't anymore. Interrupts are good when interfacing monitoring devices such as high temp alarms etc, where you
don't know when it is going to be activated. It's more efficient to have an interrupt request rather than have the software
poll the ports regularly to see if something has changed. This is even more noticeable if you are using your computer for
other tasks, such as with a multitasking operating system.
The Parallel Port's interrupt request is normally IRQ5 or IRQ7 but may be something else if these are in use. It may also
be possible that the interrupts are totally disabled on the card, if the card was only used for printing. The Parallel Port
interrupt can be disabled and enabled using bit 4 of the control register, Enable IRQ Via Ack Line. Once enabled, an
interrupt will occur upon a low to high transition (rising edge) of the nACK. However like always, some cards may trigger
the interrupt on the high to low transition.
The following code is an Interrupt Polarity Tester, which serves as two things. It will determine which polarity your
Parallel Port interrupt is, while also giving you an example for how to use the Parallel Port's Interrupt. It checks if your
interrupt is generated on the rising or falling edge of the nACK line. To use the program simply wire one of the Data
lines (Pins 2 to 9) to the Ack Pin (Pin 10). The easiest way to do this is to bridge some solder from DATA7 (Pin 9) to
ACK (Pin 10) on a male DB25 connector.
/* Parallel Port Interrupt Polarity Tester */

/* 2nd February 1998 */
/* Copyright 1997 Craig Peacock */
/* WWW - http://www.beyondlogic.org */
/* Email - cpeacock@senet.com.au */
#include <dos.h>
#define PORTADDRESS 0x378 /* Enter Your Port Address Here */

#define IRQ 7 /* IRQ Here */
#define DATA PORTADDRESS+0

#define STATUS PORTADDRESS+1
#define CONTROL PORTADDRESS+2
#define PIC1 0x20

#define PIC2 0xA0
int interflag; /* Interrupt Flag */

int picaddr; /* Programmable Interrupt Controller (PIC) Base Address */

void interrupt (*oldhandler)();
void interrupt parisr() /* Interrupt Service Routine (ISR) */

{
interflag = 1;
outportb(picaddr,0x20); /* End of Interrupt (EOI) */
}
void main(void)
{
int c;
int intno; /* Interrupt Vector Number */
int picmask; /* PIC's Mask */
/* Calculate Interrupt Vector, PIC Addr & Mask. */
if (IRQ >= 2 && IRQ <= 7) {

intno = IRQ + 0x08;
picaddr = PIC1;
picmask = 1;
picmask = picmask << IRQ;
}
if (IRQ >= 8 && IRQ <= 15) {
intno = IRQ + 0x68;
picaddr = PIC2;
picmask = 1;
picmask = picmask << (IRQ-8);
}
if (IRQ < 2 || IRQ > 15)
{
printf("IRQ Out of Range\n");
exit();
}
outportb(CONTROL, inportb(CONTROL) & 0xDF); /* Make sure port is in Forward

Direction */
outportb(DATA,0xFF);
oldhandler = getvect(intno); /* Save Old Interrupt Vector */
setvect(intno, parisr); /* Set New Interrupt Vector Entry */
outportb(picaddr+1,inportb(picaddr+1) & (0xFF - picmask)); /* Un-Mask Pic */
outportb(CONTROL, inportb(CONTROL) | 0x10); /* Enable Parallel Port IRQ's */
clrscr();
printf("Parallel Port Interrupt Polarity Tester\n");
printf("IRQ %d : INTNO %02X : PIC Addr 0x%X : Mask 0x%02X\n",IRQ,intno,picaddr,
picmask);
interflag = 0; /* Reset Interrupt Flag */
delay(10);
outportb(DATA,0x00); /* High to Low Transition */
delay(10); /* Wait */
if (interflag == 1) printf("Interrupts Occur on High to Low Transition of ACK.\n");
else
{
outportb(DATA,0xFF); /* Low to High Transition */
delay(10); /* wait */
if (interflag == 1) printf("Interrupts Occur on Low to High Transition of ACK.
\n");

else printf("No Interrupt Activity Occurred. \nCheck IRQ Number, Port Address
and Wiring.");
}
outportb(CONTROL, inportb(CONTROL) & 0xEF); /* Disable Parallel Port IRQ's */

outportb(picaddr+1,inportb(picaddr+1) | picmask); /* Mask Pic */
setvect(intno, oldhandler); /* Restore old Interrupt Vector Before Exit */
}
At compile time, the above source may generate a few warnings, condition always true, condition always false,
unreachable code etc. These are perfectly O.K. They are generated as some of the condition structures test which IRQ
you are using, and as the IRQ is defined as a constant some outcomes will never change. While they would of been
better implemented as a preprocessor directive, I've done this so you can cut and paste the source code in your own
programs which may use command line arguments, user input etc instead of a defined IRQ.
To understand how this example works, the reader must have an assumed knowledge and understanding of Interrupts
and Interrupt Service Routines (ISR). If not, See Interfacing the PC : Using Interrupts for a quick introduction.
The first part of the mainline routine calculates the Interrupt Vector, PIC Addr & Mask in order to use the Parallel Port's
Interrupt Facility. After the Interrupt Service Routine (ISR) has been set up and the Programmable Interrupt Controller
(PIC) set, we must enable the interrupt on the Parallel Port. This is done by setting bit 4 of the Parallel Port's Control
Register using
outportb(CONTROL,inportb(CONTROL) | 0x10);
Before enabling the interrupts, we wrote 0xFF to the Parallel Port to enable the 8 data lines into a known state. At this
point of the program, all the data lines should be high. The interrupt service routine simply sets a flag (interflag), thus we
can determine when an IRQ occurs. We are now in a position to write 0x00 to the data port, which causes a high to low
transition on the Parallel Port's Acknowledge line as it's connected to one of the data lines.
If the interrupt occurs on the high to low transition, the interrupt flag (interflag) should be set. We now test this, and if
this is so the program informs the user. However if it is not set, then an interrupt has not yet occurred. We now write
0xFF to the data port, which will cause a low to high transition on the nAck line and check the interrupt flag again. If set,
then the interrupt occurs on the low to high transition.
However if the interrupt flag is still reset, then this would suggest that the interrupts are not working. Make sure your
IRQ and Base Address is correct and also check the wiring of the plug.
Parallel Port Modes in BIOS
Today, most Parallel Ports are mulimode ports. They are normally software configurable to one of many modes from
BIOS. The typical modes are,
Printer Mode (Sometimes called Default or Normal Modes)

Standard & Bi-directional (SPP) Mode
EPP1.7 and SPP Mode
EPP1.9 and SPP Mode
ECP Mode
ECP and EPP1.7 Mode
ECP and EPP1.9 Mode
Printer Mode is the most basic mode. It is a Standard Parallel Port in forward mode only. It has no bi-directional feature,
thus Bit 5 of the Control Port will not respond. Standard & Bi-directional (SPP) Mode is the bi-directional mode. Using
this mode, bit 5 of the Control Port will reverse the direction of the port, so you can read back a value on the data lines.

EPP1.7 and SPP Mode is a combination of EPP 1.7 (Enhanced Parallel Port) and SPP Modes. In this mode of
operation you will have access to the SPP registers (Data, Status and Control) and access to the EPP Registers. In this
mode you should be able to reverse the direction of the port using bit 5 of the control register. EPP 1.7 is the earlier
version of EPP. This version, version 1.7, may not have the time-out bit. See Interfacing the Enhanced Parallel Port for
more information.
EPP1.9 and SPP Mode is just like the previous mode, only it uses EPP Version 1.9 this time. As in the other mode, you
will have access to the SPP registers, including Bit 5 of the control port. However this differs from EPP1.7 and SPP
Mode as you should have access to the EPP Timeout bit.
ECP Mode will give you an Extended Capabilities Port. The mode of this port can then be set using the ECP's Extended
Control Register (ECR). However in this mode from BIOS the EPP Mode (100) will not be available. We will further
discuss the ECP's Extended Control Register in this document, but if you want further information on the ECP port,
consult Interfacing the Extended Capabilities Port.
ECP and EPP1.7 Mode and ECP and EPP1.9 Mode will give you an Extended Capabilities Port, just like the previous
mode. However the EPP Mode in the ECP's ECR will now be available. Should you be in ECP and EPP1.7 Mode you
will get an EPP1.7 Port, or if you are in ECP and EPP1.9 Mode, an EPP1.9 Port will be at your disposal.
The above modes are configurable via BIOS. You can reconfigure them by using your own software, but this is not
recommended. These software registers, typically found at 0x2FA, 0x3F0, 0x3F1 etc are only intended to be accessed
by BIOS. There is no set standard for these configuration registers, thus if you were to use these registers, your
software would not be very portable. With today's multitasking operating systems, its also not a good idea to change
them when it suits you.
A better option is to select ECP and EPP1.7 Mode or ECP and EPP1.9 Mode from BIOS and then use the ECP's
Extended Control Register to select your Parallel Port's Mode. The EPP1.7 mode had a few problems in regards to the
Data and Address Strobes being asserted to start a cycle regardless of the wait state, thus this mode if not typically
used now. Best set your Parallel Port to ECP and EPP1.9 Mode.
Parallel Port Modes and the ECP's Extended Control Register
As we have just discussed, it is better to set the Parallel Port to ECP and EPP1.9 Mode and use the ECP's Extended
Control Register to select different modes of operation. The ECP Registers are standardized under Microsoft's
Extended Capabilities Port Protocol and ISA Interface Standard, thus we don't have that problem of every vendor
having their own register set.
When set to ECP Mode, a new set of registers become available at Base + 0x400h. A discussion of these registers are
available in Interfacing the Extended Capabilities Port. Here we are only interested in the Extended Control Register
(ECR) which is mapped at Base + 0x402h. It should be stated that the ECP's registers are not available for port's with a
base address of 0x3BCh.
Bit Function
7:5 Selects Current Mode of Operation
000 Standard Mode
001 Byte Mode
010 Parallel Port FIFO Mode
011 ECP FIFO Mode
100 EPP Mode
101 Reserved
110 FIFO Test Mode

111 Configuration Mode

4 ECP Interrupt Bit
3 DMA Enable Bit
2 ECP Service Bit
1 FIFO Full
0 FIFO Empty
Table 7 - Extended Control Register (ECR)
The table above is of the Extended Control Register. We are only interested in the three MSB of the Extended Control
Register which selects the mode of operation. There are 7 possible modes of operation, but not all ports will support all
modes. The EPP mode is one such example, not being available on some ports.
Modes of Operation
Standard Mode Selecting this mode will cause the ECP port to behave as a Standard Parallel
Port, without bi-directional functionality.
Byte Mode / PS/2 Mode Behaves as a SPP in bi-directional mode. Bit 5 will place the port in reverse
mode.
Parallel Port FIFO Mode In this mode, any data written to the Data FIFO will be sent to the peripheral
using the SPP Handshake. The hardware will generate the handshaking required.
Useful with non-ECP devices such as Printers. You can have some of the
features of ECP like FIFO buffers and hardware generation of handshaking
but with the existing SPP handshake instead of the ECP Handshake.
ECP FIFO Mode Standard mode for ECP use. This mode uses the ECP Handshake described in
Interfacing the Extended Capabilities Port. - When in ECP Mode though BIOS,
and the ECR register is set to ECP FIFO Mode (011), the SPP registers may
disappear.
EPP Mode/Reserved This will enable EPP Mode, if available. Under BIOS, if ECP mode is set then it's
more than likely, this mode is not an option. However if BIOS is set to ECP and
EPP1.x Mode, then EPP 1.x will be enabled. - Under Microsoft's Extended
Capabilities Port Protocol and ISA Interface Standard this mode is Vendor
Specified.
Reserved Currently Reserved. - Under Microsoft's Extended Capabilities Port Protocol
and ISA Interface Standard this mode is Vendor Specified.
FIFO Test Mode While in this mode, any data written to the Test FIFO Register will be placed into
the FIFO and any data read from the Test FIFO register will be read from the
FIFO buffer. The FIFO Full/Empty Status Bits will reflect their true value, thus
FIFO depth, among other things can be determined in this mode.
Configuration Mode In this mode, the two configuration registers, cnfgA & cnfgB become available at
their designated register addresses.
If you are in ECP Mode under BIOS, or if your card is jumpered to use ECP then it is a good idea to initialize the mode
of your ECP port to a pre-defined state before use. If you are using SPP, then set the port to Standard Mode as the first
thing you do. Don't assume that the port will already be in Standard (SPP) mode.
Under some of the modes, the SPP registers may disappear or not work correctly. If you are using SPP, then set the
ECR to Standard Mode. This is one of the most common mistakes that people make.
PDF Version

This page, Interfacing the Standard Parallel Port is also avaliable in PDF (Portable Document Format),
Interfacing the Standard Parallel Port (76KB)

Wednesday, February
13th, 2008

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Operating System : Windows 2000 build 2195
Service Pack : Service Pack 4
Number of Processors Installed : 1

Processor 1 CPUID : Intel(R) Pentium(R) 4 CPU 2.00GHz
Processor 1 Identifier : x86 Family 15 Model 2 Stepping 4
Processor 1 Type : Pentium IV (0.13 um)
Processor 1 Speed : 2205 MHz
Memory :
Installed Memory : 512 Mbytes
Virtual Memory : 2047 Mbytes
MemoryLoad : 43%
http://www.beyondlogic.org/solutions/compinfo/compinfo.htm (1 of 4)13/02/2008 16:45:07

Network :
Description : Accton EN1207D/EN2242A Series NDIS 5.0 driver
Mac Address : 00:00:E8:8B:D5:D7
IP Address : 192.168.0.18
Gateway : 192.168.0.17
Primary WINS Server : 192.168.0.1
Secondary WINS Server : 0.0.0.0
DNS Server : 203.11.90.240, 203.11.90.1
Drive Information :
Drv Type Label Type Serial No. Free Space Disc Size Full
A:\ Removable
C:\ Fixed Local Disk NTFS 7073-C458 25,961MB 38,162MB 31%
D:\ CDROM
E:\ Fixed Win2k NTFS E43E-47F3 27,545MB 39,997MB 31%
F:\ Fixed Junk NTFS 7073-C458 1,835MB 2,047MB 10%
G:\ Fixed Data NTFS 9C03-B1B3 52MB 20,002MB 99%
VideoCards :
DeviceName : \\.\DISPLAY1
Display : WinFast GeForce2 MX Series (Primary Device)
DeviceName : \\.\DISPLAY3
Display : NetMeeting driver
Physical Disk Information:
TID Device Version Type

0 WDC WD800JB-00CRA1 17.0 Direct Access Device
1 WDC WD400BB-00AUA1 18.2 Direct Access Device
TID Device Version Type

0 SONY CD-RW CRX140E 1.0s CDROM Device (Removable)
1 PIONEER DVD-RW DVR-106D1.06 CDROM Device (Removable)
Hard Drive Information :
Primary Controller - Master drive :

Model Number : WDC WD800JB-00CRA1
Serial Number : WD-WMA8E2668332
Firmware Version : 17.07W17
Buffer Size : 8192 Kbytes
Drive Size : 80.026 GB
Primary Controller - Slave drive :

Model Number : WDC WD400BB-00AUA1
Serial Number : WD-WMA6R3968519
Firmware Version : 18.20D18
Buffer Size : 2048 Kbytes

CDROM Information :
Product ID : CD-RW CRX140E

Type : ATAPI Burner
Read Capabilities : CD-R, CD-RW
Write Capabilities : CD-R, CD-RW
Product ID : DVD-RW DVR-106D

Type : ATAPI Burner
Read Capabilities : CD-R, CD-RW, DVD-ROM, DVD-R
Write Capabilities : CD-R, CD-RW, DVD-R
Printers (2 Installed):
Printer Name : Fax

Driver Name : Windows NT Fax Driver
Port Name : MSFAX:
Printer Name : Brother HL-730 (600 dpi)

Driver Name : Brother HL-730 (600 dpi)
Port Name : LPT1:
Download
Revision History
10th November 2003 - Version 1.01
Added reporting of CDROM/DVD Supported Media and Capabilities
22nd April 2002 - Version 1.00

programs from floppy disk and CDROM drives or from the users e-mail attachment directory. Stop PE viruses
in their tracks where on Windows platforms year, nine out of ten of the top viruses were spread via e-mail.

Want a command line utility to view, kill, suspend or set the priority or affinity of processes, perhaps from a
batch file? Kills rouge processes where Window's Task Manager fails.




ME, Windows NT/2000/XP will cause an exception (Privileged Instruction) if an attempt is made to access an
I/O port that your program is not privileged to access. The PortTalk driver allows existing programs to access
selected I/O ports.

Interfacing the Parallel Port to a 16 Character x 2 Line LCD
Interfacing Example - 16 Character x 2 Line LCD
Description.
This is the first interfacing example for the Parallel Port. We will start with something simple. This example doesn't
use the Bi-directional feature found on newer ports, thus it should work with most, if no all Parallel Ports. It
however doesn't show the use of the Status Port as an input. So what are we interfacing? A 16 Character x 2 Line
LCD Module to the Parallel Port. These LCD Modules are very common these days, and are quite simple to work
with, as all the logic required to run them is on board.
Schematic
Circuit Description
Above is the quite simple schematic. The LCD panel's Enable and Register Select is connected to the Control
Port. The Control Port is an open collector / open drain output. While most Parallel Ports have internal pull-up
resistors, there are a few which don't. Therefore by incorporating the two 10K external pull up resistors, the circuit
is more portable for a wider range of computers, some of which may have no internal pull up resistors.
We make no effort to place the Data bus into reverse direction. Therefore we hard wire the R/W line of the LCD
panel, into write mode. This will cause no bus conflicts on the data lines. As a result we cannot read back the
LCD's internal Busy Flag which tells us if the LCD has accepted and finished processing the last instruction. This
problem is overcome by inserting known delays into our program.
The 10k Potentiometer controls the contrast of the LCD panel. Nothing fancy here. As with all the examples, I've
left the power supply out. You can use a bench power supply set to 5v or use a onboard +5 regulator. Remember
a few de-coupling capacitors, especially if you have trouble with the circuit working properly.
http://www.beyondlogic.org/parlcd/parlcd.htm (1 of 4)13/02/2008 16:45:17

The 2 line x 16 character LCD modules are available from a wide

range of manufacturers and should all be compatible with the
HD44780. The one I used to test this circuit was a Powertip PC-1602F
and an old Philips LTN211F-10 which was extracted from a Poker
Machine! The diagram to the right, shows the pin numbers for these
devices. When viewed from the front, the left pin is pin 14 and the
right pin is pin 1.
Programming - Source Code
/* LCD Module Software */

/* 17th May 1997 */
/* Copyright 1997 Craig Peacock */
/* WWW - http://www.senet.com.au/~cpeacock */
/* Email - cpeacock@senet.com.au */
/* */
/* Register Select must be connected to Select Printer (PIN 17) */
/* Enable must be connected to Strobe (PIN1) */
/* DATA 0:7 Connected to DATA 0:7 */
#include <dos.h>
#include <string.h>
#define PORTADDRESS 0x378 /* Enter Your Port Address Here */
#define DATA PORTADDRESS+0

#define STATUS PORTADDRESS+1
#define CONTROL PORTADDRESS+2
void main(void)
{
char string[] = {"Testing 1,2,3 "
"It' Works ! "};
char init[10];
int count;
int len;
init[0] = 0x0F; /* Init Display */
init[1] = 0x01; /* Clear Display */
init[2] = 0x38; /* Dual Line / 8 Bits */
outportb(CONTROL, inportb(CONTROL) & 0xDF); /* Reset Control Port - Make sure

Forward Direction */
outportb(CONTROL, inportb(CONTROL) | 0x08); /* Set Select Printer (Register Select)

*/
for (count = 0; count <= 2; count++)

{
outportb(DATA, init[count]);
outportb(CONTROL,inportb(CONTROL) | 0x01); /* Set Strobe (Enable)*/
delay(20); /* Larger Delay for INIT */
outportb(CONTROL,inportb(CONTROL) & 0xFE); /* Reset Strobe (Enable)*/
delay(20); /* Larger Delay for INIT */
}
outportb(CONTROL, inportb(CONTROL) & 0xF7); /* Reset Select Printer (Register

Select) */

len = strlen(string);
for (count = 0; count < len; count++)

{
outportb(DATA, string[count]);
outportb(CONTROL,inportb(CONTROL) | 0x01); /* Set Strobe */
delay(2);
outportb(CONTROL,inportb(CONTROL) & 0xFE); /* Reset Strobe */
delay(2);
}
}
Above is the source code to get this example running. It's been written for Borland C, so if you are using a
Microsoft compiler, then you will have to change the outportb() function to outp() and inportb() to inp().
The LCD panel requires a few instructions to be sent, to order to turn on the display and initialise it. This is what
the first for loop does. These instructions must be sent to the LCD's Instruction Register which is controlled by the
Register Select (Pin 4). When pin 4 is low the instruction register is selected, thus when high the data register
must be selected. We connect this to the Parallel Port's Select Printer line which happens to be hardware inverted.
Therefore if we write a '1' to bit 3 of the Control Register the Select Printer line goes low.
We want to first send instructions to the LCD module. Therefore the Register Select line must be low. As it is
hardware inverted, we will want to set bit 3 of the Control Register to '1'. However we don't want to upset any other
bits on the Control Port. We achieve this by reading the Control Port and OR'ing 0x80 to it. e.g. outportb
(CONTROL, inportb(CONTROL) | 0x08); This will only set bit 3.
After we place a data byte on the data lines, we must then signal to the LCD module to read the data. This is done
using the Enable line. Data is clocked into the LCD module on the high to low transition. The Strobe is hardware
inverted, thus by setting bit 0 of the Control Register we get a high to low transition on the Strobe line. We then
wait for a delay, and return the line to a high state ready for the next byte.
After we initialize the LCD Module, we want to send text to it. Characters are sent to the LCD's Data Port, thus we
want to clear bit 3. Once again we must only change the one bit, thus we use outportb(CONTROL, inportb
(CONTROL) & 0xF7);. Then we set up another for loop to read a byte from the string and send it to the LCD
panel. This is repeated for the length of the string.
The delays should be suitable for most machines. If the LCD panel is not initializing properly, you can try
increasing the delays. Likewise if the panel is skipping characters, e.g. Tst ,2. On the other hand, If the LCD
module is repeating characters e.g. TTTeessttiinngg then you may have a faulting Enable connection. Check
your Enable to Strobe connection.
Links to other information
How to control HD44780-based Character- Should you want to know more about the LCD Modules, Peer
LCD Ouwehand has done a wonderful job of it or presenting it all. Well
worth a look.
LCD Information and Technical Forum A good web page which includes information on many different
types of LCD's. Also includes a LCD Forum.
Interfacing the Parallel Port Want to know some more details about interfacing your Parallel
Port? If so, then try out this Page.


SMART and Simple for NT/2000/XP
Wednesday, February
13th, 2008
Hard disk drives are a mechanical part of your computer system. As such, they are more likely to fail than
a solid state processor, video card or stick of RAM. Typical HDD failures can include failure of the spindle
motor or bearings causing excessive heat or noise, head assembly failures including improper flying
height, head contamination, media degradation etc.
S.M.A.R.T. or Self-Monitoring Analysis and Reporting Technology was introduced into most modern hard
drives to help detect and predict these failures. Of cause not all hard drive failures are predictable.
Catastrophic events such as electronic component failure etc can occur however the majority of failures
occur from the HDD deteriorating over time.
MS Windows do not monitor HDDs for failures. BIOS can detect a failure, but only when a threshold is
exceeded on the drive. Third party applications exist to periodically monitor the drive and predict the failure
date, however these applications cost money and are required to be installed on the computer.
Smart and Simple on the other hands is just that. Its a simple command line utility to read back the
SMART attributes from a HDD while in service. Its a single 31kb executable which can be carried with you
on a floppy disk, giving you a quick indication of the health of any disk drive without the burden of installing
a sizeable application.
Usage
To use SMART & Simple is easy. To interrogate the parameters for drive C:, simply run
C:\>smart.exe
SMART & Simple for Windows NT/2000/XP

Copyright 2001-2003 Craig.Peacock@beyondlogic.org
Opened Drive \\.\C: . .
SMART Enabled : Yes

Model Number : WDC WD800JB-00CRA1
Firmware Version : 17.07W17
Serial Number : WD-WMA8E2668332
http://www.beyondlogic.org/solutions/smart/smart.htm (1 of 3)13/02/2008 16:45:28

ID Attribute Type Threshold Value Worst Raw Status

---- -------------------------- ----- --------- ----- ----- ---------- --------
[01] Raw Read Error Rate Prefailure 51 200 200 0 OK
[03] Spin Up Time Prefailure 21 98 94 4191 OK
[04] Start/Stop Count Advisory 40 99 99 1008 OK
[05] Reallocated Sector Count Prefailure 140 200 200 0 OK
[07] Seek Error Rate Prefailure 51 200 200 0 OK
[09] Power On Hours Count Advisory 0 98 98 1650 OK
[0A] Spin Retry Count Prefailure 51 100 100 0 OK
[0B] Calibration Retry Count Prefailure 51 100 100 0 OK
[0C] Power Cycle Count Advisory 0 100 100 973 OK
[C4] Re-Allocated Data Count Advisory 0 200 200 0 OK
[C5] Pending Sector Count Advisory 0 200 200 0 OK
[C6] UnCorrectable Sector Count Advisory 0 200 200 0 OK
[C7] CRC Error Count Advisory 0 200 253 0 OK
[C8] Write Error Rate Prefailure 51 200 200 0 OK
If you need to interogate a physical drive other than C:, the drive can be specified as a argument on the
command line. e.g.
smart.exe d:
Download
Revision History
21st December 2003 - Version 1.01
Fxied Exit Codes. Program exits with 0 if no error, otherwise value is first Attribute ID.

Allow users to run trusted applications from defined directories, while preventing the execution of non-
trusted programs from floppy disk and CDROM drives or from the users e-mail attachment directory. Stop
PE viruses in their tracks where on Windows platforms year, nine out of ten of the top viruses were spread
via e-mail.

Want a command line utility to view, kill, suspend or set the priority or affinity of processes, perhaps from a
batch file? Kills rouge processes where Window's Task Manager fails.




ME, Windows NT/2000/XP will cause an exception (Privileged Instruction) if an attempt is made to access
an I/O port that your program is not privileged to access. The PortTalk driver allows existing programs to
access selected I/O ports.

Want a quick console utility to display the hardware specifications of a PC including Processors Type,
Operating System and Service Pack, Physical and Virtual Memory, Network Addresses, Logical Drive
information, Video Card Type, Hard Disk, CDROM and Printer Information.
Copyright 2002-2007 Craig Peacock - 6th April 2007

Interfacing the Parallel Port
Wednesday, February
13th, 2008
Interfacing the Enhanced Parallel Port

Table of Contents
Enhanced Parallel Port
EPP Hardware Properties
The EPP Handshake
EPP Data Write Cycle
EPP Address Write Cycle
EPP Data Read Cycle
EPP Address Read Cycle
The EPP's Software Registers
EPP Programming Considerations
EPP - Enhanced Parallel Port
The Enhanced Parallel Port (EPP) was designed in a joint venture between Intel,
Xircom & Zenith Data Systems. EPP Ports were first specified in the EPP 1.7
standard, and then later included in the IEEE 1284 Standard released in 1994. EPP
has two standards, EPP 1.7 and EPP 1.9. There are differences between the two
standards which may affect the operation of devices. This is further discussed latter.
EPP has a typical transfer rate in the order of 500KB/S to 2MB/S. This is achieved by
allowing the hardware contained in the port to generate handshaking, strobing etc,
rather that have the software do it, which was the case with Centronics.
For the hobbyist, EPP is more commonly used than ECP. EPP differs from ECP by the
fact that the EPP Port generates and controls all the transfers to and from the
peripheral. ECP on the other hand requires the peripheral to negotiate a reverse
channel and control the handshaking. This is harder to achieve with common glue
logic, thus really requires a dedicated controller or ECP Peripheral Chip.
EPP Hardware Properties
http://www.beyondlogic.org/epp/epp.htm (1 of 7)13/02/2008 16:45:37

When using EPP mode, a different set of tasks and labels are assigned to each line.
These are listed below in Table 4. It's very common to see both the SPP and EPP
names interchanged in Parallel Port Data Sheets and Literature. This can make it very
hard to focus on what is exactly happening. Therefore all the documentation here will
use the EPP names.
Pin SPP Signal EPP Signal IN/OUT Function

A low on this line
indicates a Write,
1 Strobe Write Out
High indicates a
Read
Data Bus. Bi-
2-9 Data 0-7 Data 0-7 In-Out
directional
Interrupt Line.
Interrupt occurs on
10 Ack Interrupt In
Positive (Rising)
Edge.
Used for
handshaking. A EPP
11 Busy Wait In cycle can be started
when low, and
finished when high.
Paper Out / Spare - Not Used in
12 Spare In
End EPP Handshake
Spare - Not Used in
13 Select Spare In
EPP Handshake
When Low, indicates
14 Auto Linefeed Data Strobe Out
Data transfer
Spare - Not used in
15 Error / Fault Spare In
EPP Handshake
16 Initialize Reset Out Reset - Active Low
Address When low, indicates
17 Select Printer Out
Strobe Address transfer
18-25 Ground Ground GND Ground
Table 1. Pin Assignments For Enhanced Parallel Port Connector.
Paper Out, Select and Error are not defined in the EPP handshake. These lines can
be utilised in any way by the user. The status of these lines can be determined at
anytime by viewing the SPP Status Register. Unfortunately there are no spare

output's. This can become a hassle regularly.
The EPP Handshake
In order to perform a valid exchange of data using EPP we must follow the EPP
handshake. As the hardware does all the work, this handshake only requires to be
used for your hardware and not for software as the case with SPP. To initiate an EPP
cycle your software needs to perform only one I/O operation to the relevant EPP
Register. Details on this, latter.
EPP Data Write Cycle
1. Program writes to
EPP Data Register.
(Base + 4)
2. nWrite is placed low.
(Low indicates write
operation)
3. Data is placed on
Data Lines 0-7.
4. nData Strobe is
asserted if Wait is Low
(O.K. to start cycle)
5. Host waits for
Acknowledgment by
nWait going high (O.
K. to end cycle)
6. nData Strobe is de-
asserted.
Figure 1. Enhanced Parallel Port Data Write Cycle.
7. EPP Data Write
Cycle Ends.
EPP Address Write Cycle

1. Program writes
address to EPP's
Address Register
(Base + 3)
2. Write is placed low.
(Low indicates write
operation)
3. Address is placed
on Data Lines 0-7.
4. Address Strobe is
asserted if Wait is Low
(O.K. to start cycle)
5. Host waits for
Acknowledgment by
wait going high (O.K.
to end cycle)
6. nAddress Strobe is
Figure 2. Enhanced Parallel Port Address Write Cycle. De-asserted.
7. EPP Address Write
Cycle Ends.
EPP Data Read Cycle
1. Program reads
EPP Data Register.
(Base + 4)
2. nData Strobe is
asserted if Wait is
Low (O.K. to start
cycle)
3. Host waits for
Acknowledgment by
nWait going high
4. Data is read from
Parallel Port Pins.
5. nData Strobe is
de-asserted.
6. EPP Data Read
Cycle Ends.
Figure 3. Enhanced Parallel Port Data Read Cycle.
EPP Address Read Cycle

1. Program reads EPP Address

Register. (Base + 3)
2. nAddr Strobe is asserted if Wait is
Enhanced Parallel Port Low (O.K. to start cycle)
Address Read Cycle 3. Host waits for Acknowledgment
Figure 4. Enhanced Parallel Port Address Read
by nWait going high
Cycle.
4. Data is read from Parallel Port Pins.
5. nAddr Strobe is de-asserted.
6. EPP Address Read Cycle Ends.
Note If implementing EPP 1.7 Handshake (Pre IEEE 1284) the Data and Address
Strobes can be asserted to start a cycle regardless of the wait state. EPP 1.9
will only start a cycle once wait is low. Both EPP 1.7 and EPP 1.9 require the
wait to be high to finish a cycle.
The EPP's Software Registers.
The EPP Port also has a new set of registers. However 3 of them have been inherited
from the Standard Parallel Port. Below is a table showing the new and existing
registers.
Address Port Name Read/Write

Base + 0 Data Port (SPP) Write
Base + 1 Status Port (SPP) Read
Base + 2 Control Port (SPP) Write
Base + 3 Address Port (EPP) Read/Write
Base + 4 Data Port (EPP) Read/Write
Base + 5 Undefined (16/32bit Transfers) -
Base + 6 Undefined (32bit Transfers) -
Base + 7 Undefined (32bit Transfers) -
Table 2 EPP Registers
As you can see, the first 3 addresses are exactly the same than the Standard Parallel
Port Register and behave in exactly the same way. Therefore if you used a Enhanced
Parallel Port, you can output data to Base + 0 in exactly the same fashion than you
would if it was a Standard Parallel Port (SPP). If you were to connect a printer, and
use compatibility mode then you would have to check to see if the port is busy and

then assert & de-assert the strobe using the Control and Status Port, then wait for the
Ack.
If you wish to communicate with a EPP compatible device then all you have to do, is
place any data you wish to send in the EPP Data Register at Base + 4 and the card
will generate all the necessary handshaking required. Likewise if you wish to send an
address to your device, then you use the EPP Address Register at offset +3.
Both the EPP Address Register and the EPP Data Register are read / write, thus to
read data from your device, you can use the same registers. However the EPP Printer
Card has to initiate a read Cycle as both the nData Strobe and nAddress Strobe are
outputs. Your device can signal a read request via the use of the interrupt and have
your ISR perform the Read Operation.
The Status Port has one little modification. Bit 0, which was reserved in the SPP
register set, now becomes the EPP Time-out Bit. This bit will be set when an EPP time-
out occurs. This happens when the nWait line is not deasserted within approximately
10uS (depending upon the port) of the IOW or IOR line being asserted. The IOW and
IOR are the I/O Read and Write lines present on the ISA Bus.
The EPP mode is very depended of the ISA bus timing. When a read cycle is
performed, the port must undertake the appropriate Read/Write handshake and return
the data in that ISA cycle. Of course this doesn't occur within one ISA cycle, thus the
port uses the IOCHRDY (I/O Channel Ready) on the ISA bus to introduce wait states,
until the cycle completes. Now imagine if a EPP Read or Write is started with no
peripheral connected? The port never gets an acknowledgment (nWait), thus keeps
sending requests for wait states, and your computer locks up. Therefore the EPP
implements a type of watchdog, which times out after approximately 10uS.
The three registers, Base + 5, Base + 6 and Base + 7 can be used for 16 and 32 bit
read/write operations if your port supports it. This can further reduce your I/O
operations. The Parallel Port can only transport 8 bits at a time, thus any 32 or 16 bit
word written to the Parallel Port will be split into byte size blocks and sent via the
Parallel Port's 8 data lines.
EPP Programming Considerations.
EPP only has two main registers and a Time-out Status Flag, What could there
possibly be to set up?
Before you can start any EPP cycles by reading and writing to the EPP Data and
Address Ports, the port must be configured correctly. In the idle state, an EPP port
should have it's nAddress Strobe, nData Strobe, nWrite and nReset lines inactive,

high. Some ports require you to set this up before starting any EPP Cycle. Therefore
our first task is to manually initialise these lines using the SPP Registers. Writing
XXXX0100 to the control port will do this.
On some cards, if the Parallel Port is placed in reverse mode, a EPP Write cycle
cannot be performed. Therefore it is also wise to place the Parallel Port in forward
mode before using EPP. Clearing Bit 5 of the Control Register should result in an
more enjoyable programming session, without tearing your hair out.
The EPP Timeout bit we have already discussed. When this bit is set, the EPP port
may not function correctly. A common scenario is always reading 0xFF from either the
Address or Data Cycles. This bit should be cleared for reliable operation, and
constantly checked.

SIP Debug Proxy Server
Wednesday, February
13th, 2008
Having trouble trying to work out why your VoIP ATA is not registering? Maybe you are not
receiving incoming calls?
Many ATAs (Analog Telephone Adaptors) do not have great reporting of errors. Some offer
sysloging of SIP messages, but many don't. While you can use protocol analysers such as
ethereal, often you need a Hub so you can sniff the packets between your router and your ATA.
In other cases, you may have a all-in-one router and don't have access to eves drop on its
communication.
The SIP debug proxy server is a quick and small utility which can assist in these issues. You can
run the single sipdebug.exe executable on a windows based PC within your local network. Then
you can point your ATA to register with the sipdebug proxy on your local machine. This will pass
SIP traffic via the sipdebug proxy, display it in realtime and alternatively log it to a file or syslog
server for later analysis.
Usage
The sip debug utility has the following settings:
C:\>sipdebug
SIP Debug Proxy Server V1.03
Usage: sipdebug [options]

-p [udp port] SIP receiving port on localhost [default 5060]
-s [udp port] Source port for SIP destination server
-f [filename] Log to file
-l [syslog:port] Log to syslog server
If your ATA registers with sip.xyz.com, simply start the sipdebug proxy with :
sipdebug sip.xyz.com
http://www.beyondlogic.org/solutions/sipdebug/sipdebug.htm (1 of 2)13/02/2008 16:45:50

Then use ipconfig to find the IP address of the host you have sipdebug running on and set your
ATA or softphone to register with the IP address of this host. By default sipdebug listens on udp
5060, the default port for SIP.
Other switches
By default, sipdebug listens on udp 5060 for requests from your ATA. You can set a different
port to listen on using the -p switch.
Sipdebug will use a random, but free UDP port on the host to receive requests back from your
VSP (Voice Service Provider). A predefined source port can be defined using the -s switch.
Many softphones will use random source ports, like sipdebug, while many ATAs will use 5060 as
the source and destination ports. Some routers can do strange things when handling incoming
traffic on 5060, hence as part of your debugging you may need to set sipdebug's source for
traffic to your VSP to 5060. In this case, you will need to specify a SIP receiving port to
something other than 5060 using the -p switch.
For further analysis, you can log the SIP messages to file using the -f switch. You can also log to
a syslog server using -l. If the port number is omitted, the default syslog port of 514 will be used.
Download
Revision History
1st April 2007 - Version 1.00
Displays source port for communications to SIP server.
Displays host IP address for DHCP enabled hosts preventing need to use
IPconfig.
Fixed bug when receiving zero byte packets (keep-alives).
Cleaned up formatting of logs to ease readability.
http://www.beyondlogic.org/solutions/sipdebug/sipdebug.htm (2 of 2)13/02/2008 16:45:50

Interfacing the Extended Capabilities Parallel Port
Wednesday, February
13th, 2008
Interfacing the Extended Capabilities Port

Table of Contents
Introduction to the Extended Capabilities Port
ECP Hardware Properties
The ECP Handshake
ECP Forward Data Cycle
ECP Forward Command Cycle
ECP Reverse Data Cycle
ECP Reverse Command Cycle
ECP Handshake vs SPP Handshake
RLE - Run Length Encoding
ECP Software Registers
ECP's Extended Control Register (ECR)
ECP's Configuration Register A (cnfgA)
ECP's Configuration Register B (cnfgB)
Introduction to the Extended Capabilities Port
The Extended Capabilities Mode was designed by Hewlett Packard and Microsoft to be
implemented as the Extended Capabilities Port Protocol and ISA Interface Standard. This
protocol uses additional hardware to generate handshaking signals etc just like the EPP mode,
thus runs at very much the same speed than the EPP mode. This mode, however may work
better under Windows as it can use DMA channels to move it's data about. It also uses a FIFO
buffer for the sending and/or receiving of data.
Another feature of ECP is a real time data compression. It uses Run Length Encoding (RLE) to
achieve data compression ratio's up to 64:1. This comes is useful with devices such as
Scanners and Printers where a good part of the data is long strings which are repetitive.
The Extended Capabilities Port supports a method of channel addressing. This is not intended
to be used to daisy chain devices up but rather to address multiple devices within one device.
Such an example is many fax machines on the market today which may contain a Parallel Port
http://www.beyondlogic.org/ecp/ecp.htm (1 of 12)13/02/2008 16:46:05

to interface it to your computer. The fax machine can be split up into separate devices such as
the scanner, modem/Fax and printer, where each part can be addresses separately, even if
the other devices cannot accept data due to full buffers.
ECP Hardware Properties
While Extended Capabilities Printer Ports use exactly the same D25 connector as your SPP,
ECP assigns different tasks to each of the pins, just like EPP. This means that there is also a
different handshake method when using a ECP interface.
The ECP is backwards compatible to the SPP and EPP. When operating in SPP mode, the
individual lines operate in exactly the same fashion than the SPP and thus are labeled Strobe,
Auto Linefeed, Init, Busy etc. When operating in EPP mode, the pins function according to the
method described in the EPP protocol and have a different method of Handshaking. When the
port is operating in ECP mode, then the following labels are assigned to each pin.
Pin SPP Signal ECP Signal IN/OUT Function

A low on this line indicates,
that there is valid data at the
host. When this pin is de-
1 Strobe HostCLK Out
asserted, the +ve clock edge
should be used to shift the
data into the device.
2-9 Data 0-7 Data 0-7 In/Out Data Bus. Bi-directional
A low on this line indicates,
that there is valid data at the
Device. When this pin is de-
10 Ack PeriphCLK In
asserted, the +ve clock edge
should be used to shift the
data into the Host.
When in reverse direction a
HIGH indicates Data, while a
LOW indicates a Command
11 Busy PeriphAck In
Cycle.
In forward direction, functions
as PeriphAck.
When Low, Device
12 Paper Out / End nAckReverse In acknowledges Reverse
Request.
13 Select X-Flag In Extensibility Flag

When in forward direction a

HIGH indicates Data, while a
LOW indicates a Command
14 Auto Linefeed Host Ack Out
Cycle.
In reverse direction, functions
as HostAck.
A LOW set by the device
15 Error / Fault PeriphRequest In indicates reverse data is
available
A LOW indicates data is in
16 Initialize nReverseRequest Out
reverse direction
A HIGH indicates Host is in
17 Select Printer 1284 Active Out 1284 Transfer Mode. Taken
low to terminate.
18-25 Ground Ground GND Ground
Table 1. Pin Assignments For Extended Capabilities Parallel Port Connector.
The HostAck and PeriphAck lines indicate whether the signals on the data line are data or a
command. If these lines are high then data is placed on the data lines (Pins 2-7). If a command
cycle is taking place then the appropriate line will be low, ie if the host is sending a command,
then HostAck will be low or if the device/peripheral is sending a command the PeriphAck line
will be low.
A command cycle can be one of two things, either a RLE count or an address. This is
determined by the bit 7 (MSB) of the data lines, ie Pin 9. If bit 7 is a 0, then the rest of the data
(bits 0-6) is a run length count which is used with the data compression scheme. However if bit
7 is a 1, then the data present on bits 0 to 6 is a channel address. With one bit missing this can
only be a value from 0 to 127(DEC).
The ECP Handshake
The ECP handshake is different to the SPP handshake. The most obvious difference is that
ECP has the ability at anytime to transmit data in any direction, thus additional signaling is
required. Below is the ECP handshake for both the Forward and Reverse Directions.
ECP Forward Data Cycle

1. Data is placed on Data

lines by Host.
2. Host then indicates a Data
Cycle will proceed by
asserting HostAck.
3. Host indicates valid data
by asserting HostClk low.
4. Peripheral sends its
acknowledgment of valid data
by asserting PeriphAck.
5. Host de-asserts HostClk
high. +ve edge used to shift
data into the Peripheral.
6. Peripheral sends it's
acknowledgment of the byte
Figure 1. Enhanced Capabilities Port Forward Data Cycle. via de-asserting PeriphAck.
ECP Forward Command Cycle
1. Data is placed on Data

lines by Host.
2. Host then indicates a
Command cycle will proceed
by de-asserting HostAck.
3. Host indicates valid data
by asserting HostClk low.
4. Peripheral sends its
acknowledgment of valid data
by asserting PeriphAck.
5. Host de-asserts HostClk
high. +ve edge used to shift
data into the Peripheral.
6. Peripheral sends it's
acknowledgment of the byte
Figure 2. Enhanced Capabilities Port Forward Command Cycle. via de-asserting PeriphAck.
ECP Reverse Data Cycle

1. Host sets
nReverseRequest
Low to request a
reverse channel.
2. Peripheral
acknowledges
reverse channel
request via
asserting
nAckReverse low.
3. Data is placed
on data lines by
Peripheral.
4. Data cycle is
then selected by
Peripheral via
PeriphAck going
high.
5. Valid data is
indicated by the
Peripheral
setting
PeriphClk low.
6. Host sends its
acknowledgment
of valid data via
HostAck going
high.
7. Device/
Peripheral sets
Figure 3. Enhanced Capabilities Port Reverse Data Cycle.
PeriphClk high.
+ve edge used to
shift data into
the Host.
8. Host sends it's
acknowledgment
of the byte by de-
asserting HostAck
low.
ECP Reverse Command Cycle

1. Host sets
nReverseRequest Low
to request a reverse
channel.
2. Peripheral
acknowledges reverse
channel request via
asserting nAckReverse
low.
3. Data is placed on
data lines by
Peripheral.
4. Command cycle is
then selected by
Peripheral via PeriphAck
going low.
5. Valid data is
indicated by the
Peripheral setting
PeriphClk low.
6. Host sends its
acknowledgment of valid
data via HostAck going
high.
7. Device/Peripheral
sets PeriphClk high.
Figure 4. Enhanced Capabilities Port Reverse Command Cycle. +ve edge used to shift
data into the Host.
8. Host sends it's
acknowledgment of the
byte by de-asserting
HostAck low.
ECP Handshake vs SPP Handshake
If we look back at the SPP Handshake you will realize it only has 5 steps,
1. Write the byte to the Data Port.

2. Check to see is the printer is busy. If the printer is busy, it will not accept any data,
thus any data which is written will be lost.
3. Take the Strobe (Pin 1) low. This tells the printer that there is the correct data on the
data lines. (Pins 2-9)
4. Put the strobe high again after waiting approximately 5 microseconds after putting the
strobe low. (Step 3)
5. Check for Ack from Peripheral.

and that the ECP handshake has many more steps. This would suggest that ECP would be
slower that SPP. However this is not the case as all of these steps above are controlled by the
hardware on your I/O control. If this handshake was implemented via software control then it
would be a lot slower that it's SPP counterpart.
RLE - Run Length Encoding
As briefly discussed earlier, the ECP Protocol includes a Simple Compression Scheme called
Run Length Encoding. It can support a maximum compression ratio of 64:1 and works by
sending repetitive single bytes as a run count and one copy of the byte. The run count
determines how many times the following byte is to be repeated.
For example, if a string of 25 'A's were to be sent, then a run count byte equal to 24 would be
sent first, followed by the byte 'A'. The receiving peripheral on receipt of the Run Length Count,
would expand (Repeat) the next byte a number of times determined via the run count.
The Run Length Byte has to be distinguished from other bytes in the Data Path. It is sent as a
Command to the ECP's Address FIFO Port. Bytes sent to this register can be of two things, a
Run Length Count or an Address. These are distinguished by the MSB, Bit 7. If Bit 7 is Set (1),
then the other 7 bits, bits 0 to 6 is a channel address. If Bit 7 is Reset (0), then the lower 7 bits
is a run length count. By using the MSB, this limits channel Addresses and Run Length Counts
to 7 Bits (0 - 127).
ECP Software Registers
The table below shows the registers of the Extended Capabilities Port. The first 3 registers are
exactly the same than with the Standard Parallel Port registers. Note should be taken,
however, of the Enable Bi-Directional Port bit (bit 5 of the Control Port.) This bit reflects the
direction that the ECP port is currently in, and will effect the FIFO Full and FIFO Empty bits of
the ECR Register, which will be explained later.
Address Port Name Read/Write

Base + 0 Data Port (SPP) Write
ECP Address FIFO (ECP MODE) Read/Write
Base + 1 Status Port (All Modes) Read/Write
Base + 2 Control Port (All Modes) Read/Write
Base + 400h Data FIFO (Parallel Port FIFO Mode) Read/Write
Data FIFO (ECP Mode) Read/Write
Test FIFO (Test Mode) Read/Write

Configuration Register A
Read/Write
(Configuration Mode)
Configuration Register B
Base + 401h Read/Write
(Configuration Mode)
Extended Control Register (Used by
Base + 402h Read/Write
all modes)
Table 2 : ECP Registers
ECP's Extended Control Register (ECR)
The most important register with a Extended Capabilities Parallel Port is the Extended
Control Register (ECR) thus we will target it's operation first. This register sets up the
mode in which the ECP will run, plus gives status of the ECP's FIFO among other
things. You will find the contents of this register below, in more detail.
Bit Function
7:5 Selects Current Mode of Operation
000 Standard Mode
001 Byte Mode
010 Parallel Port FIFO Mode
011 ECP FIFO Mode
100 EPP Mode
101 Reserved
110 FIFO Test Mode
111 Configuration Mode
4 ECP Interrupt Bit
3 DMA Enable Bit
2 ECP Service Bit
1 FIFO Full
0 FIFO Empty
Table 3 ECR - Extended Control Register
The three MSB of the Extended Control Register selects the mode of operation. There
are 7 possible modes of operation, but not all ports will support all modes. The
EPP mode is one such example, not being available on some ports. Below is a table of
Modes of Operation.

Modes of Operation
Standard Mode Selecting this mode will cause the ECP port to
behave as a Standard Parallel Port, without Bi-
directional functionality.
Byte Mode / PS/2 Mode Behaves as a SPP in Bi-directional (Reverse) mode.
Parallel Port FIFO Mode In this mode, any data written to the Data FIFO will
be sent to the peripheral using the SPP Handshake.
The hardware will generate the handshaking
required. Useful with non-ECP devices such as
Printers. You can have some of the features of ECP
like FIFO buffers and hardware generation of
handshaking but with the existing SPP handshake
instead of the ECP Handshake.
ECP FIFO Mode Standard Mode for ECP Use. This mode uses the
ECP Handshake, already described.
EPP Mode/Reserved On some chipsets, this mode will enable EPP to be
used. While on others, this mode is still reserved.
Reserved Currently Reserved
FIFO Test Mode While in this mode, any data written to the Test FIFO
Register will be placed into the FIFO and any data
read from the Test FIFO register will be read from the
FIFO buffer. The FIFO Full/Empty Status Bits will
reflect their true value, thus FIFO depth, among other
things can be determined in this mode.
Configuration Mode In this mode, the two configuration registers, cnfgA &
cnfgB become available at their designated Register
Addresses.
As outlined above, when the port is set to operate in Standard Mode, it will behave just
like a Standard Parallel Port (SPP) with no bi-directional data transfer. If you require bi-
directional transfer, then set the mode to Byte Mode. The Parallel Port FIFO mode and
ECP FIFO mode both use hardware to generate the necessary handshaking signals.
The only difference between each mode is that The Parallel Port FIFO Mode uses SPP
handshaking, thus can be used with your SPP printer. ECP FIFO mode uses ECP
handshaking.
The FIFO test mode can be used to test the capacity of the FIFO Buffers as well as to
make sure they function correctly. When in FIFO test mode, any byte which is written to
the TEST FIFO (Base + 400h) is placed into the FIFO buffer and any byte which is read
from this register is taken from the FIFO Buffer. You can use this along with the FIFO
Full and FIFO Empty bits of the Extended Control Register to determine the capacity of

the FIFO Buffer. This should normally be about 16 Bytes deep.
The other Bits of the ECR also play an important role in the operation of the ECP Port.
The ECP Interrupt Bit, (Bit 4) enables the use of Interrupts, while the DMA Enable Bit
(Bit 3) enables the use of Direct Memory Access. The ECP Service Bit (Bit 2) shows if
an interrupt request has been initiated. If so, this bit will be set. Resetting this bit is
different with different chips. Some require you to Reset the Bit, E.g. Write a Zero to it.
Others will reset once the Register has been read.
The FIFO Full (Bit 1) and FIFO Empty (Bit 0) show the status of the FIFO Buffer. These
bits are direction dependent, thus note should be taken of the Control Register's Bit 5. If
bit 0 (FIFO Empty) is set, then the FIFO buffer is completely empty. If Bit 1 is set then
the FIFO buffer is Full. Thus, if neither bit 0 or 1 is set, then there is data in FIFO, but is
not yet full. These bits can be used in FIFO Test Mode, to determine the capacity of the
FIFO Buffer.
ECP's Configuration Register A (cnfgA)
Configuration Register A is one of two configuration registers which the ECP Port has.
These Configuration Registers are only accessible when the ECP Port is in
Configuration Mode. (See Extended Control Register) CnfgA can be accessed at Base +
400h.
Bit Function
7 1 Interrupts are level triggered
0 Interrupts are edge triggered (Pulses)
6:4 00h Accepts Max. 16 Bit wide words
01h Accepts Max. 8 Bit wide words
02h Accepts Max. 32 Bit wide words
03h:07h Reserved for future expansion
3 Reserved
2 Host Recovery : Pipeline/Transmitter Byte included in FIFO?
In forward direction, the 1 byte in the transmitter
0
pipeline doesn't affect FIFO Full.
In forward direction, the 1 byte in the transmitter
1
pipeline is include as part of FIFO Full.
1:0 Host Recovery : Unsent byte(s) left in FIFO
00 Complete Pword

01 1 Valid Byte
10 2 Valid Bytes
11 3 Valid Bytes
Table 4 - Configuration Register A
Configuration Register A can be read to find out a little more about the ECP Port. The
MSB, shows if the card generates level interrupts or edge triggered interrupts. This will
depend upon the type of bus your card is using. Bits 4 to 6, show the buses width within
the card. Some cards only have a 8 bit data path, while others may have a 32 or 16 bit
width. To get maximum efficiency from your card, the software can read the status of
these bits to determine the Maximum Word Size to output to the port.
The 3 LSB's are used for Host Recovery. In order to recover from an error, the software
must know how many bytes were sent, by determining if there are any bytes left in the
FIFO. Some implementations may include the byte sitting in the transmitter register,
waiting to be sent as part of the FIFO's Full Status, while others may not. Bit 2
determines weather or not this is the case.
The other problem is that the Parallel Ports output is only 8 bits wide, and that you many
be using 16 bit or 32 bit I/O Instructions. If this is the case, then part of your Port Word
(Word you sent to port) may be sent. Therefore Bits 0 and 1 give an indication of the
number of valid bytes still left in the FIFO, so that you can retransmit these.
ECP's Configuration Register B (cnfgB)
Configuration Register B, like Configuration Register A is only available when the ECP
Port is in Configuration Mode. When in this mode, cnfgB resides at Base + 401h. Below
is the make-up of the cnfgB Register.
Bit
Function
(s)
7 1 Compress outgoing Data Using RLE
0 Do Not compress Data
Interrupt Status - Shows the Current Status of the
6
IRQ Pin
5:3 Selects or Displays Status of Interrupt Request
Line.
000 Interrupt Selected Via Jumper
001 IRQ 7
010 IRQ 9

011 IRQ 10
100 IRQ 11
101 IRQ 14
110 IRQ 15
111 IRQ 5
2:0 Selects or Displays Status of the DMA Channel
the Printer Card Uses
000 Uses a Jumpered 8 Bit DMA Channel
001 DMA Channel 1
010 DMA Channel 2
011 DMA Channel 3
100 Uses a Jumpered 16 Bit DMA Channel
101 DMA Channel 5
110 DMA Channel 6
111 DMA Channel 7
Table 5 - Configuration B Register
The Configuration Register B (cnfgB) can be a combination of read/write access. Some

ports may be software configurable, where you can set the IRQ and DMA resources
from the register. Others may be set via BIOS or by using jumpers on the Card, thus are
read only.
Bit 7 of the cnfgB Register selects whether to compress outgoing data using RLE (Run
Length Encoding.) When Set, the host will compress the data before sending. When
reset, data will be sent to the peripheral raw (Uncompressed). Bit 6 returns the status of
the IRQ pin. This can be used to diagnose conflicts as it will not only reflect the status of
the Parallel Ports IRQ, but and other device using this IRQ.
Bits 5 to 3 give status of about the Port's IRQ assignment. Likewise for bits 2 to 0 which
give status of DMA Channel assignment. As mentioned above these fields may be read/
write. The disappearing species of Parallel Cards which have Jumpers may simply show
it's resources as "Jumpered" or it may show the correct Line Numbers. However these
of course will be read only.

uClinux - Setting up the Development Environment

2008

Why Embed Linux?
Linux is fast proving to be a popular operating system for embedded network devices. Just some of the many
advantages are listed below.
Royalty free licensing. With traditional off the shelf embedded platforms there would be a
significant licensing cost involved in shipping devices with a third party OS. This eats into your
margins and contributes to a higher priced device. Linux, on the other hand is free.
Reliable IP stack and TCP/IP Applications. Linux comes with some of the most established TCP/
IP stacks and applications. Linux has been on some servers and desktops for years. This same
code base has now made it to your embedded systems.
Source code for the OS Kernel is Open. How many times have you developed software which
relies on third party code, only to find the third party code is buggy? When you consult the vendor,
they either are not interested or take weeks or months to release a patch. With linux, you have the
source code in your hot little hands. You can get in and fix any bugs and recompile it. What more
you can contribute your patches to the community which results in a more polished and stable
kernel, benefiting everyone involved.
Source code for the Toolchains is Open. Toolchains are a name for the development tools which
are used to compile the kernel and usermode applications. Once again you have the source code
for these applications. While most developers these days expect to have buggy development tools,
you have the source to fix it, and the power to fix it.
Time to market. With an abundance of open source code and applications aimed at linux, you will
find time to market is decreased. Take for example the Memory Fax/Modem products which
appeared on the market a couple years back. These units were a fax/modem with memory which
allowed it to recieve faxes when your computer was switched off. To place such a product on the
market would of required a reasonable amount of work. However with uClinux, the developer can
base their product on open source code such as efax. It also allows the ability to include IP
Masquerading with little effort, thus adding more functionality to the product.. Linux also supports a
large range of peripherals and file systems.
With all these advantages, there are many target platforms and this is continuing to grow. uClinux now supports
the 68328 dragonball series, Coldfire, ARM7TDMI, ETRAX, I960.
uClinux Distribution
uClinux is the most popular form of embedded linux. uClinux (MicroController Linux) was first ported to the
Dragonball 68k series processors in 1998 has since grown exponentially to include a wide range of targets.
uClinux differs from its mainstream linux counterparts by having no support for memory management units
http://www.beyondlogic.org/uClinux/uClinux.htm (1 of 10)13/02/2008 16:48:01

(MMU). The other important part of uClinux is a small footprint, which is essential for microcontrollers with little
resources and it's BFLT (Binary Flat) Executable Format.
Kernel 2.0.38
linux-2.0.38.tar.gz (7.5MB)
uClinux-2.0.38.1pre7.diff.gz (1.3MB)
The uClinux Kernel is where all the fuss is made. It is based on the 2.0.38 Linux kernel. Linux-2.0.38.tar.gz is the
original kernel you would use on your desktop computer. A uClinux patch is applied to bring the kernel up to a
level where it can be used on your microcontroller. This typically involves the device support and removing the
reliance on the MMU. Download the tarballs and place them in /opt/uClinux. Unpack and patch the kernel. You
will need to create the uClinux directory.
cd /opt/uClinux
tar xzf linux-2.0.38.tar.gz
gzip d uClinux-2.0.38.1pre7.diff.gz
cd linux
patch -p1 < ../uClinux-2.0.38.1pre7.diff
Once this is done, you now have yourself the code base for the uClinux Kernel. However you will now need to
build a compiler which can cross compile the code to M68K. Later in the uC-libc building, it will try to include files
in linux/include/asm. "asm" is an symbolic link which points to a folder asm-, where arch is the architecture of the
kernel. For example if we configure uClinux for m68k with no mmu, the asm folder will point to asm-m68knommu.
This is therefore a good place to start by configuring the kernel which can be done without needing the m68k-coff
compiler.
make menuconfig
The default configuration is for the uCSimm thus if you have other boards will need to configure it for your desired
target. There is no need to build the kernel, in fact you can't build the kernel yet due to a lack of development
tools. The make config will set up the asm links which are required laterfor the building of the standard c library,
uC-libc.
Toolchains
There are two different tool chains for uCLinux. One is used for the compilation of the kernel and produces 32 bit
M68K fixed position executables. The other is used for compilation of user-land binaries and produces 32 bit
M68K position independent code (PIC).
The kernel chain tool is nothing more than the standard run of the mill gcc version 2.7.2.3. The kernel diff makes
one small modification to the /config/m68k/t-m68kbare file inserting TARGET_LIBGCC2_CFLAGS = -
Dinhibit_libc to prevent it from requiring a libc library.
The user-land chain tool is a different matter. It has some quite extensive changes. These changes lie with the
requirement to have position independent binaries. No direct jumps are used, but instead these are replaced with
relative branches. Global data is retrieved relative to the A5 register.

Two options are given for building the tool chains. You can download uClinuxgcc-kit-160899.tar.gz which
contains all the patches and a makefile which automatically builds the binutils and gcc for both the kernel and
user environments. The other option is to patch and build the tools yourself and in the process learn what is
happing along the way. We detail both methods here.
Building the tool chains the easy way
Download the following
binutils-2.9.1.tar.gz (5.6MB)
gcc-2.7.2.3.tar.gz (6.9MB)
uClinuxgcc-kit-160899.tar.gz (40KB)
Extract uClinuxgcc-kit-160899.tar.gz. The buildtools can be built in any directory, independent of /opt/uClinux
tar -xzf uClinuxgcc-kit-160899.tar.gz

cd uclinuxgcc-kit-160899
Edit the Makefile (first line) changing the INSTALLDIR to a suitable destination - /opt/uClinux is recommended.
Then make the m68k-coff and m68k-pic-coff tool chains by typing,
make
This creates the executables in /opt/uClinux/bin which is not in the current path. Therefore we could either add /
opt/uClinux/bin to the path, or link our newly created binaries to /usr/bin.
cd /opt/uClinux/bin
ln -f * /usr/bin
Now that was easy, wasnt it? Now that we have boosted your confidence, lets walk through what is happing by
examining the manual version.
Manually Building the Tool Chains - m68k-coff
We will start by building the M68K fixed position tools, m68k-coff. Download
gcc-2.7.2.3.tar.gz (6.9MB)
gcc-2.7.2.3.kernel.diff.gz (1KB)
Extract the binutils src tarball to a suitable directory of your choice and enter its directory
tar xzf binutils-2.9.1.tar.gz

cd binutil-2.9.1
Configure binutils for your target. We have started with m68k-coff first as it requires no patches.
./configure -prefix=/opt/uClinux -target=m68k-coff

Then make the m68k-coff bin utilities.
make
make install
This will create a directory /opt/uClinux/m68k-coff which will have 5 subdirectories including bin, include, libs,
m68k-coff and man. This will contain headers which is needed when we create gcc. Change back to your
directory where gcc-2.7.2.3.tar.gz is present
Extract the gcc src tarball, patch it and then enter the gcc directory
tar -xzf gcc-2.7.2.3.tar.gz

gzip -d gcc-2.7.2.3.kernel.diff.gz
cd gcc-2.7.2.3
patch -p1 < ../gcc-2.7.2.3.kernel.diff
Configure gcc for your target. The prefix must be the same than the binutils, as gcc will expect to see the header
files previously created by the binutils install.
./configure --prefix=/opt/uClinux --target=m68k-coff
Then make the m68k-coff C Cross Compiler. The LANGUAGES=c instructs make only to build the C Compiler
and not the C++ Compiler which will cause some unnecessary problems.
make LANGUAGES=c
make LANGUAGES=c install
You should now have a m68k-pic-gcc compiler capable of building the kernel. The executables should be located
in /opt/uClinux/m68k-coff/bin. To continue and build the pic-coff tools we must either delete the working
directories or rename them. Renaming them is recommended as one of the reasons why you are building the
source from scratch and not downloading an RPM is that you can later apply patches and bug fixes. Rename
binutil-2.9.1 to binutil-2.9.1.kernel and gcc-2.7.2.3 to gcc-2.7.2.3.kernel
Manually Building the Tool Chains - m68k-pic-coff (Position Independent Code)
gcc-2.7.2.3.tar.gz (6.9MB)
gcc-2.7.2.3.pic.diff.gz (32KB)
binutils-2.9.1.pic.diff.gz (8KB)
Now we repeat the process for the m68k-pic-coff compiler. This time the binutils must be patched.
tar -xzf binutils-2.9.1.tar.gz

gzip -d binutils-2.9.1.pic.diff.gz
cd binutils-2.9.1
patch p1 < ../binutils-2.9.1.pic.diff
and configure this time for the m68k-pic-coff toolchain.
./configure -prefix=/opt/uClinux -target=m68k-pic-coff

Then make the m68k-coff bin utilities.
make
make install
This now has us ready to start making the gcc compiler. Extract the src tarball, patch it and then enter the gcc
directory.
tar xzf gcc-2.7.2.3.tar.gz

gzip -d gcc-2.7.2.3.pic.diff.gz
cd gcc-2.7.2.3
patch -p1 < ../gcc-2.7.2.3.pic.diff
Configure gcc for your target. The prefix must be the same than the binutils, as gcc will expect to see those
header files which binutils created.
./configure -prefix=/opt/uClinux -target=m68k-pic-coff
Then make the m68k-coff C Cross Compiler.
make LANGUAGES=c
make LANGUAGES=c install
As neither m68k-pic-coff or m68k-coff is in the current path, most make files will attempt to call gcc using m68k-
pic-coff-gcc. We can either place these two directories in our path, or we can create hard links to them in /usr/bin.
cd /opt/uClinux/bin
ln -f * /usr/bin
Hard links are created instead of soft links. If an attempt is made to create an softlink, gcc/evecvp will complain
about "too many levels of symbolic links". The content of /opt/uClinux/bin is soft links which point to the bin
directories of the individual compilers.
At this stage we now have a C Compiler which makes position independent COFF binaries. What we don't have
is any standard C or standard maths libraries thus gcc will complain. uClinux also relies on flat binaries and not
coff binaries. Therefore we must add a coff to flat converter (coff2flt) which converts the coff images the compiler
generates into flat binaries which we can then run on uClinux.
coff2flt (COFF - Common Object File Format to Flat Binary Converter)
In order to seemlessly create flat binaries with one command, the linker (LD) is replaced with a script which first
runs the linker that generates the .coff file, then runs coff2flt utility to generate the flat binary.
coff2flt-0.5.tar.gz (6KB)
Download the above file and extract it.
tar xzf coff2flt-0.5.tar.gz

cd coff2flt-0.5
make

This builds coff2flt. In the tarball is a script, ld. We must replace the pic-coff-ld with this script which in turns calls
coff2flt to create a flat binary from our coff binary. However before we do this, edit the line in LD to set %prefix%
to /opt/uClinux/m68k-pic-coff
mv /opt/uClinux/m68k-pic-coff/bin/ld /opt/uClinux/m68k-pic-coff/bin/gld
install -m 755 coff2flt /opt/uClinux/m68k-pic-coff/bin
cp ld /opt/uClinux/m68k-pic-coff/bin
chmod 755 /opt/uClinux/m68k-pic-coff/bin/ld
Standard C Library
uC-libc-310899.tar.gz (233KB)
Two libraries are used when compiling user-land binaries. These are the standard C library and standard math
library. These are static libraries which get linked at compilation time.
The uC Standard C Library has always been plagued with bugs. In particular they have had bad memory leaks
relating to their memory allocation functions. Some individuals have patches for the malloc functions which you
can manually apply and build.
The uC-libc is undergoing quite radical changes at the present moment. These experimental changes are
available through the uClinux CVS repository. A stable library should be avalible soon which will supersede these
early versions of uC-libc and provide a much more stable platform upon which to build your code. On a positive
note, the maths library has had little problems.
Extract the uC-libc tarball into /opt/uClinux.
tar xzf uC-libc-310899.tar.gz
The uC-libc library has two symbolic links (include/linux and include/net) which should point to the headers of the
uClinux Kernel. These links expect a linux directory to be present in the same tree the uC-libc directory is present
in. If one doesn't exist due to a different install location, you may wish to create a link.
The uC-libc library in its present form has no setjmp or longjmp functions which are later needed by sh. The
easiest way to fix this, is to move uC-libc/machine/setjmp.S to uC-libc/sysdeps/ and include it (setjmp.o) to uC-
libc/sysdeps/makefile.objs
cd uC-libc
make
If you receive any errors about missing files typically in the asm, linux or net directories such as "/asm/types.h -
No such file or directory," then check that you have configured your kernel (/include/asm links are in place) and
that there is either the linux kernel source or a link to linux in the same directory that uC-libc is present in.
This compiles the uC-libc library (libc.a) and leaves it in the uClibc directory. We now need to make this available
to the m68k-pic-coff tools. Either a link can be made or the files copied.
cp libc.a /opt/uClinux/m68k-pic-coff/lib/libc.a
cp crt0.o /opt/uClinux/m68k-pic-coff/lib/crt0.o

The include/header files also need to be available. The chaintool has already placed assert.h in /opt/uClinux/
m68k-pic-coff/include therefore you may wish to rename the present directory.
mv /opt/uClinux/m68k-pic-coff/include /opt/uClinux/m68k-pic-coff/include.old
ln -sf include /opt/uClinux/m68k-pic-coff/include
Standard Maths Library
uC-libm-0.9.1.tar.gz (101KB)
The standard maths library is far less problematic. Simply extract it into /opt/uClinux and make,
tar xzf uC-libm-0.9.1.tar.gz

cd uC-libm
make
then create links in the m68k-pic-coff/lib to point to the library and header files. These header files will actually
find their way to the uC-libc/include directory by a symbolic link.
ln -f libmf.a /opt/uClinux/m68k-pic-coff/lib/libmf.a
ln -f libmf.a /opt/uClinux/m68k-pic-coff/lib/libm.a
ln -f mathf.h /opt/uClinux/m68k-pic-coff/include/mathf.h
ln -f mathf.h /opt/uClinux/m68k-pic-coff/include/math.h
genromfs - ROM FileSystem Generation Utility
genromfs-0.3.tar.gz (17KB)
genromfs-0.3.diff.gz (1KB)
Genromfs generates a ROM Filesystem. Extract, patch and build using
tar -xzf genromfs-0.3.tar.gz

gzip -d genromfs-0.3.diff.gz
cd genromfs-0.3
patch -p1 <../genromfs-0.3.diff
make
make install
"make install", will install genromfs in /usr/bin plus put its documentation in usr/man/man8
Genromfs can then be called on the command line to generate your own romfs.
genromfs -v -V "ROM Disk" -f romdisk.img -d romdisk 2> romdisk.map
The genromfs has some bugs relating to device nodes. If your romfs isn't correct, the kernel normally reports
problems opening initial console (can't open the device node) and then panics. Often it is useful to mount your
newly generated romfs to see if everything is correct. This can be done using
mount r o loop t romfs romdisk.img /mnt/romfs

ROM Disk FileSystem and Userland Binaries
romdisk-0.9.1.tar.gz (184KB)
uC-src-0.9.1.tar.gz (526KB)
deftemplate.sh (1KB)
buildenv.sh (1KB)
The romdisk gziped tarball contains device nodes. As a result this file must be extracted as root into the /opt/
uClinux directory.
tar -xzf romdisk-0.9.1.tar.gz
The romdisk forms the bases of your embedded systems filesystem. The genromfs utility will create a romfs.img
from this tree, thus any changes or files you place in this tree will be present in the uClinux filesystem. The
romdisk has the following directories (and file),
bin dev etc htdocs lib proc ramfs.img sbin tmp usr var
You will notice if you change into the bin directory that precompiled binaries are already present. Their source is
installed next.
tar -xzf uC-src-0.9.2.tar.gz

cd src
make
If you experience problems building sh - undefined reference to 'setjmp' or 'longjmp' check that you have included
setjmp.S in the uC-libc build.
Running make will build all the sources listed in the SUBDIR define of the Makefile. Therefore if you add extra
sources here you must include them in the Makefile. At the completion of the build process, the binaries will be in
the src/bin directories. The deftemplate.sh script will copy the required binaries from /src to /romdisk/bin or sbin.
cp deftemplate.sh /opt/uClinux/
One last file is needed. buildenv.sh will set up the build environment from a clean directory, copying the required
sources and setting up a Makefile. Copy buildenv.sh to /opt/uClinux/bin and create a link in /usr/bin.
cp buildenv.sh /opt/uClinux/bin/
ln /opt/uClinux/bin/buildenv.sh /usr/bin/buildenv
and that is it. Now if you create an empty directory somewhere and type buildenv, a makefile will mysteriously
appear. Then type make, to see the userland sources, romdisk etc copied over and built.
PIC32 Patch - 32-bit PIC patch for m68k-pic-coff 2.7.2.3
gcc-2.7.2.3-pic-32bit.diff
crt0.S
or . . . gcc-2.7.2.3-pic-32bit.tar.gz (Gzip Archive of above two files)

With the current m68k-pic-coff compiler, a limitation exists which prevents building executables over 32k in size.
This size comes about by using 16 bit signed offsets. Erwin Authried has released some patches for m68k-pic-
coff-gcc to generate 32 bit offsets which removes this limitation. Code can be built normally with 16 bit offsets
without specifying anything special. If your program exceeds 32k, then you can call the compiler with -fPIC which
generates 32-bit offsets.
Code compiled with the -fPIC switch is larger, thus it should only be used where needed. In addition to the
compiler patch, a new C Startup file (crt0.S) is needed. This should be compiled and added to m68k-pic-coff/lib.
The startup file contains no _cleanup() function thus this must be included elsewhere.
Debugging
gdb-4.18.tar.gz (11.3MB)
gdb-4.18-gdbserver.diff.gz (2KB)
Debugging is an optional extra for the "smarter" uClinux programmers. It consists of two components, gdb-4.18
running on the host configured for m68k-coff and a gdbserver running on your uClinux platform. They talk
together over the network (IP). While the gdb client should compile with little effort, the gdb-server requires not
only patching but also support from the uClibc library, a debug uClibc library and support from the uClinux Kernel
- but don't run away yet.
gdbserver requires a trap in the uClinux Kernel to operate. The good news is that this has been included in the
later kernels and thus in many cases needs no attention. The uClinux-2.0.38.1pre7 kernel detailed here already
has this support.
Download and extract gdb-4.18
tar -xzf gdb-4.18.tar.gz

gzip -d gdb-4.18-gdbserver.diff.gz
cd gdb-4.18
patch -p1 <../gdb-4.18-gdbserver.diff
Now configure the gdb client running on the host to debug m68k-coff code and built it.
./configure --target=m68k-unknown-coff
make
To build gdbserver requires some extra functions not found in the default uC-Libc library. The source is present in
the library but is not specified to be built by default. Change into the /uC-libc/sysdeps/m68k and edit ptrace.c
so that the ptrace.h path is correct. Change #include <sys/ptrace.h> to #include <linux/ptrace.h>.
Then add the source to be build by editing /uC-libc/sysdeps/makefile.objs and adding m68k/ptrace.
o to the end of the OBJS list, so that it looks like
waitpid.o \
write.o \
m68k/ptrace.o
Then rebuild the uC-libc library and add the new libc.a to /m68k-pic-coff/lib.

cd gdb-4.18/gdb/gdbserver
../../configure --target=m68k-linux-coff
Then edit the Makefile, changing CC = gcc to CC = m68k-pic-coff-gcc
make gdbserver
coff2flt -s 32768 -o gdbserver gdbserver.coff
Running make by itself will create a gdbserver flat binary, however it's default stack size is typically around 4k. As
a result, gdbserver may crash or fail to connect. Therefore it is recommended you link with a stack size of 32k
CVS Concurrent Version System
Keeping track of all the changes and providing diff files frequently can cause headaches. Some changes get
included while others dont. To ensure your development sources are always up to date Lineo has provided a
CVS server. The CVS server allows changes to be made from multiple users, while keeping track of what the
changes are and who made them. If something gets broken in the process it is simple to back track through the
changes.
The uClinux repository is available at http://cvs.uclinux.org. From there you can browse the source and check out
what changes have been made and why.
If you want to download the complete source then this can be done by logging into CVS using the CVS client on
your development box. uClinux provides anonymous read-only access to their repository.
To start, you must log in. Use the following command.
echo anonymous > cvs d:pserver:anonymous@cvs.uclinux.org:/var/cvs login
This logs you into CVS using the username anonymous and password anonymous.
cvs z3 d:pserver:anonymous@cvs.uclinux.org:/var/cvs co P <dir>
where <dir> is one of the present directories,
uClibc The uClinux Userland C Library

uClinux-2.0.x 2.0.38 uClinux Kernel
uClinux-2.4.x 2.4.0 uClinux Kernel
userland uClinux Userland Binaries
The z3 specifies the compression used. z3 is maximum compression. The co stands for check out, while P
specifies pruning directories (i.e. remove empty directories).
Then at a later date you can update your sources by using the following command in the relevant directory.
cvs z3 update d P

Beyond Logic Parallel Port Debug Utility
Wednesday, February
13th, 2008
Parallel Port Debug Tool Version 2.0
The
Parallel
Port
Debug
Tool is a
handy
DOS
utility
when
debugging
devices
connected
to the
Parallel
Port. It
gives a
visual
display of
the three
software
registers
used by
the
Standard
Parallel
Port.
Each
individual
http://www.beyondlogic.org/pardebug/pdebug.htm (1 of 6)13/02/2008 16:48:09

bit can be
turned on
or off by
a simple
click of
the
mouse.
spp20.
zip
(14,839
Bytes)
Developments : Source Code is Now Included
The Parallel Port

Debug Tool was first
developed in 1994 by
Craig Peacock. Since
then, it has proven
very popular with
many people asking
for the source code
and extra features to
be added. To combat
both these problems,
the source code for
the Parallel Port
Debug Tool Version
2.0 has been released
and is freely available
for non-commercial
uses. The source code
or the program cannot
be sold.
However this release

was not all my work. If
it wasn't for Flavio

Poletti, the source

code would of never
been released. Flavio
has modified the
earlier code to look for
valid Parallel Ports in
the BIOS Data Table
and then provide the
user with the option to
use only one of these
detected ports. This
fixes earlier problems
where any I/O address
could be entered and
the contents of this
address modified. No
need to mention the
effects this would
have!
Flavio has also

cleaned up the code,
making it better to
read and has also
added modifications
so it compiles with
DJGPP. As to date
this source has been
compiled with Borland
C++ 3.0 and the
DJGPP Compiler. I
take the opportunity
now to thank the
efforts of Flavio.
However the Debug

Tool is not perfect yet!
Two known problems
still plague the Parallel
Port Debug Tool. The
first one is a lack of
hotkeys or
accelerators. Although
the 8 data bits can be
toggled using function

keys F1 to F8, the

selection of the LPT
Port or the toggling of
bits of Control Port
cannot be controlled
using the keyboard,
only the mouse. This
is a big problem for
people who don't have
a mouse!
The other problem

resides with the Bi-
directional control
lines. Many of you will
be aware that the
control lines are open
collector/drain outputs
and can in fact be
used as inputs as well
as outputs. However
to do so, the control
port must be written
with xxxx0100 to make
the outputs high so the
external device can
pull them low. The
problem arises, when
a read/modify/write
operation is performed
on the control port as
the read operation
returns what the logic
levels are on the pins
and not what was last
written to the port.
A solution to this
problem would be to
have two sections to
the control port. One
section would be used
to set the outputs
which is stored as a
variable. When this

variable changes, the

contents of the
variable is written to
the Port. This section
never reads the
control port only the
variable and makes
changes to it. The
other section will
continuously read the
control port and
display the results i.e.
the logic levels at the
pins of the control port.
However this is the
easy bit, finding room
on the screen to do
this requires the
rearranging the
display.
Should you make any

modifications to the
Parallel Port Debug
Tool which you think is
worth while and would
like share with us,
please send your
modified code and
details to Craig.
Peacock@beyondlogic.
org. If it's deemed
worth while to share, it
will be provided here
with your credits.
Happy
Debugging . . . .
Alternative Parallel Debug Programs

This
Graphical
Parallel
Port
Debug
Utility is a
contribution
from
Anders
Petersson.
Including
an End Of
Interrupt
(EOI)
Facility,
this
program is
driven by
either the
mouse or
Hotkeys.
panders.zip
(35,632
Bytes)

uClinux - Understanding the Build Environment

2008
uClinux - Understanding the build tools

Why Embed Linux?
So you now have a uClinux Development System. Here is the summary of the setup.
The uClinux development suite should be installed in /opt/uClinux

m68k-coff is used to compile the kernel. It has no uC-libc Standard C Library associated with it.
The uClinux kernel is installed in /opt/uClinux/linux
m68k-pic-coff is the position independent code (PIC) compiler used to compile the userland binaries.
uC-libc Standard C Library should be compiled and the resulting libc.a and crt0.o copied to /opt/
uClinux/m68k-pic-coff/lib and its include files in /opt/uClinux/m68k-pic-coff/include
uC-libm Standard Math Library should be compiled and the resulting libm.a and math.h included in /
opt/uClinux/m68k-pic-coff/lib and /opt/uClinux/m68k-pic-coff/include respectively.
m68k-pic-coffs LD replaced with a script which calls the Linker LD, then COFF2FLT to create a Flat
Binary Image from the coff file.
The genromfs utility should be built and installed somewhere in the path.
Romdisk is extracted to /opt/uClinux/romdisk
uClinux userland binary source installed in /opt/uClinux/src
The deftemplate.sh script should be placed in /opt/uClinux/
The buildenv.sh script should be placed in /opt/uClinux/bin/ and included in the path
There is two main areas of development. Work can be done on the uClinux kernel or on the userland binaries. As
the kernel is normally provided with many platforms, it is most common to work on the userland binaries. Never
the less, the uClinux Kernel should be set up first.
Building the uClinux Kernel
The kernel must be configured before building. For those who have configured their desktop kernels, this process
is no different except that uClinux doesnt support loadable modules. For others it will be a new experience. To
start jump into /opt/uClinux/linux and run the configuration utility.
cd /opt/uClinux/linux
make menuconfig
It is now time to configure the kernel. As you will be targeting different architectures and platforms there is no one
good choice here. Select your processor and board from the Platform Dependent Setup and then jump through
the menu configuring any extra parameters.
Once you have gotten over the configuration dilemmas, it is time to put your choices to code. Simply run the
following commands and sit back and watch. It can take some time to compile depending upon the speed of your
development system.
make dep
http://www.beyondlogic.org/uClinux/builduC.htm (1 of 10)13/02/2008 16:48:15

make clean
make linux.bin
Make dep will cause make to set up any dependencies. Clean will remove any old entries from previous builds,
and make image.bin will build image.bin which is the compiled kernel in pure binary.
Once this is complete you should have a couple of files in the linux directory (/opt/uClinux/linux). These will be
linux.text, linux.data, linux.bin and system map.
Understanding the Kernel Build Process
Building the kernel will first start by building the individual components/subsystems of the kernel. Once this is
done all the subsystem object files will be linked using the sections from the linker file (.LD) which will reside in
arch/$(ARCH)/platform/$(PLATFORM)/$(BOARD)/$(MODEL).ld, and the startup C asm code (crt0_rom.S) to
create a file called linux.
LD -T (MODEL).ld crt0_$(MODEL).o [objs] o linux
The linker file defines memory sections which tell the compiler how much memory is available and where to place
various pieces of code. The startup asm code is the code executed straight after the reset vector or bootloader
which sets up various parts of the microcontroller such as clock dividers, serial port, DRAM, SRAM, memory
banks, watchdogs etc which must be set up before the microcontroller can start running the linux kernel. It also
sets up the stack, zero outs the .bss segment, copies the .data segment into RAM and then jumps to start_kernel
() which is the entry point into the C Code.
A symbol/system map is then be generated from the linux file. This is handy for debugging showing where each
function is located in memory.
NM $(LINUX) | grep -v '$compiled$\|$\.o$$$\|$ a $' | sort > System.map
Linux.data, a file containing all the data segment code is then created from linux by removing all the readonly
segments and other non required segments.
objcopy -O binary --remove-section=.romvec --remove-section=.text \

--remove-section=.ramvec --remove-section=.bss \
--remove-section=.eram linux linux.data
A Linux.text file is also created containing all the text segment code (fixed code and variables/strings)
objcopy -O binary --remove-section=.ramvec --remove-section=.bss \

--remove-section=.data --remove-section=.eram \
--set-section-flags=.romvec=CONTENTS,ALLOC,LOAD,READONLY,
CODE linux linux.text
The .Text and .Data segments are then concatenated together to produce linux.bin.
cat linux.text linux.data > linux.bin
We are then left with linux.bin which is the binary code of the kernel. This can actually be loaded into memory
and executed, however it will fail shortly after trying to expand the ROM filesystem and mounting the device
nodes contained within the romfs.

Building the kernel only needs to be done once while no modifications are made to the kernel. On each build of
the system, the rom filesystem will be concatenated with the linux.bin.
The rom filesystem
While there is only one common source directory for the linux kernel, you can have multiple projects of the rom
filesystem and userland binaries. On a central server you could have the one common kernel, but have multiple
software designers working on the one system using their own rom filesystems.
To set up a working environment simply create a directory in a convenient location, typically home/<username>/
for multiuser systems and then run buildenv
cd /home/cpeacock/
mkdir ucsimm
buildenv
buildenv will build a uClinux development environment, firstly my creating one Makefile in your directory. If you
then type make, the development environment is copied across from the /opt/uClinux/ directory, and a image.bin
file created.
make
The directory should now have the following structure,
Makefile deftemplate.sh image.bin linux romdisk romdisk.img romdisk.

map src
This development environment consists of userland binaries in a ROM filesystem which is mounted by the kernel
at bootup. Every executable specified in the /src/makefile is built and its flat binary placed in /src/bin. The
deftemplate.sh file is then executed to copy specified binaries into the romdisk tree which will provide the base of
our romfs image. It should be noted that the deftemplate script only copies the binaries across to the romdisk
tree. It does not remove them, thus to do this you must uncomment the relevant line in the deftemplate script and
manually remove the file from the romdisk tree.
The romdisk tree also includes the configuration files and directory structure of the rom filesystem.
/bin /dev /etc /htdocs /lib /proc ramfs.img /sbin /tmp /usr /var
The romdisk.img file system is then automatically generated from the above tree using
genromfs -v -V "ROM Disk" -f romdisk.img -d romdisk 2> romdisk.map
The romdisk.img is then concatenated with /linux/linux.bin (the binary of the kernel we created earlier) to create
cat linux/linux.bin romdisk.img > image.bin
image.bin, a file which contains the linux kernel plus the rom filesystem. This image is now complete and ready to
download to your uClinux System. To get a better picture of the complete build process, a typical 2.0.38 uCsimm
memory map is shown here.

The bootloader flash is already present in the development system we are using, in this case the uCsimm. This is
a dragonball module from Lineo. The ROM Vectors, .TEXT and .DATA segments are created as part of the
kernel compilation. These three sections make up the linux.bin file which can be found in /opt/uClinux/linux.
The userland binaries are compiled into flat binary executables and placed in the romdisk directory. Genromfs
then packs this up into the romfs.img which is concatenated with linux.bin to provide the image.bin file. This will
grow or reduce in size depending upon what binaries and files you include in the ROM filesystem. The only
limitation is the maximum memory you have in your system.
This image.bin is a binary file which is loaded into the development system via the bootloader.
Customising the romfs.
At the present moment we have built enough code to upload the image.bin and successfully log into the target
uClinux system. However we are using the default IP address and other parameters straight out of the box.
Enter into your romdisk directory. You should have a structure simular to this.
/bin /dev /etc /htdocs /lib /proc ramfs.img /sbin /tmp /usr /var
Just like any linux system, the critical configuration files can be found in /etc
inetd.conf inittab issue passwd rc resolv.conf services
The default rc file looks like this,
#!/bin/sh
#
# system startup.
# set up the hostname

/bin/hostname uCsimm
# attach the interfaces

/sbin/ifattach

/sbin/ifattach \
--addr 192.168.1.200 \
--mask 255.255.255.0 \
--net 192.168.1.0 \
--gw 192.168.1.100 eth0
# expand the ramdisk

/sbin/expand /ramfs.img /dev/ram0
# mount ramdisk, proc and nfs

/bin/mount -t ext2 /dev/ram0 /var
/bin/mount -t proc proc /proc
/bin/mount -t nfs 192.168.1.11:/home/jeff/kit /usr
# start up the internet superserver

/sbin/inetd &
# that's it... success

exit 0
You will need to change the hostname and IP address, mask, network and gateway parameters to suit your
network. The other thing you will want to change is the nfs mount, /bin/mount -t nfs 192.168.1.11:/home/jeff/kit /
usr
Mounting a NFS volume for Development
NFS or Network File System is a way of exporting and mounting directories across UNIX and UNIX aware
systems. This may come in extremely handy during development, allowing the facility to export your working
directory to your uClinux platform. This allows the ability to compile code on your linux development system and
then run it on your embedded systems mounted network drive without the need of copying the flat binary or
flashing a new ROMFS. As you can imagine this save an enormous amount of time.
With a flashloader/ethernet flash loader utility for your desired platform, you can perform flash updates over the
wire. This also speeds up your development. Transferring a 1MB image.bin file over a 115,200 serial link is not
fast nor exciting.
To use NFS you will first need to set up your development box to export your desired directories. Exporting any
directories over the network can lead to security issues thus it is recommended you spend a little time tying your
machine down if you are on a public network or have a dial up Internet connection. NFS exports are defined in
the /etc/exports file. You will need to edit this file as root.
A typical export entry is
/home (ro)
This exports the home directories to anyone with read only rights. If you have other sensitive information in your
home directories you can either specify the exact development environment or specify which machines have
access to this exported directory eg,
/home/cpeacock/ucsimm uCSimm(ro)
where uCsimm is the host name of your uClinux based system. This would have to be included in your /etc/hosts
file or the IP address explicitly specified.

After changing the exports directory you can either restart your computer (mainstream windows users) or restart
the NFS daemons. This can be accomplished by
/etc/rc.d/init.d/nfs stop
/etc/rc.d/init.d/nfs start
on most systems. Please consult your linux distribution documentation if this does not work.
Once this has been successfully completed, modify the rc file to include your new mount details in my case,
mount -t nfs 192.168.0.1:/home/cpeacock/ucsimm /usr
You can also log into your uClinux system and run this at the command line. This is handy after your uClinux
systems have been committed to the field and you need to do a quick few things or a reimage.
The RAM FileSystem
uClinux has a RAM file system (ramdisk) for its scratch pad /tmp and /var areas in the absence of a hard disk
drive. The current distribution of uClinuxs romdisk comes with a ramfs of 256kbytes unformatted and is missing
a /var/tmp directory causing a cd tmp to report a bad directory. The /tmp directory in the root is a symbolic link
which points to /var/tmp. var is the mount point for the RAM file system.
The ramfs is uncompressed and mounted in the rc startup script,
# expand the ramdisk

# mount ramdisk, proc and nfs

It consists of a ext2 filesystem which is compressed using a Zero Run Length Encoding algorithm (ZRTE). This is
uncompressed using the expand utility to the RAM block device /dev/ram0. Once this process has been
completed it is then mounted as an ext2 file system with the mount point of /var.
If we have a need to fix the tmp link, we could simply add a command in the rc startup script to make a tmp
directory in var after the ramfs has been mounted. However if you need to increase the size of the ramdisk, this
isnt as simple. You will need to create a new ramfs.img. In some applications a larger ramdisk is required. You
may want to log data to a file that is then downloaded using anonymous FTP, HTTP etc.
Creating a new ramfs
Creating a new ramfs is a reasonably simple task. One of the problems you need to watch is byte order, whether
your system is big endian or little endian.
Start by zeroing out the ram block device. Later, we will use a zero run length compression utility, thus in the
interests of getting a more compressible image, its recommended you carry out this step. You will also need to
choose what size a ramdisk you need. A larger ramdisk will allow you to store more logs or temporary files but at
the expense of system RAM. It will normally depend upon what applications you are using with your uClinux
system.

# dd if=/dev/zero of=/dev/ram0 bs=1k count=1024

1024+0 records in
1024+0 records out
Next we make a second extended file system. The v flag turns on verbose mode so we can see some of the
stats. By default 5% of the blocks is reserved for superuser. We turn this off using m0. We also turn off any
extra features of the ext2fs using -Onone. On post 2.2 kernel systems, sparse_super and filetype options are
automatically turned on when creating an ext2fs. However both these features are not correctly supported by
kernels pre 2.2 and as a result mount will report a failure when mounting the filesystem on your 2.0.38 uClinux
system.
# mke2fs -vm0 -Onone /dev/ram0 1024

mke2fs 1.19, 13-Jul-2000 for EXT2 FS 0.5b, 95/08/09
Filesystem label=
OS type: Linux
Block size=1024 (log=0)
Fragment size=1024 (log=0)
128 inodes, 1024 blocks
0 blocks (0.00%) reserved for the super user
First data block=1
1 block group
8192 blocks per group, 8192 fragments per group
128 inodes per group
Writing inode tables: done

Writing superblocks and filesystem accounting information: done
The next step is to add extra folders or files to the ramdisk. This is an optional procedure thus you can omit this
step, if not needed. By default when the ext2 filesystem is created a lost+found directory is added. This will be
present in /var/lost+found once mounted on your uClinux system. It is also recommended to create a tmp folder
so the tmp symbolic link works. To add files and folders, first mount the file system as ext2.
# mount -t ext2 /dev/ram0 /mnt/ramdisk

# cd /mnt/ramdisk
# mkdir tmp
Then once you are finished, unmount the file system to ensure a clean mount in the future.
# umount /mnt/ramdisk
Now its time to move the filesystem from the ram block device to a local file. This copies the file system byte for
byte to ramfsraw.img. For a 1MB ramfs, this file will be 1MB in size.
# dd if=/dev/ram of=ramfsraw.img bs=1k count=1024

1024+0 records in
1024+0 records out
It would be quite inefficient to add this 1Mbyte file to the romdisk in its current form, and since the majority of the
filesystem is free, we can compress it extremely efficiently using ZRLE (Zero Run Length Encoding). You may
see some documentation describing the process as making a file with holes.
What ZRLE does is record the blocks of non-zero data, prefixing it with the length of the block and its position in
the file. As most of the data is zero, it can strip this out. The expand utility will simply zero out the entire length of
the expanded file, then copy the blocks of data back to its relevant locations indicated by its position header.

The compression can be done with a utility called holes. There are a couple of versions floating around which
have endian and/or block size reporting problems. You can download the source and compiled binaries from ftp://
ftp.beyondlogic.org/uClinux/ramfsutils.tar.gz These binaries will run on Linux little endian platforms.
# /holes/holes ramfsraw.img >ramfs.img

Length of original file 1048576
Listing the two files will show the run length compression at work. Now we can add it to our romdisk and not
waste considerable space. Of course if you do put some files in the ramdisk, then it wont compress as well.
# ls ram* -l
-rw-r--r-- 1 root root 2639 Mar 4 16:00 ramfs.img
-rw-r--r-- 1 root root 1048576 Mar 4 15:59 ramfsraw.img
You may also notice that our generated ramfs.img is smaller than the uClinux stock ramfs.img (3340), even that
an extra folder has been added. Just another reason why you should update and generate your own. (For some
reason, the run length block sizes on the stock ramfs are no larger than 200-300 bytes even though expand.c
allocates a 2048 byte buffer when expanding the image).
Testing your RAM filesystem
You can test your newly created ramfs on your uClinux platform by firstly unmounting the existing ramfs and then
expanding and mounting your new ramfs.
/bin/umount /var
However you may also wish to test it on your linux desktop. Coping the expand.c file from /src/init/ and
recompiling it for x86 linux is going to lead you into endian problems. Either fix up the ntohl() define, or use the
precompiled expand binary for x86 from the ramfsutils.tar.gz tarball.
Root filesystem on NFS
Mounting your uClinux development directory to /usr helps to speed development along. This allows the
developer to compile the m68k binaries on the linux development system and have it instantly available via the
NFS mounted volume on the target.
However there are other situations where you may want to modify other files in FLASH, such as the configuration
files in /etc for your Internet daemons, http web servers etc. One option is the flash and burn method - simply
change the file, rebuild the image, download the image to your uClinux target system, hold your breath and hope
that the changes were correct. If not pull one more hair out and simply repeat the process.
A much speedier approach and thus the better option around this problem is to mount the root uClinux directory
as a NFS volume which is pulled from your development machine. This allows modifications to be performed on
any file in the file system and have it instantly available on your uClinux system. Quite clearly this can save
considerable time.
The downside is off course, speed. Every request will interrogate your NFS server causing latency on many
commands. However this process is normally only done during development, thus speed should not pose any
problems.

Setting up a root NFS filesystem requires a little tinkering with the kernel. First edit the setup.c file in /arch/
{arch}/kernel/ and add the \ following string copy command to place your NFS server and host details in the
kernel command line buffer.
ROOT_DEV = MKDEV(BLKMEM_MAJOR,0);
+ #ifdef CONFIG_ROOT_NFS
+ strcpy(command_line,
+ "root=/dev/nfs "
+ "nfsroot=192.168.0.2:/ucsimm/romdisk "
+
"nfsaddrs=192.168.0.200:192.168.0.2:192.168.0.1:255.255.255.0:"
+ "ucsimm:eth0:none");
+ #endif
/* Keep a copy of command line */

*cmdline_p = &command_line[0];
memcpy(saved_command_line, command_line, sizeof(saved_command_line));

saved_command_line[sizeof(saved_command_line)-1] = 0;
The format of these parameters is as follows,
root=/dev/nfs
This is used to enable root NFS. It is not a real device but a pseudo-NFS-device.
nfsroot=[<server-ip>:]<root-dir>[,<nfs-options>]
server-ip is the IP address of the NFS server you wish to mount the filesystem from. The root directory specifies
the name of the directory on the NFS server to mount as root. This is followed by a comma and any standard
NFS options. The option field is normally left blank, as is the case in the example. Extra options can be found in
the nfsroot.txt file as part of the documentation you receive with the kernel.
nfsaddrs=<client-ip>:<server-ip>l:<gw-ip>:<netmask>:<hostname>:<device>:
<autoconf>
The client IP is the IP address you wish to give your embedded uClinux target. This is normally assigned by
ifattach in your rc file, but since this will no longer be available locally, you must provide these details here. The
server-ip once again specifies the NFS servers IP - the gateway and netmask should be self explanatory, the
hostname is your local devices name, the device specifies which interface to set up, while autoconf specifies if
BOOTP or rarp should be used. None specifies no auto-configuration.
These three parameters are all appended together. Note the space after each command.
Once these changes have been made and the changes saved, configure the uClinux kernel to support root NFS.
This is found in the Filesystems menu - select both "NFS filesystem support" and "Root file system on NFS".
Then rebuild your kernel. As the rom filesystem will be mounted from the NFS server there is no need to
generate the ROM file system and append this to the end of the linux.bin file. Simply load the linux.bin file as is.
At this point make sure the directory you specified in is exported correctly and reset your uClinux target. If all
goes well it should boot up with

eth0: Attempting TP
eth0: using 10Base-T (RJ-45)
Root-NFS: Got file handle for /ucsimm/romdisk via RPC
VFS: Mounted root (nfs filesystem).
And provide the user with a log-in prompt as per usual. If the NFS server is not present the following message
will result. The uClinux target will then keep trying in an endless loop until the NFS server comes on-line.
eth0: Attempting TP
NFS server 192.168.0.2 not responding, still trying.
However should you get the following message, this would suggest that your exports are not set up correctly or
you are trying to export the directory from the wrong server. In this case, check your exports file and restart the
NFS service if required. After a kernel panic, you will need to reboot your uClinux target before it will attempt to
connect again.
eth0: Attempting TP
Root-NFS: Server returned error 13 while mounting /ucsimm/romdisk
VFS: Unable to mount root fs via NFS, trying floppy.
VFS: Cannot open root device 02:00
Kernel panic: VFS: Unable to mount root fs on 02:00

Interfacing The Serial / RS-232 Port

2008
Interfacing the Serial / RS232 Port
The Serial Port is harder to interface than the Parallel Port. In most cases, any device you connect to the serial
port will need the serial transmission converted back to parallel so that it can be used. This can be done using
a UART. On the software side of things, there are many more registers that you have to attend to than on a
Standard Parallel Port. (SPP)
So what are the advantages of using serial data transfer rather than parallel?
1. Serial Cables can be longer than Parallel cables. The serial port transmits a '1' as -3 to -25 volts and a '0' as
+3 to +25 volts where as a parallel port transmits a '0' as 0v and a '1' as 5v. Therefore the serial port can
have a maximum swing of 50V compared to the parallel port which has a maximum swing of 5 Volts.
Therefore cable loss is not going to be as much of a problem for serial cables than they are for parallel.
2. You don't need as many wires than parallel transmission. If your device needs to be mounted a far distance
away from the computer then 3 core cable (Null Modem Configuration) is going to be a lot cheaper that
running 19 or 25 core cable. However you must take into account the cost of the interfacing at each end.
3. Infra Red devices have proven quite popular recently. You may of seen many electronic diaries and
palmtop computers which have infra red capabilities build in. However could you imagine transmitting 8 bits
of data at the one time across the room and being able to (from the devices point of view) decipher which
bits are which? Therefore serial transmission is used where one bit is sent at a time. IrDA-1 (The first infra
red specifications) was capable of 115.2k baud and was interfaced into a UART. The pulse length however
was cut down to 3/16th of a RS232 bit length to conserve power considering these devices are mainly used
on diaries, laptops and palmtops.
4. Microcontroller's have also proven to be quite popular recently. Many of these have in built SCI (Serial
Communications Interfaces) which can be used to talk to the outside world. Serial Communication reduces
the pin count of these MPU's. Only two pins are commonly used, Transmit Data (TXD) and Receive Data
(RXD) compared with at least 8 pins if you use a 8 bit Parallel method (You may also require a Strobe).
Table of Contents
Part 1 : Hardware (PC's)

Hardware Properties
Serial Pinouts (D25 and D9 connectors)
Pin Functions
Null Modems
Loopback Plugs
http://www.beyondlogic.org/serial/serial.htm (1 of 18)13/02/2008 16:48:24

DTE/DCE Speeds
Flow Control
The UART (8250's and Compatibles)
Type of UARTS (For PC's)
Part 2 : Serial Ports' Registers (PC's)
Port Addresses and IRQ's
Table of Registers
DLAB ?
Interrupt Enable Register (IER)
Interrupt Identification Register (IIR)
First In / First Out Control Register (FCR)
Line Control Register (LCR)
Modem Control Register (MCR)
Line Status Register (LSR)
Modem Status Register (MSR)
Scratch Register
Part 3 : Programming (PC's)
Polling or Interrupt Driven?
Source Code - Termpoll.c (Polling Version)
Source Code - Buff1024.c (ISR Version)
Interrupt Vectors
Interrupt Service Routine
UART Configuration
Main Routine (Loop)
Determining the type of UART via Software
Part 4 : External Hardware - Interfacing Methods
RS-232 Waveforms
RS-232 Level Converters
Making use of the Serial Format
8250 and compatable UART's
CDP6402, AY-5-1015 / D36402R-9 etc UARTs
Microcontrollers
Part One : Hardware (PC's)
Hardware Properties
Devices which use serial cables for their communication are split into two categories. These are DCE
(Data Communications Equipment) and DTE (Data Terminal Equipment.) Data Communications
Equipment are devices such as your modem, TA adapter, plotter etc while Data Terminal Equipment is
your Computer or Terminal.

The electrical specifications of the serial port is contained in the EIA (Electronics Industry Association)
RS232C standard. It states many parameters such as -
1. A "Space" (logic 0) will be between +3 and +25 Volts.

2. A "Mark" (Logic 1) will be between -3 and -25 Volts.
3. The region between +3 and -3 volts is undefined.
4. An open circuit voltage should never exceed 25 volts. (In Reference to GND)
5. A short circuit current should not exceed 500mA. The driver should be able to
handle this without damage. (Take note of this one!)
Above is no where near a complete list of the EIA standard. Line Capacitance, Maximum Baud Rates etc
are also included. For more information please consult the EIA RS232-C standard. It is interesting to
note however, that the RS232C standard specifies a maximum baud rate of 20,000 BPS!, which is rather
slow by today's standards. A new standard, RS-232D has been recently released.
Serial Ports come in two "sizes", There are the D-Type 25 pin connector and the D-Type 9 pin connector
both of which are male on the back of the PC, thus you will require a female connector on your device.
Below is a table of pin connections for the 9 pin and 25 pin D-Type connectors.
Serial Pinouts (D25 and D9 Connectors)
D-Type-25 Pin
D-Type-9 Pin No. Abbreviation Full Name
No.
Pin 2 Pin 3 TD Transmit Data
Pin 3 Pin 2 RD Receive Data
Pin 4 Pin 7 RTS Request To Send
Pin 5 Pin 8 CTS Clear To Send
Pin 6 Pin 6 DSR Data Set Ready
Pin 7 Pin 5 SG Signal Ground
Pin 8 Pin 1 CD Carrier Detect
Pin 20 Pin 4 DTR Data Terminal Ready
Pin 22 Pin 9 RI Ring Indicator
Table 1 : D Type 9 Pin and D Type 25 Pin Connectors
Pin Functions
Abbreviation Full Name Function

TD Transmit Data Serial Data Output (TXD)
RD Receive Data Serial Data Input (RXD)

CTS Clear to Send This line indicates that the Modem is ready to exchange data.
DCD Data Carrier Detect When the modem detects a "Carrier" from the modem at the
other end of the phone line, this Line becomes active.
DSR Data Set Ready This tells the UART that the modem is ready to establish a link.
DTR Data Terminal Ready This is the opposite to DSR. This tells the Modem that the UART
is ready to link.
RTS Request To Send This line informs the Modem that the UART is ready to exchange
data.
RI Ring Indicator Goes active when modem detects a ringing signal from the PSTN.
Null Modems
A Null Modem is used to connect two DTE's together. This is commonly used as a cheap way to network
games or to transfer files between computers using Zmodem Protocol, Xmodem Protocol etc. This can
also be used with many Microprocessor Development Systems.
Figure 1 : Null Modem Wiring Diagram
Above is my preferred method of wiring a Null Modem. It only requires 3 wires (TD, RD & SG) to be wired
straight through thus is more cost effective to use with long cable runs. The theory of operation is reasonably
easy. The aim is to make to computer think it is talking to a modem rather than another computer. Any data
transmitted from the first computer must be received by the second thus TD is connected to RD. The second
computer must have the same set-up thus RD is connected to TD. Signal Ground (SG) must also be connected
so both grounds are common to each computer.
The Data Terminal Ready is looped back to Data Set Ready and Carrier Detect on both computers. When the
Data Terminal Ready is asserted active, then the Data Set Ready and Carrier Detect immediately become
active. At this point the computer thinks the Virtual Modem to which it is connected is ready and has detected
the carrier of the other modem.
All left to worry about now is the Request to Send and Clear To Send. As both computers communicate
together at the same speed, flow control is not needed thus these two lines are also linked together on each
computer. When the computer wishes to send data, it asserts the Request to Send high and as it's hooked
together with the Clear to Send, It immediately gets a reply that it is ok to send and does so.
Notice that the ring indicator is not connected to anything of each end. This line is only used to tell the
computer that there is a ringing signal on the phone line. As we don't have a modem connected to the phone

line this is left disconnected.
LoopBack Plug
This loopback plug can come in extremely handy when writing Serial /
RS232 Communications Programs. It has the receive and transmit
lines connected together, so that anything transmitted out of the Serial
Port is immediately received by the same port. If you connect this to a
Serial Port an load a Terminal Program, anything you type will be
immediately displayed on the screen. This can be used with the
examples later in this tutorial.
Please note that this is not intended for use with Diagnostic Programs
and thus will probably not work. For these programs you require a
differently wired Loop Back plug which may vary from program to
Figure 2 : Loopback Plug Wiring Diagram program.
DTE / DCE Speeds
We have already talked briefly about DTE & DCE. A typical Data Terminal Device is a computer and a typical
Data Communications Device is a Modem. Often people will talk about DTE to DCE or DCE to DCE speeds.
DTE to DCE is the speed between your modem and computer, sometimes referred to as your terminal speed.
This should run at faster speeds than the DCE to DCE speed. DCE to DCE is the link between modems,
sometimes called the line speed.
Most people today will have 28.8K or 33.6K modems. Therefore we should expect the DCE to DCE speed to
be either 28.8K or 33.6K. Considering the high speed of the modem we should expect the DTE to DCE speed
to be about 115,200 BPS.(Maximum Speed of the 16550a UART) This is where some people often fall into a
trap. The communications program which they use have settings for DCE to DTE speeds. However they see
9.6 KBPS, 14.4 KBPS etc and think it is your modem speed.
Today's Modems should have Data Compression build into them. This is very much like PK-ZIP but the
software in your modem compresses and decompresses the data. When set up correctly you can expect
compression ratios of 1:4 or even higher. 1 to 4 compression would be typical of a text file. If we were
transferring that text file at 28.8K (DCE-DCE), then when the modem compresses it you are actually
transferring 115.2 KBPS between computers and thus have a DCE-DTE speed of 115.2 KBPS. Thus this is
why the DCE-DTE should be much higher than your modem's connection speed.
Some modem manufacturers quote a maximum compression ratio as 1:8. Lets say for example its on a new
33.6 KBPS modem then we may get a maximum 268,800 BPS transfer between modem and UART. If you only
have a 16550a which can do 115,200 BPS tops, then you would be missing out on a extra bit of performance.
Buying a 16C650 should fix your problem with a maximum transfer rate of 230,400 BPS.
However don't abuse your modem if you don't get these rates. These are MAXIMUM compression ratios. In
some instances if you try to send a already compressed file, your modem can spend more time trying the

compress it, thus you get a transmission speed less than your modem's connection speed. If this occurs try
turning off your data compression. This should be fixed on newer modems. Some files compress easier than
others thus any file which compresses easier is naturally going to have a higher compression ratio.
Flow Control
So if our DTE to DCE speed is several times faster than our DCE to DCE speed the PC can send data to your
modem at 115,200 BPS. Sooner or later data is going to get lost as buffers overflow, thus flow control is used.
Flow control has two basic varieties, Hardware or Software.
Software flow control, sometimes expressed as Xon/Xoff uses two characters Xon and Xoff. Xon is normally
indicated by the ASCII 17 character where as the ASCII 19 character is used for Xoff. The modem will only
have a small buffer so when the computer fills it up the modem sends a Xoff character to tell the computer to
stop sending data. Once the modem has room for more data it then sends a Xon character and the computer
sends more data. This type of flow control has the advantage that it doesn't require any more wires as the
characters are sent via the TD/RD lines. However on slow links each character requires 10 bits which can slow
communications down.
Hardware flow control is also known as RTS/CTS flow control. It uses two wires in your serial cable rather than
extra characters transmitted in your data lines. Thus hardware flow control will not slow down transmission
times like Xon-Xoff does. When the computer wishes to send data it takes active the Request to Send line. If
the modem has room for this data, then the modem will reply by taking active the Clear to Send line and the
computer starts sending data. If the modem does not have the room then it will not send a Clear to Send.
The UART (8250 and Compatibles)
UART stands for Universal Asynchronous Receiver / Transmitter. Its the little box of tricks found on your serial
card which plays the little games with your modem or other connected devices. Most cards will have the
UART's integrated into other chips which may also control your parallel port, games port, floppy or hard disk
drives and are typically surface mount devices. The 8250 series, which includes the 16450, 16550, 16650, &
16750 UARTS are the most commonly found type in your PC. Later we will look at other types which can be
used in your homemade devices and projects.

Figure 3 : Pin Diagrams for 16550, 16450 & 8250 UARTs
The 16550 is chip compatible with the 8250 & 16450. The only two differences are pins 24 & 29. On the 8250
Pin 24 was chip select out which functioned only as a indicator to if the chip was active or not. Pin 29 was not
connected on the 8250/16450 UARTs. The 16550 introduced two new pins in their place. These are Transmit
Ready and Receive Ready which can be implemented with DMA (Direct Memory Access). These Pins have
two different modes of operation. Mode 0 supports single transfer DMA where as Mode 1 supports Multi-
transfer DMA.
Mode 0 is also called the 16450 mode. This mode is selected when the FIFO buffers are disabled via Bit 0 of
the FIFO Control Register or When the FIFO buffers are enabled but DMA Mode Select = 0. (Bit 3 of FCR) In
this mode RXRDY is active low when at least one character (Byte) is present in the Receiver Buffer. RXRDY
will go inactive high when no more characters are left in the Receiver Buffer. TXRDY will be active low when
there are no characters in the Transmit Buffer. It will go inactive high after the first character / byte is loaded
into the Transmit Buffer.
Mode 1 is when the FIFO buffers are active and the DMA Mode Select = 1. In Mode 1, RXRDY will go active
low when the trigger level is reached or when 16550 Time Out occurs and will return to inactive state when no
more characters are left in the FIFO. TXRDY will be active when no characters are present in the Transmit
Buffer and will go inactive when the FIFO Transmit Buffer is completely Full.
All the UARTs pins are TTL compatible. That includes TD, RD, RI, DCD, DSR, CTS, DTR and RTS which all
interface into your serial plug, typically a D-type connector. Therefore RS232 Level Converters (which we talk
about in detail later) are used. These are commonly the DS1489 Receiver and the DS1488 as the PC has +12
and -12 volt rails which can be used by these devices. The RS232 Converters will convert the TTL signal into
RS232 Logic Levels.
Pin No. Name Notes

Pin 1:8 D0:D7 Data Bus
Receiver Clock Input. The frequency of this input should equal
Pin 9 RCLK
the receivers baud rate * 16

Pin 10 RD Receive Data

Pin 11 TD Transmit Data
Pin 12 CS0 Chip Select 0 - Active High
Pin 14 nCS2 Chip Select 2 - Active Low
Baud Output - Output from Programmable Baud Rate
Pin 15 nBAUDOUT
Generator. Frequency = (Baud Rate x 16)
Pin 16 XIN External Crystal Input - Used for Baud Rate Generator Oscillator
Pin 17 XOUT External Crystal Output
Pin 18 nWR Write Line - Inverted
Pin 19 WR Write Line - Not Inverted
Pin 20 VSS Connected to Common Ground
Pin 21 RD Read Line - Inverted
Pin 22 nRD Read Line - Not Inverted
Driver Disable. This pin goes low when CPU is reading from
Pin 23 DDIS UART. Can be connected to Bus Transceiver in case of high
capacity data bus.
Pin 24 nTXRDY Transmit Ready
Address Strobe. Used if signals are not stable during read or
Pin 25 nADS
write cycle
Pin 26 A2 Address Bit 2
Pin 29 nRXRDY Receive Ready
Pin 30 INTR Interrupt Output
Pin 31 nOUT2 User Output 2
Pin 32 nRTS Request to Send
Pin 33 nDTR Data Terminal Ready
Pin 35 MR Master Reset
Pin 36 nCTS Clear To Send
Pin 37 nDSR Data Set Ready
Pin 38 nDCD Data Carrier Detect
Pin 39 nRI Ring Indicator
Pin 40 VDD + 5 Volts
Table 2 : Pin Assignments for 16550A UART
The UART requires a Clock to run. If you look at your serial card a common crystal found is either a 1.8432
MHZ or a 18.432 MHZ Crystal. The crystal in connected to the XIN-XOUT pins of the UART using a few extra
components which help the crystal to start oscillating. This clock will be used for the Programmable Baud Rate

Generator which directly interfaces into the transmit timing circuits but not directly into the receiver timing
circuits. For this an external connection mast be made from pin 15 (BaudOut) to pin 9 (Receiver clock in.) Note
that the clock signal will be at Baudrate * 16.
If you are serious about pursuing the 16550 UART used in your PC further, then would suggest downloading a
copy of the PC16550D data sheet from National Semiconductors Site. Data sheets are available in .PDF
format so you will need Adobe Acrobat Reader to read these. Texas Instruments has released the 16750
UART which has 64 Byte FIFO's. Data Sheets for the TL16C750 are available from the Texas Instruments Site.
Types of UARTS (For PC's)
8250 First UART in this series. It contains no scratch register. The 8250A was an improved version
of the 8250 which operates faster on the bus side.
8250A This UART is faster than the 8250 on the bus side. Looks exactly the same to software than
16450.
8250B Very similar to that of the 8250 UART.
16450 Used in AT's (Improved bus speed over 8250's). Operates comfortably at 38.4KBPS. Still
quite common today.
16550 This was the first generation of buffered UART. It has a 16 byte buffer, however it doesn't
work and is replaced with the 16550A.
16550A Is the most common UART use for high speed communications eg 14.4K & 28.8K Modems.
They made sure the FIFO buffers worked on this UART.
16650 Very recent breed of UART. Contains a 32 byte FIFO, Programmable X-On / X-Off
characters and supports power management.
16750 Produced by Texas Instruments. Contains a 64 byte FIFO.
Part Two : Serial Port's Registers (PC's)
Port Addresses & IRQ's
Name Address IRQ

COM 1 3F8 4
COM 2 2F8 3
COM 3 3E8 4
COM 4 2E8 3
Table 3 : Standard Port Addresses
Above is the standard port addresses. These should work for most P.C's. If you just happen to be lucky
enough to own a IBM P/S2 which has a micro-channel bus, then expect a different set of addresses and

IRQ's. Just like the LPT ports, the base addresses for the COM ports can be read from the BIOS Data
Area.
Start Address Function

0000:0400 COM1's Base Address
Table 4 - COM Port Addresses in the BIOS Data Area;
The above table shows the address at which we can find the Communications (COM) ports addresses in
the BIOS Data Area. Each address will take up 2 bytes. The following sample program in C, shows how
you can read these locations to obtain the addresses of your communications ports.
#include <stdio.h>
#include <dos.h>
void main(void)
{
unsigned int far *ptraddr; /* Pointer to location of Port Addresses */
unsigned int address; /* Address of Port */
int a;
ptraddr=(unsigned int far *)0x00000400;
for (a = 0; a < 4; a++)

{
address = *ptraddr;
if (address == 0)
printf("No port found for COM%d \n",a+1);
else
printf("Address assigned to COM%d is %Xh\n",a+1,address);
*ptraddr++;
}
}
Table of Registers
Base Address DLAB Read/Write Abr. Register Name

=0 Write - Transmitter Holding Buffer
+0 =0 Read - Receiver Buffer
=1 Read/Write - Divisor Latch Low Byte
=0 Read/Write IER Interrupt Enable Register
+1
=1 Read/Write - Divisor Latch High Byte

- Read IIR Interrupt Identification Register

+2
- Write FCR FIFO Control Register
+3 - Read/Write LCR Line Control Register
+4 - Read/Write MCR Modem Control Register
+5 - Read LSR Line Status Register
+6 - Read MSR Modem Status Register
+7 - Read/Write - Scratch Register
Table 5 : Table of Registers
DLAB ?
You will have noticed in the table of registers that there is a DLAB column. When DLAB is set to '0' or '1'
some of the registers change. This is how the UART is able to have 12 registers (including the scratch
register) through only 8 port addresses. DLAB stands for Divisor Latch Access Bit. When DLAB is set to
'1' via the line control register, two registers become available from which you can set your speed of
communications measured in bits per second.
The UART will have a crystal which should oscillate around 1.8432 MHZ. The UART incorporates a
divide by 16 counter which simply divides the incoming clock signal by 16. Assuming we had the 1.8432
MHZ clock signal, that would leave us with a maximum, 115,200 hertz signal making the UART capable
of transmitting and receiving at 115,200 Bits Per Second (BPS). That would be fine for some of the faster
modems and devices which can handle that speed, but others just wouldn't communicate at all.
Therefore the UART is fitted with a Programmable Baud Rate Generator which is controlled by two
registers.
Lets say for example we only wanted to communicate at 2400 BPS. We worked out that we would have
to divide 115,200 by 48 to get a workable 2400 Hertz Clock. The "Divisor", in this case 48, is stored in
the two registers controlled by the "Divisor Latch Access Bit". This divisor can be any number which can
be stored in 16 bits (ie 0 to 65535). The UART only has a 8 bit data bus, thus this is where the two
registers are used. The first register (Base + 0) when DLAB = 1 stores the "Divisor latch low byte" where
as the second register (base + 1 when DLAB = 1) stores the "Divisor latch high byte."
Below is a table of some more common speeds and their divisor latch high bytes & low bytes. Note that
all the divisors are shown in Hexadecimal.
Speed Divisor Divisor Latch High Divisor Latch Low

(BPS) (Dec) Byte Byte
50 2304 09h 00h
300 384 01h 80h
600 192 00h C0h
2400 48 00h 30h
4800 24 00h 18h
9600 12 00h 0Ch

19200 6 00h 06h

38400 3 00h 03h
57600 2 00h 02h
115200 1 00h 01h
Table 6 : Table of Commonly Used Baudrate Divisors
Bit Notes
Bit 7 Reserved
Bit 6 Reserved
Bit 5 Enables Low Power Mode (16750)
Bit 4 Enables Sleep Mode (16750)
Bit 3 Enable Modem Status Interrupt
Bit 2 Enable Receiver Line Status Interrupt
Bit 1 Enable Transmitter Holding Register Empty Interrupt
Bit 0 Enable Received Data Available Interrupt
Table 7 : Interrupt Enable Register
The Interrupt Enable Register could possibly be one of the easiest registers on a UART to understand.
Setting Bit 0 high enables the Received Data Available Interrupt which generates an interrupt when the
receiving register/FIFO contains data to be read by the CPU.
Bit 1 enables Transmit Holding Register Empty Interrupt. This interrupts the CPU when the transmitter
buffer is empty. Bit 2 enables the receiver line status interrupt. The UART will interrupt when the receiver
line status changes. Likewise for bit 3 which enables the modem status interrupt. Bits 4 to 7 are the easy
ones. They are simply reserved. (If only everything was that easy!)
Bit Notes
Bits 6 and 7 Bit 6 Bit 7
0 0 No FIFO
0 1 FIFO Enabled but Unusable
1 1 FIFO Enabled
Bit 5 64 Byte Fifo Enabled (16750 only)
Bit 4 Reserved
Bit 3 0 Reserved on 8250, 16450

1 16550 Time-out Interrupt Pending

Bits 1 and 2 Bit 2 Bit 1
0 0 Modem Status Interrupt
0 1 Transmitter Holding Register Empty Interrupt
1 0 Received Data Available Interrupt
1 1 Receiver Line Status Interrupt
Bit 0 0 Interrupt Pending
1 No Interrupt Pending
Table 8 : Interrupt Identification Register
The interrupt identification register is a read only register. Bits 6 and 7 give status on the FIFO Buffer.
When both bits are '0' no FIFO buffers are active. This should be the only result you will get from a 8250
or 16450. If bit 7 is active but bit 6 is not active then the UART has it's buffers enabled but are unusable.
This occurs on the 16550 UART where a bug in the FIFO buffer made the FIFO's unusable. If both bits
are '1' then the FIFO buffers are enabled and fully operational.
Bits 4 and 5 are reserved. Bit 3 shows the status of the time-out interrupt on a 16550 or higher.
Lets jump to Bit 0 which shows whether an interrupt has occurred. If an interrupt has occurred it's status
will shown by bits 1 and 2. These interrupts work on a priority status. The Line Status Interrupt has the
highest Priority, followed by the Data Available Interrupt, then the Transmit Register Empty Interrupt and
then the Modem Status Interrupt which has the lowest priority.
Bit Notes
Bits 6 and 7 Bit 7 Bit 6 Interrupt Trigger Level
0 0 1 Byte
0 1 4 Bytes
1 0 8 Bytes
1 1 14 Bytes
Bit 5 Enable 64 Byte FIFO (16750 only)
Bit 4 Reserved
DMA Mode Select. Change status of RXRDY & TXRDY pins from
Bit 3
mode 1 to mode 2.
Bit 2 Clear Transmit FIFO
Bit 1 Clear Receive FIFO
Bit 0 Enable FIFO's
Table 9 : FIFO Control Register
The FIFO register is a write only register. This register is used to control the FIFO (First In / First Out)

buffers which are found on 16550's and higher.
Bit 0 enables the operation of the receive and transmit FIFO's. Writing a '0' to this bit will disable the
operation of transmit and receive FIFO's, thus you will loose all data stored in these FIFO buffers.
Bit's 1 and 2 control the clearing of the transmit or receive FIFO's. Bit 1 is responsible for the receive
buffer while bit 2 is responsible for the transmit buffer. Setting these bits to 1 will only clear the contents
of the FIFO and will not affect the shift registers. These two bits are self resetting, thus you don't need to
set the bits to '0' when finished.
Bit 3 enables the DMA mode select which is found on 16550 UARTs and higher. More on this later. Bits
4 and 5 are those easy type again, Reserved.
Bits 6 and 7 are used to set the triggering level on the Receive FIFO. For example if bit 7 was set to '1'
and bit 6 was set to '0' then the trigger level is set to 8 bytes. When there is 8 bytes of data in the receive
FIFO then the Received Data Available interrupt is set. See (IIR)
Bit 7 1 Divisor Latch Access Bit

Access to Receiver buffer, Transmitter buffer & Interrupt
0
Enable Register
Bit 6 Set Break Enable
Bits 3, 4 And 5 Bit 5 Bit 4 Bit 3 Parity Select
X X 0 No Parity
0 0 1 Odd Parity
0 1 1 Even Parity
1 0 1 High Parity (Sticky)
1 1 1 Low Parity (Sticky)
Bit 2 Length of Stop Bit
0 One Stop Bit
2 Stop bits for words of length 6,7 or 8 bits or 1.5 Stop Bits
1
for Word lengths of 5 bits.
Bits 0 And 1 Bit 1 Bit 0 Word Length
0 0 5 Bits
0 1 6 Bits
1 0 7 Bits
1 1 8 Bits
Table 10 : Line Control Register
The Line Control register sets the basic parameters for communication. Bit 7 is the Divisor Latch Access

Bit or DLAB for short. We have already talked about what it does. (See DLAB?) Bit 6 Sets break enable.
When active, the TD line goes into "Spacing" state which causes a break in the receiving UART. Setting
this bit to '0' Disables the Break.
Bits 3,4 and 5 select parity. If you study the 3 bits, you will find that bit 3 controls parity. That is, if it is set
to '0' then no parity is used, but if it is set to '1' then parity is used. Jumping to bit 5, we can see that it
controls sticky parity. Sticky parity is simply when the parity bit is always transmitted and checked as a '1'
or '0'. This has very little success in checking for errors as if the first 4 bits contain errors but the sticky
parity bit contains the appropriately set bit, then a parity error will not result. Sticky high parity is the use
of a '1' for the parity bit, while the opposite, sticky low parity is the use of a '0' for the parity bit.
If bit 5 controls sticky parity, then turning this bit off must produce normal parity provided bit 3 is still set
to '1'. Odd parity is when the parity bit is transmitted as a '1' or '0' so that there is a odd number of 1's.
Even parity must then be the parity bit produces and even number of 1's. This provides better error
checking but still is not perfect, thus CRC-32 is often used for software error correction. If one bit
happens to be inverted with even or odd parity set, then a parity error will occur, however if two bits are
flipped in such a way that it produces the correct parity bit then an parity error will no occur.
Bit 2 sets the length of the stop bits. Setting this bit to '0' will produce one stop bit, however setting it to
'1' will produce either 1.5 or 2 stop bits depending upon the word length. Note that the receiver only
checks the first stop bit.
Bits 0 and 1 set the word length. This should be pretty straight forward. A word length of 8 bits is most
commonly used today.
Bit Notes
Bit 7 Reserved
Bit 6 Reserved
Bit 5 Autoflow Control Enabled (16750 only)
Bit 4 LoopBack Mode
Bit 3 Aux Output 2
Bit 2 Aux Output 1
Bit 1 Force Request to Send
Bit 0 Force Data Terminal Ready
Table 11 : Modem Control Register
The Modem Control Register is a Read/Write Register. Bits 5,6 and 7 are reserved. Bit 4 activates the
loopback mode. In Loopback mode the transmitter serial output is placed into marking state. The
receiver serial input is disconnected. The transmitter out is looped back to the receiver in. DSR, CTS, RI
& DCD are disconnected. DTR, RTS, OUT1 & OUT2 are connected to the modem control inputs. The
modem control output pins are then place in an inactive state. In this mode any data which is placed in
the transmitter registers for output is received by the receiver circuitry on the same chip and is available

at the receiver buffer. This can be used to test the UARTs operation.
Aux Output 2 maybe connected to external circuitry which controls the UART-CPU interrupt process.
Aux Output 1 is normally disconnected, but on some cards is used to switch between a 1.8432MHZ
crystal to a 4MHZ crystal which is used for MIDI. Bits 0 and 1 simply control their relevant data lines. For
example setting bit 1 to '1' makes the request to send line active.
Bit Notes
Bit 7 Error in Received FIFO
Bit 6 Empty Data Holding Registers
Bit 5 Empty Transmitter Holding Register
Bit 4 Break Interrupt
Bit 3 Framing Error
Bit 2 Parity Error
Bit 1 Overrun Error
Bit 0 Data Ready
Table 12 : Line Status Register
The line status register is a read only register. Bit 7 is the error in received FIFO bit. This bit is high when
at least one break, parity or framing error has occurred on a byte which is contained in the FIFO.
When bit 6 is set, both the transmitter holding register and the shift register are empty. The UART's
holding register holds the next byte of data to be sent in parallel fashion. The shift register is used to
convert the byte to serial, so that it can be transmitted over one line. When bit 5 is set, only the
transmitter holding register is empty. So what's the difference between the two? When bit 6, the
transmitter holding and shift registers are empty, no serial conversions are taking place so there should
be no activity on the transmit data line. When bit 5 is set, the transmitter holding register is empty, thus
another byte can be sent to the data port, but a serial conversion using the shift register may be taking
place.
The break interrupt (Bit 4) occurs when the received data line is held in a logic state '0' (Space) for more
than the time it takes to send a full word. That includes the time for the start bit, data bits, parity bits and
stop bits.
A framing error (Bit 3) occurs when the last bit is not a stop bit. This may occur due to a timing error. You
will most commonly encounter a framing error when using a null modem linking two computers or a
protocol analyzer when the speed at which the data is being sent is different to that of what you have the
UART set to receive it at.
A overrun error normally occurs when your program can't read from the port fast enough. If you don't get
an incoming byte out of the register fast enough, and another byte just happens to be received, then the
last byte will be lost and a overrun error will result.

Bit 0 shows data ready, which means that a byte has been received by the UART and is at the receiver
buffer ready to be read.
Bit Notes
Bit 7 Carrier Detect
Bit 6 Ring Indicator
Bit 5 Data Set Ready
Bit 4 Clear To Send
Bit 3 Delta Data Carrier Detect
Bit 2 Trailing Edge Ring Indicator
Bit 1 Delta Data Set Ready
Bit 0 Delta Clear to Send
Table 13 : Modem Status Register
Bit 0 of the modem status register shows delta clear to send, delta meaning a change in, thus delta clear
to send means that there was a change in the clear to send line, since the last read of this register. This
is the same for bits 1 and 3. Bit 1 shows a change in the Data Set Ready line where as Bit 3 shows a
change in the Data Carrier Detect line. Bit 2 is the Trailing Edge Ring Indicator which indicates that there
was a transformation from low to high state on the Ring Indicator line.
Bits 4 to 7 show the current state of the data lines when read. Bit 7 shows Carrier Detect, Bit 6 shows
Ring Indicator, Bit 5 shows Data Set Ready & Bit 4 shows the status of the Clear To Send line.
Scratch Register
The scratch register is not used for communications but rather used as a place to leave a byte of data.
The only real use it has is to determine whether the UART is a 8250/8250B or a 8250A/16450 and even
that is not very practical today as the 8250/8250B was never designed for AT's and can't hack the bus
speed.

Interrupt Vectors
UART Configuration

Main Routine (Loop)

RS-232 Waveforms
8250 and compatable UART's
Microcontrollers

Gcc-2.95.3 m68k-elf for uClinux
Compiling the new m68k uClinux 2.4 kernel requires an upgrade of the development tools to m68k-elf. The latest
patched m68k toolchain is based on gcc-2.95.3. In preparation for building this compiler, download the following
files.
http://www.uclinux.org/pub/uClinux/m68k-elf-tools/tools-20010610/binutils-2.10.tar.bz2 (5.3MB)
http://www.uclinux.org/pub/uClinux/m68k-elf-tools/tools-20010610/binutils-2.10-elfPICgot.patch (5kB)
http://www.uclinux.org/pub/uClinux/m68k-elf-tools/tools-20010610/binutils-2.10-wdebug.patch (1kB)
http://www.uclinux.org/pub/uClinux/m68k-elf-tools/tools-20010610/gcc-2.95.3.tar.gz (12.3MB)
http://www.uclinux.org/pub/uClinux/m68k-elf-tools/tools-20010610/gcc-2.95.3-elfPICgot.patch (25kB)
http://www.uclinux.org/pub/uClinux/m68k-elf-tools/tools-20010610/elf2flt-20010606.tar.gz (8kB)
http://www.uclinux.org/pub/uClinux/m68k-elf-tools/tools-20010610/genromfs-0.3.1.tar.bz2 (16kB)
http://www.uclinux.org/pub/uClinux/m68k-elf-tools/tools-20010610/genromfs-0.3.uclinuxdiff (4kB)
The build-m68k-elf.sh Automated Script
David McCullough has done a wonderful job at writing an automated script that builds the m68k toolchain. This
automatically builds the following components,
binutils-2.10 (Assembler, Linker etc)

gcc-2.95.3 C and C++ Compilers
optional support for uClibc and multilib libiaries
elf2flt converter
genromfs utility
This script file can be downloaded from
http://www.uclinux.org/pub/uClinux/m68k-elf-tools/tools-20010610/build-m68k-elf.sh (12kB)
You are therefore given the option to download the script and automate the entire build process or manually build
the tools yourself. While a great deal of effort has gone into making the script as fool proof as possible, changes to
the uClibc library and other dependants can break the script causing headaches trying to hack all the headers
together or trying to diagnose where the build has failed. The script also installs the tools in /usr/local which is not
everyones preferred location.
The top of the build-m68k-elf.sh script details instructions on how to built your toolchain and what files are needed.
In order to build using the script, edit the following two variables found in the script.
UCLIBC="$BASEDIR/uClibc"
KERNEL="$BASEDIR/uClinux-2.0.x"
BASEDIR is set to your current directory, thus in most cases you only need to change uClinux-2.0.x to uClinux-
2.4.x if you are compiling for version 2.4 of the uClinux kernel. Once you are satisfied with your settings, start the
ball rolling with
./build-m68k-elf.sh build 2>&1 | tee errs
This will build everything except for the multi-lib versions of uClibc. To build these run,
./build-m68k-elf.sh uclibc

http://www.beyondlogic.org/ Page 1
Manually Building the Toolchain
If you have the desire to build the tools yourself, you can proceed with the following instructions. To keep the
buildtools uClinux version independent, we dont make the C++ compiler. If needed, this can be done later as an
additional step.
binutils-2.10
First start by extracting the binary utilities, change to the binutil directory and apply the two binutil patches.
tar -xjf binutils-2.10.tar.bz2 ( or tar xzf binutils-2.10.1.tar.gz )

cd binutils-2.10
patch p1 < ../binutils-2.10-elfPICgot.patch
patch p1 < ../binutils-2.10-wdebug.patch
Note : While the patches are aimed at binutils-2.10 as apposed to binutils-2.10.1, the patches have been
tested to work on version 2.10.1 without any known side effects.
Configure the bin utilities for the m68k-elf target and give a suitable installation directory. Then make and
install the tools.
./configure -target=m68k-elf -prefix=/opt/uClinux/

make
make install
Now add the binaries to your path for gcc. During the gcc build process, a couple of libraries will be made
for the target architecture and thus the newly created gnu archiver is required. Either add a path or create
symbolic links to your binaries in /usr/bin (preferred).
cd /opt/uClinux/bin
ln s * /usr/bin/
gcc-2.95.3
Start on the gcc cross compiler by extracting the source and patching it.
tar xzf gcc-2.95.3.tar.gz

cd gcc-2.95.3
patch p1 < ../gcc-2.95.3-elfPICgot.patch
Configure gcc with a target of m68k-elf, set the install path, enable version specific runtime libaries and
explicitly order it only to make the C compiler.
./configure -prefix=/opt/uClinux/m68k-elf -target=m68k-elf \

-enable-multilib -enable-languages=c
If an attempt is make to build the m68k-elf cross compiler now, it will fail complaining of two missing files,
stdlib.h and unistd.h. To prevent this edit gcc-2.95.3/gcc/config/m68k/t-m68k-elf and insert
TARGET_LIBGCC2_CFLAGS = -Dinhibit_libc
Then make the C Cross Compiler and install it.
make
make install

elf2flt
Now we can make elf2flt and install it in the appropriate location. The elf2flt utility will convert an ELF file
created by the toolchain into a binary flat (BFLT) file for use with uClinux. Start by extracting the tarball and
copying the flat.h header file from your kernels include directory.
tar xzf elf2flt-20010606.tar.gz

cd elf2flt-20010606
cp ../uClinux-2.4.x/include/linux/flat.h .
During the build of the elf2flt utility, the libbfd.a (Binary File Descriptor Library) and libiberty.a (GNU Library)
is required. Edit the Makefile for elf2flt changing prefix= to prefix=../binutils-2.10.1 so these
two files can be found and linked with elf2flt. Now make the elf2flt utility and copy it to the following
locations.
make
cp elf2flt /opt/uClinux/m68k-elf/bin
ln f /opt/uClinux/bin/elf2flt /usr/bin
Copy the elf2flt linker script
cp elf2flt.ld /opt/uClinux/m68k-elf/lib
and move the GNU binutils m68k-elf linker to linker.real (There are two copies)
mv /opt/uClinux/bin/m68k-elf-ld m68k-elf-ld.real
mv /opt/uClinux/m68k-elf/bin/ld ld.real
Copy the linker script in place of the real linker.
cp ld-elf2flt /opt/uClinux/bin/m68k-elf-ld
cp ld-elf2flt /opt/uClinux/m68k-elf/ld
When called, the linker script will look for the -elf2flt argument. If it is not passed to the linker (e.g.
compiling a kernel or library) the script will act transparent and pass all the arguments onto the real linker.
However, if elf2flt is present it will link the required files, then spawn the elf2flt utility to generate a flat
binary file.
genromfs
Extract the genromfs (Generate ROM FileSystem) utility, patch the source, build and install it.
tar xjf genromfs-0.3.1.tar.bz2

cd genromfs-0.3.1
patch -p1 < ../genromfs-0.3.uclinuxdiff
make
make install
And to finish it off, add all the binaries to your path. Either add a path or create links to your binaries in
/usr/bin (preferred)
cd /opt/uClinux/bin
ln sf * /usr/bin/

uClibc The Standard C Library
We are now at a stage where we have a fully installed C Compiler, linker, elf2flt converter and genromfs utility. We
can compile the kernel with these tools, but the uClibc library is required for compiling any userland utilities.
The uClibc library is available from CVS. For this you will need a CVS client installed.
Log into the uClinux.org anonymous CVS server using
echo anonymous > cvs d:pserver:anonymous@cvs.uclinux.org:/var/cvs login
and download the uClibc library
cvs z3 d:pserver:anonymous@cvs.uclinux.org:/var/cvs co P uClibc
We earlier built gcc with mulitilib support. This allows the use of one compiler for a subset of m68k architectures
including the m68000, m5200 coldfire and mcpu32 by specifying each cpu type by a switch. Gcc will then link your
source with the appropriate library based upon what switch you selected.
Compiler Switch Library Directory
None /opt/uClinux/m68k-elf/lib
-msoft-float /opt/uClinux/m68k-elf/lib/msoft-float
-m5200 /opt/uClinux/m68k-elf/lib/m5200
-m5200 msep-data /opt/uClinux/m68k-elf/lib/m5200/msep-data
-m68000 /opt/uClinux/m68k-elf/lib/m68000
-m68000 msep-data /opt/uClinux/m68k-elf/lib/m68000/msep-data
-mcpu32 /opt/uClinux/m68k-elf/lib/mcpu32
-mcpu32 msep-data /opt/uClinux/m68k-elf/lib/mcpu32/msep-data
Therefore we must compile the uClibc library with the appropriate switch and place the compiled libraries in its
designated path. The build-m68k-elf.sh script has a extra option invoked by ./build-m68k-elf.sh uclibc
which will compile uClibc for all the above CPUs and copy them to the appropriate place. Where this script comes
unstuck, is if you have your tools installed in a location other than /usr.local. If you do use the script for compiling,
make sure you have set up the uClinux kernel and toolchain paths.
In many instances you will only need to compile two or three different versions. For example if you have a uCsimm,
then you will only need to target the m68000 and m68000 msep-data. In this case you may opt to compile multi-lib
support of uClibc manually.
Start with preparing uClibc. uClibc has support for a variety of architectures each having its own configuration file
stored away in the Configs directory.
cp /extra/Configs/Config.m68k Config
Edit the Config file, uncommenting the #CROSS=m68k-elf- line. Point KERNEL_SOURCE to the directory
containing your kernel source and add any architecture specific flags (eg. m68000) to the ARCH_CFLAGS towards
the end of the config file. If you are using Coldfire, you will also need to tell the assembler to use m5200
(eg. -m5200 -Wa,-m5200). Then start building uClibc.
make
Once completed, copy the libraries into the designated library directory. For example if we were compiling for
m68000, we would of added m68000 to the ARCH_CFLAGS of the uClibc Config file. After compilation we would
copy crt0.o, libc.a, libcrypt.a, libm.a, libresolv.a and libutil.a (all found in the libs directory) to /lib/m68000/.
cp lib/* /opt/uClinux/m68k-elf/lib/m68000/
Then complete this process for each desired cpu flag.

Examining the m68k-elf C Cross Compiler
The m68k-elf cross compiler is the latest version to hit uClinux development workstations. Partnered with
the elf2flt utility, it offers several different types of binaries with many advantages over the older m68k-coff
and m68k-pic-coff toolchain combo.
Fully Relocated Binaries
These non-pic (Position Independent Code) binaries are compiled with an origin of zero. Position
Independence is achieved at run time using a relocation table appended to the end of the data segment
with the offset of each location-dependent address within the program. At execution, the binflat loader
copies the text and data segments into RAM, and then adds the start address of the relevant text or data
segment of where the binary is loaded at to each address specified in the relocation table.
The outcome is a relatively simple binary which can be loaded (fully relocated) anywhere in memory and
relocations performed before control is passed to it. As parts of the code is modified at runtime, the binary
must be loaded entirely into RAM in order for the relocation touch-ups to occur. Multiple copies must have
both different text and data segments for each instance. Its not uncommon for a single line printf(Hello
World\n); program to have 150 relocations. In this case as each relocation entry is 4 bytes there is a 600
byte relocation table overhead appended to the end of the Hello World binary. At run time, these 150
relocations must be individually touched up before the tread can be started.
The advantages fully relocated binaries have over PIC is it is supported on a wider number of platforms.
This is good if your platform doesnt support PIC. It also has fewer, less reachable limits than PIC. For
example m68k processors only support a 16 bit offset, thus restricting the GOT (Global Offset Table) to a
bit over 8000 relocations. Therefore if you needed more than 8000 relocations, a fully relocated binary may
be a good choice.
PIC (Position Independent Code) -msep-data
The m68k-elf compiler has an option (fpic / fPIC) to generate position independent code. This is achieved
by making all jump and subroutine calls PC relative rather than absolute. Data access is performed in the
form of a GOT (Global Offset Table). A GOT is a 16 bit look-up table which contains 32 bit address pointers
and resides at the start of the data segment, terminated by a minus 1.
The only problem with (fpic / fPIC) is its dependence that the data segment must immediately follow the
text segment. This is what occurs when the program is first compiled at location zero, thus branches can
be safety made.
-msep-data, short for separate data allows for the data and text segments to be separated and placed in
different regions of memory. Separate text and data segments come in useful with XIP (eXecute In Place)
where the code (.text) is executed from FLASH/ROM and the data segment is loaded into RAM where the
program can modify its variables. -msep-data will turn on the fPIC option. fPIC and fpic should not be
used with m68k-elf.
Therefore the main advantage of msep-data is the ability for binaries to do XIP. It also has a lot less
relocations, which helps to keep the file size smaller and saves in memory.

Using m68k-elf-gcc
The m68k-elf-gcc cross compiler will generate m68020 code by default. Therefore to prevent privileged instructions
or illegal instruction stops, you must specify your target processor. For most architectures including the Dragonball
processors, you will need to add m68000. For the Coldfire processors you will need to add m5200.
Fully Relocated Binaries
m68k-elf-gcc Wl,-elf2flt m68000 o demo demo.c lc.
Advantages Disadvantages
Works for most targets Includes quite a few relocations that cause a
Has fewer limits Good for larger programs larger executable size and takes longer to load
& relocate.
Doesnt support XIP, thus .TEXT, .DATA &
.BSS must be in RAM. This must be duplicated
for multiple instances.
PIC Separate-Data Binaries
m68k-elf-gcc Wl,-elf2flt m68000 msep-data o demo demo.c lc.
Supports XIP. Can be executed from Maximum of about 8000 relocations.
FLASH/ROM. Multiple instances only need
one copy of .TEXT segment.
Smaller executable size.
Less relocations.
Compressed Binaries
m68k-elf-gcc Wl,-elf2flt m68000 [-msep-data] o demo demo.c lc.

elf2flt z o demo demo.elf
Smaller executable size. Latency at load to decompress executable.
Good for less frequently used executables Doesnt support XIP as .text must be
(e.g. flashloader etc) decompressed into RAM.

Wednesday, February
13th, 2008
Interfacing the Serial / RS-232 Port
Table of Contents
Part 1 : Hardware (PC's)

Hardware Properties
Serial Pinouts (D25 and D9 connectors)
Pin Functions
Null Modems
Loopback Plugs
DTE/DCE Speeds
Flow Control
The UART (8250's and Compatibles)
Type of UARTS (For PC's)
Part 2 : Serial Ports' Registers (PC's)
Port Addresses and IRQ's
Table of Registers
DLAB ?
Scratch Register
Interrupt Vectors
http://www.beyondlogic.org/serial/serial1.htm (1 of 18)13/02/2008 16:48:49

UART Configuration
Main Routine (Loop)
RS-232 Waveforms
8250 and compatible UART's
Microcontrollers
When writing a communications program you have two methods available to you. You can
poll the UART, to see if any new data is available or you can set up an interrupt handler to
remove the data from the UART when it generates a interrupt. Polling the UART is a lot
slower method, which is very CPU intensive thus can only have a maximum speed of
around 34.8 KBPS before you start losing data. Some newer Pentium Pro's may be able to
achieve better rates that this. The other option is using a Interrupt handler, and that's what
we have used here. It will very easily support 115.2K BPS, even on low end computers.
Termpoll.c - Simple Terminal Program using the Polling Method.
Polling the UART should not be dismissed totally. It's a good method for diagnostics. If you
have no idea of what address your card is at or what IRQ you are using you can poll the
UART at several different addresses to firstly find which port your card is at and which one
your modem is attached to. Once you know this information, then you can set up the
Interrupt routines for the common IRQs and by enabling one IRQ at a time using the
Programmable Interrupt Controller you can find out your IRQ, You don't even need a screw
driver!
Buff1024.c - Simple Terminal Program using Interrupt Requests.

Note: The source code above is not a really good example on how to program
but is rather cut down to size giving quick results, and making it easier to
understand. Upon executing your communications program, it would be
wise to store the status of the UART registers, so that they all can be
restored before you quit the program. This is to cause the least upset to
other programs which may also be trying to use the communications ports.
The first step to using interrupts is to work out which interrupt services your serial card.
Table 13 shows the base addresses and IRQ's of some standard ports. IRQ's 3 and 4 are
the two most commonly used. IRQ 5 and 7 are sometimes used.
Interrupt Vectors
Once we know the IRQ the next step is to find it's interrupt vector or software interrupt as
some people may call it. Basically any 8086 processor has a set of 256 interrupt vectors
numbered 0 to 255. Each of these vectors contains a 4 byte code which is an address of
the Interrupt Service Routine (ISR). Fortunately C being a high level language, takes care
of the addresses for us. All we have to know is the actual interrupt vector.
INT (Hex) IRQ Common Uses

08 0 System Timer
09 1 Keyboard
0A 2 Redirected
0B 3 Serial Comms. COM2/COM4
0C 4 Serial Comms. COM1/COM3
0D 5 Reserved/Sound Card
0E 6 Floppy Disk Controller
0F 7 Parallel Comms.
70 8 Real Time Clock
71 9 Reserved
72 10 Reserved
73 11 Reserved
74 12 PS/2 Mouse
75 13 Maths Co-Processor
76 14 Hard Disk Drive
77 15 Reserved
Table 14 : Interrupt Vectors (Hardware Only)

The above table shows only the interrupts which are associated with IRQ's. The other 240
are of no interest to us when programming RS-232 type communications.
For example if we were using COM3 which has a IRQ of 4, then the interrupt vector would
be 0C in hex. Using C we would set up the vector using the instruction setvect(0x0C,
PORT1INT); where PORT1INT would lead us to a set of instructions which would service
the interrupt.
However before we proceed with that I should say that it is wise to record the old vectors
address and then restore that address once the program is finished. This is done using
oldport1isr = getvect(INTVECT); where oldport1isr is defined using void
interrupt (*oldport1isr)();
Not only should you store the old vector addresses, but also the configuration the UART
was in. Why you Ask? Well it's simple, I wrote a communications program which was fully
featured in the chat side of things. It had line buffering, so no body could see my spelling
mistakes or how slowly I typed. It included anti-bombing routines and the list goes on.
However I couldn't be bothered to program any file transfer protocols such as Zmodem etc
into my communications program. Therefore I either had to run my communications
program in the background of Telemate using my communications program for chat and
everything else it was designed for and using Telemate to download files. Another method
was to run, say Smodem as a external protocol to my communications program.
Doing this however would mean that my communications program would override the
original speed, parity etc and then when I returned to the original communications program,
everything stopped. Therefore by saving the old configuration, you can revert back to it
before you hand the UART back over to the other program. Makes sense? However if you
don't have any of these programs you can save yourself a few lines of code. This is what
we have done here.
Interrupt Service Routine (ISR)
Now, could we be off track just a little? Yes that's right, PORT1INT is the label to our
interrupt handler called a Interrupt Service Routine (ISR). You can put just about anything
in here you want. However calling some DOS routines can be a problem.
void interrupt PORT1INT()

{
int c;
do { c = inportb(PORT1 + 5);
if (c & 1) {
buffer[bufferin] = inportb(PORT1);

bufferin++;
if (bufferin == 1024) bufferin = 0;
}
} while (c & 1);
outportb(0x20,0x20);
}
From the example above we check to see if there is a character to receive and if their is we
remove it from the UART and place it in a buffer contained in memory. We keep on
checking the UART, in case FIFO's are enabled, so we can get all data available at the
time of interrupt.
The last line contains the instruction outportb(0x20,0x20); which tells the
Programmable Interrupt Controller that the interrupt has finished. The Programmable
Interrupt Controller (PIC) is what we must go into now. All of the routines above, we have
assumed that everything is set up ready to go. That is all the UART's registers are set
correctly and that the Programmable Interrupt Controller is set.
The Programmable Interrupt Controller handles hardware interrupts. Most PC's will have
two of them located at different addresses. One handles IRQ's 0 to 7 and the other IRQ's 8
to 15. Mainly Serial communications interrupts reside on IRQ's under 7, thus PIC1 is used,
which is located at 0020 Hex.
Bit Disable IRQ Function

7 IRQ7 Parallel Port
6 IRQ6 Floppy Disk Controller
5 IRQ5 Reserved/Sound Card
4 IRQ4 Serial Port
3 IRQ3 Serial Port
2 IRQ2 PIC2
1 IRQ1 Keyboard
0 IRQ0 System Timer
Table 15 : PIC1 Control Word (0x21)
Multi-Comm ports are getting quite common, thus table 16 includes data for PIC2 which is
located at 0xA0. PIC2 is responsible for IRQ's 8 to 15. It operates in exactly the same way
than PIC1 except that EOI's (End of Interrupt) goes to port 0xA0 while the disabling
(Masking) of IRQ's are done using port 0xA1.
Bit Disable IRQ Function

7 IRQ15 Reserved
6 IRQ14 Hard Disk Drive
5 IRQ13 Maths Co-Processor
4 IRQ12 PS/2 Mouse
3 IRQ11 Reserved
2 IRQ10 Reserved
1 IRQ9 IRQ2
0 IRQ8 Real Time Clock
Table 16 : PIC2 Control Word (0xA1)
Most of the PIC's initiation is done by BIOS. All we have to worry about is two instructions.
The first one is outportb(0x21,(inportb(0x21) & 0xEF); which selects which
interrupts we want to Disable (Mask). So if we want to enable IRQ4 we would have to take
0x10 (16) from 0xFF (255) to come up with 0xEF (239). That means we want to disable
IRQ's 7,6,5,3,2,1 and 0, thus enabling IRQ 4.
But what happens if one of these IRQs are already enabled and then we come along and
disable it? Therefore we input the value of the register and using the & function output the
byte back to the register with our changes using the instruction outportb(0x21,
(inportb(0x21) & 0xEF);. For example if IRQ5 is already enabled before we come
along, it will enable both IRQ4 and IRQ5 so we don't make any changes which may affect
other programs or TSR's.
The other instruction is outportb(0x20,0x20); which signals an end of interrupt to the

PIC. You use this command at the end of your interrupt service routine, so that interrupts of
a lower priority will be accepted.
UART Configuration
Now we get to the UART settings (Finally)
It's a good idea to turn off the interrupt generation on the UART as the first instruction.
Therefore your initialization can't get interrupted by the UART. I've then chosen to set up
our interrupt vectors at this point. The next step is to set the speed at which you wish to
communicate at. If you remember the process, we have to set bit 7 (The DLAB) of the LCR
so we can access the Divisor Latch High and Low Bytes. We have decided to set the speed
to 38,400 Bits per second which should be find for 16450's and 16550's. This requires a
divisor of 3, thus our divisor latch high byte will be 0x00 and a divisor latch low byte, 0x03.
In today's standards the divisor low latch byte is rarely used but it still pays us to write 0x00

to the register just in case the program before us just happened to set the UART at a very
very low speed. BIOS will normally set UARTs at 2400 BPS when the computer is first
booted up which still doesn't require the Divisor Latch Low byte.
The next step would be to turn off the Divisor latch access bit so we can get to the Interrupt
Enable Register and the receiver/transmitter buffers. What we could do is just write a 0x00
to the register clearing it all, but considering we have to set up our word length, parity as so
forth in the line control register we can do this at the same time. We have decided to set up
8 bits, no parity and 1 stop bit which is normally used today. Therefore we write 0x03 to the
line control register which will also turn off the DLAB for us saving one more I/O instruction.
The next line of code turns on the FIFO buffers. We have made the trigger level at 14
bytes, thus bits 6 and 7 are on. We have also enabled the FIFO's (bit 0). It's also good
practice to clear out the FIFO buffers on initialization. This will remove any rubbish which
the last program may of left in the FIFO buffers. Due to the fact that these two bits are self
resetting, we don't have to go any further and turn off these bits. If my arithmetic is correct
all these bits add up to 0xC7 or 199 for those people which still work in decimal.
Then DTR, RTS and OUT 2 is taken active by the instruction outportb(PORT1 +
4,0x0B);. Some cards (Both of Mine) require OUT2 active for interrupt requests thus I'm
normally always take it high. All that is left now is to set up our interrupts which has be
deliberately left to last as to not interrupt our initialization. Our interrupt handler is only
interested in new data being available so we have only set the UART to interrupt when data
is received.
Main Routine (Loop)
Now we are left with,
do {
if (bufferin != bufferout){
ch = buffer[bufferout];
bufferout++;
if (bufferout == 1024) bufferout = 0;
printf("%c",ch);
}
if (kbhit()){
c = getch();
outportb(PORT1, c);
}
} while (c !=27);
which keeps repeating until c = 27. This occurs when the ESC key is hit.

The next if statement checks to see if a key has been hit. (kbhit()) If so, it gets the
character using the getch() statement and outputs it to the receiver buffer. The UART
then transmits the character to the modem. What we have assumed here, is that the person
using the Communications Program can't type as fast as the UART can send. However if
the program wishes to send something, then a check should be made to see if BIT 5 of the
Line Status Register is set before attempting to send a byte to the transmitter register.
For more information on Interrupts, try "Interfacing the PC : Using Interrupts"
Determining the type of UART via software
The type of UART you have installed in your system can be determined without even
needing a screwdriver in most cases. As you can see from Types of UART's each UART
has minor differences, all we have to do it test these.
The first procedure we do is to set bit 0 to '1' in the FIFO control register. This tries to
enable the FIFO buffers. Then we read bits 6 and 7 from the interrupt identification register.
If both bits are '1' then the FIFO buffers are enabled. This would mean the UART is a
16550a. If the FIFO's were enabled but not usable then it would be a 16550. If there is no
FIFO buffer enabled it is most likely to be a 16450 UART, but could be a 8250, 8250A or
8250B on very old systems.
AT's have a fast bus speed which the 8250 series of UART can't handle to well thus it is
very unlikely to be found in any AT. However if you wish to test for them as well you can
follow the same test as above to distinguish 16550's or 16550A's from the rest. If no FIFOs
are enabled then a possible UART is the 16450, 8250, 8250A or 8250B. Once it is
established the it could be one of these four chips, try writing a byte to the scratch register
and then read it back and compare the results. If the results match then you must have a
scratch register, if they don't you either don't have a scratch register, or it doesn't work to
well.
From the descriptions of the UART above if you read back your byte from the scratch
register then the UART must be a 16450 or 8250A. (Both have scratch registers) If you
don't read back your byte then it's either a 8250 or 8250B.
The 16750 has 64 byte FIFO's, thus the easiest way to test for it's presence is to enable the
64 byte buffer using the FIFO Control Register and then read back the status of the
Interrupt Identification Register. However I have never tested this.

Part 4 : Interfacing Devices to RS-232 Ports
RS-232 Waveforms
So far we have introduced RS-232 Communications in relation to the PC. RS-232

communication is asynchronous. That is a clock signal is not sent with the data. Each word
is synchronized using it's start bit, and an internal clock on each side, keeps tabs on the
timing.
Figure 4 : TTL/CMOS Serial Logic Waveform
The diagram above, shows the expected waveform from the UART when using the
common 8N1 format. 8N1 signifies 8 Data bits, No Parity and 1 Stop Bit. The RS-232 line,
when idle is in the Mark State (Logic 1). A transmission starts with a start bit which is (Logic
0). Then each bit is sent down the line, one at a time. The LSB (Least Significant Bit) is sent
first. A Stop Bit (Logic 1) is then appended to the signal to make up the transmission.
The diagram, shows the next bit after the Stop Bit to be Logic 0. This must mean another
word is following, and this is it's Start Bit. If there is no more data coming then the receive
line will stay in it's idle state(logic 1). We have encountered something called a "Break"
Signal. This is when the data line is held in a Logic 0 state for a time long enough to send
an entire word. Therefore if you don't put the line back into an idle state, then the receiving
end will interpret this as a break signal.
The data sent using this method, is said to be framed. That is the data is framed between a
Start and Stop Bit. Should the Stop Bit be received as a Logic 0, then a framing error will
occur. This is common, when both sides are communicating at different speeds.
The above diagram is only relevant for the signal immediately at the UART. RS-232 logic
levels uses +3 to +25 volts to signify a "Space" (Logic 0) and -3 to -25 volts for a
"Mark" (logic 1). Any voltage in between these regions (ie between +3 and -3 Volts) is
undefined. Therefore this signal is put through a "RS-232 Level Converter". This is the
signal present on the RS-232 Port of your computer, shown below.

Figure 5 : RS-232 Logic Waveform
The above waveform applies to the Transmit and Receive lines on the RS-232 port. These
lines carry serial data, hence the name Serial Port. There are other lines on the RS-232
port which, in essence are Parallel lines. These lines (RTS, CTS, DCD, DSR, DTR, RTS
and RI) are also at RS-232 Logic Levels.
Almost all digital devices which we use require either TTL or CMOS logic levels. Therefore
the first step to connecting a device to the RS-232 port is to transform the RS-232 levels
back into 0 and 5 Volts. As we have already covered, this is done by RS-232 Level
Converters.
Two common RS-232 Level Converters are the 1488 RS-232 Driver and the 1489 RS-232
Receiver. Each package contains 4 inverters of the one type, either Drivers or Receivers.
The driver requires two supply rails, +7.5 to +15v and -7.5 to -15v. As you could imagine
this may pose a problem in many instances where only a single supply of +5V is present.
However the advantages of these I.C's are they are cheap.
Above: (Figure 6) Pinouts for the MAX-232,

RS-232 Driver/Receiver.
Right: (Figure 7) Typical MAX-232 Circuit.

Another device is the MAX-232. It includes a Charge Pump, which generates +10V and -
10V from a single 5v supply. This I.C. also includes two receivers and two transmitters in
the same package. This is handy in many cases when you only want to use the Transmit
and Receive data Lines. You don't need to use two chips, one for the receive line and one
for the transmit. However all this convenience comes at a price, but compared with the
price of designing a new power supply it is very cheap.
There are also many variations of these devices. The large value of capacitors are not only
bulky, but also expensive. Therefore other devices are available which use smaller
capacitors and even some with inbuilt capacitors. (Note : Some MAX-232's can use 1 micro
farad Capacitors). However the MAX-232 is the most common, and thus we will use this
RS-232 Level Converter in our examples.
In order to do anything useful with our Serially transmitted data, we must convert it back to
Parallel. (You could connect an LED to the serial port and watch it flash if you really want
too, but it's not extremely useful). This in the past has been done with the use of UART's.
However with the popularity of cheap Microcontroller's, these can be more suited to many
applications. We will look into the advantages and disadvantages of each method.
8250 and Compatible UARTs
We have already looked at one type of UART, the 8250 and compatibles found in your PC.
These devices have configuration registers accessible via the data and address buses
which have to be initialized before use. This is not a problem if your device which you are
building uses a Microprocessor. However if you are making a stand alone device, how are
you going to initialize it?
Most Microprocessors / Microcontrollers these days can be brought with build-in Serial
Communication Interfaces (SCI). Therefore there is little need to connect a 40 pin 16550 to,
for example a 68HC11 when you can buy one built in. If you are still in love with the Z-80 or
8086 then an 16550 may be option! (or if you are like myself, the higher chip count the
better. After all it looks more complicated and impressive! - But a headache to debug!)

Figure 8 : Pin Diagrams for 16550, 16450 & 8250 UARTs
Pin
Name Notes
No.
Pin
D0:D7 Data Bus
1:8
Receiver Clock Input. The frequency of this input
Pin 9 RCLK
should equal the receivers baud rate x 16
Pin 10 RD Receive Data
Pin 11 TD Transmit Data
Pin 14 nCS2 Chip Select 2 - Active Low
Baud Output - Output from Programmable Baud
Pin 15 nBAUDOUT
Rate Generator. Frequency = (Baud Rate x 16)
External Crystal Input - Used for Baud Rate
Pin 16 XIN
Generator Oscillator
Pin 17 XOUT External Crystal Output
Pin 18 nWR Write Line - Inverted
Pin 19 WR Write Line - Not Inverted
Pin 20 VSS Connected to Common Ground
Pin 21 RD Read Line - Inverted

Pin 22 nRD Read Line - Not Inverted

Driver Disable. This pin goes low when CPU is
Pin 23 DDIS reading from UART. Can be connected to Bus
Transceiver in case of high capacity data bus.
Pin 24 nTXRDY Transmit Ready
Address Strobe. Used if signals are not stable
Pin 25 nADS
during read or write cycle
Pin 29 nRXRDY Receive Ready
Pin 30 INTR Interrupt Output
Pin 32 nRTS Request to Send
Pin 33 nDTR Data Terminal Ready
Pin 36 nCTS Clear To Send
Pin 37 nDSR Data Set Ready
Pin 38 nDCD Data Carrier Detect
Pin 39 nRI Ring Indicator
Pin 40 VDD + 5 Volts
Table 17 : Pin Assignments for 16550A UART
For more information on the 16550 and compatible UART's see The UART (8250's and
Compatibles) in the first part of this tutorial.

There are UARTs such as the CDP6402, AY-5-1015 /

D36402R-9 and compatibles. These differ from the 8250
and compatibles, by the fact that they have separate
Receive and Transmit data buses and can be configured
by connecting certain pins to various logic levels. These
are ideal for applications where you don't have a
Microprocessor available. Such an example is if you want
to connect a ADC0804 (Analog to Digital Converter) to the
UART, or want to connect a LCD Display to the Serial
Line. These common devices use a 8 bit parallel data bus.
The CDP6402's Control Register is made up of Parity

Inhibit (PI), Stop Bit Select (SBS), Character Length Select
(CLS1 and 2) and Even Parity Enable (EPE). These inputs
can be latched using the Control Register Load (CRL) or if
you tie this pin high, changes made to these pins will
immediately take effect.
Figure 9 : Pinout of CDP6402
Pin Number Abbr. Full Name Notes

Pin 1 VDD + 5v Supply Rail
Pin 2 NC Not Connected
Pin 3 GND Ground
Receiver Register When driven high, outputs RBR8:
Pin 4 RRD
Disable RBR1 are High Impedance.
RBR8: Receiver Buffer
Pin 5:12 Receiver's Data Bus
RBR1 Register
When High, A Parity Error Has
Pin 13 PE Parity Error
Occurred.
When High, A Framing Error Has
Pin 14 FE Framing Error Occurred. i.e. The Stop Bit was
not a Logic 1.
When High, Data has been
Pin 15 OE Overrun Error received but the nData Received
Reset had not yet been activated.
When High, Status Flag Outputs
Pin 16 SFD Status Flag Disable (PE, FE, OE, DR and TBRE) are
High Impedance

Receiver Register x16 Clock input for the Receiver

Pin 17 RRC
Clock Register.
Active Low. When low, sets Data
Pin 18 nDRR Data Received Reset received Output Low (i.e. Clears
DR)
When High, Data has been
Pin 19 DR Data Received received and placed on outputs
RBR8:RBR1.
RXD - Serial Input. Connect to
Pin 20 RRI Receiver Register In
Serial Port, Via RS-232 receiver.
Resets the UART. UART should
be reset after applying power.
When High, indicates that
Transmitter Buffer Transmitter Buffer Register is
Pin 22 TBRE
Register Empty Empty, thus all bits including the
stop bit have been sent.
Active Low. When low, data
present on TBR8:TBR1 is placed
Transmitter Buffer
Pin 23 nTBRL in Transmitter Buffer Register. A
Load / Strobe
Low to High Transition on this
pin, then sends the data.
When High, Transmitter Register
Transmitter Register
Pin 24 TRE is Empty, thus can accept
Empty
another byte of data to be sent.
TXD - Serial Output. Connect to
Pin 25 TRO Serial Port, Via RS-232
Out (TXD)
Transmitter.
Data Bus, for Transmitter. Place
TBR8: Transmitter Buffer
Pin 26:33 Data here which you want to
TBR1 Register
send.
When High, Control Register (PI,
SBS, CLS2, CLS1, EPE) is
Pin 34 CRL Control Register Load Loaded. Can be tied high, so
changes on these pins occur
instantaneously.
When High, No Parity is Used for
Pin 35 PI Parity Inhibit Both Transmit and Receive.
When Low, Parity is Used.

A High selects 2 stop bits. (1.5

Pin 36 SBS Stop Bit Select for 5 Character Word Lengths) A
Low selects one stop bit.
Selects Word Length. 00 = 5
CLS2: Character Length
Pin 37:38 Bits, 01 = 6 Bits, 10 = 7 Bits and
CLS1 Select
11 = 8 Bits.
When High, Even Parity is Used,
Pin 39 EPE Even Parity Enable
When Low, Odd Parity is Used.
Pin 40 TRC 16x Clock input for Transmitter.
Clock
Table 18 : Pin Description for CDP6402, AY-5-1015 / D36402R-9 and compatible UART's
However one disadvantage of these chips over the 8250's is that these UART's have no
inbuilt Programmable Baud Rate Generator, and no facility to connect a crystal directly to it.
While there are Baud Rate Generator Chips such as the AY-5-8116, a more cheaper (and
common) alternative is the 74HC4060 14-bit Binary Counter and Oscillator.
The 74HC4060, being a 14 bit binary counter/divider only has outputs for some of it's
stages. Only Q4 to Q14 is available for use as they have external connections. This means
higher Baud Rates are not obtainable from common crystals, such as the 1.8432 Mhz and
2.4576 Mhz. The UART requires a clock rate 16 times higher than the Baud Rate you will
be using. eg A baud rate of 9600 BPS requires a input clock frequency of 153.6 Khz.
Output 1.8432Mhz 2.4546Mhz

Out 2 115.2 KBPS 153.6 KBPS
Q4 7200 BPS 9600 BPS
Q5 3600 BPS 4800 BPS
Q6 1800 BPS 2400 BPS
Q7 900 BPS 1200 BPS
Q8 450 BPS 600 BPS
Q9 225 BPS 300 BPS
Table 19 : Possible Baud Rates using a
Figure 10 : Baud Rate Generator using a
74HC4060
74HC4060
The 1.8432 Mhz crystal gives some unfamiliar Baud Rates. While many of these won't be
accepted by terminal programs or some hardware, they are still acceptable if you write your
own serial programs. For example the PC's baud rate divisor for 7200 BPS is 16, 3600 BPS
is 32, 1800 BPS is 64 etc. If you require higher speeds, then it is possible to connect the
UART to the OUT2 pin. This connection utilizes the oscillator, but has no frequency division

applied. Using OUT2 with a 1.8432 Mhz crystal connected gives a baud rate of 115,200
BPS. The CMOS CDP6402 UART can handle up to 200 KBPS at 5 volts, however your
MAX-232 may be limited to 120 KBPS, but is still within range.
Microcontrollers
It is also possible to use microcontrollers to transmit and receive Serial data. As we have
already covered, some of these MCU's (Micro Controller Units) have built in UART's among
other things. Take the application we have used above. We want to monitor analog
voltages using a ADC and then send them serially to the PC. If the Microcontroller also has
a ADC built in along with the UART or SCI, then we could simply program the device and
connect a RS-232 Line Driver. This would minimize your chip count and make your PCB
much smaller.
Take the second example, displaying the serial data to a common 16 character x 2 line
LCD display. A common problem with the LCD modules, is they don't accept cartridge
returns, line-feeds, form-feeds etc. By using a microcontroller, not only can you emulate the
UART, but you can also program it to clear the screen, should a form-feed be sent or
advance to the next line should a Line-feed be sent.
The LCD example also required some additional logic (An Inverter) to reset the data
receive line on the UART, and provide a -ve edge on the enable of the LCD to display the
data present on the pins. This can all be done using the Microcontroller and thus reducing
the chip count and the cost of the project.
Talking of chip count, most Microcontrollers have internal oscillators thus you don't require
the 74HC4060 14 Bit Binary Counter and Oscillator. Many Microcontrollers such as the
68HC05J1A and PIC16C84 have a smaller pin count, than the 40 Pin UART. This not only
makes the project smaller in size, it reduces complexity of the PCB.
But there are also many disadvantages of the Microcontroller. The major one, is that you
have to program it. For the hobbyist, you may not have a development system for a
Microcontroller or a method of programming it. Then you have to learn the micro's code and
work out how to tackle the problem. At least with the UART, all you did was plug it in, wire it
up and it worked. You can't get much simpler that that.
So far we have only discussed Full Duplex Transmission, that is that we can transmit and
receive at the same time. If our Microcontroller doesn't have a SCI then we can Emulate a
RS-232 port using a Parallel line under software control. However Emulation has it's dis-
advantages. It only supports slow transmission speeds, commonly 2400, 9600 or maybe
even 19,200 BPS if you are lucky. The other disadvantage is that it's really only effective in
half duplex mode. That is, it can only communicate in one direction at any one given time.

However in many applications this is not a problem.
As there are many different types of Micro-Controllers all with their different instruction sets,
it is very hard to give examples here which will suit everyone. Just be aware that you can
use them for serial communications and hopefully at a later date, I can give a limited
number of examples with one micro.

uClinux - BFLT Binary Flat Format

uClinux uses a Binary Flat format commonly known as BFLT. It is a relatively simple and lightweight executable
format based on the original a.out format. It has seen two major revisions, version 2 and more recently version 4.
Version 2 is used by the m68k-coff compilers and is still in use with the ARM elf2flt converter while version 4 is used
with the m68k elf2flt converter. Like many open source projects worked on by many individuals, little features have
creped into versions without the revision field changing. As a consequence what we detail in each version may not
strictly be the case in all circumstances. Both the 2.0.x and 2.4.x kernels bFLT loaders in the CVS support both
formats. Earlier kernels may need to have binfmt_flat.c and flat.c patched to support version 4, should version 4
binaries report the following message when loading
bFLT:not found.
bad magic/rev(4,need 2)
Each flat binary is preceded by a header of the structure shown below in listing 1. It
starts with 4 ASCII bytes, bFLT or 0x62, 0x46, 0x4C, 0x54 which identifies the
binary as conforming to the flat format. The next field designates the version number
of the flat header. As mentioned there are two major versions, version 2 and version
4. Each version differs by the supported flags and the format of the relocations.
The next group of fields in the header specify the starting address of each segment
relative to the start of the flat file. Most files start the .text segment at 0x40
(immediately after the end of the header). The data_start, data_end and bss_end
fields specify the start or finish of the designated segments. With the absence of
text_end and bss_start fields, it is assumed that the text segment comes first,
followed immediately by the data segment. While the comments for the flat file
header would suggest there is a bss segment somewhere in the flat file, this is not
true. bss_end is used to represent the length of the bss segment, thus should be set
to data_end + size of bss. Figure 1 : Flat File Format
struct flat_hdr {
char magic[4];
unsigned long rev; /* version */
unsigned long entry; /* Offset of first executable instruction
with text segment from beginning of file */
unsigned long data_start; /* Offset of data segment from beginning of
file */
unsigned long data_end; /* Offset of end of data segment
from beginning of file */
unsigned long bss_end; /* Offset of end of bss segment from beginning
of file */
/* (It is assumed that data_end through bss_end forms the bss segment.) */
unsigned long stack_size; /* Size of stack, in bytes */

unsigned long reloc_start; /* Offset of relocation records from
http://www.beyondlogic.org/uClinux/bflt.htm (1 of 3)13/02/2008 16:49:00

beginning of file */
unsigned long reloc_count; /* Number of relocation records */
unsigned long flags;
unsigned long filler[6]; /* Reserved, set to zero */
};
Listing 1 : The bFLT header structure extracted from flat.h
Following the segments start and end pointers comes the stack size field specified in bytes. This is normally set to
4096 by the m68k bFLT converters and can be changed by passing an argument (-s) to the elf2flt / coff2flt utility.
The next two fields specify the details of the relocations. Each relocation is a long (32 bits) with the relocation table
following the data segment in the flat binary file. The relocation entries are different per bFLT version.
Version 2 specified a 2 bit type and 30 bit offset per relocation. This causes a headache with endianess problems.
The 30 bit relocation is a pointer relative to zero where an absolute address is used. The type indicates whether the
absolute address points to .text, .data or .bss.
#define FLAT_RELOC_TYPE_TEXT 0
#define FLAT_RELOC_TYPE_DATA 1
#define FLAT_RELOC_TYPE_BSS 2
struct flat_reloc {
#if defined(__BIG_ENDIAN_BITFIELD) /* bit fields, ugh ! */
unsigned long type : 2;
signed long offset : 30;
#elif defined(__LITTLE_ENDIAN_BITFIELD)
signed long offset : 30;
unsigned long type : 2;
#endif
Listing 2 : Version 2 relocation structures - Not for use in new code.
This enables the flat loader to fix-up absolute addressing at runtime by jumping to the absolute address specified by
the relocation entry and adding the loaded base address to the existing address.
Version 4 removed the need of specifying a relocation type. Each relocation entry simply contains a pointer to an
absolute address in need of fix-up. As the bFLT loader can determine the length of the .text segment at runtime
(data_start - entry) we can use this to determine what segment the relocation is for. If the absolute address before fix-
up is less that the text length, we can safety assume the relocation is pointing to the text segment and this add the
base address of this segment to the absolute address.
On the other hand if the absolute address before fix-up is greater than the text length, then the absolute address
must be pointing to .data or .bss. As .bss always immediately follows the data segment there is no need to have a
distinction, we just add the base address of the data segment and subtract the length of the text segment. We
subtract the text segment as the absolute address in version 4 is relative to zero and not to the start of the data
segment.
Now you could say we may take it one step further. As every absolute address is referenced to zero, we can simply
add the base address of the text segment to each address needing fix-up. This would be true if the data segment
immediately follows the text segment, but we now have complications of -msep-data where the text segment can be
in ROM and the data segment in another location in RAM. Therefore we can no longer assume that the .data+.bss
segment and text segment will immediately follow each other.
The last defined field in the header is the flags. This appeared briefly in some version 2 headers (Typically ARM) but

was cemented in place with version 4. The flags are defined as follows
#define FLAT_FLAG_RAM 0x0001 /* load program entirely into RAM */

#define FLAT_FLAG_GOTPIC 0x0002 /* program is PIC with GOT */
#define FLAT_FLAG_GZIP 0x0004 /* all but the header is compressed */
Listing 3 : New flags defined in Version 4
Early version 2 binaries saw both the .text and .data segments loaded into RAM regardless. XIP (eXecute in Place)
was later introduced allowing programs to execute from ROM with only the data segment being copied into RAM. In
version 4, it is now assumed that each binary is loaded from ROM if GOTPIC is true and FLAT_FLAG_GZIP and
FLAT_FLAG_RAM is false. A binary can be forced to load into RAM by forcing the FLAT_FLAG_RAM flag.
The FLAT_FLAG_GOTPIC informs the loader that a GOT (Global Offset Table) is present at the start of the data
segment. This table includes offsets that need to be relocated at runtime and thus allows XIP to work. (Data is
accessed through the GOT, thus relocations need not be made to the .text residing in ROM.) The GOT is terminated
with a -1, followed immediately by the data segment.
The FLAT_FLAG_GZIP indicates the binary is compressed with the GZIP algorithm. The header is left untouched,
but the .text, .data and relocations are compressed. Some bFLT loaders do not support GZIP and will report an error
at loading.
Acknowledgments to Pauli from Lineo for pointing out some minor errors.

Exploring the Netcomm NB5 - ADSL / ADSL-2/2+ Modem Router
The Netcomm NB5 is an ADSL / ADSL-2/2+ modem/router incorporating unique features such as Quality of Service
(QoS) not commonly found in many domestic units. Being a simple single ethernet port, single USB port modem, the
NB5 has proven itself to be a rock solid unit built on a rugged embedded linux platform. This linux platform can allow
the ability to exploit the hardware to its full potential, by running your own binaries on it.
# cat version
Linux version 2.4.17_mvl21-malta-mips_fp_le (guest1@localhost) (gcc version
2.95.3
20010315 (release/MontaVista)) #1 Thu Mar 25 18:10:36 CST 2004
Under the Hood
The Netcomm NB5 is built around the Texas Instrument's TNETD7300 AR7 Router which features a 32-bit RISC
MIPS 4KEc V4.8 processor integrated with a DSP based digital transceiver and ADSL front end. Running at 150
BogoMIPS, it incorporates 2MB of Flash, 8 MB of RAM, a single 10/100 ethernet port and USB 1.1 port. The
manufacturer builds upon the AR7 ADSL Network Support Package (NSP) as the software base. The 2Mbytes of
flash stores the ADAM2 bootloader, MontaVista Linux 2.4.17 kernel and a squash 1.x read-only filesystem.
# cat cpuinfo
processor : 0
cpu model : MIPS 4KEc V4.8
BogoMIPS : 149.91
wait instruction : no
microsecond timers : yes
extra interrupt vector : yes
hardware watchpoint : yes
VCED exceptions : not available
VCEI exceptions : not available
The unit accepts a telnet or ssh session, spawning a BusyBox v0.61.pre Built-in shell (ash) allowing you to explore
the NB5 filesystem and run your own binaries. The proc file system is always a good place to start. . .
BusyBox on Netcomm login: root
Password:
BusyBox v0.61.pre (2004.06.09-03:05+0000) Built-in shell (ash)

Enter 'help' for a list of built-in commands.
# ls
http://www.beyondlogic.org/nb5/ (1 of 6)13/02/2008 16:49:08

bin etc proc usr var.tar

dev lib sbin var
#
# cd proc
#
# ls
1 37 avalanche fs locks slabinfo
182 4 bus interrupts meminfo stat
2 463 cmdline iomem misc swaps
212 464 cpuinfo ioports modules sys
3 466 devices kcore mounts sysvipc
32 48 dma kmsg mtd ticfg
34 5 driver ksyms net tty
35 6 execdomains led_mod partitions uptime
36 7 filesystems loadavg self version
# cat /proc/avalanche/avsar_modem_stats
AR7 DSL Modem Statistics:

--------------------------------
[DSL Modem Stats]
US Connection Rate: 128 DS Connection Rate: 1536
DS Line Attenuation: 51 DS Margin: 11
US Line Attenuation: 26 US Margin: 31
US Payload : 1248 DS Payload: 624
US Superframe Cnt : 2489 DS Superframe Cnt: 2490
US Transmit Power : 0 DS Transmit Power: 0
LOS errors: 0 SEF errors: 0
Frame mode: 3 Max Frame mode: 0
Trained Path: 0 US Peak Cell Rate: 301
Trained Mode: 2 Selected Mode: 1
ATUC Vendor Code: 4244434D ATUC Revision: 2
Hybrid Selected: 1 Trellis: 1
Showtime Count: 1 DS Max Attainable Bit Rate: 2208
BitSwap: 1 US Max Attainable Bit Rate: n/a
[Upstream (TX) Interleave path]

CRC: 0 FEC: 0 NCD: 1
LCD: 0 HEC: 0
[Downstream (RX) Interleave path]

LCD: 0 HEC: 0
[Upstream (TX) Fast path]

LCD: 0 HEC: 0
[Downstream (RX) Fast path]

LCD: 0 HEC: 0
[ATM Stats]
[Upstream/TX]
Good Cell Cnt: 26
Idle Cell Cnt: 12747

[Downstream/RX)]
Good Cell Cnt: 13
Idle Cell Cnt: 153323
Bad Hec Cell Cnt: 0
Overflow Dropped Cell Cnt: 0
[SAR AAL5 Stats]

Tx PDU's: 6
Rx PDU's: 6
Tx Total Bytes: 302
Rx Total Bytes: 438
Tx Total Error Counts: 0
Rx Total Error Counts: 0
[OAM Stats]
Near End F5 Loop Back Count: 0
Near End F4 Loop Back Count: 0
Far End F5 Loop Back Count: 0
Far End F4 Loop Back Count: 0
Getting Serious : Developing Code for the NB5
After you have had a look around, its now a good time to get serious and start compiling some of your own binaries
for the NB5. As mentioned the NB5 runs on the MIPS processor, hence a MIPS toolchain or cross compiler is
needed. Although you can build your own cross complier & uClibc C libraries, if youre like me its quicker to
download one.
With the compiler installed, its now time to test it. What better than the traditional Hello World program. We save the
following source code as hello.c.
#include
void main(void)
{
printf("Hello World!\n");
}
and now build it :
[cpeacock@mars cpeacock]$ mipsel-uclibc-gcc hello.c -o hello

hello.c: In function `main':
hello.c:5: warning: return type of `main' is not `int'
Once the binary is built, we must now get it onto the NB5 filesystem. The NB5 includes a tftp client and wget. My
preference is to load the binary to a web server and use wget. You will need to use the writable ramfs mounted at /
var.
# cd /var
# wget http://www.beyondlogic.org/nb5/hello
hello 100% |*****************************| 9860 00:00 ETA
# chmod 700 hello

# ./hello
Hello World!
If hello world doesn't turn you on, you could try compiling something useful like pppstats.
# wget http://www.beyondlogic.org/nb5/pppstats
pppstats 100% |*****************************| 24716 00:00 ETA
# chmod 700 pppstats
# ./pppstats -c 10
IN PACK VJCOMP VJUNC VJERR | OUT PACK VJCOMP VJUNC NON-VJ
139971257 124187 0 0 0 | 3565109 72378 0 0 72378
74485 61 0 0 0 | 1360 34 0 0 34
67815 57 0 0 0 | 1280 32 0 0 32
67735 55 0 0 0 | 1200 30 0 0 30
102565 82 0 0 0 | 1760 44 0 0 44
100220 80 0 0 0 | 1720 43 0 0 43
68163 58 0 0 0 | 1325 33 0 0 33
67823 57 0 0 0 | 1365 34 0 0 34
79090 64 0 0 0 | 1400 35 0 0 35
114520 91 0 0 0 | 1920 48 0 0 48
Dynamic DNS
www.no-ip.com is just one company providing free Dynamic DNS services. You can download the source code for a
Linux / BSD / Unix Dynamic Update Client at : http://www.no-ip.com/client/linux/noip-duc-linux.tar.gz (2.1.1) This can
be downloaded and re-compiled to execute on the NB5.
# cd /var
# mkdir noip
# cd noip
# wget http://www.beyondlogic.org/nb5/noip2
noip2 100% |*****************************| 125 KB 00:00 ETA
# chmod 700 noip2
By default this client wants to store its configuration at /usr/local/etc/no-ip2.conf. As this is not a writable area on the
NB5 filesystem, we must specify where to put the configuration file (-c /var/noip/noip.conf).
# ./noip2 -C -c /var/noip/noip.conf
Auto configuration for Linux client of no-ip.com.
Multiple network devices have been detected.
Please select the Internet interface from this list.
By typing the number associated with it.

0 br0
1 ppp0
1
Please enter the login/email string for no-ip.com xxxxx.xxxxxx@beyondlogic.org
Please enter the password for user 'xxxxx.xxxxxx@beyondlogic.org' *******
Only one host [xxxxxxxx.no-ip.info] is registered to this account.

It will be used.
Do you wish to run something at successful update?[N] (y/N) n

New configuration file '/var/noip/noip.conf' created.
There appears to be a bug with noip running on the NB5. It erroneously reports another instance is running. I use the
-M switch to get around this for the time being.
# ./noip2 -M -c /var/noip/noip.conf
Modifying the Squash FS
Running new applications on the RAM filesystem is great for testing and debugging. However when the router is
rebooted, the files are lost. In some cases it may also be handy to modify the start-up script to start some custom
daemons at boot.
The read-only Squash FS resides in MTD0 and is mounted at boot by the kernel. A ramfs is mounted to /var and
provides room to store volatile files. The current read-only file system makes heavy use of symbolic links for files that
are required to be writable. These symbolic links point to /var and is initialised by the startup script /etc/rc.d/init.d/rcS
by extracting the var.tar tarball found in the root directory.
Netcomm provides the original 38.51.2-001 firmware for download from their support site. The file consists of a zip
archive that includes a handful of files including the ADAM2 bootloader binary (int_ephy.adam2.AR7RD.bin), the
Linux Kernel (ram_zimage_pad.ar7rd.nsp.squashfs.bin) and the squashfs (nsp.annexA.img) among others.
Extract the nsp.annexA.img to your linux box and mount the squashFS to give read-only access to the base
filesystem used by the NB5, e.g.
mkdir /mnt/squash
mount -t squashfs nsp.annexA.img /mnt/squash -o loop
Then copy this filesystem to writable folder where you can modify the filesystem. e.g
mkdir /home/cpeacock/squashrw
cd /mnt/squash
cp -r * /home/cpeacock/squashrw
Now you can modify the filesystem. Please note some writable files are found in var.tar. Once you are finished
modifying your filesystem, you need to create a new Squash 1.x filesystem.
[root@mars cpeacock]# mksquashfs /home/cpeacock/squashrw squashrw.fs

Creating little endian filesystem on squashrw.fs, block size 32768.
The web based firmware updater requires any new kernel or filesystem to have a correct checksum appended to the
end of the file before it will be accepted as valid firmware.
To create the checksum you will need the TI_chksum-0.1orig.tar.gz package released under a GPL.
[root@mars TI-chksum-0.1]# ./tichksum ../squashrw.fs

File doesn't contain the checksum, adding
Calculated checksum is 38B3FF97
Added successfully
Once the checksum has been successfully added to your file, it is ready to be updated to your NB5. Please be
warned that re-flashing your firmware can break your modem. You must also note that the NB5 filesystem is

restricted by the size of the flash. Currently the 2Mbyte flash is partitioned as follows,
# cat mtd
dev: size erasesize name
mtd0: 00160000 00010000 "mtd0" 1447192 (1408kb) SquashFS
mtd1: 00080000 00010000 "mtd1" 524288 (512KB) Kernel
mtd2: 00010000 00008000 "mtd2" 65536 (64KB) ADAM2 Bootloader/Monitor
mtd3: 00010000 00010000 "mtd3" 65536 (64KB) Config.xml (RAW)
Currently the kernel appears to occupy the entire 524,288 bytes, and excluding the small amount of room allocated
to the configuration and bootloader, the compressed Squash filesystem must fit into 1447192 bytes. The default
filesystem shipped from Netcomm currently requires 1433600 bytes leaving a little more that 13kbytes left
(compressed) for your own binaries. Therefore if it is intended to modify the filesystem, some existing files must be
deleted to make room for any new ones.
SquashFS & LZMA Compression
Prior to firmware version 62.51.1, the squash filesystem contained within the NB5 was compressed using the
conventional ZLIB library. There has been a shift in recent times to LZMA due to better compression size. There are
some claims that LZMA can offer up to 30% better compression over ZLIB, however a 10 to 15% gain is normally
achievable on the typical squashFS images found in modems such as the NB5.
Recovering from Disaster : ADAM2
Should your NB5 no longer boot, don't despair. The ADAM2 FTP Server can assist in reloading a bootable image.
Otherwise if you want to find out at what stage the modem is halting, try using the console port with the ADAM2
Bootloader.
ADAM2 FTP Server

ADAM2 Bootloader
Other sources
The Texas Instruments AR7, ADAM 2 Bootloader and AR7 ADSL Network Support Package is a common platform
for many ADSL routers. The following links are applicable to this platform.
Hacking the Actiontec GT701-WG

D-Link DSL-G604T (Seattle Wireless)
Hacking the Actiontec GT701(-wg) Or, a primer on building your own hacked (custom) firmware
Copyright 2005 Craig Peacock - 20th August 2005

Quick & Light RS-232 Terminal
Wednesday, February
13th, 2008
Quick & Light RS-232 Terminal
Fed up with hyperterminal or just want a quick and light terminal for DOS, Windows 95/98/ME and
Windows NT4/2000/XP? Cycle through COM Ports using F1, change bit rates using F2 and quit using
Alt-X. Couldn't be simpler. . .
Download
Version 1.0, 17K bytes.
http://www.beyondlogic.org/terminal/terminal.htm13/02/2008 16:49:14
Exploring the Netcomm NB5 - SquashFS & LZMA Compression

Prior to firmware version 62.51.1, the squash filesystem contained within the NB5 was compressed using the
conventional ZLIB library. There has been a shift in recent times to LZMA (Lempel-Ziv-Markov chain-Algorithm) due to
better compression size. There are some claims that LZMA can offer up to 30% better compression over ZLIB, however
a 10 to 15% gain is normally achievable on the typical squashFS images found in modems such as the NB5. One of
LZMAs disadvantages is it requires more memory and CPU to compress the data, however only uses 1/10 of the
memory to decompress. This makes it somewhat ideal for embedded systems where the compression is performed
once on a kernel image or filesystem using a desktop computer, and the decompression is done frequently on the
embedded system with limited CPU and memory.
There has been a lack of interest from the linux kernel maintainers to implement LZMA compression or decompression
into the kernel, as they claim ZLib does just fine. As a consequence, SquashFS doesn't natively come with LZMA
compression out of the box (or tarball). SquashFS using LZMA currently requires patches, and unfortunately there is a
couple of versions floating around were the format of the headers/properties are different and hence cause
incompatibility problems. The patches here, are designed to be compatible with the LZMA squashfs support found in
the linux kernel of the Texas Instrument's NSP.
Building mksquashfs
The squashfs version found in the TI NSP MontaVista 2.4.17_mvl21 linux kernel is still version 1.x. Therefore if you
intend to create a Squash filesystem compatible with the kernel in the NB5, you will need to use SquashFS v1.3r3. We
have observed further size improvements of approximately 9 to 10% using the current SquashFS 2.2. Therefore the
LZMA patches here have been designed to compile as a LZMA library which has the same function calls exported than
ZLib. This allows any version of SquashFS to be easily linked to the LZMA library in the future.
lzma427.tar.bz2 - LZMA SDK 4.27 from http://www.7-zip.org

lzma427_zlib.patch
squashfs1.3r3.tar.gz - SquashFS 1.3r3 from http://squashfs.sourceforge.net/
squashfs1.3r3_lzma.patch
Download the LZMA SDK, patch and build the LZMA Library.
mkdir lzma427
cd lzma427
tar -xjf ../lzma427.tar.bz2
patch -p1 < ../lzma427_zlib.patch
cd SRC/7zip/Compress/LZMA_Lib
make
Then download an appropriate version of SquashFS, patch and build.
tar -xzf squashfs1.3r3.tar.gz

cd squashfs1.3r3
patch -p1 < ../squashfs1.3r3_lzma.patch
cd squashfs-tools
make
http://www.beyondlogic.org/nb5/squashfs_lzma.htm (1 of 2)13/02/2008 16:52:38

Exploring the Netcomm NB5 - SquashFS & LZMA Compression
This should successfully build a mksquashfs tool that you can use to create LZMA Squash filesystems for use with the
NB5 firmware version 62.51.1 and later.
Adding LZMA Squashfs support to your development machine's kernel
Now that you have a utility to make a LZMA tightly compressed squash filesystem, you will more than likely require
LZMA support in your desktop kernel to open/modify existing filesystems or test your own. There is no requirement for a
older version of SquashFS as support is backwards compatible. This patch will provide LZMA support to a linux-2.6.12
kernel that has squash2.2 installed.
linux-2.6.12.2_squashfs2.2_lzma.patch
Mounting the NB5plus4 and NB5plus4W images
The firmware for the NB5 appears to be distributed as three separate files, the kernel, squashfs & config.xml. However
to assist users in upgrading the NB5plus4 and NB5plus4W units, a single firmware upgrade file is used with the three
files concatenated together and a header attached to the front.
To mount the squash filesystems from these images, you need to know where the squashfs starts in the file. The
easiest way of doing this is looking at the address in the header at 0x80 or searching for the magic "hsqs". You can
then use this offset to mount the filesystem. e.g. for the NB5plus4W firmware upgrade, use :
mount -t squashfs 1.C07NCT6.8267A_050601.firmware.upgrade.img /mnt/squashfs -o loop,

offset=0x78000
and for the NB5plus4 upgrade use :
mount -t squashfs 1.C08NCT3.8227A_050518.firmware.upgrade.img /mnt/squashfs -o loop,

offset=0x77000
Links

ADAM2 FTP Server
ADAM2 Bootloader
Copyright 2005 Craig Peacock - 3rd September 2005
http://www.beyondlogic.org/nb5/squashfs_lzma.htm (2 of 2)13/02/2008 16:52:38

RS-232 Protocol Analyser
Wednesday, February
13th, 2008
In need for a cheap but effective RS-232 Protocol Analyser? Just make your own Y adaptor to enable
the logging or display of data transmitted and/or received in ASCII, Hex, Decimal or Hex-Dump formats.
A configuration file is included to allow quick setup and analysis.
The Protocol Analyser running in HexDump Mode
http://www.beyondlogic.org/protocolanalyser/protocolanalyser.htm (1 of 3)13/02/2008 16:52:51

The Protocol Analyser running in Hex Mode.

The white text shows transmitted data, while the yellow is received data.
Wiring of the Y Cable
You can make your own "Y" cable by following the diagram below. It consists of a pass-through cable
which is connected in-line with the link under test. The TXD and RXD lines are broken out and sent into
a second "Protocol Analyser" computer via two com ports, each monitoring one line each. The second
computer then runs the Protocol Analyser Software.

Download
Version 1.0, 18K bytes.

How does the Microchip ICD Work? Make your own ICD.

2008
How does the Microchip ICD Work?
The Debug Capabilities of the PIC16F877
The PIC16F877 was the first Microchip Microcontroller to have in-built debugging capabilities. The actual silicon
area used for the debug facilities is tiny compared to the major peripherals. Microchip initally kept the operation
of the debug facilities pretty well under raps, but has recently released the specifications under DS51242A.
Making your own ICD
Fancy making your own ICD? I wouldnt imagine it would be any cheaper, considering the development time.
Microchip has released the silk screen overlays and schematics for their ICD in Appendix A of the MPLAB ICD
Users Guide (DS51184A). The code was suppose to be restricted, preventing you from making them. However
d877.hex first appeared in the MPLAB 4.x directory. Upon closer examination of this file, you discover its the
source code for the ICD complete with embedded (retlw x-opcode) debug code which is loaded into the target
at 0x1F00.
The code is for a PIC16F876 device which is the little brother of the 16F877. The PIC16F876 is a 28 pin device
with a few less I/O ports, and the Parallel Slave Port. What this means, is you can use a PIC16F877 as the
heart of the ICD if you are having difficulties sourcing the 16F876.
What Microchip hasnt released is the licensing information for the D877.HEX. Is it freely available for private
and commercial use? Ive already seen some making derivatives of the I CD for commercial gain. My guest
would be that they are using the D877.hex in its raw unaltered form, bearing in mind that dis-assembly is most
cases is not legal either.
Revisions for the ICD
When Microchip released MPLAB v5.00 in March 2000, they shipped new firmware for the ICD, firmware
version 2.04 (MPL876.HEX in your MPLAB 5 directory). This gave the end user support for the PIC16F873/874,
supposedly better serial communications and the ability to perform flash upgrades over the wire with one
mouse click.
They also released a Engineering Technical Note ETN#21, Upgrading MPLAB ICD Flash and Operating ICD
below 4.5V. This included two modifications, one for better support when operating the ICD from a supply
voltage lower than 4.5V and the other to enable flash upgrades.
The first modification involved changing R21 and R22 which make up a voltage divider monitoring the VPP.
These resistors were increased by a factor of 10 to reduce the load when low currents are available as a result
of running the unit from under 4.5V.
http://www.beyondlogic.org/pic/icd.htm (1 of 3)13/02/2008 16:53:00

Most of the early ICDs included OTP 16C73B. These of course cannot be updated over the wire, thus the
second modification is to replace the 16C73 with a 16F876 which is pin to pin compatible, only in a re-
programmable flash version. This enables to user to update the code at a later date.
Making your own modifications
The only reason for making your own ICD is to

make some modifications in the process.
Some users are unhappy with the exposed
board. You could quite easy provide mounting
holes to enable the board to be mounted inside
a small box making the ICD more rugged.
Others wish to use the ICD to program 16F877

and 16F876. While you can use the ICD cable
and header, and external power source needs
to be provided. Ive seen many provide a built
in power supply. Speaking of power supplies, if
you provide one for your ICD you could look at
doing away with the VPP charge pump and
also providing the 13V Programming Supply.
What have I done myself? Well I couldnt help

miniaturising it. Ive replaced most of the parts
with surface mount equivalents. Most of the
transistors have been replaced with digital
transistors that do away with the two bias
resistors for each device. Ive also placed a
power supply on board which does wonders
for ICSP.
Now on the cards is a USB version of the ICD

based on the FTDI FT8U232AM. See USB
with the simplicity of RS-232 for further
information on these devices. FTDI have
virtual COM port drivers which allow the USB
based ICD to integrate with MPLAB as if it was
talking on a Serial Port. Needless to say, USB
will offer a bus powered device which will take
some of the load of the circuit under test, Photo of the author's redesigned ICD complete with on-board power supply
especially if it is a battery powered device.
USB will also be more flexible for use with
Laptops etc.

Links
http://icdprog.sourceforge.net - Linux Software which can program 16F87x devices using the ICD. Geir
Thomassen has been examining the protocol between the ICD and MPLAB.
References
John Andrews (john.andrews@microchip.com), John Day (john.day@microchip.com)

"Debugging, In-Circuit Style", Circuit Cellar #109 August 1999
DS51242A On-Chip Debugger Specification, Microchip Technology Inc 2001.
PICmicro Firmware is copyrighted by Microchip Technology Inc., and is intended for Microchip Development Tools only.
Modified firmware code will not be supported by Microchip Technology Inc.

South Australian Fossil Fuel, Photovoltaic Solar, Landfill Gas, Mini Hydro, Wind Farms and Hot Dry Rock Geothermal Power Plants
SA Conventional & Renewable Energy
Economics - The Cost of Generation

Conventional/Fossil Fuel Power Stations - The Workhorse
Interconnects - Opening up Market Competition
Solar Power - Advertising for Governments?
Landfill Gas - Mature Alternative Energy
Hydro - In South Australia?
Wind Farms - The Successful Alternative Energy Source
Gippsland Circus - The Bald Hill Debate
Gippsland Circus - The Bald Hill Debate turns to Parrot Politics - Part II
Hot Rock Geothermal - Could it be the Future of Renewable Energy?

Parabolic Solar Collectors - A Solar Oasis?
Other Innovative Power Generation Projects around Australia
Solar Hydrogen - "Energy of the Future"
Base load Solar Power?
High Reliability Wave Power with desalination by-product
Distributed Generation using Miniturbines or Fuel Cells
Australias Greenhouse Future liesin the hands of Roam Consulting - or does it?
Integrated Gasification Combined Cycle (IGCC)
If you have a BIG problem, bury it - Geosequestration
Securing Australias Energy Future - Lower Emissions Technology Demonstration Fund

(LETDF)
LETAG - Lower Emissions Technical Advisory Group
Web Forum - News & Your Comments.
Economics - The Cost of Generation
The approximate costs to produce power in Australia is listed in the table below. This price includes
the cost of fuel, fixed and capital costs to build the plant. Excluded from the figures is transmission/
grid connection costs. These figures are approximate and should only be used for comparison
between energy sources.
http://www.beyondlogic.org/southaustraliapower/ (1 of 33)13/02/2008 16:53:23

To provide incentives to produce renewable power and reach Australias mandatory renewable energy
target (MRET) the Renewable Energy (Electricity) Act 2000 introduces RECs (Renewable Energy
Certificates) which trade at approximately $35 to $40. This, on top of the wholesale price of electricity
makes many forms of renewable energy economically sustainable, thus allowing them to compete in
the National Electricity Market. The current Mandatary Renewable Energy Target is to have 9,500
GWh of renewable energy installed Australia-wide by 2010.
Average Annual Wholesale Electricity Prices (NEMMCO)

Electricity Supply Industry Planning Council (S.A.) - Annual Planning Report - June 2004
Electricity Supply Industry Planning Council (S.A.) - Annual Planning Report - June 2003
South Australian Independent Industry Regulator (SAIIR) - Generation Licences
Office of the Renewable Energy Regulator - Registry For Renewable Energy Certificates
National Electricity Market Management Company Limited
Towards a Truly National and Efficient Energy Market COAG - Energy Market Review Report
(Parer Report)
South Australias Future Energy Resources Beyond 2002 Primary Industries and Resources SA.

Mandatory Renewable Energy Target Review
The Federal Governments Mandatory Renewable Energy Target program commenced in

April 2001. It requires an extra 9,500GWh of electricity to be generated by renewable sources
by 2010. When this target was first suggested, the 9,500GWh equalled 2% of the forecasted
electricity demand in 2010. As it turns out the GDP has grown faster than expected and hence
the figures used this forecast was a little light. Today, a true 2% target is forecasted to be
approximately 12,800 GWh.
In March 2003, a panel was formed to review the Commonwealths Mandatory Renewable
Energy Target (MRET) legislation and provide a report into their findings by the end of
September 2003. It was to determine, among other things, if the scheme should be abolished
in favour for a common carbon-trading scheme as suggested by the Parer/COAG report, or if
the target should be increased to a true 2%, 5% or 10% (in line with UK and Germany).
The report recommends the scheme should continue with the current target of 9,500GWh to
2010 and then introduce steady increases to reach a 20,000 GWh target by 2020. As one
could imagine this lack of support for renewable energy and the reduction of greenhouse
gases has angered many community and green groups. Even many state governments are
wondering why it cant be increased to a true 2% or 4% when the report indicates it would
have little effect to the GDP and wholesale electricity prices.
However the report suggests given that we are only 6 years away from the target date it is not
enough time to raise the 9,500GWh 2010 target and the generate enough investment to meet
it. Yet, the report suggests a 20,000 GWh target for 2020 which is still only 2% of the 1997
baseline. If time was really an issue why isnt the 2020 target raised higher than 2% of the
1997 baseline? If the Federal Government was serous about a 2% target, why not at the very
least have a true 2%.
While Australia produces more greenhouse gas per capita that any other country, Australias
low price of electricity makes most renewable energy more expensive than coal and gas
generated electricity. In countries like Germany where a 10% target is supported, electricity
prices are double that of Australias hence more renewable energy can be installed without
grossly upsetting the economy with higher electricity prices.
While the Parer Report led to much investment uncertainty and the stalling of investment with
in the renewable energy sector, this last report should not be seen as negative despite the
rock bottom target. The 2% target still exists like it has since 2001. The report forecasts $215
million will be spent on new renewable energy in 2004, increasing to $454 the following year in
the lead up to $2.025 billion in 2006. If this proves to be correct, it should make renewable
energy a growth industry of the next 3 years with Wind Energy being the biggest benefactor.
Pacific Hydro To Transfer Us$723 MLN In Development Offshore - 19th October 2004
Novera Energy scales back Australian operations - 9 August 2004
Mandatory Renewable Energy Target to Continue 16 January 2004
Download Report (Renewable Opportunities, A Review of the Operation of the
Renewable Energy (Electricity) Act 2000)
Renewable Energy (Electricity) Act 2000
www.10x10.com.au
Australian Governments Renewable Energy Initiatives

Conventional/Fossil Fuel Power Stations - The Workhorse
The majority of South Australias power generation comes from gas turbines with
approximately 53 percent of the states gas supply being consumed for electricity generation
in power station turbines and cogeneration plants. This gas was, until recently, supplied by a
single production plant at Moomba and a single gas pipeline from Moomba to Adelaide. This
can lead to significant restrictions when a breakdown occurs like was the case in February
2003 and which is presently occurring once again in January 2004.
Origin Energy, International Power and TXU have completed the construction of the $500
million, 690km SEA gas pipeline which is now piping gas from Victoria into South Australia.
The extra 125 PJ per annum will provide extra security for both gas customers and electricity
generation.
Press Release :
SEAGAS Delivers New Energy to Adelaide - Just in Time (2nd January 2003)
Power Station Operator Capacity (MW) Fuel

Torrens Island A TRUenergy 480 Natural Gas/Oil
Torrens Island B TRUenergy 800 Natural Gas/Oil
Northern NRG Flinders 520 Coal
Pelican Point International Power 487 Natural Gas
Playford NRG Flinders 240 Coal
Osborne ATCO & Origin Energy 190 Natural Gas
Hallet AGL 181 Natural Gas/Oil
Dry Creek International Power 156 Natural Gas
Quarantine Origin Energy 98.3 Natural Gas
Mintaro International Power 90 Natural Gas
Ladbroke Grove Origin Energy 86 Natural Gas
Snuggery International Power 78 Distillate
Port Lincoln International Power 48 Distillate
3454
All the natural gas fired plants listed above except for Pelican Point all Natural Gas Open
Cycle. Pelican Point, one of S.A.s newer plants uses Natural Gas Combined Cycle (NGCC)
which is more economical to run. Omitted from the above table is a small portfolio of non-
scheduled, peaking or cogeneration plants such as a 60MW plant at Whyalla, 20MW
Cummings Plant at Lonsdale and the newly commissioned 4.4MW cogeneration facility at
Coopers Regency Park premises.
In 2002/03 there was no increase or upgrades to scheduled generation. Current wholesale

prices are creating uncertain market conditions with many generators re-evaluating their
positions.
Interconnects - Opening up Market Competition
South Australia has the following two interconnectors.
Connector Owner/Manager Capacity (MW) Connection Points

Lower South East S.A. to
460MW Import
Heywood ElectraNet SA Lower South West
300MW Export
(Portland) VIC
TransEnergie Australia/ Redcliff VIC to Monash
MurrayLink 200MW
SNC Lavalin (Riverland) S.A.
The MurrayLink Interconnector is a DC transmission line which started commercial operation

in early October 2002. Using HVDC Light technology, it consists of two 2 D.C. cables buried
1.2 m deep and extending 180 km in length from Redcliff in Victoria to Berri in South Australia.
At each end is a converter station which converts the AC into DC and vice versa. It is currently
the worlds longest underground power line and has recently been awarded the Engineering,
South Australia Award for 2003.
Also in the Pipeline is the South Australia / New South Wales Interconnect, nicknamed the
SNI. It is a 250MW link being proposed by Transgrid, a NSW government owned High Voltage
Network Provider. It was first planned in 2001 when average spot prices in NSW was $19MW/
h dearer than S.A, however its benefits are depleting considering another regulated
transmission line will only increase transmission costs further for South Australians, already
suffering from excessively high ETSA and ElectraNet SA transmission costs.
Solar Power - Advertising for Governments
While we dont focus at the many smaller power plants under 1MW, the North Terrace power
stations are a good indication of the position of Photovoltaic Solar Cells and their current
prohibited costs for mainstream grid connected systems.
The first North Terrace Power Station was opened in November 2002. It consisted of 112 BP
Solar Panels providing a total of 19.8kW. The panels are mounted on the north, main facing
roof of the SA Museum in the CBD. Seven smaller inverters were used to convert the DC
current into AC current. The project funded by the South Australia Government at a cost of
$200,000 produces 25,950kW/h of electricity a year, enough to power 7 homes. At the time of
opening it was the largest PV array in South Australia.
In July 2003 a second North Terrace Power Station was brought on-line. This time, 129
panels were bolted to the Art Gallery at a cost of $250,000 to the state government. It is
suggested this station will produce approximately 31,000kW/hrs a year, cutting carbon dioxide
emissions by 35 tonnes.

Looking at infrastructure and construction costs, these two solar projects cost about $10,000 a
kW to install. When we later look at wind power you will typically see infrastructure/
construction costs around $1500/kW. As renewable energy has no fuel costs and often little
maintenance costs, the cost of power is directly attributable to the infrastructure and
construction costs.
One can quickly see these two plants have little chance of being viable and only makes for a
good advertising campaign. It makes the choice easy when it comes to spending tens of
thousands to put solar panels on your roof or to invest it in the many renewable energy
companies in Australia where your money could be more effectively pooled together to reduce
carbon dioxide emissions ten fold. These current figures put power from Photovoltaic Solar at
in excess of 30c kW/h. Even AGL SAs excessive Domestic Light/Power tarrif is no where
close at approximately 17.7c kW/h. (Even next years summer tarrif @ 20.944c)
Its not to say photovoltaic Solar Panels have no place. They are wonderful in remote locations
such as the township of Parachilna where their 21kW system is saving money compared to
the diesel generators which have previously ran 24 hours a day. They are just not competitive
when you have a good connection to the grid. Solar panels will become more efficent and
hence cheaper over time. For example research is being carried out into using a tantalum
oxide film rather than traditional silicon oxide which reflects more light with initial results seeing
a 25% increase in efficiency.
Origin Energy Sliver Cell Technology
Origin Energy has started construction of a $20 million dollar

"Sliver" Cell plant at Regency Park. The plant will help reduce
the cost of solar cells, by reducing the use of silicon by as
much as 90%.
Links:
Origin Energy Sliver Technology : a revolutionary step

in the development of Solar Photovoltaics
Sliver Cell Technology Fact Sheet
Origin starts construction of $20 million revolutionary
Sliver solar power plant in South Australia (7/12/2003)
Photos of Sliver Cell technology
Origin starts construction of $20 million revolutionary
Sliver solar power plant in South Australia. (ANU
Website with Pictures)
Photo courtesy Origin Energy

Landfill / Sewage Gas - Mature Alternative Energy
Landfill gas and biomass renewable energy plants are proven with some being in existence in
Australia since the early 90s. While electricity from these plants is cheaper to produce than
Wind, they are very limited in size. Typical South Australian plants such as Wingfield I,
Wingfield II, Tea Tree Gully, Pedlers Creek and Highbury have an output of a couple of MW
each. These five plants are operated by Energy Developments (ASX:ENE). One of Energy
Developments larger Australian landfill gas plants is the 12.7MW site at Lucas Heights.
Landfill gas and biomass do however have the advantage of suppling base loads (24 hours
operation except for maintenance).
Site Developer Capacity (MW) Fuel

Pedler Creek Energy Developments 2.9 Landfill Gas
Wingfield 1 Energy Developments 3.9 Landfill Gas
Wingfield 2 Energy Developments 2 Landfill Gas
Tea Tree Gully Energy Developments 2 Landfill Gas
Highbury Energy Developments 1 Landfill Gas
Landfill gas is not the only good source for Methane. The decomposition of sludge using
anaerobic digestion in Waste Water Treatment can also provide a good source. SA Water has
turbines installed at three of its waste water treatment sites, listed below. However all this
energy is used to power the plants pumps, air blowers and other equipment. Much of the
energy is used to maintain optimum conditions for anaerobic digestion which requires the
sludge to be maintained at 36degrees. There is no electricity pumped back into the grid.

Bolivar SA Water 3.5 Waste Water / Sewage Gas
Glenelg SA Water 1.8 Waste Water / Sewage Gas
Port Adelaide SA Water 1.0 Waste Water / Sewage Gas
Babcock & Brown and National Power has announced preliminary plans for a $60 million
Plantation and Timer Waste BioMass plant to be build around Millicent or Mt Gambier. The
plant is suggested to be operational by 2005 supplying a larger 30MW of electricity. Auspine
Limited has also announced plans for a simular plant at Tarpeena generating 60MW from
Biomass scheduled for completion by Mid 2004.
Links:
Wingfield Waste Management Centre Landfill Gas Management
Energy Developments

Hydro - In South Australia?
While South Australia doesnt have an abundance of suitable rivers and lakes, it doesnt rule
out the development of "mini" hydro projects. SA Water in conjunction with Hydro Tasmania is
installing the first 1.9MW Terminal Storage Mini Hydro plant on S.As Water Supply. The plant
at Tea Tree Gully consists of a stainless steel turbine inserted into pipes carrying water to the
Adelaide Metro area. This is the first time such a project has developed in Australia with great
care being taken not to reduce the reliability of the existing water supply. The plant is expected
to be completed by the end of June 2003.

Tea Tree Gully Hydro Tasmania & SA Water 1.9 Mini Hydro
Mt Bold Hydro Tasmania & SA Water Mini Hydro
The Hydro Tasmania / SA Water joint venture partnership also includes development of a mini
hydro plant at Mt Bold Reservoir in the states south.
Links:
Mini-Hydro - SA Water
First Sun, then Wind - Now its Water Power! - 12th September 2003
South Australia mini hydro major milestone - 2nd June 2003
Hydro Tasmanias Partnership with South Australia Water - 19th May 2002
Wind Farms - The Successful Alternative Energy Source
Wind has proven itself to be the most viable and successful form of renewable energy to date,
having a current renewable energy market share of 11% (August 2003) in Australia and is expect to
grow to 41% by 2020. However like many renewable energies, while Wind Power is zero emission,
it is not capable of supplying base loads, i.e if the wind stops, so does the power. Wind power at
suitable sites in Australia has a 80-85% availability. Due to the size of the turbines, typically greater
than 60 meters in diameter and siting on towers 70-100 meters tall, Wind turbines can lend themself
to greater visual "pollution" than other forms of renewable generation.
One solution is to place the large turbines out at sea which has been done for many years in other
countries. However while there is better wind speeds out at sea due to the flatter surface (less
resistance), there is a large cost penalty caused by sea based electricity grids, wind tower
foundations, construction costs and the life of plant. Denmark and other such countries already
operating sea based wind farms have electricity prices much greater than Australia, in the case of
Denmark as much as three times (Source : Electricity Supply Association of Australia 2003). As
Australia has the second cheapest electricity of any major developed nation (second only to South
Africa), it is considered sea based wind farms are just not yet currently viable in Australia.
The concept of wind is not new for South Australia. Wind energy was first studied by ETSA in the
1950s with a Wind Energy Committee set up in 1984. The first wind monitoring units were
established on the Fleurieu Peninsula in mid 1985 with a total of 30 sites monitored around SA by
1988. A single 150kW Nordex Wind Turbine was installed in Cooper Pedy and was commissioned

on the 15th March 1991.
Operational South Australian Wind Farms :
Site Developer Capacity (MW) Details Cost

23x NEG Micon
Starfish Hill Tarong Energy 34.5MW $65M
NM64C/1500 (1.5MW)
Canunda (Lake
Wind Prospect
Bonney 46MW 23x Vestas 2.0MW $92.5M
International Power
Central)
Lake Bonney Babcock & Brown 46x Vestas V66
80.5MW $157.6M
Stage 1 Wind Partners (1.75MW)
Southern Hydro / 55x Vestas NM82
Wattle Pt 91MW $165M
Meridian Energy (1.65MW)
However South Australia only comissioned its first large scale plant in July 2003. Being developed
by Tarong Energy (A Queensland Government owned electricity generator), the $65 million dollar
project is situated north of Cape Jervis with a total of 13 NEG Micon 1.5 MW NM64C/1500 wind
turbines generating 34.5MW. This is enough energy to power approximately 18,000 South
Australian homes. The farm connects to the ETSA Utilities Yankalilla Substation via a 66KV High
Voltage Transmission Line.
South Australian Wind Farms under Construction :
Site Developer Capacity (MW) Turbines

Cathedral Rocks Hydro Tasmania 66 33 x 2MW
Wattle Pt Meridian Energy 91 55
Mt Milar (Formally Yabmana) Tarong Energy 70 35
Proposed South Australian Wind Farms :
Site Developer Capacity (MW) Turbines

Clements Gap Pacific Hydro 58 35
Vincent North Wind Farm Pacific Hydro 59.4 36
Lake Bonney Stage 2 Babcock & Brown Wind Partners 160 -
Uley Basin Stage 1 Babcock & Brown 90 60
Myponga (Sellicks Beach) TrustPower 35 20
Kemmiss Hill Road Wind
Origin Energy 30 16
Farm
Kongorong Stanwell Corp 50 33
Lake Hamilton Hydro Tasmania 110 73
Waterloo (Clare Valley) Hydro Tasmania 117 -

Loch Well Beach Ausker Energies 50 33

Tungetta Hill Ausker Energies & ANZ 50 33
Hallett Wind Prospect 320 .
Barunga (West of
Wind Prospect 260 130
Snowtown)
Green Point Wind Prospect & Novera Energy 54 18
Troubridge Pt Wind Prospect 25 15
Woakwine Range Wind Prospect NA 60
Meridian Energy & Wind Farm
Weymouth Hill 20
Develpments
Waitpinga (Victor
Wind Farm Developments 40 20
Harbour)
Collaby Hill (East of Port
Wind Farm Developments NA NA
Pirie)
Another farm in construction is Babcock & Brown WindPower Pty Ltds Lake Bonney Stage One, an
80.5MW Wind Farm costing more than $100 Million. Work has begun on the first of 46 foundations
and 76 metre towers to support the Vestas 1.75MW Wind Generators having blades 66 meters in
diameter. The farm was under threat in 2001 when "outstanding issues associated with the
connection of the wind farms to the high voltage grid system" was hindering the farms commercial
viability according to a Spokesman for Babcock & Brown Windpower. It appears many farms are
having trouble with monopoly ElectraNet S.A. in connecting to the H.V. transmission grid at
reasonable prices.
No doubt you will notice Wind farms are having a few publicity problems at the present. This
appears to have stemmed from a minority of residents who have legitimate concerns about a farm
being built nearby and the possibility of visual pollution. Coupled with the media who really doesnt
care if it is fact or fiction, provided it makes a good story, the problem has escalated from myth to
myth.
Here are the normal myths circulating at present:
Wind power is not base load and we will need to build extra generation to supplement wind
power when the wind is not blowing. Typically availability is quoted 30%.
The energy payback time for a wind farm is too great.
Wind Farms and the power they generate are expensive.
Wind Farms cause visual pollution.
Wind Farms are noisy.
Wind Farms kill birds.
Myth #1 Wind power is not base load and has an availability of 30%.
Wind farms are the most successful form of renewable energy to date. As a result it carries the
weight of some far-fetched ideas that wind farms will one-day replace fossil fuel power stations. Its
probably easy to guess why someone would jump to this conclusion. After all the growth of wind
farms have been quite significant in the past couple of years.

However if some how it was possible, so called experts would point out wind is intermittent form of
energy and wind only blows 30% of the time. Well the statement is not entirely correct but what they
are talking about is the capacity factor (CF). There is no hidden secret. The capacity factor of a
wind farm is approximately 30%. What is capacity factor?
"So ask yourself the question: If South Australia was stupid enough to go for wind, how would you
run air-conditioners or, indeed, hospitals and industry for the other 244 days of the year? " - David
Bellamy
Wind farms, have an availability figure of

around 96-98%. This indicates the turbine
will be ready to generate energy say 98%
of the time. During the other two percent,
the turbine or grid may be undergoing
maintenance, the distribution grid may be
down due to fault or for bush fire prevention
etc.
Then there is a wind availability figure. At

most good sites within Australia this is
approximately 80%. This indicates that
80% of the time, the wind is fast blowing
enough to generate power, or less than the
cut-off wind speed at which the turbine
shuts down and turns out of the wind. This
is done to protect the turbine from damage
in very strong winds.
Last there is a turbine power curve which

plots power output against speed. It shows
at what wind speed the output of the
generator will peak. Multiply all these
figures together with the wind speeds at the
site and you get a capacity figure as a
percentage. This means if you have an
18.2MW wind farm you could expect an
output of approximately 47.8GWh/year
(18.2MW/h x 24hours x 365days x 30%).
Pacific Hydro which has built both the Codrington Farm and more recently Australias Largest Wind
Farm, Chalicium Hills, quotes Capacity Factor on the fact sheets for its farms. Codrington (18.2MW)
was expected to be about 32%. In the 2002/03 Annual Report, Codrington generated 47.8GWh of
clean renewable energy. Thats a 29.98% capacity factor which is not bad for the first couple of
years when the farm is still being fine tuned and serviced under the manufacturers warrantee.
So the media is right. A 18.2MW wind farm really only generates 30% of the name plate capacity.
This then requires scheduled generation when the wind is not blowing. This is not a significant
problem as gas fired peaking plants or hydro can be brought on line quickly. So what does the
media (the people in the know) suggest as alternatives? Solar? Yep. Wave? sure do.

Unlike wind, the sun doesnt shine 80-85% of the time. At worst case from sunset to sunrise, you
would be really scratching at a maximum of 14 hours or 58%. Then you have cloudy days, which
can see the output drop 5-20%, and maximum power output at certain conditions no different to
wind. Most solar panels dont track the sun, and they are less efficient at higher temperatures.
The North Terrace Power Station (PV Solar), has an installed capacity of 19.8KW. Each year it
generates 25,950kW/hrs so we can conclude it has a capacity factor of 14.9% (19.8KW x 24
hours x 365 days = 173,448kW / 25,950). Gee, thats poor. The North Terrace Power Station was
commissioned in November 2002, Codrington was in November 2001 so both use about that same
era of technology. To be fair, the Redding Report states CF figures for Solar at a slightly higher
18%.
Unfortunately we are still a few months of seeing the first prototype wave power plants being
installed in Australia and there is no comprehensive wave studies in Australia. Economics has been
the main reason why wave has not let taken off. While I prefer to work on actual production data, we
will have to base our wave capacity on research.
Like wind, Wave power is said to have an approximate availability of 80% in Australia. However in a
report from the Australian Greenhouse Office, it is suggested Wave power has a capacity factor
of 7% upwards to 25% based on the device used.
"The efficient use of every form of energy is a must. In your sunburnt country, surely solar power
can bridge the gap until wave power begins to provide real base load power to solve the problem. "
- David Bellamy.
So David Bellamy, if we adopt solar power how do we run our air-conditioners or, indeed, hospitals
and industry for the other 310 days of the year?
It has never been suggested Intermittent Renewable Energy such as Wind would replace fossil
fuels. Most renewable technologies simple do not scale up well. However they are designed to
supplement power generation, and we must start somewhere. We cant keep putting of construction
hoping for some miracle solution to come along.
It is hard to understand how Wind could ever overtake fossil fuels without some significant shift in
Federal Government Policy. The Mandatary Renewable Energy Target calls for 9,500 GWh of
renewable energy by 2010, or about 1.5% of electricity to come from renewable sources. At present
Wind makes up 11% of renewable energy and is expect to grow to 40% by 2020. Therefore Wind
would be predicted to make up approximately 0.6% of generation. Any further generation would
have no RECs to support it. Even if MRET was increased to 10%, Wind would only ever make up
4% of total generation. AusWEA suggests that up to 20% of electricity could be generated by Wind
before it would cause problems.
Myth #2 The energy payback time for a wind farm is too great.
The energy payback time is the time taken to repay all the energy used to manufacture, install,
operate and decommission the plant. The payback time for wind is in the order of a couple of
months, typically anywhere from 3 to 8 months depending upon the wind speed at the location.
In comparison solar cells have a payback time of around 1 to 4 years depending upon the
technology. Its typically around 4 years for todays multicrystalline-silicon cells and 3 years for

thin-film modules.
It can be expected both will continue to decrease as technologies get better. Only two years ago it
was common to use 1.3MW wind turbines, today they are using 1.75MW turbines economically.
Myth #3 Wind Farms and the power they generate are expensive.
The comparison of capital costs for various forms of generation is normally expressed as cost to
install 1kW of name plate generation. It is not a true comparison, as Capacity Factor will effect
viability of the project.
Type Capital Cost Power Cost

Wind $1500/kW $75 MW/h
PV Solar $10,000/kW >$300 MW/h
Solar Tower $4000/kW $180 MW/h
Wave $1500/kW $100 MW/h
While Australia is a good location for Solar Power its price still makes it prohibitive on a large scale.
Wave is predicted to be better, but would still be many years away.
Myth #4 Wind Farms cause visual pollution.
Two Turbines from Pacfic Hydros Codrington Farm (Victoria)

Extract from Adelaides NewsPapers : Picture of decade old wind farms which the media love to recycle.
These photos originate from overseas. No one needs to worry about a farm ending up like this. Being so
old and inefficient, its simply not economically viable to build such a monstrosity.
This is true to some extent. However it is highly dramatised by the media. Early farms overseas
used smaller turbines and consequently many more of them. They were all placed on top of each
other in a small density polluted farm. The media has these first images and have never let go from
them. In reality turbines today are much larger and placed much further apart.
The other myth is the speed of the blades. People visualise fans spinning around. In fact the speed
of the blades spin around at a typical speed of 15 to 17 revolutions per minute, or 3 and a half
seconds to do a single revolution. I can remember approaching my first farm from a distance and
actually thought they were aseptically pleasing to watch.
Wind farms normally have all cables buried underground. Therefore if I was given the option to have
a wind farm across the road or a couple of gas/coal turbines complete with rusting chimney stack
and high voltage switch yard or an open cut coal mine, I think I would take the first option.
Myth #5 Wind farms are noisy.
Another myth about

wind farms is its
noise. Really, some
misinformed people
must turn on their
fans and really
visualise the
turbines are just as
noisy!
The most you can

hear directly
standing under a
turbine is the
swishing of air as

the tip of each

turbine cuts through
the air at 15RPM.
Even this is
insignificant. At 400
meters which is the
closest a turbine
can be built to a
house, the noise
level is 40dB. This is
the equivalent to a
library. You can
easily hold a
conversation under
a Wind Turbine, People having a conversation under a Turbine from Pacific Hydros Challicum Hills
which is said to be Farm
60dB.
For the sake of

economics you
would expect the
farm to be built in a
location known for
high winds. In this
case you are more
likely to hear the
wind blowing, than
you would the
swishing noise.
Australian Wind
Energy Association
Fact Sheet on Noise
Myth #6 Wind farms kill birds.
Yes, its a given that the turbines can and will kill birds. However its important to get it in proportion.
Motor Vehicles, Buildings & Windows, Power Lines, Communication Towers, Global Warming and
even Domestic Cats will kill many times more. An Australian Study suggested mortality rates of
0.23 birds per year per turbine, quite insignificant when compared to mortality rates caused by
domestic cats or motor vehicles. The study showed after a farm was installed, birds would change
their flight a couple hundred meters before approaching the blades and actually fly over it, as they
would other obstacles.
Australian Wind Energy Association Fact Sheet on Birds
Now that most of the myths are out of the way, its hard to see what all the fuss about wind farms
are . . . . ?

News:
Global Wind Partners Lake Bonney Stage 1 Completion - 3rd May 2005
Novera Energy scales back Australian operations - 9 August 2004
Clements Gap Windfarm Gains Approval - 14th August 2003
Cathedral Rocks Windfarm Gains Council Approval - 28th August 2003
Links:
Wind Energy Association of Australia (AusWEA)

Cost Convergence of Wind Power and Conventional Generation in Australia (AusWEA)
South Australian Wind Power Study - Electricity Supply Industry Planning Council - March 2003
Pacific Hydro (Wind Farm Developer)
Blue Wind Energy (Pacfic Hydros Branded Electricity) - Excellent site for Wind Farm Information
Stanwell Corporation (Wind Farm Developer) - Excellent site for Wind Farm Information
NEG Micon (Wind Turbine Manufacturer)
Vestas (Wind Turbine Manufacturer)
Bonus (Wind Turbine Manufacturer)
3rd May 2005
Gippsland Circus - The Bald Hill Debate
While it is known some individuals strongly oppose wind farms, what is only just becoming
evident is the length some groups will go to when lead on by the media, and of course a
federal election! The recent Gippsland Circus in Victoria is a prime example of this.
At stake is the 52 turbine Bald Hill wind farm on the Bass Coast of South Gippsland said to
produce 104 megawatts of power. The developer Wind Power Pty Ltd estimates the project
will cost $220million.
It starts with the British Professor of Botany, David Bellamy who helped to heavily promote
wind farms in Britain in the 1980s. Today, he has changed his mind, rather leading the
campaign in Britain against wind farms. The UK has older first generation wind turbines,
which are noisier, smaller and less efficient than todays turbines. Their smaller size and lower
efficiency requires many more turbines to be placed together to generate the same power
achievable with just a couple of todays high tech, high efficient units. For example, the
Australian Financial Review used capacity factor (CF) figures from German wind farms, which
were in the vicinity of 11%, and tried to incorrectly apply these to the Australian Market using
newer technology where 30% CF is normal. Doing this introduced almost a 200% error in CF
used by the AFR to support views they were ineffective. Bellamy makes the same mistakes.
"The wind is indeed a useful element all over this world. One thing is certain; when all
the reserves of fuel, like coal and oil, have been used up there will still be the wind. You
see the winds which blows around this planet remain largely untapped: A huge and
constant source of energy for a power hungry world." - Prof David Bellamy - 1989
Hence Bellamy is quite justified complaining about the situation in the UK. His complaints

stem around the capacity factor for wind farms and the number of old and aging turbines
required over their country side. Because the wind is not blowing all the time, it is only
reasonable to expect to obtain 30% output from new wind farm. Bellamy however
recommends Australia focuses on solar energy - something which is at best six times more
expensive and has a capacity factor of only 15% or at best, half the capacity of Wind.
Channel nines Sixty Minutes paid for Professor David Bellamy to stir up a small delegation of
800 residents concerned about the consequences of Bald Hill in a public meeting in Foster, a
town in Gippsland and the marginal Federal electorate of Macmillan. Some conservationists
liken it to scientists being paid in the fifties to travel around and say cigarettes dont kill you.
Other journalists armed with questions about Bellamys controversial and somewhat
misleading views were prevented from raising their concerns directly with Bellamy :
Is there any reason why the Australian Broadcasting Corporation isnt

allowed to ask any questions of Professor Bellamy?
Sixty Minutes Spokesman : Because hes gotta go home and go to bed.
Rachel Carbonell : Can he make that decision or is that a decision

that you make?
So Professor Bellamy is there any reason why you wont answer

questions from the Australian Broadcasting Corporation?
DAVID BELLAMY : Because Ive been asked not to.
But at the end of the staged public forum, the circus was just getting started. With a federal
election just around the corner, why cant the Federal Government enter into the debate? At
the time, it was thought little could be done at the federal level. The necessary planning and
development approvals, which include impact statements regarding bird mortalities had been
obtained. The Victorian Government had signed off on the project in August.
But liberal candidate for the seat of McMillan, Russell Broadbent enlisted the help of
Environment Minister Ian Campbell. He creatively found a way to halt the project under the
federal governments silver bullet - the Environment Protection and Biodiversity Conservation
Act. This is an extremely rare occurrence. In the history of the act only two major projects
have ever been halted or vetoed.
Ian Campbell said the project should be delayed until the operator supplied more information
about the economic and social impacts of the project and potential effects on bird life.
Ironically some conservationists are now suggesting we may not have to worry about this
problem in 2050 as many of the hundreds of species of birds will no longer exist if CO2
emissions continue to grow.
Links:
British professor campaigns against wind farms - PM ABC - 30th September 2004
Canberra buys into wind farm battle - The Age October 14th, 2004
Wind bid a stunt - The Australian October 14, 2004
Bellamys views are full of hot air - Australian Wind Energy Association - 30 September 2004

The wind industry is concerned about David Bellamys 60 Minutes funded trip to South
Gippsland this week in the lead up to the federal election. . . .
Gippsland Circus - The Bald Hill Debate turns to Parrot Politics - Part II
With the election over, you would think the circus would finish at least until the lead up to the
next election. But nope its time to play Parrot Politics.
" Word is out this morning that the Federal Government is going to try and scuttle the Bracks
Government's plan for a large wind farm at Bald Hills in south Gippsland. Federal Environment
Minister Ian Campbell is due to make an announcement this afternoon that a two year
investigation indicates the wind farm's 52 turbines will disrupt migratory birds. So is this the
end of the Bald Hills wind farm and indeed perhaps other wind farm proposals?" - Libby Price,
The ABC. Wednesday, 05/04/2006.
Indeed it would seem so. As expected, the Federal Environment Minister intervened and
overruled the development of the farm. The reason? The need to protect the orange-bellied
parrot.
But interesting enough the report concluded not a single orange-bellied parrot was observed
near the proposed Bald Hills wind farm. Where too next? The developers take Federal court
action against the decision. (Even the Victorian Government offered to take federal court
action to overturn the federal decision to stop the farm)
By June, and with the court in session, Federal Environment Minister Ian Campbell was in
damage control, denying reports he ignored explicit advice from his own department which
recommended approving the farm.
The federal court battle ends in August when Federal Environment Minister Ian Campbell
agrees to reconsider his decision. The court issues orders by consent for the Minister to
reconsider and pay the developers legal costs. (More tax payers money)
Planning Minister Rob Hulls said "This court order today makes it pretty clear that his original
decision to knock back the Bald Hills wind farm was a purely political decision"
So surely there is closure now? Nope. There is Victorian Elections in November. Unbelievably
now its the Greens wanting to stop the farm. No, you are reading this correct The GREENS.
Greens candidate, Jackie Dargaville contested the local seat. She indicated while the Greens
support renewable energy over coal and nuclear electricity generation, "we do believe that
renewables should be in the right place". Yep, you guessed it. It turns out she lives close by
the old NIMBY problem Not in my backyard.
Finished yet? Nope two days later (August 17th) Vandals cause $100,000 damage too two
Wind Monitoring tower at the proposed site. Twelve days later, on the 29th August, Federal
Environment Minister Ian Campbell announces a $3.2 million dollar fund to protect the
endangered orange-bellied parrot.
Stay tuned for part III. Another Federal Election coming up next year . . . . . Sadly, In the mean
time Global Warming isnt slowing.

Links:
Feds try to scuttle Bald Hills wind farm ABC, 5th April 2006
Wind farm decision overturned due to endangered bird - ABC, 6th April 2006
Vic Govt to challenge wind farm ban - ABC, 28th April 2006
Campbell denies claims he ignored wind farm advice - ABC, 26th July 2006
Campbell in parrot U-turn - Herald Sun, 4th August 2006
Campbell reconsiders wind farm ban ABC, 4th August 2006
Greens to campaign against Bald Hills wind farm - ABC, 15th August 2006
Vandals damage wind towers The ABC, 17th August 2006
Campbell 'playing politics' with parrot The Age, 29th August 2006
Anti-windfarm campaigners welcome parrot funding - ABC, August 30th 2006
Parrot politics Herald Sun Aug 31, 2006
1st September 2006
Hot Rock Geothermal - Could it be the future of Renewable Energy?
Certainly worthy of mention is South Australias world class HFR (Hot Fractured Rock) or HDR
(Hot Dry Rock) geothermal energy resources. The Cooper Basin is one of the worlds hottest
locations for HFR energy and is the site for the Geodynamics (ASX:GDY) demonstration
plant. The operation consists of drilling two wells approximately 5 kilometres into the ground. A
heat exchanger is then formed by hydraulic stimulation where the temperature of the granites
is approximately 270C. The technology and concept is not new. France has the Soultz HDR
project which is considered the most advanced HDR geothermal project in the world. HDR
geothermal energy uses proven binary power plants and proven drilling techniques used
everyday in the mining industry. HDR geothermal exploration in Australia was kick started by
SA and NSWs recognition of HDR by granting Geothermal Exploration Licences (GELs) and
the Governments Renewable Energy (Electricity) Act 2000.
The ability of industry to innovate and promote new technology is exemplified by the
experimental Hot Dry Rocks Project. I am quietly confident that this project, dependent
on high heat flow of basement rocks in the Moomba - Gidgealpa region, will be the
beginning of new era of clean green energy production for South Australia. This project
has the potential to provide a significant proportion of South Australias energy
requirements. I await the results from the first geothermal well, the 4.5 km hole
Habanero 1, with great interest."-Paul Holloway - Part of the SAs Minister for Mineral Resources
Development opening speech for the South Australian Resources and Energy Investment Conference
in Adelaide. 30th May 2003
Geodynamics economic modelling suggests it can produce power from a 13MWe

demonstration plant at around $63MW/h. This is cheaper than wind, and has simular
infrastructure costs. A scaled up plant of 275MW is suggested to produce power at a cost of
$40MW/h which is the first base load zero emissions renewable energy source to rival the cost
of conventional fossil fuels. This data is produced in collaboration with MIT and has been
independently reviewed by Sinclair Knight Merz.
Geodynamics has successfully obtained a technological transfer agreement and sub licence
for the use of Kalina Cycle technology. Kalina Cycle is the worlds highest efficiency heat to

power conversion technology which when used in the proposed binary geothermal power
plant can increase the efficiency by as much as 25%. Such increases has been demonstrated
in a plant in Iceland. Traditional plants have used an Organic Rankine Cycle (ORC) based on
organic fluids where the Kalina Cycle uses a water ammonia mixture.
One of the problems with producing power of this quantity in the Cooper Basin is the cost of
connecting it to the High Voltage Transmission Network. As Geodynamics has another GEL
for the Hunter Valley (close to Sydney) some wonder why this site was not chosen for the
demonstration plant. However Geodynamics points out the temperature of the granites may
be tens of degrees lower at the Hunter Valley site which can cause power output to be cut
substantially.
"It is also worth noting that South Australia is now a hotbed of exploration for
geothermal energy with investment coming from Geodynamics, Minotaur,
Scopenergy, Perilya and Green Rock Energy. There opens some chance for an
emissions free energy future - not just for the State - but for the nation. Some of you
may have noticed the recent announcement by Queenslands Premier Peter Beattie of
Geo-thermal licences. Im sorry Pete, but youre three years behind us. Not only that,
Geodynamics already have a well near Inniminka that I am told is coming along nicely. -
One year after Paul Holloways first mention of HDR, he is at it again - SA Resources and Energy
Investment Conference - 10th May 2004
The 275MWe scaled up plant could be connected to the High Voltage Distribution Grid with a
line to Olympic Dam. This proposal is suggested to cost approximately $5 to $10MW/h still
making the project very viable. The 275MWe plant harnesses an area of HDR 2.5 x 2.5
kilometres. Geodynamics GEL97 & GEL98 HDR geothermal exploration tenements in South
Australia alone cover an area of 991 square kilometres and with mention of future capacities
in the thousands of MWe, We can only wait and see what eventuates of this exciting
technology. The 1000 square kilometre HDR resource is the equivalent of 50 billion barrels of
oil or 10.3 billion tonnes of coal. This is 20 times larger than all the known Australian oil
reserves and equivalent to 40 years current black coal production.
Habanero 1 & 2, Geodynamics first two geothermal wells (named after a hot chilly pepper)
has produced very exciting results. Hydraulic stimulation of the underground heat exchanger,
the most riskiest part of the project, has been successfully completed. It was reported to have
exceeded all expectations with a heat exchanger seven times larger than expected. A initial
water circulation test in mid April 2005 lasting 40 hours reached temperatures of 198.5C. A
five week diagnostic flow test programme is now expected to start the week beginning 2nd
May 2005 and after completion, a 3MW geothermal power plant will be built to demostrate
HFR geothermal energy. Literally its full steam ahead for Geodynamics.
Petratherm Limited (ASX:PTR) has a different strategy to that of its peers. Instead of
focusing on obtaining the highest temperatures, they are aiming to find hot dry rock in excess
of 220C but at a depth less than 3.5 kilometres and positioned close to infrastructure. They
believe finding hot dry rock close to established infrastructure but at lower temperatures out
weighs the cost of drilling deeper and running transmission lines across the state.
Unfortunately we will have to wait a couple of years to see if this strategy proves correct.
Petratherm has announced it will drill its first exploration well in the forth quarter of 2004, kick
starting a two-year exploration program. Petratherm have identified three areas of interest and

have obtained geothermal exploration licences GEL156 Paralana and GEL157 Callabona,
both northeast of Leigh Creek and GEL158 Ferguson Hill, approximately 70 kilometres north
of Olympic Dam.
Eden Energy, a subsidiary of Tasman Resources (ASX:TAS) has applied for seven
geothermal licences in South Australia. It intends to harness Hot Dry Rock energy not only for
electricity generation, but also for the production of hydrogen fuels.
Eden Energy has a significant stake of Brehon Energy, which holds world leading technology
and patents for the cryogenic storage of hydrogen and the production and use of Hythane, a
mixture of compressed natural gas (CNG) and hydrogen. This technology has initially been
developed over the past 15 to 20 years as part of the NASA space program, been trialed in a
wide range of applications and is now ready for full-scale commercialisation.
Eden has just announced details of a joint project to replace Beijings 10,000 diesel buses with
low emission Hythane alternatives. This technology will be ready and on show to the world at
the up coming 2008 Beijing Olympics.
Green Rock Energy Limited (ASX:GRK), formally Mokuti Mining Limited has acquired
Perilya Geothermal Energy Pty Ltd & Green Rock Energy Pty Ltd which each own a 50%
share of five geothermal exploration licences around the Olympic Dam area covering 2200
square kilometres. Green Rock Energy will start drilling investigation wells in the 2nd quarter
of 2005 and subject to good results will drill its first geothermal exploration well in 2006.
Geothermal-Resources, a spin off from Havilah Resources (ASX:HAV) has recently

announced an IPO. Geothermal Resources currently owns GEL181, 208, 209 and 210 in
South Australias Lake Frome area and have applied for GELA214, 215, 216 and 217.
Renewable energy company, Pacific Hydro is also hot on hot rocks. Pacific Hydro has a
record eighteen geothermal exploration licences in South Australia covering a total of 8,894
square kilometres.
While South Australia and New South Wales were the first to recognise Hot Rock Geothermal
exploration, it would appear the NT, Victorian, Queensland and more recently Western
Australia are busy passing legislation allowing the exploration of Hot Rocks.
New Qld laws allow hot rock exploration Yahoo News (ABC) - 20th May 2004
Mining laws keep hot rock power underground (NT) Yahoo News (ABC) - 29th May 2004
Hot rocks on the cards (Vic) - Melbourne Herald Sun, 13 March 2006
WA looks at hot rock power Sunday Times, 16th November 2006
Links:
Holders of Petroleum Tenements in South Australia - Primary Industries & Resources S.

A.
450 years' electricity in hot rocks - The Australian, September 9th, 2006
Geodynamics Limited
Energy company to harness the power of hot rocks - ABC, 4th May 2005

Energy firm up-beat about hot rocks power plan - ABC, 5th May 2005
SAs new source of energy - hot water - The Advertiser, 5th May 2005
Renewables to see the light The Age, 4th May 2005
First HFR geothermal flow in Australia - 26th April 2005
Habanero 2 well head installed and tested; preparing for geothermal reservoir testing
programme - 10th January 2005
Deep underground connection between Habanero #1 and Habanero #2; drilling
temporarily suspended at 4,343m (14,245ft). - 18th October 2004
Habanero #2 On schedule at 3,200 metres - 23rd August 2004
New Kalina Cycle Design Patent - 26th July 2004
Habanero 2 Drilling is underway - 12th July 2004
Geodynamics raises $7 million to drill second HFR well - 11 March 2004
Hydraulic Stimulation programme successfully completed overall project risk
significantly reduced - 21st January 2004
Completion of Kalina Cycle Acquisition Leads to formation division: Geodynamics
Power Systems - 21st January 2004
Hydraulic Stimulation #1 completed - results exceed expectations - 19th December 2003
Petratherm Limited
Paralana 1 and Callabonna Update - 2nd March 2005
Drilling Begins at Paralana - 12th January 2005
New Licences and Field Activity - 6th September 2004
Petratherm to drill first hot rock well early in fourth quarter - 27th July 2004
Tasman Resources
Major Green Energy Initiative - Tasman Resources - 16 June 2004
Havilah Resources NL
Havilah announces Geothermal Energy Project - 6th May 2005
Green Rock Energy
16th November 2006
Parabolic Solar Collectors - A Solar Oasis?
For quite some years there has been talk about a $80 million Solar Oasis Project to be built in
Whyalla on South Australias Spencer Gulf. Using technology being developed by engineering
professor Stephen Kaneff from the ANU, the project is suggested to consist of two hundred
22.6m wide parabolic dishes. The dishes would concentrate the sun on a boiler which
produces steam and hence is suggested to produce 22.2MW electricity. The heat from this
process could also be used to distil some 20 megalitres per day of water.
Solar power stalled as generating firms hunt profits

Whyalla plans solar power plant 7/10/2003
7th October 2003

Other Innovative Power Generation Projects around Australia.
Solar Hydrogen - "Energy of the Future"
A team of scientists from the University of NSWs Centre for Materials and Energy
Conversion, believe within seven years they will be able to produce a solar panel which
produces hydrogen. It has been suggested if 1.6 million individual households equipped their
roofs with 10m x 10m of solar hydrogen panels they would meet all of Australias energy
needs.
The panels would use a special titanium oxide ceramic that harvests sunlight and splits water
to produce hydrogen fuel without creating any greenhouse gases or other pollutants. This
hydrogen gas could then be used for transport, heating and cooking, or used in fuel cells to
generate electricity.
The UNSW work is currently backed by Rio Tinto, Sialon Ceramics and Austral Bricks.
Solar hydrogen - energy of the future - UNSW - August 16th, 2004

Future shock: cities reduced to silence - The Age - August 27th, 2004
Titanium Dioxide Key to Producing Hydrogen Fuel from Sunlight - Azon.com - August
26th, 2004
27th August 2004
Base load Solar Power?
For 7 years between 1982 and 1989, Spain had a 195m high Solar Tower generating 50kW of
renewable power at Manzanares, about 150 km south of Madrid. The project was designed by
Professor Jrg Schlaich, a German structural engineer and successfully proved the concept
while providing useful data for the optimisation of the design.
Enviromission (ASX:EVM) is gearing up to build a 200MW Solar Chimney in Buronga, NSW.

When complete the structure will be just short of a 1km high, almost twice as high as the
highest building in the world. The project is estimated to cost $342 million.
The principle of Enviromissions Solar Tower is simple. A large greenhouse covering 13sqKm
with a height of 2m at the permimeter to 5m at the centre heats the air. As hot air rises, it
escapes up a 990m tower in the centre of the structure. Multiple pressure-staged wind
turbogenerators mounted in the chimney convert this 50 km/h rush of hot air into electricity.
However unlike Solar Panels which can only produce power when the sun is shining, if heat
absorbing materials are placed in the greenhouse they can later radiate heat during the night
to get a renewable power source which is capable of supplying base loads.
Related Links:
View an Artist Rendition of the Solar Tower - Large Download 6.7MB Windows Media
Format

Beyond 2000 Video Clip on Solar Tower - Large Download 12.5MB Windows Media
Format
Preliminary Report Shows Power Station Gains - 29 October 2004
New Technologies Identified to Improve Solar Tower Performance - 22 September 2004
EnviroMission to Purchase Solar Tower Site - 1st July 2004
Solar Tower Prefeasibility Success - Go Ahead Decision - 2nd February 2004
Chinese join up as solar power dream aims high
Ecos - Siphoning the Sun
The Solar Chimney (PDF, 360KB) Schlaich Bergermann and Partner
Solar Mission Technologies
1st July 2004
High Reliability Wave Power with Desalination by-product.
It is estimated some 2,000,000MW of energy could be derived by wave action from the worlds
oceans. However harvesting this energy has proven to be problematic with fouling and
durability problems causing on-going maintenance and a greatly reduced life.
To date, wave energy has been converted to electricity by funnel like turbines mounted on the
surface of the water. As the water rises, air is funnelled through a turbine to generate
electricity. This creates an obstacle along the coast and a hazard with underwater high voltage
transmission lines connecting the units to the grid.
Seapower Pacific is set to change this. Using patented technology, the CETO wave power
plant consists of two parts. The magic is in a submerged unit that does not protrude above the
water line and consists of a flexible diaphragm. As waves pass the diaphragm, compression
and expansion occurs which can be used to pump sea water to shore under high pressure
(1000psi). On shore this high-pressure water is converted to electricity using a conventional
non-marine qualified Pelton turbine.
The construction of the underwater unit is made of concrete, steel and rubber which are all
proven in sea conditions. With the generator located on shore, no special requirements are
needed for grid connection. The by-product of the plant is highly pressurised sea water which
can be used in reverse osmosis desalination to produce fresh water.
On the 26th of July 2005, it was reportedthat CETO underwent its inaugural operational
testing 300m west from Rous Head where it successfully transmitted high pressure seawater
to shore at in excess of 500 psi. In the second half of 2005, typical pressures of between 620
to 850 PSI was obtained on-shore. In late November, the company had ordered desalination
equipment which will be installed once delivered. The company has a plan to produce its first
commercial CETO by the end of 2006.
In 2005, Seapower Pacific Pty Ltd was acquired by UK based Renewable Energy Holdings
PLC. As part of the acquisition, the original Australian owners, Carnegie Corporation (ASX:
CNM), Pacific Hydro, Burns group & Seapower Pty Ltd each have an interest in REH. The
project is said to have attracted great interest from overseas renewable energy bodies and
with most Australian states now investigating desalination, such a plant which doesnt
consume plentiful amounts of electricity but rather generates it can only be a winner for

reducing GHG emissions while ensuring Australia doesnt run out of fresh water.
Related Links:
Seapower Pacific Pty Ltd

CETO Update - 20th November 2005
CETO Update - August 2005
CETO wave energy technology device update - 26th July 2005
CETO Wave Energy Project
The Western Australian Government has announced plans to build a reverse osmosis
desalinisation plant capable of producing 45 gigalitres (17% of Perths water supply) a year.
Using conventional electric pumps to force the salt water through the micro filters, it is being
built 40km south of Perth next to the Kwinana power station due to its hungry power
requirements. While its still early days to see Seapowers Technology commercialised, WAs
plant will help other states see desalination as a viable opportunity and will most certainly
strive to do things better.
15th January 2006
Distributed Generation using Miniturbines or Fuel Cells
As utilities try to squeeze more profit from their expensive electricity grids while at the same
time adversely effecting their reliability, large scale and lengthy power outages are becoming
more frequent. One way of safe guarding this is by installing your own efficient, low emission
generation.
One of the fastest growing sectors in the energy industry at the moment is Distributed
Generation (DG) also known as Decentralised Energy (DE). Currently about 7% of world wide
generation is DG with some countries such as Germany having as much as a 13% DG market
share.
One type of Distributed Generation is mini-turbines such as the Capstone C30. These are
miniature Gas Turbines which are connected up to either Natural Gas or LPG. One of the
benefits of DG is the co-generation capability often referred to as CHP (Combined Heat
Power). This allows the consumer not only to generate their own power, but also to use the
otherwise wasted heat for room or water heating.
The other fast growing type of DG is fuel cells. Fuel cells are still a little way off from
participating in the zero emission hydrogen economy, part due to the availability of hydrogen,
but they are a very real option today for DG from natural gas.
There are many types of fuel cells, but the common ones are :
Polymer Electrolyte Membrane Fuel Cells (PEM) - Used in fast starting applications
such as UPSs and typically operate on pure Hydrogen.
Molten Carbonate Fuel Cells - More suited to commercial applications and larger power
plants.

Solid Oxide Fuel Cells - High electrical efficiency and well suited for small to large scale
generation.
Ballard Power Systems is leading the world in PEM Fuel Cells. Today, You can purchase a
1kW AirGen Fuel Cell Generator which is a small portable unit which can generate electricity
for up to 8 hours from its three internal hydrogen cartridges. After this the unit can switch to
an external higher capacity Hydrogen Cylinder. These units are more aimed at back up UPS
power supplies for computer rooms, telecommunications etc but can have a range of other
uses. Running on pure Hydrogen means they generate no emissions making them ideal for
indoor use.
In the Solid Oxide Fuel Cell (SOFC) arena, a world renowned Melbourne based company,
Ceramic Fuel Cells Limited (ASX:CFU) is considered to be leading the world market. CFCL is
working to commercialise a 1kW SOFC later this year that also functions as a Domestic Hot
Water service that can service a family of 4. Larger units up to 5kW will also be avalible to suit
businesses.
The Residential Micro CHP produces electricity from natural gas (Methane), LPG, Propane
without combustion, noise or moving parts providing for a greater electrical efficiency of up to
50%, while reducing CO2 emissions by 60%. By harnessing the 850 degree heat generated
by the fuel cell, the owner can gain hot water and an overall system efficiency of 85%. This
makes the SOFC much more efficient that the large scale CCGT (Combined Cycle Gas
Turbine) that your power station may use, and without loosing another 10% power from losses
in the grid.
The Australian Technology Park in Sydney is one site in Australia who uses a large fuel cell to
generate 200kW of electricity from natural gas for use within the park, while at the same time
reducing greenhouse gas emissions.
Ceramic Fuel Cells has recently set up a subsidiary in the United Kingdom where it intends to
set up a large scale manufacturing plant. It has the backing of many large shareholders
including Woodside Petroleum, Energex, Western Power, BHP Billiton, CSIRO & the
Commonwealth of Australia.
Related Links:
CFCL New energy deal across the Tasman (NZ) - 18th November 2004
Ceramic Fuel Cells Partnership to design mass production plant - 3rd September 2004
Ceramic Fuel Cells Product Demonstration Program - Includes photos of Technology
Demostrators
CFCL Submission to the Victorian Government Greenhouse Challenge for Energy
Comparision of Fuel Cell Technologies
6th November 2004

Australias Greenhouse Future lies in the hands of Roam Consulting - or does it?
Coal is the predominant fuel used in Australia for the generation of electricity and unfortunately has the
highest greenhouse intensity of most fuels. Thirty three per cent of Australias greenhouse emissions
come from electricity generation, with 92 per cent of this from coal.
Today, coal is typically used in PV (pulverised fuel) power stations which have a thermal efficiency of
approximately 33%. A new technology is being demonstrated around the world called Integrated
Gasification Combined Cycle (IGCC) which can increase efficiencies by greater than 50% and thus
minimally reduce GHG emissions. However coupled with carbon capture and storage the emissions can
be greatly reduced or more accurately stored, preventing them from reaching the atmosphere.
So far IGCC has only been used overseas in demonstration plants and is still considered uneconomical to
be used in larger scale plants. For this reason there are no IGCC plants in Australia but as the technology
improves this should change.
To say the least, IGCC is quite an impressive technology. It involves converting coal into a synthetic gas
called syngas consisting of hydrogen and carbon dioxide. This gas can then be burnt in traditional CCGT
(Combined Cycle Gas Turbine) plants that would traditionally run on natural gas. IGCC plants are also
visioned to be the stepping stone to the hydrogen economy where Syngas can be separated into carbon
dioxide and hydrogen with the latter being used for cars, heating or electricity generation via fuel cells.
If you have a BIG problem, bury it - Geosequestration
However the problem occurs with the carbon capture and storage more commonly known as
Geosequestration. While some technologies to support the concept exist today, as a whole
Geosequestration is currently an unproven technology which requires many more significant years of
development should it ever be economically viable. While the oil industry has in the past injected gas into
active wells, little is known about the long-term storage of C02 in disused wells. The consequences of
vast amounts of CO2 escaping could be devastating, possible affixiating nearby communities while
undoing billions of dollars of work by storing it in the first place.
Despite little being known about the technology and the huge development risks involved, the Howard
government known for its good economic management, is going the next step. It has put all its eggs in
one basket by throwing large amounts of tax payers money into what some consider a short sighted
distant and ambitious technology of Geosequestration, while abolishing Australias only renewable energy
CRC, ACRE. After all, renewable energy is not needed anymore.
Currently there are few used oil and gas wells or coal seams that could be used for storage. It is
considered some may come available in about 2030 but would not be available in all states. The greatest
potential for storing CO2 is in Western Australia, yet most of the CO2 is generated in the eastern states. It
should be noted, that the technology is not perfect and is never expected to be. It is not Zero Emission
Coal as some incorrectly call it. While a good 80% of the emissions can be collected using proven
technology today, there will still be some CO2 escaping the system and entering the atmosphere.
But more important, while there are hundreds of good ideas in existence, it must be economically viable to
survive. The International Energy Agency (IEA) has calculated, full geosequestration from either an IGCC
or natural gas CCGT would cost approximately $67.50 AUD a tonne of CO2. This would include the
capture, compression, transportation and storage. A typical IGCC plant produces about 0.7 tonnes of
CO2 per MW/h of electricity produced. Therefore at current prices (assuming you can build an IGCC plant

economically) Australia is looking at about $100MW/h. For comparison, a wind farm can produce power at
a cost of approximately $70MW/h and Hydro is about $60MW/h.
So how does government come to such a decision to funnel money from renewable energy and place all
its eggs in one extremely risky basket for the benefit of all Australians, . . . sorry, benefit of Rio Tinto?
It starts with the Prime Ministers Science, Engineering and Innovation Council (PMSEIC) which Mr
Howard personally chairs twice a year. It is his governments principal source of independent advice on
issues of science, engineering and innovation. In the 9th meeting on the 5th of December a paper was
presented titled "Beyond Kyoto - Innovation and Adaptation"
The paper proposed and heavily supported only one emerging solution - something that will be
economically viable within 10 years - The sequestration of CO2. But if, in isolation you read the report
yourself, you would of come to the same conclusions. There is only one way forward for Australia. Stop
wasting money on renewables. The solution cant be simpler.
The reason why the Howard Government will not increase MRET is that it will marginally increase the
price of power. This will make some industries uneconomic, causing job losses and the GDP to fall. In the
report Geosequestration was suggested to cost as low as $10 per tonne, a figure quoted from Roam
Consultings unpublished data. Roam Consulting is a small Queensland based consultancy agency. The
report goes on to say Such figures compare favourably with other options offering large reductions in
emissions, i.e the ones that cause job loses and a fall in the GDP such as wind, hydro and wave.
The comparative cost of power. Note how cheap "zero" emission coal is compared to Hot Dry Rock. (Its also
interesting to see Wind so cheap).
So one has to wonder where this $10 a tonne figure comes from? Roam Consulting? No, interesting
enough they deny the claim and do not understand how their name was associated with this data. So who

better to ask, than Australias Chief Scientist, Dr Robin Batterham who just happens to be Chief
Technologist and a board member of Rio Tinto. In fact, thats just what the ABCs 7:30 report did. When
asked, he clammed up and suggested to ABCs Andrew Fowler to check the Hansard, after all it was the
same question Greens leader Senator Bob Brown had asked when recently grilled in Parliament. Dr
Batterham did eventually give an answer to the question on the 7:30 report - unpublished data.
It is now understood that the data was fabricated.
Another quite intriguing part of the report was a table on page 30 of the report showing a comparison of
energy abatement options. It suggests should Australia take the option of "zero emission" coal, we can
begin to see a rapid decline in CO2 emissions from as early as 2006. Somehow it assumed a significant
amount of research will be conducted, the technology developed, tested & refined and made economically
viable, and a couple of large scale plants built and a couple of old large scale PV coal power plants shut
down in - well less than 3 years flat. While its debateable that Geosequestration may be a miracle if it
becomes economically viable on a large scale, I think you will certainly agree that if all the developments
occur above, then it will definitely be a miracle.
Even though the country now has three Cooperative Research Centres (CRCs) devoted to fossil fuel
research under the Howard Government, to date there has been no significant breakthrough in
Geosequestration.
The best indication of the realistic future of this technology comes interestingly enough from within the
Howard Government. In March 2004, Industry Minister Ian Macfarlane told the ABC, "We have got to
realise that the first of these technologies may not be ready to test, even in a pilot situation, for five-10
years". He goes on to say "Certainly 2015 would be optimistic in terms of a significant pilot plant. If we can
get to the stage where 20 per cent of the electricity in Australia is being generated by zero emissions

technology in coal fired power stations by 2030, we will have done well."
Ironically, the paper listed two other technologies, Hot Dry Rock Geothermal and Fuel Cells running on
Hydrogen that were dismissed as being future options, 50 or more years away.
Geodynamics Limited is streets ahead of ICGG in proving economic viability by extracting heat from Hot
Fractured Rock (HFR). Unlike other renewables, HFR has a huge potential as it can deliver large base
load, true zero emissions power. Economic modelling conducted by world recognised organisations such
as the energy lab at MIT and Sinclair Knight Merz suggest HFR energy can be extracted using ORC
(Organic Rankine Cycle) at $39/MWh. A discount of up to 30% can be added with Kalina Cycle
Technology which Geodynamics have licenced and is currently improving, making the technology either in
line with, or cheaper than present day Coal.
In 2003, Geodynamics started spudding Habanero 1 in South Australias Cooper Basin to a depth of
4400metres where they successfully formed a much larger than expected heat exchanger and
significantly reduced the risk of the project. The drilling of Habanero 2 is currently under way where it has
penetrated the heat exchanger formed under Habanero 1 making way for circulation tests later this year
and into early 2005. This will prove if HDR is economic and if so Geodynamics will build a demonstration
plant, only some impressive 50 years ahead of schedule to the governments paper.
The 975 square kilometre tenancy in the cooper basin is estimated to have a phenomenal energy
equivalent of 50 billion barrels of oil. This project has sparked so much interest, that the Queensland
government whizzed though a Geothermal Energy Exploration Bill in May 2004 so interested prospectors
could start searching for Hot Dry Rock in Queensland. Following suit, the Northern Territory government
is now doing the same, and a second hot dry rock Geothermal company Petratherm has listed on the
stock exchange and is preparing to drill its first exploration well. Geodynamics has additional exploration
licences for the Hunter Valley in NSW.
You can only wonder where Australias renewable energy industry would be today, if for example Lyall
Howard, John Howards nephew was head of government relations of Geodynamics instead of his current
position as head of Rio Tintos government relations?
Further Reading :
Prime Ministers Science, Engineering and Innovation Council

Beyond Kyoto - Innovation and Adaptation (Ninth Meeting - PMSEIC)
Cooperative Research Center for Greenhouse Gas Technologies
Coal 21 - An action plan for Australia
The Australian Electricity Industry and Geosequestration - Some Abatement Scenarios
ABC 7:30 Report :Questions raised over chief scientists Rio Tinto role
Mining laws keep hot rock power underground - 29th May 2004
New Qld laws allow hot rock exploration - 20th May 2004
A clean energy future for Australia - A study by Energy Strategies for the Clean Energy Future
Group.
The Chief Scientist, Global Warming and the Potential Conflicts of Interest
Backing a loser
Catalyst : Pipe Dreams (Geosequestration) 9th September 2004 (Video)
Update :

Chief scientists dual roles damaging - The Age - 6th August 2004
A Senate committee has found no evidence that Dr Batterhams acted "inappropriately or
improperly" in regards to his conflict of interest between Rio Tinto and his Chief Scientist post. The
committee did however recommend the Federal Governments chief scientist position should be
made full-time to prevent such issues arising in the future. The Senate committee was established,
following the Howard Government acting to prevent Dr Batterham to appear before a Senate
Estimates Committee to answer conflict of interest allegations.
Halve gas emissions: top scientist - The Age - July 19, 2004
"Talk of such a target by the Federal Governments most senior scientific authority, who recently
defended himself before a Senate committee, is in stark contrast to the recently released white
paper on energy policy, which tied Australias future energy mix and economic base to the high-
emission coal and aluminium industries. . . "
Scientist sets high target for emissions - The NZ Herald - August 2, 2004
"Australias Chief Scientist wants his country to halve its emissions of global warming gases by
2050 - a far bolder target than the Howard Government has adopted. . . "
Australian Scientists Reduce Coal Greenhouse Emissions By 33% - Yahoo News - 3rd August 2004
"CANBERRA, Aug 3 Asia Pulse - Australian scientists today reported the successful trial of a
process for drying brown coal which could reduce greenhouse emissions by one third. . . ."
6th November 2004
Securing Australias Energy Future - LETDF
On the 16th of June 2004, Prime Minister John Howard released his energy package titled
Securing Australias Energy Future. In some circles, the whitepaper has been nicknamed
Securing the Coalitions Political Future, or Securing Australias Coal Industry.
Starting with an early pre-election sweetener, it promises fuel excise tax cuts worth a
staggering $1.5 billion. On top of this comes another $1.5 billion worth for the coal industry to
pursue Howards ambitious dream of "Super Dooper" (Howards own words - LETAG 6 June
04) low emission coal technologies - we fund $500 million of that. Then theres $100 million for
renewable energy development (over 7 years) and $75 million for a solar cities trial.
By specifically funnelling money into solar panels with a capital cost of around $10,000 per
KW (see advertising for governments), Howard can ensure the money is not spent on more
economically viable technologies, indicating it is nothing to do with climate change but rather
demonstrating to the Australian public he is actually doing something.
For example $75 million would buy 7.5MW of solar power producing 9.85GWh/year and
abating 8,865 tonnes of C02. Spending it on Wind power may not win any political votes, but
would buy 50MW of generation producing 131GWh/year and abating 118,000 tonnes of C02.
Investing $75 million in newer HDR geothermal technology, which is only a couple years away
from being demostrated in Australia, would buy 30MW of generation producing 249GWh/year
of base load zero emission electricity abating some 224,000 tonnes of C02. Australia has
some of the best hot rock resources in the world.
But probably the biggest disappointment is hidden deep in the report, indicating MRET would

remain unchanged with no increase, now, or in the future. This has effectively stalled
investment and job creation in this sector. Not fazed by this, Senator Meg Lees introduced her
Renewable Energy Amendment (Increased MRET) Bill 2004 on the same day of the report,
calling for a sensible increase of the MRET target to 4.5%.
It appears the government has learnt some lessons. In this report, zero emission coal is now
referred to as low emission coal. On page 142 there are estimates of the $/MWh cost to
produce power from various sources in 2010. Anything that includes geosequestration now
has a cost indicated as N/A . .
Securing Australias Energy Future - Department of the Prime Minister and Cabinet
PM Delivers a Black Energy Future - Australian Business Council for Sustainable
Energy - June 15, 2004
Green industry sees red at stall in funds - The Sydney Morning Herald - June 16, 2004
Howard goes for clean, not green - The Sydney Morning Herald - June 16, 2004
Renewable Energy Amendment (Increased MRET) Bill 2004
Senate References Committee Report - Budgetary and environmental implications of

the Governments Energy White Paper - 16th May 2005
Govt urged to cut CO2 emissions - The Age, 16th May 2005
Energy review delays C02 reduction - Herald Sun, 16th May 2005
Burying gas still needs some digging - The Sydney Morning Herald, June 16 - 2004
How big energy won the climate battle - The Age, July 30th 2005.
30th July 2005
LETDF - First Round Grants
The 25th October 2006 saw the first successful grants being announced. $75 million was
contributed towards a project by Solar Systems to build a solar concentrator.
Instead of traditional thermal concentrators, Solar Systems Heliostat Concentrator

Photovoltaic (HCPV) will use mirror collectors to beam concentrated light, 500 times the
concentration of sunlight onto special PV solar panels.
The 154MW plant is expected to generate up to 270,000 MWh per annum (CF or 20%) during
daylight hours when full commissioning is complete in 2013. Total capital cost is $420 Million
or $2,727 per KW.
Solar Systems' 154MW Heliostat Concentrator Photovoltaic Project Press Releases

Backing a long shot The Australian, October 26th 2006
A further $50 million from the fund was awarded to UK based International Power for a $369
pilot brown coal drying with post production CO2 capture and storage. The demonstration
retrofit is expected to be fully operational by 2009 and provide up to 30% reduction in
emissions.
The 1,600 MW Hazelwood power plant in the Latrobe Valley has more than 500 years of

brown coal reserves and had previously topped a international list of the dirtiest power stations
world's major industrialised countries with a CO2 intensity of 1.58Mt/TWh.
nr-IPR LETDF Media Release - Wednesday 25th October 2006.

Hazelwood 2030 Fact Sheet
Hazelwood tops international list of dirty power stations 13th July 2005.
Low Emissions Technology Demonstration Fund, Australian Greenhouse Office,

Department of the Environment and Heritage
25th October 2006
LETAG - Lower Emissions Technical Advisory Group
An investigative unit of the ABC has made an intriguing find into the formation of the Howard
Governments fossil fuel dominated energy white paper, Securing Australias Energy Future.
The ABC has obtained leaked meeting minutes, emails and memos suggesting the
government invited a hand picked group of 12 companies from the big side of town to provide
exclusive input into the report and its recommendations.
"Fossil fuel producers - Exxon Mobil, Rio Tinto, BHP Billiton and high level fossil fuel users
and generators - Alcoa, Holden, Boral, Amcor, Energex, Edison Mission and Origin Energy
were part of the Governments exclusive invitation only group." - Andrew Fowler.
"This leaked document provides a remarkable insight into how the policy agenda is really set
under the Howard Government. Its quite clear now that when the Prime Minister wanted new
policy directions to deal with climate change, he decided to call a secret meeting with
Australias biggest polluters and said, Tell me what I need to do." - Clive Hamilton.
"According to notes taken by one of the executives during a LETAG meeting the Industry
Minister Ian Macfarlane stressed the need for absolute confidentiality. The Minister saying that
if the renewables industry found out there would be a huge outcry."
Notes of LETAG Meeting - Taken by Sam Walsh, Rio Tinto. - Includes draft Industry
Communication on greenhouse policy in the PMs Energy Statement compiled by Lyall
Howard (John Howards Nephew)
Leaked documents reveal fossil fuel influence in White Paper - ABC Local Radio - PM -
Tuesday, 7 September , 2004 18:42:14
Govt denies energy white paper claims - The Age - 8th September 2004
14th September 2004
Comments or Suggestions?
If you have any comments or suggestions or would like to discuss a topic in more detail,
please post them on the Web Board
Copyright 2002-2006 | Craig.Peacock at beyondlogic.org | 17th November 2006.

An Introduction to VoIP in Australia
An Introduction to VoIP for Australia
What is VoIP?
Do I need to make a lot of calls to save using VoIP?
What do I need to make a VoIP call?
Is my Broadband reliable enough?
Choosing a VSP?
VoIP is Skype?
Free peering VSPs?
Hardware or Software?
Voxalot Web Callback No need for hardware or software.
The Phase in Period . . .
Do I need a DID?
How much Bandwidth does VoIP use?
Now that I have VoIP, how can I make further savings?
QoS The miracle cure ?
Australian VoIP Providers
Australian VoIP Hardware
What is VoIP?
Voice over IP is an emerging technology allowing access to free or cheaper phone calls. Typically calls between two users using the
same Voice Service Provider is free. Calls to the Public Switched Telephone Network (PSTN) come at heavily discounted prices.
Timed STD calls are generally not heard of among VoIP providers. Most Voice Service Providers (VSPs) offer 10 cent untimed calls to
any land line in Australia. Calling next door costs 10 cents, while calling across the nation or to remote country towns also costs just 10
cents untimed.
International calls are normally on par with calling card services or cheaper. Unfortunately mobile phone calls still carry a premium,
mostly due to the wholesale costs of terminating a call into the countrys Mobile phone networks. Ironically, its often cheaper to call a
mobile phone somewhere in the world, than it is to call one in Australia or the person standing next to you in your living room.
http://www.beyondlogic.org/VoIP/ (1 of 15)13/02/2008 16:53:32

Do I need to make a lot of calls to save using VoIP?
While heavy phone users have more to gain from VoIP, even the lightest of users can gain some advantage if they already have a
suitable broadband connection.
Today, most landline users are on a Homeline Plus ($29.95) or Homeline Complete ($26.95) plans from Telstra or an equivalent plan
from a third party Telco.
Telstra offers a Home Line Budget plan for $19.95, immediately saving you $10.00 or $7.00 a month before you even start to consider
cheaper calls.
The HomeLine Budget plan provides cheaper line rental, but the cost of calls are dearer. This doesn't worry VoIP users, as they make
no phone calls on the traditional PSTN servvice. One of the conditions of the service is you must pre-select Telstra for STD and
International calls and agree not to access other carriers by dialing access override codes. When this plan was introduced, Telstra had
no restrictions regarding ADSL services. They have since introduced a requirement that the subscriber "must not acquire a broadband
service from another service provider which is provided using line sharing technology". This anti-competitive move means you must use
a broadband service that uses Telstra DSLAM Infrastructure.
The features of VoIP also makes it more appealing compared to traditional telephony. Services such as Caller Number Display (CND) is
normally provided free of charge, unlike Telstra who charges $6 a month for the service. Likewise is voice mail services, with many
providers even emailing you a .wav file of left messages. (Note however if you choose to use the PSTN for incoming calls, you will still
need to purchase these services from your PSTN Telco, be that Telstra or a third party)
VoIP services are also portable. Provided you have access to broadband and comply with your VSPs term and conditions, you can take
the service anywhere. This comes in handy when moving house or business Premises. You can retain your existing phone number and
there are no disconnection or reconnection fees. Many VSPs can activate your new service and phone number within minutes of signing
up.
Some providers such as Engin will also offer concurrent multiple calls subject to your available bandwidth. If you have to wait in line to
use the phone at home, just add another box. There is no need for the expense of that second line.
VoIP is also finding itself popular in share accommodation or among teenagers wanting their own phone line.

What do I need to make a VoIP call?

To use VoIP you need :
A reliable broadband service with a recommended speed of 512/128 of greater. This

can be ADSL, Cable, Wireless, Broadband over power or some other access method.
A Voice Service Provider (VSP), e.g engin, Mynetfone, Gotalk, Faktortel etc
VoIP Hardware (ATA, Deskphone or Integrated VoIP Router) or softphone.
The Sipura SPA-2000 Analog Telephone Adaptor (ATA)
Is my Broadband reliable enough?
While you may have no trouble with a bit of light browsing on the weekends, your realtime VoIP connection can only be as reliable as
your broadband connection.
If you have ADSL, consider how long you can keep DSL sync for? If you are on a long copper line, and suffer from regular dropouts,
anytime your ADSL drops so will your VoIP connection. Any drop outs may mean ringing the person back and this not only comes as an
inconvenience but erodes any savings being made.
Also consider congestion on your ISP. A budget, oversubscribed ISP with packet loss may be a good cheap option for web browsing,
albeit a little slow. However with real time VoIP, it may lead to packets being dropped causing breaks in your conversation or at worst
case terminated calls.
Cable broadband services typically share a finite amount of bandwidth among users on your cable segment. If you have a lot of users
downloading in your area, this can reduce your available bandwidth. Many cable users witnessed degraded services over the Christmas
holidays when everyone was home and hammering their cable modems.
Wireless Broadband services such as Unwired and iBurst are also another excellent way of ridding the so called telstra tax by removing
the need for a copper phone and associated sky rocking line rental. However signal strength can play a big part in the reliability of your
connection. Many people have reported good success with VoIP on non-line of sight wireless services, others have not. It can depend
on location and proximity to the nearest tower.

Choosing a VSP
No one Voice Service Provider (VSP) fits all. Typically there are two types of service providers, full service providers and limited service
providers.
Full service providers will provide call termination for local, national, international and mobile calls as well as 13, 1800 service
numbers and 000 emergency services. Full service providers can provide you a DID (Direct Inwards Dialing) number, i.e. a phone
number on the PSTN that friends and family can use to ring you via VoIP.
Limited service providers may provide call termination for local, national, international and mobile calls, but not offer 13, 1800 calls or
emergency service calls. They may not be able to offer you a DID. These providers rely on hardware with dialplans and FXO (ports that
connect back to your PSTN line) so unsupported calls can be routed via the PSTN. Alternately, gateways can be used route these calls
via another VSP who does provide these services.
Some providers charge a monthly fee, others have a prepaid service with no monthly fee. Some support BPAY, others only Credit Card.
Some are geared towards users that make a lot of local calls, others towards users that make a lot of national calls, and even some
towards user that make a lot of international calls. When determining a VSP, What you need to is get you last phone bill and find a plan
that best suits your calling patterns. One VSP may save Joe Bloggs lots of money, but actually cost Mr brown more than his current
Telstra line.
When selecting a VSP you should also consider :
Technical support (If you think you may need it). Most if not all VSP will provide support for billing, or call routing issues.
However many may not provide good assistance, if any at all, towards configuring router X with Analog Telephone Adaptor Y on
ISP Z. Not only are there so many possible configurations, there is different firmware revisions and bugs to consider. It is
unrealistic to expect good telephone support for so many different combinations of routers/ATAs. VoIP is a high volume, low
margin business and sadly good technical support suffers. You may be better considering a cluey friend or family for configuration
assistance. They can also visit your site/home to assist you with these issues.
Where the VSP's servers are located and how they peer/connect with your ISP. For the best quality you want to sign up with
a VSP with servers in Australia. Overseas connections can cause latency or delay in your Voice Calls. You may also want to
consider if they peer with the same transit providers than your ISP uses. Its common to find voice quality issues attributable to the
subscribers ISP and two customers of the same VSP having widely different call quality. Unfortunately most VSPs only have
control of your VoIP data while it is on their network. They have no control over what Internet Service Provider you connect too,
and the quality of backbone transit links can vary.
For example say you live in Brisbane and you sign up with a VSP who has servers located in Brisbane. The VSP connects to
Optus. It is possible your ISP doesnt peer with Optus in Brisbane, but the transit network they use connects to Optus in
Melbourne. What you may find, is your VoIP traffic being routed to Melbourne where it is routed onto the Optus network and then
back to Brisbane. Yet, your next door neighbor may be signed up with the same VSP, but uses a different ISP who peers with
Optus in Brisbane. In their case, their VoIP traffic stays within the state. Speak with other VoIP users on your ISP and gain their
feedback on providers to use or providers to stay away from.
Hardware / Codec Compatibility. While this is becoming less of an issue as VoIP maturers, it has been observed that some
hardware provides bad quality calls with certain VSPs. This same hardware may provide excellent calls for all VSP but not the
one you just signed up with!.
Do you have friends or family already using VoIP? Most VSPs will offer free calls between subscribers on the same network.
However at present there is no peering between providers. If you sign up with engin, but you have a friend on MyNetFone, then to
ring that friend, your call must go via the PSTN and at the cost of a call. If you have friends or family already on another VoIP and
you frequently ring them, you may consider signing up with the same provider to utilise free calls. After all, there is no point
making Telstra rich.
Possibly one of the good things about the VoIP industry in Australia is the absence of contracts. Most providers will allow you to
terminate your service at any time. Many are also prepaid, so you can sign up with them and pay the minimum credit, maybe $10 for a
risk free trial. If it doesn't turn out, you may be able to keep the account as a backup. Some providers such as engin offer special deals
such as the first month free, to assist subscribers in a relatively risk free trial of their service.
The biggest risk is normally the capital purchase of VoIP hardware, only to find out VoIP is not for you.
VoIP is Skype?
If your new to VoIP and have heard about it in the media, you could be mistaken for thinking Skype is VoIP and VoIP is Skype.
However, this is not the case. VoIP or Voice over Internet Protocol is simply a technology used by even some of our largest telcos for
the haulage of voice. Skype, owned by online auction company Ebay, is a piece of very well marketed software that uses VoIP
technology to allow Skype users to call other Skype users for free.
Used my millions of tech savy users around the world, Skype has very little infrastructure but relies on a P2P (peer 2 peer) supernode
architecture to connect your call to your destination. This can have one side effect if youre not careful. If you install Skype on a
computer with a publicly accessible internet address and without a firewall, then your computer can turn into a Supernode used to
connect and transfer voice data between other Skype users. This could result in your computer downloading and uploading a large
volumne of data and exceeding bandwidth quotas. For most users behind a firewall or NAT enabled router, this is not a problem.
As calls dont go directly to your designation, but rather via other peoples computers Skype claims to encrypt your calls so other third
party Skype users cant listen to your conversations. A risk occurs that one day, if it has not already been done that someone will work
out how to decrypt these calls.
That aside, probably the biggest problem with Skype is in-flexibility and upgradeability. Skype, in its current form is a propriety software
application you must run on your computer. This means in order to receive calls, your computer must be switched on all the times. Often
this is impractical, hence users have to resort to prearranged times to call other Skype users.
Being software, most Skype users use a headset connected to their computers. Skype adaptors and handsets are starting to become
available to allow users the ability to use existing cordless phones or handsets, returning the feel of conventional telephony, but as this
hardware still needs the Skype software, you are still restricted to the requirement of having your PC on.
While one of Skypes features is ease to setup, due to these restrictions you may consider a solution running on an industry standard
protocol. A solution where you can mix and match service providers and hardware.

For example, you could choose to buy a hardware based ATA or download a softphone and sign up with a free provider such as
FreeWorldDialup or Voxalot. In this case, you get the advantage of free calls between users connected to FreeWorldDialup or Voxalot,
no different to Skype, while at the same time the hardware based solution means there is no need to have your computer on all the time
to receive calls - a much less power hungry power box connected directly between your phone and broadband router handles this.
As the softphone and hardware ATA work on the same protocols, you can take the free option of downloading a softphone first, and
when ready, seamlessly upgrade to a hardware option without the need to giving family and friends a new VoIP number. Using the
industry standard SIP protocol means, you are not locked into a specific piece of hardware or one particular softphone, but rather have
an extensive choice. Don't like one, try another.
As you will see in the next section, this option also has the added advantage in allowing subscribers not using VoIP to ring you via
PSTN to VoIP gateways around the world, and possibly for the cost of a local call.
Free peering VSPs.
If you have no need to make calls to the traditional PSTN but want to use VoIP among friends or family, then there are free providers
such as Free World Dialup or Voxalot. In simple terms, these providers act as a telephone directory. For example, you can register for a
free account with free world dialup (known as FWD) or Voxalot and get a phone number unique to the provider that anyone connected
to the same provider can call. Calls between users on the service travel entirely on the internet direct from ATA to ATA. Third parties
sometimes offer Free PSTN Access Numbers to these providers in many countries so users of the PSTN can ring your VoIP service.
In Australia, the Australian PSTN to VoIP Gateway offers this service. Australian PSTN users can ring 1300 558 592 followed by 393
and your FWD phone number to call your FWD registered VoIP phone. While the service doesnt have any guarantee of uptime or if it
will operate on the longer term, it does open up possibilities for interstate friends and family to call you for the cost of an untimed 1300
call.
Early users of this service will know it once had a 1800 freecall number. During those days, I had family go interstate on a holidays.
They would see a Telstra payphone on the side of the road, and without any change dial the freecall number and we would have a 10
minute conversation. They then checked into their hotel and made enquiries on how much a free call 1800 number would cost from the
phone in the hotel room. The answer - free. We had regular 30 minute plus interstate calls throughout the period of the week and the
best thing, when they checked out of the hotel the calls on the phome came to a grand total of $0.00. The cost to myself was a hardware
ATA and a bit of bandwidth. The call quaility was close to excellent.
This also opens up possibilities for friends and family traveling overseas. If they can find a Telco in the country they are visiting that
provides a gateway into the FWD, then the same deal applies. They can call you back home for typically the cost of a local call, no
different to any foreigners visiting Australia using the Australian PSTN to VoIP Gateway to call family (with a FWD service) back in their
home country. VoIP can certainly open up some interesting possibilities.
SIPBroker doesn't offer SIP based accounts (You can't register your ATA with them, but Sister company Voxalot can provide this
service)), but provides means to peer between VSPs. The idea is, if your VSP peers with SIPBroker, then via SIPBroker you can access
many other VoIP networks around the world. Unfortunately many Australian VSPs do not peer with anyone due to commercial reasons,
but you can use SIPBroker with your Voxalot or FWD account.

SIPBroker have PSTN access numbers in many countries, including Argentina, Australia, Canada, Ireland, Mexico, Netherlands,
Portugal, Spain, U.K, and the U.S.A. For example if you are in Manchester, U.K and want to call your FWD service for a cost of a locl
call, you can dial the Manchester PSTN to VoIP access number, +44-161-660-8447 and when prompted enter 393 for FWD followed by
your FWD number. SIPBroker peers with these providers worldwide.
Hardware or Software?
There are two ways to utilise VoIP. You can obtain or download software onto your computer which acts as
a softphone, or you can get a hardware based solution.
The software option is the cheapest with many voice providers offering free software. Alternatively you
may download softphones such as Xten X-lite. Using a softphone requires a PC with a soundcard or USB
based handset. While call quality can depend upon your setup, the main disadvantage is the requirement
for your computer to be on to make or receive calls. This can be ideal if you are traveling with your laptop,
but most people like the feel of the traditional handset with the advantage that it doesnt require your
computer to be on 24 hours a day to receive calls.
Softphone: X-Lite v3.0 for Windows
Hardware comes in a few varieties. The simplest and cheapest is the standalone analog
telephone adaptor (ATA). It is typically a bland little box that accepts an Ethernet lead (to connect
to your broadband router) and has a RJ-12 phone socket or FXS port where you can connect your
traditional handset or cordless phone. With this style of box, there is no intergration with the
traditional PSTN line. Its sole purpose is to turn your phone into a pure VoIP phone and is ideal
where a PSTN line doesnt exist (i.e. You finally got rid of Telstra completely, and are now using
wireless, cable etc) or if you want a spare 2nd line for your teenagers etc.
ATA: The Netcomm V100 single FXS port ATA
The next style of box integrates your VoIP service with your PSTN landline service. It is essentially a box that connects in between
your existing phone and landline. It allows incoming calls on your Telstra PSTN line to ring your handsets as normal. However outgoing
calls are routed via VoIP to provide you a cost saving. This allows you to introduce VoIP without having to provide people with a new
phone number. Everyone calls you via your existing Telstra phone number, but outgoing calls go via VoIP.
The other big advantage is the lifeline feature. If your ADSL or VoIP service goes down, or your ATA loses power, calls automatically
fall back to your Telstra PSTN line. This ensures you always have a phone service. Most ATAs can also be programmed to route 000
emergency calls via the PSTN. When calls are made from the traditional PSTN to emergency services, the operator is shown the
physical location or address of the service on their screens. While handling of 000 emergency calls via VoIP is improving many VSPs
cannot guarantee the service, operators can sometimes be given the location of "unknown" and where the VSP does provide
information of the location, the ATA is portable and the onus is on the user to update the location details with the VSP. There is nothing
stopping you taking the service interstate or even overseas on a holiday or when you move house you may forget to update your details
with the VSP.
As VoIP becomes mainsteam, phones that natively support VoIP are starting to hit the
markets. These desktop phones are typically aimed at the corporate sector, but can be of
interest to some home users. They look just like a traditional desk phone, but instead of
having a RJ-12 socket for connection to the PSTN, they accept an Ethernet cable and require
a IP address. Cordless phones that natively support VoIP are also emerging in the market
place.
Deskphone: The Netcomm V85 VoIP Speaker Phone
Having a cordless phone base station connected to an ATA and then connected to your broadband router, all with there own plug packs
can create a mess of wires, lack of power points and a confusion on how to hook them all up. VoIP by nature of its connectionless
protocols do not work well behind most common domestic NAT based broadband routers. Most modern modems run firmware to identify
SIP (VoIP Signaling) traffic and open the necessary RTP (VoIP Voice Streams) so as to make VoIP as transparent and painless to the
end user. However older routers will require special port forwards, DMZs or firmware updates. Some NAT implementations can drop the
call after a fixed delay, eg 5m32s. If your ADSL link goes down, it can take a while for your ATA to notice that it has gone. When it
comes back up, there is often a delay of minutes or tens of minutes before the ATA will realise you have a link again. In some cases, the
ATA may never reattempt a connection.
Integrated VoIP/ADSL routers help alleviate many of the above problems. The ATA component sits on a public IP address eliminating
NAT issues, while being intergrated with the ADSL modem, it also knows when your link goes down, immediately switching to the
PSTN. When the link comes back up, it takes a few seconds before the integrated ATA registers and switches outgoing calls back to
VoIP. As there is only one box, there is only one plug pack and the numbers of cables are cut down dramatically. These devices are
becoming quite popular among ADSL users.
Voxalot Web Callback No need for hardware or software.

If youre thinking you must have a computer or hardware to make use of VoIPs cheap call costs, think again. The people at Voxalot never cease to
innovate. Using a third party VoIP service, Voxalot Web Callback servers can dial two PSTN numbers and effectively couple them up.
This allows you to make use of VoIP call pricing while needing no special hardware or software just a web browser or mobile phone.

Once you enter the two phone numbers into the Web Callback form on the Voxalot webpage, the Voxalot server via your VoIP account dials your
number first. When you pick up this phone, it then dials the second number. When the 2nd party picks up it connects the two calls.
With many VoIP service providers offering untimed calls anywhere in Australia for 10 cents, this service allows anyone with a VoIP account and a web
browser to make calls to any landline in Australia for 20c untimed (The voxalot server makes two outgoing calls using your VoIP account.) Alternatively
you can also make mobile and international calls.
The service offers plenty of flexibility giving you a choice of VoIP provider. The only requirement is your VSP must support two or more concurrent
connections. Otherwise you will need to enter two VoIP accounts One to ring your phone and the other to ring the other party.
This service has endless uses. It is just the thing to establish personal STD calls at work or at your friends place.

The Phase in Period . . .
Switching from your solid, decades old PSTN landline to VoIP can have its teething problems. It wouldnt be recommended to sign up
and switch the household or business over on the first day. Nor would it be smart to send the shiny new VoIP phone number to the
printers for your business stationary straight away.
You may want to sign up, get the hardware sorted, do a couple of calls and phase the service in over a period of weeks. This gives you
time to make sure your ATA retains its registration to your VSP, so you dont lose dialtone. If you are using a DID, loss of registration will
mean no incoming calls.
The first couple of calls after signup may sound fantastic but it's not to say there are not loading issues with your VSP or ISP that effects
your call quality at 9am on Monday mornings or during other busy periods of the week.
These issues, if any, take a few days to surface and can take even more time to rectify. But there is no doubt when you get any issues
sorted, VoIP provides a continuous good quaility service at a excellent price.
Do I need a DID?
A DID (Direct Inwards Dialing) Phone number is used by users of the PSTN to ring your VoIP service. If you are using VoIP as your
primary phone service (you dont have a landline connected) and want people to be able to ring you, you will need a DID.
A common configuration for ADSL users is to use the PSTN for incoming calls and use VoIP for outgoing calls, taking advantage of the
excellent calling rates. This means you can switch over to VoIP without the need to give anyone your new phone number, as they can
call you on your existing number. In fact, you dont even need a VoIP DID phone number, which is good as DIDs normally attract a
monthly fee.
However note that services without a DID is unable to provide any Caller ID to the receiving party. When you ring someone, Caller ID
will indicate the number is Private. In todays world with the influx of Telemarketers, some recipients may not answer your call when no
valid number is displayed.

How much Bandwidth does VoIP use?
Once the ATA registers with your voice service provider, it will periodically send messages back and forth to ensure your ATA hasnt
dropped of the internet and that the VSP knows how to contact your ATA should a incoming call come in. The frequency of these
messages will depend upon the registration time set in your ATA and the replies it gets back from the VSP. Generally this traffic is no
more than a couple of Mbytes a day.
The bandwidth required during a phone call will depend upon the codec your ATA and VSP has negotiated and if you have silence
suppression enabled.
The two commonly used codecs used are G.711A (or G.711U) and G.729. G711 transmits VoIP data uncompressed and provides the
same Voice Quality than the PSTN. With overheads it uses about 87.2Kbps in both directions at the Ethernet layer. During a call, you
are transmitting approximately 87.2Kbps while at the same time receiving 87.2Kbps. This equates to about 39Mbytes a hour of incoming
traffic.
As a comprise between data traffic and quality, the G.729 codec is preferred by many VSP and users alike. It compresses data to
provide a good quality call with a data rate of approximately 31.2Kbps or 14Mbytes a hour.
Fortunately most ISPs only base your download quota on incoming traffic. Before moving to VoIP you will need to work out how many
VoIP minutes you will likely to use in the month and ensure you will have adequate quota on top of your normal data traffic. Once you
have VoIP you will need to monitor your usage to ensure you do not become shaped.
Some VoIP subscribers have used 256/64Kbps services without any issue. Some have even reported successfully international calls
using dialup. So while you may be able to get good call quality while shaped, it is recommended you have at least a 512/128k service.
VoIP Bandwidth Calculator (Technical)
Now that I have VoIP, how can I make further savings?
While substantial savings can be made on local, national and international calls, calls to 13x and mobile phones are often only
marginally cheaper if not very similar to your traditional landline Telco. The reason is normally due to the call termination costs the
carriers charge for these services.
In 2004, the ACCC (Australian Competition and Consumer Commission) determined that the price mobile phone carriers charge for call
termination is at least twice the cost of delivering the service and as a result has put in a plan to regulate the call termination costs. This
plan sees the termination costs fall three cents per minute on the 1st of January each year until it reaches 12 cents per minute in
January 2007.
However while we wait for mobile phone call termination costs to fall, many mobile phone carriers already offer excellent mobile to
mobile call costs, capped calls or monthly plans. You may want to evaluate your mobile phone call charges and decide to make calls to
mobiles on your mobile phone, rather than VoIP.

13x calls attract a similar premium. Some VSP's such as Engin once offered these calls as 10 cents untimed, but has been forced in
recent times to increase the price on these loss making calls to a more sustainable price. For example, Engin currently charge 28 cents
untimed on 13x calls, but only 10 cents untimed to any landline in Australia.
Many businesses offer 13x numbers as a single local call number to customers regardless of what state they are in. However as VoIP
now introduces 10 cent untimed calls to any landline in Australia, you may find it cheaper ringing what was a STD number rather than
the 13x number. Most businesses are only happy to give you a (0x) xxxx xxxx landline number to ring instead of more expensive 13x
numbers. VoIP may one day negate any purpose to have 13x numbers.
ACCC recommends continued regulation of mobile termination services
QoS The miracle cure ?
High traffic or congestion on your internet link will lead to high latency and high latency is one thing VoIP doesnt like. The most common
result is your conversation will break up very much like when you are on a mobile phone call in a poor reception area. You will only hear
part of a conversation.
The easiest way to overcome this problem is not to download or use your internet connection while on a phone call. This may be easy
when you live by yourself, but become increasingly difficult when several people in your household use the internet and/or phone.
QoS or Quality of Service may be touted as the miracle cure. It can be in certain cases, but not all. QoS can be used to prioritise your
Voice traffic giving it a higher priority than other traffic such as your Web downloads or emails. It normally consists of two parts.
Your router will contain a buffer holding your internet packets that are queued for sending. QoS settings can be applied to your VoIP
traffic, enabling VoIP traffic to be sent first before all other traffic. This works well on your upstream link, as your router decides what it
needs to send first. However your downstream link is controlled by your ISPs router. This router you have no control over and can be
where a problem lies.
IP packet headers have ToS or Type of Service bits which can be set to describe how to best handle the packet (minimize delay,
maximize throughput etc) as it passes through multiple routers on the way to your VSPs servers. This is just like putting an airmail
priority stamp on a letter to ensure it goes by air mail and not on a slow boat to china.
The idea here is routers downstream can read the bits and best determine on a packet by packet basis how to handle the data. You
could set the bits in the header of your voice traffic to give it priority and expedite its movement though the internets routers. With any
luck your VoIP server could send back the packets with the same settings and your ISPs router will prioritise your downstream data.
This makes such a good idea that next week while your are waiting for your web download from the states to compete with everyone
elses traffic on a congested international link, you think what happens if I flag all my traffic as high priority?
For this reason your ISPs routers will only respond the ToS bits of packets coming from trusted routers, typically routers that the ISP or
backbone link provider own. They will certainly not respond to flags your modem or other equipment set. You are untrusted, so as other
network providers. If your ISP uses, for example, Telstra as its backbone provider, Telstra is not going to honor flags your ISP sets,

unless they have some prior arrangement.
So the only time any priority will be given to VoIP data on your downlink is when you sign up with a VSP that your ISP runs, i.e. that your
ISP has control of the entire network right up to the VoIP server (e.g. Internodes Nodephone) or when your ISP has a special
arrangement with the VSP to offer QoS - e.g your ISP may be wholesaling VoIP services from a third party.
If, however you dont meet the above two criteria, like most of us, you will have QoS on your upstream traffic but have no control over
what happens on your downstream link. Now is QoS the miracle cure everyone touts it as?
Australian VoIP Providers
Below is a list of the more common Voice Service Providers offering services in Australia :
Astratel
ATP
BBPGlobal
Broad IP
Broadband Solutions
Clarinet
Delacon
Engin
Faktortel
Freshtel
GoTalk
i-fone (nehos)
Koala Telecom
MyNetFone
MyTel
NodePhone (Internode)
OzTell
PennyTel
Primus "Talk"broadband
Siphone (FreeCall)
SipMe
Sipphone
SpanTalk
TalkScape
ThinkTel
VCall
VoipBuster
Voise
Voxalot
Australian VoIP Hardware
ADSL + VoIP Combos :
BiPAC 7402VGP / 7402VL

Netcomm NB9W
Netcomm NB9
LinkSys RT31P2
ATAs (Analog Telephone Adaptors) :
1 FXS Port :
Netcomm V100 (One FXS Port)

Sipura SPA-1000 (One FXS Port)
Sipura SPA-1001 (One FXS Port)
D-Link DVG-2001S (One FXS Port)
Netgear WGR613V (One FXS Port + 3 Port Switch + 802.11G Router)
1 FXS Port + Lifeline :
Sipura SPA-3000 (One FXS Port + FXO)

Netcomm V300 (One FXS Port + FXO Port + 3 Port Switch + QoS Router)
2 FXS Port :
Sipura SPA-2000 (Two FXS Ports)

LinkSys PAP2 (Two FXS Ports)
Sipura SPA-2002 (Two FXS Ports)
Sipura SPA-2100 (Two FXS Port + QoS Router)
Netcomm V200 (Two FXS Ports + 3 Port Switch + QoS Router)
Netgear TA612V (Two FXS Ports + QOS Router)
D-Link DVG-1402S (Two FXS Ports + 4 Port Switch + QoS Router)
D-Link DVG-G1402S (Two FXS Ports + 4 Port Switch + 802.11G + QoS Router)
Desk Phones :
Netcomm V85
Sipura SPA-841
D-Link DPH-120S
Copyright 2006 | Craig.Peacock at beyondlogic.org | 30th July 2006.

Aussie Hot Rock Geothermal & Renewables Hot Rock Geothermal
Hot Rock Geothermal

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As the effects of climate change is further debated, a new gold rush is underway in Australia. But his time the search is not for
gold, not copper, or oil, no - not even uranium, but close. This hive of exploration is centered around the search for Hot Rock, or Content
Hot Rock Geothermal
Hot Granite three to five kilometres under the earths surface. Eden Energy
Geodynamics
Geothermal Resources
Harnessing the heat from Hot Dry Rock (HDR) or Hot Fractured Rock (HFR) consists of drilling two or more wells approximately Green Rock Energy
Greenearth Energy
three to five kilometres into the ground. A heat exchanger is then formed by hydraulic stimulation where the temperature of the KUTh Energy
Licences
granites is approximately 250 degree C. Water is then pumped down the injection well, where it is heated by the hot granite and Petratherm
Torrens Energy
returned to the surface via the production well. On the surface, this hot water is converted to electricity using a binary geothermal
Uranoz Limited (Panax Geothermal)

power plant. Other Renewables & Tech
Ceramic Fuel Cells
CETO Wave Generator
Enviromission Solar Tower
Solar Hydrogen
Solar Oasis
Archives
January 2008
November 2007
October 2007
September 2007
August 2007
July 2007
June 2007
April 2007
February 2007
March 2006
November 2005
May 2005
Categories
Hot Rock (30)
Geodynamics (4)
Geothermal Resources (1)
Green Rock Energy (1)
Greenearth Energy (1)
KUTh (1)
Osiris Energy (1)
Petratherm (3)
Video 1: How to harness Hot Rock Geothermal Energy Torrens Energy (3)
Victoria (2)
Wave (1)
The technology and concept is not new. The first concept of HDR was developed at Los Alamos in the 1970s and later CETO (1)
demonstrated at the Fenton Hill site. The following EnviroVideo special shows the details of this site. France has the Soultz HDR Links
project which is considered the most advanced HDR geothermal project in the world. In November 2007, they have installed the CETO
Eden Energy Ltd
Geothermal loop and are working on the installation of the power plant.
Geodynamics Ltd
Geothermal Resources Ltd
Green Rock Energy Ltd
Hot Dry Rocks (Consultants)
NEMMCO (Electricity Market)
Origin Energy Ltd
Osiris Energy Pty Ltd
Pacific Hydro
http://www.aussiehotrocks.com/ (1 of 3)13/02/2008 16:53:42

Petratherm Ltd
Scopenergy
Seapower Pacific
Torrens Energy Ltd
Video 2: EnviroVideo Special - Hot Dry Rock Geothermal
HDR geothermal energy uses proven binary power plants and proven drilling techniques used everyday in the mining industry.
Despite the many years of development on HDR overseas, HDR geothermal exploration in Australia was only kick started by South
Australias and New South Wales recognition of HDR/HFR by granting Geothermal Exploration Licences (GELs) and the
Governments Renewable Energy (Electricity) Act 2000, early this decade.
Geodynamics, the pioneer of HFR in Australia, is undoubtedly the most advanced being the only company that has tested a
geothermal flow from Hot Fractured Rock. On the days leading up to the 26th of April 2005, Habanero #2 produced over 10MW of
thermal power. The following video from Geodynamics was filmed in the months later and demonstrates the progress
Geodynamics has made.
Video 3: Geodynamics Promotional Video - May 2005
The most is known about the ASX listed companies exploring for Hot Rocks. Here is a list of these listed companies in order of
listing date :
Geodynamics, Listed on the 12th September 2002.
Green Rock Energy, Listed 10th December 2003.

Petratherm, Listed 27th July 2004.
Geothermal Resources, Listed 21st March 2006.
Eden Energy, Listed 6th June 2006.
Torrens Energy, Listed 30th March 2007
KUTh Energy, Listed 25th September 2007.
Greenearth Energy, Expected to list 10th January 2008.
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Cypress USB Starter Kit Device Driver complete with Source Code

2008
A USB Driver for the Cypress USB Starter Kit

One of the most helpful aids when first starting out in something new is examples. Cypress forgot this when they
introduced their USB Starter Kit. But then for $99 U.S., you can't expect the world. The USB Thermometer Driver and
Application was developed under contract by System Solutions 72410.77@compuserve.com. The code is not freely
available.
What I have done is modified the WDM ISO USB driver distributed with the Windows Device Driver Kit for use with the
Cypress Digital Themometer. I've kept it basically the same, so you can actually run the Digital Temperature
Application on this driver to see that in-fact it does work! I will cop some flap for this, as the driver isn't really a good
example to start with, especially if you know little about WDM Programming, as you will learn some bad habits. I'll point
these out.
As the driver is based on copyright material developed by Microsoft, I will not distribute the entire driver. What I will
attempt to do, is show you the modifications necessary to change the driver so that it works with the Cypress USB
Starter Kit. This hopefully will also give you a better understanding as we work through the example.
The driver is simply the ISO_USB driver featured in the Microsoft DDK with modifications in
IsoUsb_CreateDeviceObject so you can talk to the Kernel Mode Device Driver using "\.\\Thermometer_0". This allows
the Cypress application to talk to the driver, rather than using the GUID which Microsoft uses in their example.
The IOCTL handler has been totally modified to handle calls from the thermometer application which comes with the
Cypress Kit. This allows you to run the Cypress Thermometer Application on this device driver. It includes all the
IOCTL Control Code 4 Functions such as Set LED Brightness, Read Thermometer, Read Port, Write Port, Read RAM,
Write RAM & Read ROM as per the Cypress Starter Kit User Guide(Ver 0.993) Page 48.
Modifiying the IOCTL Call Handler.
O.K., forget the modifications. We will start the handler for the IRP_MJ_DEVICE_CONTROL from scratch. Delete or
rename IOCTLISO.C.
Below is the table of functions we will have to implement. This is simular to the table provided by Cypress for
compatibility.
Command Command Value Out Value
MSB LSB MSB LSB
Set LED - - Brightness 0x0E - - - Status

Brightness
Read - - - 0x0B Button Sign Temp Status

Thermometer
Read Port - - Port 0x14 - - Value Status
http://www.beyondlogic.org/usb/cypress.htm (1 of 4)13/02/2008 16:53:53

Write Port - Value Port 0x15 - - - Status
Read RAM - - Address 0x16 - - Value Status
Read RAM - Value Address 0x17 - - - Status
Read ROM - Index NA 0x18 - - Value Status
At first glance, you would expect the Cypress USB MCU to send the temperature using an Interrupt transfer
periodically. After all, the Cypress USB MCU returns an Endpoint Descriptor for EP1 as type equals Interrupt,
Maximum Packet Size of 8 Bytes and an Interrupt Interval of 10mS. The String Descriptor for this Endpoint returns
"Endpoint1 10ms Interrupt Pipe".
At this stage you jump straight to the vector table. The 128us timer is not used, the 1024us timer is, and the endpoint1
interrupt is not used. The Interrupt Service Routine for the 1024us interrupt, simply checks for activity, sets the suspend
accordantly, helps with the button de-bounce. Maybe the 10mS Temperature Interrupt is done in the main loop?
Jumping to the code for the main loop shows we wait for enumeration, Set the Enumeration LED, Read Temperature,
Update Brightness, and Set new Brightness. Maybe it's in the Read Temperature Routine? The Read Temperature
Routine firstly initialises the results, reads the temperature from the DS1620 and stores it in the FIFO for Endpoint 1.
So where is the code for the Interrupt Transfer? Good question, you tell me? (Have I overlooked something?)
Now what if we were to implement a couple of functions. Maybe ReadRAM, WriteRAM? We could then check the
status of the switch by reading a value in RAM. We could read the temperature, provided the temperature was stored
in a RAM Location. Umm, life would be easy. We could change the LED Brightness if we write the brightness to a
location and set the Update Brightness Semaphore!
This is what I believe has been done. Please correct me if I'm mistaken!

Figure 1 : Flow Chart of Endpoint1
IOCTL Codes.
The documentation for the Cypress kit would suggest there is only one valid IO Control Code, IOCTL 4. All driver
functions are called within this IOCTL Code. This is certainly not recommended practice. Microsoft has a macro called
CTL_CODE which is defined in DEVIOCTL.H which is included in the Device Driver Kit.
// Macro definition for defining IOCTL and FSCTL function control codes. Note
// that function codes 0-2047 are reserved for Microsoft Corporation, and
// 2048-4095 are reserved for customers.
//
#define CTL_CODE( DeviceType, Function, Method, Access ) ( \

((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method) \
)
The two least significant bits (Method) map the buffer transfer type which

determines how the buffer is passed in IOCTL calls. We need to use Method
Buffered, thus both bits must be zero.
#define METHOD_BUFFERED 0
#define METHOD_IN_DIRECT 1
#define METHOD_OUT_DIRECT 2
#define METHOD_NEITHER 3
The function defines which function we wish to call. The Kits has used Function 1, thus generating an IOCTL code of 4.
The Access Type is FILE_ANY_ACCESS (0x00), and the Device Type is Zero. This is not defined in DEVIOCTL.H and
Microsoft has reserved Device Types of 0-32767. We should probably be using something like
FILE_DEVICE_UNKNOWN 0x00000022. Likewise Function Codes codes 0-2047 are reserved for Microsoft
Corporation, and 2048-4095 are reserved for customers.
On top of the IOCTL4, I have added extra IOCTL Calls to all the descriptors, Get the Status, and Send custom
URB_FUNCTION_VENDOR_ENDPOINT Commands, should you wish to later add more Vendor Commands to the
firmware.
Download Source Code & Driver
Download CypressDrv.zip Source Code and Driver for Cypress USB Starter Kit. Includes IOCTL MAP and PDF
Documentation of IOCTL Calls (42KB)
A special thanks must go to Burkhard Kainka who has found some bugs in the driver and have corrected them
for us. The last compiliation has in fact done by Burkhard.
This driver is still very much in development. The Cypress USB Starter Kit was loaned to me for a duration of
time and I have since given it back. As a result, I cannot test any additional modifications or support this driver in
any way.
Links
Linux device driver for the Cypress Romain Livin has developed a Linux Device Driver for the
Thermometer Cypress Thermometer Kit.
Device Driver Fiddler Writing Device Drivers? Perhaps playing with Cypress
Semiconductor's USB Starter Kit? If so, the Device Driver
Fiddler allows you to test DeviceIOCommand() Calls before
you write your User Mode Application. . .
USB Webboard Ask for Help, or have you say with the USB Webboard.
USB Designer Links Quite a comprehensive page of links to manufacturers and
products. Great starting point to see what is out there.
Copyright 1999-2005 Craig Peacock 15th June 2005

Who crashed the economy Who will crash the economy?
Who will crash the economy?

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There is a new urban sport, and Australia is high up on the leader board. The objective - Who can crash the economy first. As
simple as it sounds, when it does happen, there may not be a clear winner. Which is just as well, as for all your hard efforts there Content
Who will crash the economy?
is no prize money, just heartache and tears. Household Debt
Household Savings
House Asset Prices
The Baby Boomers will no doubt say it was Generation Y, or Generation Debt as they are sometimes known. Generation Y will say The Wealth Effect
The effects on the broader economy
it was the Baby Boomers insatiable appetite for housing stock driving up asset prices way beyond fundamentals - or even the The Australian Stock Market
growth of equity release products such as reverse mortgages to free up extra spending money to pump straight into the economy
Archives
for goods and services. February 2008
January 2008
December 2007
The financial regulators will say it was the credit providers lax lending practices - everyone knew lending money to people who
November 2007
cant afford it would end in disaster. Not to mention the endless adverts tempting people with So you can have it now!. The October 2007
September 2007
banks and lenders will blame the mortgage brokers for fudging the figures on those low doc, no doc, whats up doc? loans.

August 2007
July 2007
The politicians and treasurer prior to turning the economys auto pilot switch off will blame the central bank after all they control June 2007
May 2007
interest rates (except in election years) and if that doesnt work, its the 1 in 100 year drought (no, its not climate change).
April 2007
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Interrupts and Deferred Procedure Calls on Windows NT4/2000/XP

2008
Interrupts and Deferred Procedure Calls on Windows NT4/2000/XP
The following example is a kernel mode driver which displays kernel debug messages when an interrupt is
generated on the Parallel Port. The ISR queues a DPC (Deferred Procedure Call). The source and makefiles can
be downloaded here
/******************************************************************/
/* Example NT/2000/XP Interrupt & DPC Driver */
/* Copyright 2001 Craig Peacock, Craig.Peacock@beyondlogic.org */
/* See http://www.beyondlogic.org for a complete description */
/* Last Updated 11th November 2001 */
/******************************************************************/
#include <ntddk.h>
#define PortAddress 0x378

#define CONTROL PortAddress+2
#define outportb(ADDR,BYTE) outp(ADDR,BYTE)
#define inportb(ADDR) inp(ADDR)
typedef struct _LOCAL_DEVICE_INFO {

PKINTERRUPT InterruptObject;
ULONG Level;
ULONG Vector;
KAFFINITY

LCD RS232 Interface

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LCD RS232 Interface

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Simple RS232 Interface for Microchip PIC16F84

Simple RS232 Interface

Table of Contents [Toc]

Concept [Toc] [Top]

http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.html (1 of 3)12/02/2008 17:12:28

Screen shot of the HyperTerminal Program

Project Resources [Toc] [Top]

Available Microchip PIC Assembler Source Code [Toc] [Top]

Main File HEX Files

Download assembler source code: Download Hex File:

Schematic, Data Sheets and Pinout [Toc] [Top]

RS232 terminology about DTE and DCE: DTE_DCE_FAQ.pdf

Download ASCII Character Map: ASCII-Map.pdf

Last updated: 16.01.2005

http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.html (2 of 3)12/02/2008 17:12:28

If you see only this page in your browser window,

http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.html (3 of 3)12/02/2008 17:12:28

http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.asm (1 of 7)12/02/2008 17:12:29

;***** COMPILATION MESSAGES & WARNINGS *****

ERRORLEVEL -207 ; found label after column 1

;***** PROCESSOR DECLARATION & CONFIGURATION *****

; embed Configuration Data within .asm File.

;***** MEMORY STRUCTURE *****

ORG 0x00 ; processor reset vector

ORG 0x04 ; interrupt vector

;***** PORT DECLARATION *****

#define TXport PORTA,0x00 ; RS232 output port, could be

;***** CONSTANT DECLARATION *****

CONSTANT BASE = 0x0C ; base address of user file registers

;***** REGISTER DECLARATION *****

http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.asm (2 of 7)12/02/2008 17:12:29

FLAGreg equ BASE+d'7'

TXD equ BASE+d'8' ; TX-Data register

W_TEMP equ BASE+d'10' ; context register (ISR)

;***** INCLUDE FILES *****

;***** MACROS *****

;***** SUB-ROUTINES *****

;***** INTERRUPT SERVICE ROUTINE *****

http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.asm (3 of 7)12/02/2008 17:12:29

bcf INTCON,GIE ; disable all interrupts

;*** check origin of interrupt ***

http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.asm (4 of 7)12/02/2008 17:12:29

; necessarily mean, that the interrupts are already re-enabled.

ISRend movfw FSR_TEMP ; context restore

;***** END OF INTERRUPT SERVICE ROUTINE *****

;************** MAIN **************

SEND CR ; Carriage Return

http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.asm (5 of 7)12/02/2008 17:12:29

http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.asm (6 of 7)12/02/2008 17:12:29

LOOP btfsc RSflag ; check RS232 data reception flag

http://www.trash.net/~luethi/microchip/projects/rs232/rs_test/rs_test.asm (7 of 7)12/02/2008 17:12:29

PIC Assembler Modules

Table of Contents [Toc]

General [Toc] [Top]

http://www.trash.net/~luethi/microchip/modules/modules.html (1 of 16)12/02/2008 17:12:31

LCDtris equ TRISB

CONSTANT BASE = 0x0C ; 16F84 base address of user file registers

Standard Modules [Toc] [Top]

Branch macros (to simplify 'IF THEN ELSE' queries):

Relationship between TMR0 prescaler and unit delay (WAIT 0x01):

m_wait.asm Declarations needed in main program:

CONSTANT BASE = 0x0C ; 16F84 base address of user file registers

; Call of implemented procedures with:

Declarations needed in main program:

;* COMPILATION MESSAGES & WARNINGS *

;* PROCESSOR DECLARATION & CONFIGURATION *

;* MEMORY STRUCTURE *

;* PORT DECLARATION *

;* CONSTANT DECLARATION *

;* REGISTER DECLARATION *

;* INCLUDE FILES *

;* MACROS *

;* SUB-ROUTINES *

;* INTERRUPT SERVICE ROUTINE *

;* check origin of interrupt *

;* END OF INTERRUPT SERVICE ROUTINE *

; MAIN