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100 KHZ, 2 K W BOOST ZVT-PWM CONVERTER

FOR POWER FACTOR CORRECTION

Cuemava MEXICO
~Wlbq10,1@93
Enrique Maset (l), Enrique Dede Guichao Hua (2)1 Fred C. Lee (21

(1) University of Valencia (2) Virginia Power Electronics Center


Computer and Electronic Department Virginia Polytechnic Institute and State
Power Electronics Division University
Burjassot (Valencia),24100 -SPAIN- Blacksburg, Virginia, VA 24061
FAX: 346- 364-2345 FAX: 703-231-6390

Abstract: The power factor correction has power factor (0.5-0.6) and high total harmonic
been becoming an important topic in power distortion (THD).
electronics field in the recent years. The
classical boost single-phase Power Factor The high power factor preregulator
Correction (PFC) scheme have a serious described in this paper are interposed between
problem, while running under CCM operation, the input rectifier bridge and the bulk filter
the diode reverse recovery problem causing capacitor. Switching at a frequency much
significant losses when the output voltage is higher than the line, the preregulator is
quite high. This not only decreases the total programmed to draw a half-sinusoid input
efficiency, but also create thermal and noise current, in phase with the line voltage,
problems. To solve this problem, the zero- therefore the improvements are:
voltage transition (ZVT) technique has been
developed recently, which allow the use of d High input Power Factor: 0.95 .... 0.99.
IGBT, reducing the switching loss and achieve
low conduction loss. A prototype circuit has d Reduced THD.
been built and tested to verify this new
technique. d The bulk capacitor of the PFC is located
at high voltage (380 Vdc). Smaller size and
cost.

I.- INTRODUCTION d The intermediate DC bus can be tightly


regulated without low frequency ripple.
Distributed power system and power factor
correction are two important topics of power As switching preregulator can be used
conversion. different circuits topologies [I]. We used the
Boost topology as the most popular PFC
Off-line switching power supplies have configuration, because it has a number of
historically used full-wave rectifier bridge with advantages including input current not
simple capacitor input filters to power the DC chopped (low EMI), direct control of line
input bus. This capacitor draws current only current and low stress on power switches.
when the input ac voltage is greater than the
capacitor voltage, happening in short periods There are two possible ways to conceive a
around the line peaks. Thus the line current distributed power system. The conventional
waveform is a narrow pulse resulting in poor scheme called two-stage scheme, where the

102 1993 IEEE


0-7803-1405-0/93/$3.00
F"

AC-DC converter has a nonisolated PFC front voltage and current stress. Soft-switching
end followed by a DC-DC converter with operation that can be easily maintained for
. isolation transformer as show in figure 1. wide line range and load range. In the
following section the Boost ZVT-PWM is used
as preregulator PFC and the use of MOSFET
and IGBT's are compared.

11.- SINGLE-ENDED ZVT BOOST PFC

I1 . 111 I K Figure 2 and 3 shows the circuit diagram


and experimental waveforms of the boost ZVT-
PWM. It can be seen that the voltage and
current waveforms are essentially square-wave
except during the turn-on and turn-off
F I G 1.- TWO STAGE SCHEME FOR AC-DC switching intervals, when the zero-voltage-
CONVERTERS IN DISTRIBUTED POWER SYSTEM. switching transition takes place.
Due ZVT time intervals can be very short
The drawback of this scheme is that two with respect to the switching cycle, so the
power stage and two control circuits are operation of this converter is like boost PWM
needed. The second way is to use the AC-DC during most portions of the cycle. The design
bus regulated with only one-stage PFC circuit, considerations are described in [3,4,5,6] and the
containing a transformer. In that case the advantages can be summarized as follows:
drawback is that the bulk capacitor is put a
low voltage place, and its volume will increase
for storing the same energy, and also will be a
small low frequency-ripple on the DC bus. . v
D t
0
The aim of this paper is to analyze the
preregulator of two cascade stage PFC scheme.

li
For this propositi we can use a boost PWM
DC-DC conver'ter. But the serious problem of Yo
this boost PFC while running under CCM
operation mode is the boost diode reverse
recovery problem. Since the output voltage is
high, every time when the active switch is
". S

turned on there will be a very high reverse


recovery current flowing through the diode 2.- CIRCUIT DIAGRAM OF THE BOOST
FIGURE
and the active switch, causing significant ZVT-PWMCONVERTER.
losses, and then the total efficiency decreases,
also appearing noise problems.
W3oft-switching of active and passive switches
To solve this problem, this paper present is achieved without increasing switch voltage
the application of a new class of zero voltage and current stress, the penalty of circulating
transition (ZVT) PWM converters [2,3],where energy is minimal in contrast with QRC
by using a resonant network in parallel with techniques.
the switches, the proposed converters achieve
zero-voltage switching for both the active and 6oft-switching can be easily maintained for
passive switches without increasing their wide line range and load range [l],satisfying:

103
- High efficiency.
- Low EM1 noise.

where tD is the time delay between Sa,, and S


gate signal. From this inequality it can seen
that when Ii decreases, ATol also decreases and
AT,, remains constant. Therefore, as long as the
inequality is satisfied at full load and low line,
soft-switchingoperation will be ensured for the
whole load and line range. This feature is show
in figure 4.

.The switching frequency is constant, so the


design optimization is easily attainable.

The feature of soft-switching for both the


transistor and rectifier diode is used for high-
voltage conversion applications, where the
rectifier diode suffer from severe reverse
recovery problems. So we use this technique in
PFC boost circuit attain:

FIGURE 4: (A) LIGHT-LOAD, (B) FULL-LOAD


FROMTOP TO BOlTOM: vGS-AUX( lOV/DIV),
VGS-MAIN( IOV/DIV), VDS( 1ooV/DIV)

111.- HARDWARE IMPLEMENTATION

A prototype circuit has been built to verify


the advantages of ZVT technique, which is
show in figure 5. The power stage selected is a
boost PFC circuit in order to solve the classical
reverse recovery diode problems avoiding high
switching losses, high EMI noise and high
device stress.

Figure 6 shows the efficiency measurement


of the circuit using MOSFET or IGBT as power
FIGURE3: EXPERIMENTAL WAVEFORMS. switch. Comparing the performance of IGBT's
FROMTOP TO BOTTOM: vGS-AUX(1ov/DIV), version with MOSFET's version, we have a
VGS-MAIN( 1ov/DIV), v D S ( 1~v/DIV),IDS(2A/DIV). reduction of the overall efficiency in IGBT's
version but the efficiency in that case remain

104
between (96.5% ... 97.3%) at low line and excessive device current stress and intolerable
(98.2%...98.4%) at full line (360 Vac European capacitive turn-on loss. Now ZVT technique
line voltage) with a considerable reduction of use the energy stored in the external capacitor
the cost. to achieve the zero-voltage turn-on [3],
reducing the turn-on losses.

The line current is controlled with average


current control [6] using a UC3854 IC. The
output of this IC (pinl6) should be sent
directly to the gate drive of the main MOSFET,
through one driver circuit (TSC4420). Also the
rising edge of this pulse triggers a monostable
circuit (1/2 CD74HC123) whose pulse width is
set to be: Ts-Tdelay, where Ts is the switching
period and Tdelay represents the delay time
between S and S1 control signals, since the
falling edge of this monostable's output is used
to trigger another monostable, in order to set
the pulse width of the auxiliary switch (Sl), in
FIGURE 5 PRACTICAL IMPLEMENTATION OF A accordance with the equation (I). This simple
ZKW, loOKHz BOOSTZVT-PWMPFC. control circuit is shown in figure 7.

This remarkable maximum overall efficiency Gate S


of 98% at full load and high line, represent an lSC4420 +
improvement of 2-3 % compared to the PWM
version operating at the same input and output
conditions. Also it can seen that the waveforms
in the ZVT-PWM version are noise free,
reducing the circuit EM1 noise and improving
the circuit reliability.

This solution is possible due the use of ZVT


technique because, when IGBT is used in order I I
Oat. 51
to reduce the turn-off loss of the IGBT device, 0 TSC4420 b

a considerably large external capacitor across


IGBT is often used to soften the switching
process, causing, without ZVT technique, FIGURE 7: CONTROL CIRCUIT DIAGRAM OF THE
PFC CIRCUIT

9, 1-.... .<.
j +
..............................................
<I, vac
. . . . . ,. . . . . . .. .....................
Vlt

1.. ....... ,;..........;. ........ .:. ......... ~..........I


. . . . . . . . . . . . . . . . . . , ..............

-. i
:
. . . . . . ......../i........ : . . . $6'
. . .

Y!!

97 - . ... ./-l+:!!
.........................................

9(
_ .................................... 96

........................
: 4
FIGURE 6: EFFICIENCY :RSWITCH.

105
Table 1 summarizes the power factor and the 1V.-SUMMARY
efficiency for different line and load conditions,
measured with an ac power analyzer ( Voltech In this paper, a novel ZVT technique is
PM1000) : applied to solve high device stress and high
switching losses problems of boost PWM
Vline (Vrms) PF. U Io (A) converter as front-end PFC converter of two
182 0.996 97.1 3.4 stage scheme in distributed power systems. So,
222 0.997 97.4 5.2 at low line where the current is high, the ZVT
250 0.996 98.1 5.4 technique shows significant improvement of
the efficiency, which will increase the power
The oscillograph of the waveforms is shown density.
in Fig.8. It can seen that the line current has
been well controlled to follow the line voltage. IGBT devices are recommended for their
low conduction loss and reduced price,
compared to MOSFETs at the same voltage
rating. The worst power stage efficiency is
above 96% at low line (180 Vac European line
range).

V.- REFERENCES

[1].- Lloyd Dixon,Jr,"High Power Factor


Preregulators for Off-Line Power Supplies",
Unitrode Seminar Handbook$EM-600,1988.

[2].-G.Hua, F.C.Lee, "Novel zero-voltage-transition


PWM converters," High Frequency Power
Conversion Conf. Proc. 199Lpp.244-251.

[3].- G.Hua, Yiming Jiang, F.C.Lee, "Analysis,


design, and experiments of ZVT-PWM boost
converter",Virginia Power electronic Center
SeminarJ 992.

[4].-Claudio de Sa e Silva,"Power Factor Correction


with The UC3854", Unitrode Application Note.

FIGURE 8: EXPERIMENTAL WAVEFORMS. [5].- Chen Zhou, Milan Jovanovic,"Design Trade-off


FROMTOP TO BOTTOM: JANE CURRENT (2A/DIV), in Continuous Current-Mode Controlled Boost
RECTIFIED LINE VOLTAGE(5ov/DIv) Power-Factor Correction Circuits", HFPC'92 pp.209-
219.

[6].-F.A.Huliehel, F.C.Lee and B.H.Cho,"Small-


Signal Modelling of the Single-phase Boost High
Power Factor Converter with Constant Frequency
Control",Power Electronics Specialist Conference
Proc. 1992.

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