Professional Documents
Culture Documents
2. Classify and Implement the Cache Misses in a two- level Cache system.
PART B (6 X 10 = 60 Marks)
Answer any SIX Questions
9. Construct a UML sequence diagram that shows a four-cycle handshake between a bus
master and a device.
10. Interpret the two ways of mechanism in which interrupts can be generalized to handle
multiple devices.
11. a) Discuss with an example the role of assembling and linking in compilation process. [5]
b) Compile the arithmetic expression a* b + 5*(c-d) to produce the resultant assembly [5]
code.
12. For the processes shown below schedule the processes using an RMS policy. Also
compute the CPU utilization in which time slot starts at t = 0
Process Execution Time Period
P1 12 10
P2 10 5
P3 10 15
Page 1 of 2
13. Describe the static and dynamic energy efficiency features of power PC603 Chip.
14. Explore the CAN data frame format and determine the error frame.
16. Explain the conditional execution of statements in ARM for the following of high level
code. Show the corresponding assembly level code for ARM.
(Assume all variables are available in registers).
If ( a < b )
{
x = 5;
y = c + d;
}
else
x = c d;
Page 2 of 2