Professional Documents
Culture Documents
NOTE: Intersil Pb-free products employ special Pb-free material OUT4 7 10 OUT3
sets; molding compounds/die attach materials and 100% matte tin
A4 8 9 A3
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020C.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2000, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HI-201HS
SOURCE 0 ON
INPUT
1 OFF
LEVEL GATE
TTL SHIFTER SWITCH
LOGIC AND GATE CELL
INPUT DRIVER
DRAIN
OUTPUT
V-
Schematic Diagrams
TTL/CMOS REFERENCE CIRCUIT SWITCH CELL
V+
MP42 V+ Q
P41 MP43 MP44 MP45
MN31
QN41
QN43
C48
ANALOG ANALOG
QN42 QN45 MP33
R42 QP44 IN OUT
QN44 VR1 MP32 MN32
D41
5V MN33
R41
C49
D42 MP31
5.6V
QP41
QP42 Q
V-
2
HI-201HS
MN46 MP51
MP52
MP4 MP8
QN6 QN8
QN1
IQ
MN11 MN12
C1 R1 Q
VEE
QN4
QN5
VA
QP1 QP4 QN2
VCC
VR1 R3 Q
QP5 R2 C2 MP13
MP14
QP2
IX3
MN5 MN9 MN10
CFF MN6
MN13 MN14
IX1 IX2 QP7
QP9 MN3 MN4 MN7 MN8
QP6
QP8
MN52
MN51
3
HI-201HS
CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Supplies = +15V, -15V; VAH (Logic Level High) = 2.4V, VAL (Logic Level Low) = +0.8V, GND = 0V,
Unless Otherwise Specified
-2 -4, -5, -9
TEST TEMP
PARAMETER CONDITIONS (oC) MIN TYP MAX MIN TYP MAX UNITS
DYNAMIC CHARACTERISTICS
Crosstalk (Note 5) 25 - 86 - - 86 - dB
Full - - 40 - - 40 A
Full - - 75 - - 75
4
HI-201HS
Electrical Specifications Supplies = +15V, -15V; VAH (Logic Level High) = 2.4V, VAL (Logic Level Low) = +0.8V, GND = 0V,
Unless Otherwise Specified (Continued)
-2 -4, -5, -9
TEST TEMP
PARAMETER CONDITIONS (oC) MIN TYP MAX MIN TYP MAX UNITS
rON Match 25 - 3 - - 3 - %
OFF Input Leakage Current, IS(OFF) 25 - 0.3 10 - 0.3 10 nA
Full - - 100 - - 50 nA
Full - - 100 - - 50 nA
POWER SUPPLY CHARACTERISTICS (Note 7)
Full - - 6 - - 6 mA
NOTES:
2. VOUT = 10V, IOUT = 1mA.
3. RL = 1k , CL = 35pF, VIN = +10V, VA = +3V. (See Figure 1).
4. VA = 3V, RL = 1k , CL = 10pF, VIN = 3VRMS , f = 100kHz.
5. VA = 3V, RL = 1k , VIN = 3VRMS , f = 100kHz.
6. CL = 1nF, VIN = 0V, Q = CL x VO .
7. VA = 3V or VA = 0 for all switches.
V = 3.0V
DIGITAL AH
INPUT
50% 50%
VAL = 0V
tOFF1
tON
90% 90%
0V 10%
SWITCH tOFF2
OUTPUT
5
HI-201HS
V+ = +15V
13
SWITCH SWITCH
INPUT OUTPUT
3 2
VIN = +10V VO
VA RL CL
1 1k 35pF
LOGIC
INPUT 5 4 RL
VO = VIN
RL + rON
V- = -15V
3
LOGIC INPUT (V)
2 +10
1 +5
0 0
tO tO
+5
+5
0
0
+5
tO
tO
6
HI-201HS
0 0
-5 -5
-10
tO tO
The logic input design of the HI-201HS is largely responsible 12 VS 15V Minimal Variation
for its fast switching speed. It is a design which features a VS < 12V Parametric variation becomes increasingly
unique input stage consisting of complementary vertical large (increased ON resistance, longer
PNP and NPN bipolar transistors. This design differs from switching times).
that of the standard HI-201 product where the logic inputs VS < 10V Not Recommended.
are MOS transistors.
VS > 16V Not Recommended.
Although the new logic design enhances the switching speed
performance, it also increases the logic input leakage Single Supply
currents. Therefore, the HI-201HS will exhibit larger digital The switch operation of the HI-201HS is dependent upon an
input leakage currents in comparison to the standard HI-201 internally generated switching threshold voltage optimized
product. for 15V power supplies. The HI-201HS does not provide the
necessary internal switching threshold in a single supply
Charge Injection
system. Therefore, if single supply operation is required, the
Charge injection is the charge transferred, through the HI-300 series of switches is recommended. The HI-300
internal gate-to-channel capacitances, from the digital logic series will remain operational to a minimum +5V single
input to the analog output. To optimize charge injection supply.
performance for the HI-201HS, it is advisable to provide a
TTL logic input with fast rise and fall times. Switch performance will degrade as power supply voltage is
reduced from optimum levels (15V). So it is recommended
If the power supplies are reduced from 15V, charge that a single supply design be thoroughly evaluated to
injection will become increasingly dependent upon the digital ensure that the switch will meet the requirements of the
input frequency. Increased logic input frequency will result in application.
larger output error due to charge injection.
For further information see Application Notes AN520,
AN521, AN531, AN532, AN543 and AN557.
7
HI-201HS
ON RESISTANCE ()
50 50
40 125oC
40
25oC
30 30
-55oC
V+ = +12V, V- = -12V
20 20
V+ = +15V, V- = -15V
10 10
0 0
-15 -10 -5 0 5 10 15 -15 -10 -5 0 5 10 15
ANALOG INPUT (V) ANALOG INPUT (V)
FIGURE 3. ON RESISTANCE vs ANALOG SIGNAL LEVEL FIGURE 4. ON RESISTANCE vs ANALOG SIGNAL LEVEL
100.0 100.0
10.0 10.0
1.0 1.0
0.10 0.10
0.01 0.01
25 75 125 25 75 125
TEMPERATURE (oC) TEMPERATURE (oC)
7 100
V+ = +15V, V- = -15V 80 V+ = +15V, V- = -15V
6 60 IS(OFF) VD = 0V
40 ID(OFF) VS = 0V
SUPPLY CURRENT (mA)
5 20
IDON
I+ 0
4 -20
I- -40
3 -60 IS(OFF) /ID(OFF)
-80
2 -100
-120
-140
1
-160
-180
0
-55 -35 -15 5 25 45 65 85 105 125 -200
-14 -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 14
TEMPERATURE (oC) ANALOG INPUT (V)
FIGURE 7. SUPPLY CURRENT vs TEMPERATURE FIGURE 8. LEAKAGE CURRENT vs ANALOG INPUT VOLTAGE
8
HI-201HS
60 10
40 VAL = 0V, VAH2 = 3V, VAH1 = 5V 9 V+ = +15V, V- = -15V, TA = 25oC
IAH1 8 I
20
7 S(OFF) VD = 0V
0 6 ID(OFF) VS = 0V
LEAKAGE CURRENT (A)
FIGURE 9. DIGITAL INPUT LEAKAGE CURRENT vs FIGURE 10. LEAKAGE CURRENT vs ANALOG INPUT VOLTAGE
TEMPERATURE
Theoretically, leakage current will continue to decrease below 25oC. But due to environmental conditions, leakage measurements below this temperature
are not representative of actual switch performance.
180 350
tOFF2 RL = 1k, CL = 35pF, TA = 25oC
160
300
140
SWITCHING TIME (ns)
250
120
V+ = +15V
100 V- = -15V 200 tOFF2
RL = 1k
80 CL = 35pF
150
60
tOFF1 100
40 tOFF1
tON
20 50
tON
0 0
-55 -35 -15 5 25 45 65 85 105 125 5 6 7 8 9 10 11 12 13 14 15
TEMPERATURE (oC) SUPPLY VOLTAGE (V)
FIGURE 11. SWITCHING TIME vs TEMPERATURE FIGURE 12. SWITCHING TIME vs SUPPLY VOLTAGE
350 350
V- = -15V, RL = 1k V+ = +15V, RL = 1k
CL = 35pF, TA = 25oC CL = 35pF, TA = 25oC
300 300
SWITCHING TIME (ns)
SWITCHING TIME (ns)
250 250
200 200
tOFF2 tOFF2
150 150
100 100
tOFF1
tOFF1
50 50 tON
tON
0 0
5 6 7 8 9 10 11 12 13 14 15 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15
POSITIVE SUPPLY (V) NEGATIVE SUPPLY (V)
FIGURE 13. SWITCHING TIME vs POSITIVE SUPPLY VOLTAGE FIGURE 14. SWITCHING TIME vs NEGATIVE SUPPLY VOLTAGE
9
HI-201HS
350 3.0
V + = +15V, V- = -15V, RL = 1k
300 CL = 35pF, VAL = 0V, TA = 25oC
250
2.0
1.8
200
1.5
tOFF2
150
1.0
100
tOFF1 0.5
50
tON
0 0
0 1 2 3 4 5 5 6 7 8 9 10 11 12 13 14 15
DIGITAL INPUT VOLTAGE (V) SUPPLY VOLTAGE (V)
FIGURE 15. SWITCHING TIME vs INPUT LOGIC VOLTAGE FIGURE 16. INPUT SWITCHING THRESHOLD vs SUPPLY
VOLTAGE
40
50
IN OUT VO CD(ON)
35
40
CHARGE INJECTION (pC)
30 30
CL
CAPACITANCE (pF)
20 VA 25
10
Q 20
0 Q = CL x VO
-10 15
CD(OFF) OR CS(OFF)
-20
10
-30
V+ = +15V, V- = -15V 5
-40 CDS(OFF)
CL = 1nF
-50 0
-10 -5 0 5 10 -15 -10 -5 0 5 10 15
ANALOG INPUT (V) ANALOG INPUT (V)
FIGURE 17. CHARGE INJECTION vs ANALOG VOLTAGE FIGURE 18. CAPACITANCE vs ANALOG VOLTAGE
140 140
V+ = +15V, V- = -15V V+ = +15V, V- = -15V
120 VIN = 3VRMS , VA = 3V VIN = 3VRMS , VA = 3V
120
OFF ISOLATION (dB)
100 100
CROSSTALK (dB)
IN OUT
80 80 VO1
RL = 100
VIN RL = 1k
60 IN OUT 60
VO
VIN RL VO2
40 RL = 1k 40
RL = 1k
20 VIN
OFF ISOLATION = 20 Log 20 VO2
VO CROSSTALK = 20 Log
0 VO1
0
10K 100K 1M 10M 10K 100K 1M 10M
FREQUENCY (Hz) FREQUENCY (Hz)
10
HI-201HS
Die Characteristics
DIE DIMENSIONS PASSIVATION
2440m x 2860m x 485m Type: Nitride Over Silox
Nitride Thickness: 3.5k 1k
METALLIZATION
Silox Thickness: 12k 2k
Type: CuAl
Thickness: 16k 2k WORST CASE CURRENT DENSITY
9.5 x 104 A/cm2
A1 A2
OUT1 OUT2
IN1 IN2
V- V+
GND
IN4 IN3
OUT4 OUT3
A4 A3
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reli-
able. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
11