You are on page 1of 8

Code No: 117CY Set No.

1
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
IV B.Tech. I Sem., I Mid-Term Examinations, September- 2017
EMBEDDED SYSTEMS
Objective Exam
Name: ______________________________ Hall Ticket No. A
Answer All Questions. All Questions Carry Equal Marks. Time: 20 Min. Marks: 10.

I. Choose the correct alternative:

1. The 8051 has ________ 16-bit counter/timers. [ ]


a) 1 b) 2 c) 3 d) 4

2. The 8051 can handle ________ interrupt sources [ ]


a) 3 b) 4 c) 5 d) 6

3. MOV A, @ R1 will: [ ]
a) copy R1 to the accumulator
b) copy the accumulator to R1
c) copy the contents of memory whose address is in R1 to the accumulator
d) copy the accumulator to the contents of memory whose address is in R1

4. When the 8051 is reset and the line is HIGH, the program counter points to the first program
instruction in the: [ ]
a) internal code memory b) External code memory
c) internal data memory d) External data memory

5. In real time operating system [ ]


a) All processes have the same priority b) a task must be serviced by its deadline period
c) Process scheduling can be done only once d) kernel is not required

6. For real time operating systems, interrupt latency should be [ ]


a) minimum b) maximum c) zero d) dependent on the scheduling

7. Time required to synchronous switch from the context of one thread to the context of another thread is
called [ ]
a) threads fly-back time b) jitter c) context switch time d) none

8. Semaphore is a/an _______ to solve the critical section problem [ ]


a) integer variable b) hardware for a system c) special program for a system d) none

9. The preemption period for the hard real time task in worst case should be [ ]
a) greater than a few sec b) less than a few sec
c) greater than a few m sec d) less than a few m sec

10. A hard real time system is having a predictable performance with no dead line miss even in case of
[ ]
a) sporadic tasks b) aperiodic tasks c) non primitive tasks d) periodic tasks

Cont..2
Code No: 117CY :2: Set No. 1

II Fill in the Blanks

11. The 8-bit address bus allows access to an address range of _____________.

12. The number of data registers is __________________.

13. The I/O port that does not have a dual-purpose role is ___________________.

14. To interface external EPROM memory for applications, it is necessary to _________________ the
address/data lines of the 8051.

15. The problem of priority inversion can be solved by __________.

16. A task can get the messages and send the messages using the ______________ calls only.

17. The RTOS initiates idle to ready transition by executing a function __________________.

18. For real time operating systems, interrupt latency should be _________________.

19. A task which does not have defined period of event occurrence is called _____________________.

20. A synchronization object that can have two states 'not taken' and 'taken' is called a _____________ .

-oOo-
Code No: 117CY Set No. 2
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
IV B.Tech. I Sem., I Mid-Term Examinations, September- 2017
EMBEDDED SYSTEMS
Objective Exam
Name: ______________________________ Hall Ticket No. A
Answer All Questions. All Questions Carry Equal Marks. Time: 20 Min. Marks: 10.

I. Choose the correct alternative:

1. When the 8051 is reset and the line is HIGH, the program counter points to the first program
instruction in the: [ ]
a) internal code memory b) External code memory
c) internal data memory d) External data memory

2. In real time operating system [ ]


a) All processes have the same priority b) a task must be serviced by its deadline period
c) Process scheduling can be done only once d) kernel is not required

3. For real time operating systems, interrupt latency should be [ ]


a) minimum b) maximum c) zero d) dependent on the scheduling

4. Time required to synchronous switch from the context of one thread to the context of another thread is
called [ ]
a) threads fly-back time b) jitter c) context switch time d) none

5. Semaphore is a/an _______ to solve the critical section problem [ ]


a) integer variable b) hardware for a system c) special program for a system d) none

6. The preemption period for the hard real time task in worst case should be [ ]
a) greater than a few sec b) less than a few sec
c) greater than a few m sec d) less than a few m sec

7. A hard real time system is having a predictable performance with no dead line miss even in case of
[ ]
a) sporadic tasks b) aperiodic tasks c) non primitive tasks d) periodic tasks

8. The 8051 has ________ 16-bit counter/timers. [ ]


a) 1 b) 2 c) 3 d) 4

9. The 8051 can handle ________ interrupt sources [ ]


a) 3 b) 4 c) 5 d) 6

10. MOV A, @ R1 will: [ ]


a) copy R1 to the accumulator
b) copy the accumulator to R1
c) copy the contents of memory whose address is in R1 to the accumulator
d) copy the accumulator to the contents of memory whose address is in R1

Cont..2
Code No: 117CY :2: Set No. 2

II Fill in the Blanks

11. To interface external EPROM memory for applications, it is necessary to _________________ the
address/data lines of the 8051.

12. The problem of priority inversion can be solved by __________.

13. A task can get the messages and send the messages using the ______________ calls only.

14. The RTOS initiates idle to ready transition by executing a function __________________.

15. For real time operating systems, interrupt latency should be _________________.

16. A task which does not have defined period of event occurrence is called _____________________.

17. A synchronization object that can have two states 'not taken' and 'taken' is called a _____________ .

18. The 8-bit address bus allows access to an address range of _____________.

19. The number of data registers is __________________.

20. The I/O port that does not have a dual-purpose role is ___________________.

-oOo-
Code No: 117CY Set No. 3
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
IV B.Tech. I Sem., I Mid-Term Examinations, September- 2017
EMBEDDED SYSTEMS
Objective Exam
Name: ______________________________ Hall Ticket No. A
Answer All Questions. All Questions Carry Equal Marks. Time: 20 Min. Marks: 10.

I. Choose the correct alternative:

1. For real time operating systems, interrupt latency should be [ ]


a) minimum b) maximum c) zero d) dependent on the scheduling

2. Time required to synchronous switch from the context of one thread to the context of another thread is
called [ ]
a) threads fly-back time b) jitter c) context switch time d) none

3. Semaphore is a/an _______ to solve the critical section problem [ ]


a) integer variable b) hardware for a system c) special program for a system d) none

4. The preemption period for the hard real time task in worst case should be [ ]
a) greater than a few sec b) less than a few sec
c) greater than a few m sec d) less than a few m sec

5. A hard real time system is having a predictable performance with no dead line miss even in case of
[ ]
a) sporadic tasks b) aperiodic tasks c) non primitive tasks d) periodic tasks

6. The 8051 has ________ 16-bit counter/timers. [ ]


a) 1 b) 2 c) 3 d) 4

7. The 8051 can handle ________ interrupt sources [ ]


a) 3 b) 4 c) 5 d) 6

8. MOV A, @ R1 will: [ ]
a) copy R1 to the accumulator
b) copy the accumulator to R1
c) copy the contents of memory whose address is in R1 to the accumulator
d) copy the accumulator to the contents of memory whose address is in R1

9. When the 8051 is reset and the line is HIGH, the program counter points to the first program
instruction in the: [ ]
a) internal code memory b) External code memory
c) internal data memory d) External data memory

10. In real time operating system [ ]


a) All processes have the same priority b) a task must be serviced by its deadline period
c) Process scheduling can be done only once d) kernel is not required

Cont..2
Code No: 117CY :2: Set No. 3

II Fill in the Blanks

11. A task can get the messages and send the messages using the ______________ calls only.

12. The RTOS initiates idle to ready transition by executing a function __________________.

13. For real time operating systems, interrupt latency should be _________________.

14. A task which does not have defined period of event occurrence is called _____________________.

15. A synchronization object that can have two states 'not taken' and 'taken' is called a _____________ .

16. The 8-bit address bus allows access to an address range of _____________.

17. The number of data registers is __________________.

18. The I/O port that does not have a dual-purpose role is ___________________.

19. To interface external EPROM memory for applications, it is necessary to _________________ the
address/data lines of the 8051.

20. The problem of priority inversion can be solved by __________.

-oOo-
Code No: 117CY Set No. 4
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD
IV B.Tech. I Sem., I Mid-Term Examinations, September- 2017
EMBEDDED SYSTEMS
Objective Exam
Name: ______________________________ Hall Ticket No. A
Answer All Questions. All Questions Carry Equal Marks. Time: 20 Min. Marks: 10.

I. Choose the correct alternative:

1. Semaphore is a/an _______ to solve the critical section problem [ ]


a) integer variable b) hardware for a system c) special program for a system d) none

2. The preemption period for the hard real time task in worst case should be [ ]
a) greater than a few sec b) less than a few sec
c) greater than a few m sec d) less than a few m sec

3. A hard real time system is having a predictable performance with no dead line miss even in case of
[ ]
a) sporadic tasks b) aperiodic tasks c) non primitive tasks d) periodic tasks

4. The 8051 has ________ 16-bit counter/timers. [ ]


a) 1 b) 2 c) 3 d) 4

5. The 8051 can handle ________ interrupt sources [ ]


a) 3 b) 4 c) 5 d) 6

6. MOV A, @ R1 will: [ ]
a) copy R1 to the accumulator
b) copy the accumulator to R1
c) copy the contents of memory whose address is in R1 to the accumulator
d) copy the accumulator to the contents of memory whose address is in R1

7. When the 8051 is reset and the line is HIGH, the program counter points to the first program
instruction in the: [ ]
a) internal code memory b) External code memory
c) internal data memory d) External data memory

8. In real time operating system [ ]


a) All processes have the same priority b) a task must be serviced by its deadline period
c) Process scheduling can be done only once d) kernel is not required

9. For real time operating systems, interrupt latency should be [ ]


a) minimum b) maximum c) zero d) dependent on the scheduling

10. Time required to synchronous switch from the context of one thread to the context of another thread is
called [ ]
a) threads fly-back time b) jitter c) context switch time d) none

Cont..2
Code No: 117CY :2: Set No. 4

II Fill in the Blanks

11. For real time operating systems, interrupt latency should be _________________.

12. A task which does not have defined period of event occurrence is called _____________________.

13. A synchronization object that can have two states 'not taken' and 'taken' is called a _____________ .

14. The 8-bit address bus allows access to an address range of _____________.

15. The number of data registers is __________________.

16. The I/O port that does not have a dual-purpose role is ___________________.

17. To interface external EPROM memory for applications, it is necessary to _________________ the
address/data lines of the 8051.

18. The problem of priority inversion can be solved by __________.

19. A task can get the messages and send the messages using the ______________ calls only.

20. The RTOS initiates idle to ready transition by executing a function __________________.

-oOo-