Energy Efficiency in Plug-in Hybrid Electric Vehicle
Chargers: Evaluation and Comparison of Front End
AC-DC Topologies
Fariborz Musavi, Murray Edington
Department of Research, Engineering
Delta-Q Technologies Corp.
Burnaby, BC, Canada
fmusavi@delta-q.com, medington@delta-q.com
AbstractAs a key component of a plug-in hybrid electric
vehicle (PHEV) charger system, the front-end ac-dc converter
must achieve high efficiency and power density. This paper
presents a topology survey evaluating topologies for use in
front end ac-dc converters for PHEV battery chargers. The
topology survey is focused on several boost power factor
corrected converters, which offer high efficiency, high power
factor, high density and low cost. Experimental results are
presented and interpreted for five prototype converters,
converting universal ac input voltage to 400 V dc. The results
demonstrate that the phase shifted semi-bridgeless PFC boost
converter is ideally suited for automotive level I residential
charging applications in North America, where the typical
supply is limited to 120 V and 1.44 kVA. For automotive level
II residential charging applications in North America and
Europe the bridgeless interleaved PFC boost converter is an
ideal topology candidate for typical supplies of 120 V and 240
V, with power levels of 3.3 kW, 5 kW and 6.6 kW.
I. INTRODUCTION
A plug-in hybrid electric vehicle (PHEV) is a hybrid
vehicle with a battery electric storage system that can be
recharged by connecting a plug to an external electric power
source. The vehicle charging ac inlet requires an on-board
ac-dc charger with power factor correction [1]. An on-board
3.4 kW charger can charge a depleted battery pack in PHEVs
to 95 % charge in about four hours from a 240 V supply [2].
A variety of power architectures, circuit topologies and
control methods have been developed for PHEV battery
chargers. However, due to large low frequency ripple in the
output current, the single-stage ac-dc power conversion
architecture is only suitable for lead acid batteries.
Conversely, two-stage ac-dc/dc-dc power conversion
provides inherent low frequency ripple rejection. Therefore,
the two-stage approach is preferred for PHEV battery
chargers, where the power rating is relatively high, and
lithium-ion batteries, requiring low voltage ripple, are used
This work has been sponsored and supported by Delta-Q Technologies
Corporation.
1
Wilson Eberle, 2 William G. Dunford
Department of Electrical and Computer Engineering
University of British Columbia | 1 Okanagan | 2 Vancouver
1
Kelowna, BC, Canada | 2 Vancouver, BC, Canada
1
wilson.eberle@ubc.ca | 2 wgd@ece.ubc.ca
as the main energy storage system [3]. A simplified block
diagram of a universal input two-stage battery charger used
for PHEVs is illustrated in Figure 1.
Figure 1. Simplified block diagram of a universal battery charger.
The ac/dc plus PFC stage rectifies the input ac voltage
and transfers it into a regulated intermediate dc link bus. At
the same time, power factor correction is achieved [4]. The
isolated dc-dc stage that follows then converts the dc bus
voltage to a regulated output dc voltage for charging
batteries. Boost circuit-based PFC topologies operated in
continuous conduction mode (CCM) and boundary
conduction mode (BCM) are surveyed in this paper,
targeting front end single-phase ac-dc power factor corrected
converters in PHEV battery chargers.
In the six sections that follow, five different boost based
PFC topologies are discussed and experimental results are
presented for each. The topologies in each section include:
II. Conventional Boost Converter, III. Interleaved Boost
Converter, IV. Phase Shifted Semi-Bridgeless Boost
Converter, V. Bridgeless Interleaved Boost Converter, and
VI. Bridgeless Interleaved Resonant Boost Converter. A
topology comparison is presented in section VII and the
conclusions are presented in section VIII.
II. CONVENTIONAL BOOST CONVERTER
The conventional boost topology is the most popular
topology for PFC applications. It uses a dedicated diode
bridge to rectify the ac input voltage to dc, which is then
followed by the boost section, as shown in Figure 2.
Figure 2. Conventional PFC boost converter.
In this topology, the output capacitor ripple current is
very high [5] and is the difference between diode current and
the dc output current. Furthermore, as the power level
increases, the diode bridge losses significantly degrade the
efficiency, so dealing with the heat dissipation in a limited
area becomes problematic. The inductor volume also
becomes a problematic design issue at high power. Another
challenge is the power rating limitation for current sense
resistors at high power. Due to these constraints, this
topology is good for the low to medium power range, up to
approximately 1 kW. For power levels >1 kW, typically,
designers parallel discrete semiconductors, or use expensive
MOSFET + SiC Diode semiconductor modules in order to
deliver greater output power. An example of a module
commonly used in industry is the APT50N60JCCU2 from
Microsemi Corporation.
A. Experimental Results of Conventional Boost Converter
An experimental prototype was built to verify the
operation of the conventional boost PFC converter. The
components used to build the prototype are listed in Table I.
Figure 3 shows the input voltage, input current and PFC bus
voltage of the converter under the following test conditions:
Vin = 240 V, Iin = 7.5 A, Po = 1.7 kW, Vo = 400 V, fsw =
semiconductors are paralleled, or expensive modules are
used. This reduces the power loss in the MOSFETs, but at
low line, the input current increases and consequently the
input bridge losses increase. As a result, the inductor current
also increases.
This requires a design compromise between the core,
inductor size and inductance value. A lower inductance value
for a boost inductor increases the input current ripple and
consequently increases the input EMI filter size. It also
increases the output capacitor high frequency ripple, thereby
reducing the output capacitor lifetime. Therefore, it can be
concluded that a conventional boost converter is not the
preferred topology for PHEV battery charging applications.
Input Voltage Output Voltage
Vin Vo
Input Current
Iin
Figure 3. Input current, input voltage and output voltage of a conventional
boost converter at Vin = 240 V. Y-axis scales: Iin 10 A/div, Vin 100 V/div
and Vo 100 V/div.
99
98
97
Efficiency (%)

70 kHz. 96
95
TABLE I. CONVENTIONAL BOOST CONVERTER PROTOTYPE Vin = 90 V
COMPONENTS 94 Vin = 120 V
Vin = 220 V
Components Used in Prototype Unit 93
Topology Vin = 240 V
Device Part # / Value # of Devices 92 Vin = 265 V

Regular Diode 25ETS08S 4

Conventional

91
PFC Boost
Converter

Fast Diode IDB06S60C 1

0

500

1000

1500

2000

MOSFET IPB60R099CP 1 Output Power (W)

Inductors 400 H 1 Figure 4. Efficiency versus output power at different input voltages for a
conventional boost converter.

III. INTERLEAVED BOOST CNVERTER

B. Performance Evaluation of the Conventional Boost
Converter The interleaved boost converter, illustrated in Figure 5,
consists of two boost converters in parallel operating 180
Figure 4 shows the efficiency of a conventional boost
out of phase [6-8]. The input current is the sum of the two
converter at input voltages ranging from 90 V to 265 V. As it
input inductor currents. Because the inductors ripple
can be noted from this graph, the efficiency drops
currents are out of phase, they tend to cancel each other and
significantly at low input line as the power increases. To
reduce the input ripple current caused by the boost switching
solve this problem for power levels >1 kW, discrete
action. The interleaved boost converter has the advantage of
paralleled semiconductors. Furthermore, by switching 180
out of phase, it doubles the effective switching frequency and
introduces smaller input current ripple, so the input EMI
filter is relatively small [9-11]. With ripple cancellation at
the output, it also reduces stress on output capacitors.
However, similar to the boost, this topology has the heat
management problem for the input diode bridge rectifiers;
therefore, it is limited to power levels up to approximately
3.5 kW.
B. Performance Evaluation of the Interleaved Boost
Converter
Figure 7 shows the efficiency of an interleaved boost
converter at input voltages ranging from 90 V to 240 V. As it
can be noted from these graphs, the output power level has
increased. Hence, the efficiency profiles for each curve
resemble those from the conventional boost converter.
Despite the stated advantages of interleaving, the total power
losses are the same compared to a conventional boost
converter.

98

97

96

Efficiency (%)
95
Figure 5. Interleaved PFC boost converter. 94

A. Experimental Results of Interleaved Boost Converter 93 Vin = 90 V

Vin = 120 V
An experimental prototype was built to verify the 92 Vin = 220 V
operation of the interleaved boost PFC converter. The Vin = 240 V
components used to build the prototype are listed in Table II. 91
Figure 6 shows the input voltage, input current and PFC bus 90
voltage of the converter under the following test conditions:
0

500

1000

1500

2000

2500

3000

3500
Vin = 240 V, Iin = 15 A, Po = 3.4 kW, Vo = 400 V, fsw = 70
Output Power (W)
kHz.
Figure 7. Efficiency versus output power at different input voltages for an
TABLE II. INTERLEAVED BOOST CONVERTER PROTOTYPE COMPONENTS interleaved boost converter.

Components Used in Prototype Unit IV. PHASE SHIFTED SEMI-BRIDGELESS BOOST

Topology
Device Part # / Value # of Devices CONVERTER
Regular Diode 25ETS08S 4 The bridgeless boost PFC topology avoids the need for
Boost Converter
Interleaved PFC

IDB06S60C 2 the rectifier input bridge yet maintains the classic boost
Fast Diode
topology [12-19], as shown in Figure 8.
MOSFET IPB60R099CP 2

Inductors 400 H 2

Input Voltage Output Voltage

Vin Vo

Figure 8. Bridgeless PFC boost converter.

It is an attractive solution for applications >1 kW, where

Input Current
power density and efficiency are important. This converter
Iin solves the problem of heat management in the input rectifier
diode bridge inherent to the conventional boost PFC, but it
introduces increased EMI [20, 21]. Another disadvantage of
Figure 6. Input current, input voltage and output voltage of an interleaved this topology is the floating input line with respect to the
boost converter at Vin = 240 V. Y-axis scales: Iin 10 A/div, Vin 100 V/div PFC ground, making it impossible to sense the input voltage
and Vo 100 V/div. without a low frequency transformer or an optical coupler.
Also, in order to sense the input current, complex circuitry is
needed to sense the current in the MOSFET and diode paths
separately, since the current path does not share the same
ground during each half-line cycle [14, 22]. In order to
address these issues, a phase shifted semi-bridgeless boost
converter, shown in Figure 9 was introduced in [23].
However, this topology does not achieve high full load
efficiency since there is high power stress in the main
MOSFETs due to high intrinsic body diode losses.
B. Performance Evaluation of the Semi-bridgeless Boost
Converter
Figure 11 shows the efficiency of phase shifted semi-
bridgeless boost converter at input voltages ranging from 90
V to 240 V. As it can be noted from this graph, the efficiency
is significantly improved at light load.
99

98

97

Efficiency (%)
96

95 Vin = 90 V
Vin = 120 V
94
Vin = 220 V
93 Vin = 240 V

Figure 9. Phase shifted semi-bridgeless PFC boost converter.

92

500

1000

1500

2000

2500

3000

A. Experimental Results of the Phase Shifted Semi-
bridgeless Boost Converter
An experimental prototype was built to verify the
operation of the phase shifted semi-bridgeless boost PFC
converter. The components used to build the prototype are
listed in Table III. Figure 10 shows the input voltage, input
current and PFC bus voltage of the converter under the
following test conditions: Vin = 240 V, Iin = 15 A, Po = 3.4
kW, Vo = 400 V, fsw = 70 kHz.
TABLE III. COMPONENT USED IN THE SEMI-BRIDGELESS BOOST
CONVERTER PROTOTYPE
Components Used in Prototype Unit
Topology
Device Part # / Value
Regular Diode 25ETS08S
Semi-bridgeless
3500
Output Power (W)
Figure 11. Efficiency versus output power at different input voltages for a
phase shifted semi-bridgeless boost converter.
These results show that the phase shifted semi-bridgeless
PFC boost converter is ideally suited for automotive level I
residential charging applications in North America where the
typical supply is limited to 120 V and 1.44 kVA. As an
example, for 120 V input voltage and 1700 W load the
efficiency is 95 %, which is the same efficiency achieved
with an interleaved boost converter operating with the same
conditions. But at lighter loads, the semi-bridgeless converter
achieves much higher efficiency. This is critical for
# of Devices converters used in applications such as battery chargers. In
2 battery chargers, the converter is fully loaded for only one

third of the total charging time (i.e. during the bulk charging
Phase Shifted

PFC Boost
Converter

Fast Diode IDB06S60C 2 stage). However, during the absorption and float stages,
MOSFET IPB60R099CP 2 which are two thirds of the total charging time, the charger is
only partially loaded, so light load efficiency is an important
Inductors 400 H 2 consideration.
V. BRIDGELESS INTERLEAVED BOOST CONVERTER
Input Voltage Output Voltage The bridgeless interleaved topology, shown in Figure 12,
Vin Vo was proposed as a solution to operate at power levels at and
above 3.5 kW. In comparison to the interleaved boost PFC, it
introduces two MOSFETs and also replaces four slow diodes
with two fast diodes. The gating signals are 180 out of
phase, similar to the interleaved boost. A detailed converter
description and steady state operation analysis are given in
[24, 25]. This converter topology shows a high input power
factor, high efficiency over the entire load range and low
Input Current input current harmonics.
Iin
Since the proposed topology shows high input power
factor, high efficiency over the entire load range, and low
Figure 10. Input current, input voltage and output voltage of a phase shifted input current harmonics, it is a potential option for single
semi-bridgeless boost converter at Vin = 240 V. Y-axis scales: Iin 10 A/div, phase PFC in high power level II battery charging
Vin 100 V/div and Vo 100 V/div. applications.
 example, at 240V input, the maximum output power
L1 D1 D2 D3 D4 increases from 3.4kW for the phase shifted semi-bridgeless
L3 converter up to 4.2kW for the bridgeless interleaved boost
Vin L converter. These results demonstrate that the bridgeless
L2
Co O
A interleaved boost converter is ideally suited for automotive
L4 D
level II residential charging applications in North America
and Europe where the typical supply is limited to input
voltages of 120/240/250 V, and power levels up to
Q1 Q2 Q3 Q4 approximately 8kVA - depending on the input supply
breaker limitation.
Figure 12. Bridgeless interleaved PFC boost converter.
99
A. Experimental Results Bridgeless Interleaved Boost
Converter
An experimental prototype was built to verify the 98
operation of the bridgeless interleaved boost PFC converter.

Efficiency (%)
The components used to build the prototype are listed in 97
Table IV. Figure 13 shows the input voltage, input current
and PFC bus voltage of the converter under the following
test conditions: Vin = 240 V, Iin = 15 A, Po = 3.4 kW, Vo = 96
Vin = 90 V
400 V, fsw = 70 kHz. Vin = 120 V
95 Vin = 220 V
TABLE IV. BRIDGELESS INTERLEAVED BOOST CONVERTER PROTOTYPE Vin = 240 V
COMPONENTS
94
Components Used in Prototype Unit
Topology 0

500

1000

1500

2000

2500

3000

3500

4000

4500
Device Part # / Value # of Devices
IDB06S60C 4 Output Power (W)
Fast Diode
Interleaved
Bridgeless

converter

Figure 14. Efficiency versus output power at different input voltages for a
4
PFC

MOSFET IPB60R099CP
bridgeless interleaved boost converter.
Inductors 400 H 4
VI. BRIDGELESS INTERLEAVED RESONANT BOOST
CONVERTER
The bridgeless interleaved resonant topology operating in
Input Voltage BCM was first introduced by Infineon Technologies [26] and
Vin proposed for front end ac-dc stage of level II on-board
Output Voltage
Vo chargers. The topology is illustrated in Figure 15. Compared
to the bridgeless interleaved boost converter, it replaces the
four fast diodes with four slow diodes; however it requires
two high side drivers for MOSFETs Q1 and Q2 as well as
two low side drivers for Q3 and Q4. The other drawbacks
with this topology include the need for at least two sets of
current sensors, two snubbers and a complex digital control
Input Current scheme.
Iin

D1 D4
Figure 13. Input current, input voltage and output voltage of a bridgeless
interleaved boost converter at Vin = 240 V. Y-axis scales: Iin 10 A/div, Vin LB1
Q1 Q2 L
100 V/div and Vo 100 V/div. LB2
O
Vin Co A
D

B. Performance Evaluation of the Bridgeless Interleaved

Boost Converter
D2 D3
Figure 14 shows the efficiency of the bridgeless Q3 Q4
interleaved boost converter at input voltages ranging from 90
Figure 15. Bridgeless interleaved resonant PFC boost converter.
V to 240 V. In general, this converter achieves higher
efficiency than both the phase shifted semi-bridgeless
converter and interleaved boost at the same power levels. In
addition, due to the improved efficiency, greater output
power can be achieved for a given input current. For
A. Experimental Results and Performance Evaluation of
60 Conventional Boost
Bridgeless Interleaved Resonant Boost Converter

48.7

48.7
The operation of this converter and efficiency was 50
Phase Shifted Semi-Bridgeless Boost
reported in [26]. The components used for the prototype are

39.6
Interleaved Boost

35.7
listed in Table V. Figure 16 shows the reported efficiency

Power Losses (W)

40 Bridgeless Interleaved Boost
(reproduced) of the converter under the following test

27.6
27.6
conditions: Vin = 230 V, Iin = 16 A, Po = 3.6 kW, Vo = 400 30
V. This converter achieves a peak efficiency of 97.9% at

19.1
16.6
2.7kW load, but the efficiency degrades rapidly beyond

12.9
12.9
12.7
20

11.3
2.7kW of output power, so based on the reported data, it is

8.3
8.3

7.8
7.8
not an ideal candidate for automotive level II charging. 10

0.0
0.0

0.0
0.0
TABLE V. BRIDGELESS INTERLEAVED RESONANT BOOST CONVERTER 0
PROTOTYPE COMPONENTS

Regular

Fast Diodes

Intrinsic Body
FETs

Total Losses
Diodes
Components Used in Prototype Unit

Diodes
Topology
Device Part # / Value # of Devices
Fast Diode - 4 Devices / Total Losses
Interleaved
Bridgeless

converter
Resonant

4
PFC

MOSFET IPW60R045CP Figure 17. Loss distribution in semiconductors at Vin = 240 V, Vo = 400 V,
Po = 3.4 kW and fsw = 70 kHz.
Inductors - 2
included in the MOSFET losses. The inductor losses were
98 neglected in the comparison.
The regular diodes in input bridge rectifiers have the
largest share of losses among the topologies with the input
97.5
bridge rectifier. The bridgeless topologies eliminate this
Efficiency (%)

large loss component (~27.6 W). However, the tradeoff is

97
that the MOSFET losses are higher and the intrinsic body
diodes of MOSFETs conduct, producing new losses (~7.8
W). The fast diodes in the bridgeless interleaved PFC have
96.5 slightly lower power losses, since the boost diode average
Vin = 230 V current is lower in these topologies. Overall the MOSFETs
have increased current stress in the bridgeless topologies, but
96 the total semiconductor losses for the bridgeless interleaved
boost are 37% lower than the benchmark conventional boost
1000

1500

2000

2500

3000

3500

and 37% lower than the interleaved boost.

Output Power (W)
Figure 16. Efficiency versus output power at 230 V input voltages for a
bridgeless interleaved resonant boost converter by Infineon Technologies
AG [26].
VII. TOPOLOGY COMPARISON
Prototypes of the converter presented in sections II-V
were built to provide data for a qualitative and quantitative
performance comparison. Loss analysis modeling was also
performed to gain insight into the noted qualitative
advantages/disadvantages of each prototype in comparison to
the measured efficiency. Figure 17 shows the modeled loss
distribution within the semiconductors for these topologies at
Vin = 240 V, Po = 3400 W, Vo = 400 V and fsw = 70 kHz.
The regular diode losses consist of only conduction losses in
bridge rectifier diodes, i.e. reverse recovery losses were
neglected due to the low frequency mains input. Due to the
low reverse recovery characteristics of SiC, these diodes
were selected for the boost diodes. Therefore reverse
recovery losses were neglected for these diodes, so that only
conduction losses were considered. Switching loss,
conduction loss, gate charge loss and CV2 loss are
Since the bridge rectifier losses are so large, it was
expected that bridgeless interleaved boost converter would
have the lowest power losses among the topologies studied
in section II-V. Also, it was noted that the losses in the input
bridge rectifiers were 56% of total losses in the conventional
PFC converter and in the interleaved PFC converter.
Therefore eliminating the input bridges in PFC converters is
justified despite the fact that new losses are introduced.
Figure 18 illustrates the measured efficiency as a
function of output power for all five topologies studied under
the following operating conditions: fsw = 70 kHz, Vin = 240
V and Vo = 400 V. All semiconductor and magnetic devices
used in prototype units were the same. Limited information
was available for Infineon bridgeless interleaved resonant
converter. Notably it was measured at 230 V input voltage.
Table VI demonstrates an overall overview and
comparison of all candidate topologies discussed for the
front end ac-dc stage of a PHEV battery charger. The phase
shifted semi-bridgeless PFC converter was the topology of
choice for level I chargers and the bridgeless interleaved
PFC converter is an optimal topology for level II chargers.
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