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5 4 3 2 1

THERMAL YONAH CLK GEN


SENSEER uFCPGA 478PIN
PAGE 2
PAGE 5 PAGE 3,4

D AGTL+ D

FSB_533/667MHz
4X Data VCC3M/VCC5M
2X Address (MAX1901)
PAGE 41
LVDS
LCD PAGE 15
SO-DIMM DRAM
Dual Channel DDR2 CALISTOGA
DIMMS*2 533/667MHz 945GM
2R5M/1R2AUX
(MAX8563)
PAGE 10 VGA
PAGE 6,7,8,9 CRT PAGE 16 PAGE 42

DMI VCC1R5M/VCC1R05B
(MAX1540)
PAGE 43

CARD BUS CARD BUS PCI BUS IDE Ultra 133/100/66 ODD
C SLOT PCI1520 PAGE 17 C
PAGE 26 PAGE 25
VCC1R8A/VCC0R9B
(MAX8632)
PAGE 44
ICH7-M SATA
PCIE-LAN HDD
RJ45 CON BCM5751 PAGE 27
PAGE 24 PAGE 22,23
VCCCPUCORE
(ADP3207)
HEAD PHONE PAGE 45,46,47
AD1981
AZALIA
MINI PCIE PCIE-LAN AMP(MAX9750) MIC JACK
CON
PAGE 19,20 PAGE21 CHARGER(MAX8765)
PAGE 18

PAGE 11,12,13 PAGE 38,39,40


MDC PAGE 25
BIOS SPI USB 2.0 PAGE 24
RJ11
PAGE 28
POWER SEQUENCE
B B
PAGE 51
USB PORT * 4
PAGE 14

LPC BUS

TCPA
PARALLEL SIO (Option) H8 PMH7
PORT PC87391 FWH PAGE 35
PAGE 31 PAGE 31 PAGE 27 PAGE 29 PAGE 33,34

FLOPPY PS2 KB FAN


PAGE 29 PAGE 31 PAGE 32 PAGE 5
LENOVO.PND
A
NB system design section A
Title
BLOCK DIAGRAM
Size Document Number
CustomWhistler Rev s1.3

Date: Friday, April 28, 2006 Sheet 1 of 52


"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC3B

VCC3B
FB2

1
FB1 1
MMZ1608S121AT
C1 C2 C3 C4 C5 MMZ1608S121AT C7 C8 C9 C10 C11

10uF/10V

10uF/10V

0.01UF/16V
C6

0.047UF/16V

0.047UF/16V

0.1UF/10V

0.1UF/10V

0.1UF/10V

0.1UF/10V

0.1UF/10V
D R1 0.047UF/16V D
C12 C13 C14 C15 C16 C17
2.2 +-5% R2
10uF/10V 10uF/10V 0.047UF/16V 0.047UF/16V 0.1UF/10V 0.1UF/10V C18 2.2 +-5%
C_0805 C_0805 C_0402 C_0402 C_0402 C_0402 0.01UF/16V

C19
0.047UF/16V
C_0402

change 33ohm to 22ohm

43
54
48
60

10
17
29
36

65
CLK_CPU_BCLK R3 49.9 +-1%

REF_VDD
PCI_VDD1
PCI_VDD
48_VDD

SRC_VDD
SRC_VDD1
SRC_VDD2
CPU_VDD

GND
NS
CLK_CPU_BCLK# R5 49.9 +-1%
NS
R4 33 +-5% RN1 CLK_MCH_BCLK R7 49.9 +-1%
12 CLK48_USB BSEL0 R6 2.2K +-5% CPU0 NS
58 USB_48MHz/FS_A CPUCLKT0 39 1 2 CLK_CPU_BCLK 3
38 CPU#0 3 4 CLK_MCH_BCLK# R8 49.9 +-1%
BSEL1 CPUCLKC0 22X2 CLK_CPU_BCLK# 3 NS
63 FS_B/TEST_MODE
BSEL2 57 RN2
FS_C/TEST_SEL
CPUCLKT1 35 1 2 CLK_MCH_BCLK 6
16 34 3 4 CLK_PCIE_ICH R9 49.9 +-1%
12 STP_PCI# PCI_STOP# CPUCLKC1 CLK_MCH_BCLK# 6
40 22X2 RN3 NS
12 STP_CPU# CPU_TOP#
32 1 2 VCC3B CLK_PCIE_ICH# R12 49.9 +-1%
R10 0 +-5% CGCLK_SMB CPU2_ITP/SRC7 CPUCLK_ITP_166M 3 NS
10,27 SMB_CLK_3B 41 SCLK CPU2_ITP#/SRC7# 31 3 4 CPUCLK_ITP_166M# 3
R11 0 +-5% CGDAT_SMB 42
10,27 SMB_DATA_3B SDATA
2 22X2 R13 10K +-5%NS
CKGEN_EN# SRCCLKT0 NS R14 10K +-5%R_0603
45 CKGEN_EN# 56 VTT_PWRGD#/PD SRCCLKC0 3
4 R16 10K +-5% R15 10K +-5%R_0603
C OE0# VCC3B C
R_0603
VCC3B R17 10K +-5%R_0603 R912 1K +-1% R18 10K +-5%R_0603 PCIE_CLK_GBE# R20 49.9 +-1%
R19 33 +-5% PCIF0 53 64 R913 NS
12 PCLK_ICH7 ITP_EN/PCICLK_F0 OE1# CLKREQ_GBE# 22
12 0 +-5% NS PCIE_CLK_GBE R22 49.9 +-1%
OE3# CLKREQ_WLAN# 18 NS
OEA# 7 CLKREQ_MCH# 6
27,31 SIOCLK33M R21 24.9 +-1% 52 15 CLK_PCIE_MCH R23 49.9 +-1%
PCICLK0 OE6# NS
OEB# 24 CLKREQ_SATA# 12 CLK_PCIE_MCH# R26 49.9 +-1%
Package change from 0402 to 0603 R24 24.9 +-1% RN4 NS
35 LPCCLK_GA_33M
R25 24.9 +-1% 51 5 3 4
25 PCICLK_CB_33M PCICLK1 SRCCLKT1 PCIE_CLK_GBE 22
SRCCLKC1 6 1 2 PCIE_CLK_GBE# 22
22X2 CLK_SATA_ICH R29 49.9 +-1%
R28 24.9 +-1% 50 8 3 4 RN5 NS
33 LPCCLK_H8_33M PCICLK2 SRCCLKT2 DREFCLKSS_100M 6
9 1 2 CLK_SATA_ICH# R31 49.9 +-1%
SRCCLKC2 RN6 22X2 DREFCLKSS_100M# 6 NS
R27 24.9 +-1% 49 13 3 4
29 LPCCLK_FWH_33M PCICLK3 SRCCLKT3 CLK_PCIE_WLAN 18
14 1 2 CLK_PCIE_WLAN R32 49.9 +-1%
SRCCLKC3 22X2 RN7 CLK_PCIE_WLAN# 18 NS
RN8 CLK_PCIE_WLAN# R33 49.9 +-1%
SRCCLKT5 18 3 4 CLK_SATA_ICH 11
4 3 61 19 1 2 NS
6 DREFCLK_96M DOTT_96MHZ SRCCLKC5 CLK_SATA_ICH# 11
2 1 62 22X2 CPUCLK_ITP_166M R35 49.9 +-1%
6 DREFCLK_96M# DOTC_96MHZ
21 NS
R34 22 +-5% SRCCLKT6 CPUCLK_ITP_166M# R37 49.9 +-1%
12 CLK14_ICH7 47 REF SRCCLKC6 20
22X2 RN10 DREFCLK_96M R38 49.9
NS +-1%
31 14M_SIO
R36 22 +-5% 22 3 4 NS
Y1 XTAL_IN SRCCLKT8 CLK_PCIE_ICH 12 DREFCLK_96M# R39 49.9 +-1%
45 X1 SRCCLKC8 23 1 2 CLK_PCIE_ICH# 12
44 22X2 NS
1 X2 DREFCLKSS_100M R41 49.9 +-1%
C960 SRCCLKT9 26
R40 2.2K +-5% XTAL_OUT 25 NS
18PF/50V 14.31818MHZ SRCCLKC9 DREFCLKSS_100M# R42 49.9 +-1%
B C_0402 R_0402 IREF 33
SRC_GND1 RN11 NS B
C20 C21 IREF

PCI_GND1
SRC_GND

CPU_GND

REF_GND
27 3 4

PCI_GND
SRCCLKT10 CLK_PCIE_MCH 6

GND_48
18PF/50V 18PF/50V R43 28 1 2
C_0402 0 +-5% SRCCLKC10 22X2 CLK_PCIE_MCH# 6

C_0402
FOR EMC
11
30

37

46

55
CY28446LFXC 59

VCC1R05B

VCC1R05B
R44
1K +-1%
NS VCC1R05B
R52
R45 R_0402 0 +-5% BSEL2 1K +-1%
3 CPU_BSEL2
NS
R48
1K +-1%
R47 1K +-1% R46 NS R53 R_0402 0 +-5% BSEL0
3 CPU_BSEL0
6 MCH_BSEL2 2.2K +-5% R49 R_0402 0 +-5% BSEL1
R_0402 3 CPU_BSEL1
R55 1K +-1% R54
NS LENOVO.PND
6 MCH_BSEL0 2.2K +-5%
R_0402
NB system design section
A R51 1K +-1% R50 A
NS Title
FSC FSB FSA Host Clock 6 MCH_BSEL1 2.2K +-5%
frequency R_0402
CLOCK
BSEL2 BSEL1 BSEL0
NS Size Document Number
Custom Rev s1.3
Whistler
0 0 1 533 Date: Friday, April 28, 2006 Sheet 2 of 52
"PROPERTY NOTE: this document contains information confidential and property to
0 1 1 667 LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

6 H_A#[31:3]
U2A
H_A#3 J4 H1
A[3]# ADS# H_ADS# 6
H_A#4 L4 E2
A[4]# BNR# H_BNR# 6 6 H_D#[63:0] H_D#[63:0] 6
H_A#5 M3 G5 U2B
A[5]# BPRI# H_BPRI# 6
H_A#6 K5 H_D#0 E22 AA23 H_D#32
A[6]# D[0]# D[32]#

0
ADDR GROUP
H_A#7 M1 H5 H_D#1 F24 AB24 H_D#33
A[7]# DEFER# H_DEFER# 6 D[1]# D[33]#
H_A#8 N2 F21 H_D#2 E26 V24 H_D#34
A[8]# DRDY# H_DRDY# 6 D[2]# D[34]#
H_A#9 J1 E1 H_D#3 H22 V26 H_D#35
A[9]# DBSY# H_DBSY# 6 D[3]# D[35]#
H_A#10 N3 H_D#4 F23 W25 H_D#36
A[10]# D[4]# D[36]#

DATA GRP 0
H_A#11 H_D#5 H_D#37

DATA GRP 2
P5 A[11]# BR0# F1 H_BREQ#0 6 G25 D[5]# D[37]# U23
H_A#12 P2 H_D#6 E25 U25 H_D#38
H_A#13 A[12]# H_IERR# R56 56 +-5% H_D#7 D[6]# D[38]# H_D#39

CONTROL
L1 A[13]# IERR# D20 VCC1R05B E23 D[7]# D[39]# U22
H_A#14 P4 B3 H_D#8 K24 AB25 H_D#40
D A[14]# INIT# H_INIT# 11 D[8]# D[40]# D
H_A#15 P1 H_D#9 G24 W22 H_D#41
H_A#16 A[15]# H_D#10 D[9]# D[41]# H_D#42
R1 A[16]# LOCK# H4 H_LOCK# 6 J24 D[10]# D[42]# Y23
L2 H_D#11 J23 AA26 H_D#43
6 H_ADSTB#0 ADSTB[0]# H_CPURST# 6 D[11]# D[43]#
B1 H_CPURST# H_D#12 H26 Y26 H_D#44
6 H_REQ#[4:0] RESET# H_RS#[2:0] 6 D[12]# D[44]#
H_REQ#0 K3 F3 H_RS#0 H_D#13 F26 Y22 H_D#45
H_REQ#1 REQ[0]# RS[0]# H_RS#1 H_D#14 D[13]# D[45]# H_D#46
H2 REQ[1]# RS[1]# F4 K22 D[14]# D[46]# AC26
H_REQ#2 K2 G3 H_RS#2 H_D#15 H25 AA24 H_D#47
H_REQ#3 REQ[2]# RS[2]# VCC1R05B D[15]# D[47]#
J3 REQ[3]# TRDY# G2 H_TRDY# 6 6 H_DSTBN#0 H23 DSTBN[0]# DSTBN[2]# W24 H_DSTBN#2 6
H_REQ#4 L5 G22 Y25
REQ[4]# 6 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 6
6 H_A#[31:3] HIT# G6 H_HIT# 6 6 H_DINV#0 J26 DINV[0]# DINV[2]# V23 H_DINV#2 6
H_A#17 Y2 E4
A[17]# HITM# H_HITM# 6 R68 6 H_D#[63:0] H_D#[63:0] 6
H_A#18 U5 A[18]# ITP_BPM#[3:0]
H_A#19 R3 AD4 ITP_BPM#0 TDI H_D#16 N22 AC22 H_D#48
A[19]# BPM[0]# D[16]# D[48]#
1
ADDR GROUP

H_A#20 W6 AD3 ITP_BPM#1 H_D#17 K25 AC23 H_D#49


H_A#21 A[20]# BPM[1]# ITP_BPM#2 H_D#18 D[17]# D[49]# H_D#50
U4 A[21]# BPM[2]# AD1 P26 D[18]# D[50]# AB22
H_A#22 Y5 AC4 ITP_BPM#3 150 +-1% H_D#19 R23 AA21 H_D#51
H_A#23 A[22]# BPM[3]# PRDY# H_D#20 D[19]# D[51]# H_D#52
XDP/ITP SIGNALS

U2 A[23]# PRDY# AC2 ITP_PRDY# L25 D[20]# D[52]# AB21


H_A#24 R4 AC1 PREQ# R_0402 H_D#21 L22 AC25 H_D#53

DATA GRP 1
H_A#25 A[24]# PREQ# TCK ITP_PREQ# H_D#22 D[21]# D[53]# H_D#54

DATA GRP 3
T5 A[25]# TCK AC5 ITP_TCK L23 D[22]# D[54]# AD20
H_A#26 T3 AA6 TDI H_D#23 M23 AE22 H_D#55
H_A#27 A[26]# TDI TDO ITP_TDI H_D#24 D[23]# D[55]# H_D#56
W3 A[27]# TDO AB3 ITP_TDO P25 D[24]# D[56]# AF23
H_A#28 W5 AB5 TMS H_D#25 P22 AD24 H_D#57
H_A#29 A[28]# TMS TRST# ITP_TMS VCC1R05B H_D#26 D[25]# D[57]# H_D#58 Layout note:
Y4 A[29]# TRST# AB6 ITP_TRST# R73 P23 D[26]# D[58]# AE21
H_A#30 W2 C20 0 +-5% NS H_D#27 T24 AD21 H_D#59 Comp0,2 connect with Zo=27.4ohm, make
H_A#31 A[30]# DBR# ITP_DBR# 12,13 H_D#28 D[27]# D[59]# H_D#60
Y1 A[31]# R24 D[28]# D[60]# AE25 trace length shorter than 0.5".
V4 D21 PROCHOT# R57 68 +-1% H_D#29 L26 AF25 H_D#61
6 H_ADSTB#1 ADSTB[1]# PROCHOT# VCC1R05B D[29]# D[61]# Comp1,3 connect with Zo=55ohm, make
A24 THERMDA_CPU H_D#30 T25 AF22 H_D#62
THERM

THERMDA PROCHOT# 45 D[30]# D[62]# trace length shorter than 0.5".


11 H_A20M# A6 A20M# THERMDC A25 THERMDC_CPU R58 H_D#31 N24 D[31]# D[63]# AF26 H_D#63
A5 1K +-1% M24 AD23
11 H_FERR# FERR# 6 H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 6
11 H_IGNNE# C4 C7 R_0603 6 H_DSTBP#1 N25 AE24 H_DSTBP#3 6
C IGNNE# THERMTRIP# PM_THRMTRIP# 6,11 DSTBP[1]# DSTBP[3]# C
6 H_DINV#1 M26 DINV[1]# DINV[3]# AC20 H_DINV#3 6
D5 VCC1R05B
11 H_STPCLK# STPCLK#
C6 GTLREF0 AD26 R26 COMP0 R59 R_0603 27.4 +-1%
11 H_INTR LINT0 GTLREF COMP[0]
H CLK

B4 A22 Layout Note:Z0=55ohm,0.5" MISC U26 COMP1 R60 R_0402 54.9 +-1%
11 H_NMI LINT1 BCLK[0] CLK_CPU_BCLK 2 COMP[1]
A3 A21 U1 COMP2 R61 R_0603 27.4 +-1%
11 H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# 2 max for GTLREF COMP[2]
NS R62 1K +-5% C26 V1 COMP3 R63 R_0402 54.9 +-1% R64
R65 TEST1 COMP[3] 200 +-5%
AA1 RSVD[01]
AA4 T22 2K +-1% R66 51 +-5% D25 E5 NS R_0402 R513 near CPU
RSVD[02] RSVD[12] TP59 TEST2 DPRSTP# H_DPRSLP# 11,45
AB2 A2 R_0402 B5 H_DPSLP# 11 wthin 3 inch
RSVD[03] NC DPSLP#
AA3 RSVD[04] DPWR# D24 H_DPWR# 6
1

M4 RSVD[05] RSVD[13] D2 2 CPU_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGD 11


RESERVED

N5 RSVD[06] RSVD[14] F6 2 CPU_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 6


1

T2 RSVD[07] RSVD[15] D3 2 CPU_BSEL2 C21 BSEL[2] PSI# AE6 PSI# 45


V3 RSVD[08] RSVD[16] C1
B2 AF1 CPU SOCKET
RSVD[09] RSVD[17]
C3 RSVD[10] RSVD[18] D22
RSVD[19] C23
B25 RSVD[11] RSVD[20] C24
THERMDA_CPU
THERMDA_CPU 5
CPU SOCKET THERMDC_CPU
THERMDC_CPU 5
VCC1R05B
C22

54.9 +-1%R335

54.9 +-1%R336
100PF/50V
R337

B 39 +-5% B
CON26

ITP_TDI 1 TDI
ITP_TMS 2 TMS
ITP_TRST# 3 TRST#
4 NC
ITP_TCK 5 TCK
6 NC1
R338 22.6 +-1% 7
ITP_TDO TDO
2 CPUCLK_ITP_166M# 8 BCLK#
2 CPUCLK_ITP_166M 9 BCLK
10 GND
ITP_TCK 11 FBO
R339 22.6 +-1% 12
6 H_CPURST# RESET#
ITP_PREQ# 13 BPM5#
14 GND1
ITP_PRDY# 15 BPM4#
ITP_BPM#[3:0] 16 GND2
ITP_BPM#3 17 BPM3#
18 GND3
ITP_BPM#2 19
VCC1R05B BPM2#
20 GND4
ITP_BPM#1 21 BPM1#
22 GND5
ITP_BPM#0 23 BPM0#
24 DBA#
12,13 ITP_DBR# 25 DBR#
26 VTAP
27 LENOVO.PND
VTT1
A
28 VTT2 NB system design section A
C315 R341
R342 Title
0.1UF/16V 680 +-5% 27.4 +-1%
R_0603
CPU-1
ITP Size Document Number
NS Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 3 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC1R05B

C875 C876 C877 C878 C879 C880 C881 C882 U2D


A4 VSS[001] VSS[082] P6
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V A8 P21
VSS[002] VSS[083]
A11 VSS[003] VSS[084] P24
A14 VSS[004] VSS[085] R2
A16 VSS[005] VSS[086] R5
A19 VSS[006] VSS[087] R22
A23 VSS[007] VSS[088] R25
D VCCCPUCORE VCCCPUCORE VCC1R05B A26 T1 D
VSS[008] VSS[089]
B6 VSS[009] VSS[090] T4
B8 VSS[010] VSS[091] T23
B11 VSS[011] VSS[092] T26
U2C + CT1 C23 C24 C25 C26 B13 U3
220UF/4V/SANYO VSS[012] VSS[093]
A7 VCC[001] VCC[068] AB20 B16 VSS[013] VSS[094] U6
A9 AB7 TAJ_E 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V B19 U21
VCC[002] VCC[069] VSS[014] VSS[095]
A10 VCC[003] VCC[070] AC7 B21 VSS[015] VSS[096] U24
A12 VCC[004] VCC[071] AC9 B24 VSS[016] VSS[097] V2
TP1 VCCCPUCORE
A13 VCC[005] VCC[072] AC12 C5 VSS[017] VSS[098] V5
A15 VCC[006] VCC[073] AC13 C8 VSS[018] VSS[099] V22
1

A17 VCC[007] VCC[074] AC15 C11 VSS[019] VSS[100] V25


A18 AC17 C863 C864 C865 C866 C867 C868 C869 C870 C871 C14 W1
VCC[008] VCC[075] VSS[020] VSS[101]

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V
1

A20 VCC[009] VCC[076] AC18 C16 VSS[021] VSS[102] W4


B7 VCC[010] VCC[077] AD7 C19 VSS[022] VSS[103] W23
B9 VCC[011] VCC[078] AD9 C2 VSS[023] VSS[104] W26
B10 VCC[012] VCC[079] AD10 C22 VSS[024] VSS[105] Y3
B12 VCC[013] VCC[080] AD12 C25 VSS[025] VSS[106] Y6
B14 VCC[014] VCC[081] AD14 D1 VSS[026] VSS[107] Y21
B15 VCC[015] VCC[082] AD15 D4 VSS[027] VSS[108] Y24
B17 VCC[016] VCC[083] AD17 D8 VSS[028] VSS[109] AA2
B18 VCC[017] VCC[084] AD18 D11 VSS[029] VSS[110] AA5
B20 AE9 VCCCPUCORE D13 AA8
VCC[018] VCC[085] VSS[030] VSS[111]
C9 VCC[019] VCC[086] AE10 32 pieces of 22u/6.3x5r 0805 D16 VSS[031] VSS[112] AA11
C10 VCC[020] VCC[087] AE12 D19 VSS[032] VSS[113] AA14
C12 VCC[021] VCC[088] AE13 D23 VSS[033] VSS[114] AA16
C13 AE15 C441 C442 C443 C444 C445 C446 C447 C448 C449 C450 C451 C452 C453 C454 C455 C456 C457 C458 C459 C460 C461 C462 C463 D26 AA19
VCC[022] VCC[089] VSS[034] VSS[115]

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V

22uF/6.3V
C15 VCC[023] VCC[090] AE17 E3 VSS[035] VSS[116] AA22
C17 VCC[024] VCC[091] AE18 E6 VSS[036] VSS[117] AA25
C18 VCC[025] VCC[092] AE20 E8 VSS[037] VSS[118] AB1
C D9 AF9 E11 AB4 C
VCC[026] VCC[093] VSS[038] VSS[119]
D10 VCC[027] VCC[094] AF10 E14 VSS[039] VSS[120] AB8
D12 VCC[028] VCC[095] AF12 E16 VSS[040] VSS[121] AB11
D14 VCC[029] VCC[096] AF14 E19 VSS[041] VSS[122] AB13
D15 VCC[030] VCC[097] AF15 E21 VSS[042] VSS[123] AB16
D17 VCC[031] VCC[098] AF17 E24 VSS[043] VSS[124] AB19
D18 AF18 VCC1R05B F5 AB23
VCC[032] VCC[099] VSS[044] VSS[125]
E7 VCC[033] VCC[100] AF20 F8 VSS[045] VSS[126] AB26
E9 VCC[034] F11 VSS[046] VSS[127] AC3
E10 VCC[035] VCCP[01] V6 F13 VSS[047] VSS[128] AC6
E12 VCC[036] VCCP[02] G21 F16 VSS[048] VSS[129] AC8
E13 VCC[037] VCCP[03] J6 F19 VSS[049] VSS[130] AC11
E15 VCC[038] VCCP[04] K6 F2 VSS[050] VSS[131] AC14
E17 VCC[039] VCCP[05] M6 F22 VSS[051] VSS[132] AC16
E18 VCC[040] VCCP[06] J21 F25 VSS[052] VSS[133] AC19
E20 VCC[041] VCCP[07] K21 G4 VSS[053] VSS[134] AC21
F7 VCC[042] VCCP[08] M21 G1 VSS[054] VSS[135] AC24
F9 VCC[043] VCCP[09] N21 G23 VSS[055] VSS[136] AD2
F10 VCC[044] VCCP[10] N6 G26 VSS[056] VSS[137] AD5
F12 VCC[045] VCCP[11] R21 H3 VSS[057] VSS[138] AD8
F14 R6 VCC1R5B H6 AD11
VCC[046] VCCP[12] VSS[058] VSS[139]
F15 VCC[047] VCCP[13] T21 H21 VSS[059] VSS[140] AD13
F17 VCC[048] VCCP[14] T6 H24 VSS[060] VSS[141] AD16
F18 VCC[049] VCCP[15] V21 J2 VSS[061] VSS[142] AD19
F20 VCC[050] VCCP[16] W21 J5 VSS[062] VSS[143] AD22
AA7 VCC[051] C37 C38 Layout Note:Play C37 J22 VSS[063] VSS[144] AD25
AA9 B26 J25 AE1
AA10
VCC[052] VCCA 0.01UF/16V 10uF/10V near PIN B26 K1
VSS[064] VSS[145]
AE4
VCC[053] C_0402 VSS[065] VSS[146]
AA12 VCC[054] K4 VSS[066] VSS[147] AE8
AA13 VCC[055] VID[0] AD6 CPU_VID0 45 K23 VSS[067] VSS[148] AE11
B AA15 AF5 K26 AE14 B
VCC[056] VID[1] CPU_VID1 45 VSS[068] VSS[149]
AA17 VCC[057] VID[2] AE5 CPU_VID2 45 L3 VSS[069] VSS[150] AE16
AA18 VCC[058] VID[3] AF4 CPU_VID3 45 L6 VSS[070] VSS[151] AE19
AA20 VCC[059] VID[4] AE3 CPU_VID4 45 L21 VSS[071] VSS[152] AE23
AB9 VCC[060] VID[5] AF2 CPU_VID5 45 L24 VSS[072] VSS[153] AE26
AC10 VCC[061] VID[6] AE2 CPU_VID6 45 M2 VSS[073] VSS[154] AF3
AB10 VCC[062] M5 VSS[074] VSS[155] AF6
AB12 VCC[063] M22 VSS[075] VSS[156] AF8
AB14 VCC[064] VCCSENSE AF7 VCCSENSE 45 M25 VSS[076] VSS[157] AF11
AB15 VCC[065] N1 VSS[077] VSS[158] AF13
AB17 VCC[066] N4 VSS[078] VSS[159] AF16
AB18 VCC[067] VSSSENSE AE7 VSSSENSE 45 N23 VSS[079] VSS[160] AF19
N26 VSS[080] VSS[161] AF21
CPU SOCKET P3 AF24
VCCCPUCORE VSS[081] VSS[162]
R75
Layout Note:Play R75,R76 near
100 +-1% CPU SOCKET
CPU.And Vccsense need 10mil.
R76 100 +-1%

LENOVO.PND
A
NB system design section A
Title
CPU-2
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 4 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC3B

R752
200 +-5%
3 THERMDA_CPU

C723 Q37
D 2200PF/50V 3 OUT PWRSHUTDOWN# 35,36,37,41 D
C_0603 2 R1
C724 6,12,27,34,35,36,43 BPWRG
IN 1 GND
0.1UF/10V R2
3 THERMDC_CPU
DTC115EE

U35

1 DXP1 VCC 9
3

C725 2 R753 C726


Q38 2200PF/50V DXN1
1 STBY 15
MMBT3904 C_0603 1K +-5% 0.1UF/10V
3 DXP2 H8_SCL2
2

4 DXN2 SMBCLK 14 H8_SCL2 34


13 H8_SDA2
SMBDATA H8_SDA2 34
ALERT 12 PM_THRM# 12,13,35
5 DXP3
6 DXN3
ADD0 11
3

C727 10 VCC3B
Q39 2200PF/50V DXP4 ADD1
1 7 DXP4
MMBT3904 C_0603 DXN4 8 16
DXN4 GND
R754
2

MAX1989MUE-3 10K +-5%

PLACE NEAR 2ND MEMORY SLOT


C C
ADDRESS : 4DH
3

C728
Q40 1 2200PF/50V
MMBT3904 C_0603
2

PLACE NEAR LEFT FAN STUD

VCC5B VCC5B

R1003
VCC3SW
2

100K +-5%
Q41
F10
B FUSE-2A32V-6 B
6 1
C36 R74
1

5 2 CON23 0.1UF/10V
VCC5B_FAN U3 47K +-5%
1 VCC 1 HYST
VCC5B_F4 4 3 C738 2 2 5
FRQ_CONTL GND OS#/OS/US#/US SHUTDOWN2# 35,41,51
3 GND 1 1 3 VTEMP V+ 4
0.01UF/16V TP4
C739 R763 FDC658P-2 C_0402
FAN_CONN
0.01UF/16V 1K +-5% HEAD FAN_CONN 53398_0390 MOLEX TP60
C_0402 LM26CIM5_XPA_2GP
NS VCC3B

11
R764 R765
100 +-5%
1K +-5%

FAN_FRQ 34
Q42
3 OUT Q43
2 R1 3 OUT LENOVO.PND
34 FAN_ON
IN 1 GND 2 R1
NB system design section
R2 IN 1 GND
DTC114EE R2 Title
A A
DTC115EE THERMAL SENSOR
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 5 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

U4B

U4A T32 AY35 Low = DMIx2 R77


3 H_D#[63:0] H_A#[31:3] 3 RSVD_1 SM_CK_0 M_CLK_DDR0 10
H_D#0 F1 H9 H_A#3 R32 AR1 CFG5 CFG5
H_D#1 H_D#_0 H_A#_3 H_A#4 TP5 RSVD_2 SM_CK_1 M_CLK_DDR1 10 High = DMIx4(default)
J1 H_D#_1 H_A#_4 C9 1 1 F3 RSVD_3 SM_CK_2 AW7 M_CLK_DDR3 10
H_D#2 H1 E11 H_A#5 TP6 1 F7 AW40 2.2K +-5%
H_D#_2 H_A#_5 1 RSVD_4 SM_CK_3 M_CLK_DDR4 10

RSVD
H_D#3 J6 G11 H_A#6 AG11 R_0402
H_D#4 H_D#_3 H_A#_6 H_A#7 RSVD_5 NS
H3 H_D#_4 H_A#_7 F11 AF11 RSVD_6 SM_CK#_0 AW35 M_CLK_DDR#0 10
H_D#5 K2 G12 H_A#8 H7 AT1 R78
H_D#6 H_D#_5 H_A#_8 H_A#9 RSVD_7 SM_CK#_1 M_CLK_DDR#1 10 CFG6
G1 H_D#_6 H_A#_9 F9 J19 RSVD_8 SM_CK#_2 AY7 M_CLK_DDR#3 10
H_D#7 G2 H11 H_A#10 K30 AY40
H_D#8 H_D#_7 H_A#_10 H_A#11 RSVD_9 SM_CK#_3 M_CLK_DDR#4 10 2.2K +-5%
K9 H_D#_8 H_A#_11 J12 J29 RSVD_10
H_D#9 K1 G14 H_A#12 A41 AU20 CFG7:CPU Strap R_0402
H_D#10 H_D#_9 H_A#_12 H_A#13 RSVD_11 SM_CKE_0 M_CKE0 10 NS
K7 H_D#_10 H_A#_13 D9 A35 RSVD_12 SM_CKE_1 AT20 M_CKE1 10
Low = RSVD
H_D#11 J8 J14 H_A#14 A34 BA29 CFG7 R79
H_D#12 H_D#_11 H_A#_14 H_A#15 RSVD_13 SM_CKE_2 M_CKE2 10 High = Mobile CPU(default) CFG7
H4 H_D#_12 H_A#_15 H13 D28 RSVD_14 SM_CKE_3 AY29 M_CKE3 10
H_D#13 J3 J15 H_A#16 D27
D
H_D#14 H_D#_13 H_A#_16 H_A#17 RSVD_15 CFG9:PCI Graphics Lane 2.2K +-5% D
K11 H_D#_14 H_A#_17 F14 SM_CS#_0 AW13 M_CS#0 10
H_D#15 G4 D12 H_A#18 AW12 Low = Reverse Lane R_0402
H_D#16 H_D#_15 H_A#_18 H_A#19 SM_CS#_1 M_CS#1 10 NS
T10 A11 K16 AY21 CFG9

MUXING
H_D#17 H_D#_16 H_A#_19 H_A#20 2 MCH_BSEL0 CFG_0 SM_CS#_2 M_CS#2 10 High = Normal
W11 H_D#_17 H_A#_20 C11 2 MCH_BSEL1 K18 CFG_1 SM_CS#_3 AW21 M_CS#3
H_D#18 T3 A12 H_A#21 J18 NS 10 operation(default)
H_D#19 H_D#_18 H_A#_21 H_A#22 2 MCH_BSEL2
TP7 CFG3 CFG_2
U7 H_D#_19 H_A#_22 A13 1 1 F18 CFG_3 SM_OCDCOMP_0 AL20 M_OCDCOMP0 R87 40.2 +-1%R_0603 R89
H_D#20 U9 E13 H_A#23 TP8 1 CFG4 E15 AF10 M_OCDCOMP1 R88 40.2 +-1% CFG9
H_D#21 H_D#_20 H_A#_23 H_A#24 1 CFG5 CFG_4 SM_OCDCOMP_1 R_0603
U11 H_D#_21 H_A#_24 G13 F15 CFG_5
H_D#22 T11 F12 H_A#25 CFG6 E18 BA13 NS 2.2K +-5%
H_D#23 H_D#_22 H_A#_25 H_A#26 CFG7 CFG_6 SM_ODT_0 M_ODT0 10 R_0402
W9 H_D#_23 H_A#_26 B12 D19 CFG_7 SM_ODT_1 BA12 M_ODT1 10
H_D#24 T1 B14 H_A#27 TP10 1 CFG8 D16 AY20 NS
H_D#_24 H_A#_27 1 CFG_8 SM_ODT_2 M_ODT2 10

CFG
H_D#25 T8 C12 H_A#28 CFG9 G16 AU21
H_D#26 H_D#_25 H_A#_28 H_A#29 CFG10 CFG_9 SM_ODT_3 M_ODT3 10 R90
T4 H_D#_26 H_A#_29 A14 E16 CFG_10

DDR
H_D#27 W7 C14 H_A#30 CFG11 D15 AV9 M_RCOMPN CFG10
H_D#28 H_D#_27 H_A#_30 H_A#31 CFG12 CFG_11 SM_RCOMP# M_RCOMPP
U5 H_D#_28 H_A#_31 D14 G15 CFG_12 SM_RCOMP AT9
H_D#29 T9 CFG13 K15 2.2K +-5%
H_D#30 H_D#_29 TP12 CFG14 CFG_13 R_0402
W6 H_D#_30 H_ADS# E8 H_ADS# 3 1 C15 AK1
H_D#31 T5 B9 TP13 1 1 CFG15 H16
CFG_14 SM_VREF_0
AK41 M_VREF NS
H_D#_31 H_ADSTB#_0 H_ADSTB#0 3 1 CFG_15 SM_VREF_1 DDR2_VREF
H_D#32 AB7 C13 CFG16 G18
H_D#_32 H_ADSTB#_1 H_ADSTB#1 3 CFG_16
H_D#33 AA9 J13 H_VREF TP14 1 CFG17 H15 R91
H_D#34 H_D#_33 H_VREF_0 1 CFG18 CFG_17 CFG11
W4 H_D#_34 H_BNR# C6 H_BNR# 3 J25 CFG_18 G_CLKIN# AF33 CLK_PCIE_MCH# 2
HOST
H_D#35 W3 F6 CFG19 K27 AG33
H_D#_35 H_BPRI# H_BPRI# 3 CFG_19 G_CLKIN CLK_PCIE_MCH 2
H_D#36 Y3 C7 CFG20 J26 A27 R92 0 +-5% 2.2K +-5%
H_D#_36 H_BREQ#0 H_BREQ#0 3 CFG_20 D_REFCLKIN# DREFCLK_96M# 2

CLK
H_D#37 Y7 B7 A26 R93 0 +-5% R_0402
H_D#_37 H_CPURST# H_CPURST# 3 D_REFCLKIN DREFCLK_96M 2 CFG16:FSB Dynamic ODT FUNCION
H_D#38 W5 A7 G28 C40 R94 0 +-5% NS
H_D#_38 H_DBSY# H_DBSY# 3 12 PM_BMBUSY# PM_BMBUSY# D_REFSSCLKIN# DREFCLKSS_100M# 2
H_D#39 Y10 C3 PM_EXTTS#0
F25 D41 R95 0 +-5% Low = Disable R97
H_D#_39 H_DEFER# H_DEFER# 3 PM_EXTTS#_0 D_REFSSCLKIN DREFCLKSS_100M 2

PM
H_D#40 AB8 J9 R96 R_0402 0 +-5%
PM_EXTTS#1
H26 CFG16 CFG16
H_D#41 H_D#_40 H_DPWR# H_DPWR# 3 12 DPRSLPVR PM_EXTTS#_1 High = Enable(default)
W2 H_D#_41 H_DRDY# H8 H_DRDY# 3 3,11 PM_THRMTRIP# G6 PM_THRMTRIP# DMI_TXN[3:0] 12
H_D#42 AA4 K13 H_VREF AH33 AE35 DMI_TXN0 2.2K +-5%
H_D#43 H_D#_42 H_VREF_1 5,12,27,34,35,36,43 BPWRG R_0402 PWROK DMI_RXN_0 DMI_TXN1 R_0402
AA7 H_D#_43 H_DINV#[3:0] 3 12,18,22,27,29,33,35 PLT_RST# AH34 RSTIN# DMI_RXN_1 AF39
H_D#44 AA2 J7 H_DINV#0 56 +-5% AG35 DMI_TXN2 NS
H_D#45 H_D#_44 H_DINV#_0 H_DINV#1 R98 DMI_RXN_2 DMI_TXN3 CFG18:VCC Select
AA6 H_D#_45 H_DINV#_1 W8 DMI_RXN_3 AH39
R100

MISC
H_D#46 AA10 U3 H_DINV#2 R914 NS 0 +-5% H28 Low = 1.05V(default)
H_D#47 H_D#_46 H_DINV#_2 H_DINV#3 R99 0 +-5% SDVO_CTRLCLK CFG18
Y8 H_D#_47 H_DINV#_3 AB10 H27 SDVO_CTRLDATA DMI_TXP[3:0] 12
CFG18 High = 1.5V VCC3M
H_D#48 AA1 K28 AC35 DMI_TXP0
H_D#_48 H_DSTBN#[3:0] 3 12,13 MCH_SYNC# ICH_SYNC# DMI_RXP_0
H_D#49 AB4 K4 H_DSTBN#0 H32 AE39 DMI_TXP1 1K +-1%
H_D#50 H_D#_49 H_DSTBN#_0 H_DSTBN#1 2 CLKREQ_MCH# CLK_REQ# DMI_RXP_1 DMI_TXP2 R_0603
AC9 H_D#_50 H_DSTBN#_1 T7 DMI_RXP_2 AF35
C H_D#51 AB11 Y5 H_DSTBN#2 D1 AG39 DMI_TXP3 NS C
H_D#52 H_D#_51 H_DSTBN#_2 H_DSTBN#3 NC0 DMI_RXP_3 CFG19:DMI Lane Resersal
AC11 H_D#_52 H_DSTBN#_3 AC4 C41 NC1
H_D#53 Low = Normal(default) R101
AB3 H_D#_53 H_DSTBP#[3:0] 3 C1 NC2 DMI_RXN[3:0] 12
H_D#54 AC2 K3 H_DSTBP#0 BA41 AE37 DMI_RXN0 CFG19 CFG19
H_D#55 H_D#_54 H_DSTBP#_0 H_DSTBP#1 NC3 DMI_TXN_0 DMI_RXN1
High = Lanes Reversed VCC3M
AD1 H_D#_55 H_DSTBP#_1 T6 BA40 NC4 DMI_TXN_1 AF41

NC
H_D#56 AD9 AA5 H_DSTBP#2 BA39 AG37 DMI_RXN2 1K +-1%
H_D#57 H_D#_56 H_DSTBP#_2 H_DSTBP#3 NC5 DMI_TXN_2 DMI_RXN3 R_0603
AC1 H_D#_57 H_DSTBP#_3 AC5 BA3 NC6 DMI_TXN_3 AH41
H_D#58 AD7 BA2 NS
H_D#_58 NC7

DMI
H_D#59 AC6 BA1 CFG20:PCI-E/SDVO Mode
H_D#60 H_D#_59 NC8 DMI_RXP0 DMI_RXP[3:0] 12 R102
AB5 H_D#_60 H_HIT# D3 H_HIT# 3 B41 NC9 DMI_TXP_0 AC37 Low = Disable(default)
H_D#61 AD10 D4 B2 AE41 DMI_RXP1 CFG20 CFG20
H_D#62 H_D#_61 H_HITM# H_HITM# 3 NC10 DMI_TXP_1 DMI_RXP2
High = Enable VCC3M
AD4 H_D#_62 H_LOCK# B3 H_LOCK# 3 AY41 NC11 DMI_TXP_2 AF37
H_D#63 AC8 AY1 AG41 DMI_RXP3 NS 1K +-1%
H_D#_63 NC12 DMI_TXP_3 R_0603
AW41 NC13
H_XRCOMP E1 AW1
H_XRCOMP H_REQ#[4:0] 3 NC14
H_XSCOMP E2 D8 H_REQ#0 A40
H_XSWING H_XSCOMP H_REQ#_0 H_REQ#1 NC15 R103
E4 H_XSWING H_REQ#_1 G8 A4 NC16
B8 H_REQ#2 A39 CFG12
H_YRCOMP H_REQ#_2 H_REQ#3 NC17
Y1 H_YRCOMP H_REQ#_3 F8 A3 NC18
H_YSCOMP U1 A8 H_REQ#4 CFG[13:12] NS 2.2K +-5%
H_YSWING H_YSCOMP H_REQ#_4 R_0402
W1 H_YSWING H_RS#[2:0] 3 CALISTOGA 00=Partial clock gating disable
B4 H_RS#0 CFG[13:12] 01=XOR mode enable
H_RS#_0 H_RS#1 R104
2 CLK_MCH_BCLK AG2 H_CLKIN H_RS#_1 E6
AG1 D6 H_RS#2 10=All_Z mode enable CFG13
2 CLK_MCH_BCLK# H_CLKIN# H_RS#_2
11=Normal Operation(default)
E3 H_CPUSLP#_GMCH R105 R_0402 0 +-5% NS 2.2K +-5%
H_SLPCPU# H_CPUSLP# 3
E7 R_0402
H_TRDY# H_TRDY# 3 DDR2_VREF
CALISTOGA
OTHER CFG: RESERVED
C39 C40 C41 C42
0.1UF/10V 2.2UF/16V 0.1UF/10V 2.2UF/16V
H_XRCOMP VCC1R05B H_YRCOMP VCC1R05B

R106 R107
B 24.9 +-1% 24.9 +-1% B

R_0603 R_0603

R108 R109
54.9 +-1% 54.9 +-1%
R_0402 R_0402 VCC3B
VCC1R8A
H_XSCOMP H_YSCOMP VCC1R05B R110 R_0402 10K +-5% PM_EXTTS#0 PM_EXTTS#0
MEM_TS# 10
VCC1R05B VCC1R05B R111 10K +-5% PM_EXTTS#1
R112 R113 R_0402
100 +-1% 80.6 +-1% NS
R_0603 R_0603
R114 R115 M_RCOMPN
221 +-1% 221 +-1% H_VREF
R_0603 R_0603 M_RCOMPP
C43
H_YSWING H_XSWING R116
0.1UF/10V 80.6 +-1%
R117 C44 R118 C45 R_0603
100 +-1% 100 +-1%
R_0603 0.1UF/10V R_0603 0.1UF/10V R119
200 +-5%
R_0402

A LENOVO.PND A
NB system design section
Title
945GM-1
Size Document Number
C Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 6 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC1R05B

CT5 VCC3B VCC3B


FB35 1 BLM18PG600SN1 GMCH_CRTDAC_W10 220UF/4V/SANYO
VCC2R5B C51 C46 C47 C48 + TAJ_E
R120 0 +-5% 0.1UF/10V C50 NS
0.022UF/25V 2.2UF/16V 4.7UF/10V
VCC1R05B D1 0.1UF/10V C_0805 R893
2 1 R891 1K +-1% R892 10K +-5% VCC1R5B_PCIE
VCC1R05B NS R122 R123
RB521S-30T1 10uF/10V C49 C52 U4H 10K +-5% 10K +-5%
0.1UF/10V H22 NS 10K +-5% R124
VCC1R05B VCCSYNC 24.9 +-1%
VTT_0 AC14
VCC_TXLVDS C30 AB14 U4C R_0603
VCC_TXLVDS0 VTT_1 PEG_COMP
B30 VCC_TXLVDS1 VTT_2 W14 15 PANEL_BKLT_CTRL D32 L_BKLTCTL EXP_A_COMPI D40
A30 VCC_TXLVDS2 VTT_3 V14 35 VGA_BLON J30 L_BKLTEN EXP_A_COMPO D38
C53 C54 C55 C56 C57 C58 PCIE_RL_W40 T14 H30
D VTT_4 L_CLKCTLA D
AJ41 VCC3G0 VTT_5 R14 H29 L_CLKCTLB EXP_A_RXN_0 F34
0.1UF/10V 0.1UF/10V 0.1UF/10V 10uF/10V 10uF/10V 10uF/10V AB41 P14 G26 G38
VCC3G1 VTT_6 15 EDIDCLK L_DDC_CLK EXP_A_RXN_1
C_0402 C_0402 C_0402 C_0805 C_0805 Y41 N14 R126 G25 H34
VCC3G2 VTT_7 15 EDIDDATA L_DDC_DATA EXP_A_RXN_2
V41 VCC3G3 VTT_8 M14 B38 L_IBG EXP_A_RXN_3 J38
R41 VCC3G4 VTT_9 L14 C35 L_VBG EXP_A_RXN_4 L34
N41 AD13 1.5K +-1% F32 M38
VCC1R5B VCC2R5B VCC3G5 VTT_10 34,36 PANEL_POWER_ON L_VDDEN EXP_A_RXN_5
L41 VCC3G6 VTT_11 AC13 C33 L_VREFH EXP_A_RXN_6 N34
C59 GMCH_3GPLL AC33 VCCA_3GPLL VTT_12 AB13 C32 L_VREFL EXP_A_RXN_7 P38
G41 VCCA_3GBG VTT_13 AA13 EXP_A_RXN_8 R34
0.1UF/10V H41 Y13 15 TXLCLKOUT- A33 T38
C_0402 VSSA_3GBG VTT_14 LA_CLK# EXP_A_RXN_9
VTT_15 W13 15 TXLCLKOUT+ A32 LA_CLK EXP_A_RXN_10 V34
L1 CAP near to MCH GMCH_CRTDAC_W10 F21 VCCA_CRTDAC0 VTT_16 V13 15 TXUCLKOUT- E27 LB_CLK# EXP_A_RXN_11 W38
1 2 E21 VCCA_CRTDAC1 VTT_17 U13 15 TXUCLKOUT+ E26 LB_CLK EXP_A_RXN_12 Y34
220UF/4V/SANYO 0.1UF/10V GMCH_DPLLA_W10 G21 T13 AA38
VSSA_CRTDAC VTT_18 EXP_A_RXN_13

LVDS
1uH,220mA,25%,0805 + CT2 C60 R13 15 TXLOUT0- C37 AB34
VTT_19 LA_DATA#_0 EXP_A_RXN_14
B26 VCCA_DPLLA VTT_20 N13 15 TXLOUT1- B35 LA_DATA#_1 EXP_A_RXN_15 AC38
C39 VCCA_DPLLB VTT_21 M13 15 TXLOUT2- A37 LA_DATA#_2
TAJ_E C_0402 GMCH_HPLL_W10 AF1 L13 D34
L2 CAP near to MCH VCCA_HPLL VTT_22 EXP_A_RXP_0
AB12 F38

GRAPHICS
GMCH_DPLLB_W10 VCCA_LVDS R127 0 +-5% VTT_23 EXP_A_RXP_1
1 2 A38 VCCA_LVDS VTT_24 AA12 EXP_A_RXP_2 G34
C61 B39 VSSA_LVDS VTT_25 Y12 15 TXLOUT0+ B37 LA_DATA_0 EXP_A_RXP_3 H38
1uH,220mA,25%,0805 + CT3 W12 15 TXLOUT1+ B34 J34
220UF/4V/SANYO 0.1UF/10V GMCH_MPLL2_W10 VTT_26 LA_DATA_1 EXP_A_RXP_4
AF2 VCCA_MPLL VTT_27 V12 15 TXLOUT2+ A36 LA_DATA_2 EXP_A_RXP_5 L38
TAJ_E C_0402 U12 M34
VTT_28 EXP_A_RXP_6
C62 C872H20 VCCA_TVBG VTT_29 T12 EXP_A_RXP_7 N38
G20 VSSA_TVBG VTT_30 R12 15 TXUOUT0- G30 LB_DATA#_0 EXP_A_RXP_8 P34
R1002 0 +-5% P12 15 TXUOUT1- D30 R38
VCC3B VTT_31 LB_DATA#_1 EXP_A_RXP_9
VCC1R5B
D88 FB37
0.1UF/10V 0.022UF/25V
TV VTT_32
VTT_33
N12
M12
15 TXUOUT2- F29 LB_DATA#_2 EXP_A_RXP_10
EXP_A_RXP_11
T34
V38
2 1 R894 1K +-1% 60 OHMS/500MA
1 VCCA_TVBGA E19 VCCA_TVDACA0 VTT_34 L12 EXP_A_RXP_12 W34
F19 VCCA_TVDACA1 VTT_35 R11 EXP_A_RXP_13 Y38
VCCA_TVBGB C20 P11 15 TXUOUT0+ F30 AA34
RB521S-30T1 VCCA_TVDACB0 VTT_36 LB_DATA_0 EXP_A_RXP_14
D20 N11 15 TXUOUT1+ D29 AB38

PCI-EXPRESS
VCCA_TVBGC VCCA_TVDACB1 VTT_37 LB_DATA_1 EXP_A_RXP_15
E20 M11 F28
VCC1R5B
VCC1R5B
F20
VCCA_TVDACC0
VCCA_TVDACC1 POWER VTT_38
VTT_39
VTT_40
R10
P10
15 TXUOUT2+ LB_DATA_2
EXP_A_TXN_0
EXP_A_TXN_1
F36
G40
AH1 N10 VCC1R5B H36
C81 VCCD_HMPLL0 VTT_41 R128 EXP_A_TXN_2
C C82 AH2 VCCD_HMPLL1 VTT_42 M10 EXP_A_TXN_3 J40 C
0.1UF/10V P9 A16 L36
10uF/10V C_0402 VCCD_LVDS R129 0 +-5% VTT_43 TV_DACA_OUT EXP_A_TXN_4
A28 VCCD_LVDS0 VTT_44 N9 C18 TV_DACB_OUT EXP_A_TXN_5 M40
C_0805 B28 M9 0 +-5% A19 N36
VCCD_LVDS1 VTT_45 TV_DACC_OUT EXP_A_TXN_6

TV
C28 VCCD_LVDS2 VTT_46 R8 EXP_A_TXN_7 P40
VCC1R5B P8 J20 R36
VTT_47 TV_IREF EXP_A_TXN_8
D21 VCCD_TVDAC VTT_48 N8 B16 TV_IRTNA EXP_A_TXN_9 T40
VTT_49 M8 B18 TV_IRTNB EXP_A_TXN_10 V36
C873 C874 A23 VCC_HV0 VTT_50 P7 B19 TV_IRTNC EXP_A_TXN_11 W40
B23 VCC_HV1 VTT_51 N7 EXP_A_TXN_12 Y36
0.1UF/10V 0.22UF/10V B25 M7 AA40
VCC3B C_0402 C_0402 VCC_HV2 VTT_52 EXP_A_TXN_13
VTT_53 R6 EXP_A_TXN_14 AB36
H19 VCCD_QTVDAC VTT_54 P6 EXP_A_TXN_15 AC40
VTT_55 M6
AK31 VCCAUX0 VTT_56 A6 16 BLUE_GMCH E23 CRT_BLUE EXP_A_TXP_0 D36
C67 C68 AF31 VCCAUX1 VTT_57 R5 D23 CRT_BLUE# EXP_A_TXP_1 F40
AE31 VCCAUX2 VTT_58 P5 16 GREEN_GMCH C22 CRT_GREEN EXP_A_TXP_2 G36
10uF/10V 0.1UF/10V

VGA
VCC1R5B AC31 N5 B22 H40
C_0805 C_0402 FB38 VCCAUX3 VTT_59 CRT_GREEN# EXP_A_TXP_3
AL30 VCCAUX4 VTT_60 M5 16 RED_GMCH A21 CRT_RED EXP_A_TXP_4 J36
60 OHMS/500MA AK30 P4 B21 L40
1 VCCAUX5 VTT_61 CRT_RED# EXP_A_TXP_5

R_0402 R130

R_0402 R131

R_0402 R132
AJ30 VCCAUX6 VTT_62 N4 EXP_A_TXP_6 M36
C811 C812 AH30 M4 VCC3B N40
VCCAUX7 VTT_63 EXP_A_TXP_7

150 +-1%

150 +-1%

150 +-1%
AG30 VCCAUX8 VTT_64 R3 C26 CRT_DDC_CLK EXP_A_TXP_8 P36

2
0.022UF/16V0.1UF/10V AF30 P3 C25 R40
C_0402 VCCAUX9 VTT_65 D2 CRT_DDC_DATA EXP_A_TXP_9
AE30 VCCAUX10 VTT_66 N3 G23 CRT_HSYNC EXP_A_TXP_10 T36
VCC1R5B AD30 M3 RB521S-30T1 J22 V40
VCCAUX11 VTT_67 CRT_IREF EXP_A_TXP_11
AC30 VCCAUX12 VTT_68 R2 H23 CRT_VSYNC EXP_A_TXP_12 W36
AG29 P2 VGA_LEVEL_SHIFT Y40

CRT_IREF
VCCAUX13 VTT_69 EXP_A_TXP_13

1
AF29 VCCAUX14 VTT_70 M2 EXP_A_TXP_14 AA36
AE29 VCCAUX15 VTT_71 D2 EXP_A_TXP_15 AB40
C70 C71 C72 AD29 AB1 R136 R137
VCCAUX16 VTT_72

2
AC29 R1 4.7K +-5% 4.7K +-5% CALISTOGA
10uF/10V 0.1UF/10V 0.1UF/10V VCCAUX17 VTT_73 2SK3019-N-2GP R_0402 R_0402
AG28 VCCAUX18 VTT_74 P1
C_0805 C_0402 C_0402 AF28 N1 Q2
VCCAUX19 VTT_75 R133
AE28 VCCAUX20 VTT_76 M1 16 DDCCLK_ID3 3 1
AH22 255OHM +-1%
VCCAUX21

2
AJ21 VCCAUX22
B
AH21 VCCAUX23 B
AJ20 Q1
VCC1R5B_PCIE VCC1R5B VCCAUX24
AH20 VCCAUX25 16 DDCDATA_ID1 3 1
AH19 2SK3019-N-2GP
VCCAUX26
P19 VCCAUX27
PCIE_RL_W40 L5 P16
INDCT,91nH,1.300A,20%,1210 VCCAUX28 R134 39 +-5%
AH15 VCCAUX29 16 HSYNC_GMCH
C75 C76 P15 VCCAUX30
+ CT4 CAP near to MCH AH14 R135 39 +-5%
10uF/10V 10uF/10V VCCAUX31 16 VSYNC_GMCH
AG14 VCCAUX32
C_0805 C_0805 AF14 VCCAUX33
AE14 VCCAUX34
Y14 VCCAUX35
220UF/4V/SANYO AF13
TAJ_E VCCAUX36
AE13 VCCAUX37
VCC1R5B AF12 VCCAUX38
AE12 VCCAUX39
L6
AD12 VCCAUX40
1 2 GMCH_3GPLL

1uH,220mA,25%,0805 C77 C78 CALISTOGA


10uF/10V 0.1UF/10V
C_0805 C_0402
VCC2R5B VCC1R5B
VCC2R5B
VCCA_LVDS
VCC_TXLVDS
C79 L3 CAP near to MCH
C80
0.1UF/10V 1 2 C63 GMCH_HPLL_W10
C_0402 0.01UF/16V C83 C84
0.1UF/10V 1uH,220mA,25%,0805 22UF/6.3V C64
C_0402 4.7UF/10V
0.1UF/10V
C_0402
VCC1R5B
L4 CAP near to MCH
A 1 2 C65 GMCH_MPLL2_W10 A

1uH,220mA,25%,0805 22UF/6.3V C66


LENOVO.PND
0.1UF/10V NB system design section
C_0402 Title
945GM-2
VCCA_TVBGA VCCA_TVBGB VCCA_TVBGC
Size Document Number
C Rev s1.3
C814 C815 C816 C817 C818 C819 Whistler
0.22UF/10V 0.1UF/10V 0.22UF/10V 0.1UF/10V 0.22UF/10V 0.1UF/10V Date: Friday, April 28, 2006 Sheet 7 of 52
C_0402 C_0402 C_0402 C_0402 C_0402 C_0402 "PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

M_A_DQ[63:0] 10 M_B_DQ[63:0] 10

U4D U4E
M_A_DQ0 AJ35 AU12 M_B_DQ0 AK39
SA_DQ0 SA_BS_0 M_A_BS#0 10 SB_DQ0
M_A_DQ1 AJ34 AV14 M_B_DQ1 AJ37 AT24
SA_DQ1 SA_BS_1 M_A_BS#1 10 SB_DQ1 SB_BS_0 M_B_BS#0 10
M_A_DQ2 AM31 BA20 M_B_DQ2 AP39 AV23
SA_DQ2 SA_BS_2 M_A_BS#2 10 SB_DQ2 SB_BS_1 M_B_BS#1 10
M_A_DQ3 AM33 M_B_DQ3 AR41 AY28
SA_DQ3 M_A_CAS# 10 SB_DQ3 SB_BS_2 M_B_BS#2 10
M_A_DQ4 AJ36 AY13 M_B_DQ4 AJ38
SA_DQ4 SA_CAS# M_A_DM[7:0] 10 SB_DQ4 M_B_CAS# 10
M_A_DQ5 AK35 AJ33 M_A_DM0 M_B_DQ5 AK38 AR24
SA_DQ5 SA_DM_0 SB_DQ5 SB_CAS# M_B_DM0 M_B_DM[7:0] 10
M_A_DQ6 AJ32 AM35 M_A_DM1 M_B_DQ6 AN41 AK36
D M_A_DQ7 SA_DQ6 SA_DM_1 M_A_DM2 M_B_DQ7 SB_DQ6 SB_DM_0 M_B_DM1 D
AH31 SA_DQ7 SA_DM_2 AL26 AP41 SB_DQ7 SB_DM_1 AR38
M_A_DQ8 AN35 AN22 M_A_DM3 M_B_DQ8 AT40 AT36 M_B_DM2
M_A_DQ9 SA_DQ8 SA_DM_3 M_A_DM4 M_B_DQ9 SB_DQ8 SB_DM_2 M_B_DM3
AP33 SA_DQ9 SA_DM_4 AM14 AV41 SB_DQ9 SB_DM_3 BA31
M_A_DQ10 AR31 AL9 M_A_DM5 M_B_DQ10 AU38 AL17 M_B_DM4
M_A_DQ11 SA_DQ10 SA_DM_5 M_A_DM6 M_B_DQ11 SB_DQ10 SB_DM_4 M_B_DM5
AP31 SA_DQ11 SA_DM_6 AR3 AV38 SB_DQ11 SB_DM_5 AH8
M_A_DQ12 AN38 AH4 M_A_DM7 M_B_DQ12 AP38 BA5 M_B_DM6
M_A_DQ13 SA_DQ12 SA_DM_7 M_B_DQ13 SB_DQ12 SB_DM_6 M_B_DM7
AM36 SA_DQ13 M_A_DQS[7:0] 10 AR40 SB_DQ13 SB_DM_7 AN4
M_A_DQ14 AM34 AK33 M_A_DQS0 M_B_DQ14 AW38

A
SA_DQ14 SA_DQS_0 SB_DQ14 M_B_DQS0 M_B_DQS[7:0] 10
M_A_DQ15 AN33 AT33 M_A_DQS1 M_B_DQ15 AY38 AM39

B
M_A_DQ16 SA_DQ15 SA_DQS_1 M_A_DQS2 M_B_DQ16 SB_DQ15 SB_DQS_0 M_B_DQS1
AK26 SA_DQ16 SA_DQS_2 AN28 BA38 SB_DQ16 SB_DQS_1 AT39
M_A_DQ17 AL27 AM22 M_A_DQS3 M_B_DQ17 AV36 AU35 M_B_DQS2
M_A_DQ18 SA_DQ17 SA_DQS_3 M_A_DQS4 M_B_DQ18 SB_DQ17 SB_DQS_2 M_B_DQS3
AM26 SA_DQ18 SA_DQS_4 AN12 AR36 SB_DQ18 SB_DQS_3 AR29
M_A_DQ19 AN24 AN8 M_A_DQS5 M_B_DQ19 AP36 AR16 M_B_DQS4
M_A_DQ20 AK28
SA_DQ19
MEMORY SA_DQS_5
AP3 M_A_DQS6 M_B_DQ20 BA36
SB_DQ19 SB_DQS_4
AR10 M_B_DQS5

MEMORY
M_A_DQ21 SA_DQ20 SA_DQS_6 M_A_DQS7 M_B_DQ21 SB_DQ20 SB_DQS_5 M_B_DQS6
AL28 SA_DQ21 SA_DQS_7 AG5 M_A_DQS#[7:0] 10 AU36 SB_DQ21 SB_DQS_6 AR7
M_A_DQ22 AM24 AK32 M_A_DQS#0 M_B_DQ22 AP35 AN5 M_B_DQS7
SA_DQ22 SA_DQS#_0 SB_DQ22 SB_DQS_7 M_B_DQS#0 M_B_DQS#[7:0] 10
M_A_DQ23 AP26 AU33 M_A_DQS#1 M_B_DQ23 AP34 AM40
M_A_DQ24 SA_DQ23 SA_DQS#_1 M_A_DQS#2 M_B_DQ24 SB_DQ23 SB_DQS#_0 M_B_DQS#1
AP23 SA_DQ24 SA_DQS#_2 AN27 AY33 SB_DQ24 SB_DQS#_1 AU39
M_A_DQ25 AL22 AM21 M_A_DQS#3 M_B_DQ25 BA33 AT35 M_B_DQS#2
M_A_DQ26 SA_DQ25 SA_DQS#_3 M_A_DQS#4 M_B_DQ26 SB_DQ25 SB_DQS#_2 M_B_DQS#3
AP21 SA_DQ26 SA_DQS#_4 AM12 AT31 SB_DQ26 SB_DQS#_3 AP29
M_A_DQ27 AN20 AL8 M_A_DQS#5 M_B_DQ27 AU29 AP16 M_B_DQS#4
M_A_DQ28 SA_DQ27 SA_DQS#_5 M_A_DQS#6 M_B_DQ28 SB_DQ27 SB_DQS#_4 M_B_DQS#5
AL23 SA_DQ28 SA_DQS#_6 AN3 AU31 SB_DQ28 SB_DQS#_5 AT10
M_A_DQ29 AP24 AH5 M_A_DQS#7 M_B_DQ29 AW31 AT7 M_B_DQS#6
M_A_DQ30 SA_DQ29 SA_DQS#_7 M_B_DQ30 SB_DQ29 SB_DQS#_6 M_B_DQS#7
C AP20 SA_DQ30 M_A_A[13:0] 10 AV29 SB_DQ30 SB_DQS#_7 AP5 C
M_A_DQ31 AT21 AY16 M_A_A0 M_B_DQ31 AW29
SA_DQ31 SA_MA_0 SB_DQ31 M_B_A0 M_B_A[13:0] 10
M_A_DQ32 M_A_A1 M_B_DQ32
SYSTEM

AR12 SA_DQ32 SA_MA_1 AU14 AM19 SB_DQ32 SB_MA_0 AY23


M_A_DQ33 M_A_A2 M_B_DQ33 M_B_A1

SYSTEM
AR14 SA_DQ33 SA_MA_2 AW16 AL19 SB_DQ33 SB_MA_1 AW24
M_A_DQ34 AP13 BA16 M_A_A3 M_B_DQ34 AP14 AY24 M_B_A2
M_A_DQ35 SA_DQ34 SA_MA_3 M_A_A4 M_B_DQ35 SB_DQ34 SB_MA_2 M_B_A3
AP12 SA_DQ35 SA_MA_4 BA17 AN14 SB_DQ35 SB_MA_3 AR28
M_A_DQ36 AT13 AU16 M_A_A5 M_B_DQ36 AN17 AT27 M_B_A4
M_A_DQ37 SA_DQ36 SA_MA_5 M_A_A6 M_B_DQ37 SB_DQ36 SB_MA_4 M_B_A5
AT12 SA_DQ37 SA_MA_6 AV17 AM16 SB_DQ37 SB_MA_5 AT28
M_A_DQ38 AL14 AU17 M_A_A7 M_B_DQ38 AP15 AU27 M_B_A6
M_A_DQ39 SA_DQ38 SA_MA_7 M_A_A8 M_B_DQ39 SB_DQ38 SB_MA_6 M_B_A7
AL12 SA_DQ39 SA_MA_8 AW17 AL15 SB_DQ39 SB_MA_7 AV28
M_A_DQ40 AK9 AT16 M_A_A9 M_B_DQ40 AJ11 AV27 M_B_A8
M_A_DQ41 SA_DQ40 SA_MA_9 M_A_A10 M_B_DQ41 SB_DQ40 SB_MA_8 M_B_A9
AN7 SA_DQ41 SA_MA_10 AU13 AH10 SB_DQ41 SB_MA_9 AW27
M_A_DQ42 AK8 AT17 M_A_A11 M_B_DQ42 AJ9 AV24 M_B_A10
M_A_DQ43 SA_DQ42 SA_MA_11 M_A_A12 M_B_DQ43 SB_DQ42 SB_MA_10 M_B_A11
AK7 SA_DQ43 SA_MA_12 AV20 AN10 SB_DQ43 SB_MA_11 BA27
M_A_DQ44 AP9 AV12 M_A_A13 M_B_DQ44 AK13 AY27 M_B_A12
SA_DQ44 SA_MA_13 SB_DQ44 SB_MA_12
DDR

M_A_DQ45 AN9 M_B_DQ45 AH11 AR23 M_B_A13


SA_DQ45 SB_DQ45 SB_MA_13

DDR
M_A_DQ46 AT5 AW14 M_B_DQ46 AK10
SA_DQ46 SA_RAS# M_A_RAS# 10 SB_DQ46
M_A_DQ47 AL5 AK23 TP_MA_RCVENIN# 1 1 TP18 M_B_DQ47 AJ8 AU23
SA_DQ47 SA_RCVENIN# SB_DQ47 SB_RAS# M_B_RAS# 10
M_A_DQ48 AY2 AK24 TP_MA_RCVENOUT# 1 1 TP19 M_B_DQ48 BA10 AK16 TP_MB_RCVENIN# 1 1 TP20
M_A_DQ49 SA_DQ48 SA_RCVENOUT# M_B_DQ49 SB_DQ48 SB_RCVENIN# TP_MB_RCVENOUT# TP21
AW2 SA_DQ49 SA_WE# AY14 M_A_WE# 10 AW10 SB_DQ49 SB_RCVENOUT# AK18 1 1
M_A_DQ50 AP1 M_B_DQ50 BA4 AR27
SA_DQ50 SB_DQ50 SB_WE# M_B_WE# 10
M_A_DQ51 AN2 M_B_DQ51 AW4
M_A_DQ52 SA_DQ51 M_B_DQ52 SB_DQ51
AV2 SA_DQ52 AY10 SB_DQ52
M_A_DQ53 AT3 M_B_DQ53 AY9
M_A_DQ54 SA_DQ53 M_B_DQ54 SB_DQ53
B AN1 SA_DQ54 AW5 SB_DQ54 B
M_A_DQ55 AL2 M_B_DQ55 AY5
M_A_DQ56 SA_DQ55 M_B_DQ56 SB_DQ55
AG7 SA_DQ56 AV4 SB_DQ56
M_A_DQ57 AF9 M_B_DQ57 AR5
M_A_DQ58 SA_DQ57 M_B_DQ58 SB_DQ57
AG4 SA_DQ58 AK4 SB_DQ58
M_A_DQ59 AF6 M_B_DQ59 AK3
M_A_DQ60 SA_DQ59 M_B_DQ60 SB_DQ59
AG9 SA_DQ60 AT4 SB_DQ60
M_A_DQ61 AH6 M_B_DQ61 AK5
M_A_DQ62 SA_DQ61 M_B_DQ62 SB_DQ61
AF4 SA_DQ62 AJ5 SB_DQ62
M_A_DQ63 AF8 M_B_DQ63 AJ3
SA_DQ63 SB_DQ63
CALISTOGA CALISTOGA

LENOVO.PND
NB system design section
Title
945GM-3
A A
Size Document Number
B Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 8 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC1R05B
VCC1R05B
U4G
U4F AA33 U4I U4J
VCC_0
AD27 VCC_NCTF0 W33 VCC_1 AC41 VSS_0 VSS_97 AK34 AT23 VSS_180 VSS_273 J11
AC27 AE27 P33 VCC1R8A AA41 AG34 AN23 D11
VCC_NCTF1 VSS_NCTF0 VCC_2 VSS_1 VSS_98 VSS_181 VSS_274
AB27 VCC_NCTF2 VSS_NCTF1 AE26 N33 VCC_3 W41 VSS_2 VSS_99 AF34 AM23 VSS_182 VSS_275 B11
AA27 VCC_NCTF3 VSS_NCTF2 AE25 L33 VCC_4 VCC_SM_0 AU41 T41 VSS_3 VSS_100 AE34 AH23 VSS_183 VSS_276 AV10
Y27 VCC_NCTF4 VSS_NCTF3 AE24 J33 VCC_5 VCC_SM_1 AT41 P41 VSS_4 VSS_101 AC34 AC23 VSS_184 VSS_277 AP10
D
W27 VCC_NCTF5 VSS_NCTF4 AE23 AA32 VCC_6 VCC_SM_2 AM41 M41 VSS_5 VSS_102 C34 W23 VSS_185 VSS_278 AL10 D
V27 VCC_NCTF6 VSS_NCTF5 AE22 Y32 VCC_7 VCC_SM_3 AU40 J41 VSS_6 VSS_103 AW33 K23 VSS_186 VSS_279 AJ10
U27 AE21 W32 BA34 C86 C85 F41 AV33 J23 AG10
VCC_NCTF7 VSS_NCTF6 VCC_8 VCC_SM_4 0.47UF/25V VSS_7 VSS_104 VSS_187 VSS_280
T27 VCC_NCTF8 VSS_NCTF7 AE20 V32 VCC_9 VCC_SM_5 AY34 AV40 VSS_8 VSS_105 AR33 F23 VSS_188 VSS_281 AC10
R27 AE19 P32 AW34 0.47UF/25V C_0805 AP40 AE33 C23 W10
VCC_NCTF9 VSS_NCTF8 VCC_10 VCC_SM_6 C_0805 VSS_9 VSS_106 VSS_189 VSS_282
AD26 VCC_NCTF10 VSS_NCTF9 AE18 N32 VCC_11 VCC_SM_7 AV34 AN40 VSS_10 VSS_107 AB33 AA22 VSS_190 VSS_283 U10
AC26 VCC_NCTF11 VSS_NCTF10 AC17 M32 VCC_12 VCC_SM_8 AU34 AK40 VSS_11 VSS_108 Y33 K22 VSS_191 VSS_284 BA9
AB26 VCC_NCTF12 VSS_NCTF11 Y17 L32 VCC_13 VCC_SM_9 AT34 AJ40 VSS_12 VSS_109 V33 G22 VSS_192 VSS_285 AW9
AA26 VCC_NCTF13 VSS_NCTF12 U17 J32 VCC_14 VCC_SM_10 AR34 AH40 VSS_13 VSS_110 T33 F22 VSS_193 VSS_286 AR9
Y26 VCC_NCTF14 AA31 VCC_15 VCC_SM_11 BA30 AG40 VSS_14 VSS_111 R33 E22 VSS_194 VSS_287 AH9
W26 VCC_NCTF15 W31 VCC_16 VCC_SM_12 AY30 AF40 VSS_15 VSS_112 M33 D22 VSS_195 VSS_288 AB9
V26 VCC_NCTF16 V31 VCC_17 VCC_SM_13 AW30 AE40 VSS_16 VSS_113 H33 A22 VSS_196 VSS_289 Y9
U26 VCC1R5B T31 AV30 B40 G33 BA21 R9
VCC_NCTF17 VCC_18 VCC_SM_14 VSS_17 VSS_114 VSS_197 VSS_290
T26 VCC_NCTF18 R31 VCC_19 VCC_SM_15 AU30 AY39 VSS_18 VSS_115 F33 AV21 VSS_198 VSS_291 G9
R26 VCC_NCTF19 VCCAUX_NCTF0 AG27 P31 VCC_20 VCC_SM_16 AT30 AW39 VSS_19 VSS_116 D33 AR21 VSS_199 VSS_292 E9
AD25 VCC_NCTF20 VCCAUX_NCTF1 AF27 N31 VCC_21 VCC_SM_17 AR30 AV39 VSS_20 VSS_117 B33 AN21 VSS_200 VSS_293 A9
AC25 VCC_NCTF21 VCCAUX_NCTF2 AG26 M31 VCC_22 VCC_SM_18 AP30 AR39 VSS_21 VSS_118 AH32 AL21 VSS_201 VSS_294 AG8
AB25 VCC_NCTF22 VCCAUX_NCTF3 AF26 AA30 VCC_23 VCC_SM_19 AN30 AN39 VSS_22 VSS_119 AG32 AB21 VSS_202 VSS_295 AD8
AA25 VCC_NCTF23 VCCAUX_NCTF4 AG25 Y30 VCC_24 VCC_SM_20 AM30 AJ39 VSS_23 VSS_120 AF32 Y21 VSS_203 VSS_296 AA8
Y25 VCC_NCTF24 VCCAUX_NCTF5 AF25 W30 VCC_25 VCC_SM_21 AM29 AC39 VSS_24 VSS_121 AE32 P21 VSS_204 VSS_297 U8
W25 VCC_NCTF25 VCCAUX_NCTF6 AG24 V30 VCC_26 VCC_SM_22 AL29 AB39 VSS_25 VSS_122 AC32 K21 VSS_205 VSS_298 K8
V25 VCC_NCTF26 VCCAUX_NCTF7 AF24 U30 VCC_27 VCC_SM_23 AK29 AA39 VSS_26 VSS_123 AB32 J21 VSS_206 VSS_299 C8
U25 VCC_NCTF27 VCCAUX_NCTF8 AG23 T30 VCC_28 VCC_SM_24 AJ29 Y39 VSS_27 VSS_124 G32 H21 VSS_207 VSS_300 BA7
T25 VCC_NCTF28 VCCAUX_NCTF9 AF23 R30 VCC_29 VCC_SM_25 AH29 W39 VSS_28 VSS_125 B32 C21 VSS_208 VSS_301 AV7
R25 VCC_NCTF29 VCCAUX_NCTF10 AG22 P30 VCC_30 VCC_SM_26 AJ28 V39 VSS_29 VSS_126 AY31 AW20 VSS_209 VSS_302 AP7
AD24 AF22 N30 AH28 T39 AV31 AR20 AL7
AC24
AB24
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
AG21
AF21
M30
L30
VCC_31
VCC_32
VCC_33
VCC_SM_27
VCC_SM_28
VCC_SM_29
AJ27
AH27
R39
P39
VSS_30
VSS_31
VSS_32
VSS_127
VSS_128
VSS_129
AN31
AJ31
AM20
AA20
VSS_210
VSS_211
VSS_212
VSS VSS_303
VSS_304
VSS_305
AJ7
AH7
AA24 AG20 AA29 BA26 N39 AG31 K20 AF7
Y24
W24
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
AF20
AG19
Y29
W29
VCC_34
VCC_35
VCC_36
VCC_SM_30
VCC_SM_31
VCC_SM_32
AY26
AW26
M39
L39
VSS_33
VSS_34
VSS_35
VSS VSS_130
VSS_131
VSS_132
AB31
Y31
B20
A20
VSS_213
VSS_214
VSS_215
VSS_306
VSS_307
VSS_308
AC7
R7
V24 VCC_NCTF36 VCCAUX_NCTF17 AF19 V29 VCC_37 VCC_SM_33 AV26 J39 VSS_36 VSS_133 AB30 AN19 VSS_216 VSS_309 G7
U24 VCC_NCTF37 VCCAUX_NCTF18 R19 U29 VCC_38 VCC_SM_34 AU26 H39 VSS_37 VSS_134 E30 AC19 VSS_217 VSS_310 D7
T24 VCC_NCTF38 VCCAUX_NCTF19 AG18 R29 VCC_39 VCC_SM_35 AT26 G39 VSS_38 VSS_135 AT29 W19 VSS_218 VSS_311 AG6
R24 VCC_NCTF39 VCCAUX_NCTF20 AF18 P29 VCC_40 VCC_SM_36 AR26 F39 VSS_39 VSS_136 AN29 K19 VSS_219 VSS_312 AD6
AD23 VCC_NCTF40 VCCAUX_NCTF21 R18 M29 VCC_41 VCC_SM_37 AJ26 D39 VSS_40 VSS_137 AB29 G19 VSS_220 VSS_313 AB6
V23 VCC_NCTF41 VCCAUX_NCTF22 AG17 L29 VCC_42 VCC_SM_38 AH26 AT38 VSS_41 VSS_138 T29 C19 VSS_221 VSS_314 Y6
U23 VCC_NCTF42 VCCAUX_NCTF23 AF17 AB28 VCC_43 VCC_SM_39 AJ25 C88 AM38 VSS_42 VSS_139 N29 AH18 VSS_222 VSS_315 U6
C T23 AE17 AA28 AH25 C87 AH38 K29 P18 N6 C
VCC_NCTF43 VCCAUX_NCTF24 VCC_44 VCC_SM_40 0.47UF/25V 10uF/10V VSS_43 VSS_140 VSS_223 VSS_316
R23 VCC_NCTF44 VCCAUX_NCTF25 AD17 Y28 VCC_45 VCC_SM_41 AJ24 AG38 VSS_44 VSS_141 G29 H18 VSS_224 VSS_317 K6
AD22 AB17 V28 AH24 C_0805 C_0805 AF38 E29 D18 H6
VCC_NCTF45 VCCAUX_NCTF26 VCC_46 VCC_SM_42 VSS_45 VSS_142 VSS_225 VSS_318
V22 VCC_NCTF46 VCCAUX_NCTF27 AA17 U28 VCC_47 VCC_SM_43 BA23 AE38 VSS_46 VSS_143 C29 A18 VSS_226 VSS_319 B6
U22 VCC_NCTF47 VCCAUX_NCTF28 W17 T28 VCC_48 VCC_SM_44 AJ23 C38 VSS_47 VSS_144 B29 AY17 VSS_227 VSS_320 AV5
T22 VCC_NCTF48 VCCAUX_NCTF29 V17 R28 VCC_49 VCC_SM_45 BA22 AK37 VSS_48 VSS_145 A29 AR17 VSS_228 VSS_321 AF5
R22 VCC_NCTF49 VCCAUX_NCTF30 T17 P28 VCC_50 VCC_SM_46 AY22 AH37 VSS_49 VSS_146 BA28 AP17 VSS_229 VSS_322 AD5
AD21 R17 N28 AW22 AB37 AW28 AM17 AY4
V21
U21
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
NCTF VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
AG16
AF16
M28
L28
VCC_51
VCC_52
VCC_53
VCC_SM_47
VCC_SM_48
VCC_SM_49
AV22
AU22
AA37
Y37
VSS_50
VSS_51
VSS_52
VSS_147
VSS_148
VSS_149
AU28
AP28
AK17
AV16
VSS_230
VSS_231
VSS_232
VSS_323
VSS_324
VSS_325
AR4
AP4
T21 VCC_NCTF53 VCCAUX_NCTF34 AE16 P27 VCC_54 VCC_SM_50 AT22 W37 VSS_53 VSS_150 AM28 AN16 VSS_233 VSS_326 AL4
R21 VCC_NCTF54 VCCAUX_NCTF35 AD16 N27 VCC_55 VCC_SM_51 AR22 V37 VSS_54 VSS_151 AD28 AL16 VSS_234 VSS_327 AJ4
AD20 VCC_NCTF55 VCCAUX_NCTF36 AC16 M27 VCC_56 VCC_SM_52 AP22 T37 VSS_55 VSS_152 AC28 J16 VSS_235 VSS_328 Y4
V20 VCC_NCTF56 VCCAUX_NCTF37 AB16 L27 VCC_57 VCC_SM_53 AK22 R37 VSS_56 VSS_153 W28 F16 VSS_236 VSS_329 U4
U20 VCC_NCTF57 VCCAUX_NCTF38 AA16 P26 VCC_58 VCC_SM_54 AJ22 P37 VSS_57 VSS_154 J28 C16 VSS_237 VSS_330 R4
T20 VCC_NCTF58 VCCAUX_NCTF39 Y16 N26 VCC_59 VCC_SM_55 AK21 N37 VSS_58 VSS_155 E28 AN15 VSS_238 VSS_331 J4
R20 VCC_NCTF59 VCCAUX_NCTF40 W16 L26 VCC_60 VCC_SM_56 AK20 M37 VSS_59 VSS_156 AP27 AM15 VSS_239 VSS_332 F4
AD19 VCC_NCTF60 VCCAUX_NCTF41 V16 N25 VCC_61 VCC_SM_57 BA19 L37 VSS_60 VSS_157 AM27 AK15 VSS_240 VSS_333 C4
V19 VCC_NCTF61 VCCAUX_NCTF42 U16 M25 VCC_62 VCC_SM_58 AY19 J37 VSS_61 VSS_158 AK27 N15 VSS_241 VSS_334 AY3
U19 VCC_NCTF62 VCCAUX_NCTF43 T16 L25 VCC_63 VCC_SM_59 AW19 H37 VSS_62 VSS_159 J27 M15 VSS_242 VSS_335 AW3
T19 VCC_NCTF63 VCCAUX_NCTF44 R16 P24 VCC_64 VCC_SM_60 AV19 G37 VSS_63 VSS_160 G27 L15 VSS_243 VSS_336 AV3
AD18 VCC_NCTF64 VCCAUX_NCTF45 AG15 N24 VCC_65 VCC_SM_61 AU19 F37 VSS_64 VSS_161 F27 B15 VSS_244 VSS_337 AL3
AC18 VCC_NCTF65 VCCAUX_NCTF46 AF15 M24 VCC_66 VCC_SM_62 AT19 D37 VSS_65 VSS_162 C27 A15 VSS_245 VSS_338 AH3
AB18 VCC_NCTF66 VCCAUX_NCTF47 AE15 AB23 VCC_67 VCC_SM_63 AR19 AY36 VSS_66 VSS_163 B27 BA14 VSS_246 VSS_339 AG3
AA18 AD15 AA23 AP19 AW36 AN26 AT14 AF3
Y18
W18
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
AC15
AB15
Y23
P23
VCC_68
VCC_69
VCC_70
VCC VCC_SM_64
VCC_SM_65
VCC_SM_66
AK19
AJ19
AN36
AH36
VSS_67
VSS_68
VSS_69
VSS_164
VSS_165
VSS_166
M26
K26
AK14
AD14
VSS_247
VSS_248
VSS_249
VSS_340
VSS_341
VSS_342
AD3
AC3
V18 VCC_NCTF70 VCCAUX_NCTF51 AA15 N23 VCC_71 VCC_SM_67 AJ18 AG36 VSS_70 VSS_167 F26 AA14 VSS_250 VSS_343 AA3
U18 VCC_NCTF71 VCCAUX_NCTF52 Y15 M23 VCC_72 VCC_SM_68 AJ17 AF36 VSS_71 VSS_168 D26 U14 VSS_251 VSS_344 G3
T18 VCC_NCTF72 VCCAUX_NCTF53 W15 L23 VCC_73 VCC_SM_69 AH17 AE36 VSS_72 VSS_169 AK25 K14 VSS_252 VSS_345 AT2
VCCAUX_NCTF54 V15 AC22 VCC_74 VCC_SM_70 AJ16 AC36 VSS_73 VSS_170 P25 H14 VSS_253 VSS_346 AR2
VCCAUX_NCTF55 U15 AB22 VCC_75 VCC_SM_71 AH16 C36 VSS_74 VSS_171 K25 E14 VSS_254 VSS_347 AP2
VCCAUX_NCTF56 T15 Y22 VCC_76 VCC_SM_72 BA15 B36 VSS_75 VSS_172 H25 AV13 VSS_255 VSS_348 AK2
VCCAUX_NCTF57 R15 W22 VCC_77 VCC_SM_73 AY15 BA35 VSS_76 VSS_173 E25 AR13 VSS_256 VSS_349 AJ2
P22 VCC_78 VCC_SM_74 AW15 AV35 VSS_77 VSS_174 D25 AN13 VSS_257 VSS_350 AD2
CALISTOGA N22 VCC_79 VCC_SM_75 AV15 AR35 VSS_78 VSS_175 A25 AM13 VSS_258 VSS_351 AB2
M22 VCC_80 VCC_SM_76 AU15 AH35 VSS_79 VSS_176 BA24 AL13 VSS_259 VSS_352 Y2
B
L22 VCC_81 VCC_SM_77 AT15 AB35 VSS_80 VSS_177 AU24 AG13 VSS_260 VSS_353 U2 B
AC21 VCC_82 VCC_SM_78 AR15 AA35 VSS_81 VSS_178 AL24 P13 VSS_261 VSS_354 T2
VCC1R05B AA21 AJ15 Y35 AW23 F13 N2
VCC_83 VCC_SM_79 VSS_82 VSS_179 VSS_262 VSS_355
W21 VCC_84 VCC_SM_80 AJ14 W35 VSS_83 D13 VSS_263 VSS_356 J2
N21 VCC_85 VCC_SM_81 AJ13 V35 VSS_84 B13 VSS_264 VSS_357 H2
CT6 M21 AH13 T35 AY12 F2
VCC_86 VCC_SM_82 VSS_85 VSS_265 VSS_358
C89 L21 VCC_87 VCC_SM_83 AK12 R35 VSS_86 AC12 VSS_266 VSS_359 C2
+ C90 C91 AC20 VCC_88 VCC_SM_84 AJ12 P35 VSS_87 K12 VSS_267 VSS_360 AL1
0.1UF/10V AB20 AH12 N35 H12
10uF/10V 10uF/10V VCC_89 VCC_SM_85 VSS_88 VSS_268
Y20 VCC_90 VCC_SM_86 AG12 M35 VSS_89 E12 VSS_269
C_0805 C_0805 W20 AK11 L35 AD11
220UF/4V/SANYO VCC_91 VCC_SM_87 VSS_90 VSS_270
P20 VCC_92 VCC_SM_88 BA8 J35 VSS_91 AA11 VSS_271
N20 VCC_93 VCC_SM_89 AY8 H35 VSS_92 Y11 VSS_272
TAJ_E M20 AW8 G35
VCC_94 VCC_SM_90 VSS_93
L20 VCC_95 VCC_SM_91 AV8 F35 VSS_94 CALISTOGA
AB19 VCC_96 VCC_SM_92 AT8 D35 VSS_95
AA19 VCC_97 VCC_SM_93 AR8 AN34 VSS_96
Y19 VCC_98 VCC_SM_94 AP8
VCC1R05B N19 BA6
VCC_99 VCC_SM_95 CALISTOGA
M19 VCC_100 VCC_SM_96 AY6
L19 VCC_101 VCC_SM_97 AW6
N18 VCC_102 VCC_SM_98 AV6
M18 VCC_103 VCC_SM_99 AT6
C92 C93 C94 L18 AR6 VCC1R8A
VCC_104 VCC_SM_100
P17 VCC_105 VCC_SM_101 AP6
0.22UF/10V 0.22UF/10V 0.22UF/10V N17 AN6
C_0402 C_0402 C_0402 VCC_106 VCC_SM_102
M17 VCC_107 VCC_SM_103 AL6
N16 VCC_108 VCC_SM_104 AK6
M16 VCC_109 VCC_SM_105 AJ6
L16 VCC_110 VCC_SM_106 AV1
VCC1R5B AJ1
VCC_SM_107

CALISTOGA
C99 C100 C101 C102 0.47UF/25V C96
C97 C98 C_0805

0.1UF/10V 0.1UF/10V0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V

A A
VCC1R5B
LENOVO.PND
VCC1R8A
C103 C104 C105 C106 C107 C108
NB system design section
Title
C821 C822 C823 C824 C825 C826 945GM-4
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
Size Document Number
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V C Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 9 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

M_A_DQ[63:0] 8
CON1 CON2
8 M_A_A[13:0] 8 M_B_A[13:0] M_B_DQ[63:0] 8
M_A_A0 102 5 M_A_DQ0 M_B_A0 102 5 M_B_DQ0
M_A_A1 A0 DQ0 M_A_DQ1 M_B_A1 A0 DQ0 M_B_DQ1
101 A1 DQ1 7 101 A1 DQ1 7
M_A_A2 100 17 M_A_DQ2 M_B_A2 100 17 M_B_DQ2
M_A_A3 A2 DQ2 M_A_DQ3 M_B_A3 A2 DQ2 M_B_DQ3
99 A3 DQ3 19 99 A3 DQ3 19
M_A_A4 98 4 M_A_DQ4 M_B_A4 98 4 M_B_DQ4
M_A_A5 A4 DQ4 M_A_DQ5 M_B_A5 A4 DQ4 M_B_DQ5 VCC0R9B
97 A5 DQ5 6 97 A5 DQ5 6
M_A_A6 94 14 M_A_DQ6 M_B_A6 94 14 M_B_DQ6
M_A_A7 A6 DQ6 M_A_DQ7 M_B_A7 A6 DQ6 M_B_DQ7 RN12 56 X4 +-5%
92 A7 DQ7 16 92 A7 DQ7 16
M_A_A8 93 23 M_A_DQ8 M_B_A8 93 23 M_B_DQ8 0.1UF/10V C109 1 2 M_B_WE#
M_A_A9 A8 DQ8 M_A_DQ9 M_B_A9 A8 DQ8 M_B_DQ9 C_0402 M_B_A13
91 A9 DQ9 25 91 A9 DQ9 25 3 4
M_A_A10 105 35 M_A_DQ10 M_B_A10 105 35 M_B_DQ10 0.1UF/10V C110 5 6 M_ODT2
M_A_A11 A10/AP DQ10 M_A_DQ11 M_B_A11 A10/AP DQ10 M_B_DQ11 C_0402 M_B_CAS#
90 A11 DQ11 37 90 A11 DQ11 37 7 8
M_A_A12 89 20 M_A_DQ12 M_B_A12 89 20 M_B_DQ12
M_A_A13 A12 DQ12 M_A_DQ13 M_B_A13 A12 DQ12 M_B_DQ13 RN13 56 X4 +-5%
D
116 A13 DQ13 22 116 A13 DQ13 22 D
86 36 M_A_DQ14 86 36 M_B_DQ14 0.1UF/10V C111 1 2 M_B_BS#1
A14 DQ14 M_A_DQ15 A14 DQ14 M_B_DQ15 C_0402 M_B_BS#0
84 A15 DQ15 38 84 A15 DQ15 38 3 4
85 43 M_A_DQ16 85 43 M_B_DQ16 0.1UF/10V C112 5 6 M_CS#2
8 M_A_BS#2 A16_BA2 DQ16 8 M_B_BS#2 A16_BA2 DQ16
45 M_A_DQ17 45 M_B_DQ17 C_0402 7 8 M_B_RAS#
DQ17 M_A_DQ18 DQ17 M_B_DQ18
8 M_A_BS#0 107 BA0 DQ18 55 8 M_B_BS#0 107 BA0 DQ18 55
106 57 M_A_DQ19 106 57 M_B_DQ19 RN14 56 X4 +-5%
8 M_A_BS#1 BA1 DQ19 8 M_B_BS#1 BA1 DQ19
110 44 M_A_DQ20 110 44 M_B_DQ20 0.1UF/10V C113 1 2 M_B_A2
6 M_CS#0 S0# DQ20 6 M_CS#2 S0# DQ20
115 46 M_A_DQ21 115 46 M_B_DQ21 C_0402 3 4 M_B_A0
6 M_CS#1 S1# DQ21 6 M_CS#3 S1# DQ21
30 56 M_A_DQ22 30 56 M_B_DQ22 0.1UF/10V C114 5 6 M_B_A1
6 M_CLK_DDR0 CK0 DQ22 6 M_CLK_DDR4 CK0 DQ22
32 58 M_A_DQ23 32 58 M_B_DQ23 C_0402 7 8 M_B_A10
6 M_CLK_DDR#0 CK0# DQ23 6 M_CLK_DDR#4 CK0# DQ23
164 61 M_A_DQ24 164 61 M_B_DQ24
6 M_CLK_DDR1 CK1 DQ24 6 M_CLK_DDR3 CK1 DQ24
166 63 M_A_DQ25 166 63 M_B_DQ25 RN15 56 X4 +-5%
6 M_CLK_DDR#1 CK1# DQ25 6 M_CLK_DDR#3 CK1# DQ25
79 73 M_A_DQ26 79 73 M_B_DQ26 0.1UF/10V C115 1 2 M_CKE1
6 M_CKE0 CKE0 DQ26 6 M_CKE2 CKE0 DQ26
80 75 M_A_DQ27 80 75 M_B_DQ27 C_0402 3 4 M_CKE0
6 M_CKE1 CKE1 DQ27 6 M_CKE3 CKE1 DQ27
113 62 M_A_DQ28 113 62 M_B_DQ28 0.1UF/10V C116 5 6 M_A_BS#2
8 M_A_CAS# CAS# DQ28 8 M_B_CAS# CAS# DQ28
108 64 M_A_DQ29 108 64 M_B_DQ29 C_0402 7 8 M_A_A12
8 M_A_RAS# RAS# DQ29 8 M_B_RAS# RAS# DQ29
109 74 M_A_DQ30 109 74 M_B_DQ30
8 M_A_WE# WE# DQ30 8 M_B_WE# WE# DQ30
R138 10K +-5% R_0603 SA0_DIM1 198 76 M_A_DQ31 R139 10K +-5% R_0603 SA0_DIM2 198 76 M_B_DQ31 RN16 56 X4 +-5%
R140 10K +-5% R_0603 SA1_DIM1 SA0 DQ31 M_A_DQ32 VCC3B R141 10K +-5% R_0603 SA1_DIM2 SA0 DQ31 M_B_DQ32 0.1UF/10V C117 M_A_A11
200 SA1 DQ32 123 200 SA1 DQ32 123 1 2
197 125 M_A_DQ33 197 125 M_B_DQ33 C_0402 3 4 M_A_A7
2,27 SMB_CLK_3B SCL DQ33 2,27 SMB_CLK_3B SCL DQ33
195 135 M_A_DQ34 195 135 M_B_DQ34 0.1UF/10V C118 5 6 M_A_A9
2,27 SMB_DATA_3B SDA DQ34 2,27 SMB_DATA_3B SDA DQ34
137 M_A_DQ35 137 M_B_DQ35 C_0402 7 8 M_A_A6
DQ35 M_A_DQ36 DQ35 M_B_DQ36
6 M_ODT0 114 ODT0 DQ36 124 6 M_ODT2 114 ODT0 DQ36 124
119 126 M_A_DQ37 119 126 M_B_DQ37 RN17 56 X4 +-5%
6 M_ODT1 ODT1 DQ37 6 M_ODT3 ODT1 DQ37
134 M_A_DQ38 134 M_B_DQ38 0.1UF/10V C119 1 2 M_B_A6
8 M_A_DM[7:0] DQ38 8 M_B_DM[7:0] DQ38
M_A_DM0 10 136 M_A_DQ39 M_B_DM0 10 136 M_B_DQ39 C_0402 3 4 M_B_A4
M_A_DM1 DM0 DQ39 M_A_DQ40 M_B_DM1 DM0 DQ39 M_B_DQ40 0.1UF/10V C120 M_B_A3
26 DM1 DQ40 141 26 DM1 DQ40 141 5 6
M_A_DM2 52 143 M_A_DQ41 M_B_DM2 52 143 M_B_DQ41 C_0402 7 8 M_B_A5
M_A_DM3 DM2 DQ41 M_A_DQ42 M_B_DM3 DM2 DQ41 M_B_DQ42
67 DM3 DQ42 151 67 DM3 DQ42 151

SO-DIMM (200P)

SO-DIMM (200P)
M_A_DM4 130 153 M_A_DQ43 M_B_DM4 130 153 M_B_DQ43
M_A_DM5 DM4 DQ43 M_A_DQ44 M_B_DM5 DM4 DQ43 M_B_DQ44
147 DM5
DDRII SDRAM DQ44 140 147 DM5 DQ44 140

DDRII SDRAM
M_A_DM6 170 142 M_A_DQ45 M_B_DM6 170 142 M_B_DQ45
M_A_DM7 DM6 DQ45 M_A_DQ46 M_B_DM7 DM6 DQ45 M_B_DQ46
185 DM7 DQ46 152 185 DM7 DQ46 152
154 M_A_DQ47 154 M_B_DQ47
8 M_A_DQS[7:0] DQ47 8 M_B_DQS[7:0] DQ47
M_A_DQS0 13 157 M_A_DQ48 M_B_DQS0 13 157 M_B_DQ48
M_A_DQS1 DQS0 DQ48 M_A_DQ49 M_B_DQS1 DQS0 DQ48 M_B_DQ49 RN18 56 X4 +-5%
31 DQS1 DQ49 159 31 DQS1 DQ49 159
M_A_DQS2 51 173 M_A_DQ50 M_B_DQS2 51 173 M_B_DQ50 0.1UF/10V C121 1 2 M_B_A8
M_A_DQS3 DQS2 DQ50 M_A_DQ51 M_B_DQS3 DQS2 DQ50 M_B_DQ51 C_0402 M_B_A9
C 70 DQS3 DQ51 175 70 DQS3 DQ51 175 3 4 C
M_A_DQS4 131 158 M_A_DQ52 M_B_DQS4 131 158 M_B_DQ52 0.1UF/10V C122 5 6 M_B_A11
M_A_DQS5 DQS4 DQ52 M_A_DQ53 M_B_DQS5 DQS4 DQ52 M_B_DQ53 C_0402 M_B_A7
148 DQS5 DQ53 160 148 DQS5 DQ53 160 7 8
M_A_DQS6 169 174 M_A_DQ54 M_B_DQS6 169 174 M_B_DQ54
M_A_DQS7 DQS6 DQ54 M_A_DQ55 M_B_DQS7 DQS6 DQ54 M_B_DQ55 RN19 56 X4 +-5%
8 M_A_DQS#[7:0] 188 DQS7 DQ55 176 8 M_B_DQS#[7:0] 188 DQS7 DQ55 176
M_A_DQS#0 11 179 M_A_DQ56 M_B_DQS#0 11 179 M_B_DQ56 0.1UF/10V C123 1 2 M_CKE2
M_A_DQS#1 DQS#0 DQ56 M_A_DQ57 M_B_DQS#1 DQS#0 DQ56 M_B_DQ57 C_0402 M_B_BS#2
29 DQS#1 DQ57 181 29 DQS#1 DQ57 181 3 4
M_A_DQS#2 49 189 M_A_DQ58 M_B_DQS#2 49 189 M_B_DQ58 0.1UF/10V C124 5 6 M_CKE3
M_A_DQS#3 DQS#2 DQ58 M_A_DQ59 M_B_DQS#3 DQS#2 DQ58 M_B_DQ59 C_0402 M_B_A12
68 DQS#3 DQ59 191 68 DQS#3 DQ59 191 7 8
M_A_DQS#4 129 180 M_A_DQ60 M_B_DQS#4 129 180 M_B_DQ60
M_A_DQS#5 DQS#4 DQ60 M_A_DQ61 M_B_DQS#5 DQS#4 DQ60 M_B_DQ61 RN20 56 X4 +-5%
146 DQS#5 DQ61 182 146 DQS#5 DQ61 182
M_A_DQS#6 167 192 M_A_DQ62 M_B_DQS#6 167 192 M_B_DQ62 0.1UF/10V C125 1 2 M_CS#0
M_A_DQS#7 DQS#6 DQ62 M_A_DQ63 M_B_DQS#7 DQS#6 DQ62 M_B_DQ63 C_0402 M_A_CAS#
186 DQS#7 DQ63 194 186 DQS#7 DQ63 194 3 4
0.1UF/10V C126 5 6 M_ODT0
VCC1R8A 112 18 112 18 C_0402 7 8 M_A_A13
VDD1 VSS16 VCC1R8A VDD1 VSS16
111 VDD2 VSS17 24 111 VDD2 VSS17 24
117 VDD3 VSS18 41 117 VDD3 VSS18 41
96 53 96 53 0.1UF/10V C127 R142 R_0402 M_CS#3
VDD4 VSS19 VDD4 VSS19 C_0402 56 +-5%
95 VDD5 VSS20 42 95 VDD5 VSS20 42
118 54 118 54 R143 R_0402 M_ODT3
VDD6 VSS21 VDD6 VSS21 56 +-5%
81 VDD7 VSS22 59 81 VDD7 VSS22 59
82 65 82 65 RN21 56 X4 +-5%
VDD8 VSS23 VDD8 VSS23 0.1UF/10V C128 M_A_A10
87 VDD9 VSS24 60 87 VDD9 VSS24 60 1 2
103 66 103 66 C_0402 3 4 M_A_RAS#
VCC3B VDD10 VSS25 VCC3B VDD10 VSS25 0.1UF/10V C129 M_A_BS#0
88 VDD11 VSS26 127 88 VDD11 VSS26 127 5 6
104 139 104 139 C_0402 7 8 M_A_WE#
VDD12 VSS27 VDD12 VSS27
VSS28 128 VSS28 128
199 145 199 145 RN22 56 X4 +-5%
VDDSPD VSS29 VDDSPD VSS29 0.1UF/10V C130 M_A_A3
VSS30 165 VSS30 165 1 2
C131 C132 83 171 C133 C134 83 171 C_0402 3 4 M_A_A0
NC1 VSS31 NC1 VSS31 0.1UF/10V C135 M_A_A1
6 MEM_TS# 120 NC2 VSS32 172 120 NC2 VSS32 172 5 6
0.1UF/10V 2.2UF/6.3V 50 177 0.1UF/10V 2.2UF/6.3V 50 177 C_0402 7 8 M_A_BS#1
NC3 VSS33 6 MEM_TS# NC3 VSS33
C_0402 69 187 C_0402 69 187
NC4 VSS34 NC4 VSS34 RN23 56 X4 +-5%
163 NCTEST VSS35 178 163 NCTEST VSS35 178
R144 R_0402 0 +-5% 190 R145 R_0402 0 +-5% 190 0.1UF/10V C136 1 2 M_A_A8
M_VREF VSS36 DDR2_VREF VSS36 C_0402
1 VREF VSS37 9 1 VREF VSS37 9 3 4 M_A_A4
DDR2_VREF 21 21 0.1UF/10V C137 5 6 M_A_A5
VSS38 VSS38 C_0402
B C138 C139 201 GND0 VSS39 33 201 GND0 VSS39 33 7 8 M_A_A2 B
202 GND1 VSS40 155 C140 C141 202 GND1 VSS40 155
0.1UF/10V 2.2UF/6.3V 34 34
VSS41 0.1UF/10V 2.2UF/6.3V VSS41 0.1UF/10V C142 R146 R_0402 M_CS#1
VSS42 132 VSS42 132
47 144 47 144 C_0402 56 +-5%
C_0402 VSS1 VSS43 VSS1 VSS43 R147 R_0402 M_ODT1
133 VSS2 VSS44 156 133 VSS2 VSS44 156
183 168 C_0402 183 168 56 +-5%
VSS3 VSS45 VSS3 VSS45
77 VSS4 VSS46 2 77 VSS4 VSS46 2
12 VSS5 VSS47 3 12 VSS5 VSS47 3
48 VSS6 VSS48 15 48 VSS6 VSS48 15
184 VSS7 VSS49 27 184 VSS7 VSS49 27
78 VSS8 VSS50 39 78 VSS8 VSS50 39
71 VSS9 VSS51 149 71 VSS9 VSS51 149
72 VSS10 VSS52 161 72 VSS10 VSS52 161
121 VSS11 VSS53 28 121 VSS11 VSS53 28
122 VSS12 VSS54 40 122 VSS12 VSS54 40
196 VSS13 VSS55 138 196 VSS13 VSS55 138
193 VSS14 VSS56 150 193 VSS14 VSS56 150
8 VSS15 VSS57 162 8 VSS15 VSS57 162

AS0A426-N4SN-7F AS0A426-N4RN-7F

VCC1R8A

CT27

+ C155 C156 C157 C158 C159 C160 C161 C162 C163 C164 C165 C166
NS
2.2UF/6.3V
0.1UF/10V 2.2UF/6.3V0.1UF/10V 2.2UF/6.3V
0.1UF/10V 2.2UF/6.3V
0.1UF/10V 2.2UF/6.3V
0.1UF/10V 2.2UF/6.3V
0.1UF/10V
C_0402 C_0402 C_0402 C_0402 C_0402 C_0402
220UF/4V/SANYO
TAJ_E

A A

VCC1R8A LENOVO.PND
NB system design section
Title
DDRII SLOT
C143 C144 C145 C146 C147 C148 C149 C150 C151 C152 C153 C154 Size Document Number
2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V C Rev s1.3
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V Whistler
C_0402 C_0402 C_0402 C_0402 C_0402 C_0402
Date: Friday, April 28, 2006 Sheet 10 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

Consider VCCRTC sources

C167 Cap values depend on Xtal

RTC_VCC
Y2
R149 6PF/50V 32.768KHZ

1
C168 R148
180K +-5% 2 3 10M +-5%
D
1UF/10V R_0603 R_0603 D
C169
C_0603
0.1UF/10V C170 VCC3B

4
C_0402 U5A
LPC_AD[0..3] 27,29,31,33,35
RTC_X1 AB1 AA6 LPC_AD0 LDRQ0# R151 10K +-5%R_0402
RTC_X2 RTXC1 LAD0 LPC_AD1 NS
AB2 RTCX2 LAD1 AB5
R150 1M +-5% 6PF/50V AC4 LPC_AD2 LDRQ1# R152 10K +-5%
R_0402

LPC
RTC
RTC_VCC NS RTC_RST# LAD2 LPC_AD3 NS
AA3 RTCRST# LAD3 Y6
1M +-5%
R156 R153 LDRQ0#
VCC3SW Y5 INTRUDER# LDRQ0# AC3 LDRQ0# 31
W4 AA5 LDRQ1#
R_0402 Layout Note: RTC_VCC INTVRMEN LDRQ1#/GPIO23 VCC1R05B
Place all series W1 EE_CS LFRAME# AB3 LPC_FRAME# 27,29,31,33,35
resistors 0.6 to 2.6 332KOHM +-1% Y1 VCC1R05B
EE_SHCLK R155
inches from the Y2 EE_DOUT A20GATE AE22 GATEA20 13,33
W3 EE_DIN A20M# AH28 H_A20M# 3
ICH 56 +-5%
V3 AG27 R158
C175 LAN_CLK CPUSLP#
56 +-5%
AZ_BITCLK_AUD 10PF/50V U3 AF24 H_DPRSTP#_R R159 R_0402 0 +-5%

LAN
CPU
LAN_RSTSYNC TP1/DPRSTP# H_DPRSLP# 3,45
AH25 H_DPSLP#_R R160 R_0402 0 +-5%
TP2/DPSLP# H_DPSLP# 3
U5 LAN_RXD0
C17710PF/50V H_FERR_R
V4 LAN_RXD1 FERR# AG26 H_FERR# 3
AZ_BITCLK_MDC T5 LAN_RXD2
GPIO49/CPUPWRGD AG24 H_PWRGD 3
U7 LAN_TXD0
CLOSE TO ICH V6 LAN_TXD1
V7 LAN_TXD2 IGNNE# AG22 H_IGNNE# 3
ACZ_SYNC R162 39 +-5% AG21
C
PORT X LINE R? 19 AZ_BITCLK_AUD R163 39 +-5% ACZ_BITCLK_R INIT3_3V# FWH_INIT# 29 C
18 AZ_BITCLK_MDC U1 ACZ_BIT_CLK INIT# AF22 H_INIT# 3
R164 39 +-5% ACZ_SYNC_R

AC-97/AZALIA
1 STUFF R6 AF25 H_INTR 3
1X2, 2X1 19 AZ_SYNC R885 39 +-5% ACZ_SYNC INTR
18 AZ_SYNC_MDC
R165 39 +-5% ACZ_RST#_R R5 AG23
0 4X1 UNSTUFF 19 AZ_RESET# R1071 39 +-5% ACZ_RST# RCIN# RCIN# 13,34
VCC1R05B
18 AZ_MDC_RESET#
19 AZ_SDIN0 T2 ACZ_SDIN0 NMI AH24 H_NMI 3
18 AZ_SDIN1 T3 ACZ_SDIN1 SMI# AF23 H_SMI# 3
Default is Azalia TP23 1 TP_ACZ_SDIN[2] T1 R166
1 ACZ_SDIN2
STPCLK# AH22 H_STPCLK# 3 56 +-5%
R167 39 +-5% ACZ_SDO_R R169
T4
R168 39 +-5% 19 AZ_SDOUT ACZ_SDOUT
AF26 PM_THRMTRIP#_R
18 AZ_SDOUT_MDC THERMTRIP# PM_THRMTRIP# 3,6
35 DASPHDD# AF18 SATALED# 24.9 +-1%
SDD[0..15] 17
C1713900PF/50V AF3 AB15 SDD0
17 SATA_RXN0 3900PF/50V C172 SATA0RXN DD0 SDD1
17 SATA_RXP0 AE3 SATA0RXP DD1 AE14
C1733900PF/50V AG2 AG13 SDD2
17 SATA_TXN0 3900PF/50V C174 SATA0TXN DD2 SDD3
17 SATA_TXP0 AH2 SATA0TXP DD3 AF13
AD14 SDD4
DD4 SDD5
AF7 SATA2RXN DD5 AC13
AE7 AD12 SDD6
T1 SATA2RXP DD6 SDD7
AG6 SATA2TXN DD7 AC12
T2 AH6 AE12 SDD8
SATA2TXP DD8 SDD9 C176
DD9 AF12
AF1 AB13 SDD10

SATA
2 CLK_SATA_ICH# SATA_CLKN DD10 SDD11 100PF/50V
2 CLK_SATA_ICH AE1 SATA_CLKP DD11 AC14
AF14 SDD12
R170 DD12
AH10 AH13 SDD13
SATARBIASN DD13 SDD14
AG10 SATARBIASP DD14 AH14
20 +-1% AC15 SDD15
B R_0603 DD15 B
SDIOR# SDA0
17 SDIOR#
SDIOW#
AF15
AH15
DIOR# IDE DA0 AH17
AE17 SDA1
SDA0 17
17 SDIOW# DIOW# DA1 SDA1 17
SDDACK# AF16 AF17 SDA2
17 SDDACK# DDACK# DA2 SDA2 17
IRQ14 AH16
13,17 IRQ14 IDEIRQ
SIORDY R171 54.9 +-1% AG16 AE16
17 SIORDY# IORDY DCS1# CS0S# 17
SDDREQ AE15 AD16
17 SDDREQ DDREQ DCS3# CS1S# 17
VCC3SW ICH7M

2 1
D13 RB520S-30TE61-GP
RTC_VCC
BAT_D 2 1
D14 RB520S-30TE61-GP

R340
1K +-5%
R_0603
BAT

CON11 LENOVO.PND
2
1

JBAT1 NB system design section


A CONN RTC 2PIN 1734261 TYCO Title A

ICH7M-1
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 11 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

PLANARID CHANGE TO 1101 FOR SVT VCC3B


U5C
U5B C22 AF19 R174 10K +-5%R_0402
25 AD[31:0] 22,27 SMB_CLK SMBCLK GPIO21/SATA0GP
AD0 E18 D7 B22 AH18 R176 10K +-5%R_0402 NS R179 10K +-5%R_0603

SMB
AD0 REQ0# REQ0# 13,25 22,27 SMB_DATA SMBDATA GPIO19/SATA1GP
AD1 AH19PLANARID0R178 10K +-5%R_0402 PLANARID0

SATA
GPIO
C18 AD1 PCI GNT0# E7 GNT0# 25 13 SMB_LINK_ALERT# A26 LINKALERT# GPIO36/SATA2GP
AD2 A16 C16 B25 AE19 PLANARID1R180 10K +-5%R_0402 NS NS
AD2 REQ1# REQ1# 13 13 SMLINK0 SMLINK0 GPIO37/SATA3GP
AD3 F18 D16 A25 R181 10K +-5%R_0603
AD3 GNT1# 13 SMLINK1 SMLINK1
AD4 E16 C17 AC1 PLANARID1
AD4 REQ2# REQ2# 13 CLK14 CLK14_ICH7 2
AD5

Clocks
A18 AD5 GNT2# D17 13,25 RI# A28 RI# CLK48 B2 CLK48_USB 2
AD6 E17 E13
AD6 REQ3# REQ3# 13
AD7 A17 F13 1 TP25 20 ICH_SPKR A19 C20
AD8 AD7 GNT3# 1 SPKR SUSCLK SUSCLK_32K 33,35
A15 AD8 REQ4#/GPIO22 A13 FWH_WP# 13 31,33,35 SUS_STAT# A27 SUS_STAT#
AD9 C14 A14 A22 B24
AD9 GNT4#/GPIO48 FWH_TBL# 3,13 ITP_DBR# SYS_RST# SLP_S3# ICH_SLP_S3# 35
AD10 E14 C8 D23
AD10 GPIO1/REQ5# HDD_DTCT# 13,17 SLP_S4# ICH_SLP_S4# 35
D AD11 D14 D8 R184 1K +-5% AB18 F22 TP_SLP_S5#
1 1 D
AD11 GPIO17/GNT5# 6 PM_BMBUSY# GPIO0/BM_BUSY# SLP_S5#
AD12 B12 TP27 R187 10K +-1%
AD13 AD12 PWROK NS
C13 AD13 C/BE0# B15 C/BE0# 25 13 SMB_ALERT# B23 GPIO11/SMBALERT# PWROK AA4 BPWRG 5,6,27,34,35,36,43
AD14 G15 C12 R185 0 +-5%

Power MGT
AD14 C/BE1# C/BE1# 25
499 +-1% DPRSLPVR 6
AD15
AD16
G13
E12
AD15 C/BE2# D12
C15
C/BE2# 25 R184,FWH..SPI22 STP_PCI# AC20
AF21
GPIO18/STPPCI# GPIO16/DPRSLPVR AC22PM_DPRSLPVR_R R186
DPRSLPVR_IMVP 45

GPIO
AD16 C/BE3# C/BE3# 25 STP_CPU# GPIO20/STPCPU#
AD17 C11 C21 R188 8.2K +-5%

SYS
AD18 AD17 TP0/BATLOW# BATLOW# 13,34 NS
D11 AD18 IRDY# A7 IRDY# 13,25 A21 GPIO26
AD19 A11 E10 C23
AD19 PAR PAR 25 PWRBTN# PWRSW_H8# 34
AD20 A10 B18 R895 33 +-5% B21
AD20 PCIRST# PCIRST# 25,26,27,31 GPIO27
AD21 F11 A12 E23 R189 10K +-1% NS
AD21 DEVSEL# DEVSEL# 13,25 GPIO28
AD22 F10 C9 C19 R190 0 +-5%
AD22 PERR# PERR# 13,25 LAN_RST# PLT_RST# 6,18,22,27,29,33,35
AD23 E9 E11 AG18 R191 0 +-5% NS
AD23 PLOCK# LOCK# 13 13,25,27,31,33,35 CLKRUN# GPIO32/CLKRUN# MPWRG 33,35,36,39
AD24 D9 B10 Y4 RSMRST# VCC3M
AD24 SERR# SERR# 13,25 RSMRST# MPWRG 33,35,36,39
AD25 B9 F15 AC19
AD25 STOP# STOP# 13,25 GPIO33/AZ_DOCK_EN#
AD26 A8 F14 R192 0 +-5% U2 E20 R193 102K +-1%
AD26 TRDY# TRDY# 13,25 27 SMB_3B_EN GPIO34/AZ_DOCK_RST# GPIO9
AD27 A6 F16 A20
AD28 AD27 FRAME# FRAME# 13,25 GPIO10 R194 R195
C7 AD28 13,18,22,35 PCIE_WAKE# F20 WAKE# GPIO12 F19 H8SCI# 33
AD29 B6 C26 AH21 E19 102K +-1% 102K +-1%
AD29 PLTRST# PLT_RST# 6,18,22,27,29,33,35 13,25,27,31,33,35 SERIRQ SERIRQ GPIO13
AD30 E6 A9 PCLK_ICH7 AF20 R4 R949 10K +-5%
AD30 PCICLK PCLK_ICH7 2 5,13,35 PM_THRM# THRM# GPIO14 VCC3B
AD31 D6 B19 E22 R950 10K +-5% NS R_0603
AD31 PME# ICH_PME# 13,25 GPIO15
AD22 R3 R196 10K +-5% R_0603
45 VR_PWRGD VRMPWRGD GPIO24

13,25 PIRQA# A3
Interrupt I/F
PIRQA# GPIO2/PIRQE# G8 PIRQE#

13
R986 1K +-1% AC21 GPIO6
GPIO25
GPIO35
D20
AD21
R197 0 +-5%
R199 0 +-5% MDC_KILL# 18
CLKREQ_SATA# 2 MDI_DETECT 22
B4 F7 R_0402 AC18 AD20 PLANARID2
13,25 PIRQB#
C5
PIRQB# GPIO3/PIRQF#
F8
PIRQF# 13 BDC_PRESENCE# KBSMI# E21
GPIO7 GPIO GPIO38
AE20 PLANARID3
13 PIRQC# PIRQC# GPIO4/PIRQG# PIRQG# 13 33 H8WAKE# GPIO8 GPIO39
13 PIRQD# B5 PIRQD# GPIO5/PIRQH# G7 PIRQH# 13
ICH7M VCC3B VCC3B

100K +-5%
R198 R200
MISC

100K +-5%
AE5 AE9 RSVD6_R R204 R205
RSVD[1] RSVD[6]
AD5 RSVD[2] RSVD[7] AG8 1 1 TP28 102K +-1% 102K +-1%
AG4 RSVD[3] RSVD[8] AH8 1 1 TP29
AH4 F21 VCC3B PHASE PLANARID[3:0] R_0603
C RSVD[4] RSVD[9] C
AD9 RSVD[5] MCH_SYNC# AH20 MCH_SYNC# 6,13
SDV 1010(0Ah)
ICH7M GNT5# GNT4#
SIT1 1011(0Bh)
LPC H H SIT2 1100(0Ch) R208 R209
SVT 1101(0Dh) 10K +-1%
NS
10K +-1%
NS
PCI H L

SPI L H

U5D
22 PCIE_GBE_RXN F26 PERn1 DMI0RXN V26 DMI_RXN0 6
F25 V25

Direct Media Interface


22 PCIE_GBE_RXP PERp1 DMI0RXP DMI_RXP0 6
C180 0.1UF/16V E28 U28
22 PCIE_GBE_TXN PETn1 DMI0TXN DMI_TXN0 6
C181 0.1UF/16V E27 U27
22 PCIE_GBE_TXP PETp1 DMI0TXP DMI_TXP0 6

18 PCIE_WLAN_RXN H26 PERn2 DMI1RXN Y26 DMI_RXN1 6


18 PCIE_WLAN_RXP H25 PERp2 DMI1RXP Y25 DMI_RXP1 6
C182 0.1UF/16V G28 W28
18 PCIE_WLAN_TXN PETn2 DMI1TXN DMI_TXN1 6
C183 0.1UF/16V G27 W27
18 PCIE_WLAN_TXP PETp2 DMI1TXP DMI_TXP1 6

PCI-Express
K26 PERn3 DMI2RXN AB26 DMI_RXN2 6
K25 PERp3 DMI2RXP AB25 DMI_RXP2 6
J28 PETn3 DMI2TXN AA28 DMI_TXN2 6
PCLK_ICH7 J27 AA27
PETp3 DMI2TXP DMI_TXP2 6
CLK14_ICH7 VCC1R5B
M26 PERn4 DMI3RXN AD25 DMI_RXN3 6
CLK48_USB M25 AD24
PERp4 DMI3RXP DMI_RXP3 6
B R216 L28 AC28 B
PETn4 DMI3TXN DMI_TXN3 6
R217 R218 VCC3M L27 AC27 R212
33 +-5% PETp4 DMI3TXP DMI_TXP3 6 24.9 +-1% Place within 500 mils of ICH
22 +-5% 10 +-5%
P26 AE28 CLK_PCIE_ICH# 2 R_0603
R_0603 PERn5 DMI_CLKN
C186 P25 PERp5 DMI_CLKP AE27 CLK_PCIE_ICH 2
C187 N28
10PF/50V C188 PETn5
N27 PETp5 DMI_ZCOMP C25
C_0402 22PF/50V 5PF R213 R214 R215 D25 DMI_IRCOMP_R
DMI_IRCOMP
C_0402 T25 PERn6
T24 PERp6 USBP0N F1 USBP0- 14
10K +-5% 10K +-5% 10K +-5% R28 F2
PETn6 USBP0P USBP0+ 14
R27 PETp6 USBP1N G4 USBP1- 14 0 : SYS Port (Back)
USBP1P G3 USBP1+ 14
R2 H1 1 : SYS Port (Back)
28 SPI_CLK SPI_CLK USBP2N USBP2- 14
28 SPI_CS# P6 SPI_CS# USBP2P H2 USBP2+ 14 2 : SYS Port (Left)
P1 J4
4usb
SPI

SPI_ARB USBP3N USBP3- 18 3 : PCIE_Port


J3
!!!
USBP3P USBP3+ 18
28 SPI_MOSI P5 SPI_MOSI USBP4N K1 USBP4- 14 4 : SYS Port (Left)
P2 K2
USB

28 SPI_MISO SPI_MISO USBP4P USBP4+ 14


USBP5N L4 USBP5-
USB_OC#0 D3 L5
14 USB_OC0# OC0# USBP5P USBP5+
USB_OC#1 C4 M1
14 USB_OC1# OC1# USBP6N USBP6-
USB_OC#2 D5 M2
14 USB_OC2# OC2# USBP6P USBP6+
USB_OC#3 D4 N4
OC3# USBP7N USBP7-
USB_OC#4 E5 N3
14 USB_OC4# OC4# USBP7P USBP7+
USB_OC#5 C3
USB_OC#6 OC5#/GPIO29
A2 OC6#/GPIO30 USBRBIAS# D2
USB_OC#7 B3 D1 USB_RBIAS_PN R219 22.6 +-1%
VCC3M OC7#/GPIO31 USBRBIAS
ICH7M
Place within 500 mils of ICH

USB_OC#0 R1063 10K +-5% LENOVO.PND


A A
USB_OC#1 R1064 10K +-5% NB system design section
USB_OC#2 R1065 10K +-5%
USB_OC#3 R1066 10K +-5% Title
ICH7M-2
Size Document Number
Custom Rev s1.3
Whistler
USB_OC#4 R1067 10K +-5% Date: Friday, April 28, 2006 Sheet 12 of 52
USB_OC#5 R1068 10K +-5% "PROPERTY NOTE: this document contains information confidential and property to
USB_OC#6 R1069 10K +-5% LENOVO PND and shall not be reproduced or transferred to other documents or
USB_OC#7 R1070 10K +-5% disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC3B
VCC5B VCC3M
D5 VCC5M Place at
D4 MCH edge

1
RB461F-2 VCC1R05B ICH7 Pullups VCC3M

1
R229 RB461F-2 U5F
2 R221 VCC5REF G10 L11 R220 10K +-5% R_0603
100 +-1% V5REF[1] Vcc1_05[1] 12,25 RI#
R_0603 10 +-5% 2 Vcc1_05[2] L12
AD17 L14 C189 R222 10K +-5% R_0603
V5REF[2] Vcc1_05[3] 12 SMB_ALERT#
VCC5REF V5REF_SUS C190 C191 C192
3
Vcc1_05[4] L16
V5REF_SUS 0.01UF/16V R223 10K +-5% R_0603

3
F6 V5REF_Sus Vcc1_05[5] L17 0.1UF/10V 0.1UF/10V 0.1UF/10V 12 SMB_LINK_ALERT#
C208 C209 C921 L18 C_0402 C_0402 C_0402
Vcc1_05[6] C_0402 R224 10K +-5% R_0603
C193 C194 C922 AA22 Vcc1_5_B[1] Vcc1_05[7] M11 12 SMLINK0
1UF/10V 0.1UF/10V 0.1UF/10V AA23 M18
C_0603 C_0402 C_0402 1UF/10V 0.1UF/10V 0.1UF/10V Vcc1_5_B[2] Vcc1_05[8] R225 10K +-5% R_0603

CORE
AB22 Vcc1_5_B[3] Vcc1_05[9] P11 12 SMLINK1
C_0603 C_0402 C_0402 AB23 P18
Vcc1_5_B[4] Vcc1_05[10] R226 10K +-5% R_0603
D
AC23 Vcc1_5_B[5] Vcc1_05[11] T11 3,12 ITP_DBR# D
AC24 Vcc1_5_B[6] Vcc1_05[12] T18
AC25 U11 R227 10K +-5% R_0603
Place within Place within Vcc1_5_B[7] Vcc1_05[13] 12,34 BATLOW#
AC26 Vcc1_5_B[8] Vcc1_05[14] U18
100 mils of 100 mils of AD26 Vcc1_5_B[9] Vcc1_05[15] V11
ICH VCC1R5B ICH AD27 V12
Vcc1_5_B[10] Vcc1_05[16] VCC3B Place within VCC3B
AD28 Vcc1_5_B[11] Vcc1_05[17] V14
30 OHM/3000mA D26 V16 100 mils of
R_0805 FB3 ICH_PCIE_WS Vcc1_5_B[12] Vcc1_05[18]
1 D27 V17 ICH RN24
Vcc1_5_B[13] Vcc1_05[19]
D28 Vcc1_5_B[14] V18 12,25 TRDY# 1 2 R_SMT8
C923 E24 VCC PAUX Vcc1_05[20] C195 3 4
C196 C197 Vcc1_5_B[15] 12,25 PERR#
Place within 10uF/6.3V E25 V5 5 6
0.1UF/10V 0.1UF/10V Vcc1_5_B[16] VccSus3_3/VccLAN3_3[1] 0.1UF/10V 12,25 SERR#
100 mils of E26 Vcc1_5_B[17] VccSus3_3/VccLAN3_3[2] V1 C_0402 12,25 DEVSEL# 7 8 8.2K X4 +-5%
ICH C_0402 C_0402 F23 W2
Vcc1_5_B[18] VccSus3_3/VccLAN3_3[3] NS
F24 Vcc1_5_B[19] VccSus3_3/VccLAN3_3[4] W7
G22 RN25
Vcc1_5_B[20]
G23 Vcc1_5_B[21] Vcc3_3/VccHDA U6 VCC3B 12,25 REQ0# 1 2 R_SMT8
C198 C199 C200 H22 VCC1R05B 3 4
Vcc1_5_B[22] 12,25 IRDY#
H23 Vcc1_5_B[23] VccSus3_3/VccSusHDA R7 VCC3M 12 PIRQF# 5 6
0.1UF/10V 0.1UF/10V 0.1UF/10V J22 7 8
Vcc1_5_B[24] 12 PIRQH#
C_0402 C_0402 C_0402 J23 AE23 8.2K X4 +-5%
Vcc1_5_B[25] V_CPU_IO[1] C201 C202 C203
K22 Vcc1_5_B[26] V_CPU_IO[2] AE26
K23 AH26 0.1UF/10V 0.01UF/16V 2.2UF/16V RN26

VCCA3GP
Vcc1_5_B[27] V_CPU_IO[3] NS NS NS
L22 Vcc1_5_B[28] 12,25 STOP# 1 2
L23 Vcc1_5_B[29] Vcc3_3[3] AA7 12,25 FRAME# 3 4 R_SMT8
C204 C924 M22 AB12 VCC3B 5 6
Vcc1_5_B[30] Vcc3_3[4] 12 REQ1#
C205 M23 AB20 7 8 8.2K X4 +-5%
0.1UF/10V 0.1UF/10V Vcc1_5_B[31] Vcc3_3[5] Place within 12 REQ2#
0.1UF/10V N22 AC16
C_0402 C_0402 C_0402 Vcc1_5_B[32] Vcc3_3[6]
N23 Vcc1_5_B[33] Vcc3_3[7] AD13 100 mils of

IDE
P22 AD18 ICH R230 R_0402 8.2K +-5%
Vcc1_5_B[34] Vcc3_3[8] 11,17 IRQ14
P23 AG12 C206 C207 R231 R_0402 8.2K +-5%
Vcc1_5_B[35] Vcc3_3[9] Place within 12 REQ3#
R22 AG15 0.1UF/10V 0.1UF/10V R232 R_0402 8.2K +-5%
Vcc1_5_B[36] Vcc3_3[10] 12,25 PIRQA#
R23 Vcc1_5_B[37] Vcc3_3[11] AG19 C_0402 C_0402 100 mils of
R24 ICH RN27
Vcc1_5_B[38] VCC3B
R25 Vcc1_5_B[39] Vcc3_3[12] A5 12,25 PIRQB# 1 2
R26 Vcc1_5_B[40] Vcc3_3[13] B13 12 PIRQD# 3 4
T22 Vcc1_5_B[41] Vcc3_3[14] B16 12 PIRQC# 5 6
VCC3B T23 B7 7 8
Vcc1_5_B[42] Vcc3_3[15] 12,25,27,31,33,35 CLKRUN#
C T26 C10 R_SMT8 8.2K X4 +-5% C
Vcc1_5_B[43] Vcc3_3[16]

PCI
T27 D15 C210 C211 C212
C213 Vcc1_5_B[44] Vcc3_3[17] RN28
T28 Vcc1_5_B[45] Vcc3_3[18] F9 0.1UF/10V 0.1UF/10V 0.1UF/10V
U22 Vcc1_5_B[46] Vcc3_3[19] G11 C_0402 C_0402 C_0402 12,17 HDD_DTCT# 1 2
0.1UF/10V U23 G12 3 4
Vcc1_5_B[47] Vcc3_3[20] NS NS 12 PIRQG#
C_0402 V22 G16 RTC_VCC 5 6
Vcc1_5_B[48] Vcc3_3[21] 12 PIRQE#
NS V23 7 8
Vcc1_5_B[49] 12 LOCK#
VCC1R5B W22 W5
Place within R233 L7 1uH,220mA,25%,0805 Vcc1_5_B[50] VccRTC R_SMT8 8.2K X4 +-5%
W23 Vcc1_5_B[51]
100 mils of GPLL_R_L
1 2 Y22 P7
Vcc1_5_B[52] VccSus3_3[1] C214 C215
ICH Y23 Vcc1_5_B[53]
1 +-5% C216 C217 C218 A24
VccSus3_3[2] 0.1UF/10V 0.1UF/10V
C219 R_0603 10uF/10V 0.01UF/16V
B27 Vcc3_3[1] VccSus3_3[3] C24 C_0402 C_0402
1UF/10V D19 VCC3M
10uF/10V C_0603 C_0805 VCC1R5B C_0402 ICH_DMPLL_W20 AG28 VccSus3_3[4] NS R234 R_0402 8.2K +-5%
VccDMIPLL VccSus3_3[5] D22 12 FWH_WP#
C_0805 NS NS G19
VccSus3_3[6]
AB7 Vcc1_5_A[1]
AC6 K3 C220 C221
C222 Vcc1_5_A[2] VccSus3_3[7] 0.1UF/10V
AC7 Vcc1_5_A[3] VccSus3_3[8] K4 0.1UF/10V
VCC1R5B AD6 K5 C_0402 C_0402
Vcc1_5_A[4] VccSus3_3[9]
ARX

C223 1UF/10V AE6 K6 VCC3M


C_0603 Vcc1_5_A[5] VccSus3_3[10] VCC3B
0.1UF/10V AF5 Vcc1_5_A[6] VccSus3_3[11] L1
C_0402 AF6 Vcc1_5_A[7] VccSus3_3[12] L2
USB

C224 AG5 L3 Place within


Place within Vcc1_5_A[8] VccSus3_3[13] C225 C226 C227
0.1UF/10V AH5 Vcc1_5_A[9] VccSus3_3[14] L6 100 mils of
100 mils of C_0402 L7 0.01UF/16V 1UF/10V ICH
VCC3B VccSus3_3[15] C_0402 0.01UF/16V C_0603 R235 10K +-5%R_0603
ICH AD2 VccSATAPLL VccSus3_3[16] M6 C_0402 6,12 MCH_SYNC#
M7 NS
VccSus3_3[17] R236 R_0402 8.2K +-5%
AH11 Vcc3_3[2] VccSus3_3[18] N7 5,12,35 PM_THRM#
C228 AB10 AB17 R237 R_0402 8.2K +-5%
Vcc1_5_A[10] Vcc1_5_A[19] 11,33 GATEA20
VCC1R5B AB9 AC17 VCC1R5B
0.1UF/10V VCC3M Vcc1_5_A[11] Vcc1_5_A[20] R238 10K +-5%R_0603
AC10 Vcc1_5_A[12] 11,34 RCIN#
C_0402 AD10 T7
NS Place within 100 Vcc1_5_A[13] Vcc1_5_A[21] R239 R_0402 8.2K +-5%
AE10 Vcc1_5_A[14] Vcc1_5_A[22] F17 12,25,27,31,33,35 SERIRQ
ATX

mils of ICH near AF10 G17 C230


C229 Vcc1_5_A[15] Vcc1_5_A[23] 0.1UF/10V
pin E3 AF9 Vcc1_5_A[16]
C231 AG9 AB8 C_0402 VCC3M
B
0.1UF/10V 0.1UF/10V Vcc1_5_A[17] Vcc1_5_A[24] NS B
C_0402 AH9 Vcc1_5_A[18] Vcc1_5_A[25] AC8
C_0402
VCC1R5B NS NS TP44
E3 VccSus3_3[19] VccSus1_05[1] K7 1 1
Place within 100 C1 C28 1 TP45 R242 R_0402 8.2K +-5%
VccUSBPLL VccSus1_05[2] 1 12,18,22,35 PCIE_WAKE#
mils of ICH near G20 1 TP46
TP48 VccSus1_05[3] 1 R246 10K +-5%R_0603
C234 1 1 AA2 VccSus1_05/VccLAN1_05[1] 12,25 ICH_PME#
pin C1 C233 VCC1R5B Place within
1 Y7 A1
0.01UF/16V TP471 VccSus1_05/VccLAN1_05[2]Vcc1_5_A[26]
H6 100 mils of NS
0.1UF/10V C_0402 Vcc1_5_A[27]
USB CORE

C_0402 Vcc1_5_A[28] H7 ICH


NS J6 C236 C237
Vcc1_5_A[29]
Vcc1_5_A[30] J7 0.1UF/10V 0.1UF/10V
C_0402 C_0402
ICH7M
NS
AG11
AG14
AG17
AG20
AG25
AC11

AD11
AD15
AD19
AD23

AH12
AH23
AH27
AA24
AA25
AA26

AB11
AB14
AB16
AB19
AB21
AB24
AB27
AB28

AE11
AE13
AE18
AE21
AE24
AE25

AF11
AF27
AF28
W24
W25
W26

AG1
AG3
AG7
AC2
AC5
AC9

AD1
AD3
AD4
AD7
AD8

AH1
AH3
AH7
AA1

AB4
AB6

AE2
AE4
AE8
R11
R12
R13
R14
R15
R16
R17
R18

U12
U13
U14
U15
U16
U17
U24
U25
U26

AF2
AF4
AF8
P28

V13
V15
V24
V27
V28

Y24
Y27
Y28
T12
T13
T14
T15
T16
T17

W6
R1

U4

V2

Y3
T6

U5E
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]

ICH7M
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]

A A
LENOVO.PND
NB system design section
M12
M13
M14
M15
M16
M17
M24
M27
M28
G14
G18
G21
G24
G25
G26
C27
D10
D13
D18
D21
D24

H24
H27
H28

N11
N12
N13
N14
N15
N16
N17
N18
N24
N25
N26
A23

B11
B14
B17
B20
B26
B28

E15

K24
K27
K28

P12
P13
P14
P15
P16
P17
P24
P27
F12
F27
F28

L13
L15
L24
L25
L26
J24
J25
J26

M3
M4
M5
G1
G2
G5
G6
G9
C2
C6

H3
H4
H5

N1
N2
N5
N6
A4

B1
B8

E1
E2
E4
E8

P3
P4
F3
F4
F5

J1
J2
J5

Title
ICH7M-3
Size Document Number
C Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 13 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

USB_PWR_4

D92

4
SR05
NS

D
VCC5M VCC5M USB4- 3 2 USB4+ D

USB_PWR_0 USB_PWR_1
USB_PWR_2 USB_PWR_4

1
C263 C264
0.1UF/10V 0.1UF/10V
C_0402 U10 C_0402 U11

1 GND OC1# 8 USB_OC2# 12 1 GND OC1# 8 USB_OC0# 12


2 IN OUT1 7 2 IN OUT1 7
3 EN1# OUT2 6 3 EN1# OUT2 6
4 5 4 5
GND

GND
EN2# OC2# USB_OC4# 12 EN2# OC2# USB_OC1# 12
USB_PWR_2
TPS2066DGN TPS2066DGN
9

9
D93

4
33 USB_ON2 SR05
NS

33 USB_ON1 USB2- 3 2 USB2+

C C

1
USB_PWR_2

CON6 USB_PWR_0
CMC1
1 V+ GND 8
1 2 USB2- 2 7
12 USBP2- USB2+ DATA- GND
12 USBP2+ 4 3 3 DATA+ GND 6
4 GND GND 5
USB_PWR_0
C829 C830
90H + CT10 USB_CON
150UF/10V/SANYO 0.1UF/10V 0.1UF/10V
D94

4
USB_PWR_1 SR05
NS
USB_PWR_4

CON7 USB0+ 3 2 USB0-


CMC2
1 V+ GND 8
1 2 USB4- 2 7 C831 C832
12 USBP4- USB4+ DATA- GND
12 USBP4+ 4 3 3 DATA+ GND 6
4 5 0.1UF/10V 0.1UF/10V
GND GND

1
90H + CT11 USB_CON
150UF/10V/SANYO

USB_PWR_2

B USB_PWR_0 B

CT26 USB_PWR_1
C833 C834
CON8
+

CMC3 0.1UF/10V 0.1UF/10V


1 V0+ D95
12 USBP0- 4 3 150UF/10V/SANYO USB0- 2 DATA0-

4
1 2 USB0+ 3 USB_PWR_4
12 USBP0+ DATA0+ SR05
4 GND NS
GND 9
90H 10
USB_PWR_1 GND USB1+ USB1-
GND 11 3 2
GND 12
CMC4
5 V1+ C835 C836
4 3 USB1- 6
12 USBP1- USB1+ DATA1- 0.1UF/10V 0.1UF/10V
12 USBP1+ 1 2 7 DATA1+

1
8 GND
90H + CT12 USB_CON
150UF/10V/SANYO

LENOVO.PND
NB system design section
A A
Title
USB
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 14 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

Q4
LEDNUMLOCK# OUT 3
R1 2
GND 1 LEDNUMLOCK 34
IN
R2
DTC114EE CON13

52
51
TXLOUT0- 50 49 TXLOUT2-

52
51
7 TXLOUT0- 50 49 TXLOUT2- 7
Q5 TXLOUT0+ 48 47 TXLOUT2+
D OUT 3 7 TXLOUT0+ 48 47 TXLOUT2+ 7 D
LEDCPSLOCK# 46 45
R1 TXLOUT1- 46 45 TXLCLKOUT-
2 LEDCPSLOCK 34 7 TXLOUT1- 44 44 43 43 TXLCLKOUT- 7
GND 1 IN TXLOUT1+ 42 41 TXLCLKOUT+
R2 7 TXLOUT1+ 42 41 TXLCLKOUT+ 7
40 40 39 39
DTC114EE TXUOUT0+ 38 37 TXUOUT2+
7 TXUOUT0+ 38 37 TXUOUT2+ 7
TXUOUT0- 36 35 TXUOUT2-
7 TXUOUT0- 36 35 TXUOUT2- 7
34 34 33 33
TXUOUT1- 32 31 TXUCLKOUT-
7 TXUOUT1- 32 31 TXUCLKOUT- 7
TXUOUT1+ 30 29 TXUCLKOUT+
7 TXUOUT1+ 30 29 TXUCLKOUT+ 7 VCC3B
28 28 27 27
VCC3P 26 25
26 25
24 24 23 23
22 21 R915
22 21 100 +-1%
VCC3B 20 20 19 19 VCC3M
EDIDCLK 18 17 <OPTION>
7 EDIDCLK 18 17 LEDSUS# 35
EDIDDATA 16 15
7 EDIDDATA 16 15 LEDFUEL0# 35
14 14 13 13 LEDFUEL1# 35
LEDNUMLOCK# 12 11
LEDCPSLOCK# 12 11
10 10 9 9 LED_WWAN# 18
8 8 7 7 LED_WLAN# 18
VBL20 6 5 C883
6 5 LEDDRIVE# 35
SW1 LID_SW 4 3
4 3 BACKLIGHT_ON 35 1000PF/50V
3 4 R346 0 +-5% 2 1
7 PANEL_BKLT_CTRL 2 1 LEDPWR# 35 NS
34 LID_SWITCH 1 2
C925
R347
C317 100K +-5% LCD CON 1000PF/50V
CONN LCD 5-1775417-0 TYCO NS
0.1UF/10V

C C

VBL20

R348
0 +-5%

R_0805
VBL20
VCC3M VCC3P VINT20

LEDFUEL1#

LEDFUEL0#
LEDDRIVE#
VCC3M_FUSE VINT20_FUSE C319 C320

LEDSUS#
C318
Q6 Q7 0.1UF/50V 1UF/25V 0.1UF/50V
F2 F3
1 2 1 6 1 2 1 6

FUSE-3A32V-7 FUSE-3A32V-7
2 5 2 5 C321 C322 C323 C324
C327 10PF/50V 10PF/50V 10PF/50V 10PF/50V
VCC3P C_0402 C_0402 C_0402 C_0402
3 4 0.01UF/25V 3 4 C325 C326

0.1UF/10V

10uF/6.3V
FDC655BN R349 FDC655BN R350
B 47 +-1% NS 10K +-5% B
NS
2

2
D15 D16
RB521S-30T1 RB521S-30T1
NS

R351 0 +-5%
1

36 VCC3P_DRV
NS

C328 R352 C329 R353


47K +-5% 47K +-5%
0.47UF/25V NS 0.47UF/25V NS
C_0805 C_0805

R354 0 +-5%
36 VBL_DRV
NS

LENOVO.PND
A NB system design section A

Title
LCD_CONN
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 15 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D97
1

2 DA221-F-TL
SOT_416
D18
CRT PORT
D D
1
FUSE-1D5A6V
3 VCC5B F14 1 2

2 DA221-F-TL C331
SOT_416

16
L9 0.1UF/10V CON14

R_0402 R356
C_0402
7 RED_GMCH 1
BLM15BB750 CRT_CONN
CONN CRT 070008FR015SX044R SUYIN

150 +-1%
6
L10 1 11

R_0402 R357
7 GREEN_GMCH 1 7
BLM15BB750 2 12
L11

150 +-1%
8

R_0402 R358
7 BLUE_GMCH 1 3 13
BLM15BB750 9
D19

150 +-1%
C333 4 14
1 C334 C335 C336 C337 C338 10
15PF 5 15
3 22PF/50V 22PF/50V 22PF/50V 15PF C_0402 15PF
NS NS NS C_0402 C_0402
2 DA221-F-TL
SOT_416

17
C C
D20
1

2 DA221-F-TL
SOT_416
CRTVDD2

60 OHM/500mA
DDCCLK2 FB10 1 DDCCLK_1 R359 2.2K +-5%
7 DDCCLK_ID3
R_0603 R_0402
CRTVDD2 CRT_VS2 FB11 1 60 OHM/500mA CRT_VS_1 R360 2.2K +-5%
D21 R_0603 R_0402
1 CRT_HS2 FB12 1 R_0603 CRT_HS_1 R361 2.2K +-5%
60 OHM/500mA R_0402
3 DDCCLK_1 7 DDCDATA_ID1
DDCDAT2 FB13 1 60 OHM/500mA DDCDAT_1 R362 2.2K +-5%
R_0603
2 DA221-F-TL R_0402
SOT_416 C339 C340 C341 C342
B B
22PF/50V
22PF/50V
22PF/50V
22PF/50V
CRTVDD2 CRTVDD2 VCC5B CRTVDD2
D22 VCC3B VCC2R5B VCC2R5B

2
1
R996 1 3
3 DDCDAT_1 R997 R998
100K +-5%

10K +-5% 10K +-5% R999 R1000


D89
2 DA221-F-TL R_0402 R_0402 10K +-5% 10K +-5% C330 C332
SOT_416 R_0402 R_0402
U53 0.01UF/16V RB461F-2 0.1UF/16V

1 2 CRTVS_VGA
G1 A1 CRTHS_VGA VSYNC_GMCH 7
7 G2 A2 5 HSYNC_GMCH 7
CRTVDD2
D23 CRT_VS2
B1 6
1 3 CRT_HS2
B2
4 GND
3 CRT_VS2 8
VCC CRTVDD2 LENOVO.PND
2 DA221-F-TL NB system design section
SOT_416 TC7WT126FU-2 Title
VGA_CONN
A A
D24 Size Document Number
B Rev s1.3
1 Whistler
3 CRT_HS2 Date: Friday, April 28, 2006 Sheet 16 of 52
"PROPERTY NOTE: this document contains information confidential and property to
2 DA221-F-TL LENOVO PND and shall not be reproduced or transferred to other documents or
SOT_416 disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

SDD[0..15]
VCC3B SDD[0..15] 11
CON3 SDA[0..2]
SDA[0..2] 11
SDIOW#
SDIOW# 11
SDDREQ
SDDREQ 11
R247 SIORDY#
SIORDY# 11
1 2 4.7K +-5% SDIOR#
19 RCDL 1 2 RCDR 19 SDIOR# 11
3 4 R_0402
19 CDGND 3 4
33 +-5%RIDERST# 5 6 SDD8 SDDACK#
35 UBAY_RST# 5 6 SDDACK# 11
R248 SDD7 7 8 SDD9 SIORDY# CS0S#
D 7 8 CS0S# 11 D
VCC5B SDD6 9 10 SDD10 CS1S#
9 10 CS1S# 11
SDD5 11 12 SDD11
SDD4 11 12 SDD12
13 13 14 14
SDD3 15 16 SDD13 VCC3B
R121 SDD2 15 16 SDD14
17 17 18 18
4.7K +-5% SDD1 19 20 SDD15
SDD0 19 20 SDDREQ VCC3M
21 21 22 22
23 24 SDIOR# R249
SDIOW# 23 24
25 25 26 26 10K +-5%
SIORDY# 27 28 SDDACK# VCC5B
IRQ14_1 27 28 NS
29 29 30 30
SDA1 31 32 R250 0 +-5% SDIAG R251 R252
SDA0 31 32 SDA2 NS 47K +-5% 47K +-5%
33 33 34 34
CS0S# 35 36 CS1S# RN29
VCC5B 35 36 SDD0
37 37 38 38 1 2
VCC5B 39 40 VCC5B SDD1 3 4
39 40 SDD2
41 41 42 42 5 6
43 44 SDD3 7 8
43 44 BAY_ATTACH# 34
R253 VCC3B 45 46
RCSEL 45 46
47 47 48 48 BAY_IS_HDD 34
100K +-5% 49 50 100KX4 +-5%
R254 49 50 FB39 1 30 OHM/3000mA VCC5B
470+-5%NS
C 35 DASP_BAY# 51 51 C
52 52
VCC5B RN30
R125 FB40 1 SDD4 1 2
0 +-5% 30 OHM/3000mA SDD5 3 4
<OPTION> SDD6 5 6
R255 51 +-5% IRQ14_1 SDD7 7 8
11,13 IRQ14
ODD BAY CONN
CONN ODD 800029FB050S100ZL SUYIN
100KX4 +-5%

VCC5B

VCC5B

RN31
SDD8 1 2
C243 C244 C245 C827 SDD9 3 4
2.2UF/16V VCC5B SDD10 5 6
0.01UF/50V 0.01UF/50V 10UF/10V SDD11 7 8
C_0805

C238 C239 C240 C241 C242 100KX4 +-5%

B
10UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V VCC5B B
C_0805 C_0402 C_0402 C_0402 C_0402
CON4
1 GND1 V5-1 14
2 15 RN32
11 SATA_TXP0 A+ V5-2 SDD12
11 SATA_TXN0 3 A- V5-3 16 1 2
4 SDD13 3 4
GND2 SDD14
11 SATA_RXN0 5 B- 5 6
6 VCC5B SDD15 7 8
11 SATA_RXP0 B+
7 GND3 GND7 17
RESERVED 18
VCC3B 19 100KX4 +-5%
GND8
RN33
8 R944 SDIOR# 1 2
V3.3-1 SDA2
C246 9 V3.3-2 0 +-5% 3 4
C828 10 CS1S# 5 6
0.01UF/50V V3.3-3 CS0S#
11 GND4 V12-1 20 7 8
10UF/10V 12 21
RESERVE V12-2
C_0805 13 GND6 V12-3 22 LENOVO.PND
100KX4 +-5%
VCC5B NB system design section
Title
SATA_CONN ODD & SATA_HDD
<Description>
A R945 0 +-5% RN34 Size Document Number A
12,13 HDD_DTCT# SDA1 B Rev s1.3
1 2 Whistler
SDA0 3 4
SDDACK# 5 6 Date: Friday, April 28, 2006 Sheet 17 of 52
SDIOW# 7 8 "PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
100KX4 +-5%
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC3AUX
VCC3B VCC1R5B CON30

6 1.5V REFCLK+ 13 CLK_PCIE_WLAN 2


REFCLK- 11 CLK_PCIE_WLAN# 2
2 3.3V
PERN0 23 PCIE_WLAN_RXN 12
28 +1.5V PERP0 25 PCIE_WLAN_RXP 12
D D
48 +1.5V
PETN0 31 PCIE_WLAN_TXN 12
52 +3.3V PETP0 33 PCIE_WLAN_TXP 12
24 +3.3VAUX USB_D- 36 USBP3- 12
USB_D+ 38 USBP3+ 12 VCC3AUX
VCC3AUX 3 RESERVED#1 R684 4.7K +-5% NS
5 RESERVED#2 SMB_CLK 30
8 32 R685 4.7K +-5% NS
RESERVED#3 SMB_DATA
10 RESERVED#4
R1074 12 1
RESERVED#5 WAKE# PCIE_WAKE# 12,13,22,35
10K +-5% 14 7
RESERVED#6 CLKREQ# CLKREQ_WLAN# 2
16 RESERVED#7 PERST# 22 PLT_RST# 6,12,22,27,29,33,35
17 RESERVED#8
19 RESERVED#9 GND 4
33 WLAN_RF_KILL# 20 RESERVED#10 GND 9
37 RESERVED#11 GND 15
39 RESERVED#12 GND 18
41 RESERVED#13 GND 21
43 RESERVED#14 GND 26
45 RESERVED#15 GND 27
47 RESERVED#16 GND 29
C 49 RESERVED#17 GND 34 C
51 RESERVED#18 GND 35
GND 40
GND 50
R977 0 +-5% 42
15 LED_WWAN# NS LED_WWAN#
15 LED_WLAN# 44 LED_WLAN#
46 LED_WPAN#

MINI_PCIE
CONN MINI PCI-E 1827680 TYCO

VCC3AUX
MDC CONN
VCC3AUX

2
B CON19 F8 B
FUSE-1D5A6V
R592 0 +-5% R591
NS 10K +-5%

1
13
1 2

11 AZ_SDOUT_MDC 3 4
5 6
11 AZ_SYNC_MDC 7 8
R593 0 +-5% 9 10
11 AZ_SDIN1
1 11 12 R594 0 +-5%
11 AZ_MDC_RESET# AZ_BITCLK_MDC 11
3

2 C579
12 MDC_KILL#
D61
MODEN_CNN 0.01UF/16V
DAP222T1G CONN MODEN TYCO 1-179397-2 C_0402
LENOVO.PND
NB system design section
Title
MINIPCIE&MDC
A A
Size Document Number
B Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 18 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC3B MICVCC

D D
FROM CD-ROM
MICVCC
C285 C286 C287 C288 C289 C290 C291
CD_LINL C293 1UF/10V R325 0 +-5% VCC3B
RCDL 17 C283 C284
4.7UF/10V 4.7UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 10uF/6.3V
CD_GND C294 1UF/10V R327 0 +-5% NS NS NS NS NS
CDGND 17
R317 R318 R319
2.67K +-1% 2.67K +-1%
CD_LINR C296 1UF/10V R328 0 +-5% AGND

25
38
RCDR 17

1
9
U12 100K +-5%
R320 0 +-5%

DVDD
DVDD

AVDD
AVDD
EQ_BYPASS 21
R329 R330 R331 NS
20K +-1%

20K +-1%

20K +-1% R321


11 AZ_SYNC 10 SYNC GPIO_0/JS_1 43 0 +-5%
11 AZ_BITCLK_AUD 6 BIT_CLK GPIO_1/JS_0 44 NS
11 AZ_SDOUT 5 SDATA_OUT GPIO_2 2
R322 39 +-5% ACZ_SDIN0_CS 8 3 1 TP30
11 AZ_SDIN0 SDATA_IN GPIO_3 1 TP31
11 AZ_RESET# 11 RESET# EAPD 47 1 1
AGND C292 13
SENSE_A/SRC_B
SENSE_B/SRC_A 34
47PF/50V R324
C_0603 47K +-5% R326 20K +-1%
NS NS TP32 1 12 39 1 TP33 NS
1 PCBEEP PORT-A_L 1 TP34
PORT-A_R 41 1 1

C 21 C295 1UF/10V C
PORT-B_L EXT_MIC 21
PLACE UNDER AD1981HD PORT-B_R 22
CD_LINL 18
CD_GND CD_L
19 CD_GND
R334 0 +-5% CD_LINR 20 23 1 TP35
NS CD_R PORT-C_L 1 TP36
PORT-C_R 24 1 1
VREF2
AGND L_OUT 20
28 MIC_BIAS-B PORT-D_L 35 R_OUT 20
TP37 1 29 36
TP38 1 1 30
MIC_BIAS-C PORT-D_R
C302 TP39 1 1 32
MIC_BIAS-F
0.01UF/16V 1 MIC_BIAS-D TP40
PORT-E_L 14 1 1
C_0402 15 1 TP41
NS PORT-E_R 1
C297 C298
27 VREF_FILT
AGND 16 270PF/50V 270PF/50V
PORT-F_L NS NS
PORT-F_R 17
C299 C300 R332 R333
1UF/10V 1UF/10V 31 NC#31
33 37 1 TP42 1K +-5% 1K +-5%
NS NC#33 MONO_OUT 1 NS NS
40 NC#40
45 NC#45
AGND 46 48 AGND
NC#46 S/PDIF_OUT

DVSS
DVSS

AVSS
AVSS
AD1981HDJSTZ

26
42
B B

4
7
AGND

VCC5M VCC5MA
LD3985G47(ST MICRO) IS L8
VCC5MA ALTERNATIVES FOR VR5 MICVCC 1 2

U13 BLM21A121S

1 5 C307 C308 C309 C311 C312


VIN VOUT C310
2 GND
3 4 10uF/6.3V 10uF/6.3V 10uF/6.3V 1UF/10V 0.1UF/10V 33PF/50V
36,51 B_ON VEN BYPASS C305 C306 NS NS C_0402
C304 NS
1UF/10V

10uF/6.3V

10uF/6.3V

C313 LP3985IM5X-4D7 C303


1UF/10V

NS
0.01UF/16V C314
C_0402
0.01UF/16V
C_0402
AGND
AGND LENOVO.PND
A
NB system design section A
Title
AUDIO CODEC
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 19 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC5MA VCC3MHP

VCC3M

C551 C552 C553 C554 C555

0.1UF/10V

10uF/6.3V

10uF/6.3V

0.1UF/10V

10uF/6.3V
R577
100K +-5%

D D

AGND R578
27K +-1% MUTE# 34
1 2 BEEP_MIX
AGND L19 MMZ1005Y152CT

C556 33PF/50V System Speaker CONN

25

16

15

22
U23

2
C_0402
J3

SHDN#
VDD
PVDD
PVDD
CPVDD
HPVDD

BEEP
19 L_OUT C557 1UF/10V 1 2 AGND
L20 MMZ1005Y152CT
1 INL OUTL- 5 SP_OUTL- SP_OUTR+ 1
19 R_OUT C558 1UF/10V 1 2 27 4
L21 MMZ1005Y152CT INR OUTL+
SP_OUTL- 2
C559 1UF/10V 10 17 3
C1N OUTR-
8 C1P OUTR+ 18 SP_OUTR+ 4
VCC5MA
AUD_AMP_GAIN1 24 GAIN1 AUD_AMP_GAIN1
23 GAIN2 HPS 20
L22 13 INT_HP_R_OUT R579 56.2 +-1% HP_R_OUT 21 C538
HPOUTR INT_HP_L_OUT R580 56.2 +-1% C536 1000PF/50V SPEAK_CONN
1 2 28 VOL HPOUTL 14 HP_L_OUT 21

33PF/50V
R581 MMZ1005Y152CT CONN SPEAK 53398-0490 MOLEX

CPGND
CPVSS

PGND
PGND
100K +-5% C563 C564

BIAS
GND
GND
VSS
C539

33PF/50V

33PF/50V
1000PF/50V
Q33 MAX9750CEUI C537

12
11

19
26
29

21
3 OUT

9
3

33PF/50V
2 R1 C560 C561 C562
34 SPK_MUTE#
IN 1 GND

33PF/50V

33PF/50V

33PF/50V
R2
C C568 C
DTC115EE
1000PF/50V

C565 C566 C567

1UF/10V

1UF/10V
AGND

33PF/50V
R582
AGND AGND 10 +-5%
R_0402
AGND
R583 0 +-5% AGND
MICVCC NS
AGND

U24

34 AUDIO_VOL_H8 R584 120K +-1%


R585 1K +-5% 1 5
IN+ SHDN#
3 IN- OUT 4

6 VDD VSS 2
C569
C570
0.1UF/10V

1UF/10V

MAX4401AXT-T
C572
25 PCIC_SPKR 0.47UF/25V R587 240K5%(ZAS)
AGND C_0805
C571
390PF/50V
C573
AGND AGND 6.2K5%(ATL) 34 H8_SPKR 0.47UF/25V R588 240K5%(ZAS)
R586 C_0805
B B

C574
12 ICH_SPKR 0.47UF/25V R589 240K5%(ZAS) BEEP_MIX
C_0805

VCC3M VCC3MHP

L23 1 60 OHM/500mA
R590
300K +-1%
R_0603

C577
C575 C576 C578
0.1UF/10V
1UF/10V

0.01UF/16V 33PF/50V
C_0402

AGND

LENOVO.PND
A NB system design section A

Title
AUDIO AMP
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 20 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC5M

1
HEADPHONE VCC5MA
R554
100K +-5%

CON16

2
1
2 EXT_HP_L_OUT 1 2 R1004
HP_L_OUT 20 4.7K +-5% HP_JACK_IN 34
7 6 L14 MMZ1005Y152CT
8 3 EXT_HP_R_OUT 1 2 Q30
HP_R_OUT 20
4 L15 MMZ1005Y152CT 3 OUT
HP_PLUG R1
D 5 1
L17
2
MMZ1005Y152CT IN
2
1 GND
System Speaker CONN D

HEADPHONE JACK R2
DTC115EE
C531 C532 VCC5MA
1000PF/50V 1000PF/50V C533
AGND 1000PF/50V
R556 R557 R558
2.2K +-5% 2.2K +-5% 4.7K +-5%
R_0402 R_0402
Q31
AGND 3 OUT EQ_BYPASS 19
2 R1
AGND IN 1 GND
AGND R2
DTC115EE
AGND

CON17
FB15 1
1 2MMZ1005Y152CT 2 MICVCC
6 7
MIC_JACK_3 3 8
R562 C541 4
470K +-1% 100PF/50V 5 R559
R_0402 C_0402 1.3K +-5%
FB171 2 AGND
C MMZ1005Y152CT MIC JACK C

AGND AGND
MICVCC
R560 C534 C535
2.2K +-5% 1UF/10V 1UF/10V
R_0402
C542
R564
VREF2 0.33UF/16V

1
47K +-5%
FB14 AGND
MMZ1005Y152CT
R566 R565
47 +-5% BVREF BVREF 47 +-5%
R_0603 R_0603

2
NS R561 0 +-5% MIC_JACK_3
MICVCC
R568
0.1UF/10V

47K +-5% C543 R567


47K +-5% MICVCC
C540
AGND R569 1000PF/50V
10K +-5%
U22
AGND
1 5 R570
IN+ SHDN# 100 +-5% AGND
3 IN- OUT 4 EXT_MIC 19
C544 6 2
100PF/50V VDD VSS
B C_0402 B
MAX4401AXT-T AGND

AGND C545
390PF/50V

R571

R573
6.8K +-5% 27K +-1% C550

C546 0.01UF/16V
0.47UF/25V C_0402
C_0805 NS AGND

AGND

LENOVO.PND
A NB system design section A

Title
AUDIO SPEAK
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 21 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC3AUX VCC2R5AUX VCC3AUX VMAIN_33


VCC2R5AUX

C628 C629 C635 C636 C637 C638 C643 C644 C645 C646 C647 C648 C649
VCC2R5AUX

G11
D11

K12

P13
0.1UF/10V 0.1UF/10V
0.1UF/10V 0.1UF/10V 0.1UF/10V 4.7UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V0.1UF/10V 0.1UF/10V 4.7UF/10V

D5
VCC1R2AUX

A8
VDDIO
VDDIO
VDDIO

VDDP
VDDP
VDDP
B8 VDDC
E5 60 OHM/500mA L24
VDDC
E6 VDDC BIASVDD A14 1
C623 C624 C625 C626 E7 VDDC
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V
E8 VDDC C627 R_0603
E9 VDDC
E10 0.1UF/10V
D VDDC 60 OHM/500mA L25 D
F5 VDDC
F10 VDDC XTALVDD H14 1
G4 VDDC
VCC1R2AUX J4 C630 R_0603
60 OHM/500mA L26 VDDC
J5 VDDC C917 C918
1 J10 0.1UF/10V
VDDC U28 60 OHM/500mA L27 0.1UF/10V 0.1UF/10V
K4 VDDC
R_0603 C631 C632 K5 A13 1
VDDC AVDD VCC3AUX VCC3AUX
K6 VDDC
0.1UF/10V 4.7UF/10V K7
K8
VDDC
VDDC BCM5751(M) C633 R_0603
0.1UF/10V
R978R979 R980R981

15mm x 15mm

49.9 +-1%

49.9 +-1%

49.9 +-1%

49.9 +-1%
VCC1R2AUX F12 60 OHM/500mA L28 R987 R988
60 OHM/500mA L29 AVDDL
F13 AVDDL AVDD F14 1
1 BGA196 C634 3.3K +-5% 3.3K +-5%
R_0603
R_0603 C639 C640 SIGNAL NAME IN () IS UNIQUE TO 5787M 0.1UF/10V
TRD3- E14 MDI_3- 23
0.1UF/10V 4.7UF/10V E13
TRD3+ MDI_3+ 23
VCC1R2AUX G14
60 OHM/500mA L30 GPHY_PLLVDD
TRD2- D14 MDI_2- 23
1
TRD2+ D13 MDI_2+ 23
R_0603 C641 C642 C14
TRD1- MDI_1- 23
TRD1+ C13 MDI_1+ 23
0.1UF/10V 4.7UF/10V M8 PCIE_PLLVDD
TRD0- B14 MDI_0- 23
TRD0+ B13 MDI_0+ 23
VCC1R2AUX A11 R982R983
60 OHM/500mA L31 LINKLED#
SPD100LED# B11 RJ45_LINKUP# 24

49.9 +-1%

49.9 +-1%
1 M6 PCIE_SDSVDD SPD1000LED# A12
B10 R984R985
TRAFFICLED# RJ45_ACTIVITY# 24
R_0603 C650 C651 VCC3AUX

49.9 +-1%

49.9 +-1%
0.1UF/10V 4.7UF/10V R631 4.7K +-5% NS
R632 4.7K +-5% NS
C C
M1 R633 0 +-5% NS
UART_MODE R634 0 +-5% NS
SERIAL_DI K1 C919 C920
C652 0.1UF/10V N6 L1 R635 0 +-5% NS
12PCIE_GBE_RXP C653 0.1UF/10V PCIE_TXDP SERIAL_DO 0.1UF/10V 0.1UF/10V
12PCIE_GBE_RXN P6 PCIE_TXDN
12PCIE_GBE_TXP P10 PCIE_RXDP
12PCIE_GBE_TXN N10 PCIE_RXDN
A6 D8 R636 4.7K +-5%
12,13,18,35 PCIE_WAKE# R637 0 +-5% WAKE# GPHY_TVCOI
6,12,18,27,29,33,35 PLT_RST# C2 PERST#
2 PCIE_CLK_GBE N8 REFCLK+ SCLK E11
2 PCIE_CLK_GBE# P8 REFCLK- SI E12
VMAIN_33 F11
R638 4.7K +-5% SO
CS# C12
R639 4.7K +-5% F4
NS REFCLK_SEL
G12 R640 0 +-5%
R641 4.7K +-5% GPIO0/SERIAL_DO GPIO1 R642 10K +-5%
VCC3B GPIO1/SERIAL_DI H13
G13 R643 10K +-5%
R644 4.7K +-5% GPIO2 R645 0 +-5% NS VCC3AUX
A2 ATTN_BTTN# NC/(ENERGY_DET) C4 MDI_DETECT 12
VCC3AUX NS R646 0 +-5%
ENERGY_DET 34
R647 1K +-5% J12
VCC3AUX R648 1K +-5% VAUXPRSNT
VCC3B L3 VMAINPRSNT REGCTL25 L13 C662
NS L6
35 GBE_DISABLE# LOW_PWR R657 R658 R659 0.1UF/10V
R649 0 +-5% D10
12,27 SMB_CLK R650 0 +-5% SMB_CLK 10K +-5% 10K +-5% 10K +-5%
12,27 SMB_DATA D9 SMB_DATA Package change to SO8
R651 200 +-5% N12 XTALO U29
Y4 P12 J13
25MHZ +-25PPM 16PF R652 0 +-5% XTALI REGCTL12
R653 1.24K +-1% A10 8 1
RDAC GPIO1 VCC A0
7 WP A1 2
C660 C661 EECLK 6 3
VMAIN_33 EEDATA SCL A2
5 SDA GND 4
18PF/50V 18PF/50V VCC3B
D12 R654 4.7K +-5% NS AT24C256BN-10SU-1.8
R655 TRST#
B TCK D7 B
A1 H12 8P_SOP_150
DC_A01 TDI
A3 DC_A03 TDO D6
0 +-5% A4 C11
DC_A04 TMS
A5 DC_A05
A7 DC_A07 PWR_IND# H2
A9 DC_A09 ATTN_IND# J2
B1 H3 R656 0 +-5%
DC_B01 NC(CLKREQ#) CLKREQ_GBE# 2
B2 VCC1R2AUX
DC_B02 EEDATA
B3 DC_B03 EEDATA L10
B5 K11 EECLK
DC_B05 EECLK
B6 DC_B06 TEST# L7
B9 VCC3AUX
DC_B09 R660 4.7K +-5%
C1 DC_C01 NC_K14 K14
C3 L8 NS C654 C655 C656 C657 C658 C659
DC_C03 NC_L08 R661 4.7K +-5%
C5 DC_C05 NC_L09 L9
C6 NS 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 4.7UF/10V
DC_C06
C7 DC_C07 DC_L05 L5
C8 L11 VCC3AUX
DC_C08 DC_L11
C9 DC_C09 DC_L12 L12
C10 L14 R975 0 +-5%
DC_C10 DC_L14 NS
D1 DC_D01 DC_M02 M2
D2 DC_D02 DC_M03 M3 C663 C664
D3 DC_D03 DC_M04 M4
D4 M9 4.7UF/10V 0.1UF/10V
DC_D04 DC_M09 NS NS VCC2R5AUX
E1 DC_E01 DC_M11 M11
E3 DC_E03 DC_M12 M12
E4 DC_E04 DC_M13 M13
F1 M14 R976 0 +-5%
DC_F01 DC_M14 NS
F2 DC_F02 DC_N02 N2
F3 N3 VCC3AUX C665 C666
DC_F03 DC_N03 R662 4.7K +-5%
G1 DC_G01 DC_N04 N4
G2 N13 NS 22UF/6.3V 0.1UF/10V
DC_G02 DC_N13 VMAIN_33 R663 0 +-5% NS NS
G3 DC_G03 DC_N14 N14
H1 P1 NS
DC_H01 DC_P01
H4 DC_H04 DC_P02 P2
H11 DC_H11 DC_P03 P3
J1 DC_J01 DC_P04 P4
A J3 DC_J03 DC_P14 P14 A
J11 DC_J11
J14 M5 R664 0 +-5% LENOVO.PND
DC_J14 VSS R665 NS 0 +-5%
K3 DC_K03 VSS M7 NB system design section
K9 M10 R666 NS 0 +-5%
DC_K09 VSS R667 NS 0 +-5% Title
K10 DC_K10 VSS N5
K13 DC_K13 VSS N7 R668 NS 0 +-5% GBE BCM5787M
L2 N11 R669 NS 0 +-5%
DC_L02 VSS R670 NS 0 +-5% Size Document Number
L4 DC_L04 VSS P5 Rev s1.3
R671 NS 0 +-5% C
VSS P7 Whistler
P11 R672 NS 0 +-5%
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS NS VCC3AUX Date: Friday, April 28, 2006 Sheet 22 of 52


"PROPERTY NOTE: this document contains information confidential and property to
G10

H10
B12

LENOVO PND and shall not be reproduced or transferred to other documents or


G5
G6
G7
G8
G9

H5
H6
H7
H8
H9

N1
N9
B4
B7

E2

K2

P9
F6
F7
F8
F9

J6
J7
J8
J9

NS R673 4.7K +-5% disclosed to others or used for any purpose other than that for which it was obtained
NS R674 4.7K +-5% without the expressed written consent of LENOVO PND."
NS R675 4.7K +-5%

5 4 3 2 1
5 4 3 2 1

VCC2R5AUX

R677
0 +-5%

D D
XFORM-210-GP
T3

22 MDI_3- 1 RD+ RX+ 16 RJ45_TXD3N 24


22 MDI_3+ 2 RD- RX- 15 RJ45_TXD3P 24
3 RDCT3 RXCT 14
4 NC1 NC4 13
5 NC2 NC3 12
6 TDCT4 TXCT 11
22 MDI_2- 7 TD+ TX+ 10 RJ45_TXD2N 24
22 MDI_2+ 8 TD- TX- 9 RJ45_TXD2P 24

T4

22 MDI_1- 1 RD+ RX+ 16 RJ45_TXD1N 24


22 MDI_1+ 2 RD- RX- 15 RJ45_TXD1P 24
3 RDCT3 RXCT 14
4 NC1 NC4 13
5 NC2 NC3 12
6 TDCT4 TXCT 11
22 MDI_0- 7 TD+ TX+ 10 RJ45_TXD0N 24
22 MDI_0+ 8 TD- TX- 9 RJ45_TXD0P 24

C667 C668 C669 C670 C671 C672 XFORM-210-GP


C C
27PF/50V 27PF/50V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V R678 R679 R680 R681
75 +-5% 75 +-5% 75 +-5% 75 +-5%

C673
1500PF/2KV
C_1808

4
D90 D91
SRV05-2 SRV05-2
NS NS

3
B B

LENOVO.PND
NB system design section
Title
A A
GBE MAGNETTICS
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 23 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D D

VCC3AUX
J5
R682 150 +-1% 12 LED1_YELP
22 RJ45_ACTIVITY# 11 LED1_YELN

23 RJ45_TXD2P 4 RJ45_TERM4
23 RJ45_TXD2N 5 RJ45_TERM5
23 RJ45_TXD1N 6 RDN
23 RJ45_TXD3P 7 RJ45_TERM7
23 RJ45_TXD3N 8 RJ45_TERM8
23 RJ45_TXD1P 3 RDP
23 RJ45_TXD0N 2 TDN
23 RJ45_TXD0P 1 TDP
C C

R683 150 +-1% 10


VCC3AUX LED2_GRNP
22 RJ45_LINKUP# 9 LED2_GRNN

J6 16

GND
GND
RING RJ11 RING
2 15 TIP
1 TIP RJ11 RJ45/RJ11_CONN

13
14
CONN RJ45&RJ11 JM34F23-SBSC FOXCONN
header2_FI-S 2P-HFE
header2_FI-S 2P-HFE

C674 C675
1500PF/2KV 1500PF/2KV
B B
C_1808 C_1808

LENOVO.PND
NB system design section
Title
RJ11/RJ45
Size Document Number
A Rev s1.3
Whistler
A A
Date: Friday, April 28, 2006 Sheet 24 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC3M VCC3M
40 MILS 40 MILS
GNT0# TPSDATA
12 GNT0# TPSDATA 26
REQ0# TPSCLOCK C846
12,13 REQ0# TPSCLOCK 26
-CBE3 TPSLATCH C837 C838 C839 C840 C841 C842 C843 C844 C845
12 C/BE3# TPSLATCH 26

10uF/6.3V
-CBE2 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V
12 C/BE2# PCIC_SPKR 20
-CBE1 C_0603 C_0603 C_0603 C_0603 C_0603 C_0603 C_0603 C_0603 C_0603
12 C/BE1#
-CBE0
12 C/BE0#
PCLK_PCM
2 PCICLK_CB_33M
FRAME#
12,13 FRAME#
DEVSEL#
12,13 DEVSEL#
SUSRST#
12,26,27,31 PCIRST# VCC3M
D TRDY# D
12,13 TRDY# VCCCA VCCCB
IRDY#
12,13 IRDY#
STOP#
12,13 STOP# VCC3M
PERR# VCCCB VCCCA
12,13 PERR#
SERR# R897
12,13 SERR#
PAR 10K +-5% C847 C848 C849 C850
12 PAR
1UF/10V 10UF/10V 1UF/10V 10UF/10V
35 G_RST_PCI1520#
C_0603 C_0805 C_0603 C_0805

W13
G19
C11

C13

C10

N19
B14

A13

B13

E17

E18

A10

A12

P19
F15

F14
U46

J19
W8
BCAD[0..31]

G6

G1
C6

C7

N1

R1
A5

E7
B6
B7

E8

A7
F7

F6
F8

L1
26 BCAD[0..31]

G_RST#
PAR
SERR#
PERR#
STOP#
IRDY#
TRDY#
PRST#
DEVSEL#
FRAME#

PCLK

C/BE0#
C/BE1#
C/BE2#
C/BE3#

REQ#

GNT#

DATA
CLOCK
LATCH
SPKROUT#

VCCP

I/O_VCC1
I/O_VCC2
I/O_VCC3
I/O_VCC4
I/O_VCC5
I/O_VCC6
I/O_VCC7
I/O_VCC8

VCCB

VCCA

CORE_VCC

VR_EN
ACAD[0..31]
ACAD[0..31] 26
BCAD0 H3 P11 ACAD0
BCAD1 B_CAD0//B_D3 A_CAD0//A_D3 ACAD1
H1 B_CAD1//B_D4 A_CAD1//A_D4 W12
BCAD2 H2 R11 ACAD2
BCAD3 B_CAD2//B_D11 A_CAD2//A_D11 ACAD3
J2 B_CAD3//B_D5 A_CAD3//A_D5 U12
BCAD4 J1 V12 ACAD4
BCAD5 B_CAD4//B_D12 A_CAD4//A_D12 ACAD5
J5 B_CAD5//D_D6 A_CAD5//A_D6 R12
BCAD6 J3 P12 ACAD6
BCAD7 B_CAD6//B_D13 A_CAD6//A_D13 ACAD7
K2 B_CAD7//B_D7 A_CAD7//A_D7 U13
BCAD8 K3 P13 ACAD8 PCICLK_CB_33M
BCAD9 B_CAD8//B_D15 A_CAD8//A_D15 ACAD9
K6 B_CAD9//B_A10 A_CAD9//A_A10 R13
BCAD10 L2 U14 ACAD10
BCAD11 B_CAD10//B_CE2# A_CAD10//A_CE2# ACAD11 R974
L3 B_CAD11//B_OE# A_CAD11//A_OE# W15
BCAD12 L6 P14 ACAD12 33 +-5%
BCAD13 B_CAD12//B_A11 A_CAD12//A_A11 ACAD13
L5 B_CAD13//B_IORD# A_CAD13//A_IORD# V15
BCAD14 M2 U15 ACAD14
BCAD15 B_CAD14//B_A9 A_CAD14//A_A9 ACAD15
M1 B_CAD15//B_IOWR# A_CAD15//A_IOWR# R14
C BCAD16 M3 W16 ACAD16 C
BCAD17 B_CAD16//B_A17 A_CAD16//A_A17 ACAD17 C912
W4 B_CAD17//B_A24 A_CAD17//A_A24 M18
BCAD18 U5 M19 ACAD18 10PF/50V
BCAD19 B_CAD18//B_A7 A_CAD18//A_A7 ACAD19
R6 B_CAD19//B_A25 A_CAD19//A_A25 L19
BCAD20 V5 L17 ACAD20
BCAD21 B_CAD20//B_A6 A_CAD20//A_A6 ACAD21
U6 B_CAD21//B_A5 A_CAD21//A_A5 L14
BCAD22 V6 K18 ACAD22
BCAD23 B_CAD22//B_A4 A_CAD22//A_A4 ACAD23
P8 B_CAD23//B_A3 A_CAD23//A_A3 K15

SOCKET A
BCAD24 V7 J18 ACAD24

PCI1520/ZHK
BCAD25 B_CAD24//B_A2 A_CAD24//A_A2 ACAD25
W7 B_CAD25//B_A1 A_CAD25//A_A1 J17
BCAD26 ACAD26
SOCKET B

R8 B_CAD26//B_A0 A_CAD26//A_A0 J14


BCAD27 W10 G17 ACAD27 VCC3M
BCAD28 V10 B_CAD27//B_D0 A_CAD27//A_D0 ACAD28
B_CAD28//B_D8 A_CAD28//A_D8 G14
BCAD29 U10 F18 ACAD29
BCAD30 R10 B_CAD29//B_D1 A_CAD29//A_D1 ACAD30
B_CAD30//B_D9 A_CAD30//A_D9 G15
BCAD31 V11 E19 ACAD31
B_CAD31//B_D10 A_CAD31//A_D10 R898
BCC/BE0# K5 V14 ACC/BE0# 10K +-5%
26 BCC/BE0# B_CC/BE0#/B_CE1# A_CC/BE0#/A_CE1# ACC/BE0# 26
BCC/BE1# M6 T19 ACC/BE1#
26 BCC/BE1# B_CC/BE1#/B_A8 A_CC/BE1#/A_A8 ACC/BE1# 26
BCC/BE2# T1 M17 ACC/BE2#
26 BCC/BE2# B_CC/BE2#/B_A12 A_CC/BE2#/A_A12 ACC/BE2# 26
BCC/BE3# U7 K14 ACC/BE3#
26 BCC/BE3# B_CC/BE3#/B_REQ# A_CC/BE3#/A_REQ# ACC/BE3# 26 G_RST_PCI1520#
BCRST# W5 L15 ACRST#
26 BCRST# B_CRST#//B_RESET A_CRST#//A_RESET ACRST# 26
BCFRAME# R3 M15 ACFRAME#
26 BCFRAME# B_CFRAME#//B_A23 A_CFRAME#//A_A23 ACFRAME# 26
BCIRDY# P5 N18 ACIRDY#
26 BCIRDY# B_CIRDY#//B_A15 A_CIRDY#//A_A15 ACIRDY# 26
BCTRDY# R2 N17 ACTRDY#
26 BCTRDY# B_CTRDY#//B_A22 A_CTRDY#//A_A22 ACTRDY# 26
BCDEVSEL# P3 N15 ACDEVSEL# R899
26 BCDEVSEL# B_CDEVSEL#//B_A21 A_CDEVSEL#//A_A21 ACDEVSEL# 26
BCSTOP# P2 P17 ACSTOP# BC_CLK 22 +-5% BCCLK
26 BCSTOP# B_CSTOP#//B_A20 A_CSTOP#//A_A20 ACSTOP# 26 BCCLK 26
BCPERR# N6 R18 ACPERR#
26 BCPERR# B_CPERR#B_A14 A_CPERR#//A_A14 ACPERR# 26
BCSERR# W9 H18 ACSERR# C851 10PF/50V
B 26 BCSERR# B_CSERR#B_WAIT# A_CSERR#//A_WAIT ACSERR# 26 B
BCPAR N2 P15 ACPAR
26 BCPAR B_CPAR//B_A13 A_CPAR//A_A13 ACPAR 26
BCREQ# R7 K17 ACREQ# C_0402
26 BCREQ# B_CREQ#//B_INPACK# A_CREQ#//A_INPACK ACREQ# 26
BCGNT# N5 P18 ACGNT# R900
26 BCGNT# B_CGNT#//B_WE# A_CGNT#//A_WE# ACGNT# 26
BC_CLK P6 M14 22 +-5%
B_CCLK//B_A16 A_CCLK//A_A16 ACCLK 26
BCSTSCHNG U9 H14 ACSTSCHNG
26 BCSTSCHNG B_CSTSCHG//B_BVD1 A_CSTSCHG//A_BVD1 ACSTSCHNG 26
BCCLKRUN# R9 H15 ACCLKRUN# C852 10PF/50V
26 BCCLKRUN# B_CLKRUN#//B_WP A_CLKRUN#//A_WP ACCLKRUN# 26
BCBLOCK# N3 N14 ACBLOCK#
26 BCBLOCK# B_CBLOCK#//B_A19 A_CBLOCK#//A_A19 ACBLOCK# 26
BCINT# V8 H19 ACINT# C_0402
26 BCINT# B_CINT#//B_READY A_CINT#//A_READY ACINT# 26
BCAUDIO# V9 H17 ACAUDIO#
26 BCAUDIO# B_CAUDIO//B_BVD2 A_CAUDIO//A_BVD2 ACAUDIO# 26
BRSVD/A18 M5 F17 ARSVD/D2
26 BRSVD/A18 B_RSVD/A18 A_RSVD/D2 ARSVD/D2 26
BRSVD/D14 J6 V13 ARSVD/D14
26 BRSVD/D14 B_RSVD/D14 A_RSVD/D14 ARSVD/D14 26
BRSVD/D2 P10 R17 ARSVD/A18
26 BRSVD/D2 B_RSVD/D2 A_RSVD/A18 ARSVD/A18 26

PCI
MFUNC6/CLKRUN#

BCCD1# H5 U11 ACCD1#


26 BCCD1# B_CCD1#//B_CD1# A_CCD1#//A_CD1# ACCD1# 26
E13 PME#/RI_OUT#

BCCD2# P9 G18 ACCD2#


26 BCCD2# B_CCD2#//B_CD2# A_CCD2#//A_CD2# ACCD2# 26
BCVS1# U8 J15 ACVS1# CLKRUN_PCM# R901 0 +-5%
SUSPEND#

26 BCVS1# B_CVS1//B_VS1# A_CVS1//A_VS1# ACVS1# 26 CLKRUN# 12,13,27,31,33,35


BCVS2# P7 L18 ACVS2#
26 BCVS2# ACVS2# 26
MFUNC0
MFUNC1

MFUNC2
MFUNC3
MFUNC4
MFUNC5

B_CVS2//B_VS2# A_CVS2//a_VS2#
VR_OUT

R902 10K +-5%


E10 IDSEL

NS
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9

NC
W11
W14
C12

D19

C15

C14

R19
B12

B10

E11
B11
A11

E12

A16

E14

B15
A15

A14

K19
F10

F12
F11

F13

F19

W6
G2
G3

G5
H6

D1

C5

C8

C9
E2

E3

A4

E6
B5

B8
A8
E9

B9

A6
A9

E1

K1

P1

E5
F1

F2
F3

F5

F9

PCI1520ZHK

VCC3M
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9

C853 IN LENOVO.PND
2 NB system design section
A A
R1
ICH_PME# 12,13 Title
1UF/10V DTC114EE
R2

12 AD[31:0]
AD16 R903 100 +-5% CARDBUS TI PCI1520
CLKRUN_PCM# Q57
12,13 PIRQA# Size Document Number
PCMACT 35 Custom Rev s1.3
12,13 PIRQB# 1 1 Whistler
TP49
1

3
GND

OUT

SERIRQ 12,13,27,31,33,35 Date: Friday, April 28, 2006 Sheet 25 of 52


CB_RI#
RI# 12,13 "PROPERTY NOTE: this document contains information confidential and property to
CARDBUSPDN#
CARDBUSPDN# 35
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

25 ACAD[0..31] BCAD[0..31] 25

VPPCA

F1

F2
CON27 VCC5M U47
A1 B1 20 21 R956 GPS2224_SHDH#
0 +-5%

GND1

GND2
A1 B1 VCC3M 12V SHDH NS GPS2224_SHDH# 35
A2 A2 B2 B2 7 12V_1
ACAD0 A3 B3 BCAD0 8
D ACCD1# A3 B3 BCCD1# AVPP VCCCA D
25 ACCD1# A4 A4 B4 B4 BCCD1# 25 1 5V
ACAD1 A5 B5 BCAD1 2
ACAD2 A5 B5 BCAD2 R904 5V_2
A6 A6 B6 B6 AVCC1 9
ACAD3 A7 B7 BCAD3 43K +-5% 14 10 VPPCB
ACAD4 A7 B7 BCAD4 R_0402 3V AVCC
A8 A8 B8 B8
A9 A9 B9 B9 13 3V_2 BVPP 19
ACAD5 A10 B10 BCAD5 VCCCB
ACAD6 A10 B10 BCAD6
A11 A11 B11 B11 25 TPSDATA 3 DATA BVCC1 17
ACAD7 A12 B12 BCAD7 4 18
A12 B12 25 TPSCLOCK CLOCK BVCC2
25 ARSVD/D14 A13 A13 B13 B13 BRSVD/D14 25 25 TPSLATCH 5 LATCH
ACC/BE0# A14 B14 BCC/BE0#
25 ACC/BE0# A14 B14 BCC/BE0# 25
ACAD8 A15 B15 BCAD8 23
ACAD9 A15 B15 BCAD9 R957 0 +-5% NC3
A16 A16 B16 B16 12,25,27,31 PCIRST# 12 RESET#
A17 B17 NS 22
ACAD10 A17 B17 BCAD10 R958 0 +-5% NC2
A18 A18 B18 B18 35 GPS2224_SHDH# 15 OC# NC1 16
ACAD11 A19 B19 BCAD11 6
A19 B19 NC
25 ACVS1# A20 A20 B20 B20 BCVS1# 25 11 GND NC4 24
ACAD12 A21 B21 BCAD12 25
ACAD13 R905 10 +-5% A21 B21 10 +-5% R906 BCAD13 NC5
A22 A22 B22 B22
ACAD14 A23 B23 BCAD14 TPS2224
ACAD15 R907 10 +-5% A23 B23 10 +-5% R908 BCAD15
A24 A24 B24 B24
A25 A25 B25 B25
ACC/BE1# A26 B26 BCC/BE1#
25 ACC/BE1# A26 B26 BCC/BE1# 25
ACAD16 A27 B27 BCAD16
ACPAR A27 B27 BCPAR
25 ACPAR A28 A28 B28 B28 BCPAR 25
ARSVD/A18 A29 B29 BRSVD/A18
25 ARSVD/A18 A29 B29 BRSVD/A18 25
ACPERR# A30 B30 BCPERR#
25 ACPERR# A30 B30 BCPERR# 25
ACBLOCK# A31 B31 BCBLOCK#
25 ACBLOCK# A31 B31 BCBLOCK# 25
ACGNT# A32 B32 BCGNT#
25 ACGNT# A32 B32 BCGNT# 25
A33 A33 B33 B33
C ACSTOP# A34 B34 BCSTOP# C
25 ACSTOP# A34 B34 BCSTOP# 25
ACINT# A35 B35 BCINT#
25 ACINT# A35 B35 BCINT# 25
ACDEVSEL# A36 B36 BCDEVSEL#
25 ACDEVSEL# A36 B36 BCDEVSEL# 25 VCC3M
VCCCA A37 A37 B37 B37 VCCCB
A38 B38 VCC3M
A38 B38
VPPCA A39 A39 B39 B39 VPPCB
ACTRDY# A40 B40 BCTRDY#
25 ACTRDY# A40 B40 BCTRDY# 25
ACCLK A41 B41 BCCLK R909
25 ACCLK A41 B41 BCCLK 25
ACFRAME# A42 B42 BCFRAME#
25 ACFRAME# A42 B42 BCFRAME# 25 47K +-5%
A43 B43 R910
ACIRDY# A43 B43 BCIRDY#
25 ACIRDY# A44 A44 B44 B44 BCIRDY# 25

47K +-5%
ACAD17 A45 B45 BCAD17 GPS2224_SHDH#
ACC/BE2# A45 B45 BCC/BE2#
25 ACC/BE2# A46 A46 B46 B46 BCC/BE2# 25

3
ACAD19 A47 B47 BCAD19
ACAD18 A47 B47 BCAD18 Q58
A48 B48 D96
ACVS2# A48 B48 BCVS2#
25 ACVS2# A49 A49 B49 B49 BCVS2# 25 34,35,36,39 EXTPWR# 2 2SK3019-N-2GP
ACAD20 A50 B50 BCAD20 3 2
A50 B50 SOT_416
A51 A51 B51 B51
ACRST# A52 B52 BCRST# 1
25 ACRST# A52 B52 BCRST# 25 35 PWRON_CB#
ACAD21 BCAD21

1
A53 A53 B53 B53
ACSERR# A54 B54 BCSERR# DAP222T1G
25 ACSERR# A54 B54 BCSERR# 25
ACAD22 A55 B55 BCAD22
ACREQ# A55 B55 BCREQ#
25 ACREQ# A56 A56 B56 B56 BCREQ# 25
ACAD23 A57 B57 BCAD23
ACC/BE3# A57 B57 BCC/BE3#
25 ACC/BE3# A58 A58 B58 B58 BCC/BE3# 25
A59 A59 B59 B59
ACAD24 A60 B60 BCAD24
ACAUDIO# A60 B60 BCAUDIO#
25 ACAUDIO# A61 A61 B61 B61 BCAUDIO# 25
ACAD25 A62 B62 BCAD25
ACSTSCHNG A62 B62 BCSTSCHNG
25 ACSTSCHNG A63 A63 B63 B63 BCSTSCHNG 25
B ACAD26 A64 B64 BCAD26 B
ACAD28 A64 B64 BCAD28 VPPCA VCCCA VCCCB VPPCB VCC5M VCC3M
A65 A65 B65 B65
ACAD27 A66 B66 BCAD27
A66 B66
A67 A67 B67 B67
ACAD30 A68 B68 BCAD30
ACAD29 A68 B68 BCAD29 C854 C855 C856 C857 C858 C859 C860
A69 A69 B69 B69
ACAD31 A70 B70 BCAD31 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10UF/10V 10uF/10V 0.1UF/10V
ARSVD/D2 A70 B70 BRSVD/D2 C_0805 C_0805 C_0805 C_0805 C_0805 C_0805
25 ARSVD/D2 A71 A71 B71 B71 BRSVD/D2 25
ACCD2# A72 B72 BCCD2#
25 ACCD2# A72 B72 BCCD2# 25
ACCLKRUN# A73 B73 BCCLKRUN#
25 ACCLKRUN# A73 B73 BCCLKRUN# 25
A74 A74 B74 B74
A75 A75 B75 B75
GND3
GND4

CARDBUS CONN
F3
F4

CONN CardBus QTS1150A-1121W-F FOXCONN

LENOVO.PND
A
NB system design section A
Title
PCMCIA SLOT
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 26 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC3B
VCC3B

VCC5M
R989
R755 R756 10K +-5%
10K +-5% 10K +-5%
D U37 D

R1072 33 +-5% 2 1 R757 0 +-5%


2,10 SMB_CLK_3B A1 OE1 BPWRG 5,6,12,34,35,36,43
R1073 33 +-5% 5 7 NS
2,10 SMB_DATA_3B A2 OE2
6 B1
VCC3M 3 4 R758 0 +-5%
B2 GND SMB_3B_EN 12
8 VCC ASSEMBLE,NEED EC SUPPORT
R760 R761 TC7WB126FK
2.2K +-5% 2.2K +-5% C732
0.01UF/16V
C_0402
12,22 SMB_CLK
12,22 SMB_DATA RTC_VCC VCC3M VCC3B

C731
C730 R759

0.1UF/10V
NS 0.01UF/16V 10K +-5%
C_0402 NS NS
TCPA function no assemble
VCC3B U38

24 3V NC#7 7
C C
19 3V NC#3 3
C733 10 2
3V NC#2
NC#1 1

0.1UF/10V
5 SB3V
NS
12 VBAT GPIO6 6
SERIRQ 27 SERIRQ 12,13,25,31,33,35
LPC_AD0 26 15
11,29,31,33,35 LPC_AD0 LAD0 CLKRUN CLKRUN# 12,13,25,31,33,35
LPC_AD1 23 21
11,29,31,33,35 LPC_AD1 LAD1 LCLK SIOCLK33M 2,31
LPC_AD2 20 14
11,29,31,33,35 LPC_AD2 LAD2 XTALO
LPC_AD3 17 13
11,29,31,33,35 LPC_AD3 LAD3 XTALI/32KIN

6,12,18,22,29,33,35 PLT_RST# 16 LRESET#


11,29,31,33,35 LPC_FRAME# 22 LFRAME# GND 4
28 LPCPD# GND 11
8 TESTI GND 18
9 TESTBI/BADD GND 25

AT97SC3203-XA4T10 NS
NS

TATER FUNCTION delete VCC3B


VCC3B

C891
B R946 0.01UF/16V B
4.7K +-5% U49 C_0402
1 L1 VCC 8
D98
2 L2 WP 7
5,6,12,34,35,36,43 BPWRG 1 2 3 PROT SCL 6 SMB_CLK 12,22
4 GND SDA 5 SMB_DATA 12,22
RB521S-30T1 PCA24S08D-T
D99

12,25,26,31 PCIRST# 1 2
R947 R948
100K +-5% 100K +-5%
RB521S-30T1

LENOVO.PND
A NB system design section A

Title
TATER/TCPA
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 27 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D D

VCC3M

R686
C C
10K +-5%
C676
0.1UF/10V VCC3M

U30
R687 51 +-1%-GP R689
12 SPI_CS# 1 CS# VCC 8
R688 51 +-1%-GP 2 7
12 SPI_MISO R690 51 +-1%-GP SO HOLD#
12 SPI_CLK 3 WP# SCLK 6
R691 51 +-1%-GP 4 5 10K +-5%
12 SPI_MOSI GND SI
SST25VF016B C677
0.1UF/10V

B B

LENOVO.PND
NB system design section
Title
SPI FLASH
A A
Size Document Number
B Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 28 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

C465
390PF/50V C_0603

R1036 R1037
VCC3M R1038 0 +-5%
NS
NS
U59 10M +-1% 10M +-1%

4
R1039 PKGS-00NB-R LMC6482IMM
R1041

4
1K +-1% LMC6482IMM 6
R1040
-
VCC1R65M 2 - NS NS 7 X-00NB 33
D
1 5 +
D
NS 3 + U55B 51 +-5%
U55A 0 +-5%
NS R1043 VCC3M

8
R1042 R1044 NS

8
300+-0.5%
1K +-1% NS DNS
VCC3M C957
0.1UF/50V
NS NS
NS NS NS
VCC1R65M R1045 NS
1K +-0.5%

NS

C467
390PF/50V C_0402

R1046 R1047
R1048 0 +-5%
NS
NS
U60 10M +-1% 10M +-1%

4
PKGS_45NB_R LMC6482IMM
R1050

4
LMC6482IMM 6
R1049
-
VCC1R65M 2 - NS NS 7 Y-45NB 33
1 5 +
NS 3 + U56B 51 +-5%
U56A 0 +-5%
R1051 VCC3M

8
R1052 NS
FWH FUNCTION delete
8
300+-0.5%
NS DNS

C VCC3M C958 C
0.1UF/50V
NS NS
NS NS
VCC1R65M R1053 NS
1K +-0.5%

NS

C503
390PF/50V C_0402

R1054 R1055
R1056 0 +-5%
NS
NS
U61 10M +-1% 10M +-1% VCC3B

4
PKGS_45NB_R LMC6482IMM
R1058
4

LMC6482IMM 6
R1057
-
VCC1R65M 2 - NS NS 7 Z-45NB 33
1 5 +
NS 3 + U57B 51 +-5%
U57A 0 +-5%
R1059 VCC3M C729 C736 C735 C734

8
R1060 NS 0.1UF/25V 0.01UF/50V 0.1UF/25V 0.01UF/50V
8

300+-0.5%
NS DNS C_0402 C_0402 C_0402 C_0402

VCC3M C959
0.1UF/50V NS NS NS NS
NS NS
NS NS
VCC1R65M R1061 NS
B 1K +-0.5% B

U65
82802AB 32P_PLCC
27 VCCA VCC2 32
NS
25 VCC1 VPP 1

R363 100K +-5% 30 23


FGPI4 FWH4 LFRAME#/FWH4
R364 100K +-5% 3 17
FGPI3 FWH3 LPC_AD3 11,27,31,33,35
R365NS 100K +-5% 4 15
FGPI2 FWH2 LPC_AD2 11,27,31,33,35
R366NS 100K +-5% 5 14

DEVICE OF THIS PAGE NOT ASSEMBLE R367NS


NS
100K +-5%

NS6,12,18,22,27,33,35 PLT_RST#
6

2
FGPI1
FGPI0

RST#
FWH1
FWH0

ID3
13

9 R1062
LPC_AD1
LPC_AD0
0 +-5%
11,27,31,33,35
11,27,31,33,35

ID2 10
VCC3B R368 100K +-5% 7 11
WP# ID1
ID0 12
R369NS 100K +-5% 8 NS
VCC3B TBL#
INIT# 24 FWH_INIT# 11
NS 22 RSV1
18 RSV2 CLK 31 LPCCLK_FWH_33M 2
R344 R376 19 RSV3

GNDA
0 +-5%

GND1
GND2
100K +-5% 20 29 R393 100K +-5%
RSV4 IC
21 RSV5
NS
NS R370

16
26

28
100K +-5%
CON12 NS
1 2 LPC_AD1
2 LPCCLK_FWH_33M PLT_RST# LPC_AD0 LPC_AD1 11,27,31,33,35
6,12,18,22,27,33,35 PLT_RST# 3 4 LPC_AD0 11,27,31,33,35
LPC_FRAME# 5 6
11,27,31,33,35 LPC_FRAME# NS
LPC_AD3 7 8 NS
11,27,31,33,35 LPC_AD3 LPC_AD2
11,27,31,33,35 LPC_AD2 9 10CUT

2X5 COM
NS

A A

LENOVO.PND
NB system design section
Title
FWH
Size Document Number
C Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 29 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

PC87382 FUNCTION delete


D D
VCCAVR
VCC_IN TEST POINT TP88
TP88 1 R1032 10 +-1%
1
NS NS C926
VCCAVR C927 VCCAVR
1UF/10V
1UF/10V

NS
NS
VCCAVR

R1006 10
R1007

R1008

R1009

R1010

R1011

R1012

R1013

R1015

R1016

R1017

R1033

R1019

R1020

R1021

R1022

R1023

R1024

R1025

R1034

R1027

R1035

R1029

R1030
C928 NS
U48

18

6
10K 10K 10K 10K 10K 10K 10K R1014 1UF/10V 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K 10K

AVCC

VCC

VCC
10K
NS
C C

NS NS NS NS NS NS NS NS NS NS NS NS NS NS NS NS NS NS NS NS NS NS NS
TP86 1 23 12 1 TP64
TP62 1 1 NS 24
PC0(ADC0/PCINT8) (PCINT0/CLK0/ICP1)PB0
13 1
1 TP65
TP66NS1 1 25
PC1(ADC1/PCINT9) (PCINT0/OC1A)PB1
14 1
1 TP67
NS
TP68NS1 1 26
PC2(ADC2/PCINT10) (PCINT2/SS#/OC1B)PB2
15 1
1 TP69
NS
TP70NS1 1 27
PC3(ADC3/PCINT1) (PCINT3/OC2A/MOSI)PB3
16 1
1 TP71
NS
TP72NS1 1 28
PC4(ADC4/PCINT12) (PCINT4/MOSO)PB4
17 1
1 TP73
NS
TP74NS1 1 29
PC5(ADC5/PCINT13) (SCK/PCINT5)PB5
7 1
1 TP75
NS
1 PC6(RESET#/PCIN14) (PCINT6/XTAL1/TOSC1)PB6 1 TP76
NS (PCINT7/XTAL2/TOSC2)PB7 8 1 NS
1
NS NS
(RXD/PCINT16)PD0 30 1NS 1 TP77
(TXD/PCINT17)PD1 31 1 1 TP78
32 1 NS TP79
(INT0/PCINT18)PD2 1 TP80
20 AREF (PCINT19/OC2V/INT1)PD3 1 1 NS1 TP82
TP81 1 19 2 1 NS
TP83 1 1 22
ADC6 (PCINT20/XCK/T0)PD4
9 1 NS
1 TP84
1 ADC7 (PCINT21/OCOB/T1)PD5 1 TP85
NS (PCINT22/OCOA/AIN0)PD6 10 1 NS1 TP87
NS (PCINT23/AIN1)PD7 11 1 NS1
GND NS
GND
GND
C929 C930 C931 C932 R1031 C934 C935 C936 C937 C954 C939 C940 C941 NS
C933
1UF/10V 1UF/10V 1UF/10V 1UF/10V 10K 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V
21
1UF/10V MCU
3
5

B B
NS
NS NS NS NS NS NS NS NS NS NS NS NS
C942 C943 C944 NS C955 C947 C948 C949 C956 C951 C952 C953
C945
1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V 1UF/10V
1UF/10V NS

NS NS NS NS NS NS NS NS NS NS NS
NS

LENOVO.PND

Title
HW Monitor NB system design section
A A
Size Document Number
B Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 30 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC3B

VCC3B
VCC5B
RN41
C694 C695 C696 C697 C698 C699
AFD# 8 7 LPT_5 D68 1 2RB521S-30T1

10uF/6.3V

10uF/6.3V

0.1UF/10V

0.1UF/10V

0.1UF/10V

0.1UF/10V
U33 PD0

14
39
63
88

65
6 5
ERROR# 4 3
PD1 2 1

VDD
VDD
VDD
VDD

NC
10K X4
11,27,29,33,35 LPC_AD0 15 52 PD0 RN42
LAD0 PD0/INDEX PD1 INIT#
D 11,27,29,33,35 LPC_AD1 16 LAD1 PD1/TRK0 50 8 7 D
11,27,29,33,35 LPC_AD2 17 48 PD2 PD2 6 5
LAD2 PD2/WP PD3 SLIN#
11,27,29,33,35 LPC_AD3 18 LAD3 PD3/RDATA 46 4 3
45 PD4 PD3 2 1
PD4/DSKCHG PD5 10K X4
2,27 SIOCLK33M 8 LCLK PD5/MSEN0 44
12,25,26,27 PCIRST# 9 43 PD6
LRESET# PD6/DRATE0 PD7 VCC3B
11,27,29,33,35 LPC_FRAME# 12 LFRAME# PD7/MSEN1 42 RN43
11 VCC5B
11
12,33,35
LDRQ0#
SUS_STAT#
R1076 0 +-5% 7
LDRQ#
LPCPD#
PC87392VGJ PNF/XRDY 35 PNF# R735 10K +-5% PD4 8 7
INDEX#
12,13,25,27,33,35 CLKRUN# 6 36 SLCT PD5 6 5 R736 1K +-5%
CLKRUN#/GPIO36 SLCT/WGATE PE PD6 TRK0# R737 1K +-5%
12,13,25,27,33,35 SERIRQ 10 SERIRQ PE/WDATA 37 4 3
SIOSMI# 19 40 BUSY PD7 2 1 WP# R738 1K +-5%
SMI#/GPIO35 BUSY/WAIT# ACK# 10K X4 RDATA# R739 1K +-5%
ACK/DR1 41
2 14M_SIO 20 47 SLIN# RN44 DSKCHG# R740 1K +-5%
CLKIN SLIN/ASTRB/STEP INIT# ACK#
INIT/DIR 49 8 7
51 ERROR# BUSY 6 5
ERR/HDSEL AFD# PE
DSKCHG# 21 DSKCHG# AFD/DSTRB/DENSEL 53 4 3
22 54 STRB# SLCT 2 1 VCC3B
HEAD# HDSEL# STB/WRITE
RDATA# 23 10K X4
RDATA#
WP# 24 WP#
TRK0# 25 55 DCD1# SIOSMI# R741 10K +-5%
TRK0# DCD1 DSR1# SUS_STAT# R742 10K +-5%
WGATE# 26 WGATE# DSR1 56
27 57 RXD1 TXD1 R743 10K +-5%
WDATA# WDATA# SIN1
28 58 RTS1# DTR1# R744 10K +-5%
STEP# SETP# RTS1/TEST
29 59 TXD1 NS
DIR# DIR# SOUT1/XCNF0
30 60 CTS1#
FDDDRV0# DR0# CTS1
31 61 DTR1#
MTR0# MTR0# DTR1BOUT1
INDEX# 32 62 RI1# PD4 FB181 2 60 OHM/500mA LPD4 AFD# FB191 2 60 OHM/500mA D_AFD#
INDEX# RI1 PD5 FB201 60 OHM/500mA LPD5 PD0 FB211 60 OHM/500mA LPD0
3MODE# 33 DENSEL 2 2
34 PD6 FB221 2 60 OHM/500mA LPD6 ERROR# FB231 2 60 OHM/500mA D_ERROR#
DRATE0 DRATE0/IRSL2
14M_SIO SIOCLK33M 70 PD7 FB241 2 60 OHM/500mA LPD7 PD1 FB251 2 60 OHM/500mA LPD1
IRTX
IRRX1 69
95 68 C700 C701 C702 C703 C704 C705 C706 C707
XA0/GPIO20 IRRX2/IRSL0

180PF/50V

180PF/50V

180PF/50V

180PF/50V

180PF/50V

180PF/50V

180PF/50V

180PF/50V
R745 R746 FINDEX# 94 67
68 +-1% 47 +-5% XA1/GPIO21 IRSL1
93 XA2/GPIO22 IRSL3/PWUREQ 66
92 XA3/GPIO23
C708 91
10PF/50V XA4/GPIO24/XSTB0#
90 XA5/XSTB1# XD0/GPIO00 3
C C_0402 87 2 C
C709 C710 XA6/GPIO26/PRIQA XD1/GPIO01
86 XA7/GPIO27/PIRQB XD2/GPIO02/JOYAY 1
10PF/50V 15PF 85 100
C_0402 C_0402 XA8/GPIO30/PIRQC XD3/GPIO03/JOYBY INIT# FB261
84 XA9/GPIO31/PIRQD XD4/GPIO04/JOYBX 99 2 60 OHM/500mA D_INIT# ACK# FB271 2 60 OHM/500mA D_ACK#
83 98 PD2 FB281 2 60 OHM/500mA LPD2 BUSY FB291 2 60 OHM/500mA D_BUSY
XA10/GPIO32 XD5/GPIO05/JOYAX SLIN# FB301
82 XA11/GPIO33 XD6/GPIO06 97 2 60 OHM/500mA D_SLIN# PE FB311 2 60 OHM/500mA D_PE
81 96 PD3 FB321 2 60 OHM/500mA LPD3 SLCT FB331 2 60 OHM/500mA D_SLCT
XA12/GPIO10 XD7/GPIO07
80 XA13/GPIO11
79 4 C711 C712 C713 C714 C715 C716 C717 C718
XA14/GPIO12 XWR#/XCNF1

180PF/50V

180PF/50V

180PF/50V

180PF/50V

180PF/50V

180PF/50V

180PF/50V

180PF/50V
78 XA15/GPIO13 XRD#/GPIO34/WDO# 5
77 XA16/GPIO14 XIOWR#/XCS1# 73
76 XA17/GPIO15 XIORD#/GPIO37 71
75 XA18/GPIO16 XCS0#/DR1#/GPIO25 72
74 XA19/DCD2#/GPIO17
VSS
VSS
VSS
VSS

PC87392VGJ
13
38
64
89

VCC5B

C719
C722 180PF/50V
10uF/6.3V

C720 C721 LPT_5 R747 1K +-1% CON21


1UF/10V 1UF/10V R_0603
STRB# FB341 2 60 OHM/500mA 1
D_AFD# 14
B B
CON25 LPD0 2
26 52 D_ERROR# 15
26 52 FINDEX# R748 33 +-5% LPD1
25 25 51 51 INDEX# 3
24 50 D_INIT# 16
24 50 LPD2
23 23 49 49 FDDDRV0# 4
22 48 D_SLIN# 17
22 48 LPD3
21 21 47 47 DSKCHG# 5
20 20 46 46 18
TP61 LPD4
19 19 45 45 6
18 18 44 44 19 27
1

17 43 LPD5 7 26
MTR0#
16
17
16
43
42 42 R749 0 +-5%
DRATE0
RS232 Function no assemble LPD6
20
1

15 15 41 41 DIR# 8
R750 0 +-5% VCC3B
14 14 40 40 3MODE# NS U50
Serial Debug Port LPD7
21
13 13 39 39 STEP# 9
12 38 RN37 33 X4 22
12 38
11 11 37 37 WDATA# TP50 1 1 TXD1 14 T1I T1O 9 1 NS 2 S_TXD1 CON22 D_ACK# 10
10 36 VCC3B 1 DTR1# 13 10 3 4 S_DTR1# S_TXD1 2 1 S_RXD1 23
10 36 FDDSENS# TP51 1 T2I T2O 2 1
9 9 35 35 WGATE# TP52NS1 1 RTS1# 12 T3I T3O 11 5 6 S_RTS1# S_DTR1# 4 4 3 3 S_RI1# D_BUSY 11
8 34 R751 0 +-5% R952 R953 NS 7 8 S_RXD1 S_RTS1# 6 5 S_DCD1# 24
8 34 RXD1 RN38 33 X4 S_CTS1# 6 5 S_DSR1# D_PE
7 7 33 33 TRK0# TO ICH7-GPIO? NS 1 19 4 8 7 12
10K +-5% 10K +-5%TP53 1 RIO R1I 8 7

2
4
6
8
6 32 SHOULD CONNECT 1 RI1# 18 5 1 NS 2 S_RI1# 10 9 25
6 32 TP54 1 R2O R2I 10 9 VCC5B
5 31 1 DSR1# 17 6 3 4 S_DSR1# CN11 D_SLCT 13
5 31 WP# TP55NS1 CTS1# R3O R3I S_CTS1# Aces_87216
4 4 30 30 TP56NS1 1 16 R4O R4I 7 5 6 180PF
3 29 1 DCD1# 15 8 7 8 S_DCD1# NS
3 29 RDATA# TP57NS1 R5O R5I NS PRINT_SUYIN_070454FR025
2 2 28 28 NS
1 27 NS NS NS 23 VCC3B CONN PRINT 070454FR025S100AU SUYIN
1 27 HEAD# FORCEON
2
4
6
8

1
3
5
7
22 FORCEOFF#
FDD_CONN 21 CN12
CONN FDD 52610-2690 MOLEX R954 R955 INVAILD#
20 R2OUTB 180PF
C898 0.01UF/16V
10K +-5% 10K +-5% C899 0.1UF/10V NS
28 C1+ VCC 26
NS NS 24 27 C900 0.1UF/10V
NS
C901 NS0.1UF/10V C1- V+ C902 0.1UF/10V
1
3
5
7

1 C2+ V- 3
2 C2- GND 25 NS
NS NS
MAX3243
A MAX3243CUI A

LENOVO.PND
NS
NB system design section
Title
SIO PC87391
Size Document Number
C Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 31 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC5B CON5 CN2


7 1 2 SENSE2
7 SENSE1
3 4

PS2 PORT
FUSE-1D5A6V 3 5 6 SENSE3
F1 1 FB51 30 OHM/3000mA PS2VCC PS2MC 3 SENSE0
2 5 5 7 8
34 XKBDCLK FB6 1 60 OHM/500mA PS2KC PS2MD 1
FB7 60 OHM/500mA PS2KD PS2KD 1
34 XKBDDATA 1 2 2
34 MSCLK FB8 1 60 OHM/500mA PS2MC PS2KC 6 220PF/50V
D FB9 60 OHM/500mA PS2MD PS2VCC 6 C_SMT8 D
34 MSDATA 1 4 4
VCC5B CN3
8 8
1 2 SENSE7
SUYIN_030336FR006T100ZU 3 4 SENSE6
5 6 SENSE5
PS2KC C257 180PF/50V 7 8 SENSE4

R302 4.7K +-5% PS2MC C258 180PF/50V C_SMT8


MSDATA 34
R303 4.7K +-5% 220PF/50V
XKBDCLK 34
R304 4.7K +-5% PS2KD C259 180PF/50V
XKBDDATA 34 CN4
R305 4.7K +-5%
MSCLK 34
PS2MD C260 180PF/50V 1 2 DRV4
3 4 DRV8
PS2VCC C261 0.1UF/10V 5 6 DRV1
VCC5B 7 8 DRV11
C262 10uF/6.3V 220PF/50V
CN5

HOTKEY# 34,35 1 C_SMT8 2 DRV2


C683 3 4 DRV13
R699 5 6 DRV0
0.1UF/10V

7 8 DRV15
0 +-5% VCC3M VCC3M 220PF/50V
C C
CN6
1 C_SMT8 2 DRV5
3 4 DRV6

2
4
6
8

2
4
6
8
5 6 DRV10
CON20 RN39 RN40 7 8 DRV7
10K X4 10K X4 220PF/50V
33 DRV[15..0] 42 41
DRV5 CN7
2 1
1 C_SMT8 DRV9

1
3
5
7

1
3
5
7
2
VCC3M 3 4 DRV14
DRV6 SENSE0 SENSE[7..0] 33 DRV3
4 3 5 6
DRV10 6 5 SENSE3 7 8 DRV12
DRV7 8 7 SENSE1
DRV4 10 9 SENSE2
DRV8 12 11 SENSE4 R951 220PF/50V
DRV1 14 13 SENSE5 C_SMT8
DRV11 SENSE6 200 +-5%
16 15
DRV2 18 17 SENSE7
DRV13 CN10
20 19 PWRSWITCH# 35
DRV0 22 21 1 2 DID2
VCC5B DRV15 24 23 3 4 DID1
DRV9 26 25 VCC3M 5 6 DID0
B DRV14 28 27 7 8 PWRSWITCH# B
DRV3 30 29
R700 DRV12 32 31 220PF/50V
10K +-5% 34 33 C_SMT8
36 35
38 37 R701 R702 R703
35 TP4_RESET 40 39
100K +-5% 100K +-5% 100K +-5%

C684 DID0 R704 0 +-5%


0.01UF/16V KEYBOARD CONN DID1 R705 0 +-5% KBDID0 33
C_0402 CONN KeyBoard 40P KX14-40K2D JAE DID2 R706 0 +-5% KBDID1 33
KBDID2 33

VCC5B

R707 R708 LENOVO.PND


4.7K +-5% 4.7K +-5% NB system design section
Title
TPDATA 34 KEYBOARD CONN & PS2
A A
TPCLK 34 Size Document Number
B Rev s1.3
Whistler
C685 C686
100PF/50V 100PF/50V Date: Friday, April 28, 2006 Sheet 32 of 52
C_0402 C_0402 "PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC3M VCC3M

VCC3M VCC3B

C687 C688 C689


C690 R713 R714 R715
10uF/10V 0.1UF/10V 0.1UF/10V
D 0.01UF/16V R716 10K +-5% 10K +-5% D
100K +-5% NS NS
4.7K +-5%

R719

R720

R721
R717

R718

R722

100K +-5% R923

100K +-5% R724

R725
6.19KOHM +-1%
VCC3M

100K +-5%
NS NS NS

10K +-5%

100K +-5%
10K +-5%

10K +-5%

10K +-5%

100K +-5%

R924
C691

R726 0 +-5% 0.1UF/25V


35,39 H8_RESET#
1. NEAR H8S/2116:
D65
2. SHORT PATTERN E10RESOUT# U32A
NS

76
77

36
86

13
1

1
3. NO PATTERN DRV[15..0] 32
UNDER THIS AREA 3 T5

AVCC
AVREF
VCC
VCC
VCC

VCL
E10RESIN#
2 NS T6 9 112 DRV0
MD1 P10 DRV1
25 MD2 P11 110
R727 0 +-5% 11 109 DRV2
DAP222T1G T7 NMI P12 DRV3
P13 108
Y5 143 107 DRV4
RESO-10MHZ-2 XTAL F2116TE20V_GPP14 DRV5
144 EXTAL P15 106
1 3 105 DRV6
T8 P16 DRV7
8 RES P17 104
12,35 SUSCLK_32K 18 P96/ /EXCL
DRV8
2

11,27,29,31,35 LPC_AD0 121 P30/LAD0 P20 103


11,27,29,31,35 LPC_AD1 122 102 DRV9
C P31/LAD1 P21 DRV10 C
11,27,29,31,35 LPC_AD2 123 P32/LAD2 P22 101
11,27,29,31,35 LPC_AD3 124 100 DRV11
P33/LAD3 P23 DRV12
11,27,29,31,35 LPC_FRAME# 125 P34/LFRAME P24 99
6,12,18,22,27,29,35 PLT_RST# 126 98 DRV13
P35/LRESET P25 DRV14
2 LPCCLK_H8_33M 127 P36/LCLK P26 97
128 96 DRV15 SENSE[7..0] 32
12,13,25,27,31,35 SERIRQ P37/SERIRQ P27
130 78 SENSE0
11,13 GATEA20 P81/GA20 P60/KIN0 SENSE1
12,13,25,27,31,35 CLKRUN# 131 P82/CLKRUN P61/KIN1 79
12,31,35 SUS_STAT# 132 80 SENSE2
P83/LPCPD P62/KIN2 SENSE3
P63/KIN3 81
120 82 SENSE4
12 H8WAKE# PB0/LSMI P64/KIN4 T9
119 83 SENSE5
12 H8SCI# PB1/LSCI P65/KIN5 T10
84 SENSE6
P66/KIN6 SENSE7
38 M_BATVOLT 68 P70/AN0 P67/KIN7 85
38 M_TEMP R728 1K +-5% 69 P71/AN1 T11
R991 100K +-5% 70
VCC3M P72/AN2 T12
71 P73/AN3 PB4 116 ECSPI_MOSI 35
72 P74/AN4 PB5 115 ECSPI_MISO 35 T13
R992 100K +-5% 73 114 ECSPI_CLK 35
VCC3M P75/AN5 PB6
74 P76/AN6 PB7 113 ECSPI_SS# 35
37 ACDC_ID 75 P77/AN7
NEAR H8
2 1 MPWRG 12,35,36,39
47 CPU_CURRENT R729 10K +-5% 66 31 D66 RB521S-30T1
NS PD0/AN8 PE1/ETCK NS
14 USB_ON2 65 PD1/AN9 PE2/ETDI 30 KBDID0 32
14 USB_ON1 64 PD2/AN10 PE3/ETDO 29 KBDID1 32
38 BAT_FET_HOT 63 PD3/AN11 PE4/ETMS 28 KBDID2 32
18 WLAN_RF_KILL# 62 PD4/AN12
29 X-00NB R762 0 +-5% 61
B R767 0 +-5% PD5/AN13 B
29 Y-45NB 60 PD6/AN14 ETRST 27 2 1
29 Z-45NB R816 0 +-5% 59 D67 RB521S-30T1
PD7/AN15 NS

AVSS
VSS
VSS
VSS
VSS
VSS
R723 R730 R731 C692 C693
R993 R732

111
139
42
95

67
100K +-5% R994 0.1UF/10V 0.1UF/10V

7
NS H8_RESET# 35,39
100K +-5%
100K +-5% 100K +-5%
100K +-5%
0 +-5%
T14
R733

R734 0 +-5%

E10RESOUT#
10K +-5%

LPCCLK_H8_33M

R972
33 +-5% LENOVO.PND
NB system design section
A Title A

H8-1
C910
10PF/50V Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 33 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC3B VCC3M

D R842 R843 R844 R845 R846 R847 D

10K +-5% 10K +-5% 4.7K +-5% 4.7K +-5% 4.7K +-5% 4.7K +-5%
R_0603 R_0603 R_0402 R_0402
NS NS

38 I2C_CLK_BT0
R850 0 +-5% I2C_CLK_SYS
47 I2C_CLK_PS
NS
VCC3M VCC3AUX
38 I2C_DATA_BT0
470PF/50V C_0603 R851 0 +-5% I2C_DATA_SYS
47 I2C_DATA_PS
C797 NS
470PF/50V C_0603
C798

R858 NS
470PF/50V C_0603
C799

R859
R860
R861

R862
R863
R864
R865
470PF/50V C_0603
VCC3B C800 R856 R857
R852 R853 R854 R855

VCC3M

10K +-5%

20K +-1%

20K +-1%
100K +-5%

100K +-5%

100K +-5%
100K +-5%

100K +-5%
100K +-5%
100K +-5%
100K +-5%

100K +-5%

100K +-5%
100K +-5%
R866
R916 R917 R918 R919
4.7K +-5%

4.7K +-5%

4.7K +-5%

4.7K +-5%
100K +-5%
C C
U32B
D85
39 24 EXTPWR_H8# 2 1
32 XKBDCLK PA2/KIN10/PS2AC P90/IRQ2 D86 EXTPWR# 26,35,36,39
32 XKBDDATA 38 PA3/KIN11/PS2AD P91/IRQ1 23 PWRSW# 35
32 MSCLK 37 PA4/KIN12/PS2BC F2116TE20V_GP P92/IRQ0 22
VIDEO_ID RB521S-30T1
2 1 HOTKEY# 32,35
32 MSDATA 35 PA5/KIN13/PS2BD P93/IRQ12 21
32 TPCLK 34 PA6/KIN14/PS2CC P94/IRQ13 20 PM_SLP_S3# 35,41
33 19 RB521S-30T1
32 TPDATA PA7/KIN15/PS2CD P95/IRQ14 PM_SLP_S4# 35

PA0/KIN8/PS2DC 41 HP_JACK_IN 21
14 40 R867 100K +-5%
38 I2C_CLK_BT0 P52/SCL0 PA1/KIN9/PS2DD R_0603
38 I2C_DATA_BT0 17 P97/IRQ15/SDA0
53 PG5/EXIRQ13/EXSCLA PB2 118 BAY_IS_HDD 17
VCC3B
54 PG4/EXIRQ12/EXSDAA PB3 117 PWRSW_H8# 12

I2C_CLK_SYS 135 94
P86/IRQ5/SCKA/SCL1 PC0/TIOCA0/WUE8 FAN_FRQ 5
R848 R849 I2C_DATA_SYS 138 93
P42/SDA1 PC1/TIOCB0/WUE9 MISCSMI# 35
4.7K +-5% 51 PG7/EXIRQ15/EXSCLB PC2/TIOCC0/TCLKA/WUE10 92 90W_AC# 39
4.7K +-5% 52 91
PG6/EXIRQ14/EXSDAB PC3/TIOCD0/TCLKB/WUE11 LPMODE# 50
R_0402 R_0402 90 SECURITY_LED
PC4/TIOCA1/WUE12
5 H8_SDA2 56 PG2/EXIRQ10/SDA2 PC5/TIOCB1/TCLKC/WUE13 89 LEDNUMLOCK 15
5 H8_SCL2 55 PG3/EXIRQ11/SCL2 PC6/TIOCA2/WUE14 88 LEDCPSLOCK 15
87 T19
PC7/TIOCB2/TCLKD/WUE15

11,13 RCIN# 136 P40/TMI0 PE0 32 BAY_ATTACH# 17


20 H8_SPKR 137 P41/TMO0
B 50 R868 560 +-1% B
PF0/IRQ8/PWN2 LID_SWITCH 15
12,13 BATLOW# 2 P43/TMI1/EXSCK1 PF1/IRQ9/PWM3 49
5 FAN_ON 3 P44/TMO1 PF2/IRQ10/TMOY 48
38 BATMON_EN 4 P45 PF3/IRQ11/TMOX 47
20 AUDIO_VOL_H8 5 P46/PWX0/PWM0 PF4/PWM4 46 CHARGE_VOLT_4D2V 39
39 CHARGE_CURRENT_1D8A 6 P47/PWX1/PWM1 PF5/PWM5 45 CHARGE_CELL0 39
VCC3M 44 CHARGE_CELL1 39
PF6/PWM6
PF7/PWM7 43 ENERGY_DET 22
T20 16
R920 T21 P50
15 P51 PG0/EXIRQ8/TMIX 58 CHARGE_VOLT_4D35V 39
PG1/EXIRQ9/TMIY 57

100K +-5% 129 10


P80/PME PH0/EXIRQ6
7,36 PANEL_POWER_ON 133 P84/IRQ3/TXD1 PH1/EXIRQ7 12
5,6,12,27,35,36,43 BPWRG 134 P85/IRQ4/RXD1 PH2/FWE 26 MAINOFF# 35
PH3/EXEXCL 140 SPK_MUTE# 20
PH4 141 MUTE# 20
PH5 142 DISCHARGE 36,37
T16
T17 R869
C801 C802 T18
68PF/50V

68PF/50V

100K +-5% R921 R922 R995


100K +-5%

100K +-5%
NS R870 R871 R872 R873 R874
100K +-5%

100K +-5%
100K +-5%
100K +-5%
100K +-5%
100K +-5%

LENOVO.PND
A
NB system design section A
Title
H8-2
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 34 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC3M

D6
VCC3SW 2
R257 VCC3M VCC3B VCC5B 26 GPS2224_SHDH#
20K5%(ZAS) 3

25 G_RST_PCI1520# 1

100K +-5%
R261 R258 R262 R263 R264 VCC3SW
34 PWRSW# R259 R260 R265 R266 R267 VCC3SW

100K +-5%

100K +-5%
D7 DAN222T1G

100K +-5%

100K +-5%
D8 4.7K +-5% 47K +-5% VCC3B VCC3P
1SS400PT61

47K +-5%

100K +-5%

100K +-5%
NS NS NS

1
RB521S-30T1 VCC3M
C247
1 C248
D 0.022UF/25V D

R269 R270 R268 R271 R272 R273 R274 R275 R276 R277

0.1UF/10V

100K +-5%

100K +-5%

100K +-5%

100K +-5%

100K +-5%

100K +-5%

100K +-5%

100K +-5%

100K +-5%
R278

47K +-5%
31

59

80

98
32 PWRSWITCH#

47K +-5%
U8 MG73Q511

VCC

VCC

VCC

VCC

VCC
11,27,29,31,33 LPC_AD[3:0]
LPC_AD0 6 93
LPC_AD1 LPC_AD0 GPIO0
5 LPC_AD1 GPIO1 92 DASP_BAY# 17
LPC_AD2 100
LPC_AD3 LPC_AD2
99 LPC_AD3
11,27,29,31,33 LPC_FRAME# 4 LPC_FRAME#
2 LPCCLK_GA_33M 2 LPCCLK_33M SERSTBY 51
6,12,18,22,27,29,33 PLT_RST# 94 PCIRST# CARDBUPDN# 78 CARDBUSPDN# 25
12,13,25,27,31,33 CLKRUN# 97 CLKRUN# G_RST_TI# 50
12,31,33 SUS_STAT# 96 SUS_STAT# H8RESET# 21 H8_RESET# 33,39
12,33,36,39 MPWRG 18 MPWRG VGARESET# 82
48 APWRG
5,6,12,27,34,36,43 BPWRG 47 SPWRG
12,33 SUSCLK_32K 56 SUSCLK_32K M_ON1 76 M1_ON 51
M_ON2 43 M2_ON 51
46 SWPWRG A_ON1 42 A1_ON 51
32 PWRSWITCH# B_ON2 89 B2_ON 51
5,36,37,41 PWRSHUTDOWN# 24 PWRSHUTDOWN# VAUXON 88 AUX_ON 51
34 MAINOFF# 23 MAINOFF# A_ON2 63
EXTPWR_PMH6# 73 EXTPWR# B_ON1 70 B1_ON 51
12 ICH_SLP_S3# 20 ICH_SLP_S3# PWRON# 75 PWRON_CB# 26
12 ICH_SLP_S4# 74 ICH_SLP_S5# PM_SLP_S3# 71 PM_SLP_S3# 34,41
R279 100K +-5% 68 72
51 A1_ON LATCH_RELEASE PM_SLP_S5# PM_SLP_S4# 34
PAD_DETECT#
9 FRAME# DOCKCLK_QSW_EN# 12
10 IRDY# DOCK_QSW_EN# 11
R280
EXTPWRG# 8 EXTPWRG DOCK_PRESET# 13
C249
SOLENOID_ON# 14 HOTKEY# 32,34
61 ULTRA_OK MISCSMI# 15 MISCSMI# 34
C 29 0 +-5% C
12,13,18,22 PCIE_WAKE# D9 1SS400PT61 0.047UF/16V PME#
11 DASPHDD# 1 64 DRIVEACT# IDERESET# 81
12,13,25,27,31,33 SERIRQ 67 IRQSER UBAY_RESET# 60 UBAY_RST# 17
65 58 T22
25 PCMACT PCMACT ULTRA_ON T23
5,12,13 PM_THRM# 54 THERM# UBAY_QSW_EN# 57
5,41,51 SHUTDOWN2# 17 SHUTDOWN2#
7 VGA_BLON 44 VGA_BLON# LEDDRIVE# 45 LEDDRIVE# 15
BACKLIGHT_ON 55 BACKLIGHT_ON 15
22 AUXPWRG
79 PAD_DETECT# AUXRESET# 19
ICHLANRST# 90 GBE_DISABLE# 22
R281 0 +-5% 39 91
33 ECSPI_CLK R282 0 +-5% XP_CLK PHY_PDN
33 ECSPI_MOSI 38 XP_DATA
R283 0 +-5% 37
33 ECSPI_SS# XP_LE
33 ECSPI_MISO 36 XP_OE# M1GATEON 28 M1GATEON 36
M2GATEON 27 M2GATEON 36
S1GATEON 41 S1GATEON 36
R286 R287 R288 R289 40
S2GATEON S2GATEON 36
NS NS NS R290 R291 62
BAT_CRG BAT_CRG 39,40
100K +-5%

100K +-5%

100K +-5%

100K +-5%

100K +-5%

100K +-5%

25 OSCIN M_TRCL 86 M_TRCL 39,40


26 OSCOUT S_TRCL 85
C250 77
TP4_RESET TP4_RESET 32
R292 87
12.4K +-1% PAD_RESET#

0.01UF/16V
BAYPASSPAD 52
BAYPASSPAD_QSW 49
30 PWRSEQ_EN

LEDPWR# 84 LEDPWR# 15
C251 R293 34
MG73Q511 LEDPFUEL0# LEDFUEL0# 15
100K +-5%

LEDFUEL1# 33 LEDFUEL1# 15
0.1UF/10V

LEDSUS# 69 LEDSUS# 15

GND
GND
GND
GND
GND
GND
GND
GND
R294 R295 R296

100K +-5%

100K +-5%
VCC3AUX

6.8K +-5%
95
83
66
53
35
16
R297

3
1
B B

100K +-5%
100K +-5%

R299
VCC3SW

D10
VCC3SW C252 C253 C254
51 AUX_ON 1
C255

0.01UF/16V

0.01UF/16V

0.01UF/16V
1SS400PT61
0.1UF/10V

R300 VL5

47K +-5%
LPCCLK_GA_33M
EXTPWR_PMH6# R301
Q3
R971
3

33 +-5% 10K +-5%


2SK3019-N-2GP

2
C256
C909
10PF/50V

1000PF/50V
1

EXTPWR# 26,34,36,39

A A

LENOVO.PND
NB system design section
Title
PWH7
Size Document Number
C Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 35 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VREGIN20 VINT20 VCC3M VCC5M VDD15


VCC3M VCC3A

Q50 NS
C752 C753 C754 C755 2SK3019-N-2GP
D D
R777 R778 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 3 1
10 +-5% 10 +-5%
NS

R779 R780

2
100 +-5% 100 +-5%
NS

R781
R782
2M +-1%

NS
100K +-5% VCC5M change 100k to 100
NS R783
2M +-1% VCC3M VDD15 VCC3SW
C756
D73 0.1UF/50V R784
VCC3B
1SS400PT61 NS 470K +-1%
1

NS C757 NS
R785 D74 R786
0.1UF/16V VCC5B
604K +-1% 1SS400PT61 0 +-5% C758 VCC3P

1
NS 1.5UF/25V R787

57

45

48

25

59
U40 100 +-5% R788
R789

VCC3SW
VCC3M

VCC5M
VREGIN16

VDD15
C759 100 +-5%
1000PF/50V 100 +-5% R790
100 +-5%
54 BAT_VOLT VCC3A 22
3A_DRV 21
41,51 VCC5M_ON 63 5M_ON
C
VCC3B 24 C
64 23

R791 0 +-5% 9
3M_ON
BD4175 3B_DRV 19
VCC3B_DRV 49

44,51 VCC1R8A_ON 3A_ON VCC5B


5B_DRV 18 VCC5B_DRV 49
19,51 B_ON 12 3B_ON
VCC3P 27
R792 0 +-5% 8 26
5B_ON 3P_DRV VCC3P_DRV 15

7,34 PANEL_POWER_ON 61 3P_ON VBL16 34


VBL16_DRV 33 VBL_DRV 15
R793 0 +-5% NS 16
R794 0 +-5% VBL16_ON VCC5M VCC5M
RD1_DRV 17
R795 0 +-5% 62 35
RD1_ON RD2_DRV VCC3AUX_DRV 48
60 13 R796 100 +-5%
51 VCC3AUX_ON RD2_ON VCCRD3M
R797 0 +-5% 14 30 R798 100 +-5%
RD3_ON RD3 VCC1R5M VCC1R5B
15 29 1 TP58
RD4_ON RD3_DRV 1
43 R799 100 +-5%
VCCRD4M
35 M1GATEON 6 M1GATEON
7 32 R800 100 +-5%
VCC3SW 35 M2GATEON M2GATEON RD4

RD4_DRV 31 B_DRV 49
35 S1GATEON 3 S1GATEON
35 S2GATEON 4 S2GATEON M1_DRV 40
M2_DRV 46
2 VCC1R5M VCC1R5B
R801 26,34,35,39 EXTPWR# EXTPWR#
S1_DRV 39
33K +-5% Q51
34,37 DISCHARGE 1 DISCHARGE S2_DRV 47
8 1
55 41 VCC3M
TH_DET BAT_DRV BAT_DRV 38
42 7 2 R802
DCIN_DRV DCIN_DRV 37 47 +-5%
R803 0 +-5% 52
5,35,37,41 PWRSHUTDOWN# SHDN#
M_PGS 51 6 3
B
38 VCPIN24 A_PGS 49 B
B_PGS 50 5 4
1

R804 R805
RT1 36 10 2.2K +-5%
C760 C761 CPUOT1 CLKIN
PRF15BB471QB-3GP VINT20 37 11 10K +-5% NS SI4856ADY-TI-GP
0.1UF/10V 0.22UF/50V CPOUT2 PGND1 CKOUT
PGND2
DGND

AGND
FIX_R

R806 D75
TEST

58 RESET# MPWRG 12,33,35,39


R807 0 +-5% RB521S-30T1

1
2

D76 VCC3B
44

56

20
28
53

78.7k +-1%
5

RB521S-30T1
1

C762
D77
1

R808 C763
RB521S-30T1 1.5UF/25V R809
C764
R810 10K +-5% 47K +-5% 0.1UF/25V
C765
1

D78 820PF/50V
RT2 RT3 0.1UF/10V 56.2K +-1%
PRF15BB471QB-3GP PRF15BB471QB-3GP RB521S-30T1
1

C766 BPWRG 5,6,12,27,34,35,43

1.5UF/25V
2

2
1

RT4 RT6 RT7 RT8 RT10 RT11 RT12


PRF15BB471QB-3GP PRF15BB471QB-3GP PRF15BB471QB-3GP PRF15BB471QB-3GP PRF15BB471QB-3GP PRF15BB471QB-3GP PRF15BB471QB-3GP
2

A A

LENOVO.PND
NB system design section
Title
TSURMAI
Size Document Number
C Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 36 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D ACDC_ID 33 D

VINT20
RV1 DCIN_AMP_20

1
UCLAMP3301D-GP
R766 NS
0 +-5% SOD_323
D71

1
DOCK_PWR20_F 1SS400PT61
SOD_523
J8 PR4
F11 Q44 Q45 10mohm +-0.5%
ACDC_ID 1
2 2 1 S D 8 1 S D 8 R_1632
VCC 1 S D S D
VCC 3 2 7 2 7
4 3 S D 6 3 S D 6
GND G D R768 G D
5 FUSE-7A24V-3-GP 4 5 4 5
GND R769 R770 1M +-5%
C740 FUSE_1206 C741
DC_IN CONN 470K +-1%
C742 200K +-5% 0.47UF/25V C743
HEAD MOLEX 87437-0543 0.01UF/50V SI4435BDY-T1-E3 SI4890DY-TI-E3 C744
100PF/50V R_0402 8P_SOP_150 0.01UF/25V 8P_SOP_150
0.1UF/50V
C_0603
D72
R771
R772 100K +-5%
1
100K +-5% DCIN_DRV 36

IN
C 1SS400PT61 R_0402 C
R_0402

2
SOD_523
Q47

R1
J9
Q46

R2
DTC115EE
1 1 3 OUT
2 2 R1
2 34,36 DISCHARGE
3 3 IN 1 GND
4 R2
4

OUT
GND
1

3
DTC115EE

GND

OUT
dc_in_bracket R773

3
0 +-5% Q48
R_0402
NS DTC115EE

R2

R1
R774

39 DCIN_CURRENT_P

IN
2
3
Q49 R775 0 +-5%
R_0402
2SK3019-N-2GP 0 +-5%
5,35,36,41 PWRSHUTDOWN# 2 SOT_416 R_0402
NS R776 10 +-5%
39 DCIN_CURRENT_N

1
B B

LENOVO.PND
A
NB system design section A
Title
DC-IN
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 37 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

C378
2200PF/50V BAT_PWR12 VINT20

D
J1 C_0603 D

1 F4 10A
2 2 1 8
R426 100 +-5% 1 FUSE_0451010
3 R427 100 +-5% R_0603 I2C_CLK_BT0 34
4 I2C_DATA_BT0 34 2 7 C379
9 R_0603
9 5 0.01UF/25V

390PF/50V
8 8 6 3 6
C_0402
7 C382
C381 4 5
BATTERY CONN 390PF/50V
C_0603 C_0603 Q25 SI4890DY 18.5MOHM
CONN BATTERY 1903969_1 TYCO 8P_SOP_150

VCC3M
FLOWER DAVANDI
R429 100K +-5%
BAT_DRV 36
R423 R_0603
6.19KOHM +-1%

33 M_TEMP
C380

2200PF/50V
C_0603

C C
VCC3B

VREGIN20
DOCK_PWR20_F

D38
1
R432 F6
4.7K +-5% 2 3
R_0402 1
2
FUSE_D5A32V
FUSE_0603
BAT_FET_HOT 33 DAN222T1G
SOT_416_ANTI
1

BAT_PWR12
L13
PRF15BB471QB-3GP
FB_0402

M_BAT_TRCL
2

D39
1
F5
2 3
1
2
FUSE_D5A32V
FUSE_0603
B DAN222T1G B
SOT_416_ANTI

BAT_PWR12
Q59
D41
DTA114EE
1 SOT_416 3 1 2

C383 C384 UDZSF


SOD_323 R433
0.1UF/16V 0.1UF/16V 6.04KOHM +-1%
C_0402 C_0402 R_0402
2

M_BATVOLT 33

R434
2K +-1%
R_0402

BATMON_EN 34
IN
2

LENOVO.PND
A A
Q27 NB system design section
R1

R2

DTC115EE Title
BATTERY INPUT
Size Document Number
Custom Rev s1.3
D43 1SS400PT61 Whistler
OUT3

GND1

2 1
Date: Friday, April 28, 2006 Sheet 38 of 52
SOD_523 "PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

M8765_3R3V Q10
R371
34 90W_AC#

3
2SK3019-N-2GP
100K +-5% NS
M8765_3R3V 37 DCIN_CURRENT_N
37 DCIN_CURRENT_P 2 CHARGE_CELL0 34
DOCK_PWR20_F

1
CHARGE_CELL1 34
R372 R373 R374
10K +-1% 10K +-1% DOCK_PWR20_F 8765_AGND
D R375 100K +-5% VINT20 D
NS
M8765_VCTL 100K +-5% Q12

3
R377 2SK3019-N-2GP
Q11 D25 C347 C349 C348
??
2SK3019-N-2GP 69.8K +-1% R378 12.7K +-0.5% 0.01UF/50V
NS 4.7UF/25V 4.7UF/25V
2 R379 2
34 CHARGE_VOLT_4D2V 1SS400PT61 16.2K +-1%

1
3
NS

1
M8765_3R3V
8765_AGND Q13 R381 R382

5
2SK3019-N-2GP R380 Q14 8765_AGND
34 CHARGE_VOLT_4D35V 2
20 +-1% 20 +-1% OUT 3
16.2K +-1% PQ1
C350 NS R1 2 M8765_3R3V IRF7313TRPBF
R383 0.1UF/50V GND 1

1
IN
10K +-1% R2 R384
NS
8765_AGND DTC115EE C351
R385 120K +-1% 8765_AGND 8765_AGND NS 1UF/10V
M8765_3R3V C353 8765_AGND 825 +-1%
NS 1UF/25V 8765_AGND R386
C352 C354 1.33K +-1%

4
0.1UF/50V U17

27

26
R387 0.01UF/16V 1 17 8765_AGND

CSSP

CSSN
6.98K +-1% 8765_AGND DCIN CELLS 8765_AGND
12 REFIN
M8765_VCTL 15 2 R389 33.3 +-5%
M8765_ICTL 13 VCTL LDO R390 2.2 +-5% CHARGER_OUT12
ICTL BST 24 1 2
C R391 22 D26 1SS400PT61 C
DLOV
3

0 +-5% C356 10 C355 0.1UF/50V


NS R392 0.1UF/50V ACIN PR3
8765_AGND DHI 25
Q15 140KOHM +-1% 11 23 L12 IND-10UH-65
R388 ACOK# LX
34 CHARGE_CURRENT_1D8A 2 8 SHDN# DLO 21
2SK3019-N-2GP 402 +-1% 20 20mohm +-0.5%
M8765_ICHG PGND L_S103 C357
9 ICHG
IINP
1

28 IINP CSIP 19 C358


M8765_CCV 7 18
8765_AGND CCV CSIN R394 0.01UF/50V 4.7UF/25V
6 CCI BATT 16 C359

R395
8765_AGND 5 14 C360

REF

CLS
CCS GDN1 2.2 +-5% 4.7UF/25V

C365M8765_CCI
GDN2 29

M8765_CCS
1UF/25V
3

1K +-5%
C361 C362
Q16 MAX8765ETI_GP 0.1UF/50V

3
D27 1SS400PT61 NS 4.7UF/25V
2SK3019-N-2GP C363
2 1 2
8765_AGND 470PF/50V
35,40 M_TRCL
C364

D28 1SS400PT61 0.01UF/25V

10K +-1%
R396 100K +-5%
1

2 1

M8765_CLS
1UF/16V
1000PF/50V

R397
0.01UF/25V

8765_AGND
0.1UF/50V

20K +-1%

C368
1000PF/50VC367

0.1UF/50V
D31 1SS400PT61 R398 1K +-5%
C366

2 1 NS
35,40 BAT_CRG R400
C369

R399

C370

R401 26.7K +-1%


B D32 10K +-5% R402 B
1 7.32K +-1%
12,33,35,36 MPWRG R403
3
33,35 H8_RESET# 2
DAP222T1G C371
0 +-5% 0.1UF/50V
8765_AGND8765_AGND 8765_AGND 8765_AGND

VCC3SW 8765_AGND

R404 J12
10K +-5% 1 2

26,34,35,36 EXTPWR# JUMPER1


Q17
3

2SK3019-N-2GP
8765_AGND

2
1

R405 0 +-5%
50 ISYS
LENOVO.PND
A
NB system design section A
Title
BATTERY CHARGE
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 39 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

CHARGER_OUT12 BAT_PWR12
D D
FDC658P-2
SOT23_6

1 6
2 5
3 4

Q18
R406 C372
47K +-5%
C373 C374 0.1UF/25V
R407 R_0402
0.1UF/50V 0.1UF/50V 220K +-5% C_0603
C_0603 C_0603 R_0402

R408
100K +-5%
R_0402

3
Q56
R409 75K +-5%
35,39 BAT_CRG 2SK3019-N-2GP
R_0402 2
C D33 SOT_416 C

1 2 R410 1K +-5% C375

1
1SS400PT61 R_0402 0.01UF/50V
SOD_523 C_0603

M_BAT_TRCL

D34
Q19 1

FDN358P 3

2 3 2
NS
C376
R411 DAN222T1G
0.01UF/50V 47K +-5% SOT23_3 SOT_416_ANTI
C_0603 R_0402 D35
NS

1
NS NS 1

B R412 2 B
4.7K +-5%
R_0402
NS DAN222T1G
SOT_416_ANTI
NS

Q20
3 OUT
2 R1
35,39 M_TRCL
IN 1 GND
R2
DTC115EE
NS

LENOVO.PND
NB system design section
Title
CHARGE SELECT
A Size Document Number A
B Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 40 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC5M VCC3M VINT20

2
D49
R453 R454
D DAN222T1G 20 +-1% 20 +-1% VL5 D
SOT_416_ANTI R_0603 R_0603 VINT20

3
VDD15
C389 C390
VINT20 2.2UF/16V 2.2UF/16V C391 R455 C392 C393
0.1UF/10V
C_0402 120K +-1% 4.7UF/25V 4.7UF/25V
C394

3
C_1210 C_1210 D50
C395 0.47UF/25V
D87 CUS02
2
0.47UF/25V C_0805 CUS02
DAP222T1G C_0805
C396 C397 SOT_416_ANTI Warnning: this diode
4.7UF/25V 4.7UF/25V CUS02 pin 1 is +,pin2
R456

2
is -.
C_1210 C_1210 27K +-1% D51
R_0402 PQ3 VDD15 CUS02
2
D52 SI4684DY D53 1SS400PT61 CUS02
PU1
CUS02 8P_SOP_150
2

21

20
2 1
CUS02 PQ4 C398 Warnning: this diode
MAX1901

5
6
7
8
CUS02 pin 1 is +,pin2
SI4684DY SOD_523

V+

VL
Warnning: this diode
32P_QFN_5X5 0.01UF/25V is -.
8P_SOP_150 C399
CUS02 pin 1 is +,pin2
1901_AGND C_0402
is -.
STEER 1 1UF/25V

8
7
6
5
SECFB 2 C_1206
D54 C400
CUS02
2
0.01UF/25V 4
CUS02 R457 C401
C_0402 1 +-5% PL1 VCC5M
BST5 17
Warnning: this diode
CUS02 pin 1 is +,pin2 4 1 4
C402 R458 R_0603
is -.
DH5 14
C 1 +-5% 0.1UF/25V PR1 C

3
2
1
24 BST3
15 C_0603 2 3 10mohm +-0.5%
VCC3M PL3 R_0603 LX5
27 DH3

5
6
7
8
PR2 2.5UH 0.1UF/25V R_1632
1
2
3

DL5 18
10mohm +-0.5% L_S103 LX_1.05V C_0603 26 PQ5 R459IND-6D8UH-40-GPU
LX3 2.2 +-5%
4P_L_S13 C403 CT14
C404 +
R_1632 R460 23 12 FDS6690AS
DL3 CSH5
8
7
6
5

2.2 +-5% 100PF/50V 8P_SOP_150 220UF/10V/SANYO


C405 + CT15 PQ6 11 C_0402 4 0.1UF/25V TAJ_E
C406 CSL5 C407
29 C_0603
330UF/6.3V/SANYO FDS6690AS 100PF/50V CSH3 R461 470PF/50V
FB5 10
0.1UF/25V TAJ_E 8P_SOP_150 C_0402 30 VL5 1.5M +-5%
C_0603 CSL3 R_0402
C408 4 DL_1.05V
R462

3
2
1
31 FB3
470PF/50V 1M +-5% 7 R463
R_0402 REF R464 10.5K +-1%
SEQ 13
3 R_0402
SYNV 1K +-5% C409
1
2
3

36,51 VCC5M_ON 4 TIME/ON5 R_0402


28 100PF/50V
51 VCC3M_ON RUN/ON3 C_0402
R465 C410 8 6
3.48K +-1% SKIP# NC#6
9 RESET NC#16 16
R_0402 100PF/50V 25 R466
C_0402 NC#25
NC#32 32 1K +-5% R467
R_0402 10K +-1%
NS R_0402
22 SHDN# EXT_PAD 33
R468 R469 0 +-5%
34,35 PM_SLP_S3#

PGND
10K +-1% 1901_AGND

GND
R_0402 VCC3SW R_0603
VL5 C411
B R470 0 +-5% 0.01UF/16V B
C412 C413 C414

19
R471 NS C_0402 1901_AGND

5
1901_AGND D55 33K +-5% 33PF/50V 1UF/10V 1UF/10V
2 R_0402 1901_AGND C_0402 C_0603 C_0603
5,35,36,37 PWRSHUTDOWN#
3

5,35,51 SHUTDOWN2# 1

DAP222T1G 1901_AGND
SOT_416_ANTI 1901_AGND

J15
1 2

JUMPER1
xcopper
LENOVO.PND
1901_AGND
NB system design section
Title
A A
SYSTEM POWER
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 41 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D VCC1R5M D

C520

4.7UF/6.3V
PQ23 C_0805
1 6 VCC1R2AUX
VCC5M
2 5

3 4
C_0402

0.1UF/10V
U21 FDC655BN C522 C523

10UF/6.3V

10UF/6.3V
51 VCC1R2AUX_ON C521 SOT23_6 R547
16 R546
VDD 374 +-1% 1K +-1%
DRV1 1
15 R_0402 R_0402
MAX8563_FB1 DRV2 C_0805 C_0805
2 FB1 DRV3 7
14 FB2
MAX8563_FB3 8 MAX8563_FB1
C FB3 C

0.1UF/25V
POK1 4
VCC3M 3 12
EN1 POK2 C524
13 EN2 POK3 10
R549 R548
9 EN3 715 +-1%
6 5 C_0603 VCC3M
10K +-1% NC#6 GND
11 NC#11 GND 17
R_0402

C526

4.7UF/6.3V
0.1UF/10V

R550 16p_qsop_150_P PQ24


NS C525 1.2K +-5% IC_MAX8563EEE 1 6
C_0805
2 5 VCC2R5M
C_0402

3 4

SI3442BDV C527 C528


SOT23_6 R552 C_0805 C_0805
R551
374 +-1% 1K +-1%

10UF/6.3V

10UF/6.3V
B B
R_0402 R_0402

MAX8563_FB3

0.1UF/25V
R553
C529 249 +-1%

C_0603

LENOVO.PND
NB system design section
Title
VCC2R5M/VCC1R2
A A
Size Document Number
B Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 42 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D D

VCC5M VL5
VINT20

R521 R522
0 +-5% 0 +-5%

NS
1.5UF/25V

1.5UF/25V

1.5UF/25V

1.5UF/25V

1.5UF/25V
1.5UF/25V

0.1UF/16V

1.5UF/25V

1.5UF/25V

1.5UF/25V

1.5UF/25V

1.5UF/25V
R523

1UF/10V
D60

3
C488 C489 C490 C491 C492 C493 20 +-5%
C494 C495

1.5UF/25V
PQ17 PQ18
SI4684DY SI4684DY C496 C497 C498 C499 C500 C501
DAP222T1G

2
8
7
6
5

8
7
6
5

0.01UF/25V
R524

0.01UF/25V

0.01UF/25V
PU3

5
6
7
8
C862 1K +-5%

20

19
5
NS MAX1540 C502 PQ19 C504
NS

1UF/10V

0.1UF/25V
V+
VCC

LDOOUT
SI4684DY

0.1UF/25V
4 4
C505 C506
C507 R525
1 OVP/UVP 4
VCC1R05B 1540_AGND 22
1K +-5% LDOON
R526 1 +-5% R527 1 +-5% VCC1R5M
1
2
3

1
2
3
23 BST1 BST2 16

3
2
1
25 DH1 DH2 14
C C
PL7 PQ20 PQ21 24 15 PL8
1.4UH/9.5A SI4856ADY LX1 LX2 2.5U/7.5A
SI4856ADY 21 18 <OPTION>
CT23 DL1 DL2
8
7
6
5

8
7
6
5

5
6
7
8
30 9 R528 CT24
R529 CSP1 CSP2 PQ22 2.2 +-1%
2.2 +-5%
0.01UF/16V

0.01UF/16V
+ 29 10
EEFSXOD331M7

CSN1 CSN2 SI4856ADY +

EEFSXOD331M7
C508 R530 3.3K +-5% C509
4 4 27 OUT1 4
28 FB1 OUT2 12
11 C510
FB2 R531
C511 NS 470PF/50V
3.3K +-5%
1
2
3

1
2
3

3
2
1
51 VCC1R05B_ON 32 ON1
470PF/50V 4 31
TON ON2
8 REF PGOOD1 26

R532 6 13 C512 C513


R533 ILIM1 PGOOD2
2.7K +-5% 0.047UF/25V 0.047UF/25V
100K +-5%

R534 7 ILIM2
120K +-1% 2 SKIP#
GND 33
3 LSAT
R538 R535

GND
12.4K +-1%
C514 C515
82K +-1%

C516 C517 R536


0.047UF/25V 0.047UF/25V

17
R537 10K +-1%
R540 R539
51K5%(ZAS)

10K +-1%
470PF/50V

470PF/50V

2.7K +-5% VCC1R5M_ON 51

B B
VCC3B R541
R542 10.5K +-1%
4.99K +-1% R_0402

R5430 +-5%
R544
NS 4.7K +-5%

R545
33PF/50V
1UF/10V

10K +-1%
VTT_PWRG 51
C518 C519

1540_AGND
R1001

BPWRG 5,6,12,27,34,35,36
1540_AGND
0 +-5%
<OPTION>
1540_AGND

J14
1 2

A JUMPER1 A

LENOVO.PND
1540_AGND NB system design section
Title
VCC1R5M/VCC1R05B
Size Document Number
C Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 43 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC1R8A
D D

VCC0R9B
R506
20 +-5%

C464 C_0805 VINT20


C466 C_0805
VCC1R8A
10UF/6.3V

10UF/6.3V
C468

0.1UF/25V
C470 C471

1UF/10V
4.7UF/6.3V

4.7UF/6.3V
C_0603 C469 VCC5M

1.5UF/25V

1.5UF/25V

1.5UF/25V

1.5UF/25V

1.5UF/25V

1.5UF/25V
PU2 8632_AGND C_0603 C472 C473 C474 C475 C476 C477
DDR2_VREF MAX8632

14
C_0805 C_0805
8632_AGND C_0805 C_0805 C_0805 C_0805 C_0805 C_0805

REFIN
C_0603
13 VTT1 GND 29
C485
1UF/16V

0.01UF/25V
R507 10 +-5% C478

1UF/10V
12 VTT AVDD 26
C479
R508 9 VTTS

5
6
7
8
4.7K +-5% C_0603
R_0402 11 22 PQ15
PGND2 VDD C_0402
FDS6612A
10 VTTR 8P_SOP_150

2
C VINT20 C
D59 4
VIN 17 1SS400PT61
1K +-5% R_0402 VCC1R8A
R509 R510 2.2 +-1% SOD_523
2 OVP/UVP BST 20

0.1UF/25V

1
R511 100K +-5% R_0402 R_0603 C_0603

3
2
1
5 POK1
19 C480 PL6
R512 100K +-5% R_0402 LX 2.5U/7.5A
6 POK2

5
6
7
8
25 18 L_S103 CT22
SKIP# DH R513

0.01UF/16V
R514 1K +-5% R_0402 1 PQ16 TAJ_E
TON HAT2195R01 2.2 +-1%
24 +

EEFSXOD331M7
GND R_0603
21 8P_SOP_150 C481
3900PF/50V C482 DL
8 SS 4
R_0402 8632_AGND C_0402 C483
R515 100K +-5% R_0402 3 23
REF PGND1
10K +-5%

R516 C_0402
4 27 470PF/50V
ILIM SHDNA# VCC1R8A_ON 36,51
C_0603

3
2
1
470PF/50V

33PF/50V

R517 15 28
C484 C861 C_0603 C_0603 FB TPO
10K +-1%
1UF/10V

16 OUT STBY# 7 VCC0R9B_ON 51


C486 C487

C_0603 C_0402 28P_QFN_5X5


1UF/10V

8632_AGND
NS

B 8632_AGND B

R518
1K +-5%
R_0402
R519 1K +-5% R_0402 NS

R520
10K +-1%
R_0402
NS

8632_AGND

J13
1 2
LENOVO.PND
A NB system design section A
JUMPER1
xcopper Title
VCC1R8
8632_AGND
Size Document Number
Custom Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 44 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VINT20

C913 C914
10UF/25V 10UF/25V
C_1206 C_1206
NS NS
VCC5B
PQ7 PQ8 VINT20
2 1 IRF7821 IRF7821
PD3 RB520S-30TE61-GP

5
6
7
8

5
6
7
8
D D
C415
C416 C419 C904 C905 C417 C418
VCC5B 4.7UF/10V R472
4.7 +-5% 0.47UF/16V 1000PF/50V 10UF/25V 10UF/25V 10UF/25V 10UF/25V
R473 10 +-5% VCC_AD3207 C_1206 C_1206 C_1206 C_1206
4 4

C421

1UF/10V
C420 U18 VCCCPUCORE
10UF/10V PL4
C_0805 PWM1

3
2
1

3
2
1
1 IN BST 10

VCORE_ON 2 9 0.36uH
SD# DRVH

5
6
7
8

5
6
7
8
SGND3 R474 ETQP4LR36WFC IMVP-6 solution for
DRVLSD1 3 ADP3419 8 2.2 +-5% 0.36uH/ESR=0.8m
DRVLSD# SW Yonah: 2-phase/40A
VID6 0 +-5% R475 R_0402 4 7 NS
4 CPU_VID6 H_DPRSLP# 3,11 CROWBAR GND D56

1
R_SMT8 SGND3 5 6 4 4 SOD_123
VID5 RN35 1 PSI# 3 VCC DRVL
2 0 X4 +-5% C422

H_DPRSLP#
4 CPU_VID5 VID4
4 CPU_VID4 3 4
VID3 5 6 470PF/50V
4 CPU_VID3 VID2 1N5819HW
4 CPU_VID2 7 8

PSI#
R476

3
2
1

3
2
1
VID1 R477 R_0402 0 +-5% SW1 PQ9 PQ10
4 CPU_VID1 VID0 R478 R_0402 R888 SI4856ADY SI4856ADY VINT20
4 CPU_VID0 0 +-5%
0 +-5% 7.32K +-1%
R_0402
C915 C916
R479 R480
0 +-5% 0 +-5% 10UF/25V 10UF/25V
C_1206

C810
VCORE_ON NS R889 VCC5B C_1206

1UF/10V
51 VCORE_ON PQ11 PQ12 NS NS VINT20
0 +-5% IRF7821 IRF7821
R_0402 2 1
R890 PD4 RB520S-30TE61-GP

5
6
7
8

5
6
7
8
1 2 C423 C427
VCC3B 1 2 C426 C906 C907 C424
U19
40

39

38

37

36

35

34

33

32

31
4.7UF/10V C425
C R481 C
VR_PWRGD R482 0 +-5% R_0402 100Kohm 4.7 +-5% 0.47UF/16V 1000PF/50V 10UF/25V 10UF/25V 10UF/25V 10UF/25V

VCC
VID0

VID1

VID2

VID3

VID4

VID5

VID6

DPRSTP#

PSI#
12 VR_PWRGD VCC3B R483 THERMISTOR 5% C_1206 C_1206 C_1206 C_1206
3.01K +-1% 1 30 4 4
EN TTSENSE
1000PF/50V C428 3207_VRTT U20
2 PWRGD VRTT 29
FBRTN R484 C429
SGND3

ADP3207
3.01K +-1% 4700PF/50V3 28 DRVLSD1 PL5
SGND3 PGDELAY DCM# PWM2

3
2
1

3
2
1
1 IN BST 10
R_0402 R4850 +-5% 4 27 SD#
2 CKGEN_EN# CLKEN# OD# SD# 0.36uH
2 SD# DRVH 9

5
6
7
8

5
6
7
8
R_0402 R4860 +-5% FBRTN 5 26 PWM1 R487 ETQP4LR36WFC
4 VSSSENSE C430 330PF/50V FBRTN PWM1 ADP3419 2.2 +-5% 0.36uH/ESR=0.8m
3 DRVLSD# SW 8

LFCSP40
NS C431 6 25 PWM2
C432 FB PWM2 NS
4 CROWBAR GND 7
R488 R489 33.2K +-1% 18PF/50V 7 24 VCC_AD3207 D58

1
4 VCCSENSE 1.65K +-1% COMP PWM3
5 VCC DRVL 6 4 4
220PF/50V C433 0.012UF/50V
8 SS 23 R490 0 +-5%SW1 C434 VCCCPUCORE
SGND3 SW1 R_0402 SOD_123
C435 9 22 R491 1.5KSW2
+-1% 470PF/50V
SGND3 680PF/50V STSET SW2 1N5819HW
R492 0 +-5% D57
RAMPADJ

3
2
1

3
2
1
10 21
CSCOMP

1
12 DPRSLPVR_IMVP R_0402 DPRSLP SW3 SW2 PQ13 PQ14 SOD_123
CSSUM
CSREF
LLSET
RPRM
VPRM
ILIMIT

41 SI4856ADY SI4856ADY
GND

GND1 SGND3
RT

J2 1N5819HW
1 2
11

12

13

14

15

16

17

18

19

20

NS

R494 R495 JUMPER1


R493 R886 0 +-5% R_0402
CPUSENSE_CSREF 47
191K +-1% 80.6K +-1%
200K +-1% SGND3
R887 0 +-5% R_0402
CPUSENSE_CSCOMP 47

SGND3

1
VCC3B SGND3 C436
C437 R496 R497 R498

1
B C438 1500PF/50V B
73.2K +-1% 100Kohm
200PF/50V

2
1000PF/50V 237K +-1% THERMISTOR 5%

SGND3 VCCCPUCORE
C439 R499 165K +-1% 2
Place R491 close CT16 CT17 CT18 CT19 CT20 CT21
1000PF/50V R501 R500 137K +-1% SW1
to output inductor TAJ_E TAJ_E TAJ_E TAJ_E TAJ_E TAJ_E

EEFSXOD331M7

EEFSXOD331M7

EEFSXOD331M7

EEFSXOD331M7

EEFSXOD331M7

EEFSXOD331M7
R502 0 +-5% R503 R504 137K +-1% SW2 of phase 1. + + + + + +
3.01K +-1% R_0402
NS 0 +-5%
R_0402
SGND3

VINT20
PROCHOT# 3
R505
3

Q29 NS 0 +-5% VCCCPUCORE


R_0402
3207_VRTT 2SK3019-N-2GP
2 SOT_416

C440
1

1000PF/50V

SGND3

A A

LENOVO.PND
NB system design section
Title
VCCCPUCORE
Size Document Number
C Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 45 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D D

VINT20

C745
C746 C747 C748 C749 C750 C751
0.47UF/25V
0.47UF/25V 0.47UF/25V 0.47UF/25V 0.47UF/25V 0.47UF/25V 0.47UF/25V
C C

B B

LENOVO.PND
NB system design section
Title
VCORE INPUT CAP
A A
Size Document Number
B Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 46 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D D

VCC3B
VCC3B

CPU_CURRENT 33
C794
0.1UF/10V
NS
C_0402 VCC3B

U42 U43
C C
6 1 R839 10K +-5% 1 8
FB OUT NS AIN0 VDD
5 VDD GND 2 2 AIN1 GND 7
4 3 R_0402 3 6
45 CPUSENSE_CSCOMP IN- IN+ CPUSENSE_CSREF 45 AIN2 SDA I2C_DATA_PS 34
4 AIN3 SCL 5 I2C_CLK_PS 34
MAX4460EUT-GP
NS MAX1037EKA-T-GP
SOT23_6 NS
C795 SOT323_8
R840 0.1UF/10V VCC3B
NS
100K +-5% C_0402
NS
R_0402
C796
0.1UF/10V
NS
R841 C_0402
2K +-1%
NS
R_0402

B B

LENOVO.PND
NB system design section
Title
POWER MONITOR
A A
Size Document Number
B Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 47 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D D

VCC3M VCC3AUX
VCC2R5M VCC2R5AUX Q52
SOT23_3 FDN359N
Q53
FDN359N 3 2

0.1UF/16V

0.1UF/16V

0.1UF/16V

0.1UF/16V
3 2

SOT23_3 R811 C767 C768 C769


33 +-5% C770
R_0402 R812

1
33 +-5%

1
C C
R_0402 C_0402 C_0402C_0402 C_0402
R813
R814 0 +-5%
0 +-5% D79 R_0402
R_0402
RB521S-30T1 D80

1
SOD_523
RB521S-30T1

1
SOD_523

36 VCC3AUX_DRV

C771 C772
R815
0.022UF/25V 47K +-5% 0.022UF/25V
R_0402

B B
VCC3M
0.1UF/16V

0.1UF/16V

0.1UF/16V

0.1UF/16V

0.1UF/16V

0.1UF/16V

C773 C774 C775 C776 C777 C778

C_0402 C_0402
C_0402C_0402 C_0402 C_0402

LENOVO.PND
NB system design section
Title
SW1
A A
Size Document Number
B Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 48 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC2R5M VCC2R5B
Q54

D FDN359N D
SOT23_3
3 2

R817
47 +-5%

1
R820
0 +-5% D81
R_0402
RB521S-30T1

1
SOD_523
0.01UF/25V

C_0402

C784 36 B_DRV

C C

VCC5B
VCC3M VCC5M

VCC3B
PQ27
1 6

2 5
PQ26 FDC655BN
1 SOT23_6
6
3 4
2 5

0.1UF/16V FDC655BN R822

0.1UF/16V

0.1UF/16V
3 4 SOT23_6
C786 C787 C788 R823 100 +-5%

C_0402 C_0402 C_0402 0 +-5%


R_0402
PQ28 FDC655BN
B 1 SOT23_6
6 D83 B
RB521S-30T1

1
2 5 SOD_523

36 VCC5B_DRV
3 4

0.1UF/25V
R825
C_0603
R824 47K +-5%
270 +-5% R_0402 C789

D84
RB521S-30T1
1

SOD_523
LENOVO.PND
NB system design section
Title
36 VCC3B_DRV
SW2
A A
0.1UF/25V

Size Document Number


B Rev s1.3
R826 Whistler
C_0603
47K +-5% Date: Friday, April 28, 2006 Sheet 49 of 52
R_0402 C790 "PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VCC3M

D VCC5M D

R827
DCIN_AMP_20
100K +-5%
R828 R_0402

51.1K +-1%
R_0402
C791
0.1UF/25V LPMODE# 34
C_0603
R829

301K +-1%

U41B

3
U41A

8
R830 100K +-5% 5 R831 Q55
C 39 ISYS + C
R_0402 7 R832 10K +-1% 3 +
R833 100K +-5% R_0402 2SK3019-N-2GP
6 - 1 2 SOT_416
R_0402 2 -
LM392MXNOPB-GP 1K +-1%
8P_SOP_150 LM392MXNOPB-GP
4

1
8P_SOP_150

4
R834 C792
200K +-1% 0.1UF/16V
R_0402 C_0603

R835 10K +-1%


R_0402

VCC3M

B B

R836
1K +-5%
R_0402

R837
10K +-1%
VR1 R_0402

3 CATHODE REF 4
2 C793
LENOVO.PND
NC#2
1 NC#1 ANODE 5
0.1UF/10V NB system design section
R838
C_0402 Title
LMV431ACM5-2-GP 10K +-1%
SOT23_5 R_0402
MAX POWER CONTROL
A A
Size Document Number
B Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 50 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D D

R438 56K +-5%


35 AUX_ON R_0402
D44
R440 1K +-1% 1 2
R_0402 VCC1R2AUX_ON 42
R437
10K +-1% 1SS400PT61 C385
35 M1_ON R_0402 VCC5M_ON 36,41 SOD_523
R439 0 +-5% 0.047UF/16V
R_0402 VCC3M_ON 41 C_0402
R441 0 +-5% R443 10K5%(ATL)
35 M2_ON R_0402 VCC1R5M_ON 43
R442 0 +-5% D45
35 A1_ON R_0402 VCC1R8A_ON 36,44 R444 1K +-1%
C 1 2 VCC3AUX_ON 36 C
R_0402

1SS400PT61 C386
SOD_523
0.047UF/16V
C_0402

VCC3B

R445
D46 47K +-5%
1 R_0402
35 B2_ON
3 R448 0 +-5%
R449 0 +-5% R_0402 VCORE_ON 45
B_ON 19,36 5,35,41 SHUTDOWN2# 2
R_0402
DAP222T1G C387
SOT_416_ANTI 1000PF/50V
35 B1_ON C_0402

B R450 0 +-5% B
R_0402 VCC0R9B_ON 44 D47

43 VTT_PWRG 1 2

1SS400PT61
R451 15K +-5% SOD_523
R_0402 VCC1R05B_ON 43

D48
R452 1K +-1% 1 2
R_0402

1SS400PT61 C388
SOD_523
0.1UF/10V LENOVO.PND
C_0402
NB system design section
Title
POER SEQUENCE
A A
Size Document Number
B Rev s1.3
Whistler
Date: Friday, April 28, 2006 Sheet 51 of 52
"PROPERTY NOTE: this document contains information confidential and property to
LENOVO PND and shall not be reproduced or transferred to other documents or
disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VINT20 VINT20 VINT20 VINT20 VINT20 VINT20 VINT20 VINT20 VINT20 VINT20 VINT20 VINT20

CC36 CC37 CC38 CC39 CC40 CC41 CC42 CC43 CC44 CC45 CC46 CC47
VCC3AUX
0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V
NS NS NS NS NS NS NS NS NS NS NS NS

CC32 CC33 CC34 CC35


0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V VCC5M VCC3M VCC3B VCC3B VCC3B VCC3B VCC3B VCC3B VCC3B
NS NS NS NS CC91 CC82 CC84 CC85 CC86 CC87 CC88 CC89 CC90

0.01UF/25V

0.01UF/25V

0.01UF/25V

0.01UF/25V

0.01UF/25V

0.01UF/25V

0.01UF/25V

0.01UF/25V

0.01UF/25V
D D

VCC3B VCC3B VCC3B VCC3B VCC3B VCC3B VCC3B VCC3B VCC3B VCC3B VCC3B VCC3B VCC3B VCC3B VCC3B VCC3B
CC92 CC93 CC94 CC95 CC96 CC97 FMC21 FMC22 FMC23 FMC24 FMC25 FMC26 FMC27 FMC28 FMC29 FMC30 FMC31 FMC32 FMC33 FMC34 FMC35 FMC36

0.01UF/25V

0.01UF/25V

0.01UF/25V

0.01UF/25V

0.01UF/25V

0.01UF/25V
CC74 CC1 CC2 CC3 CC4 CC5 CC6 CC7 CC8 CC9 FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>

F
0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V
NS NS NS NS NS NS NS NS NS NS

1
VCC1R5B VCC1R5B VCC1R5B
FMC49 FMC50 FMC51 FMC52 FMC54 FMC55 FMC56 FMC57 FMC53 FMC58 FMC59 FMC38 FMC40
VCCCPUCORE VCCCPUCORE VCC1R05B VCC3M VCC3B VCC5M VCC5M VCC3B VCC3B CC75 CC76 CC77 FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC
<OPTION>
<OPTION>
<OPTION>
<OPTION> <OPTION> <OPTION> <OPTION> <OPTION> <OPTION> <OPTION> <OPTION> <OPTION>
<OPTION>

F
0.01UF/25V 0.01UF/25V 0.01UF/25V
CC29 CC31 CC22 CC13 CC98 CC15 CC16 CC99 CC100 NS NS NS

1
0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V
NS NS NS NS NS NS VCC5B VCC5B VCC5B

FMC63 FMC64 FMC65 FMC66 FMC67 FMC68 FMC69 FMC70 FMC71 FMC72 FMC60 FMC41 FMC42 FMC43 FMC39
CC48 CC49 CC50
FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC
0.01UF/25V 0.01UF/25V 0.01UF/25V <OPTION> <OPTION>
<OPTION>
<OPTION> <OPTION> <OPTION> <OPTION>
<OPTION>
<OPTION> <OPTION> <OPTION>
<OPTION>
<OPTION> <OPTION> <OPTION>

F
VCC0R9B VCC0R9B VCC0R9B NS NS NS
C C

1
CC51 CC53 CC52
0.01UF/25V 0.01UF/25V 0.01UF/25V FMC73 FMC74 FMC75 FMC76 FMC77 FMC78 FMC79 FMC80 FMC81 FMC82 FMC12
NS NS NS
FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC
<OPTION> <OPTION>
<OPTION>
<OPTION> <OPTION> <OPTION> <OPTION>
<OPTION>
<OPTION> <OPTION> <OPTION>

F
1

1
FMC83 FMC84 FMC85 FMC86 FMC87 FMC88 FMC10 FMC11 FMC9 FMC13
FMC14
FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC
<OPTION> <OPTION>
<OPTION>
<OPTION> <OPTION> <OPTION>
<OPTION> <OPTION>
<OPTION> FMC
<OPTION>

F
<OPTION>

F
HOLE H3

1
FMC1 FMC2 FMC3 FMC4 FMC5 FMC6 FMC7 FMC8 FMC61 FMC62 FMC15
1

<OPTION> FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC
1

<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION>
<OPTION> <OPTION> <OPTION>

F
1

1
FMCK2FMCK3FMCK4FMCK5FMCK6FMCK7FMCK8FMCK9FMCK10
FMCK11
FMCK12
FMCK13
FMCK14
FMCK15
FMCK16
FMCK17
FMCK18
FMCK19
FMCK20
FMCK21
HOLE H1 HOLE H2 HOLE H10 HOLE H11 HOLE H7
B FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC FMC B

F
1

1
<OPTION> <OPTION> <OPTION> <OPTION> <OPTION> FMCK22
FMCK23
FMCK24
FMCK25
FMCK26
1

FMC FMC FMC FMC FMC

F
VCC5M VCC5M VCC5M VCC5M VCC5M VCC5M VCC5M VCC5M VCC5M

1
CC54 CC55 CC56 CC57 CC58 CC59 CC60 CC61 CC62 FMCK27
FMCK28
FMCK29
FMCK30 FMCK1
0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V FMC FMC FMC FMC FMC
HOLE H12 HOLE H13 HOLE H14 HOLE H15 HOLE H16 HOLE H17 HOLE H8 HOLE H9 NS NS NS NS NS NS NS NS NS

F
1

1
1

<OPTION> <OPTION> <OPTION> <OPTION> <OPTION> <OPTION> <OPTION> <OPTION>


HOLE H4
1

HOLE H6
VCC3M VCC3M VCC3M VCC3M VCC3M VCC3M
AGND
1

CC63 CC64 CC65 CC66 CC67 CC68


1

<OPTION>
<OPTION> 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V
1

HOLE H18 HOLE H19 HOLE H20 HOLE H21 HOLE H22 HOLE H23 HOLE H24 NS NS NS NS NS NS
1

LENOVO.PND
A A
NB system design section
Title
1

HOLE H25 HOLE H26 <OPTION> <OPTION> <OPTION> <OPTION> <OPTION> <OPTION> <OPTION> EMC PAD&HOLE
VCC1R2AUX VCC1R05B VCC1R05B VCC1R05B VCC1R05B
1

Size Document Number


Custom Rev s1.3
Whistler
CC69 CC70 CC71 CC72 CC73 Date: Friday, April 28, 2006 Sheet 52 of 52
1

0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V 0.01UF/25V "PROPERTY NOTE: this document contains information confidential and property to
NS NS NS NS NS LENOVO PND and shall not be reproduced or transferred to other documents or
1

disclosed to others or used for any purpose other than that for which it was obtained
without the expressed written consent of LENOVO PND."

5 4 3 2 1

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