1.

00 PLL1 No PLL PreScaler

1.00 PLL2 Divide By 2(8MHz oscillator input)
1.00 PLL3 Divide By 3(12MHz oscillator input)
1.00 PLL4 Divide By 4(16MHz oscillator input)
1.00 PLL5 Divide By 5(20MHz oscillator input)
1.00 PLL6 Divide By 6(24MHz oscillator input)
1.00 PLL10 Divide By 10(40MHz oscillator input)
1.00 PLL12 Divide By 12(48MHz oscillator input)
1.03 CPUDIV1 No System Clock Postscaler
1.03 CPUDIV2 System Clock by 2
1.03 CPUDIV3 System Clock by 3
1.03 CPUDIV4 System Clock by 4
1.05 USBDIV USB clock source comes from PLL divide by 2
1.05 NOUSBDIV USB clock source comes from primary oscillator
1.08 INTXT Internal Oscillator, XT used by USB
1.08 INTHS Internal Oscillator, HS used by USB
1.08 HS High speed Osc (> 4mhz for PCM/PCH) (>10mhz for PCD)
1.08 HSPLL High Speed Crystal/Resonator with PLL enabled
1.08 XT Crystal osc <= 4mhz for PCM/PCH , 3mhz to 10 mhz for PCD
1.08 XTPLL Crystal/Resonator with PLL enabled
1.08 EC_IO External clock
1.08 EC External clock with CLKOUT
1.08 ECPIO External Clock with PLL enabled, I/O on RA6
1.08 ECPLL External Clock with PLL enabled and Fosc/4 on RA6
1.08 INTRC_IO Internal RC Osc, no CLKOUT
1.08 INTRC Internal RC Osc
1.14 NOFCMEN Fail-safe clock monitor disabled
1.14 FCMEN Fail-safe clock monitor enabled
1.15 NOIESO Internal External Switch Over mode disabled
1.15 IESO Internal External Switch Over mode enabled
2.00 NOPUT No Power Up Timer
2.00 PUT Power Up Timer
2.01 BROWNOUT_SW Brownout controlled by configuration bit in special file register
2.01 BROWNOUT_NOSL Brownout enabled during operation, disabled during SLEEP
2.01 BROWNOUT Reset when brownout detected
2.01 NOBROWNOUT No brownout reset
2.03 BORV46 Brownout reset at 4.6V
2.03 BORV43 Brownout reset at 4.3V
2.03 BORV20 Brownout reset at 2.0V
2.03 BORV28 Brownout reset at 2.8V
2.05 NOVREGEN USB voltage regulator disabled
2.05 VREGEN USB voltage regulator enabled
2.08 NOWDT No Watch Dog Timer
2.08 WDT Watch Dog Timer
2.09 WDT128 Watch Dog Timer uses 1:128 Postscale
2.09 WDT64 Watch Dog Timer uses 1:64 Postscale
2.09 WDT32 Watch Dog Timer uses 1:32 Postscale
2.09 WDT16 Watch Dog Timer uses 1:16 Postscale
2.09 WDT256 Watch Dog Timer uses 1:256 Postscale
2.09 WDT512 Watch Dog Timer uses 1:512 Postscale
2.09 WDT8 Watch Dog Timer uses 1:8 Postscale
2.09 WDT4 Watch Dog Timer uses 1:4 Postscale
2.09 WDT2 Watch Dog Timer uses 1:2 Postscale
2.09 WDT1 Watch Dog Timer uses 1:1 Postscale
2.09 WDT32768 Watch Dog Timer uses 1:32768 Postscale
2.09 WDT16384 Watch Dog Timer uses 1:16384 Postscale
2.09 WDT8192 Watch Dog Timer uses 1:8192 Postscale
2.09 WDT4096 Watch Dog Timer uses 1:4096 Postscale
2.09 WDT2048 Watch Dog Timer uses 1:2048 Postscale
2.09 WDT1024 Watch Dog Timer uses 1:1024 Postscale
3.08 CCP2C1 CCP2 input/output multiplexed with RC1
3.08 CCP2B3 CCP2 input/output multiplexed with RB3
3.09 NOPBADEN PORTB pins are configured as digital I/O on RESET
3.09 PBADEN PORTB pins are configured as analog input channels on RESET
3.10 LPT1OSC Timer1 configured for low-power operation
3.10 NOLPT1OSC Timer1 configured for higher power operation
3.15 MCLR Master Clear pin enabled
3.15 NOMCLR Master Clear pin used for I/O
4.00 NOSTVREN Stack full/underflow will not cause reset
4.00 STVREN Stack full/underflow will cause reset
4.02 NOLVP No low voltage prgming, B3(PIC16) or B5(PIC18) used for I/O
4.02 LVP Low Voltage Programming on B3(PIC16) or B5(PIC18)
4.06 XINST Extended set extension and Indexed Addressing mode enabled
4.06 NOXINST Extended set extension and Indexed Addressing mode disabled
(Legacy mode)
4.07 NODEBUG No Debug mode for ICD
4.07 DEBUG Debug mode for use with ICD
5.00 NOPROTECT Code not protected from reading
5.00 PROTECT Code protected from reads
5.14 CPB Boot Block Code Protected
5.14 NOCPB No Boot Block code protection
5.15 NOCPD No EE protection
5.15 CPD Data EEPROM Code Protected
6.00 NOWRT Program memory not write protected
6.00 WRT Program Memory Write Protected
6.13 NOWRTC configuration not registers write protected
6.13 WRTC configuration registers write protected
6.14 WRTB Boot block write protected
6.14 NOWRTB Boot block not write protected
6.15 NOWRTD Data EEPROM not write protected
6.15 WRTD Data EEPROM write protected
7.00 EBTR Memory protected from table reads
7.00 NOEBTR Memory not protected from table reads
7.14 EBTRB Boot block protected from table reads
7.14 NOEBTRB Boot block not protected from table reads