Professional Documents
Culture Documents
1/07)
Certified by :
Date : Date :
NOTES : * If the thesis is CONFIDENTIAL or RESTRICTED, please attach with the letter from
the organisation with period and reasons for confidentiality or restriction.
Signature : ………………………………………………………………
Supervisor : ASSC. PROF. DR. NORAZAN BIN MOHD KASSIM
Date :
HARDWARE DEVELOPMENT OF ATTENDANCE MANAGEMENT
USING PORTABLE RFID SYSTEM
MAY 2009
ii
Signature : ………………………………………………………………
Supervisor : MUHAMMAD ZAIRIL BIN MUHAMMAD NOR
Date :
iii
ACKNOWLEDMENT
Alhamdulillah to Allah, because of His bless, I can finished my final year project
with good health and cheerful until the last day.
During the process to finish this project, many problems encounter to enhance
knowledge especially in technical managements. However, with the qualities of
integrity and responsibility, I can prepare myself to self-confidence in any technical
problem along with the spirit of teamwork and the cooperation that given by my
supervisor and friends.
I would like to thank a lot to all my friends who gives me idea to solve problem
occurs in this project. I also like to thank my intelligent supervisor, Assc. Prof. Dr.
Norazan B Mohd Kassim that has guided me from the beginning until it finished. This
project cannot be completed without his guidance and support.
Moreover, I did like to thank a lot to my dearest family who gives me a lot of
love and spirit to finish this project till the end.
ABSTRACT
ABSTRAK
TABLE OF CONTENT
TITLE i
DECLARATION ii
DEDICATION iii
ACKNOWLEDGEMENT iv
ABSTRACT v
ABSTRAK vi
CONTENTS vii
LIST OF FIGURES x
LIST OF TABLES xi
1 INTRODUCTION
1.1 Background 1
1.2 Problem Statement 2
1.3 Objective 3
1.4 Scope of Project 3
1.5 Methodology 4
1.6 Summary of Work 5
1.7 Outline of thesis 6
2 LITERATURE REVIEW
2.1 Introduction 8
2.2 RFID Technology 9
2.2.1 RFID tag 10
viii
3 METHODOLOGY
3.1 Introduction 22
3.2 RFID Reader 23
3.3 Project’s RFID tags 24
3.4 Storage 25
3.5 RS 232 interface circuit 26
3.5.1 MAX 232 26
3.5.2 PIC16F84A 27
3.5.3 RS 232 male connector 28
3.6 Component list and total cost 29
4.1 Introduction 31
4.2 Project Description 32
4.3 Project Result 32
4.4 Discussion 34
5.0 Introduction 37
5.1 Conclusion 37
ix
5.2 Recommendation 38
REFERENCES 39
APPENDICES 41
x
LIST OF FIGURES
LIST OF TABLES
2.1 RF Spectrum 9
INTRODUCTION
1.1 Background
This traditional way can be upgrade to the new technology that more suitable
with era of technology nowadays. Today, there are many technologies that can replace
this old fashion of attendance taking. In working field, many company use ‘punch card’
system to collect data of their workers attendance. Other company also used finger print
2
technology for this reason. Furthermore, many institutions in Europe used only
software to take the attendance of their student.
RFID technology can be used for identification process by used radio frequency
(RF) as their medium of work. In this project, RFID systems were used to improve the
disadvantages of attendance system used currently. RFID is a technology who
commonly used in many systems currently. Because of that, this project wanted to
develop the used of RFID system in term of attendance management for lecturers.
There are many disadvantages occurred when we used the old system of
attendance taking. This old system will take long time utilization. Mean that more time
being used for student in order to sign the attendance sheet. In attendance system used
currently, attendance sheet will go around the class and students will sign on it. This
will take more time for attendance sheet to go around the class. Furthermore, student
attention will disrupt when the attendance sheet came to them or they does not get the
attendance sheet that has been passed.
Sometime, there are several students that always signed the attendance sheet for
their friend and this will give effect on the quality of graduated student in that
institution. Other disadvantage of this way of attendance taking is difficulty of a
lecturer to manage the attendance of their student and sometime a lecturer forget to
3
bring the attendance sheet along with them. All of these are the common problem that
happened if the traditional way of attendance taking used.
1.3 Objective
The main aim of this project is to ease lecturer’s work in class attendance
management by using RFID technology. The following are the specific objectives of
this project:
RFID Tag
Figure 1.1: Block Diagram of Portable Attendance Scanner using RFID Reader
4
Figure 1.1 shows the block diagram for this project. To achieve the objectives of
this project, several works has to be outlined.
i. The first part of this project is scanner part. This included study about RFID
system that will be used. This project are consists of RFID tags and readers.
ii. The second part is this project mainly used to store the attendance of student in
class.
iii. The last part is interface part between RFID reader and computer using RS232
interface. The compatibility issued need to be considered to make sure all the
data arrived on computer not corrupted.
iv. All data that will be send to lecturer’s computer will be manipulate by software
call Microsoft Visual Basic 6.0.
1.5 Methodology
The methodology of this project commence with a study about scanner that
widely used nowadays. This is included to find the suitable scanner that been used for
this project. In this project, RFID reader will act as a scanner. After that, this project is
also need a study about storage in scanner either internal or external memory. This
memory must also include the networking system for sending data stored in there to the
notebook. Figure 1.2 and 1.3 shows about the schedule for this project during FYP 1 and
FYP 2.
5
Weeks 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15
Title of
Project
Literature
Review
Find
Equipment
Presentation
Report
Writing
Figure 1.2: Gantt chart for FYP1
Weeks 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15
Thesis
Literature
Review
Circuit
Development
Troubleshoot
Exhibition
Submit thesis
Figure 1.3: Gantt chart for FYP 2
The flows of this project initiate with the tag scanning. RFID tag will act as
student metric card and required to wave tags through RFID reader. Once this tag being
scan, the data of that student will be stored in the storage part. This data will temporary
stored at flash memory. After all of the data stored, this data will be transferred to the
6
1.7 Ou
utline of Th
hesis
Chapter 2 will discussed about literature review of this project. It also contains
this basic knowledge of RFID system that consists of tags and readers, microcontroller,
serial communication interface and the description of software which were used in this
project.
Chapter 4 described the result and implementation of this project. All the
analysis of project will be discuss in this chapter.
Chapter 5 will provide the conclusion and future recommendation of this project
for anyone who interested to do further study in this project.
CHAPTER 2
LITERATURE REVIEW
2.1 Introduction
control unit to encode the data in RF transponder (tag) and thus to identify any item with
which transponder is associated.
An RFID tag is a card that can store and transmit data to a RFID reader using
radio waves. Each tag has information programmed in it. Tags can be very thick as
paper sheet. Simplest ones have only antenna and diode. These tags only reflect signals
incoming from transmitters. These are tags that are commonly used in supermarkets and
other places for securing goods from stealing. If signal is reflected, alarm is triggered.
When tag is scanned by seller, it is simply electrically destroyed so it won’t trigger an
alarm.
In this RFID system, tag can be classified into three different types which are
passive, semi passive and active tags. Passive tags are RFID tags that no have on board
power source. The electromagnetic field generated by reader antenna will trigger
passive tag’s power. Reader antenna has to transmit enough power to provide enough
energy to tag so it could to transmit back data. This will cause reading distance become
limited about several centimeters only. This kind of tags is commonly used because it
cheap and has smaller size. This tag usually consists of single IC chip and an antenna
coil which is usually flat. This kind of tags is only operating at frequency below 100
MHz and main energy carried by magnetic field. Figure 2.1 shows example of RFID tag
used in current technology.
11
Figure 2.1: RFID passive tag
For active tags, they don’t need to be activated by antenna reader. This kind of
tags was fully powered transmitter. In some cases tags may not need a reader antenna
because it can be configured to interact with each other. Active tag can communicate up
until several kilometers. Main disadvantages of active tags are big size and production
price is higher compared to passive ones. Figure 2.2 shows diagram of active RFID tag.
Figure 2.2: RFID active tag
Figure 2.3: RFID semi passive tag
RFID reader has many advantages compared to barcode scanner. For barcode
scanner, line of sight (LOS) needed for reading process while for RFID reader it’s
optional. RFID reader also has durability. These mean that the data from RFID tag can
be read by RFID reader at any condition. It not affected by weather, stain, dirt or partial
ripped. For barcode scanner, if bar coding was damage, the data in that bar coding can’t
be read. This made barcode scanner not very durable. Other than that, data capacity of
RFID reader is better than barcode scanner. It gives advantage in manufacturing sector
so that more data can be store at one RFID tag. Bar code is limited to like 20 characters
13
and for RFID tags can easily 512bits and more. For active RFID reader, we can read and
write a data at it RFID tag. While for barcode scanner, the data cannot be
reprogrammable once it program.
The identification systems consist of tags and readers. This data will be stored at
tags and readers will read the data. The data will be stored and retrieve remotely using
radio waves. Figure 2.5 show about the component used in RFID system.
144
Figure 2.5:
2 Componeents of an RF
FID system
2.3 Miicrocontrolller
In this project, PIC 16F84A was used as microcontroller. PIC 16F84A use to
control bit stream of data coming from flash memory. PIC 16F84A microcontroller
consists of data memory (RAM) and EEPROM. The data memory contains 68 bytes and
64 bytes for EEPROM. There are also 13 I/O pins that user-configured on a pin-to-pin
basis. The features include in this PIC 16F84A:
Figure 2.6 shows diagrams of PIC 16F84A microcontroller. Table 2.1 shows pin
description of PIC 16F84A.
Serial communication has two types which are asynchronous and synchronous
communication. Synchronous communication need more complex interface and clock
was sent along with a higher data rate compared to asynchronous communication.
Synchronous communication requires all exchange of communication respond end
without initiating a new communication.
For asynchronous communication, it usually use for a situation where data can be
transmitted from time to time rather than in a steady stream. A telephone conversation
is an example of asynchronous communication since both parties can talk whenever they
want. The difficulty of this communication is at receiver part. At this part, it must have
a way to find the end of conversation of other side so that one of them starts to speak. In
computer communication, this difficulty can be overcome by introduce special bits to
indicate the beginning and the end of each communications.
19
The programming tools used in this project are MicroC, Proteus 7 Professional
and AVR Studio.
2.6.1 MikroC
the user to fully control execution of programs on the AT90S In-circuit Emulator or the
built-in AVR Instruction Set Simulator. AVR Studio supports source level execution of
Assembly programs assembled with Atmel Corporation’s AVR Assembler and C
Programs compiled with IAR Systems’ ICCA90 C Compiler for AVR microcontroller.
AVR Studio runs under Microsoft Windows95 and Microsoft Windows NT.
The key of window of AVR Studio is the Source Window. The source window
gives information about control flow of project. In addition, AVR Studio offers a
number of other windows which enables the user to have a full control of the status of
every element in the execution target. The available windows are:
i. Watch window
ii. Register window
iii. Memory window
iv. Peripheral window
v. Message window
vi. Processor window
In this project, Proteus ISIS is used to designed a schematic diagram of all circuit
used. ISIS also provides the interactive system level simulator. This software combines
mixed mode circuit simulation, microprocessor models and interactive component
models. ISIS also provides the means to enter the design in the first place, the
architecture of interactive simulation and the system managing the source ad object code
associated with each project.
21
For Proteus ARES, it used to design the PCB (Printed Circuit Board) layout.
This software allows us to design the arrangement of component used at PCB. The
arrangement of component used can be arrange either automatically or manually.
However, it is recommended to arrange the component manually because by doing this,
the compression of space in PCB can be achieve. For this project, there are some
limitations of this software. Some electronic component do not have spice model to put
in the PCB design.
In order to load the program in the microcontroller, this software was used. This
software will load all program made into internal memory of PIC16F874A. once the
HEX file was created in MicroC, this file then loaded into PIC16F874A using this PIC
Kit.
2.7 Conclusion
From the literature review made, it can be conclude that RFID systems suit with
this project because of their advantages compared to other identification systems. The
entire components used in this project are based on this finding.
CHAPTER 3
METHODOLOGY
3.1 Introduction
In this chapter, there will focusing on methodology for this project in detailed.
This chapter also will descript on the component used in overall of this project include
type of RFID reader, tags, storage and RS 232 circuit. Lastly, this chapter will list down
all the price of component used in this project for budget purposes.
233
3.2 RF
FID Readerr
In this projectt, RFID reaader JBC3000EF (as shoown at figurre 3.1) was being used.
The readeer is passivee reader. This
T type of
o reader is choose beccause the liimitation off
budget forr this projeect. It onlyy cost RM 2220 per item
m. At firstt, barcode scanner
s wass
used as a scanner in this projectt. From thee research made,
m barcoode scannerr give manyy
disadvantaages as saidd in previouus chapter. From that, this RFID rreader was used in thiss
I commonn notebook or computters, they were
project. In w designn with RS 232 femalee
connector. This RFIID reader iss also usedd serial connnection as ttheir type of
o interface.
With this, RFID readder can easiily connect to the compputer so thee compatibiility issue iss
not a probblem. JBC3300EF RFID
D reader is aalso simply communicaated with th
he computerr
through H
HyperTerminnal. From the
t HyperT
Terminal, th
he serial num
mber of RFID tags cann
be appeareed.
Figu
ure 3.1: JBC300EF RFID reader
r
Bi-collor LED
RS2322 serial cablle (female) cable for PC
C
PS2 foor power source
• Reeading rangee : 7 cm
• Reesponse time : 0.1s
RF
FID tag thatt had been used
u g which has no internall
in thiss project is passive tag
power sup
pply. The frequency
fr ussed for this tag was 125
5 kHz. This tag can bee read at thee
distance aabout 7 cm from
f the RF
FID reader. After tagss being scann, the data will
w be storee
at storage part. Figurre 3.2 shows RFID tag that been used
u in this pproject.
Figure
F 3.2: Paassive RFID tags
5
25
3.4 Stoorage
• DATAFLA
ASH, 32MB
B, SERIAL
L, 2.7V, 45D
DB321
• Memory Type
T :Flash
h, NOR
• Interface Type
T :Seriall, SPI
• Memory Size
S :32Mb
bit
• Memory :8K x 512Byte paages
26
The software that been used to programmed this AT45DB321D is AVR Studio.
AVR Studio command is very hard to understand. All the source code had to be done
independently. This project failed to work because of source code that been
programmed not meet description of the project (take and deliver data). In future
reasearch, this type of flash memory is not recommended because that need high level of
programming.
This part of project used to link between storage part and lecturer’s computer.
This circuit can be divided into three part; PIC 16F84A, MAX 232, and RS 232 male
Connector.
This part is used to convert data from serial binary data signal into TTL signal.
As known, all digital devices required TTL logic level to operate. All capacitor in this
circuit used to overcome noise problem since this unwanted signal will affected whole
system of this project.
27
7
Figgure 3.5.1: Scchematic diaggram of volta
age regulator [11]
28
8
Figure 3.5.2: Schematic D
Diagram of PIIC 16F84A[12]
Fig
gure 3.6 sh
how the RS 232 male connector. It consists of nine pin
ns. This RS
S
232 is a sstandard thaat describe about
a the physical
p inteerface and pprotocol forr low speed
d
communiccation betw
ween computters and rellated devicees. RS 232 male conneector can bee
plugged sstraight into
o PC serial port. The pin
p connecttion used inn RS 232 is
i shown ass
table 3.1.
29
Table 3.1: RS 232 pins assignment (DB9 signal set)[11]
Normal PC hardware may only need to connect transmitter, reciever and ground
connection to operate.
From the finding, all the component had to be short listed to calculate total cost
of this project. Table 3.2 show the all the component list with their price per item.
4.1 Introduction
This chapter will show about the result that obtained in this project and some
discussion regarding on how to avoid problem appeared during process of finishing this
project. Discussion held by referring the objectives of this project.
32
By using Proteus ARES, the schematic diagram of RS 232 circuit for this project
was implemented into PCB layout. Figure 4.1 shows the PCB layout for RS 232 circuit.
The process was completed using thi steps.
4.4 Diiscussion
entire source code window function as to be studied. The whole function of source code
is shown at appendix A. For this project, programming to take data from RFID was
failed. The source code to call the function of taking data is unsuccessfully done.
Figure 4.4: Source code for import data from RFID reader
Figure 4.4 shows the source code used to import data from RFID reader. To
define size of data coming from RFID reader, it can be done by writing the address size
as shown in the figure. Then, when the size of data being defined, SPI (Serial Parallel
Interface) driver also must be define in order for flash memory to communicate with
RFID reader. When the pointer pointed at command “SPID_SendCommand”, SPI
36
6
Figure 4.5: O
Overall circuit
CHAPTER 5
5.0 Introduction
This chapter will be focusing on the conclusion and future recommendation of this
project. Future recommendation is used for further research if they any person or student wanted
to continue this project.
5.1 Conclusion
In this era of technology, RFID systems were widely used in many identification systems.
This project only contributes on small part of the RFID application that can be used to take
attendance effectively. Even though much upgraded technology of identification system used
that provide more security such as eye detection identification technology and thumbprint
38
identification technology, this project still can be used in small institutes, laboratory, schools,
and other related places because this project come with lower price.
This project failed to work and further research is recommended to overcome lacks of
attendance management system used now. This project can help lecturer in maintaining
attendance management. If the project success, it will ease lecturer work in management of
attendance talking.
5.3 Recommendation
Right now, USB (Universal Serial Bus) is a famous interface technology. For future
development, it recommended to use this type of interface instead using RS 232 serial interface.
Even though the USB protocol is hard to understand, it gives more advantages rather than serial
interface. The data rates of USB are much higher if compared with serial interface. Second
recommendation is to use RFID antenna to replace flash memory part. By using RFID antenna,
it gives easier scanned for student to scan their metric card. It will work as a same principle of
“Smart Tag” system. Student only has to passing through RFID reader and their name will be
recorded.
In future, the researcher also needs to consider about the security of this system. This
system is not secure enough when there are students who scan metric card for their friend who
didn’t come.
REFERENCES
Thesis
Internet
APPENDICES
Source for AVR Studio
//--------------------------------------------------------------------------------------------------------
// Headers
//-------------------------------------------------------------------------------------------------
#include "at45.h"
#include <board.h>
#include <utility/assert.h>
#include <string.h>
//-------------------------------------------------------------------------------------------------------
// Internal definitions
//--------------------------------------------------------------------------------------------------
//------------------------------------------------------------------------------------------------------
// Local variables
//---------------------------------------------------------------------------------------------------
//-----------------------------------------------------------------------------------------------------
// Internal variables
//---------------------------------------------------------------------------------------------------
};
//--------------------------------------------------------------------------------------------------------
// Exported functions
//--------------------------------------------------------------------------------------------------
/// Initializes an AT45 instance and configures SPI chip select register. Always returns 0.
/// \param pAt45 Pointer to the At45 instance to initialize.
/// \param pSpid Pointer to the underlying SPI driver.
/// \param spiCs Chip select value to connect to the At45.
//--------------------------------------------------------------------------------------------------------
// Sanity checks
ASSERT(pSpid, "AT45_Configure: pSpid is 0.\n\r");
ASSERT(pAt45, "AT45_Configure: pAt45 is 0.\n\r");
return 0;
}
//-------------------------------------------------------------------------------------------------
/// This function returns 1 if the At45 driver is not executing any command; otherwise it
returns 0.
/// \param pAt45 Pointer to an At45 instance.
//--------------------------------------------------------------------------------------------------
unsigned char AT45_IsBusy(At45 *pAt45)
{
return SPID_IsBusy(pAt45->pSpid);
}
//-------------------------------------------------------------------------------------------------
/// Sends a command to the dataflash through the SPI. The command is identified by its
command code and the number of bytes to transfer (1 + number of address bytes +
number of dummy bytes). If data needs to be received, then a data buffer must be
provided. This function does not block; its optional callback will be invoked when the
transfer completes.
return AT45_ERROR_LOCK;
}
cmdSize++;
}
}
else {
return AT45_ERROR_SPI;
}
return 0;
}
//---------------------------------------------------------------------------------------------------
/// This function returns the At45Desc structure corresponding to the device connected
/// It automatically initializes pAt45->pDesc field structure.
/// This function shall be called by the application before AT45_SendCommand.
/// Returns 0 if successful; Otherwise, returns AT45_ERROR_LOCK if the At45
/// driver is in use or AT45_ERROR_SPI if there was an error with the SPI driver.
/// \param pAt45 Pointer to an AT45 driver instance.
/// \param status Device status register value.
//----------------------------------------------------------------------------------------------------
const At45Desc * AT45_FindDevice(At45 *pAt45, unsigned char status)
{
unsigned int i;
unsigned char id = AT45_STATUS_ID(status);
return 0;
}
if (at45Devices[i].id == id) {
pAt45->pDesc = &(at45Devices[i]);
}
i++;
}
configuredBinaryPage = AT45_STATUS_BINARY(status);
return pAt45->pDesc;
}
//--------------------------------------------------------------------------------------------------------
/// This function returns the pagesize corresponding to the device connected
/// \param pAt45 Pointer to an AT45 driver instance.
//--------------------------------------------------------------------------------------------------
unsigned int AT45_PageSize(At45 *pAt45)
{
unsigned int pagesize = pAt45->pDesc->pageSize;
if(((pAt45->pDesc->hasBinaryPage) == 0) || !configuredBinaryPage){
return pagesize;
}
return ((pagesize >> 8) << 8);
}
1 2 3 4
PIC16F84 MAX232
D (Direction seen from controller) D
VDD
VDD
R1 XT1 VSS
C4
16k C3
4.000 MHz 10u
C1 C2 10u
S1 10p VDD 10p
16
2
6
SW-PB VSS VSS
14
U1
C5 13 12
V+
VCC
V-
IC_PIC1 RS232 TXD R1 IN R1 OUT PIC RXD
RS232 8 9 5V
16 15 RS232 DTR R2 IN R2 OUT 5V DTR
VDD
VSS 4n7 OSC1/CLKIN OSC2/CLKOUT 11 14
4 7 PIC TXD T1 IN T1 OUT RS232 RXD
MCLR RB1 5V 10 7 RS232
17 8 5V DSR T2 IN T2 OUT RS232 DSR
C PIC TXD RA0 RB2 1 4 C
GND
18 9 C1+ C2+
RA1 RB3 3 5
5V DSR 1 10 C1 - C2 -
RA2 RB4
2 11
RA3 RB5 C6 MAX232CPE(16) C7
5V DTR 3 12
RA4/T0CKI RB6 10u 10u
VSS
15
6 13
PIC RXD RB0/INT RB7
PIC16F84-04/P(18)
5
VSS
VDD
VDD VSS
VDD
C8
DSR and DTR signals are not used in
100n
B VSS RS232 my RS232 routines, but are drawn for
completion. These signals are necessary C9
B
VSS
(Direction seen from host) for hardware handshaking, whilst my 100n
routines perform no handshaking. The
RS232 DTR MAX232 has two output and two input VSS
RS232 TXD VSS channels, specified to transmit up to 120
kbps depending on the type used.
RS232 RXD
RS232 DSR
1
6
2
7
3
8
4
9
5
Title
PIC-RS232 Interface using MAX232
A A
Written by Date
SUB1 20-Aug-2003
Peter Luethi
DB9 Revision Page
Dietikon, Switzerland 1.01 1 of 1
1 2 3 4
SLLS047L − FEBRUARY 1989 − REVISED MARCH 2004
description/ordering information
The MAX232 is a dual driver/receiver that includes a capacitive voltage generator to supply TIA/EIA-232-F
voltage levels from a single 5-V supply. Each receiver converts TIA/EIA-232-F inputs to 5-V TTL/CMOS levels.
These receivers have a typical threshold of 1.3 V, a typical hysteresis of 0.5 V, and can accept ±30-V inputs.
Each driver converts TTL/CMOS input levels into TIA/EIA-232-F levels. The driver, receiver, and
voltage-generator functions are available as cells in the Texas Instruments LinASIC library.
ORDERING INFORMATION
ORDERABLE TOP-SIDE
TA PACKAGE†
PART NUMBER MARKING
PDIP (N) Tube of 25 MAX232N MAX232N
Tube of 40 MAX232D
SOIC (D) MAX232
Reel of 2500 MAX232DR
0°C to 70°C
Tube of 40 MAX232DW
SOIC (DW) MAX232
Reel of 2000 MAX232DWR
SOP (NS) Reel of 2000 MAX232NSR MAX232
PDIP (N) Tube of 25 MAX232IN MAX232IN
Tube of 40 MAX232ID
SOIC (D) MAX232I
−40°C
−40 C to 85
85°C
C Reel of 2500 MAX232IDR
Tube of 40 MAX232IDW
SOIC (DW) MAX232I
Reel of 2000 MAX232IDWR
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Function Tables
EACH DRIVER
INPUT OUTPUT
TIN TOUT
L H
H L
H = high level, L = low
level
EACH RECEIVER
INPUT OUTPUT
RIN ROUT
L H
H L
H = high level, L = low
level
10 7
T2IN T2OUT
12 13
R1OUT R1IN
9 8
R2OUT R2IN
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Input supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V
Positive output supply voltage range, VS+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC − 0.3 V to 15 V
Negative output supply voltage range, VS− . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to −15 V
Input voltage range, VI: Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VCC + 0.3 V
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 V
Output voltage range, VO: T1OUT, T2OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS− − 0.3 V to VS+ + 0.3 V
R1OUT, R2OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VCC + 0.3 V
Short-circuit duration: T1OUT, T2OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited
Package thermal impedance, θJA (see Notes 2 and 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to network GND.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Note 4 and Figure 4)
PARAMETER TEST CONDITIONS MIN TYP‡ MAX UNIT
VCC = 5.5 V, All outputs open,
ICC Supply current 8 10 mA
TA = 25°C
‡ All typical values are at VCC = 5 V and TA = 25°C.
NOTE 4: Test conditions are C1−C4 = 1 µF at VCC = 5 V ± 0.5 V.
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature range (see Note 4)
PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT
VOH High-level output voltage T1OUT, T2OUT RL = 3 kΩ to GND 5 7 V
VOL Low-level output voltage‡ T1OUT, T2OUT RL = 3 kΩ to GND −7 −5 V
ro Output resistance T1OUT, T2OUT VS+ = VS− = 0, VO = ±2 V 300 Ω
IOS§ Short-circuit output current T1OUT, T2OUT VCC = 5.5 V, VO = 0 ±10 mA
IIS Short-circuit input current T1IN, T2IN VI = 0 200 µA
† All typical values are at VCC = 5 V, TA = 25°C.
‡ The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for logic voltage
levels only.
§ Not more than one output should be shorted at a time.
NOTE 4: Test conditions are C1−C4 = 1 µF at VCC = 5 V ± 0.5 V.
RECEIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature range (see Note 4)
PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT
VOH High-level output voltage R1OUT, R2OUT IOH = −1 mA 3.5 V
VOL Low-level output voltage‡ R1OUT, R2OUT IOL = 3.2 mA 0.4 V
Receiver positive-going input
VIT+ R1IN, R2IN VCC = 5 V, TA = 25°C 1.7 2.4 V
threshold voltage
Receiver negative-going input
VIT− R1IN, R2IN VCC = 5 V, TA = 25°C 0.8 1.2 V
threshold voltage
Vhys Input hysteresis voltage R1IN, R2IN VCC = 5 V 0.2 0.5 1 V
ri Receiver input resistance R1IN, R2IN VCC = 5, TA = 25°C 3 5 7 kΩ
† All typical values are at VCC = 5 V, TA = 25°C.
‡ The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for logic voltage
levels only.
NOTE 4: Test conditions are C1−C4 = 1 µF at VCC = 5 V ± 0.5 V.
R1OUT RL = 1.3 kΩ
R1IN
or
or
Pulse R2OUT See Note C
R2IN
Generator
(see Note A)
CL = 50 pF
(see Note B)
TEST CIRCUIT
≤10 ns ≤10 ns
3V
90% 90%
Input 50% 50%
10% 10%
0V
500 ns
tPLH
tPHL
VOH
Output 1.5 V 1.5 V
VOL
WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%.
B. CL includes probe and jig capacitance.
C. All diodes are 1N3064 or equivalent.
Figure 1. Receiver Test Circuit and Waveforms for tPHL and tPLH Measurements
TEST CIRCUIT
≤10 ns ≤10 ns
3V
90% 90%
Input 50% 50%
10% 10%
0V
5 µs
tPLH
tPHL
90% VOH
90%
Output
10% 10%
VOL
tTHL tTLH
0.8 (V –V ) 0.8 (V –V )
OH OL OL OH
SR + or
t t
TLH THL
WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%.
B. CL includes probe and jig capacitance.
Figure 2. Driver Test Circuit and Waveforms for tPHL and tPLH Measurements (5-µs Input)
Pulse
Generator EIA-232 Output
(see Note A)
3 kΩ CL = 2.5 nF
TEST CIRCUIT
≤10 ns ≤10 ns
Input
90% 90%
10% 1.5 V 1.5 V 10%
20 µs
tTLH
tTHL
VOH
3V 3V
Output
−3 V −3 V
VOL
6V
SR +
t or t
THL TLH
WAVEFORMS
NOTE A: The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%.
Figure 3. Test Circuit and Waveforms for tTHL and tTLH Measurements (20-µs Input)
APPLICATION INFORMATION
5V
+
CBYPASS =1µF
−
16
C3† 1 µF
VCC
1 2
C1+ 8.5 V
C1 1 µF 3 VS+
C1−
4 6
VS− −8.5 V
C2+
C2 1 µF 5 C4 1 µF
C2− +
11 14
EIA-232 Output
From CMOS or TTL
10 7
EIA-232 Output
12 13
EIA-232 Input
To CMOS or TTL
9 8
EIA-232 Input
0V
15
GND
† C3 can be connected to VCC or GND.
NOTES: A. Resistor values shown are nominal.
B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be
connected as shown. In addition to the 1-µF capacitors shown, the MAX202 can operate with 0.1-µF capacitors.