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Address Decoding
On the 6800 CPU, the memory space is 64K bytes as there are 16 address lines and the data bus
is 8-bits.
The method that we use to select the correct location on the correct chip is called address
decoding and we use the address bus to accomplish the selection. Notice that it is critical that
each address selects a unique location.
Each chip (whether it is a memory chip or a peripheral device chip) has an input called chip select
or enable. These inputs can be active low or active high. If active low, we must send a logic "0" (0
volts) to this input, to enable it, because it uses negative logic. If there is a logic "1" (+5 volts)
connected to this input, the chip is inactive.
If active high, a logic "1" on this input selects the device and a logic "0" on the input disables it. The
fact that we can activate or deactivate a chip allows us to select the correct chip for a particular
address.
When you specify a particular address, the corresponding location exists only in one of those
chips. Part of the address selects the correct chip (the upper part of the address), while the rest of
the address selects the correct location on that chip. You can look at the low order bits as forming
an offset from the first location on the chip to the correct location on the chip for the address you
are specifying.
EXAMPLE 1:
Show how a single 2-line to 4-line decoder whose outputs, and a single gate enable input, are all
active low could be used to fully decode four 4K x 8 EPROMS, having an active low Chip Select
(/CS) line, from address $0000 to $3FFF. Assume that the system has a 16-bit address bus and an
8-bit data bus.
First, we will specify all sixteen addresses in binary, showing which address lines will have high
voltage ("1") and which will have low voltage ("0") for any particular address.
$1FFF 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1
$2000 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
BLOCK 2
$2FFF 0 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1
$3000 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0
BLOCK 3
$3FFF 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1
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