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IEEE PEDS 2005

A Graphical Approach to Switching Losses and


Harmonics Distortion For Carrier SVPWM Methods
In Multilevel Inverters
Nguyen Van Nho
Dept. ofElectrical Engineering, Hochiminh City University of Technology, HCMUT
Vietnam, e-mail: nvnhoohcmut.edu.vn
Abstract-This paper presents a simple graphical approach to differently, depending on the individual requirement of
compare the switching losses of various carrier SVPWM methods inverter topologies. In this paper, the optimum offset will be
for multilevel inverters. Similarly, the harmonic distortion analyzed under the consideration of optimization of the
factors can be indirectly validated. There have been deduced switching loss and harmonic distortion. A graphical approach,
SVPWM methods related to maximum, medium and minimum which eases the understanding of the analytical process will
zero sequence functions. As a result of comparison, the SVPWM be described. In the end, an optimum design of SVPWM
with optimized switching loss and THD factor has been proposed. method in relation to modulation index will be proposed.
The investigation shows that the maximum/minimum offset
SVPWM would be superior to others for lower modulation index
and the medium/minimum common mode SVPWM can obtain II. THE PRINCIPLES OF CARRIER SVPWM METHODS
advantages in the medium and high modulation index range. The
proposed SVPWM methods have been mathematical formulated A. Principles of the offset generator:
and demonstrated by simulation results.
RtMmod.
Rat oPWt
Keywords-Harmonics distortions, switching loss, nultilevel - A r ...S I .-

inverters K WOhI

1. INTRODUCTION =
IF min
V'O,
aw
m o

Nowadays, multilevel inverters have achieved


increasing contribution in high performance applications. The
an
ACTIVE S3GNAL GENERATOR
TO=! lt 5
L..............................
two most popular PWM methods are carrier based and space
vector types [1]-[2].
.v- .sr
.
Figure 1: Unified unipolar carrier based modulator
An appropriate selection of PWM techniques would have a The generalized offset function of multilevel inverter can
significant meaning for achieving a high performance for be described as:
producing output voltages and making power converters be
more reliable. For reducing the number the switching loss and
obtaining low current ripples, an optimized SVPWM switching
sequence and its corresponding carrier PWM implementation VrO = VrOmjn + K1I + 172 2+ 3K3 (1)
has been introduced [3]. A further analyzing of the offset
function in relation to common mode using the generalized
correlation between SVPWM and CPWM methods, several where 17, j = 1,2,3 are the redundant factors, Kj are
possible SVPWM variants with their optimized performances switching time duties of the three corresponding pivot vectors
can be favorably compared to the previous method [4]. From
this study, a novel unified carrier PWM modulator has been U. and vr(mmin is a minimum offset [4-5]. The offset (I) can be
proposed, applicable to the entire modulation range, including adjusted in order to produce offset output vrOywM in the offset
overmodulation. The offset value and PWM modes
(SVPWMWDPWM) can be fully controlled in an offset generator by an appropriate setting of the factors 7 j. A
generator [5]. As a result, space vector PWM techniques from flexible variant for generating the PWM offset vropwm is
three nearest pivot vectors with a minimum number of described in Fig. 1 [5]. In the offset generator, the offset output
switchings can be equivalently replaced by the described can be generated for a defined PWM mode and approximate to
unified carrier PWM and the required PWM performances can any reference function vro,ref. In case of SVPWM mode, it can
be obtained by a proper setting ofthe reference offset. be described as follows:
The essential problem, which decides the PWM
quality of the carrier based modulator, concentrates to the
selecting of an optimum reference offset. This can happen

0-7803-9296-5/05/$20.00 C) 2005 IEEE

192
V,O.i.+N(+0.5K, if O5v,, K,
V,(0%24=m v,omin+nji+Ki+0.5K2 if K1<VigK1+K2(2) C. The maximum offset SVPWM
rOmin+P +K, +K2 +0.5Kj if K, +K2 <v,, < This SVPWM method generates function v,),,vm as closest
to the maximum offset function defined as
where VrO = 0.5(n - 1)- max as shown in Fig.3b. Substituting
the function v,( into (2)-(3), the output offset can be deduced.
Vr1 = VrO,ref Vro min nO
-

Invror<f Vromjn) (3)


- The SVPWM offset can be simplified as

0<nol1r3 ;0 SvrI <1.


_0.5(n-l)-max-0.5K, if S=0
V,svM l0.5(n-l)-max-0.5K2 if S=1
=

B. The minimum offset SVPWM


The offset output of the minimum offset SVPWM method
can be produced by (2),(3) with input v,r,,,f=v,,wn,. In other S int(max- mi)- Int(mid- mi)- Int(max- mid)
way, it can be simply described from (1) as
VrO,SVM = VrOmin + 0.5K, (4) where n is a level (odd) number of inverter; max, mid are
the maximum and the middle values from three fundamental
For a five level inverter, the function V,,,SVM and corresponding references. The locations of active redundant states and the
modulating signal have been drawn in Fig.2c. For comparison, limited boundaries of corresponding active redundant states
the diagrams of corresponding functions of conventional are drawn in Fig.3a Similarly as the minimum offset PWM,
minimum offset PWM method, i.e. VropwM=V,r(J" are drawn in there are 8 extra switchings for a fundamental period for
Fig.2b. The active redundant states appear always at pivot m=0.8 and the A-phase modulating signal passes the carrier
vector U, . The locations of the active redundant states (the
boundaries at levels of 1,0 and -1 eight times as shown in
Fig.3c.
dashed circles) are drawn in Fig.2a

D. The minimum common mode SVPWM


222 The reference zero sequence function of the minimum
02/ .\ />common mode SVPWM method is defined in [4] in relation to
220 l-2 b) j 0 $ the offset extremes of vrOmra, v,omin as follows:
ll-ly~~~~~~~7- 10
20-2
22l \_ 1-
Vromax if
VrOmax < 0

'..007s$,
-1-- 21
t1-2 2

1 ,22Ne r
Vr,0, = 0

V rm if
if

V rimin
VrOm

r>ma
0 VrOmin *(6)
-2-2--12 21-12-1m 0>2-2
0
-1-2- .2 2-2-2 c) ~~~~.2-1
a) 0 5 I0
11 20

Figure 2: Minimum offset SVPWM: a) vector diagram and locations of active From the analysis described in [4], the locations of active
redundant vectors and corresponding areas; diagrams of zero sequence redundant states and the limited boundaries are drawn in Fig.4.
function and modulating signal of b)minimum offset CPWM and c) For m=0.8, there are 3 extra switchings while reference vector
minimum offset SVPWM (m=0.8). goes through the first hexagon sector. There are totally 3x6=18
extra switchings per a fundamental period and each
To investigate the number of the additional switchings, the modulating signal contributes 6 extra switchings. As a result,
area of the first hexagon sector is divided by several boundaries the A-phase modulating signal passes the carrier boundaries at
(the bold lines), which clarify additional switchings while the levels of 1,0 and -1 six times as shown in Fig.4c.
reference voltage vector crosses over them. In Fig.2a, for
m=0.8, there are 4 extra switchings while reference vector E. The medium common mode SVPWM
goes through the first hexagon sector. There are totally 4x6=24 The reference zero sequence function of medium CM
extra switchings per a fundamental period and each PWM (SFO-PWM) is defined as average value from two
modulating signal adds an amount of 8 extra switchings. As a extreme zero sequence functions and determined for an odd
result, the A-phase modulating signal passes the carrier level inverter as follows:
boundaries at levels of 1,0 and -1 eight times as shown in
Fig.2b,c. VrO,rej' = (VrOmax + VrOmin) / 2 = -(max + min) / 2. (7)

193
The location of the active centered redundant vectors in the 22-2 2 m oe
medium zero sequence PWM method are marked by the small 2- / \/
dashed circles in Fig.5. Being different from the previous / 2-2
methods, a dotted line appears and indicates that two \ b)
additional switchings occur while the reference voltage vector 22ot2
the A-phase modulating
For the modulating
crosses it.
over
signal for m=0.8 are drawn in Fig.5b.
index range of (0,5-0,577), there are totally
The diagrams of

30 extra switchings per a fundamental period. Similarly to the


zero sequence function (7) and
/ \a010
la2b 2-

minimum CAM SVPWM, there are 6 extra switchings per 2 °202'--7 2 c) w y


fundamental period for m=0.8 and the A-phase modulating -I-
signal passes the carrier boundaries of 1,0 and -1 six times as 8) . i sl o 20
shown in Fig.5c. Figure 5: Medium CM SVPWM: a) vector diagram and locations of active
redundant vectors and corresponding areas, diagrams of zero sequence
function and modulating signal of b)medium CM CPWM and c) medium
22-2 '2 \ CM SVPWM

TABLE 1. NUMBER OF EXTRA SWITCHINGS IN A FUNDAMENTAL PERIOD


220 - \ 2 __FOR FIVE-LEVEL INVERTER
0b) m10 2 Modulation Minimum Medium Minimum Maximu
0-1 1- ss- -2 index CM CM offset m offset
2°°12 7 ~ \ 30RnSg 0-0.25ISVPWM SVPWM SVPWM SVPWM
0-0.25 6 _____6 0 0
*)
-2-1-2
°112'2 °
c):________
2-2 2-2-2 °]0.25-0.33
<J 6 61 2 12
__0.33-0.433 6 6
O , time10 f.i,,
0.433-0.5 18 6 6 6
0.5-0.577 18 30 18 18
Figure 3: Maximum offset SVPWM: a) vector diagram and locations of active 0.577-0.75 18 12
18 12
redundant vectors and corresponding areas, diagrams of zero sequence 0.75-0.85 1818 24 24
function and modulating signal of b)maximum offset CPWM and c) 0.85-1 18 18 18 18
maximum offset SVPWM (m=0.8).
carrier bands and thus several switching devices are operating
without any commutations.
22-2=5
,4. The problem of balancing of the switching loss between
22-1*ig1 semiconductor devices can be improved effectively for low
/1 ,_ 21-2 21-2
b) modulation index by alternately shifting modulating signals as
220 \ \ 2 \w/ 3 shown in Fig.6. Each shifting will add a number of 3 extra
0 2 2 10 20 switchings. This modified SVPWM can be expressed by
2
'0 2- / adding a parameter N, ON 1r3 in (4) as follows:
11~~~~~~~~~~~-
222 .\ _ X

---0 2-1-1 2-22 v22-2 10 5 10 1i 20 For s, = v,.


O<m<0.433, 0.5K, N 0 N 1,., .(8)
the minimum CM SVPWM and medium
CM SVPWM are the same. For 0.33<m<0.433, all described
Figure 4: Minimutn CMV SVPWM: a) vector diagram and locations of active SVPWM methods have the same number of extra switchings.
redundant vectors and corresponding areas, diagrams of zero sequence For 0 433<m<05, the minimum CM SVPWM causes a
function and modulating signal of b)minimum CMV CPWM and c)
minimum CMV SVPWM (mn-.8). maximum number of extra switchings (N,,=18) while other
methods require a lower value (Na=6). For 0.5<m<0.577, the
Ill. THE SWITCHING LOSS COMPARISON medium CM SVPWM turns be worst since a high number of
From the previous analysis, the numbers of extra extra switchings per a fundamental period is added (N,=30),
switchings per a fundamental period for the carrier SVPWM while the other methods give a lower value (N,=18). For
methods are described in relation to the modulation indices in 0.577<m<0.755, the minimum/ maximum offset SVPWM
Table 1. For the lowest modulation index of O<m<0.25, the obtain the lowest numbers ofextra switchings (N=12).
maximum/minimum offset SVPWM methods have no extra
switchings. The modulating signals operate within defined

194
C^QDbseld PWM TABLE 11. NUMBER OF EXTRA SWITCHINGS IN A FUNDAMENTAL
PERIOD FOR SEVEN-LEVEL INVERTER
1,5 Modulation index Minimum CMV Medium zero
SVPWM sequence SVPWM
1.0
0-0.288 6 6
0.i 0.288-0.33 18 6
0.0
0.U- 0.33-0.3849 18 30
f 0.3849-0.577 18 18
0.577-0.666 30 18
0.666-0.7698 30 42
0.7698-1 30 30

0.06 0.02 0.04 02


0.08 o.t1 0.12 0.14 0.10 O.'1 020
*vraminl I ibmin1 Immini tm*" 14IV. THE HARMONIC DISTORTION COMPARISON
A SVPWM with two active equal-duration redundant
Figure 6: Balancing of switching loss for low modulation index: diagrams of vectors is commonly used to reduce current ripples. The
mnodulating signals analysis result [6] shows that the applied SVPWM technique
For a high range of modulation index, a better can become more effective if the time duration of active
performance is given by the minimum CM SVPWM and redundant states is large. The active redundant states would be
medium CM SVPWM. A bigger number of additional favorably deduced from a pivot vector with a maximum time
switchings of minimum CM compared to medium CM for the duration. For every pivot vector, there exists a corresponding
range of 0.433<m<05 is explained by an extending of phase, whose speed change ofrelated current ripple is as much
modulating signals across more carrier bands, thus obtaining a fast to compensate that of the two remaining phases. By
better switching loss balancing. Obviously, the minimum CM applying two active redundant states at the start and the end of
SVPWM would be superior to the other SVPWM methods for a sampling period, the monotonous increasing (decreasing) of
switching loss balancing capability. The smallest absolute the current of the largest time-duration switching state is
offset makes its modulating signals less deformed and dispersed among increasing (decreasing) sections. For this
explains its better switching distribution among devices for the reason, the current ripple oscillating around an average value is
whole modulation index range in comparison with the medium reduced . Under these considerations, an appropriate selection
CM SVPWM and others. of active redundant vectors for low THD factor should be one
with a maximum Kax, from three switching time duties
(K,,K2.K), defined as

Kma. = max(K1,K2,K3) (9)

For further investigation, let's consider three pivot vectors


U, U2 and U3 in a triangle and their corresponding switching
time duties of K,,K2 and K3. The triangle in Fig.8a and Fig.8b
can be divided into areas of " high priority", for which
Kj=K,,., " low priority", for which Kj<K,aaz As will be
and PWM
Figure7: Diagramsforinvestigatingextra switching loss of 7-level multilevel shown that method would achieve a low THD if the
inverter insa) minimum CM SVPWM and b) medium CM SVPWM.
reference vector passes most high priority areas. The relation
Obviously under consideration of switching loss, not any between switching time duties Kj,K2 and K3 of the
from the previously described carrier SVPWM methods can be
superior in the entire modulation range. Each SVPWM can be
corresponding vectors UI,U2
and U3, respectively, can be
esponding vector th sUsmalll anareas in Fig.8a The function
superior to others for some defined ranges. Since the medium established as shown for the
and minimum CM SVPWM show advantageous in most Kmz can be deduced in Fig.8b. From the previous
modulation range of five level inverter (see further), their consideration, for the area AOCU,, a proper switching state
switching loss comparison for seven level inverters are also sequence should involve two active redundant states at U,
demonstrated in Fig.7 and Table 2. To validate the methods for which the constraints as Kj>K2 and KI>K; are satisfied.
completely, the second characteristics as harmonics distortion Similarly, the locations of active redundant states and related
will be considered in the next section. "high priority" areas are shown in Fig.8b. There are possible
triangle areas, corresponding to one and two active redundancy
locations in Fig.8c and Fig.8d, respectively.
For a two-level inverter, in comparison with discontinuous
PWM for the same switching loss, the THD balancing of

195
SVPWM appears preferable if reference vector appears in the
"high priority" areas (i.e. approximately m<0.66). For K,<Kp 101
(V1Vk)2
(reference vector moves in "low priority" areas ), the THD THD )2
factor situation of SVPWM becomes less convenient than the k J (Vk Ik I (0)
DPWM [7]. Similar results can be observed from the three- k=2 k=2
level inverter study [8]. The minimum/maximum offset
SVPWM ("two-level SVPWM") method achieves a good where Vk is the value of the effective k-th harmonics voltage,
THD factor for low modulation index range (Fig.9a) if the deduced from Fourier analysis. The results of Fourier analysis
reference vector appears in the "high priority" areas and a of the line voltage have been computed for fundamental
worse THD performance in the remaining triangle area of the
smallest hexagon. In the contrary, the medium CM SVPWM
frthenc oltand cave been o for Hamonics
frequency of 50Hzand carrier frequency of .5kHz. Harmonics
("three-level SVPWM") becomes advantageous for outer of orders 2 to 101 have been summed up in the obtained
triangle area of the smallest hexagon, since for its active results. The obtained diagrams for five level inverter are drawn
vectors the mentoned
vectors,
the mentioned areas are of
ares are "high priority" (Fig 9b).
of"highprority"ig9b in Fig. I I a. offset
minimum
From the diagrams, the THD of thelow
SVPWM are the same for
maximum and
modulation
By applying the previous considerations to five-level index of m<0.25 and superior in the range of (O<m<O. 15). The
inverter, the diagrams of "high/low priority" areas can be THD of the medium and minimum CM SVPWM are the same
drawn in Fig.lOa,b,c and d. It can be clearly seen that, the for m<0.42, their characteristics are appropriately most
minimum/maximum offset SVPWM could be superior in the superior in the range of (0.15<m<0.43). For the remaining
lowest modulation index range, i.e. for m<0. 15 for the best range, the minimum CM SVPWM would give a lowest THD
THD performance. The medium CM SVPWM would get an values for around values of m=0.5, 0.65,0.75 and 0.85, while
inconvenient harmonics distortion for around of m=0.5 while the medium CM SVPWM shows be advantageous around
voltage vector passes the low priority areas the most. An m=0.45, 0.55, 0.6,0.7,0.8 and in the range of (0.9,1). The
improved THD factor can be supposed at the highest THD factor values of minimum CM SVPWM diagram are
modulation index, close to a unit value. Above the value of particular worsen compared to medium CM SVPWM at some
m=0. 15, the lower THD factor values would be alternated narrow range of 0.45,0.55 and 0.6. It should be noticed that in
between minimum and medium CM SVPWM. the range of 0.43<m<cl, the minimum/maximum offset
SVPWM can be competitive to minimum/medium CM
SVPWM for several modulation ranges.
a) f/' ""\ b) ,,'-'. Since the difference between THD factors of minimum and
medium CM SVPWM methods are small for 0. 73<m<1 and
A KI3K2; B A'nx B under switching loss consideration in section 1I, from both
4,,, 3, ,KKj\/ y > < methods, the minimum CM SVPWM could be a good choice in
Ul
K1^K2>K3 |K2KI>K3
C U'
/;
C
FBa
U2
the range of 0.J5<m<C0.43 and 0. 73<m<1.
The similar conclusions have been shown in Fig. II b and c
for 7- and 9-level inverters. For full comparison, the diagrams
C) of SFO-PWM method have also been included.

M \ K1>K2 /
V. CONCLUSIONS
In the paper, several carrier based SVPWM methods have
been graphically compared. The number of switchings can be
UXlv tu urdefinitely determined in relation to modulation index. It has
been shown that regarding to number of additional switchings,
Figure 8: a) Balancing of switching time duties in a tnangle, b) locations of not any from carrier SVPWM methods can be superior in the
active redundant states and related priority areas, c) active redundant states in entire modulation range. Each SVPWM method can be
two-level inverters (no redundancy at vectors U2 and U3, d) two possible optimized in some defined ranges. Similar situation happens
. .(no redundancy of vector
active redundant states and related priority areas ~~~~~for
SVW theshe THD factors. While minimum/maximum
absolutele inithe/lower odulatoffset
~~~~~~~~~~~~~~SVPWM
show be absolutely superior in the lower modulation
U3) u index range for low THD factor and minimum number of
From mathematical opinion, the graphical explanation switchings. For the remaining range and under consideration of
using "high/low priority" areas would not be exact enough to THD factor, each from considered SVPWM methods can be
evaluate the THD factor but it could be a useful starting point optimized only for certain ranges. From them, the minimum
for considering the performance of a SVPWM method, CM and medium CM SVPWM alternately show be more
particularly its validity can properly clarify the THD factor advantageous. From all SVPWM methods, the minimum CM
balance for 2 and 3-level inverters. If number of levels is high, SVPWM has shown be more advantageous for better
the graphical approach becomes complicated. An exact balancing ofthe switching loss. In cascade multilevel inverters,
evaluating of the harmonics performances should be the balancing of switching loss can be solved by altemating the
implemented by calculating the THD factor, defined as, switching roles of switching pairs for several fundamental
periods.

196
THD

308
LOW Lwi- 0
pnosily L 10-1 Lowr , 10-1 t- M CM

1- 1 - 1~~~1 - -1 Mi,,--e

00 0 0.2 0.3 0.4 0.5 0.8 0.7 0. 0.5 1.0

\>y t) t~~~~~nony \ b) "


20-
26.

.\
1v4
h,. 1 t MCM M Oft
Figure 9: Explanation of high/low priority areas in 3-level inverter for a) two- 01
level SVPWM and b) three-level SVPWM M.d CM
O 0.1 0.2 O.3 0.4 0.8 0.8 0.7 0.5 0 1.0
-7
A~~~~~~~~~~~~~~1,3 T b)
22-5~ ~ ~ ~ ~~0

a- M.M

li Ia lo-I-s4N5sf M
-I-i~~~~~~~~~~~~~~~~~~~~0
0.0 01 0.2 0.3 0.4 0.5 0.8 0.7 0.9 0.9 1.0

V b) Figure II: Diagrams of the THD factors for a) 5-level inverter, b) 7-level
A 5-Z inveter and c) 9-level inverter.
i1
22/-
1 \/ 2
11q , 1-5n-
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w_;\202
H I
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