ECE315 / ECE515

Lecture 11 Date: 15.09.2016

MOS Differential Pair

Quantitative Analysis differential input
Small Signal Analysis
 ECE315 / ECE515
MOS Differential Pair ensures M1 and M2
M1 and M2 are
perfectly matched in saturation
(at least in theory!)

Variation of input CM
level regulates the bias
currents of M1 and M2 Solution?? Current source is ideal:
Undesired!!! constant current, infinite
output impedance

To overcome the issues emanating from non-ideal CM level

 ECE315 / ECE515
MOS Differential Pair
Qualitative Analysis differential input
Let us check the effect of Vin1 Vin2 variation from - to

Vin1 is much more ve than Vin2 then:

M1 if OFF and M2 is ON
ID2 = ISS
Vout1 = VDD and Vout2 = VDD ISSRD

Vin1 is brought closer to Vin2 then:

M1 gradually turns ON and M2 is ON
Draws a fraction of ISS and lowers
Vout1
ID2 decreases and Vout2 rises

Vin1 = Vin2
Vout1 = Vout2 = VDD- ISSRD/2
 ECE315 / ECE515
MOS Differential Pair
Qualitative Analysis differential input
Let us check the effect of Vin1 Vin2 variation from - to

Vin1 becomes more +ve than Vin2 then:

M1 if ON and M2 is ON
M1 carries greater ISS than M2

For sufficiently large Vin1 Vin2 :

All of the ISS goes through M1 M2 is
OFF
Vout1 = VDD ISSRD and Vout2 = VDD
 ECE315 / ECE515
MOS Differential Pair
Qualitative Analysis differential input
Plotting Vout1 Vout2 versus Vin1 Vin2
The maximum and minimum
levels at the output are well
defined and is independent of
input CM level (Vin,cm)
Minimum Slope Minimum Gain
Maximum Slope
Maximum Gain
The circuit becomes more
nonlinear as the input voltage
swing increases (i.e., Vin1 Vin2
increases) at Vin1 = Vin2, the
circuit is said to be in
equilibrium
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MOS Differential Pair
Qualitative Analysis common mode input
Now let us consider the common mode behavior of the circuit
As mentioned, the tail current source is Does this enable us to set
used to suppress the effect of input CM any arbitrary level of input
level variation (Vin,cm) CM (Vin,cm)

To understand this:
Set Vin1 = Vin2 = Vin,CM
Then vary Vin,CM from 0 to VDD
Also implement ISS with an NFET

Lower bound of Vin,cm: VP should be sufficiently

high in order for M3 to act as a current source.
Upper bound of Vin, cm: M1 and M2 need to
remain in saturation.
 ECE315 / ECE515
MOS Differential Pair
Qualitative Analysis common mode input
What happens when Vin,CM = 0?
M1 and M2 will be OFF and M3 can
be in triode for high enough Vb
ID1 = ID2 = 0 circuit is incapable of
amplification

Now suppose Vin,CM becomes more +ve

M1 and M2 will turn ON if Vin,CM exceeds VT
ID1 and ID2 will continue to rise with the increase in Vin,CM
VP will track Vin,CM as M1 and M2 work like a source follower
For high enough Vin,CM, M3 will be in saturation as well

If Vin,CM rises further

M1 and M2 will remain in saturation if:
I SS
Vin,CM VT Vout1 Vin ,CM VDD RD VT
2
 ECE315 / ECE515
MOS Differential Pair
Qualitative Analysis common mode input
For M1 and M2 to remain in saturation:
I SS I SS
VGS1,2 VT VDS1,2 Vin ,CM VT VDD RD V in ,CM VT VDD RD
2 2
I
(Vin ,CM ) max VT VDD SS RD
2
The lowest value of Vin,CM is Vin,CM VGS1,2 VGS 3 VT
determined by the need to keep the
constant current source operational: Vin,CM VGS1,2 (VGS 3 VT 3 )

I
VGS1,2 (VGS 3 VT ) Vin,CM min VDD SS RD VT ,VDD
2
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MOS Differential Pair
Qualitative Analysis common mode input
Thus, Vin,CM is bounded as:
I
VGS1,2 (VGS 3 VT ) Vin,CM min VDD SS RD VT ,VDD
2
Summary:

M1=M2 M1=M2 M1=M2 M1=M2 M1=M2 M1=M2

=Off =On =Off =On =Off =On
M3=Linear M3=Linear M3=Linear
 ECE315 / ECE515
MOS Differential Pair
Qualitative Analysis common mode input
How large can the output voltage swings of a differential pair be?

Vout ,max VDD

Vout ,min Vin,CM VT

The higher the input CM level, the smaller

the allowable output swings.
 ECE315 / ECE515
MOS Differential Pair
Quantitative Analysis differential input
For +ve Vin1 VGS1 is greater than VGS2
ID1 will be greater than ID2

Vout 2 ( VDD I D 2 RD ) Vout1 ( VDD I D1RD )

P
For +ve Vin2 VGS2 is greater than VGS1
ID2 will be greater than ID1

Vout1 ( VDD I D1RD ) Vout 2 ( VDD I D 2 RD )

It is thus apparent that the differential pair respond to differential-

mode signals by providing differential output signal between the
two drains
 ECE315 / ECE515
Differential Pair Large Signal Analysis
Quantitative Analysis differential input
The idea is to define ID1 and ID2 in terms
of input differential signal Vin1 Vin2
The circuit doesnt include connection
details considering that these drain
P current equations do not depend on the
external circuitries

Assumptions: M1 and M2 are always in saturation; differential pair is

perfectly matched; channel length modulation is not present
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Differential Pair Large Signal Analysis
Quantitative Analysis differential input

VP Vin1 VGS1 Vin 2 VGS 2

Vin1 Vin 2 VGS1 VGS 2

P We also know:
2I D 2I D
GS T
2
V V VGS VT
W W
nCox nCox
L L
Therefore: Squaring

Vin1 Vin 2
2 I D1
W

2I D2
W
Vin1 Vin 2
2

2
W I D1 I D 2 2 I D1I D 2
nCox nCox nCox
L L L
 ECE315 / ECE515
Differential Pair Large Signal Analysis
Quantitative Analysis differential input

Vin1 Vin 2
2

2
W I D1 I D 2 2 I D1I D 2 Vin1 Vin 2
2 2
W I SS 2 I D1I D 2
nCox nCox
L L
I SS

1 W

2
C V
n ox in1 in 2 I SS 2 I D1I D 2
V
Squaring 2 L
2
1 W W
n ox in1 in 2
in1 in 2 4I D1I D 2
4 2
C V V I 2
SS I C
SS n ox V V
4 L L

2
1 W W

4 2

2 2 2
n ox in1 in 2
C V V I SS I C
SS n ox Vin1 Vin 2 I D1 I D2 I D1 I D2
4 L L
 ECE315 / ECE515
Differential Pair Large Signal Analysis
Quantitative Analysis differential input
2
1 W W
I D1 I D 2 nCox Vin1 Vin 2 I SS nCox Vin1 Vin 2
2 4 2

4 L L
1 W 4 I SS
I D1 I D 2 nCox Vin1 Vin 2 Vin1 Vin 2
2

2 L nCox
W
L

Observations
ID1 ID2 falls to zero for Vin1 = Vin2 and |ID1 ID2| increases with increase in
|Vin1 Vin2|
Therefore, ID1 ID2 is an odd function of Vin1 Vin2
Its important to notice that ID1 and ID2 are even functions of their respective
gate-source voltage
 ECE315 / ECE515
Differential Pair Large Signal Analysis
Quantitative Analysis differential input
Equivalent Gm of M1 and M2 its effectively the slope of the characteristics
Lets denote: I D1 I D 2 I D
Vin1 Vin 2 Vin 4 I SS
2Vin2
W
I D 1 C
W n ox L
1 W 4 I SS
I D nCox
in
V Vin2 nCox
2 L W Vin 2 L 4 I SS
nCox Vin2
L W
nCox
L
I D W
For Vin = 0: Gm nCox I SS
Vin L Vout1 Vout 2 W
| Av | nCox I SS RD
Vin L
Furthermore: Vout1 Vout 2 RD I RDGm Vin
 ECE315 / ECE515
Differential Pair Large Signal Analysis
Quantitative Analysis differential input Vin1
4 I SS
2Vin2 2 I SS
C
W Gm falls to Vin
1 W n ox L nCox
W
Gm nCox zero for
2 L 4 I SS L
Vin2
W
nCox Vin1 represents the maximum
L
differential signal a differential
pair can handle.

Beyond |Vin1|, only one transistor is ON and

therefore draws all of the ISS
 ECE315 / ECE515
Differential Pair Large Signal Analysis
Quantitative Analysis differential input
ISS Constant Linearity
Improves
Reduce Vin1 by
increasing W/L

W/L Constant
Linearity
Increase Vin1 by Improves
increasing ISS

Linearity of a differential pair can be improved by decreasing W/L and/or

increasing ISS
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MOS Differential Pair small signal analysis
Quantitative Analysis differential input
From large signal analysis we achieved: | Av | Vout1 Vout 2 nCox W I SS RD
Vin L
Vout1 Vout 2
| Av | g m RD
Vin At equilibrium, this is gm

We apply small signals to Vin1 and Vin2

and assume M1 and M2 are already
operating in saturation.
How to arrive at this result using
small signal analysis?
Two techniques
Superposition method
Half-circuit concept
 ECE315 / ECE515
MOS Differential Pair small signal analysis
Method-I: Superposition technique the idea is to see the effect of Vin1 and Vin2 on
the output and then combine to get the differential small signal voltage gain
First set, Vin2 = 0
Then let us calculate VX/Vin1 Simplified Circuit

This is open for

small signal
CS-stage Input impedance of M2 Provides 1 1
analysis +
degeneration resistance to CS-stage of M1 gm1 gm2

V RD VX RD1
X
1 1 Vin1 1 1
Vin1
g m1 g m 2 g m1 g m 2
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MOS Differential Pair small signal analysis
Superposition technique
Now calculate VY/Vin1 Simplified Circuit

VT = Vin1

1
RT =
gm1
CG-Stage
VY RD
Replace M1 by its This is open for
Vin1 1 1
Thevenin Equivalent small signal
Circuit analysis g m 2 g m1

combine the expressions to calculate VX VY |due _ to _ V 2 RD

in 1

small signal voltage only due to Vin1 Vin1 1 1

g m1 g m 2
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MOS Differential Pair small signal analysis
The magnitude of
For matched transistors: VX VY |due _ to _ Vin1 g m RDVin1 differential gain is
gmRD regardless of
Similarly: VX VY |due _ to _ V g m RDVin 2
in 2
how the inputs are
applied
The gain will be
Superposition gives: Av
VX VY total halved if single
g m RD
Vin 2 Vin1 ended output is
Half Circuit Approach considered
If a fully symmetric differential pair senses differential inputs (i.e, the
two inputs change by equal and opposite amounts from the equilibrium
condition), then the concept of half circuit can be applied.
Change this Change this
by VT RT1 = RT2 by -VT
Potential at node P will
Node is said to be ac-grounded remain unchanged
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MOS Differential Pair small signal analysis
Half Circuit Approach Ac grounding of
node P leads to

Vin1 and Vin1 are the change in

input voltage at each side

We can write: Therefore the differential

VX output can be expressed as: VX VY 2Vin1 g m RD
g m RD
Vin1
VY Thus the small signal VX VY
g m RD Av g m RD
Vin1 voltage given is: 2Vin1
 ECE315 / ECE515
MOS Differential Pair small signal analysis
How does the gain of a differential amplifier compare with a CS stage?
For a given total bias current ISS, the value of equivalent gm of a
differential pair is 1 2 times that of gm of a single transistor biased at
the ISS with the same dimensions. Thus the total gain is proportionally
less.
Equivalently, for given device dimensions and load impedance, a
differential pair achieves the same gain as a CS stage at the cost of
twice the bias current.
What is the advantage of differential stage then?
Definitely the noise suppression capability. Right?
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MOS Differential Pair small signal analysis
How is gain affected if channel length modulation is considered?

Effect of r0 on the gain

the circuit is still symmetric the

VX VY
voltage at node P will be zero

-Vin1 No current through RSS

Vin1 M1 M2

RSS plays no role in differential gain

P

Finite output resistance

of current source
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MOS Differential Pair small signal analysis
The virtual ground on the source allows division of two identical CS
amplifiers: differential half circuits

VX g mVin1 RD ro

VY g mVin1 RD ro
VX VY
VX VY g m 2Vin1 RD ro
Vin1 Vin1
M1 M2

VX VY
I SS Av g m RD ro
2Vin1
2
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Small signal analysis asymmetric inputs
Transform the
inputs as

Simplify
Differential Inputs

Simplified Circuit

Common Mode Inputs

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Small signal analysis asymmetric inputs

Circuit for Differential Mode

Circuit for Common Mode

VX VY g m RD ro Vin1 Vin 2

If the circuit is fully symmetric and ISS is ideal current source, then M1 and M2
draws half of ISS and is independent of Vin,CM. The VX and VY experience no
change as Vin,CM varies. In essence, the circuit simply amplifies the difference
between Vin1 and Vin2 while eliminating the effect of Vin,CM.