alu:1

LPM_XOR2_4 and2b1
I1
O
b(3:0) Data(0) Result(0)
I0
Data(1)
alu_out_and0004_imp_alu_out_and00041
Data(2)
Result(1)
Data(3)
a(3:0) Data(4)
Result(2)
Data(5)
Data(6)
Result(3)
Data(7)
Mxor_alu_out_xor0000
cin
ctl(3:0)
and2 and2
I1 I1
O O
I0 I0
alu_out_and0005_imp_alu_out_and00051
or2 and2
I1 I1
O O
I0 I0
alu_out_and0006_imp_alu_out_and00061
gnd
G
and2b1
I1
O
I0
XST_GND alu_out_and0007_imp_alu_out_and00071
and2b2
I1
O
I0
alu_out_and0008_imp_alu_out_and00081
and2b2
I1
O
I0
alu_out_and0009_imp_alu_out_and00091
and3b2
I2
I1 O
I0
alu_out_cmp_eq0000_imp_alu_out_cmp_eq00001
and3b1
I2
I1 O
I0
alu_out_cmp_eq0001_imp_alu_out_cmp_eq00011
and4b3
I3
I2
O
I1
I0
alu_out_cmp_eq0002_imp_alu_out_cmp_eq00021
and4b2
I3
I2
O
I1
I0
alu_out_cmp_eq0003_imp_alu_out_cmp_eq00031
alu_out_mux0000<0>_imp
a(0) alu_out_mux0000(0)
alu_out_addsub0004(0)
b(0)
ctl(3)
alu_out_cmp_eq0000
alu_out_cmp_eq0001
alu_out_or0004
alu_out_mux0000<0>_imp
alu_out_mux0000<1>_imp
a(1) alu_out_mux0000(1)
alu_out_addsub0004(1)
b(1)
ctl(3)
alu_out_cmp_eq0000
alu_out_cmp_eq0001
alu_out_or0004
alu_out_mux0000<1>_imp
alu_out_mux0000<2>_imp
a(2) alu_out_mux0000(2)
alu_out_addsub0004(2)
b(2)
ctl(3)
alu_out_cmp_eq0000
alu_out_cmp_eq0001
alu_out_or0004
alu_out_mux0000<2>_imp
alu_out_mux0000<3>_imp
a(3) alu_out_mux0000(3)
alu_out_addsub0004(3)
b(3)
ctl(3)
alu_out_cmp_eq0000
alu_out_cmp_eq0001
alu_out_or0004
alu_out_mux0000<3>_imp
alu_out_mux0000<4>_imp
alu_out_addsub0004(4) alu_out_mux0000(4)
ctl(3)
alu_out_or0004
alu_out_mux0000<4>_imp
alu_out_mux0001<0>_imp
ctl(3) alu_out_mux0001(0)
alu_out_or0004
alu_out_mux0001<0>_imp
alu_out_mux0001<1>_imp
b(3) alu_out_mux0001(1)
ctl(3)
alu_out_cmp_eq0001
alu_out_or0004
alu_out_mux0001<1>_imp
alu_out_mux0001<2>_imp
b(2) alu_out_mux0001(2)
ctl(3)
alu_out_cmp_eq0001
alu_out_or0004
alu_out_mux0001<2>_imp
alu_out_mux0001<3>_imp
b(1) alu_out_mux0001(3)
ctl(3)
alu_out_cmp_eq0001
alu_out_or0004
alu_out_mux0001<3>_imp
alu_out_mux0001<4>_imp
b(0) alu_out_mux0001(4)
ctl(3)
alu_out_cmp_eq0000
alu_out_cmp_eq0001
alu_out_or0004
cin
alu_out_mux0001<4>_imp
I5
or6
I4
I3
O
I2
I1
I0
alu_out_or0004_imp_alu_out_or00041
or2
I1
O
I0
alu_out_or0005_imp_alu_out_or00051
ADDSUB:1
port_opa
_ port_result
port_opb
+
port_addsub
Maddsub_alu_out_addsub00011
ADDERCONSTANT:1
port_opa
port_result
+
1
port_cout
Madd_alu_out_addsub00051
ADDER:2
port_opa
port_result
port_opb
+
port_cout
Madd_alu_out_addsub00061
port_cin
ADDER:3
port_opa
port_result
port_opb
+
port_cout
Madd_alu_out_addsub00071
MUX:1
Data(69:0) port_result
port_select
Mmux_alu_out_1_alu_out1
SUBTRACTOR:1
port_opa
_ port_result
port_opb
Msub_alu_out_addsub00041
I3
or4
I2
O zero
I1
I0
z_flag_1_z_flag_imp_z_flag_1_z_flag1
carry
alu(3:0)
alu