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AbstractA new acdc single-stage voltage-fed pulsewidth- used in industries as their properties and characteristics have
modulation (PWM) full-bridge converter is proposed in this paper. been well established.
The converter can simultaneously perform input power factor Research on the topic of higher power acdc single-stage
correction and dcdc conversion using conventional phase-shift
PWM and can maintain a primary-side dc bus voltage of less full-bridge converters, however, has proved to be more chal-
than 450 V even at a high input line voltage of 265 Vrms . This lenging, and thus, there have been much fewer publications.
is a combination of features that few, if any, other converters of Single-stage converters operate with only one controller that is
the same type have. The proposed converter has these features used to regulate the output voltage, whereas two-stage convert-
due to the novel implementation of an asymmetrical auxiliary ers operate with an additional controller that is used to regulate
transformer winding that is placed in series with the input in-
ductor and acts as a boost switch. In this paper, the operation the intermediate dc bus voltage obtained from the acdc stage.
of the proposed converter is explained in detail, its outstanding The lack of a second controller has a greater impact on the
features are discussed, and a detailed design procedure is given performance of single-stage full-bridge converters because they
and demonstrated with an example. Experimental results that must be designed to operate over a much wider range of
confirm the feasibility of the converter and its ability to meet operating conditions. Compromises in the design that need not
IEC1000-3-2 Class D standards for electrical equipment are also
presented in this paper. be considered for lower power converters due to their narrower
range of operating conditions must be considered for higher
Index TermsACDC power conversion, full bridge, magnetic power full-bridge converters.
switch, power factor correction (PFC), single-stage converters.
Previously proposed single-stage acdc full-bridge convert-
ers have at least one of the following drawbacks.
I. I NTRODUCTION
Also, during this interval, the output inductor current Iout,k falls
with a slope of
diout,k Vo
= . (7)
Fig. 3. Typical waveforms describing the modes of operation. dt Lo
current if vs,k > Nx Vbus (Nx = Naux : N1 ); otherwise, there Mode 4 (t3 t4 ): In this mode, the input current continues to
will be no current in the input inductor. The slope of the rising decrease, freewheeling through Daux1 and Daux2 . This mode
input current can be expressed as ends with the turning off of S3 .
Mode 5 (t4 t5 ): This mode begins with the primary current
diin,k vs,k + (Nx 1) Vb charging and discharging switch capacitors Cs3 and Cs4 and
= . (1)
dt Lin ends with the full charging and discharging of these capacitors.
Mode 6 (t5 t6 ): During this mode, the primary current
At the end of this mode, the input current reaches a peak of
flows through the body diodes of S1 and S4 , and the input
[vs,k + (Nx 1) Vb ] D Tsw current continues to flow through Daux2 due to the asymmetry
Iin,k (t1 ) = (2) of the transformer auxiliary winding. This mode ends with the
2Lin
turning on of S4 with ZVS. The slope of the input current,
where vs,k is the magnitude of the rectified input voltage at which is still decreasing in this mode, is given by
the kth switching period, Nx = Naux : N1 , where Naux is the
number of turns on the auxiliary winding and N1 is the number diin,k vs,k Vb
= . (8)
of turns on the primary winding, Vb is the dc bus voltage across dt Lin
energy-storage capacitor Cb , D is the duty ratio, and Tsw is
Mode 7 (t6 t7 ): The primary current flows through switch
the switching period. The slope of the output current can be
S1 and the body diode of S4 during this mode, while the
described by
input current decreases as it flows through Daux2 . This mode
diout,k Vb
Vo ends with the body diode current in S4 reducing to zero and
N
= (3) eventually flowing through the switch. The output capacitor
dt Lo
feeds energy to the output load from t3 to t7 .
and it reaches its peak value at the end of the interval when Mode 8 (t7 t8 ): During this mode, the output current rises
t = t1 . The output current is discontinuous, and its peak value again, flowing through D2 , and the input current still decreases
can be expressed by as it flows through Daux2 . This mode ends with the input
Vb current reducing to zero.
1 Vo DTsw Mode 9 (t8 t9 ): The output current continues to increase
Iout,k (t1 ) = N (4)
2 Lo during this mode, and there is no current flowing in the input
DAS et al.: IMPROVED ACDC SINGLE-STAGE FULL-BRIDGE CONVERTER WITH REDUCED VOLTAGE 4885
TABLE I
C OMPONENT VALUES FOR P ROPOSED C ONVERTER AND C ONVERTER IN [11]
A value of Vbus = 160 V can be estimated for Vin = 90 Vrms section, and D = Dmax = 0.7 is used in (19); assuming the
using the reasoning described in Step 3. Substituting converter to be lossless, Pin = Po = 600 W is used. The value
Vbus = 160 V, Vo = 48 V, and Dmax = 0.7 into (14) of K can be determined to be K = 1.35 104 V s using the
results in N 2.3. A value of N = 2.5 is chosen. solver feature in MathCAD for the boundary condition of D =
With a value of N established, the actual value of Vbus 0.7, Pin = Po = 600 W, Vin = 90 Vrms , and Vbus = 166 V.
can now be determined more precisely by using the following Using this value of K in (19) and Pin = 600 W, a value of
equation, which is based on standard full-bridge operation with Lin = 18 H is found. For this design, Lin = 16 H is used.
a discontinuous output current: Step 6Verification of Converter Operation Under High-
Line Conditions: In the previous steps of the procedure, the
16P Lo
Vo + Vo2 + Tswo,max 2
Dmax values for Lo , Lin , Naux , N , and Dmax were selected based on
Vbus,min = N . (15) low-line operating conditions (Vin = 90 Vrms ), as it is mostly
2
under these conditions that worst case converter operation
Substituting Vin = 90 Vrms , Po = 600 W, and Dmax = 0.7 into should be considered. Before settling on the values for these
this equation gives Vbus,min = 166 V. parameters, however, it should be confirmed that the primary-
Step 5Determine Value for Input Inductor Lin : The value side dc bus voltage will not exceed 450 V at the maximum input
for Lin should be low enough to ensure that the input current voltage of 265 Vrms .
is fully discontinuous under all operating conditions, but not so Consider the following. For the case when the output current
low as to result in excessively high peak currents. For the case is discontinuous, the average output power can be expressed as
where Lin is such that the input current remains discontinuous
for all operating conditions, then the average input power can D2 Vbus Vbus
Po = Vo . (21)
be expressed as 4Lo fsw N N
Assuming the converter to be lossless and equating Pin in (19)
1
Pin = |vs,k |is,k dSu t (16) with Po in (21), the following expression containing Vbus can
be obtained:
Vbus Vbus Lo
where is calculated from (10), |vs,k | = Vm | sin 2fSu tk | is Vo = Nx K. (22)
N N Lin
the magnitude of the rectified input voltage at the kth switching
interval, fSu is the input ac frequency, and Now, closely observing the integral K given by (20), it can
easily be found that K is a function of Vbus only. Hence, for
tk = kTsw (17)
the unknown values of Vbus , K can be evaluated as a function
1 D Nx |vs,k | + (Nx 1)Vbus
2
of Vbus only. For the case when Vin = 265 Vrms , the value of
is,k = |v |
8 Lin fsw 1 s,k Vbus will be approximately 393 V.
Vbus
The component values and the component stresses of the
for |vs,k | > (1 Nx )Vbus = 0 proposed converter are compared to those of the converter pro-
for |vs,k | < (1 Nx )Vbus (18) posed in [11] designed with the same specifications in Tables I
and II. The following should be noted.
is the average current of the kth switching interval. By substi- 1) The input current of the converter proposed in [11] is
tuting the value of is,k into (16), Pin can be expressed as more distorted because the converter must be designed
with a 1 : 0.5 turns ratio instead of a 1 : 0.7 turns ratio.
D 2 Nx This creates larger deadband regions in the input current
Pin = K (19)
8Lin fsw and makes the converter operate with a lower input pf.
where 2) The input current of the converter proposed in [11] has
a larger root-mean-square (rms) value because of the
additional distortion due to the larger deadband regions.
1 |vs,k | + (Nx 1)Vbus
K= |vs,k |
|vs,k |d(2fSu )t. (20) 3) The input current of the converter proposed in [11] has
1 Vbus a much larger peak value because the converter needs to
operate with a much smaller input inductance. If the con-
Vin = 90 Vrms and Vbus = 166 V as calculated in Step 4 are verter was implemented with a larger input inductor, then
used to determine K at the boundary condition for the input the input current would no longer be fully discontinuous
4890 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 12, DECEMBER 2009
TABLE II
P ERFORMANCE FACTOR C OMPARISON B ETWEEN P ROPOSED C ONVERTER AND C ONVERTER IN [11]
Fig. 8. Typical input voltage and current waveforms. Vin = 110 Vrms ; Po = Fig. 9. Typical transformer primary voltage, input inductor current, and output
600 W; scale: V = 75 V/div., I = 10 A/div., and t = 4 ms/div. current at 110-Vrms input and 600-W output. Scale: Vpri = 100 V/div.,
ILin = 10 A/div., ILo = 5 A/div., and t = 10 s/div.
over the full line cycle but would become continuous at
certain parts of the cycle. This would make the input cur-
rent even more distorted and would reduce the input pf.
4) The switches in the converter proposed in [11] operate
with greater rms currents because the reflected currents
from both the main and the auxiliary windings of the
transformer are higher due to the lower turns ratios of the
main and the auxiliary transformer windings.
5) The secondary output diodes in the converter proposed in
[11] operate with a higher peak voltage because of the
lower main transformer winding turns ratio.
V. E XPERIMENTAL R ESULTS
An experimental prototype was built to verify the feasibility Fig. 10. Typical transformer primary voltage and current waveform. Vin =
110 Vrms ; Po = 600 W; scale: V = 125 V/div., I = 15 A/div., and t =
of the proposed converter. It was designed for the follow- 5 s/div.
ing specifications: input voltage Vin = 90265 Vrms , output
voltage Vo = 48 V, maximum output power Po,max = 600 W, and Po = 600 W, along with the input and the output inductor
and switching frequency fsw = 50 kHz. The converter was current waveforms. From the waveforms in Fig. 9, it can be
implemented with the following parameters: Lin = 16 H, seen that the frequency of the input inductor current is half that
Lo = 5 H, N = N1 : N2 = 2.5, and Nx = Naux : N1 = 0.7. of the output inductor current; this difference in frequency is
IRFP460 MOSFETs were used for switches S1 S4 , and due to the asymmetrical auxiliary winding. Fig. 10 shows the
Daux1 and Daux2 are implemented with GaAs Schottky diodes typical transformer primary voltage and current waveforms.
DGSK40-025A, while output rectifier diodes are implemented Fig. 11 shows a typical dc bus voltage waveform. Fig. 12
with GaAs Schottky diodes DGS20-018A. A standard UC3879 shows the typical auxiliary diode waveforms. Fig. 13 shows the
IC was used as the controller. experimental converter efficiency, which is around 92% at full
Fig. 8 shows the input voltage and the input current wave- load. This is comparable to that of a conventional two-stage
forms when the converter is operating with Vin = 110 Vrms converter.
and Po = 600 W. Fig. 9 shows the transformer primary voltage Fig. 14 shows the dc bus voltage Vbus versus the output load
waveform when the converter is operating with Vin = 110 Vrms for various input voltages; it can be seen that the dc bus voltage
DAS et al.: IMPROVED ACDC SINGLE-STAGE FULL-BRIDGE CONVERTER WITH REDUCED VOLTAGE 4891
Fig. 11. Typical dc bus voltage measured at 265-Vrms input and 100-W
output (V = 60 V/div. and t = 10 ms/div.).
Fig. 13. Experimental efficiency versus output power.
Fig. 12. (a) Typical voltage and current through auxiliary diode Daux1
(V = 60 V/div., I = 5 A/div., and t = 5 s/div.) and (b) typical voltage and
current through auxiliary diode Daux2 (V = 60 V/div., I = 8 A/div., and
t = 5 s/div) at 110-Vrms input and 600-W output.
Fig. 15. Input current harmonics compared to IEC1000-3-2 Class D standard
with an output power of 600 W and an input voltage of 100 Vrms .
Vbus can be kept below 450 V over the required range. Fig. 15
shows the input current harmonics when Vin = 100 V and Po =
VI. C ONCLUSION
600 W, which was determined to be the worst case condition for
the harmonic content. It can be seen that the converter can meet A new acdc single-stage voltage-fed full-bridge converter
the IEC1000-3-2 Class D standards for electrical equipment. It has been proposed in this paper. The converter can perform
was confirmed that the standards were met when Vin = 230 V. input PFC using an auxiliary winding taken off of the main
The range of the input pf was measured to be in the range of power transformer that acts as a switch. This switch is
0.890.94 throughout the operating range. either on, causing the input current to rise, or off, causing the
4892 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 12, DECEMBER 2009
input current to fall. The winding itself is asymmetrical and is [17] S. Li and G. Moschopoulos, A simple ACDC PWM full-bridge con-
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J. B. Vieira, Jr., Application of the non-dissipative snubber in the AC/DC Pritam Das was born in Calcutta, India, in 1978.
full-bridge converter and high power factor application, in Proc. IEEE He received the B.Eng. degree in electronics and
INTELEC Conf. Rec., 2000, pp. 665669. communication engineering from The University of
[14] T.-S. Kim, G.-B. Koo, G.-W. Moon, and M.-J. Youn, A single-stage Burdwan, Bardhaman, India, and the M.A.Sc. de-
power factor correction AC/DC converter based on zero voltage switch- gree in electrical engineering from The University
ing full bridge topology with two series-connected transformers, IEEE of Western Ontario, London, ON, Canada, in 2005,
Trans. Power Electron., vol. 21, no. 1, pp. 8997, Jan. 2006. where he is currently working toward the Ph.D.
[15] G. Moschopoulos, M. Qiu, H. Pinheiro, and P. K. Jain, PWM full-bridge degree in electrical engineering.
converter with natural input power factor correction, IEEE Trans. Aerosp. His research interests include high-frequency and
Electron. Syst., vol. 39, no. 2, pp. 660674, Apr. 2003. high-efficiency acdc and dcdc power converters,
[16] G. Moschopoulos, A simple ACDC PWM full-bridge converter with power factor correction and soft switching tech-
integrated power-factor correction, IEEE Trans. Ind. Electron., vol. 50, niques, and modeling and control of acdc and dcdc converters. He has
no. 6, pp. 12901297, Dec. 2003. published more than 15 technical papers in referred journals and conferences.
DAS et al.: IMPROVED ACDC SINGLE-STAGE FULL-BRIDGE CONVERTER WITH REDUCED VOLTAGE 4893
Shumin Li received the B.S. degree in industrial Gerry Moschopoulos (S90M96) received the
automation control from China University of Min- B.Eng., M.A.Sc., and Ph.D. degrees in electrical
ing and Technology, Beijing, China, in 1995 and engineering from Concordia University, Montreal,
the M.E.Sc. degree from The University of Western QC, Canada, in 1989, 1992, and 1997, respectively.
Ontario, London, ON, Canada, in 2003. From 1996 to 1998, he was a Design Engineer
From 1995 to 2001, she was with the Taiyuan Re- with the Advanced Power Systems Division, Nortel
search and Design Institute as an Electrical Engineer. Networks, Lachine, QC. From 1998 to 2000, he was
She was a Research Assistant with The University a Postdoctoral Fellow with Concordia University,
of Western Ontario until 2004. Since 2004, she has where he was engaged in research in the area of
been with Intel Corporation, DuPont, WA, as a Se- power electronics for telecommunications applica-
nior Hardware Engineer specializing in acdc power tions. He is currently an Associate Professor with
supplies and dcdc switching-mode voltage regulators. The University of Western Ontario, London, ON, Canada.
Dr. Moschopoulos is a Registered Professional Engineer in the province of
Ontario.