Professional Documents
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Objectives:
To Study
Functional Classification
- Data Transfer
- Arithmetic
- Logical
- Branching
- Machine Control
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TAO1221 Computer Architecture and Organization Tutorial 2
The different ways of specifying the address of the data to be operated upon
(operand) are known as addressing modes.
1. Immediate addressing.
2. Register addressing.
3. Direct addressing.
4. Register indirect addressing.
5. Implicit addressing
Immediate addressing
When the operand is specified within the instruction itself, we say that
immediate addressing mode has been used. Here one or two bytes within the
instruction are used for specifying the data itself.
MVI, LXI and ADI are examples of instructions using the immediate
addressing mode. Instructions using immediate addressing mode may be 2 or 3
bytes long.
Examples:
MVI B, 35H - Load the immediate data 35H in B reg. uses immediate
addressing mode (35H is the immediate operand 2 bytes instruction)
LXI H, 4567H Load the register pair HL with the 16bit contents of 4567H.
(Here 4567 is the immediate operand 3 bytes instruction)
Register addressing
When the operands for any operation are in the general purpose registers,
only the registers need be specified as the address of the operands. Such
instructions are said to use the register addressing mode. These are one byte
instructions. The registers are specified within the byte containing the operation
code.
For example, MOV and ADD instructions permit register addressing.
Example: MOV B, C - Copy the contents of register C to Register B Here the
source operand (data) is in register C and destination operand is in register B.
But register name only is mentioned in the instruction.
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TAO1221 Computer Architecture and Organization Tutorial 2
Direct addressing
Examples:
LDA 4500H Load the accumulator with the contents of the address
location 4500H. Here the operand is in the memory location 4500H and address
is mentioned in the instruction 3 bytes instruction
OUT 45H Transfer the contents of accumulator to the output device with
the port address 45 H. Here the operand in accumulator is copied to the buffer
having the address 45 H 2 bytes instruction
Examples:
ADD M Add the accumulator contents with memory location contents
whose address is in HL register pair- Here M indicates HL register pair. The
second operand is in memory location whose address is stored in HL register
pair.
STAX B Store the accumulator contents with the data stored in
memory location whose address is specified in BC register pair.
Implicit Addressing
There are certain instructions that operate only on one operand. Such
instructions assume that the operand is in the accumulator and therefore require
no address specification.
RLC, RRC, CMA are some examples of instructions using implicit
addressing mode. All are 1-byte instructions.
RLC Here the operand is in accumulator. It is implicit. It is not explicitly
mentioned in the instruction. Rotate the accumulator contents left by one
position.
CMA Complement the contents of accumulator (1s complement) Here
the accumulator is not mentioned in the instruction. It is assumed.
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TAO1221 Computer Architecture and Organization Tutorial 2
Types Examples
2. Specific data byte to a register or 2. Load register B with the data byte
a memory location. 32H. (MVI B,32H)
4. Between an I/O device and the 4. From an input keyboard (43H) to the
accumulator. accumulator.
( IN 43H )
ARITHMETIC OPERATIONS
Addition - Any 8-bit number, or the contents of a register or the contents of a
memory location can be added to the contents of the accumulator and the sum is
stored in the accumulator. No two other 8-bit registers can be added directly
(e.g., the contents of register B cannot be added directly to the contents of the
register C). The instruction DAD is an exception; it adds 16-bit data directly in
register pairs.
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TAO1221 Computer Architecture and Organization Tutorial 2
Examples:
1. SUI 67H ([A] 67H [A])
2. SUB C ([A] [C] [A])
3. SUB M ([A] [[HL]] [A])
Examples:
1. INR D ([D] + 01 H [D])
2. INR M ([[HL]] + 01H [[HL]])
3. INX D ([DE] + 01H [DE])
LOGICAL OPERATIONS
These instructions perform various logical operations with the contents of the
accumulator.
Rotate - Each bit in the accumulator can be shifted either left or right to the next
position through carry or without carry.
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TAO1221 Computer Architecture and Organization Tutorial 2
Examples: CPI 45H ([A] 45H) According to the result, the flags will be set
or reset.
CMP B ([A] [B])
CMP M ([A] [[HL]])
BRANCHING OPERATIONS
This group of instructions alters the sequence of program execution either
conditionally or unconditionally.
Jump - Conditional jump instructions test for a certain conditions and alter the
program sequence when the condition is met. In addition, the instruction set
includes an instruction called unconditional jump.
Examples:
1. 3070H JMP 4050H Program control is jumped unconditionally to
location 4050H from 3072H
2. 3070H JZ 4050H Next instruction is fetched from location 4050 H if
zero flag is set. If it is reset, next instruction is fetched from 3073H
(normal sequence)
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TAO1221 Computer Architecture and Organization Tutorial 2
The 8085 instruction set is classified into the following three groups according to
word size:
ONE-BYTE INSTRUCTIONS
A 1-byte instruction includes the opcode and operand in the same byte.
For example:
Task Opcode Operand Binary Hex
Code Code
Copy the contents of the MOV H,B 0110 0000 60H
register B to register H
Subtract the contents of SUB C 1001 0001 91H
register C from the contents
of the accumulator
Rotate the accumulator left RLC 0000 0111 07H
by one position
These instructions require one memory location.
MOV Rd, Rs
Rd <-- Rs copies contents of Rs into Rd.
Coded as 01 ddd sss where ddd is a code for one of the 7 general purpose
registers, which is the destination of the data, sss is the code of the source
register.
Example: MOV H, B
Coded as 01 100 000 = 60H
TWO-BYTE INSTRUCTIONS
In a two-byte instruction, the first byte specifies the operation code and the
second byte specifies the operand. Source operand is a data byte immediately
following the opcode. For example:
Assume that the data byte is 32H. The assembly language instruction is written
as
Mnemonics Hex code
THREE-BYTE INSTRUCTIONS
In a three-byte instruction, the first byte specifies the opcode, and the following
two bytes specify the 16-bit address. The second byte is the low-order address
and the third byte is the high-order address.
For example:
Task Opcode Operand Binary Hex Code
code
Transfer JNZ 6070H
the 1100 0010 C2 First byte
program
sequence 0111 0000 70 Second
to memory 0110 0000
location 60 Third Byte
6070H if
Zero flag is
reset
This instruction would require three memory locations to store in memory.
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TAO1221 Computer Architecture and Organization Tutorial 2
Example:
Label:
A label could be any character string consists of lower and upper case letters
(A-Z or a-z), digits (0-9) and the $. The first character of the label must be a letter
or a $. Some assemblers place an upper limit on the number of characters in a
label. It is an optional field. But it greatly facilitates specifying jump locations.
Opcode:
Operand:
Comments:
Delimiters:
Delimiter Placement
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TAO1221 Computer Architecture and Organization Tutorial 2
Reference:
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