DigitalElectronics

Fall2008
Submissiondate:September23,2008

1. SketchatransistorlevelschematicforasinglestageCMOSlogicgateforeach
ofthefollowingfunctions
a.
b.
c.
2. SketchatransistorlevelschematicofaCMOS3inputXORgate.Youcan
assumethatyouhavebothtrueandcomplementaryversionoftheinput
available.

A B
0 0 0
0 1 1
1 0 1
1 1 0

3. Sketchatransistorlevelschematicofthefollowing3:2priorityencoderdefined
bythefollowingformula.Assumethatyouhavebothtrueandcomplementary
versionoftheinputavailable
a. 0 0 1 2
b. 1 0 1
4. AcarrylookaheadaddercomputesG=G3+P3(G2+P2(G1+P1G0)).Designthe
compoundgatethatcomputesGattransistorlevel.ConsiderGxandPxas
inputs.
5. Whatisthelogicfunctionofthefollowingcircuits?Listanyadvantagesofone
configurationovertheother,AtoBandCtoD.

CircuitA CircuitB

CircuitC CircuitD

6. Considerthefollowingcircuit.Whatistheoutputvoltageifonlyoneinputis
high?Ifalltheinputsarehigh?Whatisthedisadvantageofthis
implementation?

7. Derivetheaverageswitchingenergyofthelogicnetwork,implementingthe
followinglogicfunctionsinstaticCMOSstyle, and .
AssumethatbothgatesareloadedwithanequalcapacitanceCL.Analyzethe
energyoverthecompleterangeofsignalstatisticsforbothinputsAandB.
8. ImplementthefollowingexpressioninafullstaticCMOSlogicfashionusingno
morethan10transistors: