You are on page 1of 10

 TSL1401

128 × 1 LINEAR SENSOR ARRAY WITH HOLD



TAOS001A – MAY 1999

 128 × 1 Sensor-Element Organization (TOP VIEW)


 400 Dots-Per-Inch (DPI) Sensor Pitch
SI NC
 High Linearity and Uniformity 1 8
CLK 2 7 GND
for 256 Gray-Scale (8-Bit) Applications
AO 3 6 GND
 Output Referenced to Ground
VDD 4 5 NC
 Low Image Lag . . . 0.5% Typ
 Operation to 2 MHz NC – No internal connection

 Single 5-V Supply

Description
The TSL1401 linear sensor array consists of a 128 × 1 array of photodiodes, associated charge amplifier
circuitry, and a pixel data-hold function that provides simultaneous-integration start and stop times for all pixels.
The pixels measure 63.5 µm (H) by 55.5 µm (W) with 63.5-µm center-to-center spacing and 8-µm spacing
between pixels. Operation is simplified by internal control logic that requires only a serial-input (SI) signal and
a clock.

Functional Block Diagram


Pixel 1
Pixel Pixel Pixel
Integrator 2 3 128 VDD
Reset
Analog 4
Bus
Output
+ Amplifier
_
3
Sample/ AO
Output 6,7
RL
(External
Load)

Switch Control Logic


Gain
Trim

Hold Q1 Q2 Q3 Q128

2
CLK 128-Bit Shift Register
1
SI

www.taosinc.com Copyright  2000, TAOS Inc.



Texas Advanced Optoelectronic Solutions Inc.
800 Jupiter Road, Suite 205  Plano, TX 75074  (972) 673-0759

1
TSL1401
128 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS001A – MAY 1999

Terminal Functions
TERMINAL
DESCRIPTION
NAME NO.
AO 3 Analog output
CLK 2 Clock. The clock controls charge transfer, pixel output, and reset.
GND 6, 7 Ground (substrate). All voltages are referenced to the substrate.
NC 5, 8 No internal connection
SI 1 Serial input. SI defines the start of the data-out sequence.
VDD 4 Supply voltage. Supply voltage for both analog and digital circuits.

Detailed Description
The sensor consists of 128 photodiodes arranged in a linear array. Light energy impinging on a photodiode
generates photocurrent, which is integrated by the active integration circuitry associated with that pixel.
During the integration period, a sampling capacitor connects to the output of the integrator through an analog
switch. The amount of charge accumulated at each pixel is directly proportional to the light intensity and the
integration time.
The output and reset of the integrators is controlled by a 128-bit shift register and reset logic. An output cycle
is initiated by clocking in a logic 1 on SI. An internal signal, called Hold, is generated from the rising edge of SI
and transmitted to analog switches in the pixel circuit.This causes all 128 sampling capacitors to be
disconnected from their respective integrators and starts an integrator reset period. As the SI pulse is clocked
through the shift register, the charge stored on the sampling capacitors is sequentially connected to a
charge-coupled output amplifier that generates a voltage on analog output AO. Simultaneously, during the first
18 clock cycles, all pixel integrators are reset, and the next integration cycle begins on the 19th clock. On the
129th clock rising edge, the SI pulse is clocked out of the shift register and the analog output AO assumes a
high impedance state. Note that this 129th clock pulse is required to terminate the output of the 128th pixel,
and return the internal logic to a known state. A subsequent SI pulse may be presented as early as the 130th
clock pulse, thereby initiating another pixel output cycle.
AO is driven by a source follower that requires an external pulldown resistor. When the output is not in the output
phase, it is in a high-impedance state. The output is nominally 0 V for no light input and 2 V for a nominal
white–level output, with a nominal full–scale (saturation) voltage of 3 V.
The TSL1401 is intended for use in a wide variety of applications, including: image scanning, mark and code
reading, optical character recognition (OCR) and contact imaging, edge detection and positioning, and optical
linear and rotary encoding.

www.taosinc.com



2
TSL1401
128 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS001A – MAY 1999

Absolute Maximum Ratings†


Supply voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Digital input current range, II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA to 20 mA
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –25°C to 85°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

Recommended Operating Conditions (see Figure 1 and Figure 2)


MIN NOM MAX UNIT
Supply voltage, VDD 4.5 5 5.5 V
Input voltage, VI 0 VDD V
High-level input voltage, VIH VDD × 0.7 VDD V
Low-level input voltage, VIL 0 VDD × 0.3 V
Wavelength of light source, λ 400 1000 nm
Clock frequency, fclock 5 2000 kHz
Sensor integration time, tint 0.0645 100 ms
Setup time, serial input, tsu(SI) 20 ns
Hold time, serial input, th(SI) (see Note 1) 0 ns
Operating free-air temperature, TA 0 70 °C
NOTE 1: SI must go low before the rising edge of the next clock pulse.

CLK

SI

Internal
Reset

18 Clock Cycles

Integration Not Integrating Integrating

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ 129 Clock Cycles

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
AO

Hi-Z Hi-Z

Figure 1. Timing Waveforms

www.taosinc.com



3
TSL1401
128 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS001A – MAY 1999

Electrical Characteristics at fclock = 200 kHz, VDD = 5 V, TA = 25°C, λp = 565 nm, tint = 5 ms,
RL = 330 Ω, Ee = 14 µW/cm2 (unless otherwise noted) (see Note 2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Analog output voltage (white, average over 128 pixels) 1.8 2 2.2 V
Analog output voltage (dark, average over 128 pixels) Ee = 0 0 0.1 0.2 V
PRNU Pixel response nonuniformity See Note 3 ±4% ±7.5%
Nonlinearity of analog output voltage See Note 4 ±0.4% FS
Output noise voltage See Note 5 1 mVrms
Saturation exposure See Note 6 95 123 nJ/cm 2
Analog output saturation voltage 3 3.5 V
All pixels, Ee = 0
0.08 0.120
See Note 7
DSNU Dark signal nonuniformity V
All except pixel 1, Ee = 0
0.017 0.035
See Note 7
IL Image lag See Note 8 0.5%
IDD Supply current 2.5 4 mA
IIH High-level input current VI = VDD 1 µA
IIL Low-level input current VI = 0 1 µA
Ci Input capacitance 5 pF
NOTES: 2. Clock duty cycle is assumed to be 50%.
3. PRNU is the maximum difference between the voltage from any single pixel and the average output voltage from all pixels of the
device under test when the array is uniformly illuminated.
4. Nonlinearity is defined as the maximum deviation from a best-fit straight line over the dark-to-white irradiance levels, as a percent
of analog output voltage (white).
5. RMS noise is the standard deviation of a single-pixel output under constant illumination as observed over a 5-second period.
6. Minimum saturation exposure is calculated using the maximum responsivity and minimum output saturation voltage figures.
7. DNSU is the difference between the maximum and minimum of dark-current voltage.
8. Image lag is a residual signal left in a pixel from a previous exposure. It is defined as a percent of white-level signal remaining after
a pixel is exposed to a white condition followed by a dark condition:

V –V
AO AO(dark)
IL   100
V  V AO(dark)
AO(white)

www.taosinc.com



4
TSL1401
128 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS001A – MAY 1999

Operating Characteristics over recommended ranges of supply voltage and operating free-air
temperature (see Figure 2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tw(H) Clock pulse duration (high) 50 ns
tw(L) Clock pulse duration (low) 50 ns
ts Analog output settling time to ±1% RL = 330 Ω, CL = 50 pF 350 ns

tw 1 2 128 129
5V
CLK 2.5 V
0V
tsu(SI)
5V
SI 50%
0V
th(SI)

ts ts

AO
Pixel 1 Pixel 128

Figure 2. Operational Waveforms

TYPICAL CHARACTERISTICS
PHOTODIODE SPECTRAL RESPONSIVITY
1
TA = 25°C

0.8
Normalized Responsivity

0.6

0.4

0.2

0
300 400 500 600 700 800 900 1000 1100
λ – Wavelength – nm

Figure 3

www.taosinc.com



5
TSL1401
128 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS001A – MAY 1999

TYPICAL CHARACTERISTICS

DARK SIGNAL NONUNIFORMITY SUPPLY CURRENT


vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
0.08 3.5

0.07
3
Dark Signal Nonuniformity – V

I DD– Supply Current – mA


0.06
2.5
0.05
2
0.04

1.5
0.03

0.02 1

0.01 0.5

0 0
–25 –15 –5 5 15 25 35 45 55 65 75 85 –25 –15 –5 5 15 25 35 45 55 65 75 85
TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C
Figure 4 Figure 5

ANALOG OUTPUT SATURATION VOLTAGE AVERAGE ANALOG OUTPUT VOLTAGE, WHITE


vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
3.28 2.5
Average Analog Output Voltage, White – V
Analog Output Saturation Voltage – V

3.26
2
3.24

3.22 1.5

3.2
1

3.18

0.5
3.16

3.14 0
–25 –15 –5 5 15 25 35 45 55 65 75 85 –25 –15 –5 5 15 25 35 45 55 65 75 85
TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C
Figure 6 Figure 7

www.taosinc.com



6
TSL1401
128 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS001A – MAY 1999

TYPICAL CHARACTERISTICS

AVERAGE ANALOG OUTPUT VOLTAGE, DARK MAXIMUM ANALOG OUTPUT VOLTAGE, DARK
vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
0.2 0.25
0.18

Maximum Analog Output Voltage, Dark – V


Average Analog Output Voltage, Dark – V

0.16 0.2

0.14

0.12 0.15

0.1

0.08 0.1

0.06

0.04 0.05

0.02

0 0
–25 –15 –5 5 15 25 35 45 55 65 75 85 –25 –15 –5 5 15 25 35 45 55 65 75 85
TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C
Figure 8 Figure 9

www.taosinc.com



7
TSL1401
128 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS001A – MAY 1999

MECHANICAL INFORMATION

This dual-in-line package consists of an integrated circuit mounted on a lead frame and encapsulated with an
electrically nonconductive clear plastic compound.
0.430 (10,92)
0.410 (10,41)
Pin 1 SI
Pin 2 CLK 0.390 (9,91)‡
Pin 3 AO Centerline of Pin 1 Nominally
Lies on Pixel 4 8 5
Pin 4 VDD
Pin 5 NC
Pin 6 GND
Pin 7 GND 0.310 (7,87)
C
L (pixel)
Pin 8 NC 0.290 (7,37) C
L

0.017 (0,43)
0.310 (7,87)
0.290 (7,37) 0.020 (0,51) R NOM
0.030 (0,76) D NOM 1 4 4 Places
0.260 (6,60)
0.240 (6,10) 0.060 (1,52)
0.175 (4,45) 8° MAX TYP
0.075 (1,91) 0.040 (1,02)
10° TYP 0.155 (3,94) 0.053 (1,35)
0.060 (1,52) 8 Places
0.043 (1,09)

Seating Plane
105° 0.012 (0,30) 0.150 (3,81)
0.020 (0,51) 90° 0.008 (0,20) 0.016 (0,41) 0.125 (3,18)
R MAX 8 Places 0.014 (0,36)
4 Places 0.025 (0,64)
0.067 (1,70) 0.015 (0,38)
0.053 (1,35)
0.100 (2,54) T.P.†
† True position when unit is installed
‡ Minimum flat-optical-surface length
NOTES: A. All linear dimensions are in inches and parenthetically in millimeters.
B. This drawing is subject to change without notice.
C. Index of refraction of clear plastic is 1.55.

Figure 10. Packaging Configuration

www.taosinc.com



8
TSL1401
128 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS001A – MAY 1999

PRODUCTION DATA — information in this document is current at publication date. Products conform to
specifications in accordance with the terms of Texas Advanced Optoelectronic Solutions, Inc. standard
warranty. Production processing does not necessarily include testing of all parameters.

NOTICE
Texas Advanced Optoelectronic Solutions, Inc. (TAOS) reserves the right to make changes to the products contained in this
document to improve performance or for any other purpose, or to discontinue them without notice. Customers are advised
to contact TAOS to obtain the latest product information before placing orders or designing TAOS products into systems.

TAOS assumes no responsibility for the use of any products or circuits described in this document or customer product
design, conveys no license, either expressed or implied, under any patent or other right, and makes no representation that
the circuits are free of patent infringement. TAOS further makes no claim as to the suitability of its products for any particular
purpose, nor does TAOS assume any liability arising out of the use of any product or circuit, and specifically disclaims any
and all liability, including without limitation consequential or incidental damages.

TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS, INC. PRODUCTS ARE NOT DESIGNED OR INTENDED FOR
USE IN CRITICAL APPLICATIONS IN WHICH THE FAILURE OR MALFUNCTION OF THE TAOS PRODUCT MAY
RESULT IN PERSONAL INJURY OR DEATH. USE OF TAOS PRODUCTS IN LIFE SUPPORT SYSTEMS IS EXPRESSLY
UNAUTHORIZED AND ANY SUCH USE BY A CUSTOMER IS COMPLETELY AT THE CUSTOMER’S RISK.

www.taosinc.com



9
TSL1401
128 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS001A – MAY 1999

www.taosinc.com



10

You might also like