Toshiba c800 Quanta Daby3cmb8e0

1 2 3 4 5 6 7 8
Chief River Block Diagram 01

A A
USB-11
LCD/CCD Con. P28
EXT_LVDS
DDRIII-SODIMM1
m
DDRIII-SODIMM2 Ivy Bridge(UMA+VGA) VGA EXT_CRT
PCI-E x16 CRT Con.
P13,14 Thames_M2 P28
DDR SYSTEM MEMORY

PCI-E
Dual Channel DDR III
P15,16,17,18,19,20,21,22,25 EXT_HDMI
HDMI Level Shift
P27
HDMI Con. P27
rPGA 989
o
VRAM DDR3-64M*16
SATA - HDD P3,4, 5, 6,
VRAM DDR3-128M*16
P33
FDI
DMI
.c
DMI(x4)
SATA - ODD
P33 SATA 0
FDI USB-11
DMI INT_LVDS LCD/CCD Con.
B
SATA 4 PCI-E P28 B
SATA
Graphics Interfaces
x
INT_CRT
CRT Con. P28
fi
INT_HDMI HDMI Level Shift
USB-5 P27 HDMI Con. P27
SIM CARD.
P29 PantherPoint
PCIE-3
a
USB-8
Card Reader Con. USB
USB-4 3G
P36 PCH P29
P7,8, 9, 10, 11,12
USB 2.0 LD Con. USB-9 PCIE-5
in
P32
USB-13 WLAN
RTC
P29
BATTERY PCIE-7
C
Giga/10/100 Lan C
P8 P35
Azalia
IHDA h LPC
PCI-E
NVRAM
PCIE-2
USB3.0 Controller
P30 USB-0
USB 3.0 Right Con.
P31
.c
USB3.0 Level Shift
LPC USB 3.0 LU Con.
P32 USB-2
P32
Audio Codec EC
w
P34 P37
POWER SYSTEM
Charger (ISL88731C) P40
System 5V/3V (TPS51123A) P41
w
FAN K/B Con. HALL Sensor SPI Flash Touch Pad /B Power /B
DDR1.5V (TPS51216) P42
MIC JACK HP SPK Con. Con. Con.
VTT (RT8240BGQW) P43
P34 P34 P34 P3 P38 P28 P8 P38 P38
D +VCCSA (TI51461) P44 D
+VCORE+VGFX (ISL95836) P45

+1.8V (G966A) P46
w
AMD_GPU (ISL95870A) P47
Quanta Computer Inc.

PROJECT : Chief River
Size Document Number Rev
A1A
Block Diagram
Date: Wednesday, February 01, 2012 Sheet 1 of 48
1 2 3 4 5 6 7 8
5 4 3 2 1
AO6402A
low switch +5V MAIND enable
02
+5V_S5 (Peak 5.774A ,AVG 4.042A)
AC/DC Insert enable
TPS51461 +VCCSA HWPG_VTT enable
D AC (Peak 12.85A ,AVG 9A) OCP 15A
PWM
D
System SYSTEM POWER (Peak 6A ,AVG 4.2A)
Charger RT8223
DC ISL88731C PWM
AON7406
+3V_S5 +3V MAIND enable
m
PWM low switch
AC/DC Insert enable (Peak 6.816A ,AVG 4.771A)
(Peak 13.47A ,AVG 9.43A) OCP 15A G9661-25ADJ

+1.8V MAINON enable
LDO
(Peak 1.242A ,AVG 0.869A)
o
+SMDDR_VTERM
G9661-25ADJ
SUSON enable +1.8V_GPU
LDO
GFX_+1.8VGFX_ON
.c
TPS51216 +SMDDR_VTERM (Peak 1.217A ,AVG 0.922A)
SUSON enable
C PWM C
AO6402A
+1.5VSUS
+1.5V MAIND enable
SUSON enable low switch
CONTROL Power States
(Peak 17.81A ,AVG 12.46A) OCP 20A (Peak 0.67A ,AVG 0.453A) POWER PLANE VOLTAGE
x
SIGNAL ACTIVE IN
G9661-25ADJ
+1.5V_GPU VIN 10V~+19V S0~S5
LDO
GFX_+1.5VGFX_ON +VCCRTC +3.0V~+3.3V S0~S5
fi
(Peak 4.6A ,AVG 3.22A)
+3V +3.3V MAIN_ON S0
RT8240 +VTT +1.05V
PWM MAINON enable +3V_S5 +3.3V S5_ON S0~S5
(Peak 18.05A ,AVG 12.63A) OCP 20A
+3V_HDP +3.3V MAIN_ON S0
a
+3VPCU +3.3V AC/DC Insert enable S0
+VCC_CORE +5V +5V MAIN_ON S0

VRON enable
B B
ISL95836HRZ-T
in
+5V_S5 +5V S5_ON S0~S5
(Peak 53A ,AVG 53A)
PWM
+VAXG +5VPCU +5V AC/DC Insert enable S0~S5
VRON enable WIMAX_P +3.3V WMAX_P for WLAN
(Peak 33A ,AVG 23.1A)
+1.8V +1.8V MAIN_ON S0
+1.5V +1.5V MAIN_ON S0
ISL95870AHRUZ-T
PWM
+VGPU_CORE
GFX_MAINON
h
RT9046GE
AON7410
+1V_GPU
GFX_+1.0VGFX_ON
+1.5V_SUS
+VCC_CORE
+1.5V SUSON
VRON
S0~S3
S0
.c
(Peak 30A ,AVG 20.5A) +VTT +1.05V MAIN_ON S0
Linear Regulator (Peak 2.8A ,AVG 1.96A)
+1.05V +1.05V MAIN_ON S0
+VAXG MPWROK S0
A A
w

w

A1A
POWER TREE TABLE
5 4 3 2 1
w
5 4 3 2 1
Ivy Bridge Processor (DMI,PEG,FDI) CPU/VGA CPU

Ivy Bridge Processor (CLK,MISC,JTAG)
[7]
[7]
DMI_TXN0
DMI_TXN1
B27
B25
A25
U1001A
DMI_RX#[0]
DMI_RX#[1]
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
J22
J21
H22
PEG_COMP
PEG_RXN[0..15] [15] U1001B

03
[7] DMI_TXN2 B24 DMI_RX#[2] K33 PEG_RXN0
[7] DMI_TXN3 DMI_RX#[3] PEG_RX#[0] M35 PEG_RXN1
B28 PEG_RX#[1] L34 PEG_RXN2 A28
CLK_CPU_BCLKP [9]
MISC
CLOCKS
[7] DMI_TXP0 B26 DMI_RX[0] PEG_RX#[2] J35 PEG_RXN3 C26 BCLK A27
[7] DMI_TXP1 DMI_RX[1] PEG_RX#[3] [8] H_SNB_IVB# PROC_SELECT# BCLK# CLK_CPU_BCLKN [9]
DMI
A24 J32 PEG_RXN4
[7] DMI_TXP2 B23 DMI_RX[2] PEG_RX#[4] H34 PEG_RXN5
[7] DMI_TXP3 DMI_RX[3] PEG_RX#[5] H31 PEG_RXN6 SKTOCC# AN34
G21 PEG_RX#[6] G33 PEG_RXN7 TP1 SKTOCC# A16 CLK_DPLL_SSCLKP_R R78 1K_4
D [7] DMI_RXN0 E22 DMI_TX#[0] PEG_RX#[7] G30 PEG_RXN8 DPLL_REF_CLK A15 CLK_DPLL_SSCLKN_R D
R84 1K_4 +VTT
[7] DMI_RXN1 F21 DMI_TX#[1] PEG_RX#[8] F35 PEG_RXN9 DPLL_REF_CLK#
[7] DMI_RXN2 DMI_TX#[2] PEG_RX#[9]
[7] DMI_RXN3
D21
DMI_TX#[3] PEG_RX#[10]
E34
E32
PEG_RXN10
PEG_RXN11
C3A C5579
*10P/50V_4C TP_CATERR# AL33
G22 PEG_RX#[11] D33 PEG_RXN12 TP2 CATERR#
[7] DMI_RXP0 D22 DMI_TX[0] PEG_RX#[12] D31 PEG_RXN13
PCI EXPRESS* - GRAPHICS
THERMAL
[7] DMI_RXP1 F20 DMI_TX[1] PEG_RX#[13] B33 PEG_RXN14
[7] DMI_RXP2 C21 DMI_TX[2] PEG_RX#[14] C32 PEG_RXN15 AN33 R8
[7] DMI_RXP3 DMI_TX[3] PEG_RX#[15] PEG_RXP[0..15] [15] [37] EC_PECI PECI SM_DRAMRST# CPU_DRAMRST# [26]
DDR3
MISC
J33 PEG_RXP0
m
PEG_RX[0] L35 PEG_RXP1
PEG_RX[1] K34 PEG_RXP2 H_PROCHOT# R1006 56_4 H_PROCHOT#_R AL32 AK1 SM_RCOMP_0 R1007 140/F_4 C5602 C5603
PEG_RX[2] [45] H_PROCHOT# PROCHOT# SM_RCOMP[0]
A21 H35 PEG_RXP3 A5 SM_RCOMP_1 R1008 25.5/F_4 39P/50V_4N 0.1U/10V_4X
[7] FDI_TXN0 H19 FDI0_TX#[0] PEG_RX[3] H32 PEG_RXP4 SM_RCOMP[1] A4 SM_RCOMP_2 R1009 200/F_4
[7] FDI_TXN1 E19 FDI0_TX#[1] PEG_RX[4] G34 PEG_RXP5 SM_RCOMP[2]
[7] FDI_TXN2 F18 FDI0_TX#[2] PEG_RX[5] G31 AN32
Intel(R) FDI
PEG_RXP6 PM_THRMTRIP#_R
[7] FDI_TXN3 B21 FDI0_TX#[3] PEG_RX[6] F33 PEG_RXP7 THERMTRIP#
[7] FDI_TXN4 C20 FDI1_TX#[0] PEG_RX[7] F30 PEG_RXP8
[7] FDI_TXN5 FDI1_TX#[1] PEG_RX[8] PEG_TXN[0..15] [15]
D18 E35 PEG_RXP9
[7] FDI_TXN6 FDI1_TX#[2] PEG_RX[9]
[7] FDI_TXN7
E17
FDI1_TX#[3] PEG_RX[10]
E33
F32
PEG_RXP10
PEG_RXP11 AP29 XDP_PRDY#_R TP3
E3A
o
PEG_RX[11] D34 PEG_RXP12 PRDY# AP27 XDP_PREQ# TP4
A22 PEG_RX[12] E31 PEG_RXP13 PREQ#
[7] FDI_TXP0 G19 FDI0_TX[0] PEG_RX[13] C33 PEG_RXP14 AR26 XDP_TCLK
PWR MANAGEMENT
[7] FDI_TXP1 E20 FDI0_TX[1] PEG_RX[14] B32 TCK AR27 XDP_TMS
JTAG & BPM

PEG_RXP15
[7] FDI_TXP2 G18 FDI0_TX[2] PEG_RX[15] AM34 TMS AP30 XDP_TRST#
[7] FDI_TXP3 FDI0_TX[3] [7] PM_SYNC PM_SYNC TRST#
B20 M29 PEG_TXN0_C C1001 EV@0.1U/10V_4X PEG_TXN0
[7] FDI_TXP4 FDI1_TX[0] PEG_TX#[0]
[7] FDI_TXP5
C19
D19 FDI1_TX[1] PEG_TX#[1]
M32
M31
PEG_TXN1_C
PEG_TXN2_C
C1002
C1003
EV@0.1U/10V_4X
EV@0.1U/10V_4X
PEG_TXN1
PEG_TXN2
E3A C5590 39P/50V_4N
TDI
AR28 XDP_TDI_R
AP26 XDP_TDO_R
TP5
TP6
.c
[7] FDI_TXP6 FDI1_TX[2] PEG_TX#[2] TDO
[7] FDI_TXP7
F17
FDI1_TX[3] PEG_TX#[3]
L32
L29
PEG_TXN3_C
PEG_TXN4_C
C1004
C1005
EV@0.1U/10V_4X
EV@0.1U/10V_4X
PEG_TXN3
PEG_TXN4
[10] H_PWRGOOD
AP33
UNCOREPWRGOOD E3A
J18 PEG_TX#[4] K31 PEG_TXN5_C C1006 EV@0.1U/10V_4X PEG_TXN5 R1012 10K_4
[7] FDI_FSYNC0 J17 FDI0_FSYNC PEG_TX#[5] K28 PEG_TXN6_C PEG_TXN6 AL35 XDP_DBR#_R
C1007 EV@0.1U/10V_4X R1013 *SHORT_4 XDP_DBRST# [7]
[7] FDI_FSYNC1 FDI1_FSYNC PEG_TX#[6] J30 PEG_TXN7_C PEG_TXN7 V8 DBR#
C1008 EV@0.1U/10V_4X [26] PM_DRAM_PWRGD_R
H20 PEG_TX#[7] J28 PEG_TXN8_C C1009 EV@0.1U/10V_4X PEG_TXN8 SM_DRAMPWROK
[7] FDI_INT FDI_INT PEG_TX#[8] H29 PEG_TXN9_C PEG_TXN9 AT28 XDP_OBS0
C C1010 EV@0.1U/10V_4X TP7 C
J19 PEG_TX#[9] G27 PEG_TXN10_C C1011 EV@0.1U/10V_4X PEG_TXN10 R1014 *75/F_4 BPM#[0] AR29 XDP_OBS1 TP8
[7] FDI_LSYNC0 FDI0_LSYNC PEG_TX#[10] +VTT BPM#[1]
H17 E29 PEG_TXN11_C C1012 EV@0.1U/10V_4X PEG_TXN11 AR30 XDP_OBS2 TP9
[7] FDI_LSYNC1 FDI1_LSYNC PEG_TX#[11] F27 PEG_TXN12_C PEG_TXN12 CPU_PLTRST# CPU_PLTRST#_R AR33 BPM#[2] AT30 XDP_OBS3
C1013 EV@0.1U/10V_4X R1015 *43_4 TP10
PEG_TX#[12] D28 PEG_TXN13_C C1014 EV@0.1U/10V_4X PEG_TXN13 RESET# BPM#[3] AP32 XDP_OBS4 TP11
PEG_TX#[13] F26 PEG_TXN14_C C1015 EV@0.1U/10V_4X PEG_TXN14 BPM#[4] AR31 XDP_OBS5 TP12
PEG_TX#[14] E25 PEG_TXN15_C C1016 EV@0.1U/10V_4X PEG_TXN15 BPM#[5] AT31 XDP_OBS6 TP13
PEG_TXP[0..15] [15]
x
A18 PEG_TX#[15] C5595 C5577 BPM#[6] AR32 XDP_OBS7 TP14
eDP_COMP A17 eDP_COMPIO M28 PEG_TXP0_C C1017 EV@0.1U/10V_4X PEG_TXP0 BPM#[7]
eDP_ICOMPO PEG_TX[0] 39P/50V_4N 0.1U/10V_4X
B16 M33 PEG_TXP1_C C1018 EV@0.1U/10V_4X PEG_TXP1
eDP_HPD PEG_TX[1] M30 PEG_TXP2_C C1019 EV@0.1U/10V_4X PEG_TXP2
PEG_TX[2] L31 PEG_TXP3_C C1020 EV@0.1U/10V_4X PEG_TXP3
C15 PEG_TX[3] L28 PEG_TXP4_C C1021 EV@0.1U/10V_4X PEG_TXP4 ACA-ZIF-069-K01
D15 eDP_AUX PEG_TX[4] K30 PEG_TXP5_C C1022 EV@0.1U/10V_4X PEG_TXP5
eDP_AUX# PEG_TX[5]
eDP
K27 PEG_TXP6_C C1023 EV@0.1U/10V_4X PEG_TXP6
fi
PEG_TX[6]
C17 PEG_TX[7]
J29
J27
PEG_TXP7_C
PEG_TXP8_C
C1024
C1025
EV@0.1U/10V_4X
EV@0.1U/10V_4X
PEG_TXP7
PEG_TXP8
E3A
F16 eDP_TX[0] PEG_TX[8] H28 PEG_TXP9_C C1026 EV@0.1U/10V_4X PEG_TXP9
C16 eDP_TX[1] PEG_TX[9] G28 PEG_TXP10_C C1027 EV@0.1U/10V_4X PEG_TXP10
G15 eDP_TX[2] PEG_TX[10] E28 PEG_TXP11_C C1028 EV@0.1U/10V_4X PEG_TXP11
eDP_TX[3] PEG_TX[11] F28 PEG_TXP12_C C1029 EV@0.1U/10V_4X PEG_TXP12
C18 PEG_TX[12] D27 PEG_TXP13_C C1030 EV@0.1U/10V_4X PEG_TXP13
E16 eDP_TX#[0] PEG_TX[13] E26 PEG_TXP14_C C1031 EV@0.1U/10V_4X PEG_TXP14
D16 eDP_TX#[1] PEG_TX[14] D25 PEG_TXP15_C C1032 EV@0.1U/10V_4X PEG_TXP15
F15 eDP_TX#[2] PEG_TX[15]
a
eDP_TX#[3]
ACA-ZIF-069-K01
Thermal Trip & Process HOT CPU Intel Turbo mode only CPU
FDI Disabling (Discrete Only) DP & PEG Compensation CPU Processor pull-up CPU Level CPU +3V_S5
+VTT
Shift
in
OEV +VTT C1033
6
B B
U1002 *0.1U/10V_4X
R1028 OEV@1K_4 FDI_INT R1016 24.9/F_4 eDP_COMP 1 5 2
+VTT NC VCC [7,45] DELAY_VR_PWRGOOD H_PROCHOT#
Q1002A
R1001 OEV@1K_4 FDI_FSYNC0 W=12mil; S=15mil; L<500mil 2
[9,29,30,35,36,37] PLTRST# IN 2N7002KDW_115MA
1
R1018 OEV@1K_4 FDI_FSYNC1 H_PROCHOT# R1017 62_4 3 4 CPU_PLTRST# C5570
GNDOUT R1020 100K_4 *47P/50V_4N
3
R1021 OEV@1K_4 FDI_LSYNC0 XDP_TMS R1019 51_4 *74LVC1G07GW
XDP_TDI_R R1022 51_4
+VTT 5
R1023 OEV@1K_4 FDI_LSYNC1
R1029 24.9/F_4 PEG_COMP

XDP_TDO_R
XDP_TCLK
XDP_TRST#
R1024
R1025
R1026
*51_4
51_4
51_4
h R1030 1.5K/F_4
R1031
CPU_PLTRST#_R
R1027
1K_4
[37] H_PROCHOT_EC
H_PROCHOT_EC
Q1002B
4
Q1003 R9797 2N7002KDW_115MA
2
W=12mil; S=15mil; L<500mil 750/F_4 100K_4
METR3904-G_200MA
PM_THRMTRIP#_R 1 3
SYS_SHDN# [41]
.c
PM_THRMTRIP# [10]
FAN Control-->For one FAN solution THC CPU Thermal sensor / MB Local THP/UGA/VGA
TEMP
Rset(Kohm)=0.0012T*T-0.9308T+96.147
+3V
R1038 EV@24.9K/F_4
U1004
w
R1032 R1036 150_4 +3VPCU_HW_SD 5 1 R1037 IV@24.9K/F_4

+3VPCU VCC SET
*10K_4 C1035 2
+5V CN1001 GND
A U1003 [37] FANSIG1 FANSIG1 0.1U/16V_4Y A
C1034 2.2U/6.3V_6X 2 3 TH_FAN_POWER1 4 3
VIN VO 1 HYST OT# SYS_SHDN# [41]
5
1 GND 6 2
/FON GND 3 HYST=VCC for 10 G708T1U
7 R1039 *470K_4 D2013 *1SS355_100MA
4 GND 8 degree Hys. +3VPCU
w
C1036
[37] VFAN1 VSET GND
HYST=GND for 30
APE8872M 2.2U/6.3V_6X 50273-0037L-001
degree Hys.
D3A Quanta Computer Inc.

PROJECT :Chief River
w
A1A
Ivy Bridge 1/4
5 4 3 2 1
5 4 3 2 1
Ivy Bridge Processor (DDR3)CPU

04
U1001C U1001D
AB6 M_A_CLKP0 [13] AE2 M_B_CLKP0 [14]

SA_CLK[0] AA6 [14] M_B_DQ[63:0] SB_CLK[0] AD2
[13] M_A_DQ[63:0] SA_CLK#[0] M_A_CLKN0 [13] SB_CLK#[0] M_B_CLKN0 [14]
D M_A_DQ0 C5 V9 M_B_DQ0 C9 R9 D
SA_DQ[0] SA_CKE[0] M_A_CKE0 [13] SB_DQ[0] SB_CKE[0] M_B_CKE0 [14]
M_A_DQ1 D5 M_B_DQ1 A7
M_A_DQ2 D3 SA_DQ[1] M_B_DQ2 D10 SB_DQ[1]
M_A_DQ3 D2 SA_DQ[2] M_B_DQ3 C8 SB_DQ[2]
M_A_DQ4 D6 SA_DQ[3] AA5 M_B_DQ4 A9 SB_DQ[3] AE1
SA_DQ[4] SA_CLK[1] M_A_CLKP1 [13] SB_DQ[4] SB_CLK[1] M_B_CLKP1 [14]
M_A_DQ5 C6 AB5 M_A_CLKN1 [13] M_B_DQ5 A8 AD1 M_B_CLKN1 [14]
m
M_A_DQ6 C2 SA_DQ[5] SA_CLK#[1] V10 M_B_DQ6 D9 SB_DQ[5] SB_CLK#[1] R10
SA_DQ[6] SA_CKE[1] M_A_CKE1 [13] SB_DQ[6] SB_CKE[1] M_B_CKE1 [14]
M_A_DQ7 C3 M_B_DQ7 D8
M_A_DQ8 F10 SA_DQ[7] M_B_DQ8 G4 SB_DQ[7]
M_A_DQ9 F8 SA_DQ[8] M_B_DQ9 F4 SB_DQ[8]
M_A_DQ10 G10 SA_DQ[9] AB4 M_B_DQ10 F1 SB_DQ[9] AB2
M_A_DQ11 G9 SA_DQ[10] RSVD_TP[1] AA4 M_B_DQ11 G1 SB_DQ[10] RSVD_TP[11] AA2
M_A_DQ12 F9 SA_DQ[11] RSVD_TP[2] W9 M_B_DQ12 G5 SB_DQ[11] RSVD_TP[12] T9
M_A_DQ13 F7 SA_DQ[12] RSVD_TP[3] M_B_DQ13 F5 SB_DQ[12] RSVD_TP[13]
M_A_DQ14 G8 SA_DQ[13] M_B_DQ14 F2 SB_DQ[13]
o
M_A_DQ15 G7 SA_DQ[14] M_B_DQ15 G2 SB_DQ[14]
M_A_DQ16 K4 SA_DQ[15] AB3 M_B_DQ16 J7 SB_DQ[15] AA1
M_A_DQ17 K5 SA_DQ[16] RSVD_TP[4] AA3 M_B_DQ17 J8 SB_DQ[16] RSVD_TP[14] AB1
M_A_DQ18 K1 SA_DQ[17] RSVD_TP[5] W10 M_B_DQ18 K10 SB_DQ[17] RSVD_TP[15] T10
M_A_DQ19 J1 SA_DQ[18] RSVD_TP[6] M_B_DQ19 K9 SB_DQ[18] RSVD_TP[16]
M_A_DQ20 J5 SA_DQ[19] M_B_DQ20 J9 SB_DQ[19]
SA_DQ[20] SB_DQ[20]
.c
M_A_DQ21 J4 M_B_DQ21 J10
M_A_DQ22 J2 SA_DQ[21] AK3 M_B_DQ22 K8 SB_DQ[21] AD3
SA_DQ[22] SA_CS#[0] M_A_CS#0 [13] SB_DQ[22] SB_CS#[0] M_B_CS#0 [14]
M_A_DQ23 K2 AL3 M_B_DQ23 K7 AE3
SA_DQ[23] SA_CS#[1] M_A_CS#1 [13] SB_DQ[23] SB_CS#[1] M_B_CS#1 [14]
M_A_DQ24 M8 AG1 M_B_DQ24 M5 AD6
M_A_DQ25 N10 SA_DQ[24] RSVD_TP[7] AH1 M_B_DQ25 N4 SB_DQ[24] RSVD_TP[17] AE6
M_A_DQ26 N8 SA_DQ[25] RSVD_TP[8] M_B_DQ26 N2 SB_DQ[25] RSVD_TP[18]
M_A_DQ27 N7 SA_DQ[26] M_B_DQ27 N1 SB_DQ[26]
M_A_DQ28 M10 SA_DQ[27] M_B_DQ28 M4 SB_DQ[27]
M_A_DQ29 M9 SA_DQ[28] AH3 M_B_DQ29 N5 SB_DQ[28] AE4
SA_DQ[29] SA_ODT[0] M_A_ODT0 [13] SB_DQ[29] SB_ODT[0] M_B_ODT0 [14]
DDR SYSTEM MEMORY B

M_A_DQ30 N9 AG3 M_B_DQ30 M2 AD4
M_A_ODT1 [13] M_B_ODT1 [14]
DDR SYSTEM MEMORY A
M_A_DQ31 M7 SA_DQ[30] SA_ODT[1] AG2 M_B_DQ31 M1 SB_DQ[30] SB_ODT[1] AD5
x
C M_A_DQ32 AG6 SA_DQ[31] RSVD_TP[9] AH2 M_B_DQ32 AM5 SB_DQ[31] RSVD_TP[19] AE5 C
M_A_DQ33 AG5 SA_DQ[32] RSVD_TP[10] M_B_DQ33 AM6 SB_DQ[32] RSVD_TP[20]
M_A_DQ34 AK6 SA_DQ[33] M_B_DQ34 AR3 SB_DQ[33]
M_A_DQ35 AK5 SA_DQ[34] M_B_DQ35 AP3 SB_DQ[34]
M_A_DQ36 AH5 SA_DQ[35] M_B_DQ36 AN3 SB_DQ[35]
SA_DQ[36] M_A_DQSN[7:0] [13] SB_DQ[36] M_B_DQSN[7:0] [14]
M_A_DQ37 AH6 C4 M_A_DQSN0 M_B_DQ37 AN2 D7 M_B_DQSN0
fi
M_A_DQ38 AJ5 SA_DQ[37] SA_DQS#[0] G6 M_A_DQSN1 M_B_DQ38 AN1 SB_DQ[37] SB_DQS#[0] F3 M_B_DQSN1
M_A_DQ39 AJ6 SA_DQ[38] SA_DQS#[1] J3 M_A_DQSN2 M_B_DQ39 AP2 SB_DQ[38] SB_DQS#[1] K6 M_B_DQSN2
M_A_DQ40 AJ8 SA_DQ[39] SA_DQS#[2] M6 M_A_DQSN3 M_B_DQ40 AP5 SB_DQ[39] SB_DQS#[2] N3 M_B_DQSN3
M_A_DQ41 AK8 SA_DQ[40] SA_DQS#[3] AL6 M_A_DQSN4 M_B_DQ41 AN9 SB_DQ[40] SB_DQS#[3] AN5 M_B_DQSN4
M_A_DQ42 AJ9 SA_DQ[41] SA_DQS#[4] AM8 M_A_DQSN5 M_B_DQ42 AT5 SB_DQ[41] SB_DQS#[4] AP9 M_B_DQSN5
M_A_DQ43 AK9 SA_DQ[42] SA_DQS#[5] AR12 M_A_DQSN6 M_B_DQ43 AT6 SB_DQ[42] SB_DQS#[5] AK12 M_B_DQSN6
M_A_DQ44 AH8 SA_DQ[43] SA_DQS#[6] AM15 M_A_DQSN7 M_B_DQ44 AP6 SB_DQ[43] SB_DQS#[6] AP15 M_B_DQSN7
M_A_DQ45 AH9 SA_DQ[44] SA_DQS#[7] M_B_DQ45 AN8 SB_DQ[44] SB_DQS#[7]
a
M_A_DQ46 AL9 SA_DQ[45] M_B_DQ46 AR6 SB_DQ[45]
M_A_DQ48 AP11 SA_DQ[47] M_B_DQ48 AR9 SB_DQ[47]
AN11 SA_DQ[48] D4 M_A_DQSP[7:0] [13] AJ11 SB_DQ[48] C7 M_B_DQSP[7:0] [14]
M_A_DQ49 M_A_DQSP0 M_B_DQ49 M_B_DQSP0
M_A_DQ50 AL12 SA_DQ[49] SA_DQS[0] F6 M_A_DQSP1 M_B_DQ50 AT8 SB_DQ[49] SB_DQS[0] G3 M_B_DQSP1
M_A_DQ51 AM12 SA_DQ[50] SA_DQS[1] K3 M_A_DQSP2 M_B_DQ51 AT9 SB_DQ[50] SB_DQS[1] J6 M_B_DQSP2
SA_DQ[51] SA_DQS[2] SB_DQ[51] SB_DQS[2]
in
M_A_DQ52 AM11 N6 M_A_DQSP3 M_B_DQ52 AH11 M3 M_B_DQSP3
M_A_DQ53 AL11 SA_DQ[52] SA_DQS[3] AL5 M_A_DQSP4 M_B_DQ53 AR8 SB_DQ[52] SB_DQS[3] AN6 M_B_DQSP4
M_A_DQ54 AP12 SA_DQ[53] SA_DQS[4] AM9 M_A_DQSP5 M_B_DQ54 AJ12 SB_DQ[53] SB_DQS[4] AP8 M_B_DQSP5
M_A_DQ55 AN12 SA_DQ[54] SA_DQS[5] AR11 M_A_DQSP6 M_B_DQ55 AH12 SB_DQ[54] SB_DQS[5] AK11 M_B_DQSP6
M_A_DQ56 AJ14 SA_DQ[55] SA_DQS[6] AM14 M_A_DQSP7 M_B_DQ56 AT11 SB_DQ[55] SB_DQS[6] AP14 M_B_DQSP7
M_A_DQ57 AH14 SA_DQ[56] SA_DQS[7] M_B_DQ57 AN14 SB_DQ[56] SB_DQS[7]
M_A_DQ59 AK15 SA_DQ[58] M_B_DQ59 AT14 SB_DQ[58]
M_A_DQ60 AL14 SA_DQ[59] M_B_DQ60 AT12 SB_DQ[59]
SA_DQ[60] M_A_A[15:0] [13] SB_DQ[60] M_B_A[15:0] [14]
M_A_DQ61 AK14 AD10 M_A_A0 M_B_DQ61 AN15 AA8 M_B_A0
M_A_DQ62 AJ15 SA_DQ[61] SA_MA[0] W1 M_A_A1 M_B_DQ62 AR15 SB_DQ[61] SB_MA[0] T7 M_B_A1
[13] M_A_BS#0
M_A_DQ63 AH15
AE10
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
W2
W7
V3
V2
W3
W6
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
h [14] M_B_BS#0
M_B_DQ63 AT15
AA9
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
R7
T6
T2
T4
T3
R2
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
B
.c
AF10 V1 M_A_A8 AA7 T5 M_B_A8
[13] M_A_BS#1 SA_BS[1] SA_MA[8] [14] M_B_BS#1 SB_BS[1] SB_MA[8]
V6 W5 M_A_A9 R6 R3 M_B_A9
[13] M_A_BS#2 SA_BS[2] SA_MA[9] [14] M_B_BS#2 SB_BS[2] SB_MA[9]
AD8 M_A_A10 AB7 M_B_A10
SA_MA[10] V4 M_A_A11 SB_MA[10] R1 M_B_A11
SA_MA[11] W4 M_A_A12 SB_MA[11] T1 M_B_A12
AE8 SA_MA[12] AF8 M_A_A13 AA10 SB_MA[12] AB10 M_B_A13
[13] M_A_CAS# SA_CAS# SA_MA[13] [14] M_B_CAS# SB_CAS# SB_MA[13]
[13] M_A_RAS# AD9 V5 M_A_A14 [14] M_B_RAS# AB8 R5 M_B_A14
AF9 SA_RAS# SA_MA[14] V7 M_A_A15 AB9 SB_RAS# SB_MA[14] R4 M_B_A15
[13] M_A_WE# SA_WE# SA_MA[15] [14] M_B_WE# SB_WE# SB_MA[15]
w
ACA-ZIF-069-K01 ACA-ZIF-069-K01
w
w
A A

A1A
Ivy Bridge 2/4
5 4 3 2 1
5 4 3 2 1
Ivy Bridge Processor (POWER) CPU Ivy Bridge Processor (GRAPHIC POWER) CPU/OEV/PIV 05
U1001F POWER U1001G
POWER
IVB:8.5A
R1044 PIV@100_4 +VAXG
IVB:55A
SENSE
LINES
AT24 AK35
+VAXG VAXG1 VAXG_SENSE VCC_AXG_SENSE [45]
+VCC_CORE AT23 AK34
+VTT VAXG2 VSSAXG_SENSE VSS_AXG_SENSE [45]
AT21
D AT20 VAXG3 R1042 PIV@100_4 D
+ C1044 AT18 VAXG4
AG35 *330U/2.5V_3528P_E9b AT17 VAXG5
AG34 VCC1 AH13 AR24 VAXG6
AG33 VCC2 VCCIO1 AH10 AR23 VAXG7
AG32 VCC3 VCCIO2 AG10 AR21 VAXG8
AG31 VCC4 VCCIO3 AC10 AR20 VAXG9
VCC5 VCCIO4 VAXG10
VREF
AG30 Y10 AR18
AG29 VCC6 VCCIO5 U10 AR17 VAXG11
AG28 VCC7 VCCIO6 P10 AP24 VAXG12 AL1 +VDDR_REF_CPU
VCC8 VCCIO7 VAXG13 SM_VREF +VDDR_REF_CPU
AG27 L10 AP23
AG26 VCC9 VCCIO8 J14 C1045 C1037 C1046 C1047 C1038 C1039 C1040 C1041 C1042 C1043 AP21 VAXG14
VCC10 VCCIO9 VAXG15 W=20mil ; S=20 mil; L<500mil
AF35 J13 10U/6.3V_6X *10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X *10U/6.3V_6X PIV@10U/6.3V_6X PIV@10U/6.3V_6X PIV@10U/6.3V_6X PIV@10U/6.3V_6X AP20
AF34 VCC11 VCCIO10 J12 AP18 VAXG16
m
AF33 VCC12 VCCIO11 J11 AP17 VAXG17
AF32 VCC13 VCCIO12 H14 AN24 VAXG18
AF29 VCC16 VCCIO15 G14 AN20 VAXG21
DDR3 -1.5V RAILS

PEG AND DDR

C1051 C1052 C1053 C1054 C1055 C1056 C1048 C1057
VCC19 VCCIO18 VAXG24
GRAPHICS
AF26 F14 *10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X *10U/6.3V_6X *10U/6.3V_6X 10U/6.3V_6X PIV@10U/6.3V_6X PIV@10U/6.3V_6X AM24 AF7
VCC20 VCCIO19 VAXG25 VDDQ1 +1.5V_CPU
AD35 F13 AM23 AF4
AD34 VCC21 VCCIO20 F12 AM21 VAXG26 VDDQ2 AF1
AD33 VCC22 VCCIO21 F11 AM20 VAXG27 VDDQ3 AC7 C1058 C1059 C1060 C1061
AD32 VCC23 VCCIO22 E14 AM18 VAXG28 VDDQ4 AC4 10U/6.3V_6X *10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X
VCC24 VCCIO23 VAXG29 VDDQ5
o
AD31 E12 AM17 AC1
C1063 C1064 C1065 C1066 C1067 C1068 AD30 VCC25 VCCIO24 AL24 VAXG30 VDDQ6 Y7
10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X AD29 VCC26 E11 AL23 VAXG31 VDDQ7 Y4
AD28 VCC27 VCCIO25 D14 AL21 VAXG32 VDDQ8 Y1
AD27 VCC28 VCCIO26 D13 C1080 AL20 VAXG33 VDDQ9 U7
AD26 VCC29 VCCIO27 D12 OEV@0_6 AL18 VAXG34 VDDQ10 U4 +
AC35 VCC30 VCCIO28 D11 AL17 VAXG35 VDDQ11 U1 C1075 C1076 C1079
AC34 VCC31 VCCIO29 C14 AK24 VAXG36 VDDQ12 P7 *10U/6.3V_6X 10U/6.3V_6X *330U/2V_7343P_E9c
AC33 VCC32 VCCIO30 C13 AK23 VAXG37 VDDQ13 P4
AC32 VCC33 VCCIO31 C12 AK21 VAXG38 VDDQ14 P1
.c
C VCC34 VCCIO32 VAXG39 VDDQ15 C
C1081 C1082 C1083 C1084 C1085 C1086 AC31 C11 AK20
10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X AC30 VCC35 VCCIO33 B14 AK18 VAXG40
AC29 VCC36 VCCIO34 B12 AK17 VAXG41
AC28 VCC37 VCCIO35 A14 AJ24 VAXG42
AA35 VCC40 VCCIO38 A11 AJ20 VAXG45
AA34 VCC41 VCCIO39 AJ18 VAXG46
AA33 VCC42 J23 AJ17 VAXG47
VCC43 VCCIO40 +VTT VAXG48
C1095 C1089 C1090 C1091 AA32 AH24
SA RAIL
10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X AA31 VCC44 AH23 VAXG49
AA30 VCC45 AH21 VAXG50 M27
VCC46 VAXG51 VCCSA1 +VCCSA
AA29 AH20 M26
AA28 VCC47 AH18 VAXG52 VCCSA2 L26
AA27 VCC48 AH17 VAXG53 VCCSA3 J26
x
C1092 C1093 C1094
AA26 VCC49 VAXG54 VCCSA4 J25 10U/6.3V_6X 10U/6.3V_6X *10U/6.3V_6X
Y35 VCC50 VCCSA5 J24
CORE SUPPLY
Y34 VCC51 VCCSA6 H26

Y33 VCC52 VCCSA7 H25
C1096 C1097 C1098 C1099 Y32 VCC53 VCCSA8
VCC54
1.8V RAIL
10U/6.3V_6X 10U/6.3V_6X 10U/6.3V_6X *10U/6.3V_6X Y31
Y30 VCC55
Y29 VCC56
fi
Y28 VCC57
Y27 VCC58 B6 H23
VCC59 +1.8V VCCPLL1 VCCSA_SENSE VCCSA_VCCSSENSE [44]
MISC
Y26 A6
V35 VCC60 A2 VCCPLL2
VCC61 VCCPLL3
SVID
V34 AJ29 H_CPU_SVIDALRT# +

C5587 C5586 C1104 C1105 V33 VCC62 VIDALERT# AJ30 H_CPU_SVIDCLK C1100 C1101 C1102 C1103 C22
VCC63 VIDSCLK FC_C22 VCCSA_VID0 [44]
39P/50V_4N 39P/50V_4N *10U/6.3V_6X *10U/6.3V_6X V32 AJ28 H_CPU_SVIDDAT *10U/6.3V_6X 1U/6.3V_4X 1U/6.3V_4X *330U/2V_7343P_E9c C24
VCC64 VIDSOUT VCCSA_VID1 VCCSA_VID1 [44]
V31
V30 VCC65
VCC66
E3A V29
V28 VCC67 ACA-ZIF-069-K01
V27 VCC68
a
V26 VCC69
B B
U35 VCC70
U34 VCC71
U33 VCC72
U32 VCC73
VCC74
C1087
*10U/6.3V_6X
C1088 C1073
*10U/6.3V_6X *10U/6.3V_6X
C1074
*10U/6.3V_6X
C1077
*10U/6.3V_6X
C1078
*10U/6.3V_6X
U31
U30 VCC75 E3A
U29 VCC76
U28 VCC77 H_CPU_SVIDCLK R1050 *SHORT_4
VCC78 VR_SVID_CLK [45]
in
U27
U26 VCC79
R35 VCC80 +VTT
R34 VCC81
R33 VCC82
R32 VCC83
R31 VCC84 R1057
R30 VCC85
VCC86
R29
R28 VCC87
130/F_4
E3A
SENSE LINES
R1051 100_4
VCC88 +VCC_CORE
R27 AJ35
VCC89 VCC_SENSE VCC_SENSE [45]
R26 AJ34 H_CPU_SVIDDAT R1060 *SHORT_4
VCC90 VSS_SENSE VSS_SENSE [45] VR_SVID_DATA [45]
P35 R1054 100_4
P34 VCC91
P33 VCC92 R1055 10_4 +VTT
+VTT
P32
P31
P30
P29
P28
P27
P26
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
VCCIO_SENSE
VSSIO_SENSE
B10
A10
h
R1059 10_4
VCCP_SENSE
VSSP_SENSE
[43]
[43]
H_CPU_SVIDALRT# R1062 43_4

R1061
75/F_4
VR_SVID_ALERT# [45]
.c
A A
ACA-ZIF-069-K01

w

A1A
Ivy Bridge 3/4
5 4 3 2 1
w
w
5 4 3 2 1
Ivy Bridge Processor (GND) CPU

U1001H U1001I
Ivy Bridge Processor (RESERVED, CFG) CPU
06
AT35 AJ22
AT32 VSS1 VSS81 AJ19
AT29 VSS2 VSS82 AJ16 T35 F22
AT27 VSS3 VSS83 AJ13 T34 VSS161 VSS234 F19 U1001E
AT25 VSS4 VSS84 AJ10 T33 VSS162 VSS235 E30
AT22 VSS5 VSS85 AJ7 T32 VSS163 VSS236 E27
AT19 VSS6 VSS86 AJ4 T31 VSS164 VSS237 E24 L7
AT16 VSS7 VSS87 AJ3 T30 VSS165 VSS238 E21 RSVD28 AG7
D AT13 VSS8 VSS88 AJ2 T29 VSS166 VSS239 E18 CFG0 AK28 RSVD29 AE7 D
VSS9 VSS89 VSS167 VSS240 TP15 CFG[0] RSVD30
AT10 AJ1 T28 E15 CFG1 AK29 AK2
VSS10 VSS90 VSS168 VSS241 TP16 CFG[1] RSVD31
AT7 AH35 T27 E13 CFG2 AL26 W8
AT4 VSS11 VSS91 AH34 T26 VSS169 VSS242 E10 CFG3 AL27 CFG[2] RSVD32
VSS12 VSS92 VSS170 VSS243 TP17 CFG[3]
AT3 AH32 P9 E9 CFG4 AK26
AR25 VSS13 VSS93 AH30 P8 VSS171 VSS244 E8 CFG5 AL29 CFG[4] AT26
AR22 VSS14 VSS94 AH29 P6 VSS172 VSS245 E7 CFG6 AL30 CFG[5] RSVD33 AM33
VSS15 VSS95 VSS173 VSS246 CFG[6] RSVD34
m
AR19 AH28 P5 E6 CFG7 AM31 AJ27
AR16 VSS16 VSS96 AH26 P3 VSS174 VSS247 E5 AM32 CFG[7] RSVD35
AR13 VSS17 VSS97 AH25 P2 VSS175 VSS248 E4 AM30 CFG[8]
AR10 VSS18 VSS98 AH22 N35 VSS176 VSS249 E3 AM28 CFG[9]
AR7 VSS19 VSS99 AH19 N34 VSS177 VSS250 E2 AM26 CFG[10]
AR4 VSS20 VSS100 AH16 N33 VSS178 VSS251 E1 AN28 CFG[11]
AR2 VSS21 VSS101 AH7 N32 VSS179 VSS252 D35 AN31 CFG[12] T8
AP34 VSS22 VSS102 AH4 N31 VSS180 VSS253 D32 AN26 CFG[13] RSVD37 J16
AP31 VSS23 VSS103 AG9 N30 VSS181 VSS254 D29 AM27 CFG[14] RSVD38 H16
AP28 VSS24 VSS104 AG8 N29 VSS182 VSS255 D26 AK31 CFG[15] RSVD39 G16
AP25 VSS25 VSS105 AG4 N28 VSS183 VSS256 D20 AN29 CFG[16] RSVD40
o
AP22 VSS26 VSS106 AF6 N27 VSS184 VSS257 D17 CFG[17]
AP19 VSS27 VSS107 AF5 N26 VSS185 VSS258 C34
AP16 VSS28 VSS108 AF3 M34 VSS186 VSS259 C31
AP13 VSS29 VSS109 AF2 L33 VSS187 VSS260 C28 AR35
AP10 VSS30 VSS110 AE35 L30 VSS188 VSS261 C27 AJ31 RSVD41 AT34
AP7 VSS31 VSS111 AE34 L27 VSS189 VSS262 C25 AH31 VAXG_VAL_SENSE RSVD42 AT33
AP4 VSS32 VSS112 AE33 L9 VSS190 VSS263 C23 AJ33 VSSAXG_VAL_SENSE RSVD43 AP35
VSS33 VSS113 VSS191 VSS264 VCC_VAL_SENSE RSVD44
.c
AP1 AE32 L8 C10 AH33 AR34
AN30 VSS34 VSS114 AE31 L6 VSS192 VSS265 C1 VSS_VAL_SENSE RSVD45
AN27 VSS35 VSS115 AE30 L5 VSS193 VSS266 B22
VSS36 VSS116 VSS194 VSS267
VSS VSS
AN25 AE29 L4 B19 AJ26
VSS37 VSS117 VSS195 VSS268 RSVD5
RESERVED
AN22 AE28 L3 B17
AN19 VSS38 VSS118 AE27 L2 VSS196 VSS269 B15
AN16 VSS39 VSS119 AE26 L1 VSS197 VSS270 B13 B34
AN13 VSS40 VSS120 AE9 K35 VSS198 VSS271 B11 SMDDR_VREF_DQ0_M3_R B4 RSVD46 A33
AN10 VSS41 VSS121 AD7 K32 VSS199 VSS272 B9 SMDDR_VREF_DQ1_M3_R D1 RSVD6 RSVD47 A34
AN7 VSS42 VSS122 AC9 K29 VSS200 VSS273 B8 RSVD7 RSVD48 B35
AN4 VSS43 VSS123 AC8 K26 VSS201 VSS274 B7 RSVD49 C35
AM29 VSS44 VSS124 AC6 J34 VSS202 VSS275 B5 RSVD50
AM25 VSS45 VSS125 AC5 J31 VSS203 VSS276 B3 F25
x
AM22 VSS46 VSS126 AC3 H33 VSS204 VSS277 B2 F24 RSVD8
C C
AM19 VSS47 VSS127 AC2 H30 VSS205 VSS278 A35 F23 RSVD9
AM16 VSS48 VSS128 AB35 H27 VSS206 VSS279 A32 D24 RSVD10 AJ32
AM13 VSS49 VSS129 AB34 H24 VSS207 VSS280 A29 G25 RSVD11 RSVD51 AK32
AM10 VSS50 VSS130 AB33 H21 VSS208 VSS281 A26 G24 RSVD12 RSVD52
AM7 VSS51 VSS131 AB32 H18 VSS209 VSS282 A23 E23 RSVD13
AM4 VSS52 VSS132 AB31 H15 VSS210 VSS283 A20 D23 RSVD14
fi
AM3 VSS53 VSS133 AB30 H13 VSS211 VSS284 A3 C30 RSVD15 AH27
AM2 VSS54 VSS134 AB29 H10 VSS212 VSS285 A31 RSVD16 VCC_DIE_SENSE
AM1 VSS55 VSS135 AB28 H9 VSS213 B30 RSVD17
AL34 VSS56 VSS136 AB27 H8 VSS214 +3V B29 RSVD18
AL31 VSS57 VSS137 AB26 H7 VSS215 D30 RSVD19 AN35 CLK_XDP_ITPP TP18
AL28 VSS58 VSS138 Y9 H6 VSS216 B31 RSVD20 RSVD54 AM35 CLK_XDP_ITPN TP19
AL25 VSS59 VSS139 Y8 H5 VSS217 A30 RSVD21 RSVD55
AL22 VSS60 VSS140 Y6 H4 VSS218 R1065 C29 RSVD22
AL19 VSS61 VSS141 Y5 H3 VSS219 RSVD23
AL16 VSS62 VSS142 Y3 H2 VSS220 *10K_4
a
AL13 VSS63 VSS143 Y2 H1 VSS221 J20
AL10 VSS64 VSS144 W35 G35 VSS222 B18 RSVD24 AT2
AL7 VSS65 VSS145 W34 G32 VSS223 A19 RSVD25 RSVD56 AT1
AL4 VSS66 VSS146 W33 G29 VSS224 VCCIO_SEL RSVD57 AR1
AL2 VSS67 VSS147 W32 G26 VSS225 RSVD58
AK33 VSS68 VSS148 W31 G23 VSS226 J15
AK30 VSS69 VSS149 W30 G20 VSS227 RSVD27
VSS70 VSS150 VSS228
in
AK27 W29 G17
AK25 VSS71 VSS151 W28 G11 VSS229 B1
AK22 VSS72 VSS152 W27 F34 VSS230 KEY
AK19 VSS73 VSS153 W26 F31 VSS231
AK16 VSS74 VSS154 U9 F29 VSS232
AK13 VSS75 VSS155 U8 VSS233
AK10 VSS76 VSS156 U6
AK7 VSS77 VSS157 U5
AK4 VSS78 VSS158 U3 ACA-ZIF-069-K01
AJ25 VSS79 VSS159 U2
VSS80 VSS160
B
ACA-ZIF-069-K01 ACA-ZIF-069-K01
h B
.c
Processor Strapping CPU/VGA DDR3 VREF DQ (M3) S3P
R145 0_4
The CFG signals have a default value of '1' if not terminated on the board.
E3A
SMDDR_VREF_DQ0_M3_R 1 3 SMDDR_VREF_DQ0_M3 [13]
Q8
R1064 *S3@ME2N7002E_200MA
Pin Name Configuration
w
2
*1K_4
CFG2 1=Normal Operation
(PEG Static Lane Reversal --> 16 Lane) CFG2 R118 EV@1K_4
E3C E3A
0=Lane Reversed
[9,26] DRAMRST_CNTRL_PCH
CFG3
w
(Reserved)
R146 0_4
CFG4 1=Disable; No physical DP attached to eDP CFG4 R117 *1K_4

E3A
(DP Presence Strap) 0=Enable; An ext DP device is connected to eDP SMDDR_VREF_DQ1_M3_R 1 3
SMDDR_VREF_DQ1_M3 [14]
w
Q9
R1063 *S3@ME2N7002E_200MA
2
A A
CFG5 00=x8,x4,x4 - Device 1 function 1 and 2 enable CFG5 R104 *1K_4 *1K_4
CFG6 01=Reserved - (Device 1 function 1 disable ; function 2 enable)
(PCIE Bifurction) 10=x8,x8 -Device 1 function 1 enable ; function 2 enable CFG6 R116 *1K_4
E3C E3A
11=(Default) x16 -Device 1 function 1 and 2 disable
[9,26] DRAMRST_CNTRL_PCH
CFG7 1=PEG train immediately following xxRESETB de assertion

CFG7 R115 *1K_4
(PEG Defer Training) 0=PEG wait for BIOS training Quanta Computer Inc.
A1A
Ivy Bridge 4/4
5 4 3 2 1
5 4 3 2 1
Cougar Point (DMI,FDI,PM) CLG

U2000C
[16,37] LVDS_BKLT
R5365 PIV@0_4
Cougar Point (LVDS,DDI) CLG/CRU/LDU
U2000D
07
LVDS_BKLT_PCH J47 AP43
BC24 BJ14 LVDS_DIGON M45 L_BKLTEN SDVO_TVCLKINN AP45
[3] DMI_RXN0 DMI0RXN FDI_RXN0 FDI_TXN0 [3] [28] LVDS_DIGON L_VDD_EN SDVO_TVCLKINP
[3] DMI_RXN1 BE20 AY14
DMI1RXN FDI_RXN1 FDI_TXN1 [3]
[3] DMI_RXN2 BG18 BE14 P45 AM42
DMI2RXN FDI_RXN2 FDI_TXN2 [3] [28] LVDS_PWM L_BKLTCTL SDVO_STALLN
[3] DMI_RXN3
BG20 BH13 AM40
D DMI3RXN FDI_RXN3 FDI_TXN3 [3] SDVO_STALLP D
BC12 T40
FDI_RXN4 FDI_TXN4 [3] [28] INT_LVDS_EDIDCLK L_DDC_CLK
[3] DMI_RXP0 BE24 BJ12 K47 AP39
DMI0RXP FDI_RXN5 FDI_TXN5 [3] [28] INT_LVDS_EDIDDATA L_DDC_DATA SDVO_INTN
[3] DMI_RXP1 BC20 BG10 AP40
DMI1RXP FDI_RXN6 FDI_TXN6 [3] SDVO_INTP
[3] DMI_RXP2 BJ18 BG9 +3V R2001 PIV@2.2K_4 L_CTRL_CLK T45
DMI2RXP FDI_RXN7 FDI_TXN7 [3] L_CTRL_CLK
[3] DMI_RXP3 BJ20 R2002 PIV@2.2K_4 L_CTRL_DATA P39
DMI3RXP BG14 L_CTRL_DATA
FDI_RXP0 FDI_TXP0 [3]
[3] DMI_TXN0 AW24 BB14 R2003 PIV@2.37K/F_4 LVD_IBG AF37 P38
DMI0TXN FDI_RXP1 FDI_TXP1 [3] LVD_IBG SDVO_CTRLCLK HDMI_DDCCLK [27]
[3] DMI_TXN1
AW20 BF14 T2001
AF36 M39
DMI1TXN FDI_RXP2 FDI_TXP2 [3] LVD_VBG SDVO_CTRLDATA HDMI_DDCDATA [27]
m
[3] DMI_TXN2
BB18 BG13
DMI2TXN FDI_RXP3 FDI_TXP3 [3]
[3] DMI_TXN3
AV18 BE12 AE48
DMI
FDI
DMI3TXN FDI_RXP4 FDI_TXP4 [3] LVD_VREFH
BG12 AE47 AT49
FDI_RXP5 FDI_TXP5 [3] LVD_VREFL DDPB_AUXN
[3] DMI_TXP0
AY24 BJ10 AT47
DMI0TXP FDI_RXP6 FDI_TXP6 [3] DDPB_AUXP
[3] DMI_TXP1
AY20 BH9 AT40
DMI1TXP FDI_RXP7 FDI_TXP7 [3] DDPB_HPD HDMI_CON_HP_PCH [27]
[3] DMI_TXP2 AY18 AK39
LVDS
DMI2TXP [28] INT_TXLCLKOUT- LVDSA_CLK#
[3] DMI_TXP3
AU18 AK40 AV42
DMI3TXP [28] INT_TXLCLKOUT+ LVDSA_CLK DDPB_0N INT_HDMITX2N [27]
AW16 AV40
FDI_INT FDI_INT [3] DDPB_0P INT_HDMITX2P [27]
AN48 AV45
[28] INT_TXLOUT0- LVDSA_DATA#0 DDPB_1N INT_HDMITX1N [27]
BJ24 AV12 AM47 AV46
FDI_FSYNC0 [3] [28] INT_TXLOUT1- INT_HDMITX1P [27]
Digital Display Interface

DMI_ZCOMP FDI_FSYNC0 LVDSA_DATA#1 DDPB_1P
o
AK47 AU48
[28] INT_TXLOUT2- LVDSA_DATA#2 DDPB_2N INT_HDMITX0N [27]
+1.05V R2000 49.9/F_4 DMI_COMP BG25 BC10 AJ48 AU47
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 [3] LVDSA_DATA#3 DDPB_2P INT_HDMITX0P [27]
AV47
DDPB_3N INT_HDMICLK- [27]
R2004 750/F_4 DMI2RBIAS BH21 AV14 AN47 AV49
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 [3] [28] INT_TXLOUT0+ LVDSA_DATA0 DDPB_3P INT_HDMICLK+ [27]
AM49
[28] INT_TXLOUT1+ LVDSA_DATA1
BB10 AK49
FDI_LSYNC1 FDI_LSYNC1 [3] [28] INT_TXLOUT2+ LVDSA_DATA2
AJ47 P46
LVDSA_DATA3 DDPC_CTRLCLK P42
.c
DDPC_CTRLDATA
A18 DSWVREN [8]
AF40
DSWVRMEN AF39 LVDSB_CLK# AP47
LVDSB_CLK DDPC_AUXN AP49
System Power Management

SUSACK#_R C12 E22 DPWROK_R AH45 DDPC_AUXP AT38
SUSACK# DPWROK AH47 LVDSB_DATA#0 DDPC_HPD
AF49 LVDSB_DATA#1 AY47
C
XDP_DBRST# K3 B9 PCIE_WAKE# AF45 LVDSB_DATA#2 DDPC_0N AY49 C
[3] XDP_DBRST# SYS_RESET# WAKE# PCIE_WAKE# [29,30,35] LVDSB_DATA#3 DDPC_0P AY43
AH43 DDPC_1N AY45
LVDSB_DATA0 DDPC_1P
E3A SYS_PWROK_R P12
SYS_PWROK +3V CLKRUN# / GPIO32 N3 CLKRUN# CLKRUN# [37]
AH49
LVDSB_DATA1 DDPC_2N
BA47
AF47 BA48
x
AF43 LVDSB_DATA2 DDPC_2P BB47
LVDSB_DATA3 DDPC_3N
MPWROK R2005 *SHORT_4 EC_PWROK_R L22
PWROK +3V_S5 SUS_STAT# / GPIO61
G8 T2000 DDPC_3P
BB49 1 -- LVDS
ENABLE
L_DDC_DATA
L10
APWROK +3V_S5 SUSCLK / GPIO62
N14 SUSCLK [37] [28] INT_CRT_BLU
N48
CRT_BLUE DDPD_CTRLCLK
M43
[28] INT_CRT_GRN
P49
CRT_GREEN DDPD_CTRLDATA
M36 0 -- LVDS DISABLE
T49
fi
[28] INT_CRT_RED CRT_RED
[26] PM_DRAM_PWRGD PM_DRAM_PWRGD B13
DRAMPWROK +3V_S5 SLP_S5# / GPIO63
D10 T2002
AT45
CRT
DDPD_AUXN
[28] INT_CRT_DDCCLK
T39
CRT_DDC_CLK DDPD_AUXP
AT43 1 -- PORT B
RSMRST# C21 H4 M40 BH41
[37] RSMRST# RSMRST# SLP_S4# SUSC# [37] [28] INT_CRT_DDCDAT CRT_DDC_DATA DDPD_HPD Detected
SDVO_CTRLDATA
BB43
DDPD_0N
SUS_PWR_ACK_R K16 +3V_S5 SLP_S3#
SUSWARN#/SUSPWRDNACK/GPIO30
F4 SUSB# [37] [28] INT_HSYNC
R2006 ICRT@33_4 CRT_HSYNC_R M47
CRT_HSYNC DDPD_0P
BB45 0 -- PORT
R2007 ICRT@33_4 CRT_VSYNC_R M49 BF44
[28] INT_VSYNC CRT_VSYNC DDPD_1N BE44 B Disable
a
E20 G10 DDPD_1P BF42
[37] DNBSWON# PWRBTN# SLP_A# T2003 DDPD_2N
CRT IMPEDANCE MATCHING
DAC_IREF T43 BE42
T42 DAC_IREF DDPD_2P BJ42
CRT_IRTN DDPD_3N
AC_PRESENT_R H20
ACPRESENT / GPIO31 DSW SLP_SUS#
G16 SLP_SUS#_R R2008
DDPD_3P
BG42
CRU
1K/D_4 CougarPoint_R1P0
BATLOW# / GPIO72 +3V_S5
PM_BATLOW# E10 AP14 PM_SYNC [3]
PMSYNCH
in
PM_RI# A10
RI# +3V_S5 SLP_LAN# / GPIO29
K14 GPIO29
R2009 ICRT@150/F_4 INT_CRT_BLU

B CougarPoint_R1P0 B
R2010 ICRT@150/F_4 INT_CRT_GRN
R2011 ICRT@150/F_4 INT_CRT_RED
PCH
Pull-high/low
CLG/PIV/S3P
+3V
System
PWR_OK
CLG h Deep Sx CLG
.c
R2012 10K_4 Ra +3V_S5
CLKRUN# R2015 8.2K_4
XDP_DBRST# R2018 1K_4

E3A R2014 *10K_4 Rb
+3V_DSW Net Name Deep Sx Support Deep Sx No Support
AC_PRESENT_R R2017 *0_4 Rc
+3V_S5 AC_PRESENT [37]
R2021 *SHORT_4 AC_PRESENT Rb,Rc stuff Ra stuff
PM_RI# R2013 10K_4 +3V_S5

SUS_PWR_ACK Rd stuff Re stuff
PM_BATLOW# R2016 8.2K_4 R2022 *0_4 Rd SUSACK#_R
DPWROK Rg stuff Rf stuff
w
PCIE_WAKE# R2019 10K_4 SUS_PWR_ACK_R R2024 0_4 Re SUS_PWR_ACK [37]

C2009
GPIO29 R2020 10K_4 *0.1U/10V_4X SLP_SUS Rh stuff Rh No stuff
SUS_PWR_ACK R2023 10K_4
5
A PM_DRAM_PWRGD R2025 S3@200/F_4 2 R2026 0_4 Rf RSMRST# A

DELAY_VR_PWRGOOD [3,45]
[26] SYS_PWROK_R SYS_PWROK_R 4
1 DPWROK_R R2027 *0_4
w
MPWROK MPWROK [37,45] Rg SYS_HWPG [37,41]

U2001 *TC7SH08FU(F)
3
RSMRST# R2028 10K_4 C5573 C5580 C5583

0.1U/10V_4X 0.1U/10V_4X 39P/50V_4N
SYS_PWROK_R R2030 100K_4
SLP_SUS#_R R2031 *0_4 Rh SLP_SUS# [37] Quanta Computer Inc.
LVDS_BKLT_PCH R2032 *PIV@100K_4
C3A E3A
w

A1A
Cougar Point 1/6
5 4 3 2 1
5 4 3 2 1
RTC RTC
Cougar Point (HDA,JTAG,SATA)
Circuitry
B2A +3V_RTC
Trace = 30mils for power C2010 15P/50V_4C C3A
CLG/GCK
08
2
1
D2002 *RB500V-40_100MA R2035 20K_6 RTC_RST# U2000A
+3VPCU
Y2000 R2036
D14 C2012 G2000 32.768KHZ_10 10M_4 RTC_X1 A20 C38
RTCX1 FWH0 / LAD0 A38 LAD0 [29,37]
LAD1 [29,37]
LPC
3
4
RTC_X2 C20 FWH1 / LAD1 B37
1U/6.3V_4X C2013 12P/50V_4C LAD2 [29,37]
RTCX2 FWH2 / LAD2 C37
*SHORT PAD
FWH3 / LAD3 LAD3 [29,37]
BAT54C-7-F_200MA
B2A C3A RTC_RST# D20
RTCRST# D36
FWH4 / LFRAME# LFRAME# [29,37]
SRTC_RST# G22
R_3VRTC SRTC_RST# SRTCRST# E36 PCH_DRQ#0
D2003 *RB500V-40_100MA R2042 20K_6 TP2003
RTC
LDRQ0#
+3V_RTC R2041 1M_4 SM_INTRUDER# K22
INTRUDER# +3VLDRQ1# / GPIO23 K36
TP2031
R218 C2011 C2014 G2002
D PCH_INVRMEN C17 V5 SERIRQ D
INTVRMEN SERIRQ SERIRQ [37]
1K_4 C3A 1U/6.3V_4X 1U/6.3V_4X
*SHORT PAD
AM3
N34 SATA0RXN AM1 SATA_RXN_1ST_HDD# [33]
ACZ_BITCLK_R
HDA_BCLK SATA0RXP SATA_RXP_1ST_HDD [33]
SATA 6G
R_3VRTC_R SATA0TXN
AP7
SATA_TXN_1ST_HDD# [33] SATA HDD/SSD
ACZ_SYNC_R L34 AP5
HDA_SYNC SATA0TXP SATA_TXP_1ST_HDD [33]
PCBEEP T10 AM10
[34] PCBEEP
1
SPKR SATA1RXN AM8

SATA1RXP
m
CN2000 ACZ_RST#_R K34 AP11
HDA_RST# SATA1TXN AP10
SATA1TXP
ACZ_SDIN0_AUDIO E34 AD7
HDA_SDIN0 SATA2RXN AD5
50273-0027N-001
G34 SATA2RXP AH5
2
HDA_SDIN1 SATA2TXN AH4

C34 SATA2TXP
IHDA
HDA_SDIN2 AB8
A34 SATA3RXN AB10
HDA_SDIN3 SATA3RXP
PU & Password Clear CLG
AF3
SATA3TXN AF1
SATA3TXP
o
ACZ_SDOUT_R A36
SATA
HDA_SDO Y7
+3V SATA4RXN Y5 SATA_RXN_ODD# [33]
SATA4RXP SATA_RXP_ODD [33]
HDA_DOCK_EN# / GPIO33+3V SATA ODD
C36 AD3
+3V TP2026 SATA4TXN AD1 SATA_TXN_ODD# [33]
GPIO21 R2040 10K_4
N32 SATA4TXP SATA_TXP_ODD [33]
TP2025 +3V_S5
HDA_DOCK_RST# / GPIO13 Y3
G2001
SERIRQ R2037 8.2K_4 SATA5RXN Y1
SATA5RXP AB3
*SHORT PAD
.c
GPIO19 R2039 10K_4 PCH_JTAG_TCK J3 SATA5TXN AB1
JTAG_TCK SATA5TXP
PCH_JTAG_TMS H7 Y11
JTAG
JTAG_TMS SATAICOMPO
PCH_JTAG_TDI K5 Y10 SATA_COMP R2049 37.4/F_4
JTAG_TDI SATAICOMPI +1.05V
PCH_JTAG_TDO H1
TP2009 JTAG_TDO
HDA Bus CLG
AB12
SATA3RCOMPO
C +5V AB13 SATA3_COMP R2050 49.9/F_4 C
SATA3COMPI
R2046 PCH_SPI_CLK_R2R R2221 33_4 PCH_SPI_CLK_R2 T3 AH1 SATA3_RBIAS R2052 750/F_4

ACZ_BITCLK_R SPI_CLK SATA3RBIAS
R2051 33_4
[34] BIT_CLK_AUDIO
x
*33K/F_4 PCH_SPI_CS0#_R2R R2229 33_4 PCH_SPI_CS0#_R2 Y14
SPI_CS0#
C5569 *0.1U/16V_4Y
B2A PCH_SPI_CS1#_R2 T1
SPI
SPI_CS1# P3
C2015 R2055 10K_4
SATALED# +3V
R2053 33_4 ACZ_SYNC_R1
[34] ACZ_SYNC_AUDIO
2
*33P/50V_4N PCH_SPI_SI_R2R R2227 33_4 PCH_SPI_SI_R2 V4

SPI_MOSI +3V SATA0GP / GPIO21 V14 GPIO21
R2054 33_4 ACZ_RST#_R
[34] ACZ_RST#_AUDIO
R2056 33_4 ACZ_SDOUT_R
ACZ_SYNC_R1 1 3 ACZ_SYNC_R
B2A PCH_SPI_SO_RR R2244 33_4 PCH_SPI_SO_R U3
SPI_MISO +3V SATA1GP / GPIO19 P1 GPIO19
fi
[34] ACZ_SDOUT_AUDIO
Q2001
ACZ_SDIN0_AUDIO *2N7002K_300MA CougarPoint_R1P0
[34] ACZ_SDIN0_AUDIO
R2047
R2048 *SHORT_4 E3A PCH Strap Table
*1M_4
Pin Name Strap description Sampled Configuration

PCH JTAG Debug DEG
+3V_S5
0 = Default (weak pull-down 20K)
SPKR No reboot mode setting PWROK R2057 *1K_4 PCBEEP
1 = Setting to No-Reboot mode +3V
B2A
a
0 = "top-block swap" mode
GNT3# / GPIO55 Top-Block Swap Override PWROK 1 = Default (weak pull-up 20K)
R2058 *1K_4
PCI_GNT3# [9]
R2059 R2060
*210/F_4 *210/F_4
PCH_JTAG_TMS INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up R2061 330K_4 PCH_INVRMEN
+3V_RTC
PCH_JTAG_TDI
PCH_JTAG_TCK
in
GNT1# / GPIO51 Boot BIOS Selection 1 [bit-1] PWROK
GNT1# GPIO19 Boot Location
R2062 R2063 R2064
*51_4 *100/F_4 *100/F_4 1 1 SPI * R2065 *1K_4
GNT1# [9]
B GPIO19 B
GPIO19 Boot BIOS Selection 0 [bit-0] PWROK 0 0 LPC R2066 *1K_4
B2A
0 = Override
HDA_SDO Flash Descriptor Security RSMRST R2067 *1K_4 ACZ_SDOUT_R
1 = Default (weak pull-up 20K) +3V_S5 ACZ_SDOUT_R [37]
PCH Dual SPI CLG 0 = Set to Vss R2068 2.2K_4 +1.8V
B2A
U2002
+3V_S5
h DF_TVS
GPIO28
HDA_SYNC
DMI/FDI Termination voltage
On-die PLL Voltage Regulator
On-Die PLL VR Voltage Select

PWROK
RSMRST#
RSMRST
1 = Set to Vcc (weak pull-down 20K)
0 = Disable
1 = Enable (Default)
0 = Support by 1.8V (weak pull-down)

1= Support by 1.5V
+3V_S5
+3V_S5
R2069
R2070
R2071
R2072
*10K_4
*1K_4
1K_4
1K_4
DF_TVS [10]
H_SNB_IVB# [3]
PLL_ODVR_EN
ACZ_SYNC_R
[10]
.c
R2228 33_4 PCH_SPI_CS0#_R2R 1 8
[37] PCH_SPI_CS0# CE# VDD
R2220 33_4 PCH_SPI_CLK_R2R 6
[37] PCH_SPI_CLK SCK
R2224 33_4 PCH_SPI_SI_R2R 5
[37] PCH_SPI_SO 2 SI 7
R2238 33_4 PCH_SPI_SO_RR SPI_HOLD# R2073 3.3K/F_4 INIT3_3V# Reserved PWROK 1 = Default (weak pull-up 20K) Should not pull low. leave as No Connect
[37] PCH_SPI_SI SO HOLD#
C2017 3 4
WP# VSS
GNT2#/ 1 = Default. Should not be pulled low
*22P/50V_4N W25Q32BVSSIG
GPIO53 ESI Strap (Server Only) PWROK for desktop and mobile Should not pull low for desktop and mobile
C2018
0 = Default. TLS no Confidentiality
R2075 3.3K/F_4 SPI_WP# 0.1U/16V_4Y GPIO15 TLS Confidentiality RSMRST R2074 1K_4
+3V_S5 1 = TLS Confidentiality +3V_S5 GPIO15 [10]
w
LVDS Detected 0 = Default. Not Detected 1= PU to 3V

L_DDC_DATA PWROK 1 = Detected
B2A +3V_S5 Port B Detected 0 = Default. Not Detected 1= PU to 3V
1
U2005
8
SDVO_CTRLDATA PWROK 1 = Detected
PCH_SPI_CS1#_R2 R2245 *33_4 PCH_SPI_CS1#_R2RR
PCH_SPI_CLK_R2 R2231 *33_4 PCH_SPI_CLK_R2R_R 6 CE# VDD
PCH_SPI_SI_R2 PCH_SPI_SI_R2R_R 5 SCK
A
R2222 *33_4
SI Port C Detected 0 = Default. Not Detected 0=NC A
PCH_SPI_SO_R R2223 *33_4 PCH_SPI_SO_R1_R 2 7 SPI_HOLD# DDPC_CTRLDATA PWROK
SO HOLD# 1 = Detected
w
C2023 3 4
WP# VSS
Port D Detected 0 = Default. Not Detected 0=NC
*22P/50V_4N *W25Q16BVSSIG DDPD_CTRLDATA PWROK 1 = Detected
C2020
SATA3GP/ Reserved
SPI_WP# *0.1U/16V_4Y PWROK 0 = Default Should not be pulled high when strap is sampled
GPIO37
SATA2GP/ Reserved
PWROK 0 = Default Should not be pulled high when strap is sampled Quanta Computer Inc.
w
GPIO36
Deep S4/S5 Well On -Die 0 = Disable

DSWVREN [7]
DSWVRMEN Voltage Regulator Enable ALWAYS 1 = Enable
Size Docum ent Num ber Rev
+3V_RTC R2076 330K_4 R2077 *330K_4 Cougar Point 2/6 A1A
Date: Wednes day, February 01, 2012 Sheet 8 of 48

5 4 3 2 1
5 4 3 2 1
Cougar Point-M (PCI,USB,NVRAM) CLG/DEG

Cougar Point-M (PCI-E,SMBUS,CLK)CLG/GCK/MNG/U3C
C3A U2000B
09
BG34
[29] PCIE_RXN_3G# PERN1
U2000E
[29] PCIE_RXP_3G
BJ34
PERP1 +3V_S5 SMBALERT# / GPIO11
E12 SMBALERT#
AY7 3G C2025 3G@0.1U/10V_4X PCIE_TXN_3G#_C AV32
RSVD1 [29] PCIE_TXN_3G# PETN1
AV7 C2019 3G@0.1U/10V_4X PCIE_TXP_3G_C AU32 H14 SCLK DDR / PCIE Mini Card/LAN
RSVD2 [29] PCIE_TXP_3G PETP1 SMBCLK SCLK [13,29,35]
BG26 AU3
BJ26 TP1 RSVD3 BG4 BE34 C9 SDATA
TP2 RSVD4 [30] PCIE_RXN_USB30# PERN2 SMBDATA SDATA [13,29,35]
BH25 USB3.0 BF34
TP3 [30] PCIE_RXP_USB30 PERP2
BJ16 AT10 C2021 U3C@0.1U/10V_4X PCIE_TXN_USB30#_C BB32
TP4 RSVD5 [30] PCIE_TXN_USB30# PETN2
BG16 BC8 Cougar Point HM65 C2022 U3C@0.1U/10V_4X PCIE_TXP_USB30_C AY32
TP5 RSVD6 [30] PCIE_TXP_USB30 PETP2
SMBUS
AH38
TP6 Pather Point HM75 +3V_S5 SML0ALERT# / GPIO60 A12 DRAMRST_CNTRL_PCH
DRAMRST_CNTRL_PCH [6,26]
AH37 AU2 BG36
D TP7 RSVD7 [29] PCIE_RXN_WLAN# PERN3 D
AK43 AT4 BJ36 C8 SMB_ME0_CLK
AK45 TP8 RSVD8 AT3 [29] PCIE_RXP_WLAN PERP3 SML0CLK
WLAN C2027 0.1U/10V_4X PCIE_TXN_WLAN#_C AV34
TP9 RSVD9 [29] PCIE_TXN_WLAN# PETN3
C18 AT1 C2028 0.1U/10V_4X PCIE_TXP_WLAN_C AU34 G12 SMB_ME0_DAT
TP10 RSVD10 [29] PCIE_TXP_WLAN PETP3 SML0DATA
N30 AY3
H3 TP11 RSVD11 AT5 BF36
AH12 TP12 RSVD12 AV3 [35] PCIE_RXN_LAN# BE36 PERN4
TP13 RSVD13 [35] PCIE_RXP_LAN PERP4
AM4
AM5 TP14 RSVD14
AV1
BB1
LAN [35] PCIE_TXN_LAN# C2029 0.1U/10V_4X PCIE_TXN_LAN#_C AY34
BB34 PETN4 +3V_S5 SML1ALERT# / PCHHOT# / GPIO74
C13 SML1ALERT#_R
C2030 0.1U/10V_4X PCIE_TXP_LAN_C
TP15 RSVD15 [35] PCIE_TXP_LAN PETP4
Y13
TP16 RSVD16
BA3 +3V_S5 SML1CLK / GPIO58
E14 SMB_ME1_CLK PCH Temp
PCI-E*
K24 BB5 BG37
TP17 RSVD17 PERN5
m
L24
TP18 RSVD18
BB3 BH37
PERP5 +3V_S5 SML1DATA / GPIO75 M16 SMB_ME1_DAT
AB46 BB7 AY36
TP19 RSVD19 PETN5
AB45 BE8
C3A BB36
RSVD
TP20 RSVD20 BD4 PETP5
RSVD21 BF6 BJ38
RSVD22 BG38 PERN6
PERP6
Controller
B21 AV5 NV_ALE Reserve for INTEL LAN AU36 M7
M20 TP21 RSVD23 AV10 TP2010 AV36 PETN6 CL_CLK1
AY16 TP22 RSVD24 PETP6
Pather Point HM76
Link
BG46 TP23 AT8 BG40 T11
TP24 RSVD25 BJ40 PERN7 CL_DATA1
AY5 AY40 PERP7
(R1) RSVD26 PETN7
o
BE28 RSVD27
BA2
C3A BB40
PETP7 CL_RST1#
P10
[31] USB30_RXN1_R BC30 TP25 AT12 BE38
[32] USB30_RXN3_L1 BE32 TP26 RSVD28 BF3 BC38 PERN8
BJ32 TP27 RSVD29 AW38 PERP8
(L1) TP28 PETN8
BC28 AY38
[31] USB30_RXP1_R BE30 TP29 PETP8
[32] USB30_RXP3_L1 TP30
USB30 Combo Port

BF32
TP31 +3V_S5PEG_A_CLKRQ# / GPIO47 M10 CLK_PEGA_REQ#
BG32 C24 (R1) Y40
USBP0- [31] [35] CLK_PCIE_LAN#
.c
AV26 TP32 USBP0N A24 Y39 CLKOUT_PCIE0N
[31] USB30_TXN1_R TP33 USBP0P USBP0+ [31] LAN [35] CLK_PCIE_LAN CLKOUT_PCIE0P
BB26 C25 AB37
[32] USB30_TXN3_L1 TP34 USBP1N USBP2- [32] (L1) CLKOUT_PEG_A_N CLK_PCIE_VGAN [15]
CLOCKS
PCIECLKRQ0# / GPIO73 +3V_S5
AU28 B25 PCIE_CLK_LAN_REQ# J2 AB38
TP35 USBP1P USBP2+ [32] [35] PCIE_CLK_LAN_REQ# CLKOUT_PEG_A_P CLK_PCIE_VGAP [15]
AY30 C26 USB_3G#
AU26 TP36 USBP2N A26 USB_3G# [29]
USB_3G (3G)
[31] USB30_TXP1_R TP37 USBP2P USB_3G [29]
AY26 K28 USB_SIM# AB49 AV22
[32] USB30_TXP3_L1 TP38 USBP3N USB_SIM# [29] [29] CLK_PCIE_3G# CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_BCLKN [3]
AV28 H28 USB_SIM AB47 AU22
TP39 USBP3P USB_SIM [29] 3G [29] CLK_PCIE_3G CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_BCLKP [3]
AW30 E28 (SIM) EHCI1
TP40 USBP4N
PCIECLKRQ1# / GPIO18 +3V
C D28 PCIE_CLK_3G_REQ# M1 C
USBP4P [29] PCIE_CLK_3G_REQ#
C3A USBP5N
C28
A28
C3A CLKOUT_DP_N
AM12
AM13
USBP5P C29 AA48 CLKOUT_DP_P
USBP6N B29 AA47 CLKOUT_PCIE2N
USBP6P Cardreader CLKOUT_PCIE2P
PCI_PIRQA# K40 N28 <Port6/7 Support by SKU > BF18 CLK_BUF_PCIE_3GPLLN
PIRQA# USBP7N CLKIN_DMI_N
x
PCIECLKRQ2# / GPIO20 +3V
PCI_PIRQB# K38 M28 PCIECLKRQ2# V10 BE18 CLK_BUF_PCIE_3GPLLP
PCI
PCI_PIRQC# H38 PIRQB# USBP7P L30 CLKIN_DMI_P

PIRQC# USBP8N USB_CARD# [36]
PCI_PIRQD# G38 K30 (CARD READER)
PIRQD# USBP8P USB_CARD [36]
G30 Y37 BJ30 CLK_BUF_BCLKN
USBP9N USBP9- [32] [29] CLK_PCIE_WLAN# CLKOUT_PCIE3N CLKIN_GND1_N
REQ1# / GPIO50+3V
DGPU_HOLD_RST# C46 E30 (USB2.0 L2) Y36 BG30 CLK_BUF_BCLKP
[25] DGPU_HOLD_RST# [29] CLK_PCIE_WLAN
USB
USBP9P USBP9+ [32] CLKOUT_PCIE3P CLKIN_GND1_P

REQ2# / GPIO52+3V
GPIO52 C44 C30 USB_WLAN# WLAN
USBP10N USB_WLAN# [29]
[25] DGPU_PWR_EN_R
DGPU_PWR_EN_R E40
REQ3# / GPIO54+3V USBP10P
A30
L32
USB_WLAN
USB_CCD# USB_WLAN [29] (WLAN) C3A [29] PCIE_CLK_WLAN_REQ#
PCIE_CLK_MINI_REQ# A8
PCIECLKRQ3# / GPIO25 +3V_S5 G24 CLK_BUF_DREFCLKN
USBP11N USB_CCD# [28] CLKIN_DOT_96N
B2A GNT1# D47
GNT1# / GPIO51+3V
K32 USB_CCD (CCD) EHCI2 E24 CLK_BUF_DREFCLKP
fi
[8] GNT1# USBP11P USB_CCD [28] CLKIN_DOT_96P
GNT2# / GPIO53+3V
GPIO53 E42 G32 Y43
USBP12N [30] CLK_PCIE_USB30# CLKOUT_PCIE4N
GNT3# / GPIO55+3V
PCI_GNT3# F46 E32 USB3.0 Y45
[8] PCI_GNT3# USBP12P [30] CLK_PCIE_USB30 CLKOUT_PCIE4P
USBP13N
C32
CLKIN_SATA_N
AK7 CLK_BUF_DREFSSCLKN
C3A
USBP13P
A32
C3A Cougar Point [30] PCIE_CLK_USB30_REQ#
PCIE_CLK_USB30_REQ#L12
PCIECLKRQ4# / GPIO26 +3V_S5 CLKIN_SATA_P
AK5 CLK_BUF_DREFSSCLKP
PIRQE# / GPIO2+3V
ODD_MD# G42
[33] ODD_MD#
PIRQF# / GPIO3+3V
G40
[10] BOARD_ID14
PIRQG# / GPIO4+3V
C42 C33 USB_BIAS R2090 22.6/F_4 V45 K45 CLK_PCH_14M
[10] BOARD_ID3 USBRBIAS# CLKOUT_PCIE5N REFCLK14IN
PIRQH# / GPIO5+3V
D44 V46
[10] BOARD_ID0 CLKOUT_PCIE5P

B33 GPIO44 L14 H45 CLK_PCI_FB C2033 27P/50V_4N
PCI_PME# K10 USBRBIAS CLKIN_PCILOOPBACK
TP2014
2
PME#
PCI_PLTRST# C6
PLTRST# +3V_S5 OC0# / GPIO59
A14 USB_OC_RIGHT#
K20 USB_SC_OC# [30,31,37]
AB42
AB40 CLKOUT_PEG_B_N XTAL25_IN
V47 XTAL25_IN
V49 XTAL25_OUT
Y2001
+3V_S5 OC1# / GPIO40
USB_OC1#
USB_Norm al_OC# [30,32,37] EHCI1 CLKOUT_PEG_B_P XTAL25_OUT
R2094
+3V_S5 B17 GPIO41 1M_4 25MHZ_30
1
OC2# / GPIO41
H49
CLKOUT_PCI0 +3V_S5 OC3# / GPIO42
C16 GPIO42 S3_STRAP E6 +3V_S5
PEG_B_CLKRQ# / GPIO56
H43
L16 GPIO43
USB_Norm al_OC# [30,32,37]
C2034 27P/50V_4N
CLK_PCI_FB R2096 22_4 CLK_PCI_FB_R J48
K42 CLKOUT_PCI2 +3V_S5 OC5# / GPIO9
A16
D14
USB30_SMI#
USB30_SMI# [30] EHCI2
V40 XCLK_RCOMP
Y47 XCLK_RCOMP R2097 90.9/F_4 +1.05V
PCLK_DEBUG_R
GPIO10
CLKOUT_PCIE6N
PCLK_591_R H40 +3V_S5 C14 SCI# V42
in
CLKOUT_PCI4 OC7# / GPIO14 SCI# [37] CLKOUT_PCIE6P
[29] PCLK_DEBUG R2098 NMP@22_4
GPIO45 T13
CougarPoint_R1P0
R2099 22_4 V38 +3V K43 CLK_FLEX0
[37] PCLK_591 CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64 TP2019
V37
FLEX CLOCKS
B OC[0:3]# can only be use for EHCI1 CLKOUT_PCIE7P B
C5567 C5568 +3V CLKOUTFLEX1 / GPIO65
F47 CLK_FLEX1
B2A
*0.1U/16V_4Y *0.1U/16V_4Y K12
OC[4:7]# can only be use for EHCI2 [10] GPIO46
+3V H47 C5565 *0.1U/16V_4Y
AK14 CLKOUTFLEX2 / GPIO66
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P +3V CLKOUTFLEX3 / GPIO67
K49 CLK_FLEX3
48M_CARD [36]
C5566 *0.1U/16V_4Y
CougarPoint_R1P0
CLG/S3P/NS3P/VGA/UGA
PLTRST# CLG PCI/USBOC# Pull-up CLG
+3V_S5
R2102
h
+3V
CLK_REQ/Strap Pin
+3V_S5
R2240
R2241
10K_4 PCIE_CLK_LAN_REQ#
PCIE_CLK_USB30_REQ#
10K_4
SMBus/Pull-up CLG
33MHz 27MHz 48/24MHz 14.318MHz 25MHz
.c
+3V_S5
USB_OC1#
10
9
1
2
SCI#
USB_OC_RIGHT#
PCI_PIRQA#
PCI_PIRQB#
R2203
R2204
8.2K_4
8.2K_4
R2242 10K_4PCIE_CLK_MINI_REQ#
B2A +3V_S5
CLK_FLEX0
GPIO41 8 3 GPIO10 PCI_PIRQC# R2205 8.2K_4 R2158 10K_4 GPIO45 Q2002A
2
GPIO42 7 4 USB30_SMI# PCI_PIRQD# R2208 8.2K_4 R2151 10K_4 GPIO44 *2N7002KDW_115MA
GPIO43 6 5 CLK_FLEX1
C2037 6 1 SMB_ME1_CLK
[37] 2ND_MBCLK
*0.1U/10V_4X 10KX8 +3V
CLK_FLEX2
5
R2118 10K_4 PCIECLKRQ2# +3V_S5

PCI_PLTRST# 2 R2121 10K_4 PCIE_CLK_3G_REQ#
4
PLTRST# [3,29,30,35,36,37] Q2002B CLK_FLEX3
5
1 +3V +3V_S5 *2N7002KDW_115MA
U2003 R2125 NS3@10K_4 S3_STRAP 3 4 SMB_ME1_DAT

[37] 2ND_MBDATA
3
*TC7SH08FU(F) R2116 DGPU_PWR_EN_R R2218 10K_4 R2126 S3@10K_4

100K_4 GPIO52 R2217 10K_4
DGPU_HOLD_RST# R2211 10K_4
E3A ODD_MD#
GPIO53
R2216
R2243
10K_4
*10K_4
+3V_S5 +3V_S5
R2127 IV@10K_4 CLK_PEGA_REQ#
A
R2123 *SHORT_4 R2131 EV@0_4 VGA_PLTRST# [25] B2A R2128 EV@10K_4
R2139
R2142
1K_4
*10K_4
DRAMRST_CNTRL_PCH
A
w
CLK_BUF_DREFCLKN R2163 10K_4 +3V_S5

CLK_BUF_DREFCLKP R2164 10K_4
CLK_BUF_DREFSSCLKN R2175 10K_4 R2140 2.2K_4 SDATA
CLK_BUF_DREFSSCLKP R2177 10K_4 R2141 2.2K_4 SCLK
CLK_BUF_BCLKN
CLK_BUF_BCLKP
R2180
R2187
10K_4
10K_4
B2A R2143
R2144
2.2K_4
2.2K_4
SMB_ME0_CLK
SMB_ME0_DAT
CLK_BUF_PCIE_3GPLLN R2188 10K_4 R2146 2.2K_4 SMB_ME1_CLK
CLK_BUF_PCIE_3GPLLP R2193 10K_4 R2147 2.2K_4 SMB_ME1_DAT Quanta Computer Inc.
B2A PROJECT : Chief River
w
R2148 10K_4 SMBALERT# Size Docum ent Num ber Rev

CLK_PCH_14M R2145 10K_4 R2191 10K_4 SML1ALERT#_R A1A
Cougar Point 3/6
5 4 3 2 1
5 4 3 2 1
Cougar Point (GPIO,VSS_NCTF,RSVD) CLG

BOARD ID SETTING CLG/PX/OEV/UGA/CLG-Strap
10
U2000F Board ID ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7 ID8 ID12 ID13 ID14
HM75 H
BOARD_ID4 T7
BMBUSY# / GPIO0 +3V +3V TACH4 / GPIO68
C40 PCH_ODD_EN PCH_ODD_EN [33] HM76 L
BOARD_ID5 A42
TACH1 / GPIO1 +3V +3V TACH5 / GPIO69
B41 BOARD_ID13 UMA SKU H
VGA SKU L
D
BOARD_ID6 H36
C41 BOARD_ID11
D
W/O 3G H
BOARD_ID2 E38
A40 BOARD_ID12 W/ 3G L
GPIO8 C10
GPIO8 +3V_S5 HuronRiver H
ChiefRiver L
GPIO12 C4 +3V_S5
m
LAN_PHY_PWR_CTRL / GPIO12
13" H
[8] GPIO15 GPIO15 G2
GPIO15 +3V_S5 A20GATE
P4
GATEA20 [37] 14" L
PECI
AU16
TP2027 W/ CEC H
[33] ODD_PRSNT#
ODD_PRSNT# U2
SATA4GP / GPIO16 +3V W/O CEC L
P5 RCIN#
RCIN# RCIN# [37]
W/ G-sensor H
GPIO
[25,37,47,48] DGPU_PWROK
D40 +3V AY11
H_PWRGOOD [3] W/O G-sensor L
CPU/MISC
TACH0 / GPIO17 PROCPWRGD
o
BOARD_ID10 T5
SCLOCK / GPIO22 +3V THRMTRIP#
AY10 PCH_THRMTRIP# R2149 390_4 PM_THRMTRIP# [3] W/ HDMI H
W/O HDMI L
GPIO24 E8
GPIO24 / MEM_LED +3V_S5 INIT3_3V#
T14
TP2022
Capetown H
GPIO27 E16
GPIO27 DSW DF_TVS
AY1
DF_TVS [8] Luxor L
+3V_S5 Only VGA H
.c
PLL_ODVR_EN P8
[8] PLL_ODVR_EN GPIO28
TS_VSS1
AH8 PX mode L
BOARD_ID9 K1
STP_PCI# / GPIO34 +3V
TS_VSS2
AK11 W/ CRT H
B2A BOARD_ID7 K4
GPIO35 +3V AH10
W/O CRT L
TS_VSS3
GPIO36 V8
SATA2GP / GPIO36 +3V HM75_76 H
TS_VSS4
AK10 HM70 L
TP2024
M5
SATA3GP / GPIO37 +3V
BOARD_ID1 N2
SLOAD / GPIO38 +3V NC_1
P37 +3V
C3A +3V +3V
B2A
x
C C
BOARD_ID8 M3
SDATAOUT0 / GPIO39 +3V
R2161 R2150 R2185
GPIO48 V13
SDATAOUT1 / GPIO48 +3V VSS_NCTF_15
BG2
+3V_S5
[9] GPIO46 75@10K_4 10K_4 Cougar@10K_4
[37] TEMP_ALERT# TEMP_ALERT# V3
SATA5GP / GPIO49 +3V VSS_NCTF_16
BG48
fi
BOARD_ID0 [9] BOARD_ID2 BOARD_ID3 [9]
CPUSB# [29]
GPIO57 D6
GPIO57 +3V_S5 VSS_NCTF_17
BH3 R2235 *10K_4 R2234 10K_4
BH47 R2232 *10K_4 GPIO8 R2157 10K_4 R2169 R2173

VSS_NCTF_18
A4 BJ4 R2233 10K_4 GPIO24 R2226 *10K_4 76@10K_4 Panther@10K_4
VSS_NCTF_1 VSS_NCTF_19
A44 BJ44
a
A45 BJ45 +3V +3V +3V
NCTF
A46 BJ46
VSS_NCTF_4 VSS_NCTF_22 R2153 R2159 R2165
A5 BJ5 +3V_S5 HM@10K_4
VSS_NCTF_5 VSS_NCTF_23 CEC@10K_4 Capetown@10K_4
A6 BJ6 GPIO12 R2156 10K_4
in
VSS_NCTF_6 VSS_NCTF_24 BOARD_ID5 BOARD_ID6 BOARD_ID7 BOARD_ID8
B3 C2 BOARD_ID4
B47 C48 +3V R2155 R2167 R2182
VSS_NCTF_8 VSS_NCTF_26 R2104 R2171 R2166
BD1 D1 10 1 NCEC@10K_4 NHM@10K_4 Luxor@10K_4
VSS_NCTF_9 VSS_NCTF_27 ODD_PRSNT# 9 2 PCH_ODD_EN 10K_4 10K_4
BD49 D49 TEMP_ALERT# 8 3 GPIO48
VSS_NCTF_10 VSS_NCTF_28 RCIN# 7 4
BE1 E1 GATEA20 6 5
B2A
B
BE49
BF1
BF49
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
E49
F1
F49
h 10KX8
+3V
R2160
+3V
R2184
+3V
R2189
+3V
R2196
B
.c
GPIO36 R2239 10K_4
CougarPoint_R1P0 GPIO27 R2174 10K_4 U3@10K_4 S&C@10K_4 UR@10K_4 CRT@10K_4
BOARD_ID9 BOARD_ID10 BOARD_ID11 BOARD_ID13
R2168 R2170 R2172 R2198
NU3@10K_4 NS&C@10K_4 NUR@10K_4 NCRT@10K_4
+3V
w
+3V_S5 +3V +3V
R2162 R2152 R2178 R2199

OEV@10K_4 Description ID9 ID10 ID11
10K_4 IV@10K_4 75_76@10K_4
NU3@/NSC@/NUR@ ULU-2 and W/O R-USB Port L L L
GPIO57 ID_Detect [38] BOARD_ID1 BOARD_ID12 BOARD_ID14 [9]
w
NU3@/NSC@/UR@ ULU-2 and W/O S&C UR-2 L L H

R2225 R2154 R2186 R2200 U3@/NSC@/UR@ ULU-2 and W/O S&C UR-3 H L H
*10K_4 EV@10K_4 PX@10K_4 70@10K_4 NU3@/SC@/UR@ ULU-2 and W/S&C UR-2 L H H
U3@/SC@/UR@ ULU-3 and W/S&C UR-3 H H H
w
A C3A U3@ S&C@ UR@ A
NU3@ NS&C@ NUR@

ID_Detect default
Metal/IMR H
TEXTURE L
A1A
Cougar Point 4/6
5 4 3 2 1
5 4 3 2 1
COUGAR POINT (POWER) CLG CLG/PIV/OEV CLG CLG
VccADAC =1mA(8mils)
+VCCA_DAC_1_2
+3V
+1.05V R2176 *0_4

+1.05V_VCCUSBCORE +1.05V
11
L1 FCM1608KF-102T01_100MA
C2044
POWER C2045 C2039 C2046 C2058 U2000J POWER 1U/6.3V_4X
+3V_S5
U2000G 0.01U/25V_4X 0.1U/10V_4X 22U/6.3V_6X *22U/6.3V_6X
+1.05V +1.05V_PCH_VCC AD49 N26
VccCORE =1.3 A(60mils)
E3A +3V_DSW R2179 *0_4 +VCCACLK
VCCACLK VCCIO[29]
VCCSUS3_3 = 119mA(15mils)
AA23 U48
D
AC23 VCCCORE[1] VCCADAC +VCCALVDS C3A +3V R2183 0_4
VCCDSW3_3= 3mA
+VCCPDSW T16 VCCIO[30]
P26
D
VCCCORE[2] +3V_S5 VCCDSW3_3
AD21 P28
CRT
VccALVDS=1mA(8mils) C2042
C2040 C2047 C2056 C2041 AD23 VCCCORE[3] U47 R2181 PIV@0_4 VCCIO[31] 0.1U/10V_4X
1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X 10U/6.3V_6X AF21 VCCCORE[4] VSSADAC C2048 PCH_VCCDSW V12 T27
VCC CORE
AF23 VCCCORE[5] R2237 OEV@0_4 0.1U/10V_4X DCPSUSBYP VCCIO[32]
AG21 VCCCORE[6] T29
+1.05V +1.05V_PCH_VCCDPLL_EXP AG23 VCCCORE[7] C2057 +3V_SUS_CLKF33 T38 VCCIO[33]
AG24 VCCCORE[8] AK36 +1.05V +VCCAPLL_CPY_PCH *0.1U/10V_4X VCC3_3[5]
AG26 VCCCORE[9] VCCALVDS T23 +3V_VCCPUSB
AG27 VCCCORE[10] AK37 L2 *10uh_8_100MA BH23 VCCSUS3_3[7] C2049
AG29 VCCCORE[11] VSSALVDS +VCC_TX_LVDS +1.8V VCCAPLLDMI2 T24 0.1U/10V_4X
VCCCORE[12] VccTX_LVDS=60mA(10mils) VCCSUS3_3[8]
AJ23 R2190 *SHORT_4 +VCCDPLL_CPY AL29
+1.05V
LVDS
AJ26 VCCCORE[13] AM37 L3 PIV@0.1uh_8_250MA C2051 VCCIO[14] V23
USB
+1.05V +1.05V_VCCAPLL_EXP AJ27 VCCCORE[14] VCCTX_LVDS[1] VCCSUS3_3[9]
AJ29 VCCCORE[15] AM38
*10U/6.3V_6X
E3A +VCCSUS1 AL24 V24
m
R2236 OEV@0_4 +1.05V
L4 *1uh_6_25MA AJ31 VCCCORE[16] VCCTX_LVDS[2] C2050 C2052 C2053 DCPSUS[3] VCCSUS3_3[10]
VCCCORE[17] AP36 PIV@0.01U/25V_4X PIV@0.01U/25V_4X *PIV@10U/6.3V_6X P24 +3V_VCCAUBG
VCCTX_LVDS[3] C2059 VCCSUS3_3[6] C2055
C2054 AP37 *1U/6.3V_4X AA19 *1U/6.3V_4X
*10U/6.3V_6X AN19 VCCTX_LVDS[4] VCCASW[1] T26 +VCCAUPLL
VCCIO[28] +1.05V +1.05V_VCCEPW AA21 VCCIO[34]
VCCASW[2]
+3V_VCC_GIO +3V
VccASW =1.01 A(60mils) VCC5REFSUS=1mA
BJ22 AA24 M26 +5V_PCH_VCC5REFSUS R2192 10/F_4
+1.05V +1.05V_VCCIO VCCAPLLEXP VCCASW[3] V5REF_SUS +5V_S5
VccIO =2.925 A(140mils) V33 AA26 D2004 RB500V-40_100MA
Clock and Miscellaneous

VCC3_3[6] VCCASW[4] +3V_S5
HVCMOS
AN16 C2064 C2065 C2066 AN23 +VCCA_USBSUS C2067
VCCIO[15] 1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X AA27 DCPSUS[4] 0.1U/10V_4X
VCCASW[5]
o
AN17 C2063 AN24 +3V_VCCPSUS
C2060 C2061 C2062 VCCIO[16] V34 0.1U/10V_4X +1.1V_VCC_DMI +VTT AA29 VCCSUS3_3[1] C2068
1U/6.3V_4X 1U/6.3V_4X 1U/6.3V_4X VCC3_3[7] VCCASW[6] *1U/6.3V_4X
AN21 AA31 V5REF= 1mA
VCCIO[17] +VCCAFDI_VRM VCCASW[7]
AN26 AC26 P34 +5V_PCH_VCC5REF R2194 10/F_4
VCCIO[18] VCCASW[8] V5REF +5V
C2069 +
AN27 AT16 +VCCAFDI_VRM 1U/6.3V_4X C2073 C2074 C2075 AC27 D2005 RB500V-40_100MA
VCCIO[19] VCCVRM[3] VCCASW[9] +3V
10U/6.3V_6X 10U/6.3V_6X *220U/2.5V_3528P_E35b N20 C2076
AP21 AC29 VCCSUS3_3[2] 1U/6.3V_4X
PCI/GPIO/LPC
.c
C2070 C2071 + C2072 VCCIO[20] VCCASW[10] N22
C VCCDMI = 42mA(10mils) VCCSUS3_3[3] C
AP23 AT20
1U/6.3V_4X 10U/6.3V_6X *220U/2.5V_3528P_E35b
VCCIO[21] VCCDMI[1] C3A AC31
VCCASW[11] P20 +3V_VCCPSUS
VCCSUS3_3 = 119mA
+3V_S5
DMI
AP24 +1.1V_VCC_DMI_CCI +VCC_DMI_CCI +1.05V AD29 VCCSUS3_3[4]
VCCIO[22] VCCASW[12]
VCCIO
C3A AP26 AB36
VCCCLKDMI = 20mA(8mils)
L5 *10uh_8_100MA R2195 *1/F_4 AD31 VCCSUS3_3[5]
P22
C2078
VCCIO[23] VCCCLKDMI VCCASW[13] 1U/6.3V_4X
AT24 R2197 *SHORT_4 W21 AA16
+3V +3V_VCC_EXP VCCIO[24] C2077 C2079 VCCASW[14] VCC3_3[1]
VCCPCORE = 28mA
AN33
1U/6.3V_4X *10U/6.3V_6X
E3A W23
VCCASW[15] VCC3_3[8]
W16 +3V_VCCPCORE
+3V
VCCIO[25] W24 T34
AN34 AG16 VCCASW[16] VCC3_3[4] +3V
C2080 C2081
0.1U/10V_4X VCCIO[26] VCCDFTERM[1] +VCCP_NAND +1.8V W26 0.1U/10V_4X
+1.05V VCCASW[17] C2083
x
BH29 AG17 W29 0.1U/10V_4X
VCC3_3[3] VCCDFTERM[2] VCCASW[18]
E3A
DFT / SPI
VCCPNAND = 190 mA(15mils) W31 AJ2

VCCASW[19] VCC3_3[2] +3V
AJ16 C2082
VCCDFTERM[3] 0.1U/10V_4X R2202 *SHORT_4 W33
+1.05V +VCCAFDI_VRM AP16 VCCASW[20] AF13 C2085
+VCCAFDI_VRM VCCVRM[2] AJ17 VCCIO[5] 0.1U/10V_4X
VCCDFTERM[4] C2086 C2087 0.1U/10V_4X +VCCRTCEXT N16
R2201 *0_4 +1.05V_VCCAPLL_FDI BG6 1U/6.3V_4X DCPRTC AH13 +V1.05S_SATA3
fi
VccAFDIPLL VCCIO[12] +1.05V
+3V_VCCME_SPI +3V_S5 +VCCAFDI_VRM Y49 AH14
+VCCAFDI_VRM VCCVRM[4] VCCIO[13]
+1.05V_VCCDPLL_FDI AP17 R2206 *SHORT_4 C2090
VCCIO[27] V1
FDI
1U/6.3V_4X
VCCSPI AF14
AU20 C2091 +1.05V_VCCA_A_DPL BD47 VCCIO[6]
+VTT VCCSPI = 20mA(8mils) 65mA(10mils)
SATA
VCCDMI[2] C2089 1U/6.3V_4X VCCADPLLA AK1 +V1.1LAN_VCCAPLL L6 *10uh_8_100MA +1.05V
1U/6.3V_4X +1.05V_VCCA_B_DPL BF47 VCCAPLLSATA
8mA(8mils) VCCADPLLB
CougarPoint_R1P0 C2092
R2207 *SHORT_4 AF11 +VCCAFDI_VRM *10U/6.3V_6X VCCVRM= 114mA(15mils)
+VCCDIFFCLK AF17 VCCVRM[1]
+VCCDIFFCLKN AF33 VCCIO[7]
a
C2093 AF34 VCCDIFFCLKN[1] AC16 +VCC_SATA
VCCDIFFCLKN[2] VCCIO[2] +1.05V
B 1U/6.3V_4X VCCDIFFCLKN= 55mA(10mils) AG34 B
+1.05V VCCDIFFCLKN[3] AC17
VCCSSC= 95mA(10mils) VCCIO[3] C2094
R2209 *0_4 +V1.05V_SSCVCC AG33 AD17 1U/6.3V_4X
VCCSSC VCCIO[4]
C2095 C2096 0.1U/10V_4X +VCCSST V16 +1.05V_VCCEPW

*1U/6.3V_4X DCPSST
VCCME = 1.01A(60mils)
Internal PLL and CLG Display PLL A/B Analog Power CLG/PIV/OEV
in
T17 T21
+VTT +V1.05M_VCCSUS V19 DCPSUS[1] VCCASW[22]
VRMS DCPSUS[2]
MISC
R2210 *SHORT_4 +VTT_VCCPCPU V21
L7 PIV@10uh_8_100MA +1.05V_VCCA_A_DPL VCCASW[23]
+1.05V
CPU
E3A C2097 C2098 C2099
BJ8
V_PROC_IO T19
+ 4.7U/6.3V_6X 0.1U/10V_4X *0.1U/10V_4X VCCASW[21]
+1.5V +VCCAFDI_VRM C2108 C2109 R2213 +3V_RTC VCCSUSHDA= 10mA(8mils)
E3A *PIV@220U/2.5V_3528P_E35b 1U/6.3V_4X *SHORT_6 E3A A22 P32 +V3.3A_1.5A_HDA_IO
RTC
+3V_S5
HDA
VCCRTC VCCSUSHDA
R2212 *SHORT_6 L8 OEV@0_8
C3A +1.05V_VCCA_B_DPL C2103 C2104
C2100 C2101 C2102 CougarPoint_R1P0 *1U/6.3V_4X 0.1U/10V_4X
1U/6.3V_4X 0.1U/10V_4X *0.1U/10V_4X
C2105
*10U/6.3V_6X
+
C2112
*PIV@220U/2.5V_3528P_E35b
C2113
1U/6.3V_4X
h
.c
Deep Sx power CLG Clock power on CLG
A
well core well A
+3VPCU +3V_DSW
+3V
D2006 *RB500V-40_100MA R2214 *0_6
R2215 1/F_4 +3V_SUS_CLKF33_L L9 10uh_8_100MA +3V_SUS_CLKF33

w
C2110 C2111
10U/6.3V_6X 1U/6.3V_4X
Cougar Point 5/6 A1A

5 4 3 2 1
w
w
5 4 3 2 1
IBEX PEAK-M (GND) CLG

12
U2000I
U2000H
H5 AY4 H46
VSS[0] AY42 VSS[159] VSS[259] K18
AA17 AK38 AY46 VSS[160] VSS[260] K26
AA2 VSS[1] VSS[80] AK4 AY8 VSS[161] VSS[261] K39
AA3 VSS[2] VSS[81] AK42 B11 VSS[162] VSS[262] K46
AA33 VSS[3] VSS[82] AK46 B15 VSS[163] VSS[263] K7
D AA34 VSS[4] VSS[83] AK8 B19 VSS[164] VSS[264] L18 D
AB11 VSS[5] VSS[84] AL16 B23 VSS[165] VSS[265] L2
m
AB7 VSS[11] VSS[90] AL26 F45 VSS[171] VSS[271] M12
AC19 VSS[12] VSS[91] AL27 BB12 VSS[172] VSS[272] P16
AC2 VSS[13] VSS[92] AL31 BB16 VSS[173] VSS[273] M18
AC34 VSS[17] VSS[96] AM11 BB28 VSS[177] VSS[277] M32
AC48 VSS[18] VSS[97] AM14 BB30 VSS[178] VSS[278] M34
AD10 VSS[19] VSS[98] AM36 BB38 VSS[179] VSS[279] M38
o
AD13 VSS[22] VSS[101] AM45 BC14 VSS[182] VSS[282] M46
AD19 VSS[23] VSS[102] AM46 BC18 VSS[183] VSS[283] M8
AD24 VSS[24] VSS[103] AM7 BC2 VSS[184] VSS[284] N18
AD26 VSS[25] VSS[104] AN2 BC22 VSS[185] VSS[285] P30
AD27 VSS[26] VSS[105] AN29 BC26 VSS[186] VSS[286] N47
.c
AD36 VSS[29] VSS[108] AP12 BC36 VSS[189] VSS[289] T33
AD37 VSS[30] VSS[109] AP19 BC40 VSS[190] VSS[290] P40
AD4 VSS[33] VSS[112] AP32 BD46 VSS[193] VSS[293] P7
AD40 VSS[34] VSS[113] AP38 BD5 VSS[194] VSS[294] R2
AD42 VSS[35] VSS[114] AP4 BE22 VSS[195] VSS[295] R48
AD43 VSS[36] VSS[115] AP42 BE26 VSS[196] VSS[296] T12
AD45 VSS[37] VSS[116] AP46 BE40 VSS[197] VSS[297] T31
x
AD46 VSS[38] VSS[117] AP8 BF10 VSS[198] VSS[298] T37
C
AD8 VSS[39] VSS[118] AR2 BF12 VSS[199] VSS[299] T4 C
AE2 VSS[40] VSS[119] AR48 BF16 VSS[200] VSS[300] W34
AE3 VSS[41] VSS[120] AT11 BF20 VSS[201] VSS[301] T46
AF10 VSS[42] VSS[121] AT13 BF22 VSS[202] VSS[302] T47
AF12 VSS[43] VSS[122] AT18 BF24 VSS[203] VSS[303] T8
VSS[44] VSS[123] VSS[204] VSS[304]
fi
AD14 AT22 BF26 V11
AD16 VSS[45] VSS[124] AT26 BF28 VSS[205] VSS[305] V17
AF16 VSS[46] VSS[125] AT28 BD3 VSS[206] VSS[306] V26
AF19 VSS[47] VSS[126] AT30 BF30 VSS[207] VSS[307] V27
AF29 VSS[51] VSS[130] AT42 BG17 VSS[211] VSS[311] V39
a
AF4 VSS[54] VSS[133] AU24 BG44 VSS[214] VSS[314] W17
AF42 VSS[55] VSS[134] AU30 BG8 VSS[215] VSS[315] W19
AF46 VSS[56] VSS[135] AV16 BH11 VSS[216] VSS[316] W2
AF8 VSS[59] VSS[138] AV30 BH19 VSS[219] VSS[319] Y12
in
AG19 VSS[60] VSS[139] AV38 H10 VSS[220] VSS[320] Y38
AG2 VSS[61] VSS[140] AV4 BH27 VSS[221] VSS[321] Y4
AH11 VSS[64] VSS[143] AW14 BH35 VSS[224] VSS[324] Y8
AH3 VSS[65] VSS[144] AW18 BH39 VSS[225] VSS[325] BG29
AH36 VSS[66] VSS[145] AW2 BH43 VSS[226] VSS[328] N24
AH39 VSS[67] VSS[146] AW22 BH7 VSS[227] VSS[329] AJ3
AH40 VSS[68] VSS[147] AW26 D3 VSS[228] VSS[330] AD47
AH42 VSS[69] VSS[148] AW28 D12 VSS[229] VSS[331] B43
AH46 VSS[70] VSS[149] AW32 D16 VSS[230] VSS[333] BE10
B
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
AW34
AW36
AW40
AW48
AV11
AY12
AY22
hD18
D22
D24
D26
D30
D32
D34
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
BG41
G14
H16
T36
BG22
BG24
C22
B
.c
AK3 VSS[78] VSS[157] AY28 D38 VSS[238] VSS[344] AP13
VSS[79] VSS[158] D42 VSS[239] VSS[345] M14
CougarPoint_R1P0 D8 VSS[240] VSS[346] AP3
E18 VSS[241] VSS[347] AP1
E26 VSS[242] VSS[348] BE16
G18 VSS[243] VSS[349] BC16
G20 VSS[244] VSS[350] BG28
G26 VSS[245] VSS[351] BJ28
G28 VSS[246] VSS[352]
G36 VSS[247]
G48 VSS[248]
VSS[249]
w
H12
H18 VSS[250]
H22 VSS[251]
H24 VSS[252]
H26 VSS[253]
H30 VSS[254]
H32 VSS[255]
H34 VSS[256]
F3 VSS[257]
w
VSS[258]
CougarPoint_R1P0
w
A A

A1A
Cougar Point 6/6
5 4 3 2 1
1 2 3 4 5 6 7 8
DDR
H=8 (Rev)
+1.5VSUS 13
JDIM3001A M_A_DQ[63:0] [4] JDIM3001B
[4] M_A_A[15:0]
M_A_A0 98 5 M_A_DQ0 75 44
M_A_A1 97 A0 DQ0 7 M_A_DQ1 76 VDD1 VSS16 48
A M_A_A7 86 A6 DQ6 18 M_A_DQ7 94 VDD7 VSS22 65 A
M_A_A10 107 A9 DQ9 33 M_A_DQ10 C5564 *3.3P/50V_4C 105 VDD10 VSS25 72
M_A_A11 84 A10/AP DQ10 35 M_A_DQ11 106 VDD11 VSS26 127
PC2100 DDR3 SDRAM SO-DIMM

m
M_A_A13 119 A12/BC# DQ12 24 M_A_DQ13 112 VDD13 VSS28 133
A15 DQ15 39 M_A_DQ16 123 VDD16 VSS31 139
109 DQ16 41 M_A_DQ17 124 VDD17 VSS32 144

[4] M_A_BS#0 BA0 DQ17 VDD18 VSS33
108 51 M_A_DQ18 145
[4] M_A_BS#1 BA1 DQ18 VSS34
79 53 M_A_DQ23 199 150
[4] M_A_BS#2 BA2 DQ19 +3V VDDSPD VSS35
114 40 M_A_DQ21 151
[4] M_A_CS#0 S0# DQ20 VSS36
121 42 M_A_DQ20 77 155
o
[4] M_A_CS#1 S1# DQ21 NC1 VSS37
[4] M_A_CLKP0 101 50 M_A_DQ22 122 156
103 CK0 DQ22 52 M_A_DQ19 125 NC2 VSS38 161
[4] M_A_CLKN0 CK0# DQ23 NCTEST VSS39
[4] M_A_CLKP1 102 57 M_A_DQ28 162
104 CK1 DQ24 59 M_A_DQ25 R3002 *10K_4 PM_EXTTS#0 198 VSS40 167
[4] M_A_CLKN1 CK1# DQ25 +3V EVENT# VSS41
73 67 M_A_DQ26 30 168
[4] M_A_CKE0 CKE0 DQ26 [14,26] DDR3_DRAMRST# RESET# VSS42
[4] M_A_CKE1
74
CKE1 DQ27
69 M_A_DQ27
E3A VSS43
172
.c
115 56 M_A_DQ29 173
[4] M_A_CAS# CAS# DQ28 VSS44
110 58 M_A_DQ24 R3004 0_4 SMDDR_VREF_DQ0_R 1 178
[4] M_A_RAS# RAS# DQ29 [6] SMDDR_VREF_DQ0_M3 VREF_DQ VSS45
113 68 M_A_DQ30 SMDDR_VREF_DIMM 126 179
[4] M_A_WE# WE# DQ30 VREF_CA VSS46
R3001 10K_4 DIMM0_SA0 197 70 M_A_DQ31 SMDDR_VREF_DQ0 R3018 *SHORT_4 184
R3003 10K_4 DIMM0_SA1 201 SA0 DQ31 129 M_A_DQ36 VSS47 185
CGCLK_SMB 202 SA1 DQ32 131 M_A_DQ37 2 VSS48 189
[14,29,38] CGCLK_SMB SCL DQ33 VSS1 VSS49
[14,29,38] CGDAT_SMB CGDAT_SMB 200 141 M_A_DQ35 3 190
SDA DQ34 143 M_A_DQ34 8 VSS2 VSS50 195
116 DQ35 130 M_A_DQ32 9 VSS3 VSS51 196
(204P)
[4] M_A_ODT0 ODT0 DQ36 VSS4 VSS52
120 132 M_A_DQ33 13
[4] M_A_ODT1 ODT1 DQ37 VSS5
140 M_A_DQ39 14
x
B 11 DQ38 142 M_A_DQ38 19 VSS6 B
28 DM0 DQ39 147 M_A_DQ45 20 VSS7
46 DM1 DQ40 149 M_A_DQ44 25 VSS8
63 DM2 DQ41 157 M_A_DQ47 26 VSS9 203
(204P)
DM3 DQ42 VSS10 VTT1 +SMDDR_VTERM

136 159 M_A_DQ46 31 204
153 DM4 DQ43 146 M_A_DQ40 32 VSS11 VTT2
fi
170 DM5 DQ44 148 M_A_DQ41 37 VSS12
187 DM6 DQ45 158 M_A_DQ42 38 VSS13
DM7 DQ46 160 M_A_DQ43 43 VSS14
GND
GND
[4] M_A_DQSP[7:0] DQ47 VSS15
M_A_DQSP0 12 163 M_A_DQ48
M_A_DQSP1 29 DQS0 DQ48 165 M_A_DQ53
M_A_DQSP2 47 DQS1 DQ49 175 M_A_DQ55 2-1932323-1
205
206
a
[4] M_A_DQSN[7:0] DQS7 DQ55
M_A_DQSN0 10 181 M_A_DQ61
M_A_DQSN1 27 DQS#0 DQ56 183 M_A_DQ60
DQS#2 DQ58
in
M_A_DQSN3 62 193 M_A_DQ59
DQS#7 DQ63
2-1932323-1
DDR Power Decoupling DDR DDR3 VREF

h DDR SMBUS DDR
C
.c
+1.5VSUS
CA ISOLATE +3V
SMDDR_VREF_DIMM
SMDDR_VREF_DIMM [14]
C5589 *39P/50V_4N
C5588 *39P/50V_4N
E3A C3002 0.1U/10V_4X R3007 *SHORT_4 +SMDDR_VREF
C3001 4.7U/6.3V_6X
E3A R3005
4.7K_4
w
2
SMDDR_VREF_DQ0_R R3008 *10K/F_4 R3009 *10K/F_4 +1.5VSUS
C3006 4.7U/6.3V_6X
6 1 CGDAT_SMB
[9,29,35] SDATA
C3003 0.1U/10V_4X
C3046 4.7U/6.3V_6X Q5051A 2N7002KDW_115MA
DDR3 VREF DQ (M1) DDR

w
C3005 *2.2U/6.3V_6X
C3010 *4.7U/6.3V_6X
+3V R3006
4.7K_4
C3012 *4.7U/6.3V_6X
SMDDR_VREF_DIMM +1.5VSUS
5
C3014 *4.7U/6.3V_6X +SMDDR_VTERM
w
C3013 0.1U/10V_4X 3 4 CGCLK_SMB

D [9,29,35] SCLK D
+1.5VSUS
C3016 0.1U/10V_4X C3004 1U/6.3V_4X R3010 Q5051B 2N7002KDW_115MA
C3015 *2.2U/6.3V_6X 1K/F_4
C3017 0.1U/10V_4X C3007 1U/6.3V_4X SMDDR_VREF_DQ0
+ C3019
C3018 0.1U/10V_4X +3V C3009 1U/6.3V_4X
R3011
1K/F_4
C3021
0.1U/10V_4X
*330U/2V_7343P_E9c Quanta Computer Inc.
C3020 0.1U/10V_4X C3023 2.2U/6.3V_6X C3011 1U/6.3V_4X
C3047 *0.1U/10V_4X A1A
DDR3 DIMM-0
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
DDR
14
H=4 (Rev) +1.5VSUS
JDIM3002A M_B_DQ[63:0] [4]

[4] M_B_A[15:0]
M_B_A0 98 5 M_B_DQ0
M_B_A1 97 A0 DQ0 7 M_B_DQ1 JDIM3002B
A
M_B_A2 96 A1 DQ1 15 M_B_DQ2 75 44 A
M_B_A3 95 A2 DQ2 17 M_B_DQ3 76 VDD1 VSS16 48

A6 DQ6 VDD5 VSS20
m
M_B_A7 86 18 M_B_DQ7 88 60
M_B_A11 84 A10/AP DQ10 35 M_B_DQ11 100 VDD9 VSS24 71
M_B_A12 83 A11 DQ11 22 M_B_DQ12 C5563 *3.3P/50V_4C 105 VDD10 VSS25 72
M_B_A13 119 A12/BC# DQ12 24 M_B_DQ13 106 VDD11 VSS26 127

A14 DQ14 VDD13 VSS28
o
M_B_A15 78 36 M_B_DQ15 112 133
A15 DQ15 39 M_B_DQ16 117 VDD14 VSS29 134
109 DQ16 41 M_B_DQ17 118 VDD15 VSS30 138

[4] M_B_BS#0 BA0 DQ17 VDD16 VSS31
108 51 M_B_DQ18 123 139
79 53 M_B_DQ19 124 144
114 40 M_B_DQ20 145
[4] M_B_CS#0 S0# DQ20 VSS34
.c
121 42 M_B_DQ21 199 150
[4] M_B_CS#1 S1# DQ21 +3V VDDSPD VSS35
101 50 M_B_DQ22 151
[4] M_B_CLKP0 CK0 DQ22 VSS36
103 52 M_B_DQ23 77 155
[4] M_B_CLKN0 CK0# DQ23 NC1 VSS37
102 57 M_B_DQ24 122 156
[4] M_B_CLKP1 CK1 DQ24 NC2 VSS38
104 59 M_B_DQ25 125 161
[4] M_B_CLKN1 CK1# DQ25 NCTEST VSS39
73 67 M_B_DQ26 162
[4] M_B_CKE0 CKE0 DQ26 VSS40
74 69 M_B_DQ27 R3012 *10K_4 PM_EXTTS#1 198 167
[4] M_B_CKE1 CKE1 DQ27 +3V EVENT# VSS41
115 56 M_B_DQ28 30 168
[4] M_B_CAS# CAS# DQ28 [13,26] DDR3_DRAMRST# RESET# VSS42
[4] M_B_RAS#
110
113 RAS# DQ29
58
68
M_B_DQ29
M_B_DQ30
E3A VSS43
172
173
[4] M_B_WE#
x
B R3013 10K_4 DIMM1_SA0 197 WE# DQ30 70 M_B_DQ31 R3015 0_4 SMDDR_VREF_DQ1_R 1 VSS44 178 B
SA0 DQ31 [6] SMDDR_VREF_DQ1_M3 VREF_DQ VSS45
R3014 10K_4 DIMM1_SA1 201 129 M_B_DQ32 126 179
+3V SA1 DQ32 VREF_CA VSS46
202 131 M_B_DQ33 SMDDR_VREF_DQ1 R3019 *SHORT_4 184
[13,29,38] CGCLK_SMB SCL DQ33 VSS47
200 141 M_B_DQ34 185
[13,29,38] CGDAT_SMB SDA DQ34 [13] SMDDR_VREF_DIMM VSS48
143 M_B_DQ35 2 189
116 DQ35 130 M_B_DQ36 3 VSS1 VSS49 190
fi
[4] M_B_ODT0 ODT0 DQ36 VSS2 VSS50
120 132 M_B_DQ37 8 195
[4] M_B_ODT1 ODT1 DQ37 VSS3 VSS51
140 M_B_DQ38 9 196
(204P)
11 DQ38 142 M_B_DQ39 13 VSS4 VSS52
28 DM0 DQ39 147 M_B_DQ40 14 VSS5
46 DM1 DQ40 149 M_B_DQ41 19 VSS6
SO-DIMMB SPD Address is 0XA4 63 DM2 DQ41 157 M_B_DQ42 20 VSS7
(204P)
136 DM3 DQ42 159 M_B_DQ43 25 VSS8

SO-DIMMB TS Address is 0X34 DM4 DQ43 VSS9
a
153 146 M_B_DQ44 26 203
DM5 DQ44 VSS10 VTT1 +SMDDR_VTERM
170 148 M_B_DQ45 31 204
187 DM6 DQ45 158 M_B_DQ46 32 VSS11 VTT2
DM7 DQ46 160 M_B_DQ47 37 VSS12
[4] M_B_DQSP[7:0] DQ47 VSS13
M_B_DQSP0 12 163 M_B_DQ48 38
M_B_DQSP1 29 DQS0 DQ48 165 M_B_DQ49 43 VSS14
GND
GND
DQS1 DQ49 VSS15
in
M_B_DQSP2 47 175 M_B_DQ50
M_B_DQSP3 64 DQS2 DQ50 177 M_B_DQ51
M_B_DQSP4 137 DQS3 DQ51 164 M_B_DQ52 2-2013287-1
205
206
[4] M_B_DQSN[7:0] DQS7 DQ55
M_B_DQSN0 10 181 M_B_DQ56
M_B_DQSN1 27 DQS#0 DQ56 183 M_B_DQ57
C
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7
135
152
169
186
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQ59
DQ60
DQ61
DQ62
DQ63
180
182
192
194
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63 h C
.c
2-2013287-1
DDR Power Decoupling DDR DDR3 VREF DQ (M1) DDR
+1.5VSUS
w
C3024 4.7U/6.3V_6X
SMDDR_VREF_DIMM
C3027 4.7U/6.3V_6X
C3025 0.1U/10V_4X +1.5VSUS
w
C3030 4.7U/6.3V_6X
C3028 *2.2U/6.3V_6X
C3032 *4.7U/6.3V_6X R3016 +1.5VSUS

1K/F_4
C3034 *4.7U/6.3V_6X SMDDR_VREF_DQ1_R SMDDR_VREF_DQ1

w
D +SMDDR_VTERM D
C3036 0.1U/10V_4X
C3035 *4.7U/6.3V_6X C3026 1U/6.3V_4X + C3042
R3017 C3039
C3038 *2.2U/6.3V_6X 1K/F_4 0.1U/10V_4X *330U/2V_7343P_E9c
C3037 0.1U/10V_4X C3029 1U/6.3V_4X
+3V Quanta Computer Inc.

C3041 0.1U/10V_4X C3031 1U/6.3V_4X
C3045 *2.2U/6.3V_6X
C3043 0.1U/10V_4X C3033 1U/6.3V_4X Size Document Number Rev
C3044 *0.1U/10V_4X A1A
DDR3 DIMM-1
1 2 3 4 5 6 7 8
PEG_TXP[0..15] VGA
15
[3] PEG_TXP[0..15]
PEG_TXN[0..15] U5000A
[3] PEG_TXN[0..15]
PART 1 0F 9
PEG_RXP[0..15]
[3] PEG_RXP[0..15]
PEG_RXN[0..15]
[3] PEG_RXN[0..15]
PEG_TXP15 AA38 PCIE_TX0P Y33 CPEG_RXP15 C5001 EV@0.1U/10V_4X
[3] PEG_TXP15
PEG_TXN15 Y37 PCIE_RX0P Y32 CPEG_RXN15 C5002 EV@0.1U/10V_4X
PEG_RXP15 [3]
[3] PEG_TXN15 PCIE_RX0N PCIE_TX0N PEG_RXN15 [3]
PEG_TXP14 Y35 PCIE_TX1P W33 CPEG_RXP14 C5003 EV@0.1U/10V_4X

Thames and Seymour Power-on sequence
[3] PEG_TXP14
PEG_TXN14 W36 PCIE_RX1P W32 CPEG_RXN14 C5004 EV@0.1U/10V_4X
PEG_RXP14 [3]
PCIE_TX1N
[3] PEG_TXN14 PCIE_RX1N PEG_RXN14 [3]
1 => +1V_GPU
[3] PEG_TXP13
PEG_TXP13 W38
PCIE_RX2P PCIE_TX2P U33 CPEG_RXP13 C5005 EV@0.1U/10V_4X
PEG_RXP13 [3] 2 => +3V_D
m
PEG_TXN13 V37 PCIE_TX2N U32 CPEG_RXN13 C5006 EV@0.1U/10V_4X
3 => +VGPU_CORE,+1.5V_GPU
[3] PEG_TXP12
[3] PEG_TXN12
PEG_TXP12
PEG_TXN12
V35
U36 PCIE_RX3P
PCIE_RX3N
PCIE_TX3P
PCIE_TX3N
U30 CPEG_RXP12
U29 CPEG_RXN12
C5007
C5008
EV@0.1U/10V_4X
EV@0.1U/10V_4X
PEG_RXP12 [3]
PEG_RXN12 [3]
4 => +1.8V_GPU
PEG_TXP11 U38 PCIE_TX4P T33 CPEG_RXP11 C5009 EV@0.1U/10V_4X
o
[3] PEG_TXP11
PEG_TXN11 T37 PCIE_RX4P T32 CPEG_RXN11 C5010 EV@0.1U/10V_4X
PEG_RXP11 [3]
PEG_TXP10 T35 T30 CPEG_RXP10 C5011 EV@0.1U/10V_4X

PEG
[3] PEG_TXP10 PCIE_RX5P PCIE_TX5P PEG_RXP10 [3]
PEG_TXN10 R36 PCIE_TX5N T29 CPEG_RXN10 C5012 EV@0.1U/10V_4X
[3] PEG_TXN10 PCIE_RX5N PEG_RXN10 [3] Intel platform: Lane0 ~ Lane15
.c
[3] PEG_TXP9
PEG_TXP9
PEG_TXN9
R38
P37 PCIE_RX6P PCIE_TX6P P33 CPEG_RXP9
P32 CPEG_RXN9
C5013
C5014
EV@0.1U/10V_4X
EV@0.1U/10V_4X
PEG_RXP9 [3] Brazos platform: Lane12 ~ Lane15
Comal and Sabine platform: Lane8 ~Lane15
PEG_TXP8 P35 PCIE_TX7P P30 CPEG_RXP8 C5015 EV@0.1U/10V_4X
[3] PEG_TXP8
PEG_TXN8 N36 PCIE_RX7P P29 CPEG_RXN8 C5016 EV@0.1U/10V_4X
PEG_RXP8 [3]
x
PEG_TXP7 N38 PCIE_TX8P N33 CPEG_RXP7 C5000 EV@0.1U/10V_4X
[3] PEG_TXP7
PEG_TXN7 M37 PCIE_RX8P N32 CPEG_RXN7 C5017 EV@0.1U/10V_4X
PEG_RXP7 [3]
PEG_TXP6 M35 PCIE_TX9P N30 CPEG_RXP6 C5018 EV@0.1U/10V_4X
fi
[3] PEG_TXP6
PEG_TXN6 L36 PCIE_RX9P N29 CPEG_RXN6 C5019 EV@0.1U/10V_4X
PEG_RXP6 [3]
PEG_TXP5 L38 PCIE_TX10P L33 CPEG_RXP5 C5020 EV@0.1U/10V_4X

[3] PEG_TXP5
PEG_TXN5 K37 PCIE_RX10P L32 CPEG_RXN5 C5021 EV@0.1U/10V_4X
PEG_RXP5 [3]
a
PEG_TXP4 K35 PCIE_TX11P L30 CPEG_RXP4 C5022 EV@0.1U/10V_4X
[3] PEG_TXP4
PEG_TXN4 J36 PCIE_RX11P L29 CPEG_RXN4 C5023 EV@0.1U/10V_4X
PEG_RXP4 [3]
PEG_TXP3 J38 PCIE_TX12P K33 CPEG_RXP3 C5024 EV@0.1U/10V_4X

[3] PEG_TXP3
PEG_TXN3 H37 PCIE_RX12P K32 CPEG_RXN3 C5025 EV@0.1U/10V_4X
PEG_RXP3 [3]
PCIE_TX12N
in
PEG_TXP2 H35 PCIE_TX13P J33 CPEG_RXP2 C5026 EV@0.1U/10V_4X

[3] PEG_TXP2
PEG_TXN2 G36 PCIE_RX13P J32 CPEG_RXN2 C5027 EV@0.1U/10V_4X
PEG_RXP2 [3]
PEG_TXP1 G38 PCIE_TX14P K30 CPEG_RXP1 C5028 EV@0.1U/10V_4X

PCI EXPRESS INTERFACE
[3] PEG_TXP1
PEG_TXN1 F37 PCIE_RX14P K29 CPEG_RXN1 C5029 EV@0.1U/10V_4X
PEG_RXP1 [3]
[3] PEG_TXP0
[3] PEG_TXN0
PEG_TXP0
PEG_TXN0
F35
E37 PCIE_RX15P
PCIE_RX15N h
PCIE_TX15P
PCIE_TX15N
H33 CPEG_RXP0
H32 CPEG_RXN0
C5030
C5031
EV@0.1U/10V_4X
EV@0.1U/10V_4X
PEG_RXP0 [3]
PEG_RXN0 [3]
.c
AB35
CLOCK
[9] CLK_PCIE_VGAP AA36 PCIE_REFCLKP
[9] CLK_PCIE_VGAN PCIE_REFCLKN R5003 *EV@1.69K/F_4 +1V_GPU
CALIBRATION
PCIE_CALR_TX Y30 R5001 EV@1.27K/F_4
R5000 EV@10K_4 AH16 PCIE_CALR_RX Y29 R5002 EV@2K/F_4

w
TEST_PG +1V_GPU
[25] PERST#_BUF
PERST#_BUF AA30
PERSTB Quanta Computer Inc.
EV@HEATHROW M2
w

A1A
Thames_M2/ PEG*16
w
VGA/CRV/PX4
[18] GENIL_CLK
[18] GENIL_VSYNC
AD29
AC29
MUTI GFX
GENLK_CLK
GENLK_VSYNC
U5000B
PART 2 0F 9
TXCAP_DPA3P
TXCAM_DPA3N
AU24
AV23 EXT_HDMICLK+
EXT_HDMICLK-
[27]
[27]
16
TX0P_DPA2P AT25
AJ21 AR24 EXT_HDMITX0P [27]
SWAPLOCKA TX0M_DPA2N EXT_HDMITX0N [27]
AK21 DPA
SWAPLOCKB AU26
TX1P_DPA1P EXT_HDMITX1P [27]
TX1M_DPA1N AV25
EXT_HDMITX1N [27]
AR8 TX2P_DPA0P AT27
AU8 DVPCNTL_MVP_0 AR26 EXT_HDMITX2P [27]
DVPCNTL_MVP_1 TX2M_DPA0N EXT_HDMITX2N [27]
AP8
AW8 DVPCNTL_0 AR30
DVPCNTL_1 TXCBP_DPB3P
AR3 TXCBM_DPB3N AT29
AR1 DVPCNTL_2
AU1 DVPCLK AV31
[18] RAM_STRAP0 DVPDATA_0 TX3P_DPB2P
AU3 TX3M_DPB2N AU30
[18] RAM_STRAP1
AW3 DVPDATA_1 DPB
m
[18] RAM_STRAP2 DVPDATA_2
AP6 TX4P_DPB1P AR32
[18] RAM_STRAP3
AW5 DVPDATA_3 AT31
[18] RAM_STRAP4 DVPDATA_4 TX4M_DPB1N
AU5
AR6 DVPDATA_5 AT33
DVPDATA_6 TX5P_DPB0P
1.8V GPIO AW6
DVPDATA_7 TX5M_DPB0N AU32
AU6
AT7 DVPDATA_8 AU14
DVPDATA_9 TXCCP_DPC3P
AV7 TXCCM_DPC3N AV13
AN7 DVPDATA_10
AV9 DVPDATA_11 AT15
TX0P_DPC2P
o
AT9 DVPDATA_12 TX0M_DPC2N AR14
AR10 DVPDATA_13
AW10 DVPDATA_14 DPC TX1P_DPC1P AU16
AU10 DVPDATA_15 AV15
DVPDATA_16 TX1M_DPC1N
AP10
AV11 DVPDATA_17 TX2P_DPC0P AT17
AT11 DVPDATA_18 AR16
DVPDATA_19 TX2M_DPC0N
AR12
.c
AW12 DVPDATA_20 AU20
DVPDATA_21 TXCDP_DPD3P
AU12 TXCDM_DPD3N AT19
AP12 DVPDATA_22
DVPDATA_23 AT21
TX3P_DPD2P
TX3M_DPD2N AR20
Tempeature function: Connect to EC
GPU_SMBCLK AJ23 DPD TX4P_DPD1P AU22
GPU_SMBDAT AH23 SMBCLK AV21
SMBDATA SMBus TX4M_DPD1N
TX5P_DPD0P AT23
TX5M_DPD0N AR22
R5006 EV@10K/F_4 GPU_SCL AK26
x
+3V_D SCL
R5007 EV@10K/F_4 GPU_SDA AJ26 I2C
SDA
R AD39
EXT_CRT_RED [28]
AVSSN#1 AD37
AH20 GENERAL PURPOSE I/O
[18] GPU_GPIO0 GPIO_0
AH18 G AE36
[18] GPU_GPIO1 AN16 GPIO_1 AD35 EXT_CRT_GRN [28]
AVSSN#2
fi
[18] GPU_GPIO2 GPIO_2
B AF37
AH17 AE38 EXT_CRT_BLU [28]
T5027 AVSSN#3
AJ17 GPIO_5_AC_BATT
R5133 OEV@0_4 GPIO_7_BLON AK17 GPIO_6 DAC1 AC36 R5008 R5009 R5010
[7,37] LVDS_BKLT GPIO_7_BLON HSYNC EXT_HSYNC [18,28]
AJ13 VSYNC AC38 ECRT@150/F_4 ECRT@150/F_4 ECRT@150/F_4
[18] GPU_GPIO8
AH15 GPIO_8_ROMSO EXT_VSYNC [18,28]
[18] GPU_GPIO9
[18] GPU_GPIO10
AJ16
AK16
GPIO_9_ROMSI
GPIO_10_ROMSCK AB34 R5011 EV@499/F_4
SMBUS power plane isolate
[18] GPU_GPIO11 GPIO_11 RSET
a
AL16 +3V_D
[18] GPU_GPIO12
AM16 GPIO_12 AD34 AVDD
[18] GPU_GPIO13 GPIO_13 AVDD
GPIO_7_BLON AM14 AVSSQ AE34
AM13 GPIO_14_HPD2
[47] GFX_CORE_CNTRL0 GPIO_15_PWRCNTL_0
AK14 VDD1DI AC33 VDD1DI
R5037 T5003 AG30 GPIO_16 AC34
GPIO_17_THERMAL_INT VSS1DI
*OEV@10K_4 AN14
T5026 AM17 GPIO_18_HPD3 R5005
in
AL13 GPIO_19_CTF V13 T5006
[47] GFX_CORE_CNTRL1 GPIO_20_PWRCNTL_1 NC#1 EV@10K/F_4
[18] GPU_GPIO21
AJ14
AK13 GPIO_21 NC#2 U13
AC31 T5008
D3A
[18] GPU_GPIO22 GPIO_22_ROMCSB NC#3
2
T5025 AN13 NC#4 AD30 T5010
CLKREQB AC32 T5011
NC#5
NC#6 AD32 T5012 6 1 GPU_SMBCLK
[27,37] 3ND_MBCLK
T5013 AG32 NC#7 AF32 T5014
T5015 AG33 GPIO_29 AA29 T5016 Q5047A EV@2N7002KDW_115MA
GPIO_30 NC#8
NC#9 AG21
AJ19
AK19 GENERICA +3V_D
AJ20 GENERICB
+1.8V_GPU
[18] GPU_GENERICC
AK20
AJ24
AH26
AH24
GENERICC
GENERICD
GENERICE_HPD4
GENERICF_HPD5
GENERICG_HPD6
NC_TSVSSQ
PS_0
h
AF33
AM34
R5012
R5013
EV@0_4
EV@0_4
NC_TSVSSQ should be tied
to GND on Thames/Whistler/Seymour
PS_0 should be tied to GND on

Thames/Whistler/Seymour
R5004
EV@10K/F_4
5
T5024 AC30
.c
CEC_1
AK24 PS_1 AD31 3 4 GPU_SMBDAT
R5014
[27] EXT_HDMI_HPD HPD1 MLPS [27,37] 3ND_MBDATA
EV@499/F_4 Q5047B EV@2N7002KDW_115MA
GPU_VREFG AH13 PS_2 AG31 PS_1,PS_2, PS_3 are NC on

VREFG Thames/Whistler/Seymour
R5015 C5038
R5016 PX4@0_4 AL21 BACO AD33
EV@249/F_4 PS_3
EV@0.1U/10V_4X
[25] PX_EN
R5017 *EV@0_4
PX_EN DAC Power
w
DDC/AUX +1.8V_GPU
DEBUG AM26
DDC1CLK EV_HDMI_DDCCLK [27]
R5018 EV@1K_4 AD28
TESTEN
DDC1DATA
AN26
EV_HDMI_DDCDAT [27] HDMI DAC1 Analog Power
1.8V@18mA
AM27
R5019 *EV@5.11K/F_4 AUX1P AL27 AVDD L5000 EV@BLM15BD121SN1D_300MA
+3V_D AUX1N
T5038 AM23 DDC2CLK AM19
w
JTAG_TRSTB EV_LVDS_DDCCLK [28]

T5042
T5043
AN23
AK23 JTAG_TDI
JTAG_TCK
DDC2DATA AL19
EV_LVDS_DDCDAT [28] LVDS C5032 C5033
EV@0.1U/10V_4X EV@1U/6.3V_4X
C5034
EV@4.7U/6.3V_6X
T5044 AL24 AN20
T5045 AM24 JTAG_TMS AUX2P AM20
JTAG_TDO AUX2N
DDCCLK_AUX3P AL30
EV_CRTDCLK [28]
DDCDATA_AUX3N AM30
EV_CRTDDAT [28] CRT DAC1 Digital Power
1.8V@117mA
THERMAL DDCCLK_AUX4P AL29
w
T5037 AF29 DDCDATA_AUX4N AM29 VDD1DI L5001 EV@BLM15BD121SN1D_300MA

T5039 AG29 DPLUS
DMINUS AN21
DDCCLK_AUX5P
DDCDATA_AUX5N AM21 C5035 C5036 C5037
+3V_D R5020 EV@10K/F_4 AK32 EV@0.1U/10V_4X EV@1U/6.3V_4X EV@4.7U/6.3V_6X
PU:Disable MLPS GPIO_28_FDO AK30
DDCCLK_AUX6P
PD:Enable MLPS R5021 *EV@10K/F_4 AL31 DDCDATA_AUX6N AK29
1.8V@8mA TS_A
DDCVGACLK AJ30
AJ32 AJ31 EV_CRTDCLK_aux [28]
+1.8V_GPU L5002 EV@BLM15BD121SN1D_300MA TSVDD DDCVGADATA
AJ33 TSVDD EV_CRTDDAT_aux [28]
on-die thermal sensor power C5039 C5040 C5041 TSVSS
B2A Quanta Computer Inc.
EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X EV@HEATHROW M2 PROJECT : Chief River
A1A
02_Thames_M2/ GPIO_DP_CRT_I2C
VGA/GCK/LDV
17
Display phase-locked loop power.
1.8V@75mA Dedicated analog power pin for the display and DISPCLK PLLs. B2A DPE/DPF/LVDS
+1.8V_GPU L5003 EV@PBY160808T-501Y-N_1.2A DPLL_PVDD
R9588 OEV@10K_4
C5042 C5043 C5044 U5000G
EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X U5000I PART 7 0F 9
m
PART 9 0F 9
B2A VARY_BL AK27
AJ27
EV_LVDS_BRIGHT [28]
LVDS CONTROL DIGON EV_LVDS_DIGON [28]
C3A
Display phase-locked loop power.
1V@140mA Dedicated digital power pin for the display PLLs. AM32 XTALIN AV33 GPU_XTALIN C5045 EV@22P/50V_4N TXCLK_UP_DPF3P AK35
o
DPLL_PVDD AL36
TXCLK_UN_DPF3N
2
L5004 EV@PBY160808T-501Y-N_1.2A DPLL_VDDC AN31
+1V_GPU DPLL_VDDC R5024 Y5000 TXOUT_U0P_DPF2P AJ38
C5046 C5047 C5048
AN32
EV@1M/F_4 EV@27MHZ_20 B2A TXOUT_U0N_DPF2N AK37
Brazos use DPF interface
DPLL_PVSS
.c
EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X TXOUT_U1P_DPF1P AH35 to LVDS display
XTALOUT AU34 GPU_XTALOUT R5025 EV@0_4 C5049 EV@22P/50V_4N TXOUT_U1N_DPF1N AJ36
TXOUT_U2P_DPF0P AG38
TXOUT_U2N_DPF0N AH37
Memory phase-locked loop power. H7
MPLL_PVDD
LVTMDP
1.8V@150mA Dedicated analog power pin for the memory PLLs. H8 TXOUT_U3P AF35
MPLL_PVDD AG36
TXOUT_U3N
L5005 EV@PBY160808T-501Y-N_1.2A MPLL_PVDD XO_IN AW34 T5040
+1.8V_GPU
PLLS/XTAL
x
C5050 C5051 C5052 AM10
SPLL_PVDD
EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X TXCLK_LP_DPE3P AP34
AR34 EV_TXLCLKOUT+ [28]
TXCLK_LN_DPE3N EV_TXLCLKOUT- [28]
AN9 XO_IN2 AW35 T5041
fi
SPLL_VDDC AW37
TXOUT_L0P_DPE2P EV_TXLOUT0+ [28]
TXOUT_L0N_DPE2N AU35
EV_TXLOUT0- [28]
Engine phase-locked loop power. AN10 TXOUT_L1P_DPE1P AR37
SPLL_PVSS AU39
EV_TXLOUT1+ [28]
1.8V@75mA Dedicated analog power pin for the engine and UVD PLLs. TXOUT_L1N_DPE1N EV_TXLOUT1- [28]
L5006 EV@BLM15BD121SN1D_300MA SPLL_PVDD TXOUT_L2P_DPE0P AP35
+1.8V_GPU EV_TXLOUT2+ [28]
a
CLKTESTA AK10 CLKTESTA TXOUT_L2N_DPE0N AR35
AF30 AL10 EV_TXLOUT2- [28]
C5053 C5054 C5055 CLKTESTB CLKTESTB
AF31 NC_XTAL_PVDD AN36
NC_XTAL_PVSS TXOUT_L3P
EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X TXOUT_L3N AP37
C5056 C5057
in
*EV@0.1U/10V_4X *EV@0.1U/10V_4X
Engine phase-locked loop power. EV@HEATHROW M2

1V@150mA Dedicated digital power pin for the engine and UVD PLLs. EV@HEATHROW M2
R5026 R5027
+1V_GPU L5007 EV@PBY160808T-501Y-N_1.2A SPLL_VDDC *EV@51.1/F_4 *EV@51.1/F_4
C5058 C5059 C5060
EV@4.7U/6.3V_6X EV@1U/6.3V_4X
DPLL_PVDD R5028
EV@0.1U/10V_4X
*EV@0_4
h
.c
R5029 *EV@0_4
w

w

A1A
Thames_M2/ XTAL_LVDS
w
VGA/VGA-Strap
[16] GPU_GPIO0
R5030
R5031
EV@10K_4
EV@10K_4
+3V_D
[16] RAM_STRAP0
R5047
R5048
Sam@10K_4
Hyn@10K_4
+1.8V_GPU
18
[16] GPU_GPIO1
R5125 AMD@10K_4 CONFIGURATION STRAPS -- SEE EACH DATABOOK FOR STRAP DETAILS
[16] GPU_GPIO2 R5032 *EV@10K_4 ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
R5033 *EV@10K_4 R5049 AMD@10K_4 +1.8V_GPU
[16] GPU_GPIO9 [16] RAM_STRAP1
R5034 EV@10K_4 R5050 Sam@10K_4 STRAPS MLPS GPIO PIN DESCRIPTION OF DEFAULT SETTINGS MB Default Setting(IC internal PD)
[16] GPU_GPIO11
R5035 *EV@10K_4 R5134 Hyn@10K_4
[16] GPU_GPIO12
MLPS_DISABLE NA GPIO_28_FDO Enable MLPS, NA for Thames/Whistler/Seymour 1
R5036 *EV@10K_4
[16] GPU_GPIO13 0: Enable MLPS, disable GPIO PINSTRAP
1: Disable MLPS, enable GPIO PINSTRAP
R5038 *EV@10K_4 R5051 2G@10K_4 +1.8V_GPU
[16] GPU_GPIO22 [16] RAM_STRAP2
R5039 *EV@10K_4 R5127 1G8@10K_4 +1.8V_GPU TX_PWRS_ENB PS_1[4] GPIO0 Transmitter Power Savings Enable
[16] GENIL_VSYNC
0: 50% Tx output swing 1
R5041 OEV@10K_4 1: Full Tx output swing
[16,28] EXT_HSYNC
R5052 512M@10K_4
R5042 OEV@10K_4
m
[16,28] EXT_VSYNC TX_DEEMPH_EN PS_1[5] GPIO1 PCIE Transmitter De-emphasis Enable 1
R5135 1G4@10K_4 0: Tx de-emphasis disabled
R5043 *EV@10K_4 1: Tx de-emphasis enabled
[16] GENIL_CLK
R5151 4G@10K_4
[16] GPU_GPIO8 R5044 *EV@10K_4 BIF_GEN3_EN_A GPIO2 PCIE Gen3 Enable (NOTE: RESERVED for Thames/Whistler/Seymour) 0
PS_1[1]
0: GEN3 not supported at power-on
R5045 *EV@10K_4 1: GEN3 supported at power-on
[16] GPU_GPIO21
R5053 1G4@10K_4
[16] RAM_STRAP3 +1.8V_GPU
R5046 *EV@10K_4 BIF_VGA DIS GPIO9 VGA Control 0
[16] GPU_GENERICC PS_2[4]
R5128 2G@10K_4 +1.8V_GPU 0: VGA controller capacity enabled
R5145 *EV@10K_4
[16] GPU_GPIO10 1: VGA controller capacity disabled (for multi-GPU)
o
R5054 512M@10K_4
R5152 1G8@10K_4 ROMIDCFG[2:0] PS_0[3..1] GPIO[13:11] Serial ROM type or Memory Aperture Size Select
R5153 4G@10K_4 XXX
If GPIO22 = 0, defines memory aperture size
If GPIO22 = 1, defines ROM type
100 - 512Kbit M25P05A (ST)
R5055 4G@10K_4 +1.8V_GPU 101 - 1Mbit M25P10A (ST)
[16] RAM_STRAP4
.c
101 - 2Mbit M25P20 (ST)
R5056 512M@10K_4 101 - 4Mbit M25P40 (ST)
101 - 8Mbit M25P80 (ST)
100 - 512Kbit Pm25LV512 (Chingis)
R5154 1G4@10K_4 101 - 1Mbit Pm25LV010 (Chingis)
R5155 1G8@10K_4 BIOS_ROM_EN PS_2[3] GPIO22 Enable external BIOS ROM device 0
0: Disabled
R5156 2G@10K_4 1: Enabled
AUD[1] NA HSYNC 00 - No audio function XX

AUD[0] NA VSYNC 01 - Audio for DP only
10 - Audio for DP and HDMI if dongle is detected
11 - Audio for both DP and HDMI
x
HDMI must only be enabled on systems that are legally entitled. It is the
responsibility of the system designer to ensure that the system is entitled to
support this feature.
CEC_DIS PS_0[4] GENLK_VSYNC Enable CEC function. Reserved for Thames/Whistler/Seymour 0

0: Disabled
1: Enabled
DDR3 Memory TYPE Size Vendor
fi
RAM_STRAP4 RAM_STRAP3 RAM_STRAP2 RAM_STRAP1 RAM_STRAP0 NOTE: ALLOW FOR PULLUP PADS FOR THE RESERVED STRAPS BUT DO NOT INSTALL RESISTOR
Vendor Vendor P/N STN B/S P/N Size IF THESE GPIOS ARE USEED, THEY MUST KEEP LOW AND NOT CONFLICT DURING RESET
DVPDATA_4 DVPDATA_3 DVPDATA_2 DVPDATA_1 DVPDATA_0
RESERVED PS_1[3] GENLK_CLK Reserved 0
RESERVED PS_1[2] GPIO8 Reserved 0
H5TQ1G63DFR-11C AKD5LZWTW02 *4 512MB 512@ & Hyn@
0 0 0 0 0 RESERVED
RESERVED
NA
NA
GPIO21
GENERICC
Reserved
Reserved (for Thames/Whistler/Seymour only)
0
0
a
(64M*16)
Hynix
AKD5LZWTW02 *8 1GB 1G8@ & Hyn@
0 0 1 0 0 AUD_PORT_CONN_PINSTRAP[2] PS_3[5] NA STRAPS TO INDICATE THE NUMBER OF AUDIO CAPABLE DISPLAY OUTPUTS XXX
AUD_PORT_CONN_PINSTRAP[1] PS_3[4] NA 111 = 0 usable endpoints
NA 110 = 1 usable endpoints
AUD_PORT_CONN_PINSTRAP[0] PS_0[5]
H5TQ2G63BFR-11C AKD5MGWTW00 * 4
1GB 0 0 101 = 2 usable endpoints
0 1 0 1G4@ & Hyn@ 100 = 3 usable endpoints
in
011 = 4 usable endpoints
(128M*16) 010 = 5 usable endpoints
001 = 6 usable endpoints
AKD5MGWTW00 * 8 2GB 0 1 1 0 0 2G@ & Hyn@

000 = all endpoints are usable
H5TQ4G****** 4GB 1 0 0 4G@ & Hyn@ System Memory Aperture size

(256M*16) AK************* *8 0 0
K4W1G1646G-BC11
(64M*16)
AKD5EGGT500 *4 512MB 0
0
0
0
0
1
0
0
h1
1
512@ & Sam@
1G8@ & Sam@

GPIO22
BIOSROM
0 128M
GPIO13 GPIO12 GPIO11
ROMIDCFG2
0
ROMIDCFG1 ROMIDCFG0
0 0
.c
AKD5EGGT500 *8 1GB 0 256M 0 0 1
Samsung 0 1 0 0 1 1G4@ & Sam@ 0 64M 0 1 0
K4W2G1646C-HC11 AKD5MGWT500 * 4
1GB
(128M*16) 0 32M 0 1 1
0 1 1 0 1 2G@ & Sam@
AKD5MGWT500 * 8 2GB
w
K4W4G****** 1 0 0 0 1 4G@ & Sam@

(256M*16) AK************* *8 4GB
23EY2387MC11 AKD5EZWT700 *4 0 0 0 1 0 512@ & AMD@

512MB
w
(64M*16)
AKD5EZWT700 *8 1G8@ & AMD@
1GB 0 0 1 1 0
AMD 1GB 1G4@ & AMD@
23EY4187MC11 AKD5DZWT700 *4 0 1 0 1 0
w
(128M*16)
AKD5DZWT700 * 8 0 1 1 2G@ & AMD@

2GB 1 0
23EY********** 4G@ & AMD@
(256M*16) AK************* *8 4GB 1 0 0 1 0
A1A
Thames_M2/ STRAPS_Thermal
VGA
19
U5000E
PCIe IO power. +1.8V_GPU
+1.5V_GPU
PART 5 0F 9
(1.8V@440mA)
(1.5V@2.2A / DDR3 128bits 900MHz) MEM I/O
AC7 NC_PCIE_VDDR AA31 PCIE_VDDR L5008 EV@HCB1608KF-181T15_1.5A
AD11 VDDR1 AA32
VDDR1 NC_PCIE_VDDR
AF7 NC_PCIE_VDDR AA33
C5062 C5063 C5064 C5065 AG10 VDDR1 AA34 C5066 C5067 C5068 C5069 C5070
VDDR1 NC_PCIE_VDDR
EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X AJ7 NC_PCIE_VDDR W30 EV@0.01U/25V_4X EV@0.1U/10V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@4.7U/6.3V_6X
AK8 VDDR1 Y31
VDDR1 NC_PCIE_VDDR
AL9 NC_BIF_VDDC V28
G11 VDDR1 W29
VDDR1 NC_BIF_VDDC
G14 PCIE_PVDD AB37
VDDR1
PCIE
G17
G20 VDDR1 G30
VDDR1 PCIE_VDDC
C5071 C5084 C5072 C5073 C5074 C5085 C5075 G23 PCIE_VDDC G31 PCIe digital power supply. +1V_GPU
EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X G26 VDDR1 H29
VDDR1 PCIE_VDDC
G29 PCIE_VDDC H30
H10 VDDR1 J29
VDDR1 PCIE_VDDC
J7 PCIE_VDDC J30
J9 VDDR1 L28 C5076 C5077 C5078 C5079 C5086 C5087
VDDR1 PCIE_VDDC
K11 PCIE_VDDC M28 EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@4.7U/6.3V_6X
K13 VDDR1 N28
VDDR1 PCIE_VDDC
m
C5080 C5081 C5082 C5083 K8 PCIE_VDDC R28
EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X L12 VDDR1 T28
VDDR1 PCIE_VDDC
L16 PCIE_VDDC U28
L21 VDDR1 +BIF_VDDC
L23 VDDR1 Separate core power for the PCIe bus logic.
L26 VDDR1 N27 In non-BACO designs, connect to VDDC.
VDDR1 BIF_VDDC
L7 BACO BIF_VDDC T27 In BACO designs, must be the same voltage as VDDC when the GPU is operating,
M11 VDDR1
C5088 C5089 C5090 C5091 N11 VDDR1 C5092 C5093
EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X P7 VDDR1 AA15 EV@1U/6.3V_4X EV@4.7U/6.3V_6X
VDDR1 VDDC
o
R11 CORE VDDC AA17
U11 VDDR1 AA20
VDDR1 VDDC
U7 VDDC AA22
Y11 VDDR1 AA24
VDDR1 VDDC
Y7 VDDC AA27 Dedicated core power, provides power to the internal logic.
VDDR1 AB16 +VGPU_CORE
VDDC
Level translation between core and I/O, VDDC AB18 (0.9~1V@30A)
excluding memory receivers. VDDC AB21
.c
VDDC AB23
(1.8V@17mA) VDDC AB26
LEVEL AB28 C5094 C5095 C5096 C5097 C5098
TRANSLATION VDDC
+1.8V_GPU L5009 EV@BLM15BD121SN1D_300MA VDDC_CT AF26 VDDC AC17 EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X
AF27 VDD_CT AC20
VDD_CT VDDC
AG26 VDDC AC22
C5099 C5100 C5101 AG27 VDD_CT AC24
VDD_CT VDDC
I/O power for 3.3-V pins, such as GPIOs. EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X VDDC AC27
VDDC AD18
(3.3V@60mA) VDDC AD21
AF23
I/O AD23
VDDR3 VDDC
L5010 EV@FCM1005KF-221T03_300MA VDDR3 AF24 AD26
x
+3V_D VDDR3 VDDC
AG23 VDDC AF17 C5102 C5103 C5104 C5105 C5106 C5107 C5108 C5109 C5110 C5111
AG24 VDDR3 AF20 EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X
VDDR3 VDDC
C3A C5112
EV@4.7U/6.3V_6X
C5113
EV@1U/6.3V_4X
C5114
EV@1U/6.3V_4X
VDDC AF22
AG16
DVP VDDC
AD12 VDDC AG18
AF11 VDDR4
Power for all DVP pins; DVPDATA_[23:0]—DVO or GPIO. AF12 VDDR4 AH22
fi
VDDR4 VDDC
(1.8V@170mA) AF13 VDDC AH27
VDDR4 AH28
VDDC
+1.8V_GPU L5011 EV@FCM1005KF-221T03_300MA VDDR4 VDDC M26
AF15 VDDC N24 C5115 C5116 C5117 C5118 C5119 C5120 C5121 C5122 C5123 C5124
AG11 VDDR4 R18 EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X
VDDR4 VDDC
C3A C5125
EV@4.7U/6.3V_6X
C5126
EV@1U/6.3V_4X
C5127
EV@0.1U/10V_4X
AG13
AG15 VDDR4 VDDC
VDDC
R21
R23
VDDR4 R26
VDDC
VDDC T17
a
VDDC T20
VDDC T22
VDDC T24
VDDC U16
VDDC U18
VDDC U21
VDDC U23
in
VDDC U26
VDDC V17
VDDC V20
VDDC V22
VDDC V24
VDDC V27 Isolated (clean) core power for the l/O logic.
VDDC Y16
VDDC Y18 (0.9V~1V@3.8A / DDR3 128bits 900MHz)
Y21 +VGPU_CORE
VDDC
VDDC Y23
VDDC Y26
VDDC Y28 L5012 EV@HCB1608KF-121T30_3A
h VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
AA13
AB13
AC12
AC15
AD13
AD16
M15
VDDCI
C5128
EV@1U/6.3V_4X
C5129
EV@1U/6.3V_4X
C5130
EV@1U/6.3V_4X
L5013
C5131
EV@1U/6.3V_4X
EV@HCB1608KF-121T30_3A
.c
VDDCI M16
VDDCI M18
VOLTAGE M23
ISOLATED
CORE I/O
VDDCI
SENESE VDDCI N13
R9532 *EV@0_4 AF28 VDDCI N15
[47] GPU_CORE_SEN
R9533 *EV@0_4 FB_VDDC N17 C5132 C5133 C5134 C5135 C5136 C5137
[47] GPU_CORE_RTN VDDCI
VDDCI N20 EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X
AG28 VDDCI N22
FB_VDDCI R12
VDDCI
VDDCI R13
AH29 VDDCI R16
FB_GND
VDDCI T12 Quanta Computer Inc.
w
VDDCI T15
VDDCI
VDDCI
V15
Y13 PROJECT : Chief River
A1A
Thames_M2/ MainPower
EV@HEATHROW M2
w
w
VGA
20
DP/TMDS/LVDS Transmitter Power
0.935V@222mA per port
U5000H
(1V@222mA)
PART 8 0F 9
DPAB_VDD10 L5014 EV@PBY160808T-501Y-N_1.2A
+1V_GPU
m
DP_VDDR DP_VDDC
DP/TMDS/LVDS Transmitter Power DP_VDDC AP31 C5141 C5142 C5143
DP_VDDC AP32
DP mode: 1.8V@188mA per port DP_VDDC AN33 EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X
HDMI mode: 1.8V@237mA per port DP_VDDC AP33
AN24 (1V@222mA)
(1.8V@237mA) AP24 DP_VDDR AP13
DP_VDDR DP_VDDC
o
AP25 DP_VDDC AT13 DPCD_VDD10 L5016 EV@PBY160808T-501Y-N_1.2A
DP_VDDR +1V_GPU
L5015 EV@PBY160808T-501Y-N_1.2A DPAB_VDD18 AP26 DP_VDDC AP14
+1.8V_GPU DP_VDDR
AU28 DP_VDDC AP15 C5144 C5145 C5146
AV29 DP_VDDR
C5138 C5139 C5140 DP_VDDR AL33 EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X
DP_VDDC
EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X DP_VDDC AM33
.c
AP20 DP_VDDC AK33 (1V@222mA)
AP21 DP_VDDR DP_VDDC AK34
(1.8V@237mA) AP22 DP_VDDR DPEF_VDD10 L5017 EV@PBY160808T-501Y-N_1.2A
DP_VDDR +1V_GPU
AP23
L5018 EV@PBY160808T-501Y-N_1.2A DPCD_VDD18 AU18 DP_VDDR C5147 C5148 C5149
+1.8V_GPU DP_VDDR
AV19 DP GND
DP_VDDR EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X
C5150 C5151 C5152 DP_VSSR AN27
x
EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X AH34 DP_VSSR AP27
AJ34 DP_VDDR AP28
AF34 DP_VDDR DP_VSSR AW24
(1.8V@237mA) DP_VDDR DP_VSSR
AG34 DP_VSSR AW26
AM37 DP_VDDR DP_VSSR AN29
DP_VDDR
fi
L5019 EV@PBY160808T-501Y-N_1.2A DPEF_VDD18 AL38 DP_VSSR AP29
+1.8V_GPU DP_VDDR
DP_VSSR AP30
DP_VSSR AW30
C5153 C5154 C5155 DP_VSSR AW32
EV@4.7U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X DP_VSSR AN17
DP_VSSR AP16
AP17 +1V_GPU E3A
DP_VSSR
a
DP_VSSR AW14
DP_VSSR AW16
DP_VSSR AN19
DP_VSSR AP18
DP_VSSR AP19 C5584 C5585
AW20
in
DP_VSSR AW22
EV@39P/50V_4N EV@39P/50V_4N
CALIBRATION DP_VSSR
DP_VSSR AN34
DP_VSSR AP39
R5057 EV@150/F_4 AW28 DP_VSSR AR39
DPAB_CALR AU37
DP_VSSR AF39
DP_VSSR
DP_VSSR AH39
R5058 EV@150/F_4 AW18 DP_VSSR AK39
DPCD_CALR
R5059 EV@150/F_4 AM39

DPEF_CALR
h DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
AL34
AV27
AR28
AV17
AR18
AN38
.c
DP_VSSR AM35
DP_VSSR
w
EV@HEATHROW M2
w

A1A
Thames_M2/ DP_Powers
w

VGA
AB39
PART 6 0F 9
U5000F
A3
21
PCIE_VSS GND
E39 GND A37
F34 PCIE_VSS AA16
PCIE_VSS GND
F39 GND AA18
G33 PCIE_VSS AA2
PCIE_VSS GND
G34 GND AA21
H31 PCIE_VSS AA23
PCIE_VSS GND
H34 GND AA26
H39 PCIE_VSS GND AA28
J31 PCIE_VSS AA6
PCIE_VSS GND
J34 GND AB12
K31 PCIE_VSS AB15
PCIE_VSS GND
K34 GND AB17
K39 PCIE_VSS GND AB20
L31 PCIE_VSS AB22
PCIE_VSS GND
L34 GND AB24
M34 PCIE_VSS AB27
PCIE_VSS GND
M39 GND AC11
m
N31 PCIE_VSS GND AC13
N34 PCIE_VSS AC16
PCIE_VSS GND
P31 GND AC18
P34 PCIE_VSS AC2
PCIE_VSS GND
P39 GND AC21
R34 PCIE_VSS GND AC23
T31 PCIE_VSS AC26
PCIE_VSS GND
T34 GND AC28
T39 PCIE_VSS AC6
PCIE_VSS GND
U31 GND AD15
o
U34 PCIE_VSS GND AD17
V34 PCIE_VSS AD20
PCIE_VSS GND
V39 GND AD22
W31 PCIE_VSS AD24
PCIE_VSS GND
W34 GND AD27
Y34 PCIE_VSS GND AD9
Y39 PCIE_VSS AE2
PCIE_VSS GND
AE6
.c
GND
GND AF10
GND AF16
GND AF18
GND AF21
GND GND AG17
F15 GND AG2
F17 GND AG20
GND GND
F19 GND AG22
F21 GND AG6
GND GND
F23 GND AG9
F25 GND AH21
GND GND
F27 GND AJ10
x
F29 GND GND AJ11
F31 GND AJ2
GND GND
F33 GND AJ28
F7 GND AJ6
GND GND
F9 GND AK11
G2 GND GND AK31
G6 GND AK7
GND
fi
H9 GND AL11
GND GND
J2 GND AL14
J27 GND AL17
GND GND
J6 GND AL2
J8 GND AL20
GND GND
K14
K7 GND AL23
GND GND
L11 GND AL26
L17 GND GND AL32
GND
a
L2 GND AL6
L22 GND AL8
GND GND
L24 GND AM11
L6 GND AM31
GND GND
M17 GND AM9
M22 GND AN11
GND GND
M24 GND AN2
N16 GND AN30
GND
in
N18 GND AN6
GND GND
N2 GND AN8
N21 GND AP11
GND GND
N23 GND AP7
N26 GND AP9
GND GND
N6 GND AR5
R15 GND GND B11
R17 GND B13
GND GND
R2 GND B15
R20 GND B17
GND GND
R22 GND B19
R24 GND GND B21
R27
R6
T11
T13
T16
T18
T21
T23
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
B23
B25
B27
B29
B31
B33
B7
B9
h
.c
GND GND
T26 GND C1
U15 GND GND C39
U17 GND E35
GND GND
U2 GND E5
U20 GND F11
GND GND
U22 GND F13
U24 GND
U27 GND
U6 GND
V11 GND
V16 GND
V18 GND
w
V21 GND
V23 GND
V26 GND
W2 GND
W6 GND
Y15 GND
Y17 GND
Y20 GND
Y22 GND A39
VSS_MECH
w
Y24 GND VSS_MECH AW1

Y27 GND AW39
GND VSS_MECH
EV@HEATHROW M2
w

A1A
Thames_M2/ GND
VGA
[24] VMB_DQ[63..0]
[24] VMB_DM[7..0]
VMB_DQ[63..0]
VMB_DM[7..0]
U5000D
22
U5000C VMB_RDQS[7..0]
[24] VMB_RDQS[7..0]
PART 4 0F 9
PART 3 0F 9 VMB_WDQS[7..0] GDDR5/DDR3
VMA_DQ[63..0] [24] VMB_WDQS[7..0] C5 P8
GDDR5/DDR3 VMB_DQ0 MAB0_0/MAB_0 VMB_MA0
[23] VMA_DQ[63..0]
VMA_DQ0 C37 MAA0_0/MAA_0 G24 VMA_MA0 VMB_DQ1 C3 DQB0_0 T9 VMB_MA1
VMA_DM[7..0] DQA0_0 VMB_MA[14..0] DQB0_1 MAB0_1/MAB_1
VMA_DQ1 C35 MAA0_1/MAA_1 J23 VMA_MA1 VMB_DQ2 E3 MAB0_2/MAB_2 P9 VMB_MA2
[23] VMA_DM[7..0]
A35 DQA0_1 H24 [24] VMB_MA[14..0]
E1 DQB0_2 N7
VMA_DQ2
DQA0_2 MAA0_2/MAA_2 VMA_MA2 VMB_DQ3 MAB0_3/MAB_3 VMB_MA3
VMA_RDQS[7..0] VMA_DQ3 E34 MAA0_3/MAA_3 J24 VMA_MA3 VMB_DQ4 F1 DQB0_3 MAB0_4/MAB_4 N8 VMB_MA4
[23] VMA_RDQS[7..0]
G32 DQA0_3 H26 F3 DQB0_4 N9
VMA_DQ4
DQA0_4 MAA0_4/MAA_4 VMA_MA4 VMB_BA0 VMB_DQ5 MAB0_5/MAB_5 VMB_MA5
VMA_WDQS[7..0] VMA_DQ5 D33 MAA0_5/MAA_5 J26 VMA_MA5
[24] VMB_BA0
VMB_BA1 VMB_DQ6 F5 DQB0_5 U9 VMB_MA6
[23] VMA_WDQS[7..0] DQA0_5 [24] VMB_BA1 DQB0_6 MAB0_6/MAB_6
VMA_DQ6 F32 MAA0_6/MAA_6 H21 VMA_MA6 VMB_BA2 VMB_DQ7 G4 MAB0_7/MAB_7 U8 VMB_MA7
E32 DQA0_6 G21 [24] VMB_BA2 H5 DQB0_7 Y9
VMA_DQ7
VMA_DQ8 D31 MAA1_0/MAA_8 H19 VMA_MA8 VMB_DQ9 H6 DQB0_8 MAB1_1/MAB_9 W9 VMB_MA9
VMA_MA[14..0] F30 DQA0_8 H20 J4 DQB0_9 AC8
VMA_DQ9
[23] VMA_MA[14..0]
VMA_DQ10 C30 MAA1_2/MAA_10 L13 VMA_MA10 VMB_DQ11 K6 DQB0_10 AC9 VMB_MA11
DQA0_10 DQB0_11 MAB1_3/MAB_11
VMA_DQ11 A30 MAA1_3/MAA_11 G16 VMA_MA11 VMB_DQ12 K5 MAB1_4/MAB_12 AA7 VMB_MA12
F28 DQA0_11 J16 L4 DQB0_12 AA8
MEMORY INTERFACE B
VMA_BA0 VMA_DQ12 MAA1_4/MAA_12 VMA_MA12 VMB_DQ13 MAB1_5/BA2 VMB_BA2
m
[23] VMA_BA0
C28 DQA0_12 H16 M6 DQB0_13 Y8
VMA_BA1 VMA_DQ13
DQA0_13 MAA1_5/MAA_BA2 VMA_BA2 VMB_DQ14 MAB1_6/BA0 VMB_BA0
[23] VMA_BA1
VMA_BA2 VMA_DQ14 A28 MAA1_6/MAA_BA0 J17 VMA_BA0 VMB_DQ15 M1 DQB0_14 AA9 VMB_BA1
[23] VMA_BA2 DQA0_14 DQB0_15 MAB1_7/BA1
VMA_DQ15 E28 MAA1_7/MAA_BA1 H17 VMA_BA1 VMB_DQ16 M3
DQA0_15 DQB0_16
MEMORY INTERFACE A
VMA_DQ16 D27 VMB_DQ17 M5 WCKB0_0/DQMB_0 H3 VMB_DM0
F26 DQA0_16 A32 N4 DQB0_17 H1
VMA_DQ17
DQA0_17 WCKA0_0/DQMA_0 VMA_DM0 VMB_DQ18 WCKB0B_0/DQMB_1 VMB_DM1
VMA_DQ18 C26 WCKA0B_0/DQMA_1 C32 VMA_DM1 VMB_DQ19 P6 DQB0_18 WCKB0_1/DQMB_2 T3 VMB_DM2
A26 DQA0_18 D23 P5 DQB0_19 T5
VMA_DQ19
VMA_DQ20 F24 WCKA0B_1/DQMA_3 E22 VMA_DM3 VMB_DQ21 R4 DQB0_20 AE4 VMB_DM4
DQA0_20 DQB0_21 WCKB1_0/DQMB_4
VMA_DQ21 C24 WCKA1_0/DQMA_4 C14 VMA_DM4 VMB_DQ22 T6 WCKB1B_0/DQMB_5 AF5 VMB_DM5
A24 DQA0_21 A14 T1 DQB0_22 AK6
VMA_DQ22 WCKA1B_0/DQMA_5 VMA_DM5 VMB_DQ23 WCKB1_1/DQMB_6 VMB_DM6
o
E24 DQA0_22 E10 U4 DQB0_23 AK5
VMA_DQ23
VMA_DQ24 C22 WCKA1B_1/DQMA_7 D9 VMA_DM7 VMB_DQ25 V6 DQB0_24
VMA_DQ25 A22 DQA0_24 VMB_DQ26 V1 DQB0_25 F6 VMB_RDQS0
DQA0_25 DQB0_26 EDCB0_0/QSB_0
VMA_DQ26 F22 EDCA0_0/QSA_0 C34 VMA_RDQS0 VMB_DQ27 V3 EDCB0_1/QSB_1 K3 VMB_RDQS1
D21 DQA0_26 D29 Y6 DQB0_27 P3
VMA_DQ27
DQA0_27 EDCA0_1/QSA_1 VMA_RDQS1 VMB_DQ28 EDCB0_2/QSB_2 VMB_RDQS2
VMA_DQ28 A20 EDCA0_2/QSA_2 D25 VMA_RDQS2 VMB_DQ29 Y1 DQB0_28 EDCB0_3/QSB_3 V5 VMB_RDQS3 QSB[7..0]
F20 DQA0_28 E20 Y3 DQB0_29 AB5
VMA_DQ29
D19 E16 Y5 DQB0_30 AH1
.c
VMA_DQ30
VMA_DQ31 E18 EDCA1_1/QSA_5 E12 VMA_RDQS5 VMB_DQ32 AA4 DQB0_31 AJ9 VMB_RDQS6
DQA0_31 DQB1_0 EDCB1_2/QSB_6
VMA_DQ32 C18 EDCA1_2/QSA_6 J10 VMA_RDQS6 VMB_DQ33 AB6 EDCB1_3/QSB_7 AM5 VMB_RDQS7
A18 DQA1_0 D7 AB1 DQB1_1
VMA_DQ33
DQA1_1 EDCA1_3/QSA_7 VMA_RDQS7 VMB_DQ34
VMA_DQ34 F18 VMB_DQ35 AB3 DQB1_2 G7 VMB_WDQS0
DQA1_2 DQB1_3 DDBIB0_0/QSB_0B
VMA_DQ35 D17 DDBIA0_0/QSA_0B A34 VMA_WDQS0 VMB_DQ36 AD6 DDBIB0_1/QSB_1B K1 VMB_WDQS1
A16 DQA1_3 E30 AD1 DQB1_4 P1
VMA_DQ36
DQA1_4 DDBIA0_1/QSA_1B VMA_WDQS1 VMB_DQ37 DDBIB0_2/QSB_2B VMB_WDQS2
VMA_DQ37 F16 DDBIA0_2/QSA_2B E26 VMA_WDQS2 VMB_DQ38 AD3 DQB1_5 W4 VMB_WDQS3
DQA1_5 DQB1_6 DDBIB0_3/QSB_3B QSB#[7..0]
VMA_DQ38 D15 DDBIA0_3/QSA_3B C20 VMA_WDQS3 VMB_DQ39 AD5 DDBIB1_0/QSB_4B AC4 VMB_WDQS4
E14 DQA1_6 C16 AF1 DQB1_7 AH3
VMA_DQ39
DQA1_7 DDBIA1_0/QSA_4B VMA_WDQS4 VMB_DQ40 DDBIB1_1/QSB_5B VMB_WDQS5
VMA_DQ40 F14 DDBIA1_1/QSA_5B C12 VMA_WDQS5 VMB_DQ41 AF3 DQB1_8 AJ8 VMB_WDQS6
DQA1_8 DQB1_9 DDBIB1_2/QSB_6B
VMA_DQ41 D13 DDBIA1_2/QSA_6B J11 VMA_WDQS6 VMB_DQ42 AF6 DDBIB1_3/QSB_7B AM3 VMB_WDQS7
F12 DQA1_9 F8 AG4 DQB1_10
VMA_DQ42 DDBIA1_3/QSA_7B VMA_WDQS7 VMB_DQ43
x
VMA_DQ43 A12 DQA1_10 VMB_DQ44 AH5 DQB1_11 T7
D11 DQA1_11 J21 AH6 DQB1_12 ADBIB0/ODTB0 W7 VMB_ODT0 [24]
VMA_DQ44
DQA1_12 ADBIA0/ODTA0 VMB_DQ45
VMA_DQ45 F10 ADBIA1/ODTA1 G19 VMA_ODT0 [23]
VMB_DQ46 AJ4 DQB1_13 ADBIB1/ODTB1 VMB_ODT1 [24]
VMA_DQ46 A10 DQA1_13 VMA_ODT1 [23]
VMB_DQ47 AK3 DQB1_14 L9 VMB_CLK0
C10 DQA1_14 H27 VMA_CLK0 AF8 DQB1_15 CLKB0 L8 VMB_CLK0 [24]
VMA_DQ47
DQA1_15 CLKA0 VMA_CLK0 [23]
VMB_DQ48
CLKB0B
VMB_CLK0#
VMB_CLK0# [24]
VMA_DQ48 G13 CLKA0B G27 VMA_CLK0# VMB_DQ49 AF9 DQB1_16
VMA_DQ49 H13 DQA1_16 VMA_CLK0# [23]
VMB_DQ50 AG8 DQB1_17 AD8 VMB_CLK1
fi
VMA_DQ50 J13 DQA1_17
CLKA1 J14 VMA_CLK1 VMB_DQ51 AG7 DQB1_18 CLKB1 AD7 VMB_CLK1# VMB_CLK1 [24]
H11 DQA1_18 H14 VMA_CLK1# VMA_CLK1 [23]
AK9 DQB1_19 CLKB1B VMB_CLK1# [24]
VMA_DQ51
DQA1_19 CLKA1B VMB_DQ52
VMA_DQ52 G10 VMA_CLK1# [23]
VMB_DQ53 AL7 DQB1_20 T10 VMB_RAS0#
G8 DQA1_20 K23 AM8 DQB1_21 RASB0B Y10 VMB_RAS1#
VMB_RAS0# [24]
VMA_DQ53
DQA1_21 RASA0B VMA_RAS0# VMB_DQ54
VMA_DQ54 K9 RASA1B K19 VMA_RAS1#
VMA_RAS0# [23]
VMB_DQ55 AM7 DQB1_22 RASB1B VMB_RAS1# [24]
VMA_DQ55 K10 DQA1_22 VMA_RAS1# [23]
VMB_DQ56 AK1 DQB1_23 W10 VMB_CAS0#
G9 DQA1_23 K20 AL4 DQB1_24 CASB0B AA10 VMB_CAS1# VMB_CAS0# [24]
VMA_DQ56
DQA1_24 CASA0B VMA_CAS0# VMB_DQ57
+1.5V_GPU VMA_DQ57 A8 CASA1B K17 VMA_CAS1#
VMA_CAS0# [23]
+1.5V_GPU VMB_DQ58 AM6 DQB1_25 CASB1B VMB_CAS1# [24]
VMA_DQ58 C8 DQA1_25 VMA_CAS1# [23]
VMB_DQ59 AM1 DQB1_26 P10 VMB_CS0#
DQA1_26 DQB1_27 CSB0B_0 VMB_CS0# [24]
a
(0.7*VDDR1) VMA_DQ59 E8
DQA1_27 CSA0B_0 K24 VMA_CS0#
VMA_CS0# [23] (0.7*VDDR1) VMB_DQ60 AN4
DQB1_28 CSB0B_1
L10
VMA_DQ60 A6 CSA0B_1 K27 VMB_DQ61 AP3
VMA_DQ61 C6 DQA1_28 VMB_DQ62 AP1 DQB1_29 AD10 VMB_CS1#
E6 DQA1_29 M13 VMA_CS1# AP5 DQB1_30 CSB1B_0 AC10 VMB_CS1# [24]
Ra R5060 VMA_DQ62
DQA1_30 CSA1B_0 VMA_CS1# [23] Ra R5061 VMB_DQ63
EV@40.2/F_4 VMA_DQ63 A5 CSA1B_1 K16 EV@40.2/F_4 DQB1_31 CSB1B_1
DQA1_31 U10 VMB_CKE0
MVREFDA L18 CKEA0 K21 VMA_CKE0 MVREFDB Y12 CKEB0 AA11 VMB_CKE1 VMB_CKE0 [24]
MVREFSA L20 MVREFDA CKEA1 J20 VMA_CKE1
VMA_CKE0 [23]
MVREFSB AA12 MVREFDB CKEB1 VMB_CKE1 [24]
in
MVREFSA VMA_CKE1 [23] MVREFSB N10 VMB_WE0#
WEB0B VMB_WE0# [24]
R5063 Thames@243/F_4 L27 WEA0B K26 VMA_WE0# AB11 VMB_WE1#
+1.5V_GPU
Seymour@243/F_4 N12
NC_MEM_CALRN0 L15 VMA_WE0# [23] WEB1B VMB_WE1# [24]
Rb R5062 C5156 R5065
NC_MEM_CALRN1 WEA1B VMA_WE1#
VMA_WE1# [23] Rb R5064 C5157
EV@100/F_4 EV@1U/6.3V_4X R5066 Thames@243/F_4 AG12 EV@100/F_4 EV@1U/6.3V_4X
NC_MEM_CALRN2 T8 VMB_MA13
MAB0_8/MAB_13
R5067 Seymour@243/F_4 M12 MAA0_8/MAA_13 H23 VMA_MA13 MAB1_8/MAB_14 W8 VMB_MA14
M27 NC_MEM_CALRP1 J19 VMA_MA14 U12
R5068 Thames@243/F_4
MEM_CALRP0 MAA1_8/MAA_14 MAB0_9/MAB_15
R5069 Thames@243/F_4 AH12 MAA0_9/MAA_15 M21 MAB1_9/RSVD V12
MEM_CALRP2 M20
MAA1_9/RSVD
+1.5V_GPU +1.5V_GPU AH11 GPU_DRAM_RST
DRAM_RST
Ra R5070
EV@40.2/F_4
(0.7*VDDR1)
EV@HEATHROW M2
h Ra R5071
EV@40.2/F_4
(0.7*VDDR1)
EV@HEATHROW M2
.c
Rb R5072 C5158
Ball Name Thames Seymour Rb R5073 C5159
EV@100/F_4 EV@1U/6.3V_4X EV@100/F_4 EV@1U/6.3V_4X
MEM_CALRN0 243R X 25mm (max) 5mm (max) 25mm (max)
MEM_CALRN1 X 243R GPU_DRAM_RST R5074 EV@10/F_4 R5075 EV@51.1/F_4

MEM_RST# [23,24]
MEM_CALRN2 243R X R5076 C5160

EV@4.99K/F_4 EV@120P/50V_4N
w
MEM_CALRP0 243R X
MEM_CALRP1 X 243R
MEM_CALRP2 243R X Place all these componets very close to GPU (within 25mm)
and keep all components close to each other
w
** This basic topology should be used for DRAM_RAT for DDR3/GDDR5
These Capacitors and Resistor values arre an example only

The series R and || cap values will depend on the DRAM loads
and will have to be calculated for differrent Memory, DRAM loads and board
to pass Reset Signal Spec
w

A1A
Thames_M2/ MEM Interface
5 4 3 2 1
VMA_DQ[63..0]
CHANNEL A: 512MB DDR3 (64M*16*4pcs) <VGA>
23
[22] VMA_DQ[63..0]
VMA_DM[7..0]
[22] VMA_DM[7..0]
VMA_RDQS[7..0] QSA[7..0]
[22] VMA_RDQS[7..0]
VMA_WDQS[7..0] QSA#[7..0]
[22] VMA_WDQS[7..0]
U5004 U5005
VMA_MA[14..0] U5002 U5003
[22] VMA_MA[14..0] M8 E3 M8 E3
VREFC_VMA3 VMA_DQ54 VREFC_VMA4 VMA_DQ46
VREFC_VMA1 M8 E3 VMA_DQ5 VREFC_VMA2 M8 E3 VMA_DQ12 VREFD_VMA3 H1 VREFCA DQL0 F7 VMA_DQ50 VREFD_VMA4 H1 VREFCA DQL0 F7 VMA_DQ45
VREFD_VMA1 H1 VREFCA DQL0 F7 VMA_DQ0 VREFD_VMA2 H1 VREFCA DQL0 F7 VMA_DQ14 VREFDQ DQL1 F2 VMA_DQ53 VREFDQ DQL1 F2 VMA_DQ44
VREFDQ DQL1 F2 VMA_DQ6 VREFDQ DQL1 F2 VMA_DQ8 VMA_MA0 N3 DQL2 F8 VMA_DQ49 VMA_MA0 N3 DQL2 F8 VMA_DQ40
VMA_MA0 N3 DQL2 F8 VMA_DQ1 VMA_MA0 N3 DQL2 F8 VMA_DQ11 VMA_MA1 P7 A0 DQL3 H3 VMA_DQ52 VMA_MA1 P7 A0 DQL3 H3 VMA_DQ41
[22] VMA_MA0 P7 A0 DQL3 H3 P7 A0 DQL3 H3 P3 A1 DQL4 H8 P3 A1 DQL4 H8
VMA_MA1 VMA_DQ4 VMA_MA1 VMA_DQ10 VMA_MA2 VMA_DQ51 VMA_MA2 VMA_DQ42
[22] VMA_MA1 VMA_MA2 P3 A1 DQL4 H8 VMA_DQ3 VMA_MA2 P3 A1 DQL4 H8 VMA_DQ15 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ55 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ43
[22] VMA_MA2 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ7 VMA_MA3 N2 A2 DQL5 G2 VMA_DQ9 VMA_MA4 P8 A3 DQL6 H7 VMA_DQ48 VMA_MA4 P8 A3 DQL6 H7 VMA_DQ47
D [22] VMA_MA3 VMA_MA4 P8 A3 DQL6 H7 VMA_DQ2 VMA_MA4 P8 A3 DQL6 H7 VMA_DQ13 VMA_MA5 P2 A4 DQL7 VMA_MA5 P2 A4 DQL7 D
[22] VMA_MA4 VMA_MA5 P2 A4 DQL7 VMA_MA5 P2 A4 DQL7 VMA_MA6 R8 A5 VMA_MA6 R8 A5
[22] VMA_MA5 VMA_MA6 R8 A5 VMA_MA6 R8 A5 VMA_MA7 R2 A6 D7 VMA_DQ32 VMA_MA7 R2 A6 D7 VMA_DQ61
[22] VMA_MA6 VMA_MA7 R2 A6 D7 VMA_DQ24 VMA_MA7 R2 A6 D7 VMA_DQ20 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ36 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ58
[22] VMA_MA7 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ31 VMA_MA8 T8 A7 DQU0 C3 VMA_DQ19 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ33 VMA_MA9 R3 A8 DQU1 C8 VMA_DQ63
[22] VMA_MA8 R3 A8 DQU1 C8 R3 A8 DQU1 C8 L7 A9 DQU2 C2 L7 A9 DQU2 C2
[22] VMA_MA9 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ28 VMA_MA10 L7 A9 DQU2 C2 VMA_DQ17 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ34 VMA_MA11 R7 A10/AP DQU3 A7 VMA_DQ60
[22] VMA_MA10 R7 A10/AP DQU3 A7 R7 A10/AP DQU3 A7 N7 A11 DQU4 A2 N7 A11 DQU4 A2
[22] VMA_MA11 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ29 VMA_MA12 N7 A11 DQU4 A2 VMA_DQ16 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ35 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ62
[22] VMA_MA12 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ26 VMA_MA13 T3 A12/BC DQU5 B8 VMA_DQ21 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ38 VMA_MA14 T7 A13 DQU6 A3 VMA_DQ57
[22] VMA_MA13 T7 A13 DQU6 A3 T7 A13 DQU6 A3 M7 A14 DQU7 M7 A14 DQU7
VMA_MA14 VMA_DQ30 VMA_MA14 VMA_DQ18
[22] VMA_MA14 A14 DQU7 A14 DQU7 A15 A15
m
M7 M7 +1.5V_GPU +1.5V_GPU
A15 +1.5V_GPU A15 +1.5V_GPU
VMA_BA0 M2 B2 VMA_BA0 M2 B2
VMA_BA0 M2 B2 VMA_BA0 M2 B2 VMA_BA1 N8 BA0 VDD#B2 D9 VMA_BA1 N8 BA0 VDD#B2 D9
[22] VMA_BA0 N8 BA0 VDD#B2 D9 N8 BA0 VDD#B2 D9 M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7
VMA_BA1 VMA_BA1 VMA_BA2 VMA_BA2
[22] VMA_BA1 M3 BA1 VDD#D9 G7 M3 BA1 VDD#D9 G7 BA2 VDD#G7 K2 BA2 VDD#G7 K2
VMA_BA2 VMA_BA2
[22] VMA_BA2 BA2 VDD#G7 K2 BA2 VDD#G7 K2 VDD#K2 K8 VDD#K2 K8
VDD#K2 K8 VDD#K2 K8 VDD#K8 N1 VDD#K8 N1
VDD#K8 N1 VDD#K8 N1 VMA_CLK1 J7 VDD#N1 N9 VMA_CLK1 J7 VDD#N1 N9
J7 VDD#N1 N9 J7 VDD#N1 N9 [22] VMA_CLK1 K7 CK VDD#N9 R1 K7 CK VDD#N9 R1
VMA_CLK0 VMA_CLK0 VMA_CLK1# VMA_CLK1#
[22] VMA_CLK0 VMA_CLK0# K7 CK VDD#N9 R1 VMA_CLK0# K7 CK VDD#N9 R1 [22] VMA_CLK1# VMA_CKE1 K9 CK VDD#R1 R9 VMA_CKE1 K9 CK VDD#R1 R9
[22] VMA_CLK0# K9 CK VDD#R1 R9 K9 CK VDD#R1 R9 [22] VMA_CKE1 CKE VDD#R9 CKE VDD#R9
VMA_CKE0 VMA_CKE0 +1.5V_GPU +1.5V_GPU
[22] VMA_CKE0 CKE VDD#R9 CKE VDD#R9
o
+1.5V_GPU +1.5V_GPU
VMA_ODT1 K1 A1 VMA_ODT1 K1 A1
VMA_ODT0 K1 A1 VMA_ODT0 K1 A1 [22] VMA_ODT1 VMA_CS1# L2 ODT VDDQ#A1 A8 VMA_CS1# L2 ODT VDDQ#A1 A8
[22] VMA_ODT0 L2 ODT VDDQ#A1 A8 L2 ODT VDDQ#A1 A8 [22] VMA_CS1# J3 CS VDDQ#A8 C1 J3 CS VDDQ#A8 C1
VMA_CS0# VMA_CS0# VMA_RAS1# VMA_RAS1#
[22] VMA_CS0# J3 CS VDDQ#A8 C1 J3 CS VDDQ#A8 C1 [22] VMA_RAS1# K3 RAS VDDQ#C1 C9 K3 RAS VDDQ#C1 C9
VMA_RAS0# VMA_RAS0# VMA_CAS1# VMA_CAS1#
[22] VMA_RAS0# VMA_CAS0# K3 RAS VDDQ#C1 C9 VMA_CAS0# K3 RAS VDDQ#C1 C9 [22] VMA_CAS1# VMA_WE1# L3 CAS VDDQ#C9 D2 VMA_WE1# L3 CAS VDDQ#C9 D2
[22] VMA_CAS0# VMA_WE0# L3 CAS VDDQ#C9 D2 VMA_WE0# L3 CAS VDDQ#C9 D2 [22] VMA_WE1# WE VDDQ#D2 E9 WE VDDQ#D2 E9
[22] VMA_WE0# WE VDDQ#D2 E9 WE VDDQ#D2 E9 VDDQ#E9 F1 VDDQ#E9 F1
VDDQ#E9 F1 VDDQ#E9 F1 VMA_RDQS6 F3 VDDQ#F1 H2 VMA_RDQS5 F3 VDDQ#F1 H2
.c
VMA_RDQS0 F3 VDDQ#F1 H2 VMA_RDQS1 F3 VDDQ#F1 H2 VMA_RDQS4 C7 DQSL VDDQ#H2 H9 VMA_RDQS7 C7 DQSL VDDQ#H2 H9
VMA_RDQS3 C7 DQSL VDDQ#H2 H9 VMA_RDQS2 C7 DQSL VDDQ#H2 H9 DQSU VDDQ#H9 DQSU VDDQ#H9
DQSU VDDQ#H9 DQSU VDDQ#H9
VMA_DM6 E7 A9 VMA_DM5 E7 A9
VMA_DM0 E7 A9 VMA_DM1 E7 A9 VMA_DM4 D3 DML VSS#A9 B3 VMA_DM7 D3 DML VSS#A9 B3
C VMA_DM3 D3 DML VSS#A9 B3 VMA_DM2 D3 DML VSS#A9 B3 DMU VSS#B3 E1 DMU VSS#B3 E1 C
DMU VSS#B3 E1 DMU VSS#B3 E1 VSS#E1 G8 VSS#E1 G8
VSS#E1 G8 VSS#E1 G8 VMA_WDQS6 G3 VSS#G8 J2 VMA_WDQS5 G3 VSS#G8 J2
VMA_WDQS0 G3 VSS#G8 J2 VMA_WDQS1 G3 VSS#G8 J2 VMA_WDQS4 B7 DQSL VSS#J2 J8 VMA_WDQS7 B7 DQSL VSS#J2 J8
VMA_WDQS3 B7 DQSL VSS#J2 J8 VMA_WDQS2 B7 DQSL VSS#J2 J8 DQSU VSS#J8 M1 DQSU VSS#J8 M1
DQSU VSS#J8 M1 DQSU VSS#J8 M1 VSS#M1 M9 VSS#M1 M9
VSS#M1 M9 VSS#M1 M9 VSS#M9 P1 VSS#M9 P1
VSS#M9 P1 VSS#M9 P1 MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9
MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9 RESET VSS#P9 T1 RESET VSS#P9 T1
[22,24] MEM_RST# RESET VSS#P9 RESET VSS#P9 VSS#T1 VSS#T1
x
T1 T1 VMA_ZQ3 L8 T9 VMA_ZQ4 L8 T9
VMA_ZQ1 L8 VSS#T1 T9 VMA_ZQ2 L8 VSS#T1 T9 ZQ VSS#T9 ZQ VSS#T9
ZQ VSS#T9 ZQ VSS#T9
B1 B1
B1 B1 VSSQ#B1 B9 VSSQ#B1 B9
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B9 D1 VSSQ#B9 D1
R5079 R5080
R5077 VSSQ#B9 D1 R5078 VSSQ#B9 D1 Tham es @243/F_4 VSSQ#D1 D8 Tham es @243/F_4 VSSQ#D1 D8
VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D8 E2 VSSQ#D8 E2
Tham es @243/F_4 Tham es @243/F_4
VSSQ#D8 E2 VSSQ#D8 E2 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
fi
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
100-BALL 100-BALL
100-BALL 100-BALL SDRAM DDR3 SDRAM DDR3
SDRAM DDR3 SDRAM DDR3 Tham es @VRAM _DDR3 Tham es @VRAM _DDR3
Tham es @VRAM _DDR3 Tham es @VRAM _DDR3
C3A C3A
C3A C3A
TOP Left BOT Left BOT Right TOP Right
a
Group-A0 VREF Group-A1 VREF
+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU
in
B B
R5081 R5082 R5083 R5084

R5085 R5086 R5087 R5088
Tham es @4.99K/F_4 Tham es @4.99K/F_4 Tham es @4.99K/F_4 Tham es @4.99K/F_4
Tham es @4.99K/F_4 Tham es @4.99K/F_4 Tham es @4.99K/F_4 Tham es @4.99K/F_4
VREFC_VMA1 VREFD_VMA1 VREFC_VMA2 VREFD_VMA2
VREFC_VMA3 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4
R5089 C5161 R5090 C5162 R5091 C5163 R5092 C5164

R5093 C5165 R5094 C5166 R5095 C5167 R5096 C5168
Tham es @4.99K/F_4 Tham es @0.1U/10V_4X Tham es @4.99K/F_4 Tham es @0.1U/10V_4X Tham es @4.99K/F_4 Tham es @0.1U/10V_4X Tham es @4.99K/F_4 Tham es @0.1U/10V_4X
Tham es @4.99K/F_4 Tham es @0.1U/10V_4X Tham es @4.99K/F_4 Tham es @0.1U/10V_4X Tham es @4.99K/F_4 Tham es @0.1U/10V_4X Tham es @4.99K/F_4 Tham es @0.1U/10V_4X
MEM_A0 CLK
Group-A0 decoupling CAP
+1.5V_GPU
h Group-A1 decoupling CAP
+1.5V_GPU
MEM_A1 CLK
.c
VMA_CLK0 VMA_CLK1
VMA_CLK0# C5172 C5173 C5174 C5175 C5176 C5177 C5183 C5184 VMA_CLK1#
C5169 C5170 C5171 C5178 C5179 C5180 C5181 C5182 Tham es @0.1U/10V_4X Tham es @0.1U/10V_4X Tham es @0.1U/10V_4X Tham es @0.1U/10V_4X Tham es @0.1U/10V_4X Tham es @0.1U/10V_4X Tham es @0.1U/10V_4X Tham es @0.1U/10V_4X
Tham es @0.1U/10V_4X Tham es @0.1U/10V_4X Tham es @0.1U/10V_4X Tham es @0.1U/10V_4X Tham es @0.1U/10V_4X Tham es @0.1U/10V_4X Tham es @0.1U/10V_4X Tham es @0.1U/10V_4X
R5097 R5098
Tham es @40.2/F_4 Tham es @40.2/F_4 R5099 R5100
+1.5V_GPU Tham es @40.2/F_4 Tham es @40.2/F_4
+1.5V_GPU
C5189 C5190 C5191 C5192 C5193 C5194 C5195 C5201 C5202

Tham es @0.01U/25V_4X C5186 C5187 C5188 C5196 C5197 C5198 C5199 C5200 Tham es @1U/6.3V_4X Tham es @1U/6.3V_4X Tham es @1U/6.3V_4X Tham es @1U/6.3V_4X Tham es @1U/6.3V_4X Tham es @1U/6.3V_4X Tham es @1U/6.3V_4X Tham es @1U/6.3V_4X C5185
w
A Tham es @1U/6.3V_4X Tham es @1U/6.3V_4X Tham es @1U/6.3V_4X Tham es @1U/6.3V_4X Tham es @1U/6.3V_4X Tham es @1U/6.3V_4X Tham es @1U/6.3V_4X Tham es @1U/6.3V_4X A
Tham es @0.01U/25V_4X
+1.5V_GPU
+1.5V_GPU
C5208 C5209 C5210 C5211 C5212

C5203 C5204 C5205 C5206 C5207 Tham es @4.7U/6.3V_6X Tham es @4.7U/6.3V_6X Tham es @4.7U/6.3V_6X Tham es @4.7U/6.3V_6X Tham es @4.7U/6.3V_6X
w
Tham es @4.7U/6.3V_6X Tham es @4.7U/6.3V_6X Tham es @4.7U/6.3V_6X Tham es @4.7U/6.3V_6X Tham es @4.7U/6.3V_6X C3A
C3A PROJECT : Chief River
A1A
VRAM_A: DDR3*4PCS
5 4 3 2 1
w
5 4 3 2 1
CHANNEL B: 512MB DDR3 (64M*16*4pcs) <VGA>

[22] VMB_DQ[63..0]
[22] VMB_DM[7..0]
[22] VMB_RDQS[7..0]
VMB_DQ[63..0]
VMB_DM[7..0]
VMB_RDQS[7..0]
VMB_WDQS[7..0]
QSA[7..0]
24
[22] VMB_WDQS[7..0] QSA#[7..0]
U5006 U5007 U5008 U5009
VMB_MA[14..0]
[22] VMB_MA[14..0]
VREFC_VMB1 M8 E3 VMB_DQ23 VREFC_VMB2 M8 E3 VMB_DQ1 VREFC_VMB3 M8 E3 VMB_DQ55 VREFC_VMB4 M8 E3 VMB_DQ62
VREFD_VMB1 H1 VREFCA DQL0 F7 VMB_DQ16 VREFD_VMB2 H1 VREFCA DQL0 F7 VMB_DQ4 VREFD_VMB3 H1 VREFCA DQL0 F7 VMB_DQ51 VREFD_VMB4 H1 VREFCA DQL0 F7 VMB_DQ61
VREFDQ DQL1 F2 VMB_DQ21 VREFDQ DQL1 F2 VMB_DQ2 VREFDQ DQL1 F2 VMB_DQ54 VREFDQ DQL1 F2 VMB_DQ63
VMB_MA0 N3 DQL2 F8 VMB_DQ17 VMB_MA0 N3 DQL2 F8 VMB_DQ5 VMB_MA0 N3 DQL2 F8 VMB_DQ50 VMB_MA0 N3 DQL2 F8 VMB_DQ60
[22] VMB_MA0 A0 DQL3 A0 DQL3 A0 DQL3 A0 DQL3
VMB_MA1 P7 H3 VMB_DQ22 VMB_MA1 P7 H3 VMB_DQ0 VMB_MA1 P7 H3 VMB_DQ52 VMB_MA1 P7 H3 VMB_DQ59
VMB_MA3 N2 G2 VMB_DQ20 VMB_MA3 N2 G2 VMB_DQ3 VMB_MA3 N2 G2 VMB_DQ53 VMB_MA3 N2 G2 VMB_DQ57
D [22] VMB_MA3 A3 DQL6 A3 DQL6 A3 DQL6 A3 DQL6 D
VMB_MA5 P2 VMB_MA5 P2 VMB_MA5 P2 VMB_MA5 P2
[22] VMB_MA5 A5 A5 A5 A5
VMB_MA6 R8 VMB_MA6 R8 VMB_MA6 R8 VMB_MA6 R8
[22] VMB_MA6 A6 A6 A6 A6
VMB_MA7 R2 D7 VMB_DQ26 VMB_MA7 R2 D7 VMB_DQ15 VMB_MA7 R2 D7 VMB_DQ41 VMB_MA7 R2 D7 VMB_DQ38
[22] VMB_MA7 A7 DQU0 A7 DQU0 A7 DQU0 A7 DQU0
VMB_MA8 T8 C3 VMB_DQ30 VMB_MA8 T8 C3 VMB_DQ10 VMB_MA8 T8 C3 VMB_DQ47 VMB_MA8 T8 C3 VMB_DQ32
VMB_MA9 R3 C8 VMB_DQ28 VMB_MA9 R3 C8 VMB_DQ14 VMB_MA9 R3 C8 VMB_DQ40 VMB_MA9 R3 C8 VMB_DQ36
VMB_MA10 L7 C2 VMB_DQ31 VMB_MA10 L7 C2 VMB_DQ8 VMB_MA10 L7 C2 VMB_DQ46 VMB_MA10 L7 C2 VMB_DQ33
m
[22] VMB_MA10 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3 A10/AP DQU3
VMB_MA11 R7 A7 VMB_DQ24 VMB_MA11 R7 A7 VMB_DQ12 VMB_MA11 R7 A7 VMB_DQ44 VMB_MA11 R7 A7 VMB_DQ37
VMB_MA12 N7 A2 VMB_DQ27 VMB_MA12 N7 A2 VMB_DQ9 VMB_MA12 N7 A2 VMB_DQ45 VMB_MA12 N7 A2 VMB_DQ35
[22] VMB_MA12 T3 A12/BC DQU5 B8 T3 A12/BC DQU5 B8 T3 A12/BC DQU5 B8 T3 A12/BC DQU5 B8
VMB_MA13 VMB_DQ25 VMB_MA13 VMB_DQ13 VMB_MA13 VMB_DQ43 VMB_MA13 VMB_DQ39
VMB_MA14 T7 A3 VMB_DQ29 VMB_MA14 T7 A3 VMB_DQ11 VMB_MA14 T7 A3 VMB_DQ42 VMB_MA14 T7 A3 VMB_DQ34
M7 M7 M7 M7
A15 +1.5V_GPU A15 +1.5V_GPU A15 +1.5V_GPU A15 +1.5V_GPU
VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2 VMB_BA0 M2 B2

[22] VMB_BA0 N8 BA0 VDD#B2 D9 N8 BA0 VDD#B2 D9 N8 BA0 VDD#B2 D9 N8 BA0 VDD#B2 D9
VMB_BA1 VMB_BA1 VMB_BA1 VMB_BA1
[22] VMB_BA1 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9 BA1 VDD#D9
VMB_BA2 M3 G7 VMB_BA2 M3 G7 VMB_BA2 M3 G7 VMB_BA2 M3 G7
o
[22] VMB_BA2 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7 BA2 VDD#G7
K2 K2 K2 K2
VDD#K2 K8 VDD#K2 K8 VDD#K2 K8 VDD#K2 K8
VDD#K8 N1 VDD#K8 N1 VDD#K8 N1 VDD#K8 N1
VMB_CLK0 J7 VDD#N1 N9 VMB_CLK0 J7 VDD#N1 N9 VMB_CLK1 J7 VDD#N1 N9 VMB_CLK1 J7 VDD#N1 N9
[22] VMB_CLK0 CK VDD#N9 CK VDD#N9 [22] VMB_CLK1 CK VDD#N9 CK VDD#N9
VMB_CLK0# K7 R1 VMB_CLK0# K7 R1 VMB_CLK1# K7 R1 VMB_CLK1# K7 R1
[22] VMB_CLK0# CK VDD#R1 CK VDD#R1 [22] VMB_CLK1# CK VDD#R1 CK VDD#R1
VMB_CKE0 K9 R9 VMB_CKE0 K9 R9 VMB_CKE1 K9 R9 VMB_CKE1 K9 R9
[22] VMB_CKE0 CKE VDD#R9 CKE VDD#R9 [22] VMB_CKE1 CKE VDD#R9 CKE VDD#R9
.c
VMB_ODT0 K1 A1 VMB_ODT0 K1 A1 VMB_ODT1 K1 A1 VMB_ODT1 K1 A1
[22] VMB_ODT0 L2 ODT VDDQ#A1 A8 L2 ODT VDDQ#A1 A8 [22] VMB_ODT1 L2 ODT VDDQ#A1 A8 L2 ODT VDDQ#A1 A8
VMB_CS0# VMB_CS0# VMB_CS1# VMB_CS1#
[22] VMB_CS0# CS VDDQ#A8 CS VDDQ#A8 [22] VMB_CS1# CS VDDQ#A8 CS VDDQ#A8
VMB_RAS0# J3 C1 VMB_RAS0# J3 C1 VMB_RAS1# J3 C1 VMB_RAS1# J3 C1
[22] VMB_RAS0# RAS VDDQ#C1 RAS VDDQ#C1 [22] VMB_RAS1# RAS VDDQ#C1 RAS VDDQ#C1
VMB_CAS0# K3 C9 VMB_CAS0# K3 C9 VMB_CAS1# K3 C9 VMB_CAS1# K3 C9
[22] VMB_CAS0# L3 CAS VDDQ#C9 D2 L3 CAS VDDQ#C9 D2 [22] VMB_CAS1# L3 CAS VDDQ#C9 D2 L3 CAS VDDQ#C9 D2
VMB_WE0# VMB_WE0# VMB_WE1# VMB_WE1#
[22] VMB_WE0# WE VDDQ#D2 WE VDDQ#D2 [22] VMB_WE1# WE VDDQ#D2 WE VDDQ#D2
E9 E9 E9 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
VMB_RDQS2 F3 VDDQ#F1 H2 VMB_RDQS0 F3 VDDQ#F1 H2 VMB_RDQS6 F3 VDDQ#F1 H2 VMB_RDQS7 F3 VDDQ#F1 H2
VMB_RDQS3 C7 DQSL VDDQ#H2 H9 VMB_RDQS1 C7 DQSL VDDQ#H2 H9 VMB_RDQS5 C7 DQSL VDDQ#H2 H9 VMB_RDQS4 C7 DQSL VDDQ#H2 H9
DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9 DQSU VDDQ#H9
VMB_DM2 E7 A9 VMB_DM0 E7 A9 VMB_DM6 E7 A9 VMB_DM7 E7 A9
x
C VMB_DM3 D3 DML VSS#A9 B3 VMB_DM1 D3 DML VSS#A9 B3 VMB_DM5 D3 DML VSS#A9 B3 VMB_DM4 D3 DML VSS#A9 B3 C
DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1 DMU VSS#B3 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
VMB_WDQS2 G3 VSS#G8 J2 VMB_WDQS0 G3 VSS#G8 J2 VMB_WDQS6 G3 VSS#G8 J2 VMB_WDQS7 G3 VSS#G8 J2
VMB_WDQS3 B7 DQSL VSS#J2 J8 VMB_WDQS1 B7 DQSL VSS#J2 J8 VMB_WDQS5 B7 DQSL VSS#J2 J8 VMB_WDQS4 B7 DQSL VSS#J2 J8
DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1 DQSU VSS#J8 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
fi
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9 MEM_RST# T2 VSS#P1 P9
[22,23] MEM_RST# RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1 RESET VSS#P9 T1
VMB_ZQ1 L8 VSS#T1 T9 VMB_ZQ2 L8 VSS#T1 T9 VMB_ZQ3 L8 VSS#T1 T9 VMB_ZQ4 L8 VSS#T1 T9
ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9 ZQ VSS#T9
B1 B1 B1 B1
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
R5101 VSSQ#B9 D1 R5102 VSSQ#B9 D1 R5103 VSSQ#B9 D1 R5104 VSSQ#B9 D1
VSSQ#D1 VSSQ#D1 VSSQ#D1 VSSQ#D1
a
EV@243/F_4 D8 EV@243/F_4 D8 EV@243/F_4 D8 EV@243/F_4 D8
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
100-BALL 100-BALL 100-BALL 100-BALL
in
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
EV@VRAM _DDR3 EV@VRAM _DDR3 EV@VRAM _DDR3 EV@VRAM _DDR3
C3A C3A C3A C3A
BOT Down TOP Down TOP Up BOT Up
Group-B0 VREF Group-B1 VREF

B
+1.5V_GPU
R5105
EV@4.99K/F_4
+1.5V_GPU
R5106
EV@4.99K/F_4
+1.5V_GPU
R5107
EV@4.99K/F_4
+1.5V_GPU
R5108
EV@4.99K/F_4
h +1.5V_GPU
R5109
EV@4.99K/F_4
+1.5V_GPU
R5110
EV@4.99K/F_4
+1.5V_GPU
R5111
EV@4.99K/F_4
+1.5V_GPU
R5112
EV@4.99K/F_4
B
.c
VREFC_VMB1 VREFD_VMB1 VREFC_VMB2 VREFD_VMB2 VREFC_VMB3 VREFD_VMB3 VREFC_VMB4 VREFD_VMB4
R5113 C5213 R5114 C5214 R5115 C5215 R5116 C5216 R5117 C5217 R5118 C5218 R5119 C5219 R5120 C5220
EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X EV@4.99K/F_4 EV@0.1U/10V_4X
w
Group-B0 decoupling CAP Group-B1 decoupling CAP

MEM_B0 CLK MEM_B1 CLK
+1.5V_GPU +1.5V_GPU
C3A VMB_CLK1
w
VMB_CLK0 C5221 C5222 C5223 C5224 C5225 C5226 C5227 C5228 C5229 C5230 C5231 C5232 C5233 C5234 C5235 VMB_CLK1#
VMB_CLK0# EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X
R5121 R5122
R5123 R5124 EV@40.2/F_4 EV@40.2/F_4

+1.5V_GPU +1.5V_GPU
EV@40.2/F_4 EV@40.2/F_4
w
A C5238 C5239 C5240 C5241 C5242 C5243 C5244 C5245 C5246 C5247 C5248 C5249 C5250 C5251 C5252 A
C5236
C5237 EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@1U/6.3V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.1U/10V_4X EV@0.01U/25V_4X
EV@0.01U/25V_4X
+1.5V_GPU +1.5V_GPU
C3A
C5253 C5254 C5255 C5256 C5257 C5258 C5259 C5260 C5261 C5262 Quanta Computer Inc.
EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X EV@4.7U/6.3V_6X
A1A
VRAM_B: DDR3*4PCS
5 4 3 2 1
5 4 3 2 1
VGA Power Enable Reverse

PX Platform Reset PX/OEV PX Mode control signal PX4/PX5
25
(Intel --> Low Active)
+3V +3V
+3V
D C5263 PX4@0.1U/10V_4X D
R5147
PX@1K_4 R5126
PX4@10K_4
5
+3V
DGPU_PWR_EN 2
DGPU_PWR_EN [48] 4 PX_MODE
PX_MODE [47,48]
1
m
3
PX_EN =0, for Normal operation U5010
3
3
C5559 PX@0.1U/10V_4X PX_EN =1, for BACO MODE PX4@TC7SH08FU(F)
[9] DGPU_PWR_EN_R
2
[16] PX_EN
2
5
Q5049
PX@ME2N7002E_200MA 2 Q5046 R5136 PX5@0_4
o
[9] DGPU_HOLD_RST#
4 PERST#_BUF R5129 PX4@ME2N7002E_200MA
1
PERST#_BUF [15]
[9] VGA_PLTRST# 1
1
PX4@5.11K/F_4
U5034
3
PX@TC7SH08FU(F)
.c
C C
R5149 OEV@0_4
Core power for PCIE Logic PX4/PX5/OEV Designs that do not support the
3.3V VGA/PX4/PX5/OEV
BACO option must connect the
x
BIF_VDDC to VDDC
fi
+VGPU_CORE R5148 OEV@0_4
+5V +5V R5130 PX5@0_4

+3V
B R5132 R5131 1 3 PX_Q 3 1 B
a
PX4@1K/F_4 PX4@1K/F_4
1
Q5003 Q5004
+3V PX4@PMV45EN_4A PX4@PMV45EN_4A +BIF_VDDC R5146 R5150
2
OEV@0_6 PX4@0_6
DGPU_PWR_EN_R2
in
C5270 PX4@0.1U/10V_4X +BIF_+1V_EN +BIF_CORE_EN Q5001
C5269 PX5@ME1303_3A GPU +3V power
3
0.5A
5
PX4@22U/6.3V_8X
3
PX_MODE 2 +3V_D
4 PX_PWRGOOD_Q 2 2
1 +1V_GPU C5266 C5267 C5268
0,37,47,48] DGPU_PWROK
Q5006
U5011 PX4@ME2N7002E_200MA Q5005 R5139 *0_4 *EV@10U/6.3V_6X EV@1U/6.3V_4X EV@0.1U/10V_4X
3
PX4@TC7SH08FU(F)
h
1
PX4@ME2N7002E_200MA
1 3 PX_L 3 1
Q5007
Q5000 PX4@PMV45EN_4A
.c 2
2
A PX4@PMV45EN_4A A

Thames_M2/ Baco A1A
w

5 4 3 2 1
w
w
5 4 3 2 1
S3 power Reduction (SM_DRAMRST#) S3P/NS3P/CPU S3 power Reduction (SM_DRAMPWROK) S3P/NS3P/CPU

26
+3V_S5
+1.5VSUS
D D
+1.5V_CPU
R9511 R9512 NS3@0_4 C5271
1K/F_4 S3@0.1U/10V_4X
R9513 1K/F_4 DDR3_DRAMRST#_R 3 1 R9514

[13,14] DDR3_DRAMRST# CPU_DRAMRST# [3]
5
200/F_4
Q5008 S3@ME2N7002E_200MA 2
[7] SYS_PWROK_R
4 PM_DRAM_PWRGD_Q R9515 130/F_4 PM_DRAM_PWRGD_R
PM_DRAM_PWRGD_R [3]
2
R9516 S3@0_4 DRAMRST_CNTRL_PCH_R 1
[6,9] DRAMRST_CNTRL_PCH [7] PM_DRAM_PWRGD
U5012 S3@TC7SH08FU(F)
3
C5272 R9517 R9518 *S3@39/F_4 3 1
S3@0.047U/10V_4X S3@4.99K/F_4
m
Q5009 *S3@2N7002K_300MA
2
R9519 NS3@0_4
MAINON_ON_G [46]
For S3 power Reduction Sequence S3P/NS3P/CPU
o
C
S3 power Reduction (CPU Power) S3P/NS3P/CPU C
+SMDDR_VREF +VDDR_REF_CPU +1.5VSUS +1.5V_CPU

+3V_S5 +1.5V_CPU +1.5VSUS
.c
R9520 NS3@0_6
R9521 NS3@0_1206
+3V_S5
R9523 NS3@0_8 R9524 NS3@0_1206
R9522 C5273 C5274 C5275 C5276
5
R9525 6 *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X *0.1U/10V_4X

2 S3@10K_4 5 4
MAINON [37,43,46]
[42] S3_1.5V R9526 S3@100K_4 4 S3@10K_4 3 4 2
1 1
Q5016B S3@2N7002KDW_115MA Q5010 +1.5V_CPU
U5013 S3@TC7SH08FU(F) S3@AO6402A
3
3
3
MAIND R9527 MAIND
[41,42,46] MAIND
3
100K_4
x
5 2 R9528 S3@1K_4 C5277 R9529
*S3@470P/50V_4X S3@220_8
Q5013
Q5014B S3@FDV301N_200MA
3
S3@2N7002KDW_115MA C5278
6
1
*S3@0.1U/10V_4X
2 2
MAINON_ON_G [46] [46] MAINON_ON_G
fi
B B
Q5014A Q5015
S3@2N7002KDW_115MA S3@ME2N7002E_200MA
1
1
For S3 power Reduction VTT discharge S3P/NS3P/CPU
a
+SMDDR_VTERM
in
R9534
S3@22_4
6
A 2 A
[46] MAINON_ON_G
Q5016A
S3@2N7002KDW_115MA
1
h Size Docum ent Num ber

S3 power Reduction
Rev
A1A
.c
5 4 3 2 1
w
w
w
5 4 3 2 1
HDMI CEC CEC

HDMI Conn HDM/HMU/HMV
[16] EXT_HDMITX2P
[16] EXT_HDMITX2N
C434
C426
EHM@0.1U/10V_4X
EHM@0.1U/10V_4X
HDMITX2_R
HDMITX2#_R
27
[7] INT_HDMITX2P
C2002
C2001
IHM@0.1U/10V_4X
IHM@0.1U/10V_4X
E3A
[7] INT_HDMITX2N
EXT_HDMITX2P R4565 EHM@100_4 EXT_HDMITX2N
+3VPCU
C418 EHM@0.1U/10V_4X HDMITX1_R EXT_HDMITX1P R4566 EHM@100_4 EXT_HDMITX1N
[16] EXT_HDMITX1P
C415 EHM@0.1U/10V_4X HDMITX1#_R
[16] EXT_HDMITX1N
EXT_HDMITX0P R4567 EHM@100_4 EXT_HDMITX0N C5279 C5280
C2004 IHM@0.1U/10V_4X U5014
[7] INT_HDMITX1P
C2003 IHM@0.1U/10V_4X CEC@1U/6.3V_4X CEC@0.1U/10V_4X
[7] INT_HDMITX1N EXT_HDMICLK+ EXT_HDMICLK- 7 1 CEC_SCLK
D R4571 EHM@100_4 3ND_MBCLK [16,37] D
16 VCC SCL 20 CEC_SDATA
VCC SDA 3ND_MBDATA [16,37]
18 HDMI_CEC_DDCDATA
DDCSDA
C444 EHM@0.1U/10V_4X HDMITX0_R
+3VPCU RP18 3 4 CEC@4.7KX2 XIN_CEC 4 17 HDMI_CEC_DDCCLK
[16] EXT_HDMITX0P 1 2 6 XOUT DDCSCL
C440 EHM@0.1U/10V_4X HDMITX0#_R XOUT_CEC
[16] EXT_HDMITX0N XIN 13 CEC-TEST1 4 3 CEC@4.7KX2
RP13 +3VPCU
RP14 3 4 CEC@4.7KX2 CEC-RESET# 3 TEST1 12 CEC-TEST2 2 1
1 2 CEC-MODE 8 RESET TEST0
C2006 IHM@0.1U/10V_4X
[7] INT_HDMITX0P C2005 IHM@0.1U/10V_4X MODE 10 CEC_OUT
[7] INT_HDMITX0N 5 CEC OUT 9 CEC_IN
VSS CEC IN
m
15
14 NC 19 HPDET
HDMICLK_R 11 NC HPDET 2 CEC-RESET# CEC-TEST1
C448 EHM@0.1U/10V_4X
[16] EXT_HDMICLK+ C446 EHM@0.1U/10V_4X HDMICLK#_R NC NC
[16] EXT_HDMICLK-
CEC@R5F211B4D61SP#W4 R9537 R9538 R9539
C2008 IHM@0.1U/10V_4X CN2001 *CEC@0_4 *CEC@0_4
[7] INT_HDMICLK+ 20
C2007 IHM@0.1U/10V_4X *CEC@47K_4
[7] INT_HDMICLK- HDMITX2_R 1 SHELL1
2 D2+ CEC-MODE CEC-TEST2
HDMITX2#_R 3 D2 Shield
HDMITX1_R 4 D2-
D1+
o
5
HDMITX1#_R 6 D1 Shield
HDMITX0_R 7 D1-
8 D0+
HDMITX0#_R 9 D0 Shield 23
HDMICLK_R 10 D0- GND
11 CK+ 22
CK Shield GND
CEC HotPlug CEC
HDMICLK#_R 12
HDMI_CON_CEC 13 CK-
.c
14 CE Remote
NC
C3A HDMI_CON_DDCCLK
HDMI_CON_DDCDATA
15
16 DDC CLK +3VPCU
17 DDC DATA
DDC5V_F DDC5V 2 1 *HM@B130LAW-7-F_1A +5V_HDMI 18 GND
R9545 NCEC@0_6 F1 *HM@SMD1206P110TFT D2007
+5V +5V
HDMI_CON_HP 19 U5015
HP DET 21 5 1
C5283 CEC@0.1U/10V_4X
SHELL2 2 HDMI_CON_HP
+5VPCU R9543 CEC@0_6 R9541 CEC@1K/F_4
C5282 HM@HMR2N-AK120N
CEC_EC_HP R9542 CEC@33_44 3
[37] CEC_EC_HP
B2A C5545
C
C3A 1
*HM@220P/50V_4X HM@0.1U/16V_4Y
HPDET
CEC@SN74LVC1G17DCKR
R9544
C
Q2009 C5287
3 1 CEC@470K_4
IN OUT D32
x
2 *HM@0.1U/16V_4Y
GND +3VPCU
*AZ5125-01J
HM@AP2331SA-7
2
C5284 *CEC@0.1U/10V_4X
U5016
5
1
HDMI_CON_HP_PCH_R R9546 *CEC@1K_4 4
HDMI-HPD HDM/HMU/HMV HDMI HDM/HMU/HMV

2
fi
+3V
*CEC@TC7SH08FU(F)
3
LEVEL
SHIFT
+5V CEC Output CEC CEC Input CEC
R9547 IHM@680_4 HDMITX0#_R
a
+3VPCU
+3V +3V R9548 IHM@680_4 HDMITX0_R
3
U5017
R9549 IHM@680_4 HDMITX1#_R 1 5 C5285 CEC@0.1U/10V_4X
2
R9564 2 R9550 IHM@680_4 HDMITX1_R 3 4
HM@1M_4 Q2004
2
R9583 HM@2N7002K_300MA R9551 IHM@680_4 HDMITX2#_R CEC@SN74LVC1G14DCKR
in
R4563 IHM@0_4 HDMI_CON_HP_PCH_R 1 3HDMI_CON_HP R9552 IHM@680_4 HDMITX2_R
[7] HDMI_CON_HP_PCH
1
HM@100K_4
Q2003 R9553 IHM@680_4 HDMICLK#_R HDMI_CON_CEC
R4562 EHM@0_4 HM@2N7002K_300MA R9566
[16] EXT_HDMI_HPD R9554 IHM@680_4 HDMICLK_R +3VPCU +3VPCU
HM@20K_4 C5286 *CEC@47P/50V_4N
3
B B
R9584 EHM@499/F_4 HDMITX0#_R D2008 R9555
R9570 EHM@499/F_4 HDMITX0_R CEC@RB500V-40_100MA *CEC@10K_4

CEC_OUT R9556 CEC@22K_4 1
R9575 EHM@499/F_4 HDMITX1#_R CEC_IN
3
R9558
R9573
h EHM@499/F_4 HDMITX1_R R9557 Q5018 CEC@27K_4
2
R9572 EHM@499/F_4 HDMITX2#_R CEC@100K_4 CEC@2SK3541T2L_100MA HDMI_CON_CEC 1
R9587 EHM@499/F_4 HDMITX2_R Q5019

*CEC@2SK3541T2L_100MA
R9586 EHM@499/F_4 HDMICLK#_R
2
R9585 EHM@499/F_4 HDMICLK_R
.c
CEC SMBus CEC
Level Shift
HDMI-SMBus HDM/HMU/HMV
+3VPCU
w
R9561
CEC@4.7K_4
2
+3V +3V DDC5V_F
+3V +3V DDC5V_F D3A HDMI_CON_DDCDATA 3 1 HDMI_CEC_DDCDATA

D3A Q2007 CEC@FDV301N_200MA
w
A A
R9559 R9567 R9568

HM@2.2K_4
HM@2.2K_4 R9560 HM@2.2K_4 +3VPCU
HM@2.2K_4
2
2
w
R4568 IHM@0_4 1 3 HDMI_CON_DDCCLK R4570 IHM@0_4 1 3 HDMI_CON_DDCDATA R9569

[7] HDMI_DDCCLK [7] HDMI_DDCDATA
2
Q2005 HM@FDV301N_200MA Q2006 HM@FDV301N_200MA CEC@4.7K_4

R4569 EHM@0_4 R4564 EHM@0_4
[16] EV_HDMI_DDCCLK [16] EV_HDMI_DDCDAT HDMI_CON_DDCCLK 3 1 HDMI_CEC_DDCCLK
Q2008 CEC@FDV301N_200MA Size Docum ent Num ber Rev
A1A
HDMI CONN
5 4 3 2 1
5 4 3 2 1
Panel backlight control LDS LCD POWER SWITCH LDS/LDU/LDV HALL HSR
Sensor 28
+3V
LCDVCC
C519 U26 +3VPCU R9571 100K_4

DISPON_O 1U/6.3V_4X
DISPON_O [37] 6 1
IN OUT
4 2
D IN GND D
C516 C518 C515
R422 PIV@0_4 3 5 1 2 LID591#
[7] LVDS_DIGON ON/OFF GND LID591# [37]
R9574 0.1U/16V_4Y *0.01U/25V_4X *10U/6.3V_6X
MR1
*100K_4 R421 OEV@0_4 AP2821KTR-G1
[17] EV_LVDS_DIGON
C5293 APX9132H AI-TRG
3
0.1U/16V_4Y
R2033 R2034
PIV@100K_4 OEV@10K_4
m
o
CRT CRT/CRU/CRV CRT_DDCCLK R9576 CRT@2.2K_4
+3V
CRT_DDCDAT R9577 CRT@2.2K_4
CRTDCLK R9578 CRT@2.7K_4

+5V_CRT
CRTDDAT R9579 CRT@2.7K_4
.c
R415 ICRT@0_4 CRT_RED
[7] INT_CRT_RED
C5294 CRT@0.1U/16V_4Y U5018
R417 ICRT@0_4 CRT_GRN 1 16 CRTVSYNC
[7] INT_CRT_GRN +5V_CRT VCC_SYNCSYNC_OUT2
C5295 CRT@0.1U/16V_4Y 14 CRTHSYNC
CRT_BLU 7 SYNC_OUT1
R420 ICRT@0_4
[7] INT_CRT_BLU +5V 8 VCC_DDC
C5297 CRT@0.22U/10V_4X C5296 C5298
C
BYP 15 CRT_VSYNC C
R416 ECRT@0_4 2 SYNC_IN2 13 CRT_HSYNC CRT@10P/50V_4C CRT@10P/50V_4C
[16] EXT_CRT_RED +3V VCC_VIDEO SYNC_IN1
R418 ECRT@0_4
E3A C5299 CRT@0.1U/16V_4Y
[16] EXT_CRT_GRN CRT_RED CRT_R1 3 10 CRT_DDCCLK
L5021 ICRT@BLM18BA470SN1D_300MA
CRT_GRN CRT_G1 4 VIDEO_1 DDC_IN1 11 CRT_DDCDAT
R419 ECRT@0_4 L5022 ICRT@BLM18BA470SN1D_300MA
[16] EXT_CRT_BLU VIDEO_2 DDC_IN2
x
CRT_BLU L5023 ICRT@BLM18BA470SN1D_300MA CRT_B1 5
VIDEO_3 9 CRTDCLK
CRT_DDCCLK 6 DDC_OUT1 12 CRTDDAT
R103 ICRT@0_4 R9580 C5300 R9581 C5301 R9582 C5304 C5302 C5303 C5305
[7] INT_CRT_DDCCLK GND DDC_OUT2
R108 ICRT@0_4 CRT_DDCDAT CRT@150/F_4 CRT@6.8P/50V_4N CRT@150/F_4 CRT@6.8P/50V_4N CRT@150/F_4 CRT@6.8P/50V_4N CRT@6.8P/50V_4N CRT@6.8P/50V_4N CRT@6.8P/50V_4N CRT@IP4772CZ16 C5306 C5307
[7] INT_CRT_DDCDAT
R102 ICRT@0_4 CRT_HSYNC CRT@10P/50V_4C CRT@10P/50V_4C
[7] INT_HSYNC
R113 ICRT@0_4 CRT_VSYNC
fi
[7] INT_VSYNC
R112 ECRT@0_4
[16] EV_CRTDCLK
R107 ECRT@0_4
[16] EV_CRTDDAT
CRT_RED CRT_R1
16
L5039 ECRT@BLM18BA470SN1D_300MA
CRT_GRN L5038 ECRT@BLM18BA470SN1D_300MA CRT_G1
B2A R114 *ECRT@0_4
CRT_BLU L5026 ECRT@BLM18BA470SN1D_300MA CRT_B1
6
[16] EV_CRTDCLK_aux
R109 *ECRT@0_4
E3A CRT_R1 1
7
11
a
[16] EV_CRTDDAT_aux 2 12
CRT_G1 CRTDDAT
+5V_CRT 8
CRT_B1 3 13 CRTHSYNC
R106 ECRT@0_4 D2011 CRT@SS14L_1A +5V_CRT1 F2 CRT@SMD1206P110TFT 9
[16,18] EXT_HSYNC +5V 4 14 CRTVSYNC
R105 ECRT@0_4 10
[16,18] EXT_VSYNC 5 15
1
CRTDCLK
D33
CN2002
in
*AZ5125-01J
17
CRT@DHR48-15K1200
2
B B
LCD Panel Module <LDS> C3A CCD CCD

LCD_EDIDCLK C5386 E@2200P/50V_4X
[7] INT_TXLCLKOUT+
[7] INT_TXLCLKOUT-
[17] EV_TXLCLKOUT+
[17] EV_TXLCLKOUT-
INT_TXLCLKOUT+
INT_TXLCLKOUT-
EV_TXLCLKOUT+
EV_TXLCLKOUT-
RP10
RP5
1
3
2
4
2
4
1
3
PIV@0X2
OEV@0X2
LCD_TXLCLKOUT+
LCD_TXLCLKOUT-
LCD_EDIDDATA
LCD_TXLCLKOUT-
LCD_TXLCLKOUT+
C5548
C5560
C5562
E@2200P/50V_4X
*6.8P/50V_4N
*6.8P/50V_4N
h VIN
+3V
LCD_EDIDCLK
LCD_EDIDDATA
1
2
3
4
5
6
CN2003
1
2
3
4
5
.c
7 6 USB_CCD_R
C5385 R9594 *SHORT_4
LCD_TXLOUT0- 8 7 USB_CCD#_R R9595 *SHORT_4 USB_CCD [9]
1 2 9 8 USB_CCD# [9]
INT_TXLOUT2+ RP16 PIV@0X2 LCD_TXLOUT2+ *47P/50V_4N LCD_TXLOUT0+
[7] INT_TXLOUT2+ 9
[7] INT_TXLOUT2-
INT_TXLOUT2- 3 4 LCD_TXLOUT2-
LCD_TXLOUT1-
10
11 10 E3A
LCD_TXLOUT1+ 12 11
EV_TXLOUT2+ 2 1 13 12
RP3 OEV@0X2
[17] EV_TXLOUT2+ 4 3 14 13
EV_TXLOUT2- LCD_TXLOUT2-
[17] EV_TXLOUT2- 15 14
LCD_TXLOUT2+
16 15 CCD_POWER
16 +3V
INT_TXLOUT1+ RP8 1 2 PIV@0X2 LCD_TXLOUT1+ LCD_TXLCLKOUT- 17
[7] INT_TXLOUT1+ INT_TXLOUT1- 3 4 LCD_TXLOUT1- LCD_TXLCLKOUT+ 18 17
R423 PIV@0_4 C5308 *10U/6.3V_6X
+
[7] INT_TXLOUT1- [7] LVDS_PWM 19 18
LVDS_PWM_R 20 19
R424 OEV@0_4
[17] EV_LVDS_BRIGHT 20
w
EV_TXLOUT1+ RP2 3 4 OEV@0X2 DISPON_O R9593 1.2K/F_4 DISPON_O_R 21

[17] EV_TXLOUT1+ EV_TXLOUT1- 1 2 22 21
[17] EV_TXLOUT1- LCDVCC 23 22
23
INT_TXLOUT0+ RP11 4 3 PIV@0X2 LCD_TXLOUT0+
[7] INT_TXLOUT0+ 2 1
INT_TXLOUT0- LCD_TXLOUT0-
[7] INT_TXLOUT0-
A A
EV_TXLOUT0+ RP4 3 4 OEV@0X2 24 34
[17] EV_TXLOUT0+ EV_TXLOUT0- 1 2 CCD_POWER 25 24 34
[17] EV_TXLOUT0- 26 25 33
USB_CCD#_R
w
USB_CCD_R 27 26 33
INT_LVDS_EDIDCLK 4 3 LCD_EDIDCLK 28 27 32
RP17 PIV@0X2
[7] INT_LVDS_EDIDCLK 2 1 29 28 32
INT_LVDS_EDIDDATA LCD_EDIDDATA L5024 FCM1005KF-221T03_300MA
[7] INT_LVDS_EDIDDATA [34] INT_DMIC_DATA 30 29 31
L5025 FCM1005KF-221T03_300MA
[34] INT_DMIC_CLK 30 31
DISPON_O_R
[16] EV_LVDS_DDCCLK
EV_LVDS_DDCCLK
EV_LVDS_DDCDAT
RP1 2
4
1
3
OEV@0X2
INT_DMIC_DATA C5601 *0.1U/10V_4X
C3A 50373-03001-002
[16] EV_LVDS_DDCDAT
INT_DMIC_CLK C5600 *0.1U/10V_4X D2012 C3A Quanta Computer Inc.
LCP0G050M0R2R
R9609 2.2K_4 LCD_EDIDCLK
w
+3V
(13246,6043) Size Docum ent Num ber Rev
R9610 2.2K_4 LCD_EDIDDATA
E3A LCD/LED Panel/CCD A1A

5 4 3 2 1
5 4 3 2 1
MINI Card Slot#1(WiFi / Wimax MNW/DEG

/ Combo) +1.5V WIMAX_P
+3V
[AOAC]
WIMAX_P
29
L10 NAOAC@HCB1608KF-121T30_3A
B2A 0.5A(30mils)
2.75A(120mils) B2A
WIMAX_P WIMAX_P 1 3
+3V_S5
C5371 C5310 C5311 C5312 C5313 C5314 C5315 C5316 C5383 Q5031 AOAC@ME1303_3A +3V_S5
2
D R9614 *47P/50V_4N E@0.1U/10V_4X E@0.1U/10V_4X *10U/6.3V_6X 0.1U/16V_4Y *0.1U/16V_4Y E@0.1U/10V_4X *10U/6.3V_6X *47P/50V_4N D
10K_4 C5572 C5571
R9615
AOAC@0.01U/25V_4X *AOAC@0.01U/25V_4X AOAC@4.7K_4
2
R9730 AOAC@3.01K/F_4
3 1 PCIE_CLK_WLAN_REQ#_R Q5033
[9] PCIE_CLK_WLAN_REQ#
3
CN2004
Q5032 ME2N7002E_200MA BT_DISABLE#_INTEL 51 52
49 NC +3.3V 50 2
PLTRST# R9616 NMP@0_4 PLTRST#_debug 47 C-Link_RST GND 48 WMAX_P [37]
[3,9,30,35,36,37] PLTRST# 45 C-Link_DAT +1.5V 46
R9617 *0_4 R9618 NMP@0_4 PCLK__debug_R
[9] PCLK_DEBUG C-Link_CLK LED_WPAN#
m
43 44 AOAC@LTC044EUBFS8TL_30MA
1
41 GND LED_WLAN# 42
39 NC NC 40
37 NC NC 38
35 GND USB_D+ 36 USB_WLAN [9]
33 GND USB_D- 34 USB_WLAN# [9]
[9] PCIE_TXP_WLAN 31 PETp0 GND 32 SDATA_WLAN
[9] PCIE_TXN_WLAN# 29 PETn0 SMB_DATA 30 SCLK_WLAN
WIMAX_P 27 GND SMB_CLK 28
25 GND +1.5V 26 WIMAX_P
[9] PCIE_RXP_WLAN 23 PERp0 GND 24
[9] PCIE_RXN_WLAN# 21 PERn0 +3.3Vaux 22 PLTRST#
GND PERST#
o
19 20 RF_EN
17 NC W_DISABLE# 18 RF_EN [37]
R9620
NC GND
10K_4
15 16 LFRAME#_PCIE R9621 NMP@0_4 R9622 R9623
13 GND NC 14 LAD3_PCIE LFRAME# [8,37]
R9624 NMP@0_4
2
BT_DISABLE#_INTEL [9] CLK_PCIE_WLAN 11 REFCLK+ NC 12 LAD2_PCIE LAD3 [8,37]
R9626 NMP@0_4 AOAC@4.7K_4 AOAC@4.7K_4
[9] CLK_PCIE_WLAN# 9 REFCLK- NC 10 LAD1_PCIE R9627 NMP@0_4 LAD2 [8,37]
PCIE_CLK_WLAN_REQ#_R 7 GND NC 8 LAD0_PCIE R9629 NMP@0_4 LAD1 [8,37] 6 1 SDATA_WLAN
5 CLKREQ# NC 6 LAD0 [8,37] [9,13,35] SDATA
.c
3 BT_CHCLK +1.5V 4 Q5048A AOAC@2N7002KDW_115MA
3
1 BT_DATA GND 2
R9630 AOAC@0_4
[7,30,35] PCIE_WAKE# WAKE# +3.3V R9631 NAOAC@0_4
2 [13,14,38] CGDAT_SMB
Q5035 AAA-PCI-052-P01
[37] BT_RFCTRL
C C
LTC044EUBFS8TL_30MA WIMAX_P
5
1
3 4 SCLK_WLAN
[9,13,35] SCLK
Q5048B AOAC@2N7002KDW_115MA
x
R9632 NAOAC@0_4
[13,14,38] CGCLK_SMB
MINI MNG
Card
fi
Slot#2-3G
+3V +1.5V
+1.5V +3V
C5359 C5317 C5318 C5319 C5320 C5360 C5321 C5322 C5578 C5323 C5576
*3G@47P/50V_4N E@0.1U/10V_4X E@0.1U/10V_4X E@0.1U/10V_4X E@0.1U/10V_4X *3G@47P/50V_4N E@0.1U/10V_4X E@0.1U/10V_4X E@0.1U/10V_4X E@0.1U/10V_4X *3G@10U/6.3V_6X
a
2.75A(120mils) CN2006
B2A B2A CN2005

UIM_CLK
USB_SIM#
6
7 CLK(C3) GND(C5)
1
2 UIM_PWR
51 52 [9] USB_SIM# USB_SIM 8 N/A(C8) VCC(C1) 3 UIM_VPP
49 NC +3.3V 50 [9] USB_SIM 9 N/A(C4) VPP(C6) 4 UIM_RST
47 C-Link_RST GND 48 10 CT RST(C2) 5 UIM_DATA
45 C-Link_DAT +1.5V 46 CD DATA(C7)
B B
43 C-Link_CLK LED_WPAN# 44
in
41 GND LED_WLAN# 42
GND
GND
GND
GND
39 +3.3V LED_WWAN# 40
37 +3.3V CPUSB# 38 CPUSB# [10]
35 CPEE# USB_D+ 36 USB_3G [9]
3G@CE015
GND USB_D- USB_3G# [9]
13
11
12
14
33 34
[9] PCIE_TXP_3G 31 PETp0 GND 32
[9] PCIE_TXN_3G# 29 PETn0 SMB_DATA 30 CGDAT_SMB [13,14,38]
GND SMB_CLK CGCLK_SMB [13,14,38]
27 28
25 GND +1.5V 26
[9] PCIE_RXP_3G 23 PERp0 GND 24
[9] PCIE_RXN_3G# 21 RERn0 +3.3Vaux 22 PLTRST#
19 GND RESET# 20 PLTRST# [3,9,30,35,36,37]
3G_EN
17 MMC_DAT W_DISABLE# 18 3G_EN [37]
UIM_CLK C5324 3G@10P/50V_4C
MMC_CMD GND
[9] CLK_PCIE_3G
[9] CLK_PCIE_3G#
[9] PCIE_CLK_3G_REQ#
h 15
13
11
9
7
5
3
1
GND
REFCLK+
REFCLK-
GND
CLKREQ#
BT_CHCLK
BT_DATA
UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR
+1.5V
GND
16
14
12
10
8
6
4
2
UIM_VPP
UIM_RST
UIM_CLK
UIM_DATA
UIM_PWR
C5326 *3G@100P/50V_4N
UIM_PWR
UIM_VPP
UIM_PWR C5327
UIM_PWR C5328
C5325 *3G@33P/50V_4N
3G@0.1U/16V_4Y
*3G@27P/50V_4N
54
53
WAKE# +3.3V
.c
3G@AAA-PCI-092-P05
54
53
R9633 3G@10K_4 UIM_DATA C5329 3G@27P/50V_4N
UIM_RST C5330 3G@10P/50V_4C
A A
w

w

A1A
MINI CARD(WLAN/3G/SIM Card)
5 4 3 2 1
w
5 4 3 2 1
USB <U3C>
3.0
U5019
30
[3,9,29,35,36,37] PLTRST#
B13 A55 USB20+_R1
PERST# U2DP0 A56 USB20+_R1 [31]
USB20-_R1
U2DM0 USB20-_R1 [31]
PCI Express Interface

[9] CLK_PCIE_USB30 B17
PCIECKP
100MHz [9] CLK_PCIE_USB30# B18
PCIECKM SSTXP0
B48 USB30_TX1+_R1 USB30_TX1+_R1 [31]
B49 USB30_TX1-_R1
SSTXM0 USB30_TX1-_R1 [31]
SuperSpeed USB Port 0 Interface

[9] PCIE_RXP_USB30 C5331 U3C@0.1U/10V_4X PCIE_RXP_USB30_C A23
C5332 U3C@0.1U/10V_4X PCIE_RXN_USB30#_C A24 PCIETXP B50 USB30_RX1+_R1
[9] PCIE_RXN_USB30# PCIETXM SSRXP0 USB30_RX1+_R1 [31]
B51 USB30_RX1-_R1
B15 SSRXM0 USB30_RX1-_R1 [31]
D [9] PCIE_TXP_USB30 PCIERXP D
[9] PCIE_TXN_USB30#
B16
PCIERXM A57 RREF0 R9636 U3C@12K/F_4
R9637 U3C@12K/F_4 A18 UREF0
CLK_PCIE_USB30 C5581 *U3C@4.7P/50V_4C PCIEREXT B47 SSCAP0 C5333 U3C@2200P/50V_4X
CLK_PCIE_USB30# C5582 *U3C@4.7P/50V_4C C5334 U3C@0.1U/16V_4X B19 UCAP0
PCIECAP A58 V1280 C5337 U3C@4.7U/6.3V_6X
UV1280
C3A
m
A50 PPWR0 R9638 *U3C@0_4 USB_SC_EN#
PPWR0 USB_SC_EN# [31,37]
36mA OVCN0
B39 USB_SC_OC0# R9639 *U3C@10K_4 +3V_S5
L5027 U3C@HCB1608KF-181T15_1.5A AVCC33X A4 R9720 U3C@0_4
+3V_S5 AVCC33X USB_SC_OC# [9,31,37]
Analog 3.3V power supply

B45
C5335 C5336 AVCC33X
U3C@1U/6.3V_4X U3C@0.1U/16V_4Y
A3 B2 USB20+_L1
A59 AGND33 U2DP1 B3 USB20+_L1 [32]
USB20-_L1
AVCC33X
o
B6 AGND33 U2DM1 USB20-_L1 [32]
B44 AGND33 A7 USB30_TX2+_L1
Min Typ Max AGND33 SSTXP1 USB30_TX2+_L1 [32]
75mA
A8 USB30_TX2-_L1
SSTXM1 USB30_TX2-_L1 [32]
SuperSpeed USB Port 1 Interface

3.15V 3.30V 3.45V
A9 USB30_RX2+_L1
A12 SSRXP1 A10 USB30_RX2+_L1 [32]
L5028 U3C@HCB1608KF-181T15_1.5A PVCCA33X USB30_RX2-_L1
Current = 36mA +3V_S5 PVCC33X SSRXM1 USB30_RX2-_L1 [32]
C5338 C5339 C5340
.c
B4 RREF1 R9640 U3C@12K/F_4
U3C@10U/6.3V_6X U3C@1U/6.3V_4X U3C@0.1U/16V_4Y UREF1
PVCCA33X A6 SSCAP1 C5341 U3C@2200P/50V_4X
UCAP1
Min Typ Max
B5 V1281 C5342 U3C@4.7U/6.3V_6X
UV1281
3.15V 3.30V 3.45V
170mA
A48 PPWR1 R9701 *U3C@0_4 USB_Normal_EN#
PPWR1 USB_Normal_EN# [32,37]
Current = 75mA
A46 USB_SC_OC1# R9641 *U3C@10K_4
OVCN1 +3V_S5
L5029 U3C@HCB1608KF-181T15_1.5A AVCC10X A17
+1.05VSUS AVCC10X
Analog 1.0V power supply

A22 R9700 U3C@0_4
A60 AVCC10X USB_Normal_OC# [9,32,37]
C5343 C5344
AVCC10X B7 AVCC10X
x
C U3C@1U/6.3V_4X U3C@0.1U/16V_4Y AVCC10X A51 XCKSEL0 R9642 *U3C@4.7K_4 C
Min Typ Max XCKSEL0 +3V_S5
1.00V 1.05V 1.05V B41 XCKSEL1 R9643 *U3C@4.7K_4

XCKSEL1
Current = 170mA
33mA
A52 XCK
XCK TP2033
fi
L5030 U3C@HCB1608KF-181T15_1.5A AVCC10 B14 B43 XIN C5345 U3C@22P/50V_4N
AVCC10 +1.05VSUS AVCC10 XSCI
Min Typ Max C5346 C5347
1.00V 1.05V 1.05V U3C@1U/6.3V_4X U3C@0.1U/16V_4Y R9644 Y5001

A19
AGND10 B2A
Crystal
A61 *U3C@1M_4
Current = 33mA AGND10
A62 U3C@12MHZ_30
B8 AGND10
AGND10
72mA
B9
a
B20 AGND10 A53 XOUT R9645 U3C@0_4 C5348 U3C@22P/50V_4N
DVCC33X AGND10 XSCO
PVCCA25OX B11
Min Typ Max PVCC25OX
ŇōĲııĺ
C5349 C5350 +3V_S5
2.97V 3.30V 3.63V
U3C@1U/6.3V_4X U3C@0.1U/16V_4Y R9646 *U3C@0_4 +3V_S5
Current = 0mA
Internal POWER
in
R9647 R9649 R9650 R9651
B34 R9648 *U3C@0_4
U3C@0_8 PPWRCTL
DVCC33 U3C@4.7K_4 *U3C@4.7K_4 *U3C@4.7K_4
Min Typ Max
A39 AUXDET
PVCCA25X A5 AUXDET
2.97V 3.30V 3.63V PVCC25X
A21 A14
PVCC25X WAKE# PCIE_WAKE# [7,29,35]
C5351 C5352 B46
Current = 5mA PVCC25X A15
CLKREQ# PCIE_CLK_USB30_REQ# [9]
U3C@1U/6.3V_4X U3C@0.1U/16V_4Y
A1 B28 R9652 U3C@0_4
PGND SMI# USB30_SMI# [9]
A20
B
DVCC10X
Min
1.00V
Typ
1.05V
Max
1.10V 5mA
A54
B10
PGND
PGND
PGND
h
EEPROM
ROMSDA
ROMSCL
B27
A35
ROMSDA
ROMSCL
R9653
R9654
*U3C@4.7K_4
*U3C@4.7K_4
+3V_S5
B
Digital IO power supply
R9655 U3C@0_6 DVCC33X A44 A33 ROMPRES R9656 *U3C@4.7K_4

Current = 23mA +3V_S5 DVCC33X ROMPRES
B12
B38 DVCC33X
.c
C5353 C5354
DVCC33X
U3C@1U/6.3V_4X U3C@0.1U/16V_4Y U2LNK#
B22
B21 B2A
DVCC10 A26 PCIELNK# A27
B25 DVCC33 SSLNK# A28
Min Typ Max DVCC33 DATTX#
B30 B24
DVCC33 DATRX#
1.00V 1.05V 1.10V
Current = 71mA 115mA

R9657 U3C@0_6 DVCC10X A11 A2
+1.05VSUS DVCC10X NC
A13 A29
DVCC10X NC
Digital core power supply
C5355 C5356 B40 A30

DVCC10X NC
w
B42 A31
U3C@1U/6.3V_4X U3C@0.1U/16V_4Y B52 DVCC10X NC A32
DVCC10X NC A34
NC A37
NC
EEPROM <U3B>
A16 A38
A25 DVCC10 NC A40
A36 DVCC10 NC A43
A41 DVCC10 NC A45
A42 DVCC10 NC A47
DVCC10 NC
B23 A49
B2A
w
B26 DVCC10 NC A63 +3V_S5 +3V_S5

B32 DVCC10 NC A64 U5020
DVCC10 NC B1 ROMSCL 6 1
NC B29 R9658 ROMSDA 5 SCL A0 2
NC B31 SDA A1 3
NC B33 A2
NC B35 U3C@4.7K_4 7 8
XCKSEL[1:0] NC B36 WP VCC 4
NC GND
00(default) 12MHz crystal oscillator to XSCI/XSCO 117
DGND TESTN
B37 TESTN
*U3C@M24C08-WMN6TP
C5357
w
A *U3C@0.1U/16V_4Y A
01 30MHz crystal oscillator to XSCI/XSCO
U3C@FL1009-2Q0
10 48MHz reference clock to XCK pin
11 24MHz reference clock to XCK pin
PPWRCTL VBus controllable, internal pull down

0 VBus is not controlled by FL1009
1 VBus is controlled by FL1009 Quanta Computer Inc.
V1280
V1281
R9659
R9660
U3C@0_4
U3C@0_4 AVCC10X PROJECT : Chief River
A1A
USB 3.0(FL1009)
5 4 3 2 1
5 4 3 2 1
USB CONNECT <U3B/USB>

RIGHT(UR) [30] USB20-_R1
[30] USB20+_R1
[9] USBP0-
D3A
RN16
4
1
1
4
3
2
U3C@MCM2012B900GBE
2
3
USB20N_R
USB20P_R 31
[9] USBP0+
RN17 U3C-N@MCM2012B900GBE
1 2
4 3 R9666 U3C@0_4 USB30_RX1-_RR
[30] USB30_RX1-_R1
RN18 UR-2@MCM2012B900GBE R9667 U3C@0_4 USB30_RX1+_RR
[30] USB30_RX1+_R1
R9668 U3C-N@0_4
+5V_S5 [9] USB30_RXN1_R
R9670 U3C-N@0_4
[9] USB30_RXP1_R
D D
R9671 U3C@0_4 USB30_TX1-_RR

[30] USB30_TX1-_R1
C5358 R9672 U3C@0_4 USB30_TX1+_RR
[30] USB30_TX1+_R1
S&C@0.1U/16V_4Y R9673 U3C-N@0_4
[9] USB30_TXN1_R
U5022 R9674 U3C-N@0_4
m
[9] USB30_TXP1_R
R9862 *S&C@10K_4
D3A
5 6 USB20P_R R9853 NS&C@0_4
R9861 *S&C@0_4 VCC TDP 7 USB20N_R R9854 NS&C@0_4
[37] USB_BUS_SW4 TDM
R9860 *S&C@0_4 1
[37] USB_BUS_SW3 CB1(CEN#)
8
[37] USB_BUS_SW2 CB 3 USB20P_CONN_C
DP 2 USB20N_CONN_C
DM
o
9 4 R9859 S&C@0_4
GND GND USB_BUS_SW3 [37]
S&C@MAX14600ETA+T R9858 *S&C@0_4
B2A
.c
+3V_S5
+5V_S5
R9861 R9860 R9859 R9858 R9862 R9748
U5021
14566 V V UR-3@10K_4 2 8 +5VSUS_USBP0
3 IN1 OUT3 7
IN2 OUT2 6
14600 V OUT1
USB_SC_EN# 4 C5362 + C5361
[30,37] USB_SC_EN# 1 EN#
14617(with CB2) V V R9750
C5364 9 GND 5 UR-3@100U/6.3V_1206 *UR-3@100U/6.3V_3528P_E45b
x
GND-C OC# *UR-3@470/F_4
C 14617(no CB2) V V C
UR-3@1U/6.3V_4X UR-3@UP7534BRA8-15
C3A
E3A
3
14566/14600
fi
2
CB0 CB1 Status [9,30,37] USB_SC_OC#
Q5017
0 0 Auto mode *UR-3@ME2N7002E_200MA
1
0 1 Force dedicated charger mode
1 X Pass-Through(USB) mode:
Connect DP/DM to TDP/TDM for 14566 E3A
a
1 0 Pass-Through(USB) mode for 14600
1 1 pass-through(USB) with CDP +3V_S5 B2A
Emulation for 14600
in
+5V_S5
R9751
14617 U5032
UR-2@10K_4 2 8 +5VSUS_USBP0
3 IN1 OUT3 7
CB0 CB1 CB2 Status IN2 OUT2 6
USB_SC_EN# 4 OUT1 C5367
X X 1 Force Apple 2A Charger Mode [30,37] USB_SC_EN# + C5363
1 EN# R9753
9 GND 5 UR-2@100U/6.3V_1206 *UR-2@100U/6.3V_3528P_E45b
0 0 0 Autodetection charger mode GND-C OC#
C5368 *UR-2@470/F_4
0 1 0 Force-Dedicated Charger Mode UR-2@UP7534BRA8-15
C3A
UR-2@1U/6.3V_4X
E3A
1 0 0 USB Pass-Through Mode(USB)
3
B Connect DP/DM to TDP/TDM B
USB Pass-Through Mode with CDP

2
1 1 0 Emulation.Auto connect DP/DM to
[9,30,37] USB_SC_OC#
TDP/TDM depending on CDP status Q5020
*UR-2@ME2N7002E_200MA
.c
1
CN2021
E3A
CN2007
+5VSUS_USBP0 1
1 VBUS
USB20N_CONN_C 2
6
2 D-
USB20P_CONN_C 3
4 3 D+ +5VSUS_USBP0
4 GND 1
D3A USB30_RX1-_RR 5 USB20N_CONN_C
w
USB30_RX1+_RR 6 5 SSRX-
USB20P_CONN_C
2
7 6 SSRX+ 3
1
USB30_TX1-_RR C5365 UR-3@0.1U/10V_4X USB30_TX1-_C 8 7 GND 4

8 SSTX- D31
USB30_TX1+_RR C5366 UR-3@0.1U/10V_4X USB30_TX1+_C 9
9 SSTX+ *AZ5125-01J
5
13
12
11
10
2
13
12
11
10
UR-3@TARAH-9V1391
UR-2@UARCF-4K1986
w
w
A A

A1A
USB3 Redriver/S&C/USB2
5 4 3 2 1
5 4 3 2 1
USB CONNECT <U3B/USB>

LEFT1(ULU)
D3A C3A B2A
USB 3.0
Rrdriver IC
<U3B> +3V_S5
R9721
B2A
+5V_S5
U5023
32
USB3.0 re-driver IC 10K_4 2 8 +5VSUS_USBP1
2 4 USB20N_L1_C U5024 3 IN1 OUT3 7
[30] USB20-_L1 1 3 IN2 OUT2 6
USB20P_L1_C
[30] USB20+_L1 8 23 4 OUT1
RN15 U3CL@DLP11SN900HL2L_150MA USB30_TX3-_RRR C5375 ULU-3@0.1U/10V_4X USB30_TX3-_CC USB30_TX3-_RR C5370 + C5369
2 1 9 RX1- TX1- 22 [30,37] USB_Norm al_EN# 1 EN#
USB30_TX3+_RRR C5377 ULU-3@0.1U/10V_4X USB30_TX3+_CC USB30_TX3+_RR R9757
[9] USBP2- 3 4 RX1+ TX1+ 9 GND 5 *100U/6.3V_1206 100U/6.3V_3528P_E45b
[9] USBP2+ 11 20 GND-C OC#
RN14 U3CL-N@MCM2012B900GBE USB30_RX3-_RRR C5378 ULU-3@0.1U/10V_4X USB30_RX3-_CC USB30_RX3-_RR C5372 *470/F_4
2 1 12 TX2- RX2- 19
USB30_RX3+_RRR C5376 ULU-3@0.1U/10V_4X USB30_RX3+_CC
TX2+ RX2+
USB30_RX3+_RR UP7534BRA8-15
C3A
D
3 4 1U/6.3V_4X
E3A D
RN11
C3A
3
ULU-2@MCM2012B900GBE 1 R9710 *ULU-3@4.99K/F_4
+USB_RE_PWR VCC
13 5 R9711 *ULU-3@4.99K/F_4
VCC EN_RXD +USB_RE_PWR
EQ1 2
R9687 U3CL@0_4 USB30_RX3-_RRR EQ1 14 R9712 *ULU-3@4.99K/F_4 2
[30] USB30_RX2-_L1 17 CM
[30] USB30_RX2+_L1
R9689 U3CL@0_4 USB30_RX3+_RRR EQ2
EQ2 7
R9713 ULU-3@4.7K/F_4
C3A [9,30,37] USB_Norm al_OC#
Q5021
R9691 U3CL-N@0_4 DE1 3 NC1 24 *ME2N7002E_200MA
[9] USB30_RXN3_L1 DE1 NC2
R9692 U3CL-N@0_4
[9] USB30_RXP3_L1
1
DE2 16 6
m
DE2 GND 10
OS1 4 GND 18
OS1 GND
[30] USB30_TX2-_L1
R9694
R9696
U3CL@0_4
U3CL@0_4
USB30_TX3-_RRR
USB30_TX3+_RRR OS2 15 GND
21
E3A
[30] USB30_TX2+_L1 OS2
R9698 U3CL-N@0_4
[9] USB30_TXN3_L1
R9699 U3CL-N@0_4 ULU-3@PI3EQX7502IZDE
[9] USB30_TXP3_L1
B2A D3A
o
CN2008
+5VSUS_USBP1 1
1 VBUS
USB20N_L1_C 2
+USB_RE_PWR 3 2 D-
USB20P_L1_C
4 3 D+
5 4 GND
D3A USB30_RX3-_RR
5 SSRX-
Control pins setting USB30_RX3+_RR 6
.c
7 6 SSRX+
8 7 GND
R9703 R9704 R9705 R9706 R9707 R9708
EN_RXD Device function CM Device function USB30_TX3-_RR
USB30_TX3+_RR
C5373
C5374
ULU-3@0.1U/10V_4X
ULU-3@0.1U/10V_4X
USB30_TX3-_C
USB30_TX3+_C 9 8 SSTX-
9 SSTX+
1(default) Normal Operation 0(default) Normal Operation
13
12
11
10
0 Sleep Mode 1 Compliance Test Mode
13
12
11
10
ULU-3@0_4 ULU-3@0_4 *ULU-3@4.99K/F_4 *ULU-3@4.99K/F_4 *ULU-3@4.99K/F_4 *ULU-3@4.99K/F_4
C EQ1 C
C3A EQ2
DE1
DE2
OS1 +USB_RE_PWR
OS2 +3V
ULU-3@TARA9-9V1391
x
R9714 R9715 R9716 R9717
C3A R9718 R9719
R9702 *ULU-3@0_6 +USB_RE_PWR
C5379 C5380 C5381 C5382 CN2022

+3V_S5
ULU-3@1U/6.3V_4X ULU-3@0.1U/16V_4Y ULU-3@2.2U/6.3V_6X ULU-3@470P/50V_4X
*ULU-3@4.99K/F_4 *ULU-3@4.99K/F_4 *ULU-3@75K/F_4 *ULU-3@75K/F_4 ULU-3@4.99K/F_4 ULU-3@4.99K/F_4 R9709 ULU-3@0_6
6
fi
E3A +5VSUS_USBP1
USB20N_L1_C 1
USB20P_L1_C 2
3
1
4
D34
*AZ5125-01J
5
D3A
2
a
ULU-2@UARC6-4K1926
in
B
USB CONNECT ULD B
LEFT2(ULD)
h CN2009
6
+5VSUS_USBP1 EMI B2A
RN6 2 1 E@MCM2012B900GBE USBP9-_C 1
[9] USBP9-
.c
3 4 USBP9+_C 2
[9] USBP9+ 3
1
4
D30
*AZ5125-01J
5
2
E3A UARC6-4K1926
w
A A
D3A
w

w

A1A
USB3 Redriver/USB2_Left
5 4 3 2 1
5 4 3 2 1
SATA
HDD
HDD
33
CN2010 CN2023
23 23
GND23 GND23
1 1
GND1 2 SATA_TXP_1ST_HDD_C C5387 0.01U/25V_4X GND1 2 SATA_TXP_1ST_HDD_C
RXP 3 SATA_TXP_1ST_HDD [8] RXP 3
D SATA_TXN_1ST_HDD#_C C5388 0.01U/25V_4X SATA_TXN_1ST_HDD#_C D
RXN 4 SATA_TXN_1ST_HDD# [8] RXN 4
GND2 5 SATA_RXN_1ST_HDD#_C C5389 0.01U/25V_4X GND2 5 SATA_RXN_1ST_HDD#_C
TXN 6 SATA_RXP_1ST_HDD_C SATA_RXN_1ST_HDD# [8] TXN 6 SATA_RXP_1ST_HDD_C
C5390 0.01U/25V_4X
TXP 7 SATA_RXP_1ST_HDD [8] TXP 7
GND3 GND3
m
8 8
3.3V 9 3.3V 9
3.3V 10 3.3V 10
3.3V 11 3.3V 11
GND 12 GND 12
GND 13 GND 13
GND 14 GND 14
o
5V 15 5V 15
5V 16 +5V_HDD1 5V 16 +5V_HDD1
5V +5V 5V
17 17
GND 18 GND 18
RSVD 19 C5391 C5392 + C5393 RSVD 19
GND 20 GND 20
.c
12V 21 *0.1U/16V_4Y *10U/6.3V_6X *100U/6.3V_3528P_E45b 12V 21
12V 22 12V 22
12V 12V
24
C3A 24
GND24 GND24
Capetown@SAT-22ESAB Luxor@SAT-22EH1B
x
C C
fi
SATA ODD <ODD> ODD Zero power . <OZP>
(Only for Intel)
a
CN2011
14
GND14
1
GND1
in
2 SATA_TXP_ODD_C C5394 0.01U/25V_4X
RXP SATA_TXP_ODD [8]
3 SATA_TXN_ODD#_C C5395 0.01U/25V_4X
RXN 4 SATA_TXN_ODD# [8] +5V +5V_ODD
GND2 5 SATA_RXN_ODD#_C C5396 0.01U/25V_4X
TXN SATA_RXN_ODD# [8]
6 SATA_RXP_ODD_C C5399 0.01U/25V_4X SATA_RXP_ODD [8]
TXP 7
GND3 L11 ZRP-N@HCB1608KF-121T30_3A
+5V
8
DP ODD_PRSNT# [10]
9 1 3
B
+5V
+5V
MD
10
11
12
+5V_ODD
ODD_MD# [9]
h +5V_ODD
C5397 Q5040 C5398 R9722
B
2
GND 13 C5400 C5401 + C5402 ZRP@4.7K_4
GND ZRP@0.01U/25V_4X ZRP@ME1303_3A *ZRP@0.01U/25V_4X
15 *0.1U/16V_4Y *10U/6.3V_6X *100U/6.3V_3528P_E45b
GND15
.c
R9723 ZRP@3.01K/F_4
Capetown@C18526-11305-L C3A
3
+5V_ODD 2
PCH_ODD_EN [10]
Q5041
1
CN2024 R9724
14 ZRP@LTC044EUBFS8TL_30MA
w
GND14 ZRP@22_8
1
GND1 2 SATA_TXP_ODD_C
RXP 3 SATA_TXN_ODD#_C
RXN
3
4
GND2 5 SATA_RXN_ODD#_C
TXN 6 SATA_RXP_ODD_C
TXP
w
7 2
GND3
8 Q5042
DP ODD_PRSNT# [10]
9
1
+5V 10 +5V_ODD ZRP@ME2N7002E_200MA
+5V 11
MD ODD_MD# [9]
12
w
GND 13
A GND A
15
GND15
Luxor@C185K3-11308-L

A1A
HDD/ODD
5 4 3 2 1
5 4 3 2 1
Codec (CX20671-21Z) <ADO> External MIC <ADO>
MIC1-VREFO
34
R9725 R9726
3.3K/F_4 3.3K/F_4
FILT_1.65V
CN2012
1
C5403 C5404 MIC1_L1 R9727 100/F_6 MIC1_L2 L5031 HCB1608KF-121T20_2A MIC1_L3 2 7
6 8
D 1U/6.3V_4X 0.1U/16V_4Y MIC1_R1 R9728 100/F_6 MIC1_R2 L5032 HCB1608KF-121T20_2A MIC1_R3 3 9 D
4 10
E3A ADOGND
Port_B# 5
2SJ3013-009311F Shield_GND
+3V R9729 *SHORT_6 +3AVDD C5405 C5406 C5407 Normal Open Jack
C5409 C5411 C5412
AVDD_3.3
100P/50V_4N 100P/50V_4N *0.1U/16V_4Y
C3A
C5408 C5410
0.1U/16V_4Y 4.7U/6.3V_6X 0.1U/16V_4Y
4.7U/6.3V_6X 0.1U/16V_4Y
m
E3A ADOGND
ADOGND
R9731 *SHORT_6 +3AVDD_S5
+3V_S5
C5413 C5414 +5AVDD
(100mils)
+5V
MIC1_L3 C5597 *0.1U/10V_4X
*10U/6.3V_6X 0.1U/16V_4Y C5415 C5416
MIC1_R3 C5596 *0.1U/10V_4X
*10U/6.3V_6X 0.1U/16V_4Y
o
+3AVDD
E3A
C5417 C5418 (40mils)
CLASSD_5V
Headphone <ADO>
*10U/6.3V_6X 0.1U/16V_4Y
.c
C5419 C5420 C5421 C5422
0.1U/16V_4Y 0.1U/16V_4Y 10U/6.3V_6X 10U/6.3V_6X

FILT_1.8V
C5424
C C
R9855 C5423 C5425 CN2013
0.1U/16V_4Y 1
*10K_4 4.7U/6.3V_6X 0.1U/16V_4Y HPOUT-L R9732 5.1/F_6 HPOUT-L2 L5033 HCB1608KF-121T20_2A HPOUT-L3 2 7
+3AVDD 6 8
HPOUT-R R9733 5.1/F_6 HPOUT-R2 L5034 HCB1608KF-121T20_2A HPOUT-R3 3 9
4 10
18
26
29
27
28
12
15
17
3
2
7
U5026
R9734 Port_A# 5
CLASSDREF
AVDD_HP
AVDD_5V
FILT_1.8
VAUX_3.3
VDD_IO
DVDD_3.3
FILT_1.65
AVDD_3.3
LPWR_5.0
RPWR_5.0
C5426 *0.1U/16V_4Y
GND
x
5.11K/F_4 2SJ3013-009311F Shield_GND
9 C5427 C5428 C5429
[8] ACZ_RST#_AUDIO RESET# Normal Open Jack
E3A R9736 *SHORT_4 BIT_CLK_AUDIO_R 5 36 SENSE_A
R9735
R9737
39.2K/F_4
20K/F_4
Port_A#
Port_B#
*100P/50V_4N *100P/50V_4N *0.1U/16V_4Y
C3A
[8] BIT_CLK_AUDIO 8 BIT_CLK SENSE_A
[8] ACZ_SYNC_AUDIO 6 SYNC
R9738 33_4 SDATA_IN
[8] ACZ_SDIN0_AUDIO SDATA_IN
4
[8] ACZ_SDOUT_AUDIO
fi
SDATA_OUT ADOGND
35 MIC1-RR C5430 2.2U/6.3V_6X MIC1_R1

PORTB_R 34 MIC1-LL C5431 2.2U/6.3V_6X MIC1_L1
PORTB_L 33 MIC1-VREFO_B R9739 *SHORT_4 MIC1-VREFO
B_BIAS
C5432 0.1U/16V_4Y PCBEEP_C 10 32 E3A
[8] PCBEEP PC_BEEP C_BIAS 31 TP2034
39 PORTC_R 30 TP2035 HPOUT-L3 C5598 *0.1U/10V_4X
SPDIF PORTC_L TP2036
38 HPOUT-R3 C5599 *0.1U/10V_4X
TP2037 GPIO0/EAPD#
a
AMP_MUTE# 37
[37] AMP_MUTE# GPIO1/SPK_MUTE# CX20671-21Z
25
NC_DR
NC_DL
24
E3A
23 HPOUT-R
R9740 100_4 DMIC 40 PORTA_R 22 HPOUT-L
[28] INT_DMIC_CLK DMIC_CLK PORTA_L
Internal Speaker <ADO>
INT_DMIC_DATA 1
B
[28] INT_DMIC_DATA DMIC_1/2 21 AVEE B
in
AVEE 20 FLY_N
FLY_N 19 FLY_P C5433 1U/6.3V_4X
FLY_P C5434 C5435
EP_GND
RIGHT+
RIGHT-
LEFT+
LEFT-
0.1U/16V_4Y 4.7U/6.3V_6X CN2014

SPK_R+ R9741 BLM18PG471SN1D_1A INSPKR+N 1
SPK_R- R9742 BLM18PG471SN1D_1A INSPKR-N 2 1
SPK_L- R9743 BLM18PG471SN1D_1A INSPKL-N 3 2
11
13
14
16
41
SPK_L+ R9744 BLM18PG471SN1D_1A INSPKL+N 4 3

4
R9745 *SHORT_6 E3A
R9746 *0_6
C3A 88266-040L
C5436 *0.47U/6.3V_4X DMIC
C5437 *0.47U/6.3V_4X INT_DMIC_DATA R9747
B2B
*SHORT_6
ADOGND
E3A
h MIC1-RR C5442 *0.47U/6.3V_4X

INSPKL-N
INSPKL+N
INSPKR-N
INSPKR+N
C5438
E@2200P/50V_4X
C5439
E@2200P/50V_4X
C5440
E@2200P/50V_4X
C5441
B2A
E@2200P/50V_4X
.c
C5443 *10P/50V_4C ACZ_RST#_AUDIO
MIC1-LL C5444 *0.47U/6.3V_4X
C5445 *10P/50V_4C BIT_CLK_AUDIO SPK_R+
C5446 *10P/50V_4C ACZ_SDOUT_AUDIO SPK_R-

INSPKL-N
SPK_L- INSPKL+N
INSPKR-N
SPK_L+ INSPKR+N
C5591 C5592 C5593 C5594

39P/50V_4N 39P/50V_4N 39P/50V_4N 39P/50V_4N
A A
w
E3A
ADOGND

w

A1A
Audio Codec (CX20671)
5 4 3 2 1
w
5 4 3 2 1
Atheros Lan <LAN/LN1.LNG>

LAN_VDD33
C5447
LAN@4.7U/6.3V_6X
C5448
*LAN@10U/6.3V_6X
0.163A(20mils)
C5449
51@1000P/50V_4X
LAN_VDD33
C5450
LAN@1U/6.3V_4X
C5451
LAN@0.1U/16V_4Y
1
U5027
VDD33 LED1/LED_LINK10/100n
39
38
LAN_LINKLED#
LAN_ACTLED
AR8162 Pin 23 for LAN LED, No use NC. B2A
35
LED0/LED_ACTn 23 CKREQ#
LED2/CLKREQn
C5452 LAN@1U/6.3V_4X
37
AR8161/8162 Pin 24/28 NC B2A
DVDDL C5453 LAN@0.1U/16V_4Y
DVDD_REG 24 DVDDL_LAN R9763 LAN@0_4 DVDDL C5454 LAN@0.1U/16V_4Y
DVDDL
Atheros
2 31 AVDDL C5455 LAN@0.1U/16V_4Y
D [3,9,29,30,36,37] PLTRST# R9749 LAN@0_4 PCIE_LAN_WAKE# 3 PERSTn AVDDL 34 AVDDL C5456 LAN@0.1U/16V_4Y D
[7,29,30] PCIE_WAKE# CKREQ_G# 4 WAKEn AVDDL
VDDCT_REG/CKRn 33 CLK_PCIE_LAN
B2A B2A C5457 LAN@0.1U/16V_4Y AVDD_CEN R9764 LAN@0_4 AVDD_CEN_LAN 5 REFCLKP 32 CLK_PCIE_LAN# CLK_PCIE_LAN [9]
VDDCT REFCLKN 36 CLK_PCIE_LAN# [9]
AR8162 Pin 4 10K to LAN power AR8161/8162 Pin 5 30K/F to +3V S0 +3V R9787 *30K/F_4
RX_N PCIE_TXN_LAN# [9]
35
R9752 *10K_4 AVDDL 6 RX_P 30 PCIE_RXP6_C C5458 LAN@0.1U/10V_4X PCIE_TXP_LAN [9]
[9] PCIE_CLK_LAN_REQ#
R9754 51@0_4 CKREQ_G# R9755 52@0_4
LAN_VDD33
AVDD_CEN
C3A
AVDDL_REG
AR8151/AR8152 TX_P
TX_N
29 PCIE_RXN6_C C5459 LAN@0.1U/10V_4X
PCIE_RXP_LAN
PCIE_RXN_LAN#
[9]
[9]
C5462 C5463 C5460 33P/50V_4N LAN_XTLO 7 28
R9756 52@0_4 CKREQ# C5461 *52@1U/6.3V_4X XTLO TEST_RST 27
2
TESTMODE
LAN@0.1U/16V_4Y LAN@1U/6.3V_4X Y5002
C5464 *52@10U/6.3V_6X LAN_XTLI 8 26 SB_SMBDATA1_LAN
XTLI SMDATA 25 SB_SMBCLK1_LAN
SMCLK
m
C5465 52@0.1U/16V_4Y 25MHZ_30
1
C5466 33P/50V_4N 40 LX L5035 51@4.7uh_C_1A AVDD_CEN
AVDDH 9 LX
AVDDH_REG C5467 C5468 C5469
R9758 LAN@2.37K/F_4 RBIAS 10 41
RBIAS GND1
C5470 C5471 51@1000P/50V_4X 51@10U/6.3V_6X 51@0.1U/16V_4Y
TX0P 11
TX0N 12 TRXP0
LAN@0.1U/16V_4Y LAN@1U/6.3V_4X
TRXN0 22 AVDDH C5472 LAN@0.1U/16V_4Y
TX1P 14 AVDDH
C754 *1U/6.3V_4X
TX1N 15 TRXP1
TRXN1
C3A AVDDH
16 AVDDH_C C5473 51@0.1U/16V_4Y
o
TX2P 17 19 AVDDL C5474 51@0.1U/16V_4Y
TRXP2 AVDDL
+3V_S5 LAN_VDD33
C3A TX2N 18
TRXN2 AVDDL
13 R743 51@0_4
AVDDH
20
GND10
TX3P AVDDL C5475 51@0.1U/16V_4Y R744 *0_6 LAN_VDD33
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
TX3N 21 TRXP3
TRXN3
C
R9761 *LAN@0_6 AR8161/18162 Pin 13 0.1U to GND C
AR8161/18162 :
R9760 *LAN@0_4 SB_SMBDATA1_LAN 51_52@AR8151-AL1B-R AR8161 Pin 19 0.1U to GND
[9,13,29] SDATA
42
43
44
45
46
47
48
49
50
Mount C754 ,C5473,R744
.c
+3V_S5
B2A
C3A
R9762 *LAN@0_4 SB_SMBCLK1_LAN LAN_P [37]
[9,13,29] SCLK
1 3
B2A R81
*,*$$5%/$5
C183 Q5043 C195
2
LAN@4.7K_4
$/
LAN@0.01U/25V_4X LAN@ME1303_3A *LAN@0.01U/25V_4X Q10
$5%/$5
LAN@LTC044EUBFS8TL_30MA
R91 LAN@3.01K/F_4 3 1
$/
x
LED0 = LAN_ACTLED 1 Over-clocking enable (default = 1)
PLACE NEAR LAN IC SIDE <LAN/LN1.LNG> 5- <LAN>
75$16)250(5 <LAN/LN1.LNG> CN2015
0 Over-clocking disable
fi
SWR switch-mode regulator select
1 Giga LAN pull High (default = 1)
LED1 = LAN_LINKLED#
AVDD_CEN_T L5036 LAN@HCB1608KF-601T10_1A AVDD_CEN X-TX3N 8
NC4/3-
LDO linear regulator select
TX0N
TX1N
TX0P
TX1P
B B
C5476 51@1000P/50V_4X
U5028
X-TX3P 7
NC/3+ 0 10/100M LAN pull Low
C5477 LAN@0.1U/16V_4Y AVDD_CEN_T 1 24 TERM1 X-TX1N 6
TX0P 2 TCT1 MCT1 23 X-TX0P RX-/1-
2
4
2
4
TD1+ MX1+
C5478 51@1000P/50V_4X TX0N 3 22 X-TX0N U5038 X-TX2N 5
1 Normal function
a
TD1- MX1- TX0P 1 6 TX1P NC2/2-
RN7 RN8
CH1 CH4
C5479 LAN@0.1U/16V_4Y AVDD_CEN_T 4
TCT2 MCT2
21 TERM2 X-TX2P 4
NC1/2+
CKREQ# or CKREQ_G#
LAN@49.9X2 LAN@49.9X2 TX1P 5 20 X-TX1P 2 5
TD2+ MX2+ GND VDD LAN_VDD33
1
3
1
3
C5480 51@1000P/50V_4X TX1N 6

TD2- MX2-
19 X-TX1N
TX0N 3
CH2 CH3
4 TX1N
X-TX1P 3
RX+/1+ 0 ATE test mode
C5483 LAN@0.1U/16V_4Y AVDD_CEN_T 7 18 TERM3 X-TX0N 2
TX2P 8 TCT3 MCT3 17 X-TX2P *LAN@AZ1013-04S.R7G TX-/0-
TX2N 9 TD3+ MX3+ 16 X-TX2N X-TX0P 1
C5481 C5485 C5482 C5486 C5484 51@1000P/50V_4X
TD3- MX3- TX+/0+ 9
in
AVDD_CEN_T 10 15 TERM4 GND 10
LAN@1000P/50V_4X LAN@0.1U/16V_4Y LAN@1000P/50V_4X LAN@0.1U/16V_4Y C5487 LAN@0.1U/16V_4Y
TX3P 11 TCT4 MCT4 14 X-TX3P GND
TX3N 12 TD4+ MX4+ 13 X-TX3N
TD4- MX4-
51@GST5009BLF C5488 C5489 C5490 C5491 LAN@130456-031
U5039
LAN@0.01U/100V_6X LAN@0.01U/100V_6X LAN@0.01U/100V_6X LAN@0.01U/100V_6X TX2N 1
CH1 CH4
6 TX3N Power on Strapping pin
TERM2_C
TERM1_C
2 5 LAN_ACTLED R9765 LAN@5.1K/F_6
GND VDD LAN_VDD33
TERM4_C TERM3_C
TX2P 3 4 TX3P
CH2 CH3 LAN_LINKLED# R9770
U5033 R9766 R9783 R9768 R9784 R9769 R9771 LAN_VDD33 R9767 51@5.1K/F_6 52@5.1K/F_6
AVDD_CEN_T 1 24 TERM1 *LAN@AZ1013-04S.R7G
TX2N
TX3N
TX2P
TX3P
TCT1 MCT1
TX0P 2 23 X-TX0P 51@75/F_8 52@0_8 51@75/F_8 52@0_8 LAN@75/F_8 LAN@75/F_8 B2A
TX0N
AVDD_CEN_T
3
4
TD1+
TD1-
MX1+
MX1-
22
21
X-TX0N
TERM2
h
2
4
2
4
TX1P 5 TCT2 MCT2 20 X-TX1P

A TX1N 6 TD2+ MX2+ 19 X-TX1N A
RN9 RN10
TD2- MX2-
51@49.9X2 51@49.9X2 AVDD_CEN_T 7 18 TERM3
1
3
1
3
TCT3 MCT3
TERM9
TERM9
TX2P 8 17 X-TX2P
TX2N 9 TD3+ MX3+ 16 X-TX2N
.c
TD3- MX3-

AVDD_CEN_T 10 15 TERM4
TCT4 MCT4
C5492 C5497 C5494 C5498 TX3P
TX3N
11
12 TD4+ MX4+
14
13
X-TX3P
X-TX3N
C5495 C5496 C3A
TD4- MX4- 51@10P/3KV_1808N 52@220P/3KV_1808X
PROJECT : BLG
51@1000P/50V_4X 51@0.1U/16V_4Y 51@1000P/50V_4X 51@0.1U/16V_4Y
52@TST1284ALF TX0P C5493 E@6.8P/50V_4N
TX0N C5526 E@6.8P/50V_4N
TX1P C5532 E@6.8P/50V_4N Size Docum ent Num ber Rev
TX1N C5546 E@6.8P/50V_4N A1A
NB7
Atheros Lan
Date: Wednes day, February 01, 2012Sheet 35 of 48
5 4 3 2 1
w
w
w
5 4 3 2 1
Card Reader (AU6437B53-GDL-GR) <MMC> 2 IN 1 Card Reader <MMC>
B2A EMI
36
CTRL3 R9773 E@33_4
SD_CD#
D D
VCC_XD
11
12
4
CN2016
VDD
CD COM
C/D
CTRL1 R9772 BLM15BD121SN1D_300MA SD_WP 10
DATA2 R9781 E@33_4 SD_D2 9 W/P
m
DATA1 R9774 E@33_4 SD_D1 8 DATA2
DATA0 R9776 E@33_4 SD_D0 7 DATA1
6 DATA0
R9778 *0_4 CTRL0 R9775 BLM15BD121SN1D_300MA SD_CLK 5 VSS2 15
WP COM
R9780 *0_4 3 CLK GND3
VSS1
GND2
CTRL2 R9777 E@33_4 SD_CMD 2
DATA3 R9779 E@33_4 SD_D3 1 CMD
XTALSEL
DATA1
DATA0
CTRL1
CTRL3
NBMD
+1.8V_Card DATA3
+3V_Card
o
C5499 SDR009-11-F
E3A
13
14
0.1U/16V_4Y
C5500
EMI B2A
0.1U/16V_4Y
+3V
48
47
46
45
44
43
42
41
40
39
38
37
C U5029 C
.c
VDDHM2
GND2
VDD3
XTALSEL
NC5
NBMD
CTRL1
CTRL3
DATA1
DATA0
DATA7
NC4
R9782
C5501 *33P/50V_4N
VCC_XD
*10K_4 1 36
2 GPON7 NC3 35 SD_CLK C5502 *10P/50V_4C
[9] 48M_CARD EXT48IN DATA6
3 34 CTRL0
[3,9,29,30,35,37] PLTRST# RSTN CTRL0
R9785 330_4 4 33 C5503 C5504
5 REXT DATA5 32 CTRL2 4.7U/6.3V_6X 0.1U/16V_4Y
+3V_Card VD33P
AU6437B53-GDL-GR CTRL2
x
C5506 [9] USB_CARD 6 31
C5505 7 DP DATA4 30 DATA3
[9] USB_CARD# DM DATA3
*1U/6.3V_4X 8 29 DATA2
4.7U/6.3V_6X 9 VS33P DATA2 28
10 XI XDWPN 27
11 XO XDCEN 26
+1.8V_Card VDD1 EEPDATA
fi
12 25
V18 EEPCLK
SDWPEN
VDDHM1
AGND5V
AVDD5V
C5507
CF_V33
XDCDN
CTRL4
GND1
VDD2
NC1
NC2
V33
4.7U/6.3V_6X
13
14
15
16
17
18
19
20
21
22
23
24
B AU6437B53-GDL-GR B
a
VCC_XD
SDWP R9786 *0_4
+3V +3V_Card
+1.8V_Card
in
+3V_Card
+3V_Card
C5508 C5509
4.7U/6.3V_6X 0.1U/16V_4Y C5510 C5511 SDWPEN (SD write protect enable)

0.1U/16V_4Y 0.1U/16V_4Y 1 : decided by SDWP(default)
0 : SD always write-able
h NBMD (Power saving mode enable)

1 : enable (default)
0 : disable
.c
A A
XTALSEL (Clock input selection)

1 : 48MHz input (default) Quanta Computer Inc.
0 : 12MHz input
A1A
Card Reader(AU6437)
w

5 4 3 2 1
w
w
5 4 3 2 1
EC <KBC> SM BUS <KBC>

37
SMBUS Devices Address
1 Battery(A)
+3VPCU
B2A +3V PU/Address PCH(S5)
+3VPCU
R9788 HCB1608KF-601T10_1A +A3VPCU +3V_VDD_EC R9794 2.2_6 G-sensor(S0)
MBCLK R9791 4.7K_4 2
R9790
2.2_6
C5512 C5513 C5521 C5522
C3A MBDATA
2ND_MBCLK
R9792
R9795
4.7K_4
4.7K_4
CPU Thermal(A) 98H
0.1U/16V_4Y 10U/6.3V_6X 0.1U/16V_4Y 10U/6.3V_6X 2ND_MBDATA R9796 4.7K_4 IDROM(A)
+3VPCU_EC VGA Thermal(A or S0) 98H
C5514 C5515 C5516 C5517 C5518 C5519 8769AGND +3VPCU
3 CEC(A)
115
102
19
46
76
88
4
10U/6.3V_6X 0.1U/16V_4Y 0.1U/16V_4Y *0.1U/16V_4Y 0.1U/16V_4Y *0.1U/16V_4Y U5030 MMB(A)
TEMP_MBAT C5523 *10U/6.3V_6X 3ND_MBCLK R9798 4.7K_4
AVCC
VDD
VCC1
VCC2
VCC3
VCC4
VCC5
D
H=1.6mm R9799 *100K/F_4
+3VPCU
3ND_MBDATA R9800 4.7K_4 D
ICMNT C5520 *10U/6.3V_6X

3 97
[8,29] LFRAME# LFRAME GPIO90/AD0 TEMP_MBAT [40]
TP <KBC>
126 98 ICMNT
[8,29] LAD0 127 LAD0 GPIO91/AD1 99 ICMNT [40] +3V
A/D AC SET_EC AC SET_EC C5524 *10U/6.3V_6X
[8,29] LAD1 LAD1 GPIO92/AD2 AC SET_EC [40]
[8,29] LAD2
128
1 LAD2 GPIO93/AD3
100
108 USB_BUS_SW4 [31] B2A C3A TPCLK R9793 *4.7K_4
[8,29] LAD3 2 LAD3 GPIO05/AD4 96 USB_SC_OC# [9,30,31] TPDATA R9801 *4.7K_4
[9] PCLK_591 LCLK GPIO04/AD5 95 USB_BUS_SW2 [31] R9804 1.2K/F_4
8 GPIO03/AD6 94 NBSWON# [38]
[7] CLKRUN# GPIO11/CLKRUN GPIO07/AD7 SUSB# [7]
LED <LED>
m
+5VPCU +5V +5V_S5
121
[10] GATEA20 GPIO85/GA20 101
D/A
PU/PD
GPIO94/DA0 USB_BUS_SW3 [31]
[10] RCIN#
122
KBRST/GPIO86 GPIO95/DA1
105
106 VFAN1 [3] B2A RF_LED# R9802 NAOAC@10K_4
29 GPIO96/DA2 LAN_P [35]
LPC SUSLED_EC# R9803 10K_4
[9] SCI# ECSCI/GPIO54 BAT_SAT0# R9805 10K_4
6 BAT_SAT1# R9806 10K_4 R9810 AOAC@10K_4
GPIO24 DISPON_O [28]
124 GPIO01/TB2
64
79 SKU_STRAP_2
ACIN [40]
PWRLED# R9807 10K_4 D3A
[27] CEC_EC_HP GPIO10/LPCPD GPIO02 93
7 GPIO06/IOX_DOUT 114 LID591# [28]
[3,9,29,30,35,36] PLTRST# LREST GPIO16 GFX_MAINON [47,48]
o
109 PWRLED# RF_EN R9808 10K_4
123 GPIO30 15 PWRLED# [39]
[30,32] USB_Norm al_EN# GPIO67/PWUREQ GPIO36 80 SKU_STRAP_3 VRON [45]
125 GPIO41 17 H_PROCHOT_EC
[8] SERIRQ SERIRQ GPIO42/TCK 20 H_PROCHOT_EC [3]
9 GPIO43/TMS 21 AMP_MUTE# [34]
[9,30,32] USB_Norm al_OC# GPIO65/SMI GPIO44/TDI 24 ID [40]
GPIO GPO47/SCL4 WMAX_P [29]
INTERNAL KEYBOARD <KBC>
25
54 GPIO50/PSCLK3/TDO 26 D/C# [40]
[38] MX0 S5_ON [41]
.c
55 KBSIN0 GPIO51 27
STRIP SET
[38] MX1 56 KBSIN1 GPIO52/PSDAT3/RDY 28 HWPG LVDS_BKLT [7,16] MY0 R9809 10K_4 +3VPCU
[38] MX2 57 KBSIN2 GPIO53/SDA4 73
[38] MX3 58 KBSIN3 GPIO70 74 SUSC# [7]
[38] MX4 KBSIN4 GPIO71 MPWROK [7,45]
ID <KBC>
59 75
[38] MX5 60 KBSIN5 GPIO72 82 RSMRST# [7]
[38] MX6 61 KBSIN6 GPIO75 83 RF_EN SLP_SUS# [7]
+3VPCU
EEPROM
[38] MX7 KBSIN7 GPO76/SHBM RF_EN [29] U5031
84
C 53 GPIO77 91 2ND_MBCLK 6 1 C
[38] MY0 52 KBSOUT0/JENK GPIO81 110 DNBSWON# [7] 2ND_MBDATA 5 SCL A0 2
[38] MY1 KBSOUT1/TCK GPO82/IOX_LDSH/TEST SDA A1
[38] MY2
51
50 KBSOUT2/TMS GPO84/IOX_SCLK/XORTR
112
107 B2A A2
3
[38] MY3 49 KBSOUT3/TDI GPIO97 DGPU_PWROK [10,25,47,48] 7 8
[38] MY4 KBSOUT4/JENO KB WP VCC
48 4
[38] MY5 KBSOUT5/TDO GND
x
47 31 SKU_STRAP_1 C5525
[38] MY6 43 KBSOUT6/RDY GPIO56/TA1 117
[38] MY7 42 KBSOUT7 TIMERGPIO20/TA2/IOX_DIN_DIO 63
TEMP_ALERT# [10] M24C08-WMN6TP
0.1U/16V_4Y
[38] MY8 41 KBSOUT8 GPIO14/TB1 FANSIG1 [3]
[38] MY9 40 KBSOUT9/SDP_VIS
[38] MY10 KBSOUT10/P80_CLK ADDRESS: A0H
39 32 RF_LED#
[38] MY11 38 KBSOUT11/P80_DAT GPIO15/A_PWM 118 SUSLED_EC# RF_LED# [39]
[38] MY12 37 KBSOUT12/GPIO64 GPIO21/B_PWM 62 BAT_SAT0# SUSLED_EC# [39]
[38] MY13 KBSOUT13/GPIO63 TIMER GPIO13/C_PWM BAT_SAT0# [39]
SPI <KBC>
36 65 BAT_SAT1#
fi
[38] MY14 35 KBSOUT14/GPIO62 GPIO32/D_PWM 22 BAT_SAT1# [39]
[38] MY15 34 KBSOUT15/GPIO61/XOR_OUT GPIO45/E_PWM 16 SUSON [42]
FLASH
[38] MY16 33 GPIO60/KBSOUT16 GPIO40/F_PWM 81 MAINON [26,43,46]
[38] MY17 GPIO57/KBSOUT17 GPIO66/G_PWM 66 CAPSLED [38]
GPIO33/H_PWM
MBCLK 70 14
[40] MBCLK GPIO17/SCL1 GPIO34 BT_RFCTRL [29]
[40] MBDATA
MBDATA
2ND_MBCLK
69
67 GPIO22/SDA1 B2A SPI_SDI_uR
PCH_SPI_SI [8]
[9] 2ND_MBCLK 68 GPIO73/SCL2 SMB 113
2ND_MBDATA SPI_SDO_uR
[9] 2ND_MBDATA 3ND_MBCLK 119 GPIO74/SDA2 GPIO87/SIN_CR 23 USB3.0_EN [42] PCH_SPI_SO [8]
[16,27] 3ND_MBCLK GPIO23/SCL3 IR GPIO46/TRST
R9816 1K_4
ACZ_SDOUT_R [8]
3ND_MBDATA 120 111 SPI_SCK_uR
a
[16,27] 3ND_MBDATA GPIO31/SDA3 GPO83/SOUT_CR/TRIST 3G_EN [29] PCH_SPI_CLK [8]
R9818 *10K_4 +3VPCU
R9819 *100K/F_4 SPI_CS0#_uR
TPCLK 72 86 SPI_SDI_uR PCH_SPI_CS0# [8]
[38] TPCLK TPDATA 71 GPIO37/PSCLK1 F_SDI/F_SDIO1 87 SPI_SDO_uR
[38] TPDATA 10 GPIO35/PSDAT1 F_SDIO&F_SDIO0 90 SPI_CS0#_uR
[7] AC_PRESENT GPIO26/PSCLK2 PS/2 FIU F_CS0
R9820 10K_4
+3V_S5
11 92 SPI_SCK_uR
[30,31] USB_SC_EN# GPIO27PSDAT2 F_SCK
77 30
[7] SUSCLK GPIO00/EXTCLK GPIO55/CLKOUT/IOX_DIN_DIO SUS_PWR_ACK [7]
in
85 VCC_POR# R9825 4.7K_4
VCC_POR +3VPCU
VCORF
12
AGND
+VTT
GND1
GND2
GND3
GND4
GND5
GND6
EC_PECR_R 13 VTT 104 VREF_uR +A3VPCU

[3] EC_PECI R9826 43_4 R9827 *SHORT_4
PECI VREF
E3A HWPG circuit <KBC>
B B
PCLK_591
5
18
45
78
89
116
103
44
C5527 NPCE885LA0DX
*0.1U/16V_4Y
VCORF_uR
R9830 +3VPCU
*22_4
E3A L5037 *SHORT_6
R9828
C5528
C5529
*10P/50V_4C
L5037 Can't del, DG link
GND/AGND w 0ohm or one point
8769AGND
1U/6.3V_4X
h [48] GFX_PG
[45] GFX_PWRGD
R9834
R9832
*OEV@0_4
*PIV@0_4
E3A
10K_4
.c
R9833 *SHORT_4 HWPG
[44] HWPG_VCCSA
R9836 *SHORT_4
[46] HWPG_1.8V
SKU_STRAP_1 R5138 Luxor@10K_4 +3VPCU
Power Button <KBC>

R9837 *SHORT_4
[7,41] SYS_HWPG
R5137 Capetown@10K_4
w
Capetown@/Luxor@ EV@ / IV@ [42] HWPG_1.5V

R9841 *SHORT_4
SKU_STRAP_2 R5141 Capetown@10K_4 +3VPCU MS Strap SKU_STRAP_1 SKU_STRAP_2 SKU_STRAP_3

DNBSWON# C5530 *0.1U/16V_4Y R5140 Luxor@10K_4 13'' UMA 0 0 0
A R5142 *10K_4 13'' DIS 0 0 1 A
NBSWON# C5531 *0.1U/16V_4Y 14'' Capetown UMA 0 1 0

w
Place on easy use location SKU_STRAP_3 R5144 EV@10K_4 +3VPCU

14'' Capetown DIS
14'' Luxor UMA
0
1
1
0
1
0
R5143 IV@10K_4
14'' Luxor DIS 1 0 1

w

A1A
EC-NPCE885L
5 4 3 2 1
5 4 3 2 1
Power board w LED <PSW>

INT KeyBoard <KBC> TP board <TPD>
38
CN2018
36
K_LED_P
1 MY16
2 MY16 [37]
3 MY17
4 MY17 [37]
5 K_LED_P
6 MY2
7 MY1 MY2 [37]
8 MY1 [37]
MY0
9 MY0 [37]
C5533 *220P/50V_4X MX7 MY4
10 MY4 [37]
C5534 *220P/50V_4X MX2 MY3
MX3 11 MY5 MY3 [37]
C5535 *220P/50V_4X
MX4 12 MY14 MY5 [37]
C5536 *220P/50V_4X
13 MY6 MY14 [37]
D 14 MY7 MY6 [37] D
15 MY13 MY7 [37]
MX0 16 MY8 MY13 [37]
C5537 *220P/50V_4X
MX5 17 MY9 MY8 [37] +5V
C5538 *220P/50V_4X
18 MY9 [37]
C5539 *220P/50V_4X MX6 MY10
MX1 19 MY11 MY10 [37]
C5540 *220P/50V_4X
20 MY11 [37]
MY12
21 MY15 MY12 [37]
22 MX7 MY15 [37]
23 MX7 [37]
C5541 *220P/50V_4X MY7 MX2
24 MX2 [37]
m
C5542 *220P/50V_4X MY13 MX3 CN2019
MY12 25 MX4 MX3 [37] +5V_TP 1
C5543 *220P/50V_4X
MY15 26 MX0 MX4 [37] TPCLK_L 2 1
C5544 *220P/50V_4X
27 MX5 MX0 [37] [37] TPCLK TPDATA_L 3 2 CN2020
28 MX5 [37] [37] TPDATA 4 3
MX6
29 MX6 [37] 5 4 1
MX1
30 MX1 [37] [10] ID_Detect 6 5 [37] NBSWON# 2
K_LED_P C5547 +3V
MY3 31 CAPSLED 6 3
C5549 *220P/50V_4X E@0.1U/10V_4X
MY5 32 CAPSLED [37] 4
C5550 *220P/50V_4X
MY14 33
C5551 *220P/50V_4X 88513-064N 88513-044N
34
C5552 *220P/50V_4X MY6
B2A C5561 C5575
o
35 ID_Detect default E@2200P/50V_4X E@0.1U/10V_4X
C5553
C5554
*220P/50V_4X
*220P/50V_4X
MY2
MY1
91504-344N
D3A Metal/IMR H B2A
C5555 *220P/50V_4X MY0 TEXTURE L
C5556 *220P/50V_4X MY4
+3VPCU
.c
C5557 *100P/50V_4N MY17
RP15
10 1 10KX8 MX7
MX1 9 2 MX2
C5558 *100P/50V_4N MY16 MX6 8 3 MX3
MX5 7 4 MX4
MX0 6 5
C (10mils) B2B C
R9842 150_4 K_LED_P
+3V
HOLE
TP board <TPD>
x
HOLE1 HOLE2 HOLE3
fi
1
CN2025
*H-TC315BC276D118P2 *H-TC315BC276D118P2 *H-TC276BC236D118P2 +5V_TP 1
+5V 1
TPCLK_L 2
[37] TPCLK TPDATA_L 3 2
[37] TPDATA 4 3
5 4
[10] ID_Detect 6 5
+3V 7 6
HOLE4 CGDAT_SMB
[13,14,29] CGDAT_SMB CGCLK_SMB 8 7
[13,14,29] CGCLK_SMB 8
a
*50503-0080N-001
1
*H-TC236D142PB
in
HOLE5 HOLE6 HOLE7
B B
1
*H-TC236D161PB *H-TC236D161PB *H-TC236D161PB
C3A
HOLE8 HOLE9 HOLE10 HOLE11 HOLE12
h
1
*H-TC276BC217I166D146P2 *H-TC276BC217I166D146P2 *H-C256D146PT *H-TC276BC217I166D146P2 *H-C256D146PT

.c
C3A C3A
HOLE14 HOLE15 HOLE16 HOLE17 HOLE18 HOLE19
7 6 7 6 7 6 7 6 7 6 7 6
8 5 8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4 9 4
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
*HG-C276D118P2-A *HG-C276D118P2 *HG-C276D118P2 *HG-C276D118P2 *HG-C276D118P2 *HG-C276D118P2
C3A
w
HOLE13 HOLE20 HOLE21 HOLE22 HOLE23 HOLE24

1
A A
*H-C276I138D118P2 *H-TC197BC131D91P2 *H-TC197BC131D91P2
*H-C91D91N *H-C91D91N *H-C91D91N
w
HOLE26
HOLE25

1
1
*h-c236d118p2
w
*O-BY3C-1
A1A
KB/TP&TP/PB/FL/LEB/MMB/B-CAS
5 4 3 2 1
5 4 3 2 1
LED LED œŇġōņŅ LED

ŃłŕņœœŚ
+5V
39
+5V_S5
3
+5VPCU RF_LED# R9843 1.2K/F_4 3G_WIMAX_LED# LED1 1 2 12-21/S2C-AQ2R2B/2C R9848 NAOAC@0_4
[37] RF_LED#
D R9863 AOAC@0_4 D
2 -BATLED0 R9844 2.2K_4 BAT_SAT0#

C3A D3A
BAT_SAT0# [37]
1
m
3 -BATLED1 R9845 1.2K/F_4 BAT_SAT1#
BAT_SAT1# [37]
LED2
B2A 12-12Z/S2ST3D-C31/2C(QN)
C3A
őŐŘņœ LED ņŔŅġőųŰŵŦŤŵ LED
o
.c
+5VPCU
ŇŐœġŃłŕŕņœŚġōņŅ ŇŐœġŘĮōłŏ ŇŐœġőŰŸŦųġōņŅ
2 -PWRLED R9846 *1.5K/F_4 PWRLED#_Q
PWRLED# [37] ōņŅ
1
C3A -BATLED1
1
3G_WIMAX_LED#
1
-PWRLED
1
3 -SUSLED R9847 1.2K/F_4 SUSLED_EC# 3 3 3

SUSLED_EC# [37] -BATLED0 -SUSLED
x
LED3 2 D2033 2 D2034 2 D2035
C
B2A 12-11Z/T3D-CP2Q2B12Y/2C(QN) *PJMBZ5V6 *PJMBZ5V6 *PJMBZ5V6 C
C3A
fi
a
in
B
ņŎŊ EMI
h B
.c
VIN VIN VIN
B2A B2A +3V +3V_S5 +3VPCU
+5V_S5
w
C2136 C2137 C2138

E@1U/25V_6X E@2200P/50V_4X E@1U/25V_6X
C2146 C2147 C2148 C2149 C2156 C2157 C2158 C2150 C2151 C2152 C2153 C2154 C2155
C2145 *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y
*0.1U/16V_4Y
C2142 C2144 C2143
E@2200P/50V_4X E@2200P/50V_4X E@2200P/50V_4X
E3A
E3A
w
VIN
(13644,1700) (2776,6392) (3884,6592) (13254,5454) (13054,1828)

(2702,5916) (3534,5878) (6949,6677) (7361,6182)
(4664,6694) (5201,6650) (13333,5677)
C2118
E@1U/25V_6X
C2129
E@1U/25V_6X
C2135
E@1U/25V_6X C2139 C2140 C2141
(7047,5660) (7807,5563)
E@1U/25V_6X E@1U/25V_6X E@1U/25V_6X
w
A A
VIN +3V +5V_S5 +3V_S5 +5V +1.5VSUS +1.5V

B2A B2A B2A
C2114 C2115 C2116 C2117 C2119 C2120 C2121 C2122 C2123 C2124 C2125 C2126 C2127 C2128 C2130 C2131 C2132 C2133 C2134 Quanta Computer Inc.
E@2200P/50V_4X E@2200P/50V_4X E@0.1U/25V_6X E@2200P/50V_4X *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y E@0.1U/10V_4X *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y E@0.1U/10V_4X *0.1U/16V_4Y *0.1U/16V_4Y *0.1U/16V_4Y
A1A
LED/EMI/Green CLK
5 4 3 2 1
5 4 3 2 1
PCN1
4
B2A
DC_JACK
PF1
F1206HA15V024TM
1 2 VA0
VA1 PD1
1
3 VA2 1
0.01_3720
PR1
2
R1
VA3
1
2
PQ5001
TPCA8109
5
B2A
VIN
1
2
PQ5002
TPCA8109
5
P1
BAT-V
2 3 3
3
SBR1045SP5-13
1
PC1 PC2 PC25 PC3 PR2 PC4
4
2 E@2200P/50V_4X E@0.1U/25V_4X E@1U/25V_6X 0.1U/25V_6X 220K/F_4 E@1U/25V_6X PR3
PD2 33K_6
1
D D
PR4 PR5
2
PD3 TVS_SMAJ20A 10/F_6 10/F_6
PC5 PR6
50322-0044L-001 1SS355_100MA ( Near by sense R side) E@2200P/50V_4X 10K_6
1 6
PR7 2 5
3
220K/F_4
3 4
PQ5004
PR8 CSIN PQ5003 2 2N7002K_300MA
[37] D/C#
82.5K/F_6 IMD2AT108
+3VPCU
CSIP
[37] AC SET_EC
1
o
VIN
PR10
10U/6.3V_6X
PR9 10K/F_4 PC16 PC9 1U/6.3V_4X

PC8
10K/F_4 0.1U/10V_4X 1 2
.c
10U/25V_8X
10U/25V_8X
*2200P/50V_4X
*10U/25V_8X
*10U/25V_8X
*0.1U/25V_4X
PC10
PC11
PC12
PC13
PC14
PC15
PR11
( Near by IC side) 4.7_6
PC17 1U/6.3V_4X
1 2
ACIN
33
32
31
30
28
27
26
21
C C
[37] ACIN
5
+3VPCU
PC18 0.1U/10V_4X
x
NC
GND
GND
GND
GND
CSSP
CSSN
VCC
VDDP
PQ5005
PR12 PC19
2.7_6 0.1U/25V_6X 4 AON7410
[37] MBDATA 11 25
VDDSMB BOOT
0.01_3720
fi
3
2
1
[37] MBCLK 9 24 88731A_U_GATE PR13
SDA UGATE
B2A PL1
10 23 88731A_PHASE 1 2 BAT-V
SCL PHASE
5
PD4 3.3UH_7X7_TOK
10U/25V_8X
10U/25V_8X
TVLST2304AD0 13 20 88731A_L_GATE
ID 1 6 MBDATA ACOK LGATE PQ5006 PR14
PC21
PC22
a
CH1 CH4 PC20 E@2.2/F_6
2 5 +3VPCU PR15 0.1U/25V_6X 19 4 AON7410
VN VP PGND
TEMP_MBAT 3 4 MBCLK
49.9/F_6
DCIN 22
PU1
ISL88731CHRTZ-T
B2A PR16
10/F_6
PR17
10/F_6
CH2 CH3 DCIN PC23
3
2
1
PR18 E@1000P/50V_4X
in
82.5K/F_6 3.2V CSOP
18
88731ACIN 2
ACIN ( Near by sense R side)
PC24
0.1U/10V_4X CSOP
PR19 3
VREF ( Near by IC side)
+3VPCU 22K/F_6 17 CSON
CSON
B E3A 4 B
PR21 ICOMP 16
PR20 NC
SHORT_4
*100K_4 5
PCN2
10
1
MBAT+ 1
C3A
PF2
F1206HA15V024TM
2 BAT-V h 6
NC
VCOMP
VBF
GND
15
29
PR22
(Please place this R near by battery pack side)

100_4 BAT-V
GND
ICM
2 NC
NC
PR30 1K_4
.c
3 ID [37]
4
BAT-GND
TEMP_MBAT_C
B2A
7
14
12
5 M-DATA
6 M-CLOCK PR23
7 2.21K/F_6
8 PC28 +3VPCU
9 PC30 PC31 PC32
11
2
PC29 47P/50V_4N
PR25 PR26
100/F_4 PR27 *1U/6.3V_4X 0.01U/25V_4X 0.01U/25V_4X PR28
1
2
w
100/F_4 ICMNT [37]

100K_4
BTS1E-9K8040 47P/50V_4N MBDATA [37] 100_4
1K_4
MBCLK [37] 10U/6.3V_6X
PC33
TEMP_MBAT [37]
PR29
w
1
A PC34 A
0.01U/25V_4X
2

CHARGER-ISL88731C A1A
5 4 3 2 1
5 4 3 2 1
VIN
VIN
P2
10U/25V_8X
VIN
+5VPCU PC35
PC36
0.1U/25V_6X
10U/25V_8X
PC39
PC37
[3] SYS_SHDN#
1 2
B2A
PC38
0.1U/25V_6X PR32
D 2.2/F_8 10U/6.3V_6X D
E3A +3VPCU +2VREF
10U/6.3V_6X
1
1
PC41 PC42
m
PC43
1
0.1U/25V_6X 1U/6.3V_4X
2
PR200 PR33
PQ5007 0_4 *0_2/S B2A
16
17
8
5
(Peak 12.85A ,AVG 9A) AON7410 PU2 PQ5008
2
(Peak 13.47A, AVG 9.43A)
VIN
VREG3
VREG5
REF
OCP:15A 13
EN TONSEL
4 AON7410
o
4
5V_UGATE1 21 10 3V_UGATE2 4
OCP:15A
PR34 UGATE1 UGATE2 PR35 PC45
+5V_S5 +3V_S5
B2A PC44 0.1U/25V_6X 1 25V_BST1 22 9 1 2
1
2
3
BOOT1 BOOT2
3
2
1
PL2 2.2_6 RT8223P 2.2_6 0.1U/25V_6X PL3
20 11
.c
+5V_1 5V_PHASE1 3V_PHASE2 +3.3V_1
2.2UH_7X7_TOK PHASE1 TOP Side PHASE2 2.2UH_7X7_TOK
5
5V_LGATE1 19 12 3V_LGATE2
PR36 LGATE1 LGATE2
220U/6.3V_7343P_E25b
220U/6.3V_7343P_E25b
24
PC46
PC47
ENTRIP1
ENTRIP2
SKIPSEL
+ *2.2/F_6 5V_FB1 2 VOUT1 7 PR37 +
C FB1 OUT2 C
4 4
EMC
GND
GND
PR38 DDPWRGD_R 23 5 3V_FB2 *2.2/F_6 PR40
PQ5009 PGOOD FB2 PQ5010 PR39 6.8K/F_4
*0_2/S
*0_2/S
1
2
3
18
14
25
15
3
2
1
x
PC48 AON7702A AON7702A PC49
*1000P/50V_4X
PR41 PR42 *1000P/50V_4X
15.4K/F_4 Rds(on) 13m ohm
158K/F_4 PR43
fi
PR44 *0_4/S
+3VPCU
169K/F_4
Rds(on) 13m ohm
1
PR45 PR46
10K/F_4 PR47
10K_4
E3A 0_6
PR48
C3A
a
PR203
2
B2A PC50
SHORT_4
+3VPCU
10K/F_4
2 [37] S5_ON
0.1U/25V_6X
PD5
BAV99W-7-F_150MA 3
in
1
PR49
PC51
B B
0.1U/25V_6X
*10K_4
PD6 2
BAV99W-7-F_150MA
3
PC52
1 0.1U/25V_6X DDPWRGD_R
SYS_HWPG [7,37]
PR50
+15V
22_8
+15V_ALWP
h +5V_S5
+3V_S5
PC53
0.1U/25V_6X
5
.c
PQ5011
AON7406
MAIND 4
1
2
5
6
MAIND 3 PQ5012
3
2
1
AO6402A TOP Side
w
[26,42,46] MAIND MAIND
4
TOP Side
+3V
A A
(Peak 9.3515A, AVG 6.55A)
w
+5V
(Peak 4.7683A, AVG 3.338A)
System 3V/5V(TPS51123A) A1A
w

5 4 3 2 1
5 4 3 2 1
C3A Be careful to this two net name.
P3
PR53
E3A
B2A VIN
29.4K/F_4
PR51 SHORT_4
10U/25V_8X
PR214
S3_1.5V [26]
200K_4
+3VPCU
PC56
*100K_4 S5_1.5V PC55
SUSON [37]
PR54 SHORT_4 0.1U/25V_6X
D D
[37] HWPG_1.5V PR55
PR52
PC54 0.1U/25V_6X
2.2/F_6
OCP:20A
23
22
21
20
19
18
17
16
m
PU3
B2A (Peak 17.81A, AVG 12.46A)
PwPad-2
PwPad-1
PwPad
S3
S5
PGOOD
MODE
TRIP
PQ5013
+SMDDR_VTERM
1
VTTSNS VBST
15 FDMS3660S ESR : 9mΩ
2
G1
D1
D1
D1
2
VLDOIN DRVH
14 1.5SUS_HG f : 400k Hz
+1.5VSUS_SRC
3 TPS51216RUKR 13 B2A
VTT SW
o
10U/6.3V_6X
10U/6.3V_6X
S1/D2
VDDQSNS
PC57
PC58
4 12 PL4
VTTGND V5IN
PwPad-3
PwPad-4
PwPad-5
1.5SUS_PHASE 9 +1.5VSUS_SRC
+1.5VSUS
REFIN
PGND
5 11
VREF
GND
VTTREF DRVL 1.5UH_10X10
G2
+5V_S5
S2
S2
S2
.c
PR57 PC60 PC104
24
25
26
10
5
PR56 PC61 1 2 1U/6.3V_4X + + PC181
+SMDDR_VREF
330U/2V_7343P_E9c
*330U/2V_7343P_E9c
C E@2.2/F_6 C
0_8 1.5SUS_LG *10U/6.3V_6X
PC62
(Peak 0.1A, AVG 0.07A) 0.22U/10V_4X
PC63
x
RDSon=3.3m ohm PC59
E@1000P/50V_4X *0.1U/10V_4X
fi
PR58 +1.5VSUS
10K/F_4
R1
a
Vout = (R1/R2) X 0.75 + 0.75
PC64
B 0.1U/10V_4X PC66 B
1
2
5
6
0.01U/25V_4X
in
PR59
52.3K/F_4 MAIND 3 PQ5015
[26,41,46] MAIND AO6402A
R2
4
+5V_S5
PR60 U3C@0_4
PC65 h
U3C@0.1U/10V_4X 4
2
PU4
U3C@G9661-25ADJF12U
VPP PGOOD
1
6
Vout =0.8(1+PR1/PR2)
(Peak 0.498A, AVG 0.342A)
(Peak 0.167A, AVG 0.117A)
+1.5V
.c
+3V_S5 VEN VO +1.05VSUS
3
+3V_S5 VIN
PR82 *U3C@0_4 8 PR61
[37] USB3.0_EN GND
ADJ
9 5 U3C@31.6K/F_4
GND NC
PC69 PC67 PC68 R1 PC70
7
A U3C@1U/6.3V_4X U3C@10U/6.3V_6X U3C@0.1U/10V_4X U3C@10U/6.3V_6X A
w

PR62
U3C@100K/F_4
R2 A1A
w
DDR1.5V
5 4 3 2 1
w
5 4 3 2 1
D
+3V_S5
P4 D
PR63 PR64
10K_4 *0_4
+5V_S5 PR65 10/F_6

VIN
RT8240BVCC
RT8240BTON
1
PC71
10U/25V_8X
1U/6.3V_4X
+3V_S5 PC72
PC74
m
2
B2A *0.1U/25V_4X OCP:20A
PQ5021 (Peak 18.05A, AVG 12.63A)
PR66
C3A FDMS3660S
11
PR68 PC75
2
10K_4 PU5
G1
D1
D1
D1
3 RT8240BDH
G0
VCC
PR67 UGATE
C
10 PC73 C
CS +VTT +1.05V
o
4 RT8240BBST_1 2.2_6 0.1U/25V_6X *2200P/50V_4X
51.1K/F_4 BOOST
S1/D2
9 RT8240BZQW PL5
[44] HWPG_VCCIO PGOOD 2 RT8240BLX 9
8 PHASE 1.0UH_7X7_TOK
EN 1 RT8240BDL
C3A B2A
.c G2
RGND
S2
S2
S2
LGATE
GND
13 PR215
FB
0.1U/10V_4X
8
5
PAD
10U/6.3V_6X
E@2.2/F_6
PC77
12
330U/2V_7343P_E9c
PC108
+
PR69
0_4
PC105
PC76
RT8240BFB
x
[26,37,46] MAINON
B E@1000P/50V_4X B
PC78 PC79
0.1U/10V_4X PR71
fi
*100P/50V_4N
PR72
PR73 0_4 VCCP_SENSE [5] 100_4
0_4
R1
a
PR75 0_4
PR74
*10K/F_4
VSSP_SENSE [5]
R2
PR76
*0_4
in
A
Quanta Computer Inc. A

VOUT=(1+R1/R2)*0.5 +VCCIO(RT8240BGQW) A1A

5 4
h 3 2 1
.c
w
w
w
1 2 3 4 5
P5
PR77 2.2K_4
[37] HWPG_VCCSA
VCCSA_VID1 [5]
A A
+5V_S5 VCCSA_VID0 [5]
PC80 1U/6.3V_4X
PR78 2.2K_4
m
PC81
HWPG_VCCIO [43]
2.2U/6.3V_6X OCP:8.12A
(Peak 6.000A ,AVG 4.200A)
PC122 *0.033U/10V_4X
o
18
17
16
15
14
13
Total capacitor : 66uF
ESR :
V5FILT
PGOOD
EN
VID1
VID0
V5DRV
PC82
9mΩ
B
19
PGND BST
12 f : 300k Hz B
.c
0.1U/25V_6X
E3A +VCCSA
20 11
PGND SW
PL6
21 10
PC84 PGND TPS51462RGER SW 0.47UH_7X7
x
PC83 PC85 PU6 PC107
10U/6.3V_6X 0.1U/10V_4X 22 9 22U/6.3V_8X
VIN SW
100_4
10U/6.3V_6X PC86 PC87 PC88
PR79
22U/6.3V_8X 22U/6.3V_8X 22U/6.3V_8X
23 8
fi
VIN SW
24 7
COMP
MODE
VIN SW
SLEW
VOUT
VREF
VCCSA_VCCSSENSE_R
GND
+5V_S5 VCCSA_VCCSSENSE [5]

C
PR216 C
a
0_4
1
6
R +VCCSA
PR80 *33K/F_4 B2A
OPEN *0.8V
in
VCCSA_VID0 VCCSA_VID1 +VCCSA PC89
33K *0.85V
0 0 0.9V R
0.22U/10V_4X
0.01U/25V_4X
PR81
PC90
0 1 *0.8V
5.1K/F_4
3300P/50V_4X
PC92
0 1 *0.85V PR95
D
1
1
0
1
0.725V
0.675V
h *10K_4
Quanta Computer Inc. D

.c
*0.8V FOR SV TYPE
*0.85V FOR LV/ULV TYPE PROJECT : Chief River
A1A
+VCCSA(TI51461)
w
1 2 3 4 5
w
w
5 4 3 2 1
B2A
P6
95836_UGATE1G VIN
E3A
E@0.1U/25V_4X
PIV@10U/25V_8X
PIV@10U/25V_8X
PC96
PC93
PC94
PR83 PQ5018
PR84 PC95 PIV@2.2/F_6 PIV@FDMS3606S
2
PC97 PIV@2K/F_4 PIV@330P/50V_4X 95836_BOOT1G
G1
D1
D1
D1
*PIV@330P/50V_4X
C3A Max. DCR=1.4m
PR85 PC91
D PIV@0_4 PR88 35.7K/F_4 PIV@0.22U/25V_6X
C3A D
S1/D2
[5] VCC_AXG_SENSE VCC_AXG_SENSE_R
95836_PHASE1G 9 E3A PL7 PIV@0.24UH_7X7
+VAXG
VSS_AXG_SENSE_R PR86 PR87 PC98
PIV@560U/2V_7343P_E4.5a_3pin
PIV@560U/2V_7343P_E4.5a_3pin
[5] VSS_AXG_SENSE
PC99 PIV@2.55K/F_4 PIV@267K/F_4 PIV@150P/50V_4N
PIV@1000P/50V_4X PIV@2.2/F_6
G2
S2
S2
S2
PR91
PR89
PIV@0_4
PIV@10U/6.3V_6X
*PIV@0.1U/10V_4X
8
5
m
PR70
PR204
PC179
ISUMPG
PC180
PIV@0.01U/25V_4X PC100 PR90 PC101 95836_LGATE1G + +
PC102
PC103
PIV@390P/50V_4X PIV@499/F_4 PIV@47P/50V_4N
PC106
ISUMNG
*0_2/S
*0_2/S
+5V_S5 PR92
+5V_S5
E3A ISUMPG
PIV@3.65K/F_6
o
PR93 +VCC_GFX
+5V_S5 OEV@1K_4 PR94
PIV@2.61K/F_4
TDC : 35A
PR96 PR97
PC109 PC110 PR105 VSUMG- PR99 PIV@1/F_4
GFX_CORE Load Line : PEAK : 46A
SHORT_6 SHORT_6
PR98 connect to +5V ISUMPG PIV@11K/F_4 -3.9mV/A for GT2 OCP : 55A
PIV@1K/F_4 PIV@0.1U/10V_4X PIV@0.022U/16V_4X
39
38
37
40
(disable AXG-2) Width : 1400mil
.c
B2A B2A ISUMNG
C3A PR106 +VAXG
RTNG
FBG
COMPG
ISUMPG
ISUMNG
ISEN1G
ISEN2G
+3V_S5 +3V_S5 +1.05V
PC112 PC111
PR100
PIV@453/F_4
PIV@NTC_10K_6
PC195
E3A
1U/6.3V_4X 1U/6.3V_4X PC191 PC193 PIV@22U/6.3V_8X PC143
*100K/F_4
C5574 0.1U/10V_4X 95836_VCCP 26 35 PIV@22U/6.3V_8X PIV@22U/6.3V_8X E@0.1U/10V_4X

*1.91K/F_4
VCCP PWM2G PC113 PC114

1.91K/F_4
*499/F_4
PR102
PR103
PR104
PR107
PR108 95836_VDD 25 31 95836_BOOT1G *PIV@3300P/50V_4X

PR211 0_4 100K_4 VDD BOOT1G PIV@0.1U/10V_4X
[7,37] MPWROK
32 95836_UGATE1G
UGATE1G PR109
PR110 *0_4 95836_VRON 9 33 95836_PHASE1G *PIV@619/F_4
[37] VRON VR_ON PHASE1G PC190 PC192 PC194 PC142
x
C 36 34 95836_LGATE1G PIV@22U/6.3V_8X PIV@22U/6.3V_8X PIV@22U/6.3V_8X E@0.1U/10V_4X C
[37] GFX_PWRGD PGOODG LGATE1G
19 30 95836_BOOT2
[3,7] DELAY_VR_PWRGOOD PGOOD BOOT2
8 PU7 29 95836_UGATE2
C3A B2A
[3] H_PROCHOT# VR_HOT# UGATE2
ISL95836HRZ-T 95836_UGATE1 VIN
5 28 95836_PHASE2
fi
[5] VR_SVID_CLK SCKL PHASE2
1
10U/25V_8X
10U/25V_8X
E@0.1U/25V_4X
PC115 PR111
43P/50V_4N 6 27 95836_LGATE2 2.2/F_6 PQ5019 +
[5] VR_SVID_ALERT# ALERT# LGATE2
Check pull up resister to
PC118
PC119
PC120
95836_BOOT1 FDMS3606S PC189
7 20 95836_BOOT1 100U/25V_105CE_f
1.05V for H_PROCHOT# [5] VR_SVID_DATA
2
SDA BOOT1
2
G1
D1
D1
D1
95836_NTCG 4 21 95836_UGATE1 PC116
+1.05V NTCG UGATE1 0.22U/25V_6X
95836_NTC 10
NTC PHASE1
22 95836_PHASE1
+5V_S5
(Peak 53A ,AVG 53A)
S1/D2
23 95836_LGATE1 PL8 0.24UH_7X7
a
LGATE1
PR116
24
95836_PHASE1 9
E3A +VCC_CORE
PR112
PR113
PR114
95836_PWM3
130/F_4
54.9/F_4
PIV@27.4K/F_4 PR118
*75/F_4
560U/2V_7343P_E4.5a_3pin
560U/2V_7343P_E4.5a_3pin
PWM3
27.4K/F_4
C3A
E@2.2/F_6
G2
S2
S2
S2
41
PR120
PR119
ISEN3/FB2
VR_SVID_CLK PAD 1K/F_4
330U/2V_7343P_E9c
8
5
ISUMN
ISUMP
COMP
ISEN1
ISEN2
PR205
PR206
PR115 PR117 + +
RTN
E@1000P/50V_4X
PC186
PC187
PC188
PIV@NTC_470K_4 NTC_470K_4 95836_LGATE1 +
FB
in
VR_SVID_ALERT#
PC123
PR121 PR122
18
17
16
15
14
13
12
11
VR_SVID_DATA PIV@3.83K/F_4 3.83K/F_4
*0_2/S
*0_2/S
PC124 10P/50V_4C
95836_COMP PR123
3.65K/F_6
VSUM+
95836_COMP ISEN2
C3A ISEN1 ISEN1 PR124 10K/F_4

C3A
0.22U/10V_4X
PC127
PC125 PR126 PC126 PR128 10K/F_4
PC130
68P/50V_4C
150P/50V_4N
PR129
499/F_4
PR131
390P/50V_4X
2K/F_4
PC128
0.22U/10V_4X
VSUM-
h VSUM+ 95836_UGATE2
VSUM-
C3A
PR127 1/F_4
B2A
ISEN2
VIN
B
.c
10U/25V_8X
10U/25V_8X
267K/F_4
E@0.1U/25V_4X
PR132 PR133 PR134 PR130 PQ5020
0.1U/10V_4X
0.1U/10V_4X
PC136
PC137
PC133
20.5K/F_4 2K/F_4 2.61K/F_4 2.2/F_6
PC135
PC138
PR135 95836_BOOT2 FDMS3606S
2
11K/F_4
G1
D1
D1
D1
PC139
C3A PR136
PC131
0.22U/25V_6X
680P/50V_4X PR137 NTC_10K_6 (Peak 53A ,AVG 53A)
S1/D2
470/F_4
VSUM- 95836_PHASE2 9 E3A PL9 0.24UH_7X7 Max. DCR=1.1m
+VCC_CORE
w
PC141
E@2.2/F_6
G2
S2
S2
S2
PR139
*2200P/50V_4X PC140
PR138 0.1U/10V_4X
PR207
PR208
*619/F_4 95836_LGATE2
E@1000P/50V_4X
PC145
PC144
*330P/50V_4X
*0_2/S
*0_2/S
w
PR141
VCORE Load Line :
[5] VCC_SENSE PR140 0_4 VCC_SENSE_R
VSUM+
3.65K/F_6 1.9mV/A
[5] VSS_SENSE PR142 0_4 VSS_SENSE_R
C3A ISEN2 PR144 10K/F_4

C3A
PR143 10K/F_4
w
PC146 VSUM- PR145 1/F_4 ISEN1

0.01U/25V_4X
A A

A1A
+VCC_CORE+VGFX (ISL95836) 35W
5 4 3 2 1
5 4 3 2 1
P7
+5V_S5
+3V_S5
PU8
PR217 *10K_4
B2A
G9661-25ADJF12U
PC147 0.1U/10V_4X 4 1
[26,37,43] MAINON VPP PGOOD HWPG_1.8V [37]
2 6
VEN VO +1.8V
D PR146 0_4 (Peak 1.242A, AVG 0.869A) D
3
+3V_S5 VIN
8
10U/6.3V_6X
ADJ
9 GND 5
PC148
GND NC
10U/6.3V_6X
PC150
m
PC149 PC151 R1 PR147
0.1U/10V_4X *0.1U/10V_4X
12.7K/F_4
o
PR148
Vout =0.8(1+R1/R2) 10K/F_4
R2
.c
C C
VIN +3V +5V B2A +SMDDR_VTERM +VTT +1.5V B2A +15V
x
PR149 PR151 PR155 PR225 PR226 PR154 PR150
22_8 22_8 22_8
fi
1M_4 22_8 22_8 1M_4 [26,41,42] MAIND
[26] MAINON_ON_G
a
3
3
PR152 PQ5025A PQ5025B PQ5035A PQ5035B PQ5026A PQ5026B
B
2 1M_4 2 5 2 5 2 5 PC152 B
[26,37,43] MAINON 2200P/50V_4X
in
2N7002KDW_115MA 2N7002KDW_115MA 2N7002KDW_115MA 2N7002KDW_115MA 2N7002KDW_115MA 2N7002KDW_115MA
PQ5024
1
4
PR153
100K_4
LTC044EUBFS8TL_30MA
h
.c
A
Quanta Computer Inc. A
w
PROJECT :Chief River

A1A
+1.8V/Discharge
w

5 4 3 2 1
w
5 4 3 2 1
PC153
2 1
EV@1U/6.3V_4X
PR156
EV@2.2/F_6
+5V_S5
PR157
E3A
P8
EV@2.2/F_6
PQ5028 VIN
EV@FDMS3606S
D D
2
+VGPU_CORE
EV@10U/25V_8X
EV@10U/25V_8X
1
G1
D1
D1
D1
B2A PC154
Fs=300K
PC155
PC156
20
1
PC157
2
EV@4.7U/6.3V_6X +3V TDC : 20.5A
LGATE
PVCC
S1/D2
m
PR158
2 19 ISL95870A_AGND
9
EV@0.1U/25V_6X
Imax :30A
EV@0_6
PGND VCC
OCP :36A
EV@1K_4
PR159
ISL95870A_AGND
G2
S2
S2
S2
PC158
3 18
5
GND BOOT PR160
EV@2.2/F_6 EV@0.1U/25V_6X
C3A B2A
4 17
RTN UGATE
o
PL10 +VGPU_CORE
EV@0.36UH_10X10-O Max. DCR=1.4m
GFX_CORE_CNTRL1 5 16 CORE-PHASE1 1 2
[16] GFX_CORE_CNTRL1 VID1 PHASE
PR161 *PX@10K/F_4 +3V_S5 E3A
4
GFX_CORE_CNTRL0 6 PU9 15 PR162 PX@0_4 PR163
[16] GFX_CORE_CNTRL0 VID0 EN PX_MODE [25,48]
PR212 OEV@0_4 EV@2.2/F_6
.c
GFX_MAINON [37,48]
EV@330U/2V_7343P_E6b
EV@330U/2V_7343P_E6b
EV@ISL95870AHRUZ-T
7 14 + +
SREF PGOOD DGPU_PWROK [10,25,37,48]
R1 8 13 PR165 EV@0_4 PC161
PC159
PC160
SET0 FSEL ISL95870A_AGND
PR223 PR164 EV@1000P/50V_4X
Thames@18.7K/F_4 Seymour@68.1K/F_4
*EV@0.1U/10V_4X
C 9 12 C
SET1 VO
OCSET
PC162
x
R2
FB
B2A
EV@0.022U/16V_4X
PR222 PR168 PR169

B2A
10
11
Thames@66.5K/F_4 Seymour@332K/F_4
PC163
Seymour@31.6K/F_4
R4 PR172 Roc
fi
PR220
+3VPCU
R3 Thames@71.5K/F_4
EV@7.15K/F_4
PR221 PR173
95870A_FB
Thames@590K/F_4 Seymour@590K/F_4 PC164
PR167
PR174
PR166 *EV@10K_4
*EV@10K_4 EV@0.1U/25V_6X
a
EV@3.09K/F_4
GFX_CORE_CNTRL0 GFX_CORE_CNTRL1 PR175
ISL95870A_AGND
PR170 PR171 Csen EV@7.15K/F_4
in
*EV@10K_4 *EV@10K_4 PR178 PR176 PR177
EV@3.09K/F_4 B2A EV@10/F_6 EV@10/F_6
R5
PR179 Seymour@2.49K/F_4
B GPU_CORE_SEN [19] B
PR219 Thames@2.32K/F_4
R6
Seymous XT
h PR180
PR218
Seymour@2.49K/F_4
Thames@2.32K/F_4
GPU_CORE_RTN [19]
.c
+VGPU_CORE
VIN
GFX_CORE_CNTRL1 GFX_CORE_CNTRL0 +VGPU_CORE
Seymous XT Thames XT
1 1 0.9V
R1 68.1K 18.7K
PR182 1 0 1V
PR181 EV@22_8 R2 31.6K 66.5K
EV@1M_4 0 1 1.05V
PR210 OEV@22_8 R3 590K 590K
w
0 0 1.15V
GFX_MAINON R4 332K 71.5K
3
Thames XT R5 2.49K 2.32K

PX_MODE 2 R6 2.49K 2.32K
PR183 2 GFX_CORE_CNTRL1 GFX_CORE_CNTRL0 +VGPU_CORE
PR209 PX@22_8 EV@1M_4
w
PQ5030 1 1 0.875V
1
A PQ5029 EV@2N7002K_300MA A
EV@LTC044EUBFS8TL_30MA 1 0 0.9V
1
0 1 1V
0 0 1V
w

GPU Core ( ISL62881C) A1A

5 4 3 2 1
5 4 3 2 1
+5V_S5
+3V_S5
PR184
+1.5VSUS
P9
2
*EV@100K_4 PC165 PC166 +3V_S5
EV@10U/6.3V_6X EV@0.1U/10V_4X
PR185 PC167 PU10
1
DGPU_PWR_EN PX@0_4 EV@0.1U/10V_4X EV@G9661-25ADJF12U +1.05V +1V_GPU
D
PR189
4
VPP PGOOD
1
GFX_PG [37]
PQ5031 EV@AON7406
1 PR186
B2A D
DGPU_PWROK OEV@0_4 2 6 R9530 *OEV@0_8 2 5 *EV@100K_4

VEN VO +1.8V_GPU 3 PU11
3 EV@G9334TB1U
+3V_S5 VIN
8 5 4 +1V_GPU_PG
ADJ
9 GND 5 PR187 DRV PGD PR213 OEV@0_4
Rg
m 4
GND NC GFX_MAINON [37,47]
PR188 PC168 EV@10K/F_4
PC169 PC172 1 PR190 PX@0_4 DGPU_PWR_EN
7
PC170 EV@43.2K/F_6 EV@10U/6.3V_6X EV@10U/6.3V_6X EV@10U/6.3V_6X 3 EN
EV@10U/6.3V_6X FB +5V_S5
GND
6
VCC
PC171 PC173 Rh PR191 PR192
2
o
EV@0.1U/10V_4X *EV@0.1U/10V_4X EV@10K/F_4 EV@100/F_6
PR193 PC174
Vout =0.8(1+R1/R2) =1.8V EV@34K/F_6 PC175 EV@0.1U/10V_4X
1
EV@0.033U/50V_6X
.c
VIN Vout1 = (1+Rg/Rh)*0.5
B2A (Peak 6.000A ,AVG 4.200A)

C +15V +1.5VSUS C
Total capacitor : 22uF
B2A PQ5027B
EV@2N7002KDW_115MA
+3V_D
x
PQ5032
PC6 PC26 PR194 PR195 EV@AON7202
PX5@22_8
5
E@1U/25V_6X EV@1M_4 EV@1M_4
E@2200P/50V_4X PR224
5
fi
PR202 PX@0_4 GFXPG_1.5V_EN_D 4
[25,47] PX_MODE
3
3
PR201 *PX5@0_4 +1.5V_GPU
3
[25] DGPU_PWR_EN
3
2
1
6
PR196 OEV@0_4 2
[10,25,37,47] DGPU_PWROK
a
2 PC176 2
EV@22_8
PR198 PR197 PQ5027A
B2A
1
EV@100K_4 PQ5033 EV@1M_4 PR199 EV@2200P/50V_4X PQ5034

EV@2N7002KDW_115MA PX5@2N7002K_300MA PC177
1
EV@10U/6.3V_6X
1
in
+1.5V_GPU
B EV@LTC044EUBFS8TL_30MA B
h Power On Sequence
.c
1. +3V_GPU connect +3V
2.PX_PWRGOOD Enable +VGPU_CORE
3.DGPU_PWROK Enable(Delay) +1.8V_GFX
4. DGPU_PWR_EN Enable(Delay) +1.5V_GFX
w
5.DGPU_PWR_EN Enable(Delay) +1V_GFX

A A
w

A1A
+VGACORE
w

5 4 3 2 1
5 4 3 2 1
MODEL TE5
Model REV CHANGE LIST PAGE FROM To
1 1A
PAGE 8: Dual SPI ROM circuit modify for Win8. 2 1A
1A PAGE 8: C2010 change value to 15P/C2013 change value to 12P. 3 1A
BY3/BY4 PAGE 9: SMBUS/CLK REQ pin PU/PD resister pallerel resister to single resister. 4 1A
PAGE 10: R2185 change power to +3V. 5 1A
D
PAGE 10: R2160 MB_ID9 change to GPIO34. 6 1A D
PAGE 16/28: d-GPU CRT Port change from Port6 to Port3. 7 1A

PAGE 17: C5045/C5049 change to 22P. 8 1A
PAGE 25: Del PX Mode PERST#_BUF double drawing. 9 1A
PAGE 30: C5345/C5348 change value to 22P. 10 1A
m
PAGE 31: Add RN12/RN13 CHOCK for EMI test.. 11 1A
PAGE 32: Add RN11/RN6 CHOCK for EMI test.. 12 1A
PAGE 34: Stuff C5438/C5439/C5440/C5441 for EMI test. 13 1A
PAGE 35: Reserve LAN power circuit. 14 1A
PAGE 36: r9781/r9774/r9776/r9777/r9779/r9733 to 33ohm for EMI test. 15 1A
o
PAGE 37: Reserve GPIO for USB3.0 Power enable/LAN power/Inform VGA power status. 16 1A
PAGE 39: LED3 change to single white color for PRD1.0 17 1A
PAGE 39: Add C2136/C2137/C2138/C2118/C2129/C2135/C2142/C2144/C2143/C2139/C2140/C2141 for EMI test. 18 1A
19 1A
.c
20 1A
21 1A
22 1A
23 1A
24 1A
C
25 1A C
26 1A
x
27 1A
28 1A
29 1A
fi
30 1A
a
in
B B
h
.c
w
w
A A
w
PROJECT MODEL : BY3,BY4 APPROVED BY: DATE: Quanta Computer Inc.

DOC NO. 204 PROJECT : BY3,BY4
PART NUMBER: DRAWING BY: REVISON: Size Document Number Rev
1A
Change list
5 4 3 2 1

Toshiba c800 Quanta Daby3cmb8e0

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1 2 3 4 5 6 7 8

Chief River Block Diagram 01

DDR SYSTEM MEMORY

+VCORE+VGFX (ISL95836) P45

AMD_GPU (ISL95870A) P47

Quanta Computer Inc.

System SYSTEM POWER (Peak 6A ,AVG 4.2A)

(Peak 13.47A ,AVG 9.43A) OCP 15A G9661-25ADJ

+VCC_CORE +5V +5V MAIN_ON S0

+1.5V +1.5V MAIN_ON S0

Quanta Computer Inc.

Size Document Number Rev

Ivy Bridge Processor (DMI,PEG,FDI) CPU/VGA CPU

PEG_RXN[0..15] [15] U1001B

PCI EXPRESS* - GRAPHICS

JTAG & BPM

K27 PEG_TXP6_C C1023 EV@0.1U/10V_4X PEG_TXP6

R1029 24.9/F_4 PEG_COMP

R1032 R1036 150_4 +3VPCU_HW_SD 5 1 R1037 IV@24.9K/F_4

D3A Quanta Computer Inc.

Ivy Bridge Processor (DDR3)CPU

AB6 M_A_CLKP0 [13] AE2 M_B_CLKP0 [14]

DDR SYSTEM MEMORY B

M_A_DQ31 M7 SA_DQ[30] SA_ODT[1] AG2 M_B_DQ31 M1 SB_DQ[30] SB_ODT[1] AD5

Quanta Computer Inc.

DDR3 -1.5V RAILS

PEG AND DDR

Y34 VCC51 VCCSA6 H26

V34 AJ29 H_CPU_SVIDALRT# +

H_CPU_SVIDALRT# R1062 43_4

Quanta Computer Inc.

PROJECT : Chief River

Ivy Bridge Processor (GND) CPU

CFG4 1=Disable; No physical DP attached to eDP CFG4 R117 *1K_4

CFG7 1=PEG train immediately following xxRESETB de assertion

Cougar Point (DMI,FDI,PM) CLG

Digital Display Interface

System Power Management

R2009 ICRT@150/F_4 INT_CRT_BLU

R2011 ICRT@150/F_4 INT_CRT_RED

XDP_DBRST# R2018 1K_4

PM_RI# R2013 10K_4 +3V_S5

PCIE_WAKE# R2019 10K_4 SUS_PWR_ACK_R R2024 0_4 Re SUS_PWR_ACK [37]

A PM_DRAM_PWRGD R2025 S3@200/F_4 2 R2026 0_4 Rf RSMRST# A

MPWROK MPWROK [37,45] Rg SYS_HWPG [37,41]

RSMRST# R2028 10K_4 C5573 C5580 C5583

Size Document Number Rev

SPKR SATA1RXN AM8

HDA_SDIN1 SATA2TXN AH4

R2046 PCH_SPI_CLK_R2R R2221 33_4 PCH_SPI_CLK_R2 T3 AH1 SATA3_RBIAS R2052 750/F_4

*33P/50V_4N PCH_SPI_SI_R2R R2227 33_4 PCH_SPI_SI_R2 V4

Pin Name Strap description Sampled Configuration

PCH Dual SPI CLG 0 = Set to Vss R2068 2.2K_4 +1.8V

On-die PLL Voltage Regulator

On-Die PLL VR Voltage Select

0 = Support by 1.8V (weak pull-down)

LVDS Detected 0 = Default. Not Detected 1= PU to 3V

Deep S4/S5 Well On -Die 0 = Disable

Date: Wednes day, February 01, 2012 Sheet 8 of 48

Cougar Point-M (PCI,USB,NVRAM) CLG/DEG

USB30 Combo Port

PCI_PIRQC# H38 PIRQB# USBP7P L30 CLKIN_DMI_P

USBP9P USBP9+ [32] CLKOUT_PCIE3P CLKIN_GND1_P

PCIECLKRQ5# / GPIO44 +3V_S5

D2006 RB500V-40_100MA R2214 0_6