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Technical reference manual

Line differential protection IED


RED 670

Innovation from ABB


Document ID: 1MRK505132-UEN
Issued: December 2007
Revision: D
IED product version: 1.B

© Copyright 2007 ABB. All rights reserved


COPYRIGHT
WE RESERVE ALL RIGHTS TO THIS DOCUMENT, EVEN IN THE EVENT
THAT A PATENT IS ISSUED AND A DIFFERENT COMMERCIAL
PROPRIETARY RIGHT IS REGISTERED. IMPROPER USE, IN
PARTICULAR REPRODUCTION AND DISSEMINATION TO THIRD
PARTIES, IS NOT PERMITTED.

THIS DOCUMENT HAS BEEN CAREFULLY CHECKED. HOWEVER, IN


CASE ANY ERRORS ARE DETECTED, THE READER IS KINDLY
REQUESTED TO NOTIFY THE MANUFACTURER AT THE ADDRESS
BELOW.

THE DATA CONTAINED IN THIS MANUAL IS INTENDED SOLELY FOR


THE CONCEPT OR PRODUCT DESCRIPTION AND IS NOT TO BE
DEEMED TO BE A STATEMENT OF GUARANTEED PROPERTIES. IN
THE INTEREST OF OUR CUSTOMERS, WE CONSTANTLY SEEK TO
ENSURE THAT OUR PRODUCTS ARE DEVELOPED TO THE LATEST
TECHNOLOGICAL STANDARDS. AS A RESULT, IT IS POSSIBLE THAT
THERE MAY BE SOME DIFFERENCES BETWEEN THE HW/SW
PRODUCT AND THIS INFORMATION PRODUCT.

Manufacturer:

ABB AB
Substation Automation Products
SE-721 59 Västerås
Sweden
Telephone: +46 (0) 21 34 20 00
Facsimile: +46 (0) 21 14 69 18
www.abb.com/substationautomation
Table of contents

Table of contents

Section 1 Introduction.....................................................................21
Introduction to the technical reference manual.................................21
About the complete set of manuals for an IED............................21
About the technical reference manual.........................................22
Design of the Technical reference manual (TRM).......................23
Introduction.............................................................................23
Principle of operation..............................................................23
Input and output signals.........................................................26
Function block........................................................................26
Setting parameters.................................................................26
Technical data........................................................................26
Intended audience.......................................................................27
Related documents......................................................................27
Revision notes.............................................................................28

Section 2 Local human-machine interface.....................................29


Human machine interface.................................................................29
Small size graphic HMI.....................................................................31
Introduction..................................................................................31
Design.........................................................................................31
Medium size graphic HMI.................................................................32
Introduction..................................................................................32
Design.........................................................................................32
Keypad.............................................................................................33
LED...................................................................................................35
Introduction..................................................................................35
Status indication LEDs................................................................35
Indication LEDs...........................................................................35
LHMI related functions......................................................................36
Introduction..................................................................................36
General setting parameters.........................................................36
Status indication LEDs................................................................37
Design....................................................................................37
Function block........................................................................37
Input and output signals.........................................................37
Indication LEDs...........................................................................38
Introduction.............................................................................38
Design....................................................................................38
Function block........................................................................45

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Input and output signals.........................................................45


Setting parameters.................................................................45

Section 3 Basic IED functions........................................................49


Analog inputs....................................................................................49
Introduction..................................................................................49
Principle of operation...................................................................49
Function block.............................................................................50
Setting parameters......................................................................50
Self supervision with internal event list.............................................57
Introduction..................................................................................57
Principle of operation...................................................................57
Internal signals.......................................................................59
Run-time model......................................................................60
Function block.............................................................................61
Output signals..............................................................................62
Setting parameters......................................................................62
Technical data.............................................................................62
Time synchronization........................................................................62
Introduction..................................................................................62
Principle of operation...................................................................62
General concepts...................................................................62
Real Time Clock (RTC) operation..........................................63
Synchronization alternatives..................................................65
Function block.............................................................................67
Output signals..............................................................................67
Setting parameters......................................................................67
Technical data.............................................................................70
Parameter setting groups.................................................................71
Introduction..................................................................................71
Principle of operation...................................................................71
Function block.............................................................................72
Input and output signals..............................................................72
Setting parameters......................................................................73
Test mode functionality.....................................................................74
Introduction..................................................................................74
Principle of operation...................................................................74
Function block.............................................................................75
Input and output signals..............................................................75
Setting parameters......................................................................76
IED identifiers...................................................................................76
Introduction..................................................................................76
Setting parameters......................................................................76
Signal matrix for binary inputs (SMBI)..............................................77

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Introduction..................................................................................77
Principle of operation...................................................................77
Function block.............................................................................77
Input and output signals..............................................................77
Signal matrix for binary outputs (SMBO)..........................................78
Introduction..................................................................................78
Principle of operation...................................................................78
Function block.............................................................................79
Input and output signals..............................................................79
Signal matrix for mA inputs (SMMI)..................................................80
Introduction..................................................................................80
Principle of operation...................................................................80
Function block.............................................................................80
Input and output signals..............................................................80
Signal matrix for analog inputs (SMAI).............................................81
Introduction..................................................................................81
Principle of operation...................................................................81
Function block.............................................................................81
Input and output signals..............................................................82
Setting parameters......................................................................83
Summation block 3 phase (SUM3Ph)..............................................85
Introduction..................................................................................85
Principle of operation...................................................................85
Function block.............................................................................86
Input and output signals..............................................................86
Setting parameters......................................................................86

Section 4 Differential protection.....................................................89


Line differential protection................................................................89
Introduction..................................................................................90
Line differential protection, 3 or 6 CT sets (PDIF, 87L)..........90
Line differential protection 3 or 6 CT sets, with in-zone
transformers (PDIF, 87LT).....................................................91
Analog signal transfer for line differential protection
(MDIF)....................................................................................91
Principle of operation...................................................................92
Algorithm and logic.................................................................92
Time synchronization.............................................................98
Analog signal communication for line differential
protection..............................................................................100
Binary signal transfer............................................................103
Function block...........................................................................103
Input and output signals............................................................106
Setting parameters....................................................................111

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Technical data...........................................................................124
High impedance differential protection (PDIF, 87)..........................125
Introduction................................................................................125
Principle of operation.................................................................125
Logic diagram.......................................................................125
Function block...........................................................................126
Input and output signals............................................................126
Setting parameters....................................................................127
Technical data...........................................................................127

Section 5 Distance protection ......................................................129


Distance protection zones (PDIS, 21)............................................129
Introduction................................................................................129
Principle of operation.................................................................130
Full scheme measurement...................................................130
Impedance characteristic.....................................................131
Minimum operating current...................................................135
Measuring principles............................................................136
Directional lines....................................................................138
Simplified logic diagrams......................................................140
Function block...........................................................................143
Input and output signals............................................................143
Setting parameters....................................................................144
Technical data...........................................................................145
Phase selection with load encroachment (PDIS, 21).....................146
Introduction................................................................................146
Principle of operation.................................................................147
Phase-to-earth fault..............................................................148
Phase-to-phase fault............................................................150
Three phase faults................................................................151
Load encroachment..............................................................152
Minimum operate currents....................................................155
Simplified logic diagrams......................................................156
Function block...........................................................................160
Input and output signals............................................................160
Setting parameters....................................................................161
Technical data...........................................................................162
Power swing detection (RPSB, 78)................................................162
Introduction................................................................................163
Principle of operation.................................................................163
Resistive reach in forward direction.....................................164
Resistive reach in reverse direction.....................................164
Reactive reach in forward and reverse direction..................165
Basic detection logic.............................................................165

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Operating and inhibit conditions...........................................167


Function block...........................................................................168
Input and output signals............................................................168
Setting parameters....................................................................169
Technical data...........................................................................170
Automatic switch onto fault logic (PSOF).......................................170
Introduction................................................................................171
Principle of operation.................................................................171
Function block...........................................................................172
Input and output signals............................................................172
Setting parameters....................................................................173
Technical data...........................................................................173

Section 6 Current protection.........................................................175


Instantaneous phase overcurrent protection (PIOC, 50)................175
Introduction................................................................................175
Principle of operation.................................................................175
Function block...........................................................................176
Input and output signals............................................................176
Setting parameters....................................................................176
Technical data...........................................................................177
Four step phase overcurrent protection (POCM, 51_67)................177
Introduction................................................................................178
Principle of operation.................................................................178
Function block...........................................................................182
Input and output signals............................................................182
Setting parameters....................................................................184
Technical data...........................................................................190
Instantaneous residual overcurrent protection (PIOC, 50N)...........191
Introduction................................................................................191
Principle of operation.................................................................191
Function block...........................................................................192
Input and output signals............................................................192
Setting parameters....................................................................192
Technical data...........................................................................193
Four step residual overcurrent protection (PEFM, 51N/67N).........193
Introduction................................................................................193
Principle of operation.................................................................194
Switch onto fault logic...........................................................197
Function block...........................................................................198
Input and output signals............................................................198
Setting parameters....................................................................199
Technical data...........................................................................206
Thermal overload protection, one time constant (PTTR, 26)..........206

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Introduction................................................................................207
Principle of operation.................................................................207
Function block...........................................................................210
Input and output signals............................................................210
Setting parameters....................................................................210
Technical data...........................................................................211
Breaker failure protection (RBRF, 50BF)........................................211
Introduction................................................................................212
Principle of operation.................................................................212
Function block...........................................................................215
Input and output signals............................................................215
Setting parameters....................................................................216
Technical data...........................................................................217
Stub protection (PTOC, 50STB).....................................................217
Introduction................................................................................218
Principle of operation.................................................................218
Function block...........................................................................219
Input and output signals............................................................219
Setting parameters....................................................................219
Technical data...........................................................................219
Pole discordance protection (RPLD, 52PD)...................................220
Introduction................................................................................220
Principle of operation.................................................................220
Pole discordance signalling from circuit breaker..................223
Unsymmetrical current detection..........................................223
Function block...........................................................................224
Input and output signals............................................................224
Setting parameters....................................................................224
Technical data...........................................................................225

Section 7 Voltage protection........................................................227


Two step undervoltage protection (PUVM, 27)...............................227
Introduction................................................................................227
Principle of operation.................................................................227
Measurement principle.........................................................228
Time delay............................................................................228
Blocking................................................................................231
Design..................................................................................233
Function block...........................................................................234
Input and output signals............................................................234
Setting parameters....................................................................235
Technical data...........................................................................237
Two step overvoltage protection (POVM, 59).................................238
Introduction................................................................................238

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Principle of operation.................................................................238
Measurement principle.........................................................239
Time delay............................................................................239
Blocking................................................................................243
Design..................................................................................244
Function block...........................................................................246
Input and output signals............................................................246
Setting parameters....................................................................247
Technical data...........................................................................249
Two step residual overvoltage protection (POVM, 59N)................250
Introduction................................................................................250
Principle of operation.................................................................250
Measurement principle.........................................................250
Time delay............................................................................251
Blocking................................................................................253
Design..................................................................................254
Function block...........................................................................255
Input and output signals............................................................255
Setting parameters....................................................................255
Technical data...........................................................................257
Overexcitation protection (PVPH, 24).............................................258
Introduction................................................................................258
Principle of operation.................................................................258
Measured voltage.................................................................261
Operate time of the overexcitation protection.......................262
Cooling.................................................................................265
OEX protection function measurands...................................265
Overexcitation alarm............................................................266
Logic diagram.......................................................................266
Function block...........................................................................267
Input and output signals............................................................267
Setting parameters....................................................................267
Technical data...........................................................................268

Section 8 Frequency protection....................................................271


Underfrequency protection (PTUF, 81)..........................................271
Introduction................................................................................271
Principle of operation.................................................................271
Measurement principle.........................................................272
Time delay............................................................................272
Voltage dependent time delay..............................................274
Blocking................................................................................275
Design..................................................................................276
Function block...........................................................................276

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Input and output signals............................................................277


Setting parameters....................................................................277
Overfrequency protection (PTOF, 81)............................................278
Introduction................................................................................278
Principle of operation.................................................................278
Measurement principle.........................................................279
Time delay............................................................................279
Blocking................................................................................281
Design..................................................................................281
Function block...........................................................................282
Input and output signals............................................................282
Setting parameters....................................................................283
Rate-of-change frequency protection (PFRC, 81)..........................283
Introduction................................................................................283
Principle of operation.................................................................284
Measurement principle.........................................................284
Time delay............................................................................284
Blocking................................................................................289
Design..................................................................................290
Function block...........................................................................291
Input and output signals............................................................291
Setting parameters....................................................................291
Technical data...........................................................................292

Section 9 Multipurpose protection................................................293


General current and voltage protection (GAPC).............................293
Introduction................................................................................293
Principle of operation.................................................................294
Measured quantities within the function...............................294
Base quantities for GF function............................................296
Built-in overcurrent protection steps.....................................296
Built-in undercurrent protection steps...................................301
Built-in overvoltage protection steps....................................302
Built-in undervoltage protection steps..................................302
Logic diagram.......................................................................302
Function block...........................................................................307
Input and output signals............................................................307
Setting parameters....................................................................309
Technical data...........................................................................319

Section 10 Secondary system supervision.....................................321


Current circuit supervision (RDIF)..................................................321
Introduction................................................................................321
Principle of operation.................................................................321

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Function block...........................................................................323
Input and output signals............................................................323
Setting parameters....................................................................323
Technical data...........................................................................324
Fuse failure supervision (RFUF).....................................................324
Introduction................................................................................324
Principle of operation.................................................................325
Zero sequence ....................................................................325
Negative sequence...............................................................328
du/dt and di/dt.......................................................................328
Operation modes..................................................................329
Dead line detection...............................................................330
Function block...........................................................................330
Input and output signals............................................................330
Setting parameters....................................................................331
Technical data...........................................................................332

Section 11 Control..........................................................................333
Synchrocheck and energizing check (RSYN, 25)...........................333
Introduction................................................................................333
Principle of operation.................................................................333
Basic functionality.................................................................333
Logic diagrams.....................................................................334
Function block...........................................................................340
Input and output signals............................................................341
Setting parameters....................................................................342
Technical data...........................................................................344
Autorecloser (RREC, 79)................................................................345
Introduction................................................................................345
Principle of operation.................................................................346
Logic Diagrams....................................................................346
Auto-reclosing operation Off and On....................................346
Start auto-reclosing and conditions for start of a reclosing
cycle ....................................................................................346
Control of the auto-reclosing open time for shot 1...............347
Long trip signal.....................................................................348
Time sequence diagrams.....................................................353
Function block...........................................................................356
Input and output signals............................................................356
Setting parameters....................................................................357
Technical data...........................................................................359
Apparatus control (APC).................................................................360
Introduction................................................................................360
Principle of operation.................................................................360

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Bay control (QCBAY).................................................................361


Introduction...........................................................................361
Principle of operation............................................................361
Function block......................................................................363
Input and output signals.......................................................363
Setting parameters...............................................................364
Local/Remote switch (LocalRemote, LocRemControl)..............364
Introduction...........................................................................364
Principle of operation............................................................364
Function block......................................................................365
Input and output signals.......................................................366
Setting parameters...............................................................367
Switch controller (SCSWI).........................................................367
Introduction...........................................................................367
Principle of operation............................................................367
Function block......................................................................373
Input and output signals.......................................................373
Setting parameters...............................................................374
Circuit breaker (SXCBR)...........................................................375
Introduction...........................................................................375
Principle of operation............................................................375
Function block......................................................................379
Input and output signals.......................................................379
Setting parameters...............................................................380
Circuit switch (SXSWI)..............................................................381
Introduction...........................................................................381
Principle of operation............................................................381
Function block......................................................................385
Input and output signals.......................................................385
Setting parameters...............................................................386
Bay reserve (QCRSV)...............................................................386
Introduction...........................................................................386
Principle of operation............................................................387
Function block......................................................................389
Input and output signals.......................................................389
Setting parameters...............................................................390
Reservation input (RESIN)........................................................391
Introduction...........................................................................391
Principle of operation............................................................391
Function block......................................................................392
Input and output signals.......................................................392
Setting parameters...............................................................393
Interlocking.....................................................................................393

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Introduction................................................................................393
Principle of operation.................................................................393
Logical node for interlocking (SCILO)........................................396
Introduction...........................................................................396
Principle of operation............................................................396
Function block......................................................................397
Input and output signals.......................................................397
Interlocking for line bay (ABC_LINE).........................................398
Introduction...........................................................................398
Function block......................................................................399
Logic diagram.......................................................................400
Input and output signals.......................................................405
Interlocking for bus-coupler bay (ABC_BC)...............................407
Introduction...........................................................................407
Function block......................................................................408
Logic diagram.......................................................................409
Input and output signals.......................................................413
Interlocking for transformer bay (AB_TRAFO)...........................416
Introduction...........................................................................416
Function block......................................................................417
Logic diagram.......................................................................418
Input and output signals.......................................................421
Interlocking for bus-section breaker (A1A2_BS)........................423
Introduction...........................................................................423
Function block......................................................................423
Logic diagram.......................................................................424
Input and output signals.......................................................425
Interlocking for bus-section disconnector (A1A2_DC)...............427
Introduction...........................................................................427
Function block......................................................................427
Logic diagram.......................................................................428
Input and output signals.......................................................429
Interlocking for busbar earthing switch (BB_ES).......................430
Introduction...........................................................................430
Function block......................................................................430
Logic diagram.......................................................................431
Input and output signals.......................................................431
Interlocking for double CB bay (DB)..........................................431
Introduction...........................................................................431
Function block......................................................................432
Logic diagrams.....................................................................433
Input and output signals ......................................................440
Interlocking for 1 1/2 CB diameter (BH).....................................443

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Introduction...........................................................................443
Function blocks....................................................................444
Logic diagrams.....................................................................446
Input and output signals.......................................................453
Logic rotating switch for function selection and LHMI
presentation (GGIO).......................................................................458
Introduction................................................................................458
Principle of operation.................................................................458
Function block...........................................................................460
Input and output signals............................................................461
Setting parameters....................................................................462
Generic double point function block (DPGGIO)..............................463
Introduction................................................................................463
Principle of operation.................................................................463
Function block...........................................................................463
Input and output signals............................................................464
Setting parameters....................................................................464

Section 12 Scheme communication...............................................465


Scheme communication logic for distance protection (PSCH,
85) .................................................................................................465
Introduction................................................................................465
Principle of operation.................................................................466
Blocking scheme..................................................................466
Permissive underreach scheme...........................................466
Permissive overreach scheme.............................................467
Unblocking scheme..............................................................467
Intertrip scheme....................................................................468
Simplified logic diagram.......................................................468
Function block...........................................................................470
Input and output signals............................................................470
Setting parameters....................................................................470
Technical data...........................................................................471
Current reversal and weak-end infeed logic for distance
protection (PSCH, 85)....................................................................471
Introduction................................................................................472
Principle of operation.................................................................472
Current reversal logic...........................................................472
Weak end infeed logic..........................................................473
Function block...........................................................................474
Input and output signals............................................................474
Setting parameters....................................................................475
Technical data...........................................................................475
Local acceleration logic (PLAL)......................................................476

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Introduction................................................................................476
Principle of operation.................................................................476
Zone extension.....................................................................476
Loss-of-load acceleration.....................................................477
Function block...........................................................................478
Input and output signals............................................................478
Setting parameters....................................................................479
Scheme communication logic for residual overcurrent protection
(PSCH, 85).....................................................................................479
Introduction................................................................................480
Principle of operation.................................................................480
Blocking scheme..................................................................480
Permissive under/overreach scheme...................................481
Unblocking scheme..............................................................482
Function block...........................................................................483
Input and output signals............................................................484
Setting parameters....................................................................484
Technical data...........................................................................485
Current reversal and weak-end infeed logic for residual
overcurrent protection (PSCH, 85).................................................485
Introduction................................................................................485
Principle of operation.................................................................486
Directional comparison logic function...................................486
Fault current reversal logic...................................................486
Weak and infeed logic..........................................................486
Function block...........................................................................488
Input and output signals............................................................488
Setting parameters....................................................................488
Technical data...........................................................................489

Section 13 Logic.............................................................................491
Tripping logic (PTRC, 94)...............................................................491
Introduction................................................................................491
Principle of operation.................................................................491
Logic diagram.......................................................................493
Function block...........................................................................496
Input and output signals............................................................496
Setting parameters....................................................................497
Technical data...........................................................................497
Trip matrix logic (GGIO, 94X).........................................................497
Introduction................................................................................497
Principle of operation.................................................................498
Function block...........................................................................500
Input and output signals............................................................500

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Setting parameters....................................................................501
Configurable logic blocks (LLD)......................................................502
Introduction................................................................................502
Inverter function block (INV)......................................................502
OR function block (OR).............................................................502
AND function block (AND).........................................................503
Timer function block (Timer)......................................................504
Pulse timer function block (PULSE)..........................................505
Exclusive OR function block (XOR)...........................................505
Set-reset with memory function block (SRM)............................506
Controllable gate function block (GT)........................................506
Settable timer function block (TS).............................................507
Technical data...........................................................................508
Fixed signal function block (FIXD)..................................................508
Introduction................................................................................508
Principle of operation.................................................................508
Function block...........................................................................509
Input and output signals............................................................509
Setting parameters....................................................................509

Section 14 Monitoring.....................................................................511
Measurements (MMXU).................................................................511
Introduction................................................................................512
Principle of operation.................................................................513
Measurement supervision....................................................513
Service values (MMXU, SVR)..............................................517
Current Phasors (MMXU, CP)..............................................521
Voltage phasors (MMXU, VP)..............................................522
Sequence quantities (MSQI, CSQ and VSQ).......................522
Function block...........................................................................522
Input and output signals............................................................523
Setting parameters....................................................................526
Technical data...........................................................................540
Event counter (GGIO).....................................................................540
Introduction................................................................................541
Principle of operation.................................................................541
Reporting..............................................................................541
Design..................................................................................541
Function block...........................................................................542
Input signals..............................................................................542
Setting parameters....................................................................542
Technical data...........................................................................542
Event function (EV).........................................................................543
Introduction................................................................................543

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Principle of operation.................................................................543
Function block...........................................................................545
Input and output signals............................................................545
Setting parameters....................................................................546
Fault locator (RFLO).......................................................................548
Introduction................................................................................549
Principle of operation.................................................................549
Measuring Principle..............................................................550
Accurate algorithm for measurement of distance to fault.....551
The non-compensated impedance model............................554
IEC 60870-5-103..................................................................554
Function block...........................................................................555
Input and output signals............................................................555
Setting parameters....................................................................555
Technical data...........................................................................556
Measured value expander block.....................................................557
Introduction................................................................................557
Principle of operation.................................................................557
Function block...........................................................................558
Input and output signals............................................................558
Disturbance report (RDRE)............................................................558
Introduction................................................................................559
Principle of operation.................................................................559
Function block...........................................................................566
Input and output signals............................................................568
Setting parameters....................................................................570
Technical data...........................................................................585
Event list (RDRE)...........................................................................586
Introduction................................................................................586
Principle of operation.................................................................586
Function block...........................................................................587
Input signals..............................................................................587
Technical data...........................................................................587
Indications (RDRE).........................................................................587
Introduction................................................................................587
Principle of operation.................................................................588
Function block...........................................................................589
Input signals..............................................................................589
Technical data...........................................................................589
Event recorder (RDRE)..................................................................589
Introduction................................................................................589
Principle of operation.................................................................590
Function block...........................................................................590

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Input signals..............................................................................590
Technical data...........................................................................590
Trip value recorder (RDRE)............................................................591
Introduction................................................................................591
Principle of operation.................................................................591
Function block...........................................................................592
Input signals..............................................................................592
Technical data...........................................................................592
Disturbance recorder (RDRE)........................................................592
Introduction................................................................................592
Principle of operation.................................................................593
Memory and storage............................................................593
IEC 60870-5-103..................................................................594
Function block...........................................................................595
Input and output signals............................................................595
Setting parameters....................................................................595
Technical data...........................................................................595

Section 15 Metering.......................................................................597
Pulse counter logic (GGIO)............................................................597
Introduction................................................................................597
Principle of operation.................................................................597
Function block...........................................................................599
Input and output signals............................................................599
Setting parameters....................................................................600
Technical data...........................................................................601

Section 16 Station communication.................................................603


Overview.........................................................................................603
IEC 61850-8-1 communication protocol.........................................603
Introduction................................................................................603
Generic single point function block (SPGGIO)..........................604
Introduction...........................................................................604
Principle of operation............................................................604
Function block......................................................................604
Input and output signals.......................................................604
Setting parameters...............................................................605
Generic measured values function block (MVGGIO)................605
Introduction...........................................................................605
Principle of operation............................................................605
Function block......................................................................606
Input and output signals.......................................................606
Setting parameters...............................................................606
Technical data...........................................................................607

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LON communication protocol.........................................................607


Introduction................................................................................607
Principle of operation.................................................................608
Setting parameters....................................................................625
Technical data...........................................................................626
SPA communication protocol.........................................................626
Introduction................................................................................626
Principle of operation.................................................................626
Communication ports...........................................................636
Design.......................................................................................636
Setting parameters....................................................................636
Technical data...........................................................................637
IEC 60870-5-103 communication protocol.....................................637
Introduction................................................................................637
Principle of operation.................................................................637
General.................................................................................637
Communication ports...........................................................647
Function block...........................................................................647
Input and output signals............................................................650
Setting parameters....................................................................654
Technical data...........................................................................658
Single command, 16 signals (CD)..................................................659
Introduction................................................................................659
Principle of operation.................................................................659
Function block...........................................................................660
Input and output signals............................................................660
Setting parameters....................................................................661
Multiple command (CM) and Multiple transmit (MT).......................662
Introduction................................................................................662
Principle of operation.................................................................662
Design.......................................................................................662
General.................................................................................662
Function block...........................................................................663
Input and output signals............................................................663
Setting parameters....................................................................665

Section 17 Remote communication................................................667


Binary signal transfer to remote end...............................................667
Introduction................................................................................667
Principle of operation.................................................................667
Function block...........................................................................668
Input and output signals............................................................669
Setting parameters....................................................................671

RED 670 Technical reference manual 17


1MRK505132-UEN rev. D
Table of contents

Section 18 Hardware......................................................................675
Overview.........................................................................................675
Variants of case- and HMI display size.....................................675
Case from the rear side.............................................................677
Hardware modules.........................................................................680
Overview....................................................................................680
Combined backplane module (CBM).........................................681
Introduction...........................................................................681
Functionality.........................................................................681
Design..................................................................................681
Universal backplane module (UBM)..........................................683
Introduction...........................................................................683
Functionality.........................................................................683
Design..................................................................................683
Power supply module (PSM).....................................................685
Introduction...........................................................................685
Design..................................................................................686
Technical data......................................................................686
Numeric processing module (NUM)..........................................686
Introduction...........................................................................686
Functionality.........................................................................687
Block diagram.......................................................................688
Local human-machine interface (LHMI)....................................688
Transformer input module (TRM)..............................................688
Introduction...........................................................................688
Design..................................................................................689
Technical data......................................................................689
Analog digital conversion module, with time synchronization
(ADM) .......................................................................................689
Introduction...........................................................................689
Design..................................................................................690
Binary input module (BIM).........................................................692
Introduction...........................................................................692
Design..................................................................................692
Technical data......................................................................695
Binary output modules (BOM)...................................................696
Introduction...........................................................................696
Design..................................................................................696
Technical data......................................................................698
Binary input/output module (IOM)..............................................699
Introduction...........................................................................699
Design..................................................................................699
Technical data......................................................................700

18 Technical reference manual RED 670


1MRK505132-UEN rev. D
Table of contents

Line data communication module (LDCM)................................701


Introduction...........................................................................701
Design..................................................................................702
Technical data......................................................................703
Serial SPA/IEC 60870-5-103 and LON communication
module (SLM) ...........................................................................703
Introduction...........................................................................703
Design..................................................................................703
Technical data......................................................................705
Optical ethernet module (OEM).................................................705
Introduction...........................................................................705
Functionality.........................................................................705
Design..................................................................................705
Technical data......................................................................706
mA input module (MIM).............................................................707
Introduction...........................................................................707
Design..................................................................................707
Technical data......................................................................708
GPS time synchronization module (GSM).................................709
Introduction...........................................................................709
Design..................................................................................709
Technical data......................................................................710
GPS antenna.............................................................................711
Introduction...........................................................................711
Design..................................................................................711
Technical data......................................................................712
Case dimensions............................................................................713
Case without rear cover.............................................................713
Case with rear cover..................................................................713
Flush mounting dimensions.......................................................715
Side-by-side flush mounting dimensions...................................716
Wall mounting dimensions.........................................................717
External resistor unit..................................................................718
Mounting alternatives.....................................................................719
Flush mounting..........................................................................719
Overview..............................................................................719
Mounting procedure for flush mounting................................720
19” panel rack mounting............................................................720
Overview..............................................................................720
Mounting procedure for 19” panel rack mounting.................721
Wall mounting............................................................................722
Overview..............................................................................722
Mounting procedure for wall mounting.................................722

RED 670 Technical reference manual 19


1MRK505132-UEN rev. D
Table of contents

How to reach the rear side of the IED..................................723


Side-by-side 19” rack mounting.................................................724
Overview..............................................................................724
Mounting procedure for side-by-side rack mounting............724
IED 670 mounted with a RHGS6 case.................................724
Side-by-side flush mounting......................................................725
Overview..............................................................................725
Mounting procedure for side-by-side flush mounting...........726
Technical data................................................................................726
Enclosure...................................................................................726
Connection system....................................................................727
Influencing factors.....................................................................727
Type tests according to standard..............................................728

Section 19 Labels...........................................................................731
Different labels................................................................................731

Section 20 Connection diagrams...................................................735

Section 21 Time inverse characteristics.........................................749


Application......................................................................................749
Principle of operation......................................................................751
Mode of operation......................................................................751
Inverse characteristics....................................................................757

Section 22 Glossary.......................................................................771
Glossary.........................................................................................771

20 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 1
Introduction

Section 1 Introduction

About this chapter


This chapter explains concepts and conventions used in this manual and provides
information necessary to understand the contents of the manual.

1.1 Introduction to the technical reference manual

1.1.1 About the complete set of manuals for an IED


The user’s manual (UM) is a complete set of five different manuals:

Application Technical Installation and Operator´s Engineering


manual reference commissioning manual guide
manual manual

en06000097.vsd

The Application Manual (AM) contains application descriptions, setting guidelines


and setting parameters sorted per function. The application manual should be used to
find out when and for what purpose a typical protection function could be used. The
manual should also be used when calculating settings.

The Technical Reference Manual (TRM) contains application and functionality


descriptions and it lists function blocks, logic diagrams, input and output signals,
setting parameters and technical data sorted per function. The technical reference
manual should be used as a technical reference during the engineering phase,
installation and commissioning phase, and during normal service.

The Installation and Commissioning Manual (ICM) contains instructions on how


to install and commission the protection IED. The manual can also be used as a
reference during periodic testing. The manual covers procedures for mechanical and
electrical installation, energizing and checking of external circuitry, setting and
configuration as well as verifying settings and performing directional tests. The
chapters are organized in the chronological order (indicated by chapter/section
numbers) in which the protection IED should be installed and commissioned.

The Operator’s Manual (OM) contains instructions on how to operate the protection
IED during normal service once it has been commissioned. The operator’s manual

RED 670 Technical reference manual 21


1MRK505132-UEN rev. D
Section 1
Introduction

can be used to find out how to handle disturbances or how to view calculated and
measured network data in order to determine the cause of a fault.

The IED 670 engineering guide (EG) contains instructions on how to engineer the
IED 670 products. The manual guides to use the different tool components for IED
670 engineering. It also guides how to handle the tool component available to read
disturbance files from the IEDs on the basis of the IEC 61850 definitions. The third
part is an introduction about the diagnostic tool components available for IED 670
products and the PCM 600 tool.

1.1.2 About the technical reference manual


The technical reference manual contains the following chapters:

• The chapter “Local human-machine interface” describes the control panel on


the IED. Display characteristics, control keys and various local human-machine
interface features are explained.
• The chapter “Basic IED functions” presents functions that are included in all
IEDs regardless of the type of protection they are designed for. These are
functions like Time synchronization, Self supervision with event list, Test mode
and other functions of a general nature.
• The chapter “Differential protection” describes the various differential functions
as well as restricted earth fault protection.
• The chapter “Distance protection” describes the functions for distance zones
with their quadrilateral characteristics, phase selection with load encroachment,
power swing detection and similar.
• The chapter “Current protection” describes functions such as overcurrent
protection, breaker failure protection and pole discordance.
• The chapter “Voltage protection” describes functions like undervoltage and
overvoltage protection as well as residual overvoltage protection.
• The chapter “Frequency protection” describes functions for overfrequency,
underfrequency and rate of change of frequency.
• The chapter “Multipurpose protection” describes the general protection function
for current and voltage.
• The chapter “Secondary system supervision” includes descriptions of functions
like current based Current circuit supervision and Fuse failure supervision.
• The chapter “Control” describes the control functions. These are functions like
the Synchronization and energizing check as well as several others which are
product specific.
• The chapter “Scheme communication” describes among others functions related
to current reversal and weak end infeed logic.
• The chapter “Logic” describes trip logic and related functions.
• The chapter “Monitoring” describes measurement related functions used to
provide data regarding relevant quantities, events, faults and the like.
• The chapter “Metering” describes primarily Pulse counter logic.
• The chapter “Station communication” describes Ethernet based communication
in general including the use of IEC61850, and horizontal communication via
GOOSE.

22 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 1
Introduction

• The chapter “Remote communication” describes binary and analog signal


transfer, and the associated hardware.
• The chapter “Hardware” provides descriptions of the IED and its components.
• The chapter “Connection diagrams” provides terminal wiring diagrams and
information regarding connections to and from the IED.
• The chapter “Time inverse characteristics” describes and explains inverse time
delay, inverse time curves and their effects.
• The chapter “Glossary” is a list of terms, acronyms and abbreviations used in
ABB technical documentation.

1.1.3 Design of the Technical reference manual (TRM)


The description of each IED related function follows the same structure (where
applicable). The different sections are outlined below.

1.1.3.1 Introduction

Outlines the implementation of a particular protection function.

1.1.3.2 Principle of operation

Describes how the function works, presents a general background to algorithms and
measurement techniques. Logic diagrams are used to illustrate functionality.

Logic diagrams
Logic diagrams describe the signal logic inside the function block and are bordered
by dashed lines.

Signal names
Input and output logic signals consist of two groups of letters separated by two dashes.
The first group consists of up to four letters and presents the abbreviated name for
the corresponding function. The second group presents the functionality of the
particular signal. According to this explanation, the meaning of the signal BLKTR in
figure 4 is as follows:

• BLKTR informs the user that the signal will BLOCK the TRIP command from
the under-voltage function, when its value is a logical one (1).

Input signals are always on the left hand side, and output signals on the right hand
side. Settings are not displayed.

Input and output signals


In a logic diagram, input and output signal paths are shown as a lines that touch the
outer border of the diagram.

Input and output signals can be configured using the CAP531 tool. They can be
connected to the inputs and outputs of other functions and to binary inputs and outputs.

RED 670 Technical reference manual 23


1MRK505132-UEN rev. D
Section 1
Introduction

Examples of input signals are BLKTR, BLOCK and VTSU. Examples output signals
are TRIP, START, STL1, STL2, STL3.

Setting parameters
Signals in frames with a shaded area on their right hand side represent setting
parameter signals. These parameters can only be set via the PST or LHMI. Their
values are high (1) only when the corresponding setting parameter is set to the
symbolic value specified within the frame. Example is the signal Block TUV=Yes.
Their logical values correspond automatically to the selected setting value.

Internal signals
Internal signals are illustrated graphically and end approximately. 2 mm from the
frame edge. If an internal signal path cannot be drawn with a continuous line, the
suffix -int is added to the signal name to indicate where the signal starts and continues,
see figure 3.

BLKTR

TEST

TEST
&
Block TUV=Yes BLOCK-int.
>1

BLOCK

VTSU
BLOCK-int.
&
STUL1N
BLOCK-int.
& >1 & TRIP
t
STUL2N
BLOCK-int.
START
&
STUL3N
STL1

STL2

STL3

xx04000375.vsd

Figure 1: Logic diagram example with -int signals

External signals
Signal paths that extend beyond the logic diagram and continue in another diagram
have the suffix “-cont.”, see figure 2 and figure 3.

24 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 1
Introduction

STZMPP-cont.
>1
STCND

& STNDL1L2-cont.
1L1L2
STNDL2L3-cont.
&
1L2L3

& STNDL3L1-cont.
1L3L1

& STNDL1N-cont.
1L1N

& STNDL2N-cont.
1L2N
STNDL3N-cont.
&
1L3N

>1 STNDPE-cont.

>1
1--VTSZ 1--STND
>1 &
1--BLOCK
BLK-cont.

xx04000376.vsd

Figure 2: Logic diagram example with an outgoing -cont signal

STNDL1N-cont.
>1
STNDL2N-cont. 15 ms
& t STL1
STNDL3N-cont.
STNDL1L2-cont. >1 15 ms
& t STL2
STNDL2L3-cont.
15 ms
STNDL3L1-cont. & t STL3
>1
15 ms
& t START
>1

BLK-cont.

xx04000377.vsd

Figure 3: Logic diagram example with an incoming -cont signal

RED 670 Technical reference manual 25


1MRK505132-UEN rev. D
Section 1
Introduction

1.1.3.3 Input and output signals

Input and output signals are presented in two separate tables. Each table consists of
two columns. The first column contains the name of the signal and the second column
contains the description of the signal.

1.1.3.4 Function block

Each function block is illustrated graphically.

Input signals are always on the left hand side, and output signals on the right hand
side. Settings are not displayed. Special kinds of settings are sometimes available.
These are supposed to be connected to constants in the configuration scheme, and are
therefore depicted as inputs. Such signals will be found in the signal list but described
in the settings table.

IEC 61850 - 8 -1
CAP531 Name Logical Node

Inputs TUV1-
PH2PUVM
U3P TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
Outputs
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2 Diagram
ST2L1 Number
ST2L2
ST2L3

en05000330.vsd

Figure 4: Example of a function block

1.1.3.5 Setting parameters

These are presented in tables and include all parameters associated with the function
in question.

1.1.3.6 Technical data

The technical data section provides specific technical information about the function
or hardware described.

26 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 1
Introduction

1.1.4 Intended audience


General
This manual addresses system engineers, installation and commissioning personnel,
who use technical data during engineering, installation and commissioning, and in
normal service.

Requirements
The system engineer must have a thorough knowledge of protection systems,
protection equipment, protection functions and the configured functional logics in
the protective devices. The installation and commissioning personnel must have a
basic knowledge in the handling electronic equipment.

1.1.5 Related documents


Documents related to RED 670 Identity number
Operator’s manual 1MRK 505 133-UEN
Installation and commissioning manual 1MRK 505 134-UEN
Technical reference manual 1MRK 505 132-UEN
Application manual 1MRK 505 135-UEN
Buyer’s guide 1MRK 505 164-BEN
Connection diagram, Single breaker arr. Three phase tripping arr. 1MRK 002 801-BA
Connection diagram, Single breaker arr. Single phase tripping arr. 1MRK 002 801-CA
Connection diagram, Multi breaker arr. Three phase tripping arr. 1MRK 002 801-DA
Connection diagram, Multi breaker arr. Single phase tripping arr. 1MRK 002 801-EA
Configuration diagram A, Single breaker with single or double busbars 1MRK 004 500-82
Configuration diagram B, Single breakers with single or double busbars 1MRK 004 500-83
Configuration diagram C, Multi breakers such as 1 1/2 or ring busbar arr. 1MRK 004 500-84
Configuration diagram D, Multi breakers such as 1 1/2 or ring busbar arr. 1MRK 004 500-85
Setting example 1, 230 kV Short cable line with 1 1/2 CB arr. 1MRK 505 175-WEN

Connection and Installation components 1MRK 013 003-BEN


Test system, COMBITEST 1MRK 512 001-BEN
Accessories for IED 670 1MRK 514 012-BEN
Getting started guide IED 670 1MRK 500 065-UEN
SPA and LON signal list for IED 670 1MRK 500 075-WEN
IEC 61850 Data objects list for IED 670 1MRK 500 077-WEN
Generic IEC 61850 IED Connectivity package 1KHA001027–UEN
Protection and Control IED Manager PCM 600 Installation sheet 1MRS755552
Engineering guide IED 670 products 1MRK 511 179–UEN

Latest versions of the described documentation can be found on www.abb.com/substationautomation

RED 670 Technical reference manual 27


1MRK505132-UEN rev. D
Section 1
Introduction

1.1.6 Revision notes


Revision Description
D No functionality added. Minor changes made in content due to problem reports.

28 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 2
Local human-machine interface

Section 2 Local human-machine interface

About this chapter


This chapter describes the structure and use of the Local human machine interface
(LHMI) or in other words, the control panel on the IED.

2.1 Human machine interface

The local human machine interface is available in a small, and a medium sized model.
The principle difference between the two is the size of the LCD. The small size LCD
has a four lines and the medium size LCD can display the single line diagram with
up to 15 objects.

The local human machine interface is equipped with an LCD that can display the
single line diagram with up to 15 objects.

The local human-machine interface is simple and easy to understand – the whole front
plate is divided into zones, each of them with a well-defined functionality:

• Status indication LEDs


• Alarm indication LEDs which consists of 15 LEDs (6 red and 9 yellow) with
user printable label. All LEDs are configurable from the PCM 600 tool
• Liquid crystal display (LCD)
• Keypad with push buttons for control and navigation purposes, switch for
selection between local and remote control and reset
• An isolated RJ45 communication port

RED 670 Technical reference manual 29


1MRK505132-UEN rev. D
Section 2
Local human-machine interface

Figure 5: Small graphic HMI

Figure 6: Medium graphic HMI, 15 controllable objects

30 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 2
Local human-machine interface

2.2 Small size graphic HMI

2.2.1 Introduction
The small sized HMI is available for 1/2, 3/4 and 1/1 x 19” case. The LCD on the
small HMI measures 32 x 90 mm and displays 7 lines with up to 40 characters per
line. The first line displays the product name and the last line displays date and time.
The remaining 5 lines are dynamic. This LCD has no graphic display potential.

2.2.2 Design
The LHMI is identical for both the 1/2, 3/4 and 1/1 cases. The different parts of the
small LHMI is shown in figure 7

1 2 3

en05000055.eps
8 7

Figure 7: Small graphic HMI

1 Status indication LEDs


2 LCD

RED 670 Technical reference manual 31


1MRK505132-UEN rev. D
Section 2
Local human-machine interface

3 Indication LEDs
4 Label
5 Local/Remote LEDs
6 RJ 45 port
7 Communication indication LED
8 Keypad

2.3 Medium size graphic HMI

2.3.1 Introduction
The 1/2, 3/4 and 1/1 x 19” cases can be equipped with the medium size LCD. This is
a fully graphical monochrome LCD which measures 120 x 90 mm. It has 28 lines
with up to 40 characters per line. To display the single line diagram, this LCD is
required.

2.3.2 Design
The different parts of the medium size LHMI is shown in figure 8

32 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 2
Local human-machine interface

1 2 3

en05000056.eps
8 7

Figure 8: Medium size graphic HMI

1 Status indication LEDs


2 LCD
3 Indication LEDs
4 Label
5 Local/Remote LEDs
6 RJ45 port
7 Communication indication LED
8 Keypad

2.4 Keypad

RED 670 Technical reference manual 33


1MRK505132-UEN rev. D
Section 2
Local human-machine interface

The keypad is used to monitor and operate the IED. The keypad has the same look
and feel in all IEDs in the IED 670 series. LCD screens and other details may differ
but the way the keys function is identical. The keypad is illustrated in figure 9.

Figure 9: The HMI keypad

The keys used to operate the IED are described below in table 1.

Table 1: HMI keys on the front of the IED


Key Function

This key closes (energizes) a breaker or disconnector.

This key opens a breaker or disconnector.

The help key brings up two submenus. Key operation and IED information.

This key is used to clear entries, It cancels commands and edits.

Opens the main menu, and used to move to the default screen.

The Local/Remote key is used to set the IED in local or remote control mode.

This key opens the reset screen.

The E key starts editing mode and confirms setting changes when in editing mode.

The right arrow key navigates forward between screens and moves right in editing mode.

Table continued on next page

34 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 2
Local human-machine interface

Key Function

The left arrow key navigates backwards between screens and moves left in editing mode.

The up arrow key is used to move up in the single line diagram and in menu tree.

The down arrow key is used to move down in the single line diagram and in menu tree.

2.5 LED

2.5.1 Introduction
The LED module is a unidirectional means of communicating. This means that events
may occur that activate a LED in order to draw the operators attention to something
that has occurred and needs some sort of action.

2.5.2 Status indication LEDs


There are three LEDs above the LCD. The information they communicate is described
in the table below.
LED Indication Information
Green:
Steady In service
Flashing Internal failure
Dark No power supply
Yellow:
Steady Dist. rep. triggered
Flashing Terminal in test mode
Red:
Steady Trip command issued

2.5.3 Indication LEDs


The LED indication module comprising 15 LEDs is standard in IED 670s. Its main
purpose is to present an immediate visual information for protection indications or
alarm signals.

There are alarm indication LEDs and hardware associated LEDs on the right hand
side of the front panel. The alarm LEDs are found to the right of the LCD screen.
They can show steady or flashing light. Flashing would normally indicate an alarm.

RED 670 Technical reference manual 35


1MRK505132-UEN rev. D
Section 2
Local human-machine interface

The alarm LEDs are configurable using the PCM 600 tool. This is because they are
dependent on the binary input logic and can therefore not be configured locally on
the HMI. Some typical alarm examples follow:

• Bay controller failure


• CB close blocked
• Interlocking bypassed
• Differential protection trip
• SF6 Gas refill
• Position error
• CB spring charge alarm
• Oil temperature alarm
• Thermal overload trip

The RJ45 port has a yellow LED indicating that communication has been established
between the IED and a computer.

The Local/Remote key on the front panel has two LEDs indicating whether local or
remote control of the IED is active.

2.6 LHMI related functions

2.6.1 Introduction
The adaptation of the LHMI to the application and user preferences is made with:

• function block LHMI (LocalHMISign)


• function block HLED (LEDMonitor)
• setting parameters

2.6.2 General setting parameters

Table 2: General settings for the localHMI (LHM1-) function


Parameter Range Step Default Unit Description
Language English - English - Local HMI language
OptionalLanguage
DisplayTimeout 10 - 120 10 60 Min Local HMI display
timeout
AutoRepeat Off - On - Activation of auto-
On repeat (On) or not
(Off)
ContrastLevel -10 - 20 1 0 % Contrast level for
display
Table continued on next page

36 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 2
Local human-machine interface

Parameter Range Step Default Unit Description


DefaultScreen 0-0 1 0 - Default screen
Password SimplePassw - SimplePassw - Password type for
DOEG205.3-1 authorization
EvListSrtOrder Latest on top - Latest on top - Sort order of event list
Oldest on top

2.6.3 Status indication LEDs

2.6.3.1 Design

The function block LHMI (LocalHMISign) controls and supplies information about
the status of the status indication LEDs. The input and output signals of LHMI are
configured with the PCM 600 tool.

See section "Status indication LEDs" for information about the LEDs.

2.6.3.2 Function block


LHMI-
LocalHMI
CLRLEDS HMI-ON
RED-S
YELLOW-S
YELLOW-F
CLRPULSE
LEDSCLRD

en05000773.vsd

Figure 10: LHMI function block

2.6.3.3 Input and output signals

Table 3: Input signals for the LocalHMI (LHMI-) function block


Signal Description
CLRLEDS Input to clear the LCD-HMI LEDs

Table 4: Output signals for the LocalHMI (LHMI-) function block


Signal Description
HMI-ON Backlight of the LCD display is active
RED-S Red LED on the LCD-HMI is steady
YELLOW-S Yellow LED on the LCD-HMI is steady
YELLOW-F Yellow LED on the LCD-HMI is flashing
CLRPULSE A pulse is provided when the LEDs on the LCD-HMI are
cleared
LEDSCLRD Active when the LEDs on the LCD-HMI are not active

RED 670 Technical reference manual 37


1MRK505132-UEN rev. D
Section 2
Local human-machine interface

2.6.4 Indication LEDs

2.6.4.1 Introduction

The function block HLED (LEDMonitor) controls and supplies information about
the status of the indication LEDs. The input and output signals of HLED are
configured with the PCM 600 tool. The input signal for each LED is selected
individually with the PCM 600 Signal Matrix Tool (SMT). LEDs (number 1–6) for
trip indications are red and LEDs (number 7–15) for start indications are yellow.

Each indication LED on the LHMI can be set individually to operate in six different
sequences; two as follow type and four as latch type. Two of the latching types are
intended to be used as a protection indication system, either in collecting or restarting
mode, with reset functionality. The other two are intended to be used as signalling
system in collecting (coll) mode with an acknowledgment functionality. The light
from the LEDs can be steady (-S) or flickering (-F).

2.6.4.2 Design

The information on the LEDs is stored at loss of the auxiliary power to the IED. The
latest LED picture appears immediately after the IED is successfully restarted.

Operating modes
• Collecting mode
• LEDs which are used in collecting mode of operation are accumulated
continuously until the unit is acknowledged manually. This mode is
suitable when the LEDs are used as a simplified alarm system.

• Re-starting mode
• In the re-starting mode of operation each new start resets all previous active
LEDs and activates only those which appear during one disturbance. Only
LEDs defined for re-starting mode with the latched sequence type 6
(LatchedReset-S) will initiate a reset and a restart at a new disturbance. A
disturbance is defined to end a settable time after the reset of the activated
input signals or when the maximum time limit has been elapsed.

Acknowledgment/reset
• From local HMI
• The active indications can be acknowledged/reset manually. Manual
acknowledgment and manual reset have the same meaning and is a
common signal for all the operating sequences and LEDs. The function is
positive edge triggered, not level triggered. The acknowledgment/reset is

38 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 2
Local human-machine interface

performed via the Reset-button and menus on the LHMI. For details, refer
to the “Operators manual”.

• From function input


• The active indications can also be acknowledged/reset from an input,
RESET, to the function. This input can for example be configured to a
binary input operated from an external push button. The function is positive
edge triggered, not level triggered. This means that even if the button is
continuously pressed, the acknowledgment/reset only affects indications
active at the moment when the button is first pressed.

• Automatic reset
• The automatic reset can only be performed for indications defined for re-
starting mode with the latched sequence type 6 (LatchedReset-S). When
the automatic reset of the LEDs has been performed, still persisting
indications will be indicated with a steady light.

Operating sequences
The sequences can be of type Follow or Latched. For the Follow type the LED follow
the input signal completely. For the Latched type each LED latches to the
corresponding input signal until it is reset.

The figures below show the function of available sequences selectable for each LED
separately. For sequence 1 and 2 (Follow type), the acknowledgment/reset function
is not applicable. Sequence 3 and 4 (Latched type with acknowledgement) are only
working in collecting mode. Sequence 5 is working according to Latched type and
collecting mode while sequence 6 is working according to Latched type and re-
starting mode. The letters S and F in the sequence names have the meaning S = Steady
and F = Flash.

At the activation of the input signal, the indication operates according to the selected
sequence diagrams below.

In the sequence diagrams the LEDs have the characteristics shown in figure 11.

= No indication = Steady light = Flash

en05000506.vsd

Figure 11: Symbols used in the sequence diagrams

Sequence 1 (Follow-S)
This sequence follows all the time, with a steady light, the corresponding input
signals. It does not react on acknowledgment or reset. Every LED is independent of
the other LEDs in its operation.

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Activating
signal

LED

en01000228.vsd

Figure 12: Operating sequence 1 (Follow-S)

Sequence 2 (Follow-F)
This sequence is the same as sequence 1, Follow-S, but the LEDs are flashing instead
of showing steady light.

Sequence 3 (LatchedAck-F-S)
This sequence has a latched function and works in collecting mode. Every LED is
independent of the other LEDs in its operation. At the activation of the input signal,
the indication starts flashing. After acknowledgment the indication disappears if the
signal is not present any more. If the signal is still present after acknowledgment it
gets a steady light.

Activating
signal

LED

Acknow.
en01000231.vsd

Figure 13: Operating sequence 3 (LatchedAck-F-S)

Sequence 4 (LatchedAck-S-F)
This sequence has the same functionality as sequence 3, but steady and flashing light
have been alternated.

Sequence 5 (LatchedColl-S)
This sequence has a latched function and works in collecting mode. At the activation
of the input signal, the indication will light up with a steady light. The difference to
sequence 3 and 4 is that indications that are still activated will not be affected by the
reset i.e. immediately after the positive edge of the reset has been executed a new
reading and storing of active signals is performed. Every LED is independent of the
other LEDs in its operation.

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Activating
signal

LED

Reset
en01000235.vsd

Figure 14: Operating sequence 5 (LatchedColl-S)

Sequence 6 (LatchedReset-S)
In this mode all activated LEDs, which are set to sequence 6 (LatchedReset-S), are
automatically reset at a new disturbance when activating any input signal for other
LEDs set to sequence 6 (LatchedReset-S). Also in this case indications that are still
activated will not be affected by manual reset, i.e. immediately after the positive edge
of that the manual reset has been executed a new reading and storing of active signals
is performed. LEDs set for sequence 6 are completely independent in its operation of
LEDs set for other sequences.

Definition of a disturbance
A disturbance is defined to last from the first LED set as LatchedReset-S is activated
until a settable time, tRestart, has elapsed after that all activating signals for the LEDs
set as LatchedReset-S have reset. However if all activating signals have reset and
some signal again becomes active before tRestart has elapsed, the tRestart timer does
not restart the timing sequence. A new disturbance start will be issued first when all
signals have reset after tRestart has elapsed. A diagram of this functionality is shown
in figure 15.

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From
disturbance
length control ³1 New
per LED ³1 disturbance
set to
sequence 6
tRestart
& t

&
³1

³1
&

en01000237.vsd

Figure 15: Activation of new disturbance

In order not to have a lock-up of the indications in the case of a persisting signal each
LED is provided with a timer, tMax, after which time the influence on the definition
of a disturbance of that specific LED is inhibited. This functionality is shown i
diagram in figure 16.

Activating signal
To LED

To disturbance
AND
tMax length control
t
en05000507.vsd

Figure 16: Length control of activating signals

Timing diagram for sequence 6


Figure 17 shows the timing diagram for two indications within one disturbance.

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Disturbance

t Restart

Activating
signal 1

Activating
signal 2

LED 1

LED 2

Automatic
reset

Manual
reset
en01000239.vsd

Figure 17: Operating sequence 6 (LatchedReset-S), two indications within


same disturbance

Figure 18 shows the timing diagram for a new indication after tRestart time has
elapsed.

Disturbance Disturbance
t Restart t Restart

Activating
signal 1

Activating
signal 2

LED 1

LED 2

Automatic
reset

Manual
reset
en01000240.vsd

Figure 18: Operating sequence 6 (LatchedReset-S), two different disturbances

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Figure 19 shows the timing diagram when a new indication appears after the first one
has reset but before tRestart has elapsed.

Disturbance

t Restart

Activating
signal 1

Activating
signal 2

LED 1

LED 2

Automatic
reset

Manual
reset
en01000241.vsd

Figure 19: Operating sequence 6 (LatchedReset-S), two indications within


same disturbance but with reset of activating signal between

Figure 20 shows the timing diagram for manual reset.

Disturbance

t Restart

Activating
signal 1

Activating
signal 2

LED 1

LED 2

Automatic
reset

Manual
reset
en01000242.vsd

Figure 20: Operating sequence 6 (LatchedReset-S), manual reset

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2.6.4.3 Function block


HLED-
LEDMonitor
BLOCK NEWIND
RESET ACK
LEDTEST

en05000508.vsd

Figure 21: HLED function block

2.6.4.4 Input and output signals

Table 5: Input signals for the LEDMonitor (HLED-) function block


Signal Description
BLOCK Input to block the operation of the LED-unit
RESET Input to acknowledge/reset the indications of the LED-unit
LEDTEST Input for external LED test

Table 6: Output signals for the LEDMonitor (HLED-) function block


Signal Description
NEWIND A new signal on any of the indication inputs occurs
ACK A pulse is provided when the LEDs are acknowledged

2.6.4.5 Setting parameters

Table 7: General settings for the LEDMonitor (HLED-) function


Parameter Range Step Default Unit Description
Operation Off - Off - Operation mode for
On the LED function
tRestart 0.0 - 100.0 0.1 0.0 s Defines the
disturbance length
tMax 0.0 - 100.0 0.1 0.0 s Maximum time for the
definition of a
disturbance
SeqTypeLED1 Follow-S - Follow-S - Sequence type for
Follow-F LED 1
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Table continued on next page

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Parameter Range Step Default Unit Description


SeqTypeLED2 Follow-S - Follow-S - Sequence type for
Follow-F LED 2
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED3 Follow-S - Follow-S - Sequence type for
Follow-F LED 3
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED4 Follow-S - Follow-S - Sequence type for
Follow-F LED 4
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED5 Follow-S - Follow-S - Sequence type for
Follow-F LED 5
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED6 Follow-S - Follow-S - Sequence type for
Follow-F LED 6
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED7 Follow-S - Follow-S - Sequence type for
Follow-F LED 7
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED8 Follow-S - Follow-S - sequence type for
Follow-F LED 8
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED9 Follow-S - Follow-S - Sequence type for
Follow-F LED 9
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED10 Follow-S - Follow-S - Sequence type for
Follow-F LED 10
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
Table continued on next page

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Parameter Range Step Default Unit Description


SeqTypeLED11 Follow-S - Follow-S - Sequence type for
Follow-F LED 11
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED12 Follow-S - Follow-S - Sequence type for
Follow-F LED 12
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED13 Follow-S - Follow-S - Sequence type for
Follow-F LED 13
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED14 Follow-S - Follow-S - Sequence type for
Follow-F LED 14
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
SeqTypeLED15 Follow-S - Follow-S - Sequence type for
Follow-F LED 15
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S

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Section 3
Basic IED functions

Section 3 Basic IED functions

About this chapter


This chapter presents functions that are basic to all REx670 IEDs. Typical functions
in this category are time synchronization, self supervision and test mode.

3.1 Analog inputs

3.1.1 Introduction
In order to get correct measurement results as well as correct protection operations
the analog input channels must be configured and properly set. It is necessary to define
a reference PhaseAngleRef for correct calculation of phase angles. For power
measuring and all directional and differential functions the directions of the input
currents must be properly defined. The measuring and protection algorithms in IED
670 are using primary system quantities and the set values are done in primary
quantities as well. Therefore it is extremely important to properly set the data about
the connected current and voltage transformers.

VT inputs are sometimes not available depending on ordered type of


Transformer Input Module (TRM).

3.1.2 Principle of operation


The direction of a current to the IED is depending on the connection of the CT. The
main CTs are always supposed to be star connected and can be connected with the
star point to the object or from the object. This information must be set to the IED.
The convention of the directionality is defined as follows: A positive value of current,
power etc. means that the quantity has the direction into the object and a negative
value means direction out from the object. For directional functions the direction into
the object is defined as Forward and the direction out from the object is defined as
Reverse, see figure 22

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Definition of direction Definition of direction


for directional functions for directional functions
Reverse Forward Forward Reverse
Protected Object
Line, transformer, etc
e.g. P, Q, I e.g. P, Q, I
Measured quantity is Measured quantity is
positive when flowing positive when flowing
towards the object towards the object

Set parameter Set parameter


CTStarPoint CTStarPoint
Correct Setting is Correct Setting is
"ToObject" "FromObject"

en05000456.vsd

Figure 22: Internal convention of the directionality in IED 670

With correct setting of the primary CT direction, CTStarPoint set to FromObject or


ToObject, a positive quantities always flowing towards the object and a direction
defined as Forward always is looking towards the object. To be able to use primary
system quantities for settings and calculation in the IED the ration of the main CTs
and VTs must be known. This information is given to the IED by setting of the rated
secondary and primary currents and voltages of the CTs and VTs.

3.1.3 Function block

The function blocks are not represented in the configuration tool. The
signals appear only in the SMT tool when a TRM is included in the
configuration with the function selector tool. In the SMT tool they can
be mapped to the desired virtual input (SMAI) of the IED670 and used
internally in the configuration.

3.1.4 Setting parameters


Dependent on ordered IED 670 type.

Table 8: General settings for the AISERVAL (AISV-) function


Parameter Range Step Default Unit Description
PhaseAngleRef 1 - 24 1 1 Ch Reference channel
for phase angle
presentation

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Table 9: General settings for the ANALOGIN12I (TA40-) function


Parameter Range Step Default Unit Description
CTStarPoint1 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec1 1 - 10 1 1 A Rated CT secondary
current
CTprim1 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint2 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec2 1 - 10 1 1 A Rated CT secondary
current
CTprim2 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint3 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec3 1 - 10 1 1 A Rated CT secondary
current
CTprim3 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint4 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec4 1 - 10 1 1 A Rated CT secondary
current
CTprim4 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint5 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec5 1 - 10 1 1 A Rated CT secondary
current
CTprim5 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint6 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec6 1 - 10 1 1 A Rated CT secondary
current
CTprim6 1 - 99999 1 3000 A Rated CT primary
current
Table continued on next page

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Parameter Range Step Default Unit Description


CTStarPoint7 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec7 1 - 10 1 1 A Rated CT secondary
current
CTprim7 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint8 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec8 1 - 10 1 1 A Rated CT secondary
current
CTprim8 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint9 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec9 1 - 10 1 1 A Rated CT secondary
current
CTprim9 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint10 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec10 1 - 10 1 1 A Rated CT secondary
current
CTprim10 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint11 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec11 1 - 10 1 1 A Rated CT secondary
current
CTprim11 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint12 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec12 1 - 10 1 1 A Rated CT secondary
current
CTprim12 1 - 99999 1 3000 A Rated CT primary
current

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Table 10: General settings for the ANALOGIN6I (TB40-) function


Parameter Range Step Default Unit Description
CTStarPoint1 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec1 1 - 10 1 1 A Rated CT secondary
current
CTprim1 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint2 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec2 1 - 10 1 1 A Rated CT secondary
current
CTprim2 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint3 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec3 1 - 10 1 1 A Rated CT secondary
current
CTprim3 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint4 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec4 1 - 10 1 1 A Rated CT secondary
current
CTprim4 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint5 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec5 1 - 10 1 1 A Rated CT secondary
current
CTprim5 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint6 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec6 1 - 10 1 1 A Rated CT secondary
current
CTprim6 1 - 99999 1 3000 A Rated CT primary
current

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Table 11: General settings for the ANALOGIN9I3U (TC40-) function


Parameter Range Step Default Unit Description
CTStarPoint1 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec1 1 - 10 1 1 A Rated CT secondary
current
CTprim1 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint2 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec2 1 - 10 1 1 A Rated CT secondary
current
CTprim2 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint3 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec3 1 - 10 1 1 A Rated CT secondary
current
CTprim3 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint4 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec4 1 - 10 1 1 A Rated CT secondary
current
CTprim4 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint5 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec5 1 - 10 1 1 A Rated CT secondary
current
CTprim5 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint6 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec6 1 - 10 1 1 A Rated CT secondary
current
CTprim6 1 - 99999 1 3000 A Rated CT primary
current
Table continued on next page

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Parameter Range Step Default Unit Description


CTStarPoint7 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec7 1 - 10 1 1 A Rated CT secondary
current
CTprim7 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint8 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec8 1 - 10 1 1 A Rated CT secondary
current
CTprim8 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint9 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec9 1 - 10 1 1 A Rated CT secondary
current
CTprim9 1 - 99999 1 3000 A Rated CT primary
current
VTsec10 0.001 - 999.999 0.001 110.000 V Rated VT secondary
voltage
VTprim10 0.05 - 2000.00 0.05 400.00 kV Rated VT primary
voltage
VTsec11 0.001 - 999.999 0.001 110.000 V Rated VT secondary
voltage
VTprim11 0.05 - 2000.00 0.05 400.00 kV Rated VT primary
voltage
VTsec12 0.001 - 999.999 0.001 110.000 V Rated VT secondary
voltage
VTprim12 0.05 - 2000.00 0.05 400.00 kV Rated VT primary
voltage

Table 12: General settings for the ANALOGIN6I6U (TD40-) function


Parameter Range Step Default Unit Description
CTStarPoint1 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec1 1 - 10 1 1 A Rated CT secondary
current
CTprim1 1 - 99999 1 3000 A Rated CT primary
current
Table continued on next page

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Parameter Range Step Default Unit Description


CTStarPoint2 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec2 1 - 10 1 1 A Rated CT secondary
current
CTprim2 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint3 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec3 1 - 10 1 1 A Rated CT secondary
current
CTprim3 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint4 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec4 1 - 10 1 1 A Rated CT secondary
current
CTprim4 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint5 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec5 1 - 10 1 1 A Rated CT secondary
current
CTprim5 1 - 99999 1 3000 A Rated CT primary
current
CTStarPoint6 FromObject - ToObject - ToObject= towards
ToObject protected object,
FromObject= the
opposite
CTsec6 1 - 10 1 1 A Rated CT secondary
current
CTprim6 1 - 99999 1 3000 A Rated CT primary
current
VTsec7 0.001 - 999.999 0.001 110.000 V Rated VT secondary
voltage
VTprim7 0.05 - 2000.00 0.05 400.00 kV Rated VT primary
voltage
VTsec8 0.001 - 999.999 0.001 110.000 V Rated VT secondary
voltage
VTprim8 0.05 - 2000.00 0.05 400.00 kV Rated VT primary
voltage
VTsec9 0.001 - 999.999 0.001 110.000 V Rated VT secondary
voltage
VTprim9 0.05 - 2000.00 0.05 400.00 kV Rated VT primary
voltage
Table continued on next page

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Parameter Range Step Default Unit Description


VTsec10 0.001 - 999.999 0.001 110.000 V Rated VT secondary
voltage
VTprim10 0.05 - 2000.00 0.05 400.00 kV Rated VT primary
voltage
VTsec11 0.001 - 999.999 0.001 110.000 V Rated VT secondary
voltage
VTprim11 0.05 - 2000.00 0.05 400.00 kV Rated VT primary
voltage
VTsec12 0.001 - 999.999 0.001 110.000 V Rated VT secondary
voltage
VTprim12 0.05 - 2000.00 0.05 400.00 kV Rated VT primary
voltage

3.2 Self supervision with internal event list

3.2.1 Introduction
The self-supervision function listens and reacts to internal system events, generated
by the different built-in self-supervision elements. The internal events are saved in
an internal event list.

3.2.2 Principle of operation


The self-supervision operates continuously and includes:

• Normal micro-processor watchdog function.


• Checking of digitized measuring signals.
• Other alarms, for example hardware and time synchronization.

The self-supervision status can be monitored from the local HMI or a SMS/SCS
system.

Under the Diagnostics menu in the local HMI the present information from the self-
supervision function can be reviewed. The information can be found under
Diagnostics\Internal Events or Diagnostics\IED Status\General. Refer to the
“Installation and Commissioning manual” for a detailed list of supervision signals
that can be generated and displayed in the local HMI.

A self-supervision summary can be obtained by means of the potential free alarm


contact (INTERNAL FAIL) located on the power supply module. The function of
this output relay is an OR-function between the INT—FAIL signal see figure 24 and
a couple of more severe faults that can occur in the IED, see figure 23

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Figure 23: Hardware self-supervision, potential-free alarm contact.

Figure 24: Software self-supervision, IES (IntErrorSign) function block.

Some signals are available from the IES (IntErrorSign) function block. The signals
from this function block are sent as events to the station level of the control system.

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The signals from the IES function block can also be connected to binary outputs for
signalization via output relays or they can be used as conditions for other functions
if required/desired.

Individual error signals from I/O modules can be obtained from respective module
in the Signal Matrix Tool. Error signals from time synchronization can be obtained
from the time synchronization block TIME.

3.2.2.1 Internal signals

Self supervision provides several status signals, that tells about the condition of the
IED. As they provide information about the internal life of the IED, they are also
called internal signals. The internal signals can be divided into two groups. One group
handles signals that are always present in the IED; standard signals. Another group
handles signals that are collected depending on the hardware configuration. The
standard signals are listed in table 13. The hardware dependent internal signals are
listed in table 14. Explanations of internal signals are listed in table 15.

Table 13: Self-supervision's standard internal signals


Name of signal Description
FAIL Internal Fail status
WARNING Internal Warning status
NUMFAIL CPU module Fail status
NUMWARNING CPU module Warning status
RTCERROR Real Time Clock status
TIMESYNCHERROR Time Synchronization status
RTEERROR Runtime Execution Error status
IEC61850ERROR IEC 61850 Error status
WATCHDOG SW Watchdog Error status
LMDERROR LON/Mip Device Error status
APPERROR Runtime Application Error status
SETCHGD Settings changed
SETGRPCHGD Setting groups changed
FTFERROR Fault Tolerant Filesystem status

Table 14: Self-supervision's HW dependent internal signals


Card Name of signal Description
ADxx ADxx Analog In Module Error status
BIM BIM-Error Binary In Module Error status
BOM BOM-Error Binary Out Module Error status
IOM IOM-Error In/Out Module Error status
MIM MIM-Error Millampere Input Module Error status
LDCM LDCM-Error Line Differential Communication Error status

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Table 15: Explanations of internal signals


Name of signal Reasons for activation
FAIL This signal will be active if one or more of the following internal
signals are active; INT--NUMFAIL, INT--LMDERROR, INT--
WATCHDOG, INT--APPERROR, INT--RTEERROR, INT--
FTFERROR, or any of the HW dependent signals
WARNING This signal will be active if one or more of the following internal
signals are active; INT--RTCERROR, INT--IEC61850ERROR,
INT--TIMESYNCHERROR
NUMFAIL This signal will be active if one or more of the following internal
signals are active; INT--WATCHDOG, INT--APPERROR, INT--
RTEERROR, INT--FTFERROR
NUMWARNING This signal will be active if one or more of the following internal
signals are active; INT--RTCERROR, INT--IEC61850ERROR
RTCERROR This signal will be active when there is a hardware error with the
real time clock.
TIMESYNCHERROR This signal will be active when the source of the time
synchronization is lost, or when the time system has to make a time
reset.
RTEERROR This signal will be active if the Runtime Engine failed to do some
actions with the application threads. The actions can be loading of
settings or parameters for components, changing of setting groups,
loading or unloading of application threads.
IEC61850ERROR This signal will be active if the IEC61850 stack did not succeed in
some actions like reading IEC61850 configuration, startup etc.
WATCHDOG This signal will be activated when the terminal has been under too
heavy load for at least 5 minutes. The operating systems
background task is used for the measurements.
LMDERROR LON network interface, MIP/DPS, is in an unrecoverable error
state.
APPERROR This signal will be active if one or more of the application threads
are not in the state that Runtime Engine expects. The states can
be CREATED, INITIALIZED, RUNNING, etc.
SETCHGD This signal will generate an Internal Event to the Internal Event list
if any settings are changed.
SETGRPCHGD This signal will generate an Internal Event to the Internal Event list
if any setting groups are changed.
FTFERROR This signal will be active if both the working file and the backup file
are corrupted and can not be recovered.

3.2.2.2 Run-time model

The analog signals to the A/D converter is internally distributed into two different
converters, one with low amplification and one with high amplification, see figure
25.

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Figure 25: Simplified drawing of A/D converter for the 600 platform.

The technique to split the analogue input signal into two converters with different
amplification makes it possible to supervise the incoming signals under normal
conditions where the signals from the two converters should be identical. An alarm
is given if the signals are out of the boundaries. Another benefit is that it improves
the dynamic performance of the A/D conversion.

The self-supervision of the A/D conversion is controlled by the ADx_Controller


function. One of the tasks for the controller is to perform a validation of the input
signals. This is done in a validation filter which has mainly two objects: First is the
validation part, i.e. checks that the A/D conversion seems to work as expected.
Secondly, the filter chooses which of the two signals that shall be sent to the CPU,
i.e. the signal that has the most suitable level, the ADx_LO or the 16 times
higherADx_HI.

When the signal is within measurable limits on both channels, a direct comparison
of the two channels can be performed. If the validation fails, the CPU will be informed
and an alarm will be given.

The ADx_Controller also supervise other parts of the A/D converter.

3.2.3 Function block


IS---
InternalSignal
FAIL
WARNING
CPUFAIL
CPUWARN
T SYNCERR
RT CERR

en04000392.vsd

Figure 26: IS function block

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3.2.4 Output signals

Table 16: Output signals for the InternalSignal (IS---) function block
Signal Description
FAIL Internal fail
WARNING Internal warning
CPUFAIL CPU fail
CPUWARN CPU warning
TSYNCERR Time synchronization status
RTCERR Real time clock status

3.2.5 Setting parameters


The function does not have any parameters available in Local HMI or Protection and
Control IED Manager (PCM 600)

3.2.6 Technical data

Table 17: Self supervision with internal event list


Data Value
Recording manner Continuous, event controlled
List size 1000 events, first in-first out

3.3 Time synchronization

3.3.1 Introduction
Use the time synchronization source selector to select a common source of absolute
time for the IED when it is a part of a protection system. This makes comparison of
events and disturbance data between all IEDs in a SA system possible.

3.3.2 Principle of operation

3.3.2.1 General concepts

Time definitions
The error of a clock is the difference between the actual time of the clock, and the
time the clock is intended to have. The rate accuracy of a clock is normally called the
clock accuracy and means how much the error increases, i.e. how much the clock

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gains or loses time. A disciplined clock is a clock that “knows” its own faults and
tries to compensate for them, i.e. a trained clock.

Synchronization principle
From a general point of view synchronization can be seen as a hierarchical structure.
A module is synchronized from a higher level and provides synchronization to lower
levels.

Syncronization from
a higher level

Module

Optional syncronization of
modules at a lower level

en05000206.vsd

Figure 27: Synchronization principle

A module is said to be synchronized when it periodically receives synchronization


messages from a higher level. As the level decreases, the accuracy of the
synchronization decreases as well. A module can have several potential sources of
synchronization, with different maximum errors, which gives the module the
possibility to choose the source with the best quality, and to adjust its internal clock
after this source. The maximum error of a clock can be defined as a function of:

• The maximum error of the last used synchronization message


• The time since the last used synchronization message
• The rate accuracy of the internal clock in the module.

3.3.2.2 Real Time Clock (RTC) operation

The IED has a built-in Real Time Clock (RTC) with a resolution of one nanosecond.
The clock has a built-in calendar that handles leap years through 2098.

RTC at power off


During power off, the time in the IED time is kept by a capacitor backed RTC that
will provide 35 ppm accuracy for 5 days. This means that if the power is off, the time
in the IED may drift with 3 seconds per day, during 5 days, and after this time the
time will be lost completely.

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RTC at startup
At IED startup, the internal time is free running. If the RTC is still alive since the last
up time, the time in the IED will be quite accurate (may drift 35 ppm), but if the RTC
power has been lost during power off (will happen after 5 days), the IED time will
start at 1970-01-01. For more information, please refer to section "Time
synchronization startup procedure" and section "Example, binary synchronization".

Time synchronization startup procedure


The first message that contains full time (as for instance LON, SNTP, GPS etc.) will
give an accurate time to the IED. The IED is brought into a safe state and the time is
thereafter set to the correct value. After the initial setting of the clock, one of three
things will happen with each of the coming synchronization messages, configured as
“fine”:

• If the synchronization message, that is similar to the other messages from its
origin has an offset compared to the internal time in the IED, the message is used
directly for synchronization, that is for adjusting the internal clock to obtain zero
offset at the next coming time message.
• If the synchronization message has an offset that is large compared to the other
messages, a “spike-filter” in the IED will remove this time-message.
• If the synchronization message has an offset that is large, and the following
message also has a large offset, the spike filter will not act and the offset in the
synchronization message will be compared to a threshold that defaults to 100
milliseconds. If the offset is more than the threshold, the IED is brought into a
safe state and the clock is thereafter set to the correct time. If the offset is lower
than the threshold, the clock will be adjusted with 1000 ppm until the offset is
removed. With an adjustment of 1000 ppm, it will take 100 seconds or 1.7
minutes to remove an offset of 100 milliseconds.

Synchronization messages configured as coarse will only be used for initial setting
of the time. After this has been done, the messages are checked against the internal
time and only an offset of more than 10 seconds will reset the time.

Rate accuracy
In the REx670 IED, the rate accuracy at cold start is about 100 ppm, but if the IED
is synchronized for a while, the rate accuracy will be approximately 1 ppm if the
surrounding temperature is constant. Normally it will take 20 minutes to reach full
accuracy.

Time-out on synchronization sources


All synchronization interfaces has a time-out, and a configured interface must receive
time-messages regularly, in order not to give a TSYNCERR. Normally, the time-out
is set so that one message can be lost without getting a TSYNCERR, but if more than
one message is lost, a TSYNCERR will be given.

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3.3.2.3 Synchronization alternatives

Three main alternatives of external time synchronization are available. Either the
synchronization message is applied via any of the communication ports of the IED
as a telegram message including date and time or as a minute pulse, connected to a
binary input, or via GPS. The minute pulse is used to fine tune already existing time
in the IEDs.

Synchronization via SNTP


SNTP provides a “Ping-Pong” method of synchronization. A message is sent from
an IED to an SNTP-server, and the SNTP-server returns the message after filling in
a reception time and a transmission time. SNTP operates via the normal Ethernet
network that connects IEDs together in an IEC61850 network. For SNTP to operate
properly, there must be a SNTP-server present, preferably in the same station. The
SNTP synchronization provides an accuracy that will give 1 ms accuracy for binary
inputs. The IED itself can be set as a SNTP-time server.

SNTP server requirements


The SNTP server to be used shall be connected to the local network, i.e. not more
than 4-5 switches/routers away from the IED. The SNTP server shall be dedicated
for its task, or at least equipped with at real-time operating system, i.e. not a PC with
SNTP server software. The SNTP server shall be stable, i.e. either synchronized from
a stable source like GPS, or local i.e. without synchronization. Using a local SNTP
server i.e. without synchronization as primary or secondary server in a redundant
configuration is not recommended.

Synchronization via Serial Communication Module (SLM)


On the serial buses (both LON and SPA) two types of synchronization messages are
sent.

• Coarse message is sent every minute and comprises complete date and time, i.e.
year, month, day, hours, minutes, seconds and milliseconds.
• Fine message is sent every second and comprises only seconds and milliseconds.

IEC60870-5-103 is not used to synchronize the relay, but instead the offset between
the local time in the relay and the time received from 103 is added to all times (in
events and so on) sent via 103. In this way the relay acts as it is synchronized from
various 103 sessions at the same time. Actually, there is a “local” time for each 103
session.

The SLM module is located on the AD conversion Module (ADM).

Synchronization via Built-in-GPS


The built in GPS clock modules receives and decodes time information from the
global positioning system. The modules are located on the GPS time synchronization
Module (GSM).

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Synchronization via binary input


The IED accepts minute pulses to a binary input. These minute pulses can be
generated from e.g. station master clock. If the station master clock is not
synchronized from a world wide source, time will be a relative time valid for the
substation. Both positive and negative edge on the signal can be accepted. This signal
is also considered as a fine signal.

The minute pulse is connected to any channel on any Binary Input Module in the IED.
The electrical characteristic is thereby the same as for any other binary input.

If the objective of synchronization is to achieve a relative time within the substation


and if no station master clock with minute pulse output is available, a simple minute
pulse generator can be designed and used for synchronization of the IEDs. The minute
pulse generator can be created using the logical elements and timers available in the
IED.

The definition of a minute pulse is that it occurs one minute after the last pulse. As
only the flanks are detected, the flank of the minute pulse shall occur one minute after
the last flank.

Binary minute pulses are checked with reference to frequency.

Pulse data:

• Period time (a) should be 60 seconds.


• Pulse length (b):
• Minimum pulse length should be >50 ms.
• Maximum pulse length is optional.
• Amplitude (c) - please refer to section "Binary input module (BIM)".

Deviations in the period time larger than 50 ms will cause TSYNCERR.

en05000251.vsd

Figure 28: Binary minute pulses

The default time-out-time for a minute pulse is two minutes, and if no valid minute
pulse is received within two minutes a SYNCERR will be given.

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If contact bounces occurs, only the first pulse will be detected as a minute pulse. The
next minute pulse will be registered first 60 s - 50 ms after the last contact bounce.

If the minute pulses are perfect, e.g. it is exactly 60 seconds between the pulses,
contact bounces might occur 49 ms after the actual minute pulse without effecting
the system. If contact bounces occurs more than 50 ms, e.g. it is less than 59950 ms
between the two most adjacent positive (or negative) flanks, the minute pulse will
not be accepted.

Example, binary synchronization


A IED is configured to use only binary input, and a valid binary input is applied to a
binary input card. The HMI is used to tell the IED the approximate time and the minute
pulse is used to synchronize the IED thereafter. The definition of a minute pulse is
that it occurs one minute after the previous minute pulse, so the first minute pulse is
not used at all. The second minute pulse will probably be rejected due to the spike
filter. The third pulse will give the IED a good time and will reset the time so that the
fourth minute pulse will occur on a minute border. After the first three minutes, the
time in the IED will be good if the coarse time is set properly via the HMI or the RTC
backup still keeps the time since last up-time. If the minute pulse is removed for
instance for an hour, the internal time will drift by maximum the error rate in the
internal clock. If the minute pulse is returned, the first pulse automatically is rejected.
The second pulse will possibly be rejected due to the spike filter. The third pulse will
either synchronize the time, if the time offset is more than 100 ms, or adjust the time,
if the time offset is small enough. If the time is set, the application will be brought to
a safe state before the time is set. If the time is adjusted, the time will reach its
destination within 1.7 minutes.

3.3.3 Function block


TIME-
TIME
TSYNCERR
RTCERR

en05000425.vsd

Figure 29: TIME function block

3.3.4 Output signals

Table 18: Output signals for the TIME (TIME-) function block
Signal Description
TSYNCERR Time synchronization error
RTCERR Real time clock error

3.3.5 Setting parameters

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Path in local HMI: Setting/Time

Path in PCM 600: Settings/Time/Synchronization

Table 19: Basic general settings for the TimeSynch (TSYN-) function
Parameter Range Step Default Unit Description
CoarseSyncSrc Off - Off - Coarse time
SPA synchronization
LON source
SNTP
FineSyncSource Off - Off - Fine time
SPA synchronization
LON source
BIN
GPS
GPS+SPA
GPS+LON
GPS+BIN
SNTP
GPS+SNTP
SyncMaster Off - Off - Activate IEDas
SNTP-Server synchronization
master
TimeAdjustRate Slow - Fast - Adjust rate for time
Fast synchronization

Table 20: Basic general settings for the TimeSynch (TSYN-) function
Parameter Range Step Default Unit Description
CoarseSyncSrc Off - Off - Coarse time
SPA synchronization
LON source
SNTP
FineSyncSource Off - Off - Fine time
SPA synchronization
LON source
BIN
GPS
GPS+SPA
GPS+LON
GPS+BIN
SNTP
GPS+SNTP
SyncMaster Off - Off - Activate IEDas
SNTP-Server synchronization
master
TimeAdjustRate Slow - Slow - Adjust rate for time
Fast synchronization

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Table 21: General settings for the TimeSynchBIN (TBIN-) function


Parameter Range Step Default Unit Description
ModulePosition 3 - 16 1 3 - Hardware position of
IO module for time
synchronization
BinaryInput 1 - 16 1 1 - Binary input number
for time
synchronization
BinDetection PositiveEdge - PositiveEdge - Positive or negative
NegativeEdge edge detection

Table 22: General settings for the TimeSynchSNTP (TSNT-) function


Parameter Range Step Default Unit Description
ServerIP-Add 0 - 18 1 0.0.0.0 - Server IP-address
RedServIP-Add 0 - 18 1 0.0.0.0 - Redundant server IP-
address

Table 23: General settings for the DaySumDSTBegin (TSTB-) function


Parameter Range Step Default Unit Description
MonthInYear January - March - Month in year when
February daylight time starts
March
April
May
June
July
August
September
October
November
December
DayInWeek Sunday - Sunday - Day in week when
Monday daylight time starts
Tuesday
Wednesday
Thursday
Friday
Saturday
WeekInMonth Last - Last - Week in month when
First daylight time starts
Second
Third
Fourth
UTCTimeOfDay 0 - 86400 1 3600 s UTC Time of day in
seconds when
daylight time starts

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Table 24: General settings for the DaySumTimeEnd (TSTE-) function


Parameter Range Step Default Unit Description
MonthInYear January - October - Month in year when
February daylight time ends
March
April
May
June
July
August
September
October
November
December
DayInWeek Sunday - Sunday - Day in week when
Monday daylight time ends
Tuesday
Wednesday
Thursday
Friday
Saturday
WeekInMonth Last - Last - Week in month when
First daylight time ends
Second
Third
Fourth
UTCTimeOfDay 0 - 86400 1 3600 s UTC Time of day in
seconds when
daylight time ends

Table 25: General settings for the TimeZone (TZON-) function


Parameter Range Step Default Unit Description
NoHalfHourUTC -24 - 24 1 0 - Number of half-hours
from UTC

3.3.6 Technical data

Table 26: Time synchronization, time tagging


Function Value
Time tagging resolution, Events and Sampled 1 ms
Measurement Values
Time tagging error with synchronization once/min ± 1.0 ms typically
(minute pulse synchronization), Events and
Sampled Measurement Values
Time tagging error with SNTP synchronization, ± 1.0 ms typically
Sampled Measurement Values

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3.4 Parameter setting groups

3.4.1 Introduction
Use the six sets of settings to optimize IED operation for different system conditions.
By creating and switching between fine tuned setting sets, either from the human-
machine interface or configurable binary inputs, results in a highly adaptable IED
that can cope with a variety of system scenarios.

3.4.2 Principle of operation


The ACGR function block has six functional inputs, each corresponding to one of the
setting groups stored in the IED. Activation of any of these inputs changes the active
setting group. Seven functional output signals are available for configuration
purposes, so that up to date information on the active setting group is always available.

A setting group is selected by using the local HMI, from a front connected personal
computer, remotely from the station control or station monitoring system or by
activating the corresponding input to the ACGR function block.

Each input of the function block can be configured to connect to any of the binary
inputs in the IED. To do this the PCM 600 configuration tool must be used.

The external control signals are used for activating a suitable setting group when
adaptive functionality is necessary. Input signals that should activate setting groups
must be either permanent or a pulse exceeding 400 ms.

More than one input may be activated at the same time. In such cases the lower order
setting group has priority. This means that if for example both group four and group
two are set to activate, group two will be the one activated.

Every time the active group is changed, the output signal SETCHGD is sending a
pulse with the length according to parameter t, which is set from PCM 600 or in the
local HMI.

The parameter MAXSETGR defines the maximum number of setting groups in use to
switch between.

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Figure 30: Connection of the function to external circuits

The above example also includes seven output signals, for confirmation of which
group that is active.

The SGC function block has an input where the number of setting groups used is
defined. Switching can only be done within that number of groups. The number of
setting groups selected to be used will be filtered so only the setting groups used will
be shown on the PST setting tool.

3.4.3 Function block

ACGR-
ActiveGroup
ACTGRP1 GRP1
ACTGRP2 GRP2
ACTGRP3 GRP3
ACTGRP4 GRP4
ACTGRP5 GRP5
ACTGRP6 GRP6
SETCHGD

en05000433.vsd

Figure 31: ACGR function block

SGC--
NoOfSetGrp
MAXSETGR

en05000716.vsd

3.4.4 Input and output signals

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Table 27: Input signals for the ActiveGroup (ACGR-) function block
Signal Description
ACTGRP1 Selects setting group 1 as active
ACTGRP2 Selects setting group 2 as active
ACTGRP3 Selects setting group 3 as active
ACTGRP4 Selects setting group 4 as active
ACTGRP5 Selects setting group 5 as active
ACTGRP6 Selects setting group 6 as active

Table 28: Output signals for the ActiveGroup (ACGR-) function block
Signal Description
GRP1 Setting group 1 is active
GRP2 Setting group 2 is active
GRP3 Setting group 3 is active
GRP4 Setting group 4 is active
GRP5 Setting group 5 is active
GRP6 Setting group 6 is active
SETCHGD Pulse when setting changed

3.4.5 Setting parameters

Table 29: General settings for the ActiveGroup (ACGR-) function


Parameter Range Step Default Unit Description
t 0.0 - 10.0 0.1 1.0 s Pulse length of pulse
when setting changed

Table 30: General settings for the NoOfSetGrp (SGC--) function


Parameter Range Step Default Unit Description
ActiveSetGrp SettingGroup1 - SettingGroup1 - ActiveSettingGroup
SettingGroup2
SettingGroup3
SettingGroup4
SettingGroup5
SettingGroup6
MAXSETGR 1-6 1 1 No Max number of setting
groups 1-6

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3.5 Test mode functionality

3.5.1 Introduction
Most of the functions in the IED can individually be blocked by means of settings
from the local HMI or PST. To enable these blockings the IED must be set in test
mode. When leaving the test mode, i.e. entering normal mode, these blockings are
disabled and everything is set to normal operation. All testing will be done with
actually set and configured values within the IED. No settings will be changed, thus
mistakes are avoided.

3.5.2 Principle of operation


To be able to test the functions in the IED, you must set the terminal in the TEST
mode. There are two ways of setting the terminal in the TEST mode:

• By configuration, activating the input of the function block TEST.


• By setting TestMode to On in the local HMI, under the menu: TEST/IED test
mode.

While the IED is in test mode, the ACTIVE output of the function block TEST is
activated. The other two outputs of the function block TEST are showing which is
the generator of the “Test mode: On” state — input from configuration (OUTPUT
output activated) or setting from LHMI (SETTING output activated).

While the IED is in test mode, the yellow START LED will flash and all functions
are blocked. Any function can be de-blocked individually regarding functionality and
event signalling.

Most of the functions in the IED can individually be blocked by means of settings
from the local HMI. To enable these blockings the IED must be set in test mode (the
output ACTIVE in function block TEST is set to true), see example in figure 32.
When leaving the test mode, i.e. entering normal mode, these blockings are disabled
and everything is set to normal operation. All testing will be done with actually set
and configured values within the IED. No settings will be changed, thus no mistakes
are possible.

The blocked functions will still be blocked next time entering the test mode, if the
blockings were not reset.

The blocking of a function concerns all output signals from the actual function, so no
outputs will be activated.

The TEST function block might be used to automatically block functions when a test
handle is inserted in a test switch. A contact in the test switch (RTXP24 contact 29-30)
can supply a binary input which in turn is configured to the TEST function block.

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Each of the protection functions includes the blocking from TEST function block. A
typical example from the undervoltage function is shown in figure 32.

U Disconnection

Normal voltage

U1<

U2<

tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2

Time

Block step 1

Block step 2
en05000466.vsd

Figure 32: Example of blocking the time delayed undervoltage protection


function.

3.5.3 Function block


TEST-
Test
INPUT ACTIVE
OUTPUT
SETTING

en05000443.vsd

Figure 33: TEST function block

3.5.4 Input and output signals

Table 31: Input signals for the Test (TEST-) function block
Signal Description
INPUT Sets terminal in test mode when active

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Table 32: Output signals for the Test (TEST-) function block
Signal Description
ACTIVE Terminal in test mode when active
OUTPUT Test input is active
SETTING Test mode setting is (On) or not (Off)

3.5.5 Setting parameters

Table 33: General settings for the Test (TEST-) function


Parameter Range Step Default Unit Description
TestMode Off - Off - Test mode in
On operation (On) or not
(Off)

3.6 IED identifiers

3.6.1 Introduction
There are two functions that allow you to identify each IED individually:
ProductInformation function has only three pre-set, unchangeable but nevertheless
very important settings: SerialNo., Ordering No., and ProductDate, that you can see
on the local HMI, under Diagnostics/IED Status/Identifiers. They are very helpful in
case of support process (such as repair or maintenance).

Identifiers function is actually allowing you to identify the individual IED in your
system, not only in the substation, but in a whole region or a country.

3.6.2 Setting parameters

Table 34: General settings for the TerminalID (TEID-) function


Parameter Range Step Default Unit Description
StationName 0 - 18 1 Station name - Station name
StationNumber 0 - 99999 1 0 - Station number
ObjectName 0 - 18 1 Object name - Object name
ObjectNumber 0 - 99999 1 0 - Object number
UnitName 0 - 18 1 Unit name - Unit name
UnitNumber 0 - 99999 1 0 - Unit number

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3.7 Signal matrix for binary inputs (SMBI)

3.7.1 Introduction
The SMBI function block is used within the CAP tool in direct relation with the Signal
Matrix Tool SMT (please see the overview of the engineering process in the
“Application manual”, chapter “Engineering of the IED”). It represents the way
binary inputs are brought in for one IED 670 configuration.

3.7.2 Principle of operation


The SMBI function block, see figure 34, receives its inputs from the real (hardware)
binary inputs via the SMT, and makes them available to the rest of the configuration
via its outputs, named BI1 to BI10. The inputs, as well as the whole block, can be
tag-named. These tags will be represented in SMT.

3.7.3 Function block


SI01-
SMBI
INSTNAME BI1
BI1NAME BI2
BI2NAME BI3
BI3NAME BI4
BI4NAME BI5
BI5NAME BI6
BI6NAME BI7
BI7NAME BI8
BI8NAME BI9
BI9NAME BI10
BI10NAME

en05000434.vsd

Figure 34: SI function block

3.7.4 Input and output signals

Table 35: Input signals for the SMBI (SI01-) function block
Signal Description
INSTNAME Instance name in Signal Matrix Tool
BI1NAME Signal name for BI1 in Signal Matrix Tool
BI2NAME Signal name for BI2 in Signal Matrix Tool
BI3NAME Signal name for BI3 in Signal Matrix Tool
BI4NAME Signal name for BI4 in Signal Matrix Tool
BI5NAME Signal name for BI5 in Signal Matrix Tool
BI6NAME Signal name for BI6 in Signal Matrix Tool
BI7NAME Signal name for BI7 in Signal Matrix Tool
Table continued on next page

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Signal Description
BI8NAME Signal name for BI8 in Signal Matrix Tool
BI9NAME Signal name for BI9 in Signal Matrix Tool
BI10NAME Signal name for BI10 in Signal Matrix Tool

Table 36: Output signals for the SMBI (SI01-) function block
Signal Description
BI1 Binary input 1
BI2 Binary input 2
BI3 Binary input 3
BI4 Binary input 4
BI5 Binary input 5
BI6 Binary input 6
BI7 Binary input 7
BI8 Binary input 8
BI9 Binary input 9
BI10 Binary input 10

3.8 Signal matrix for binary outputs (SMBO)

3.8.1 Introduction
The SMBO function block is used within the CAP tool in direct relation with the
Signal Matrix Tool SMT (please see the overview of the engineering process in the
“Application manual”, chapter “Engineering of the IED”). It represents the way
binary outputs are sent from one IED 670 configuration.

3.8.2 Principle of operation


The SMBO function block, see figure 35, receives logical signal from the IED
configuration, which it is transferring to the real (hardware) outputs, via the SMT.
The inputs in the SMBO are named BO1 to BO10 and they, as well as the whole
function block, can be tag-named. The name tags will appear in SMT.

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3.8.3 Function block


SO01-
SMBO
BO1 INSTNAME
BO2 BO1NAME
BO3 BO2NAME
BO4 BO3NAME
BO5 BO4NAME
BO6 BO5NAME
BO7 BO6NAME
BO8 BO7NAME
BO9 BO8NAME
BO10 BO9NAME
BO10NAME

en05000439.vsd

Figure 35: SO function block

3.8.4 Input and output signals

Table 37: Input signals for the SMBO (SO01-) function block
Signal Description
BO1 Signal name for BO1 in Single Matrix Tool
BO2 Signal name for BO2 in Single Matrix Tool
BO3 Signal name for BO3 in Single Matrix Tool
BO4 Signal name for BO4 in Single Matrix Tool
BO5 Signal name for BO5 in Single Matrix Tool
BO6 Signal name for BO6 in Single Matrix Tool
BO7 Signal name for BO7 in Single Matrix Tool
BO8 Signal name for BO8 in Single Matrix Tool
BO9 Signal name for BO9 in Single Matrix Tool
BO10 Signal name for BO10 in Single Matrix Tool

Table 38: Output signals for the SMBO (SO01-) function block
Signal Description
INSTNAME Instance name in Single Matrix Tool
BO1NAME Signal name for BO1 in Single Matrix Tool
BO2NAME Signal name for BO2 in Single Matrix Tool
BO3NAME Signal name for BO3 in Single Matrix Tool
BO4NAME Signal name for BO4 in Single Matrix Tool
BO5NAME Signal name for BO5 in Single Matrix Tool
BO6NAME Signal name for BO6 in Single Matrix Tool
BO7NAME Signal name for BO7 in Single Matrix Tool
Table continued on next page

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Basic IED functions

Signal Description
BO8NAME Signal name for BO8 in Single Matrix Tool
BO9NAME Signal name for BO9 in Single Matrix Tool
BO10NAME Signal name for BO10 in Single Matrix Tool

3.9 Signal matrix for mA inputs (SMMI)

3.9.1 Introduction
The SMMI function block is used within the CAP tool in direct relation with the
Signal Matrix Tool SMT (please see the overview of the engineering process in the
“Application manual”, chapter “Engineering of the IED”). It represents the way
milliamp (mA) inputs are brought in for one IED670 configuration.

3.9.2 Principle of operation


The SMMI function block, see figure 36, receives its inputs from the real (hardware)
mA inputs via the SMT, and makes them available to the rest of the configuration via
its analog outputs, named AI1 to AI6. The inputs, as well as the whole block, can be
tag-named. These tags will be represented in SMT.

The outputs on the SMMI are normally connected to the SPGGIO MVGGIO function
block for further use of the mA signals.

3.9.3 Function block


SMI1-
SMMI
INSTNAME AI1
AI1NAME AI2
AI2NAME AI3
AI3NAME AI4
AI4NAME AI5
AI5NAME AI6
AI6NAME

en05000440.vsd

Figure 36: SMI function block

3.9.4 Input and output signals

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Table 39: Input signals for the SMMI (SMI1-) function block
Signal Description
INSTNAME Instance name in Signal Matrix Tool
AI1NAME Signal name for AI1 in Signal Matrix Tool
AI2NAME Signal name for AI2 in Signal Matrix Tool
AI3NAME Signal name for AI3 in Signal Matrix Tool
AI4NAME Signal name for IN4 in Signal Matrix Tool
AI5NAME Signal name for AI5 in Signal Matrix Tool
AI6NAME Signal name for AI6 in Signal Matrix Tool

Table 40: Output signals for the SMMI (SMI1-) function block
Signal Description
AI1 Analog milliampere input 1
AI2 Analog milliampere input 2
AI3 Analog milliampere input 3
AI4 Analog milliampere input 4
AI5 Analog milliampere input 5
AI6 Analog milliampere input 6

3.10 Signal matrix for analog inputs (SMAI)

3.10.1 Introduction
The SMAI function block (or the pre-processing function block, as it is also known)
is used within the PCM 600 in direct relation with the Signal Matrix Tool SMT (please
see the overview of the engineering process in the “Application manual”, chapter
“Engineering of the IED”). It represents the way analog inputs are brought in for one
IED 670 configuration.

3.10.2 Principle of operation


Every SMAI function block can receive four analog signals (three phases and one
neutral value), either voltage or current, see figure 37 and figure 38. The outputs of
the SMAI are giving information about every aspect of the 3ph analog signals
acquired (phase angle, RMS value, frequency and frequency derivates etc. – 244
values in total). The BLOCK input will reset to 0 all the analog inputs of the function
block.

3.10.3 Function block

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PR01-
SMAI
BLOCK SYNCOUT
DFTSPFC SPFCOUT
GRPNAME AI3P
AI1NAME AI1
AI2NAME AI2
AI3NAME AI3
AI4NAME AI4
TYPE AIN
NOSMPLCY

en05000705.vsd

Figure 37: PR01 function block

PR02-
SMAI
BLOCK AI3P
GRPNAME AI1
AI1NAME AI2
AI2NAME AI3
AI3NAME AI4
AI4NAME AIN
TYPE NOSMPLCY

en05000706.vsd

Figure 38: PR02–12 function block

3.10.4 Input and output signals

Table 41: Input signals for the SMAI (PR01-) function block
Signal Description
BLOCK Block group 1
DFTSYNC Synchronisation of DFT calculation
DFTSPFC Number of samples per fundamental cycle used for DFT
calculation
GRPNAME Group name for GRP1 in Signal Matrix Tool
AI1NAME Signal name for AI1 in Signal Matrix Tool
AI2NAME Signal name for AI2 in Signal Matrix Tool
AI3NAME Signal name for AI3 in Signal Matrix Tool
AI4NAME Signal name for AI4 in Signal Matrix Tool

Table 42: Output signals for the SMAI (PR01-) function block
Signal Description
SYNCOUT Synchronisation signal from internal DFT reference function
SPFCOUT Number of samples per fundamental cycle from internal DFT
reference function
AI3P Group 1 analog input 3-phase group
AI1 Group 1 analog input 1
Table continued on next page

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Signal Description
AI2 Group 1 analog input 2
AI3 Group 1 analog input 3
AI4 Group 1 analog input 4
AIN Group 1 analog input residual for disturbance recorder

Table 43: Input signals for the SMAI (PR02-) function block
Signal Description
BLOCK Block group 2
GRPNAME Group name for GRP2 in Signal Matrix Tool
AI1NAME Signal name for AI1 in Signal Matrix Tool
AI2NAME Signal name for AI2 in Signal Matrix Tool
AI3NAME Signal name for AI3 in Signal Matrix Tool
AI4NAME Signal name for AI4 in Signal Matrix Tool

Table 44: Output signals for the SMAI (PR02-) function block
Signal Description
AI3P Group 2 analog input 3-phase group
AI1 Group 2 analog input 1
AI2 Group 2 analog input 2
AI3 Group 2 analog input 3
AI4 Group 2 analog input 4
AIN Group 2 analog input residual for disturbance recorder

3.10.5 Setting parameters

Settings DFTRefExtOut and DFTReference shall be set to default


value InternalDFTRef if no VT inputs are available.

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Basic IED functions

Table 45: General settings for the SMAI (PR01-) function


Parameter Range Step Default Unit Description
DFTRefExtOut InternalDFTRef - InternalDFTRef - DFT reference for
AdDFTRefCh1 external output
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
DFTReference InternalDFTRef - InternalDFTRef - DFT reference
AdDFTRefCh1
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
ConnectionType Ph-N - Ph-N - Input connection type
Ph-Ph
Negation Off - Off - Negation
NegateN
Negate3Ph
Negate3Ph+N
MinValFreqMeas 5 - 200 1 10 % Limit for frequency
calculation in % of
UBase
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage
TYPE 1-2 1 1 Ch 1=Voltage,2=Current

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Table 46: General settings for the SMAI (PR02-) function


Parameter Range Step Default Unit Description
DFTReference InternalDFTRef - InternalDFTRef - DFT reference
AdDFTRefCh1
AdDFTRefCh2
AdDFTRefCh3
AdDFTRefCh4
AdDFTRefCh5
AdDFTRefCh6
AdDFTRefCh7
AdDFTRefCh8
AdDFTRefCh9
AdDFTRefCh10
AdDFTRefCh11
AdDFTRefCh12
External DFT ref
ConnectionType Ph-N - Ph-N - Input connection type
Ph-Ph
Negation Off - Off - Negation
NegateN
Negate3Ph
Negate3Ph+N
MinValFreqMeas 5 - 200 1 10 % Limit for frequency
calculation in % of
UBase
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage
TYPE 1-2 1 1 Ch 1=Voltage,2=Current

3.11 Summation block 3 phase (SUM3Ph)

3.11.1 Introduction
The SUM3Ph function block is used in order to get the sum of two sets of 3 ph analog
signals (of the same type) for those IED functions that might need it.

3.11.2 Principle of operation


The summation block receives the 3ph signals from the SMAI blocks, see
figure 39. In the same way, the BLOCK input will reset to 0 all the analog inputs of
the function block.

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Basic IED functions

3.11.3 Function block


SU01-
Sum3Ph
BLOCK AI3P
DFTSYNC AI1
DFTSPFC AI2
G1AI3P AI3
G2AI3P AI4

en05000441.vsd

Figure 39: SU function block

3.11.4 Input and output signals

Table 47: Input signals for the Sum3Ph (SU01-) function block
Signal Description
BLOCK Block
DFTSYNC Synchronisation of DFT calculation
DFTSPFC Number of samples per fundamental cycle used for DFT
calculation
G1AI3P Group 1 analog input 3-phase group
G2AI3P Group 2 analog input 3-phase group

Table 48: Output signals for the Sum3Ph (SU01-) function block
Signal Description
AI3P Group analog input 3-phase group
AI1 Group 1 analog input
AI2 Group 2 analog input
AI3 Group 3 analog input
AI4 Group 4 analog input

3.11.5 Setting parameters

Settings DFTRefExtOut and DFTReference shall be set to default


value InternalDFTRef if no VT inputs are available.

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Table 49: General settings for the Sum3Ph (SU01-) function


Parameter Range Step Default Unit Description
SummationType Group1+Group2 - Group1+Group2 - Summation type
Group1-Group2
Group2-Group1
-
(Group1+Group2)
DFTReference InternalDFTRef - InternalDFTRef - DFT reference
AdDFTRefCh1
External DFT ref
FreqMeasMinVal 5 - 200 1 10 % Amplitude limit for
frequency
calculation in % of
Ubase
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage

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88
Section 4
Differential protection

Section 4 Differential protection

About this chapter


This chapter describes the measuring principles, functions and parameters used in
differential protection.

4.1 Line differential protection

Function block name: L3D-- IEC 60617 graphical symbol:


ANSI number: 87L
IEC 61850 logical node name:
L3CPDIF 3Id/I>

Function block name: L6D-- IEC 60617 graphical symbol:


ANSI number: 87L
IEC 61850 logical node name:
L6CPDIF 3Id/I>

Function block name: LT3D-- IEC 60617 graphical symbol:


ANSI number: 87LT
IEC 61850 logical node name:
LT3CPDIF 3Id/I>

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Differential protection

Function block name: LT6D-- IEC 60617 graphical symbol:


ANSI number: 87LT
IEC 61850 logical node name:
LT6CPDIF 3Id/I>

4.1.1 Introduction

4.1.1.1 Line differential protection, 3 or 6 CT sets (PDIF, 87L)

The line differential function compares the currents entering and leaving the protected
overhead line or cable. It offers phase-segregated true current differential protection
with high sensitivity and provides phase selection information for single-pole
tripping.

The three terminal version is used for conventional two-terminal lines with or without
1 1/2 circuit breaker arrangement in one end, as well as three terminal lines with single
breaker arrangements at all terminals.

Protected zone

RED Comm. Channel RED


670 670

en05000039.vsd

Figure 40: Example of application on a conventional two-terminal line

The six terminal version is used for conventional two-terminal lines with 1 1/2 circuit
breaker arrangements in both ends, as well as multi terminal lines with up to five
terminals.

Protected zone

RED RED
670 Comm. Channel 670

Comm. Channel Comm. Channel


RED
670

en05000040.vsd

Figure 41: Example of application on a three-terminal line with 1 1/2 breaker


arrangements

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Differential protection

The current differential algorithm in RED 670 provides high sensitivity for internal
faults, at the same time as it has excellent stability for external faults. Current samples
from all CTs are exchanged between the IEDs in the line ends (master-master mode)
or sent to one IED (master-slave mode) for evaluation.

A restrained dual biased slope evaluation is made where the bias current is the highest
phase current in any line end giving a secure through fault stability even with heavily
saturated CTs. In addition to the restrained evaluation, an unrestrained high
differential current setting can be used for fast tripping of internal faults with very
high currents.

A special feature with RED 670 is that applications with small power transformers
(rated current less than 50% of differential current setting) connected as line taps
without measurement in the tap can be handled. The normal load current is here
considered to be negligible, and special measures need only to be taken in the event
of a short circuit on the LV side of the transformer. In this application, the tripping
of the differential protection can be time delayed for low differential currents in order
to achieve coordination with down stream over current relays.

A line charging current compensation provides increased sensitivity of the differential


function.

4.1.1.2 Line differential protection 3 or 6 CT sets, with in-zone transformers


(PDIF, 87LT)

One or two power transformers can be included in the line differential protection
zone. Both two- and three-winding transformers are correctly represented with vector
group compensations made in the algorithm. The function includes 2nd and 5th
harmonic restraint and zero sequence current elimination.

Protected zone

RED Comm. Channel RED


670 670

Comm. Channel Comm. Channel


RED
670
en05000042.vsd

Figure 42: Example of application on a three-terminal line with a power


transformer in the protection zone

4.1.1.3 Analog signal transfer for line differential protection (MDIF)

The line differential communication can be arranged as a master-master system or a


master-slave system alternatively. In the former, current samples are exchanged
between all terminals, and an evaluation is made in each terminal. This means that a

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64 kbit/s communication channel is needed between every IED included in the same
line differential protection zone. In the latter, current samples are sent from all slave
IEDs to one master IED where the evaluation is made, and trip signals are sent to the
remote ends when needed. In this system, a 64 kbit/s communication channel is only
needed between the master, and each one of the slave terminals.

Protected zone

RED RED
670 670
Comm.
Channels

RED RED RED


670 670 670

en05000043.vsd

Figure 43: Five terminal line with master-master system

Protected zone

RED RED
670 670

Comm.
Channels

RED RED RED


670 670 670

en05000044.vsd

Figure 44: Five terminal line with master-slave system

Current samples from IEDs located geographically apart from each other, must be
time coordinated so that the current differential algorithm can be executed correctly.
In RED 670 it is possible to make this coordination in two different ways. The echo
method of time synchronizing is normally used whereas for applications where
transmit and receive times can differ, the optional built in GPS receivers shall be used.

The communication link is continuously monitored, and an automatic switchover to


a standby link is possible after a preset time.

4.1.2 Principle of operation

4.1.2.1 Algorithm and logic

In the line differential function, measured current values from local and remote line
ends are evaluated in order to distinguish between internal or external faults, or
undisturbed conditions.

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The local currents are fed to the IED via the Analogue Input Modules and thereafter
they pass the Analog to Digital Converter, see figure 45.

Figure 45: The principle for the line differential function

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The remote currents are received to the IED as samples via a communication link.
When entering the IED, they are processed in the Line Differential Communication
Module (LDCM) where they are time coordinated with the local current samples, and
interpolated in order to be comparable with the local samples.

In the Pre-Processing Block, the real and imaginary parts of the fundamental
frequency phase currents and negative sequence currents are derived. Together with
the current samples, they are then forwarded to the differential function block where
three different analyses are carried out.

The first analysis is the classical differential and bias current evaluation with the
characteristic as seen in figure 46. The line differential function is phase segregated
where the differential current is the vectorial sum of all measured currents taken
separately for each phase. The bias current, on the other hand, is considered as the
greatest phase current in any line end and it is common for all three phases. The two
slopes (SlopeSection1, SlopeSection2) and breakpoints (EndSection1, EndSection2)
can be set in the PCM 600 tool or via the HMI.

Current values plotted above the characteristic formed by IdMin and the dual slope
will give a start in that phase. The level IdMinHigh is a setting value that is used to
temporarily decrease the sensitivity in situations when:

• the line is energized


• when a fault is classified as external
• when a tap transformer is switched in

There is also an unrestrained high differential current setting that can be used for fast
tripping of internal faults with very high currents.

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Differential protection

Operate current
[ in pu of IBase]
Operate
5
unconditionally

UnrestrainedLimit
4

Operate IdMinHigh
3 C
conditionally
A B

2
Section 1 Section 2 Section 3

SlopeSection3
1
IdMin
SlopeSection2 Restrain
0
0 1 2 3 4 5

EndSection1 Restrain current


EndSection2 [ in pu of IBase]

en05000300.vsd

Figure 46: Description of the restrained-, and the unrestrained operate


characteristics

where:

slope = D Ioperate × 100%


D Irestrain
and where the restrained characteristic is defined by the settings:

1. IdMin
2. EndSection1
3. EndSection2
4. SlopeSection2
5. SlopeSection3

The second analysis is the 2nd and 5th harmonic analysis on the differential current.
Occurrence of these harmonics over a level that is set separately for each one will
block tripping action from the biased slope evaluation.

The third analysis is the negative sequence current analysis. Effectively this is a fault
discriminator that distinguishes between internal and external faults. It works such

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that the phase angle of the negative sequence current from the local end is compared
with the phase angle of the sum of the negative sequence currents from the remote
ends. The characteristic for this fault discriminator is shown in figure 47, where the
directional characteristic is defined by the two setting parameters IminNegSeq and
NegSeqRoa.

90 deg
120 deg
If one or the Internal/external
other of fault boundary
currents is too
low, then no
measurement NegSeqROA
is done, and
(Relay
120 degrees
Operate
is mapped Angle)

180 deg 0 deg

IMinNegSeq

External Internal
fault fault
region region

270 deg
en05000188.vsd

Figure 47: Operating characteristic of the internal/external fault discriminator

Reference direction of currents is considered to be towards the line. Thus, when both
currents to be compared have this direction, the phase difference between them will
ideally be zero. In the opposite case, when one current is entering and the other is
leaving the protected object, the phase difference will ideally be 180 degree. In case
either the local or the sum of the remote negative sequence currents or both is below
the set level, the fault discriminator will not make any fault classification and the
value 120 degree is set. This value is then an indication that negative sequence
directional comparison has not been possible to make, and it does not mean
classification as external fault.

When a fault is classified as internal by the negative sequence fault discriminator, a


trip is issued under the condition that the dual slope restrained function has started,
whilst a classification as external fault results in an increase of the restrained
characteristic trip values IdMinHigh.

With reference to figure 45, the outputs from the three analysis blocks are fed to the
output logic. Figure 48 shows a simplified block diagram of this output logic where
only trip commands and no alarm signals are shown for simplicity.

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Figure 48: Simplified block diagram

Remembering that current values plotted above the characteristic formed by IdMin
and the dual slope in figure 47 are said to give a start, the output logic can be
summarized as follows:

• A start in one phase, gives a trip under the condition that the content of 2nd and
5th harmonic is below the set level for these harmonics. Otherwise it is blocked
as long as the harmonic is above the set level. However, when a line is energized

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the current setting value IdMinHigh is used. Effectively this means that the line
A-B-C in figure 46 forms the characteristic.
• Current values above the unrestrained limit gives a trip irrespective of any
presence of harmonics.
• Classification of a fault as internal by the negative sequence fault discriminator,
will give a trip under the condition that a start has occurred in that phase. This
means that any harmonic blocking is then overridden. However, occurrence of
harmonics at the same time as the differential current is below the level
IdMinHigh, will block a trip even though the fault is classified as internal. This
latter condition is to prevent unwanted trips when energizing a line tap
transformer.
• Classification of a fault as external by the negative sequence fault discriminator
will cause IdMinHigh to be used as the lower limit for the restrained characteristic
according to figure 46. Cross blocking will also be activated in this situation.

Compensation for charging currents can be selected active or not by setting


ChargCurEnableYes or No. The compensation works such that the fundamental
frequency differential current that is measured under steady state undisturbed
conditions, is identified and then subtracted making the resulting differential current
zero (or close to zero). This action is made separately for each phase. The magnitude
of the subtracted pre-fault currents in Amperes can be read at any time as the service
value ICHARGE.

Values of the pre-fault differential currents are not updated under disturbance
conditions. The updating process is resumed 50 ms after normal conditions have been
restored. Normal conditions are only considered if there are no start signals, neither
internal nor external fault is declared, the power system is symmetrical, etc.

It is thus obvious that the change in charging current that the fault causes by decreasing
the system voltage is not considered in the algorithm, a matter that is further discussed
in the Application Manual for RED670.

It shall be noted that all small pre-fault differential currents are subtracted, no matter
what their origin. Besides the true charging currents, the following currents are
eliminated:

• Small differential currents due to small errors (inequalities) of current


transformers.
• Small differential currents because of off-nominal On-Load-Tap-Changer
positions when a power transformer is included in the protected zone.
• Load currents of tap loads included in the protected zone.

4.1.2.2 Time synchronization

In a numerical line differential protection, current samples from protections located


geographically apart from each other, must be time coordinated so that the currents
from the different line ends can be compared without introducing irrelevant errors.
Accuracy requirements on this time coordination are extremely high.

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As an example, an inaccuracy of 0.1 ms in a 50 Hz system gives a maximum amplitude


error approximately around 3% whilst an inaccuracy of 1 ms gives a maximum
amplitude error of approximately 31%. The corresponding figures for a 60 Hz system
are 4% and 38% respectively.

In RED670 the time coordination is made with the so-called echo method, which can
be complemented with GPS synchronization as an option.

Each IED has an accurate local clock with a very small time drift. This clock makes
time tagging of telegrams, and the echo method is then used to find out the time
difference between the clocks in two ends of a power line.

Referring to figure 49, it works such that the transmission time to send a message
from station B to station A (T1 → T2) and receive a message from A to B (T3 →
T4) is measured. The time instances T2 and T3 are taken with the local clock reference
of station A, and the time instances T1 and T4 are taken with the local clock reference
of station B.

T2 T3
A

B
T1 T4
en05000293.vsd

Figure 49: Measuring time differences

Calculation of the delay time one-way Td and the time difference Δt between the
clocks in A and B is then possible to do with equation 2 and equation 3, which are
only valid under the condition that the send and receive times are equal.

(T2 - T1 ) + (T4 - T3 )
Td =
2 (Equation 2)

(T1 + T4 ) - (T2 + T3 )
Dt =
2 (Equation 3)

In RED 670 Δt is calculated every time a telegram is received, and the time difference
is then used to adjust and interpolate the current measurements from the remote end
before the current differential algorithm is executed.

The echo method without GPS, can be used in telecommunications transmission


networks with varying signal propagation delay as long as there is delay symmetry
i.e. the send and receive delays are equal. The delay variation can depend on the signal
going different routes in the network from time to other.

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When the delay symmetry is lost, the expression for Δt given above is no longer valid,
and GPS synchronization of the local IED clocks must be used.

Including the optional GPS, means that there will be one GPS receiver module in
each IED, synchronizing its local IED clock. As GPS synchronization is very
accurate, in the order of 1 μs, all IEDs in the same line differential scheme will have
the same clock reference. It is then possible to detect asymmetric transmission time
delay and compensate for it.

When the IED is equipped with GPS, this hardware is integrated in the IED. Besides
the GPS receiver itself, it also consists of filters and regulators for post processing of
the GPS time synch pulse, which is necessary to achieve a reliable GPS
synchronization. Especially short interruptions and spurious out of synch GPS signals
are handled securely in this way.

When GPS synchronization is used, an interruption in the GPS signal leads to


freewheeling during 8 seconds i.e. during this time the synchronization benefits from
the stability in the local clocks. If the interruption persists more than 8 seconds, either
fall back to the echo synchronization method or blocking of the line differential
function is made, as selected through setting parameter GPSSyncErr.

For a description of the time synchronization function, refer to section "Time


synchronization".

4.1.2.3 Analog signal communication for line differential protection

Communication principle
For a two-terminal line, the current from the local CT needs to be communicated over
a 64 kbit/s channel to the remote line end, and the remote end current communicated
back on the same channel. In case of e.g. a three terminal line another 64 kbit/s channel
will be needed to exchange the same local current with the third line end current, etc.

In one-and-a-half breaker arrangements, there are two local currents meaning two 64
kbit/s channels to each remote substation. Alternatively, it is possible to add together
the two local currents before sending them and in that way reduce the number of
communication channels needed. This is achieved by selecting proper setting for
parameter TransmCurr (CT-SUM, CT-DIFF1 or CT-DIFF2). However, by doing it
this way there will be reduced information about bias currents. For further information
and discussions on this matter, refer to the “Application manual” for RED670.

The communication can be arranged as a master-master system or a master-slave


system alternatively. Figure 50 shows a master-master system for a five-terminal line.
Here current samples are exchanged between all terminals, and an evaluation is made
in each terminal. This means that a 64 kbit/s communication channel is needed
between every IED included in the same line differential protection zone.

100 Technical reference manual RED 670


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Differential protection

Protected zone

RED RED
670 670

Comm. Channels

RED RED RED


670 670 670

en05000292.vsd

Figure 50: 5–terminal line with master-master system

In the master-slave system, current samples are sent from all slave IEDs to one master
IED where the evaluation is made and trip signals are sent to the remote ends when
needed. In this system, a 64 kbit/s communication channel is only needed between
the master, and each one of the slave terminals as shown in figure 51.

Protected zone

RED RED
670 670

Comm. Channels

RED RED RED


670 670 670

en05000291.vsd

Figure 51: 5–terminal line with master-slave system

The master-slave configuration is achieved by setting parameter Operation in the


slaves to Off for the line differential function, and setting parameter ChannelMode to
On for the LDCMs in the slaves.

Test mode
The line differential function in one IED can be set in test mode. This will block the
trip outputs on that IED, and set the remote IEDs in a remote test mode, such that
injected currents will be echoed back phase shifted and with a settable amplitude. The
trip outputs in the remote terminals will also be blocked automatically. For further
information on this, refer to the “Installation and Commissioning manual” for
RED670.

Communication of current sampled values


The currents are sampled twenty times per power system cycle in the protection
terminals, but the communication exchange is made only once every 5 ms. This means
that at in each telegram sent, 5 consecutive current samples in a 50 Hz system and 6

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Differential protection

consecutive current samples in a 60 Hz system (three phases each sampling instant)


are included. Figure 52 shows the principle.

Current Current Current Current Current Current Current Current


sample sample sample sample sample sample sample sample
telegram telegram telegram telegram telegram telegram telegram telegram
sent sent sent sent sent sent sent sent

Time
0 5 10 15 20 25 30 35 (ms)

en05000290.vsd

Figure 52: Communication of current sampled values.

where:
x is the current sampling moment

Redundant communication channels


With redundant communication channels, as shown in figure 53, both channels are
in operation continuously but with one of them favoured as a primary channel.

Telecom. Network
LD LD
CM CM
LD LD
CM CM
Telecom. Network

Primary
channel
Secondary redundant
channel en05000289.vsd

Figure 53: Direct fibre optical connection between two terminals with LDOM
over longer distances.

In case communication is lost on the primary channel, switchover to the secondary


channel is made after a settable time delay RedChSwTime. Return of the primary
channel will cause a switchback after another settable time delay RedChRturnTime.

For a three-, four- or five terminal line in a master-master configuration, a loss of one
communication channel will not cause the line differential protection to be
unserviceable. Instead it will automatically revert to a partial master-slave mode with

102 Technical reference manual RED 670


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Differential protection

the two IEDs that have an unserviceable communication link between them, will serve
as slaves.

For more details about the remote communication see Chapter "Remote
communication". See also the “Application manual”.

4.1.2.4 Binary signal transfer

There is space for eight binary signals integrated in the telegram of the line differential
analog communication. For further information about this, refer to section "Binary
signal transfer to remote end".

4.1.3 Function block

L3D--
L3CPDIF
I3P1 TRIP
I3P2 TRL1
I3P3 TRL2
TRL3
TRIPRES
TRIPUNRE
TRIPENHA
START
STL1
STL2
STL3
BLK2H
BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
NSANGLE
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG
ID2HL1
ID2HL2
ID2HL3
ID5HL1
ID5HL2
ID5HL3
IDL1
IDL2
IDL3
ICHARGE

en05000667.vsd

Figure 54: L3D function block

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Differential protection

L6D--
L6CPDIF
I3P1 TRIP
I3P2 TRL1
I3P3 TRL2
I3P4 TRL3
I3P5 TRIPRES
I3P6 TRIPUNRE
TRIPENHA
START
STL1
STL2
STL3
BLK2H
BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
NSANGLE
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG
ID2HL1
ID2HL2
ID2HL3
ID5HL1
ID5HL2
ID5HL3
IDL1
IDL2
IDL3
ICHARGE

en05000666.vsd

Figure 55: L6D function block

104 Technical reference manual RED 670


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Differential protection

LT3D-
LT3CPDIF_87LT
I3P1 TRIP
I3P2 TRL1
I3P3 TRL2
TRL3
TRIPRES
TRIPUNRE
TRIPENHA
START
STL1
STL2
STL3
BLK2H
BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
ALARM
OPENCT
OPENCTAL
IDL1
IDL2
IDL3
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG

en06000254.vsd

Figure 56: LT3D function block

LT6D-
LT6CPDIF_87LT
I3P1 TRIP
I3P2 TRL1
I3P3 TRL2
I3P4 TRL3
I3P5 TRIPRES
I3P6 TRIPUNRE
TRIPENHA
START
STL1
STL2
STL3
BLK2H
BLK2HL1
BLK2HL2
BLK2HL3
BLK5H
BLK5HL1
BLK5HL2
BLK5HL3
ALARM
OPENCT
OPENCTAL
IDL1
IDL2
IDL3
IDL1MAG
IDL2MAG
IDL3MAG
IBIAS
IDNSMAG

en06000255.vsd

Figure 57: LT6D function block

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Differential protection

LDL--
LineDiffLogic
CTFAIL TRIP
OUTSERV TRL1
BLOCK TRL2
TRL3
TRLOCAL
TRLOCL1
TRLOCL2
TRLOCL3
TRREMOTE
DIFLBLKD

en05000394.vsd

Figure 58: LDL function block

4.1.4 Input and output signals

Table 50: Input signals for the L3CPDIF_87L (L3D--) function block
Signal Description
I3P1 Group signal for three phase current channel 1
I3P2 Group signal for three phase current channel 2
I3P3 Group signal for three phase current channel 3

Table 51: Output signals for the L3CPDIF_87L (L3D--) function block
Signal Description
TRIP Common, main, trip output signal
TRL1 Trip signal from phase L1
TRL2 Trip signal from phase L2
TRL3 Trip signal from phase L3
TRIPRES Trip by restrained differential protection
TRIPUNRE Trip by unrestrained differential protection
TRIPENHA Trip by enhanced restrained differential protection
START Common, main, start output signal
STL1 Start signal from phase L1
STL2 Start signal from phase L2
STL3 Start signal from phase L3
BLK2H Common block signal, due to 2nd harmonic
BLK2HL1 Block signal due to 2nd harmonic, phase L1
BLK2HL2 Block signal due to 2nd harmonic, phase L2
BLK2HL3 Block signal due to 2nd harmonic, phase L3
BLK5H Common block signal, due to 5-th harmonic
BLK5HL1 Block signal due to 5th harmonic, phase L1
BLK5HL2 Block signal due to 5th harmonic, phase L2
Table continued on next page

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Differential protection

Signal Description
BLK5HL3 Block signal due to 5th harmonic, phase L3
NSANGLE Angle between local and remote neg. seq. currents
IDL1MAG Magnitude of fund. freq. differential current, phase L1
IDL2MAG Magnitude of fund. freq. differential current, phase L2
IDL3MAG Magnitude of fund. freq. differential current, phase L3
IBIAS Magnitude of the bias current, common for L1, L2, L3
IDNSMAG Magnitude of the negative sequence differential current
ID2HL1 Magnitude of the 2nd harm. diff. current, phase L1
ID2HL2 Magnitude of the 2nd harm. diff. current, phase L2
ID2HL3 Magnitude of the 2nd harm. diff. current, phase L3
ID5HL1 Magnitude of the 5th harm. diff. current, phase L1
ID5HL2 Magnitude of the 5th harm. diff. current, phase L2
ID5HL3 Magnitude of the 5th harm. diff. current, phase L3
IDL1 Instantaneous differential current, phase L1
IDL2 Instantaneous differential current, phase L2
IDL3 Instantaneous differential current, phase L3
ICHARGE Amount of compensated charging current

Table 52: Input signals for the L6CPDIF_87L (L6D--) function block
Signal Description
I3P1 Group signal for three phase current channel 1
I3P2 Group signal for three phase current channel 2
I3P3 Group signal for three phase current channel 3
I3P4 Group signal for three phase current channel 4
I3P5 Group signal for three phase current channel 5
I3P6 Group signal for three phase current channel 6

Table 53: Output signals for the L6CPDIF_87L (L6D--) function block
Signal Description
TRIP Common, main, trip output signal
TRL1 Trip signal from phase L1
TRL2 Trip signal from phase L2
TRL3 Trip signal from phase L3
TRIPRES Trip by restrained differential protection
TRIPUNRE Trip by unrestrained differential protection
TRIPENHA Trip by enhanced restrained differential protection
START Common, main, start output signal
Table continued on next page

RED 670 Technical reference manual 107


1MRK505132-UEN rev. D
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Differential protection

Signal Description
STL1 Start signal from phase L1
STL2 Start signal from phase L2
STL3 Start signal from phase L3
BLK2H Common block signal, due to 2nd harmonic
BLK2HL1 Block signal due to 2nd harmonic, phase L1
BLK2HL2 Block signal due to 2nd harmonic, phase L2
BLK2HL3 Block signal due to 2nd harmonic, phase L3
BLK5H Common block signal, due to 5-th harmonic
BLK5HL1 Block signal due to 5th harmonic, phase L1
BLK5HL2 Block signal due to 5th harmonic, phase L2
BLK5HL3 Block signal due to 5th harmonic, phase L3
NSANGLE Angle between local and remote neg. seq. currents
IDL1MAG Magnitude of fund. freq. differential current, phase L1
IDL2MAG Magnitude of fund. freq. differential current, phase L2
IDL3MAG Magnitude of fund. freq. differential current, phase L3
IBIAS Magnitude of the bias current, common for L1, L2, L3
IDNSMAG Magnitude of the negative sequence differential current
ID2HL1 Magnitude of the 2nd harm. diff. current, phase L1
ID2HL2 Magnitude of the 2nd harm. diff. current, phase L2
ID2HL3 Magnitude of the 2nd harm. diff. current, phase L3
ID5HL1 Magnitude of the 5th harm. diff. current, phase L1
ID5HL2 Magnitude of the 5th harm. diff. current, phase L2
ID5HL3 Magnitude of the 5th harm. diff. current, phase L3
IDL1 Instantaneous differential current, phase L1
IDL2 Instantaneous differential current, phase L2
IDL3 Instantaneous differential current, phase L3
ICHARGE Amount of compensated charging current

Table 54: Input signals for the LT3CPDIF_87L (LT3D-) function block
Signal Description
I3P1 Group signal for three phase current channel 1
I3P2 Group signal for three phase current channel 2
I3P3 Group signal for three phase current channel 3

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Differential protection

Table 55: Output signals for the LT3CPDIF_87L (LT3D-) function block
Signal Description
TRIP Common, main, trip output signal
TRL1 Trip signal from phase L1
TRL2 Trip signal from phase L2
TRL3 Trip signal from phase L3
TRIPRES Trip by restrained differential protection
TRIPUNRE Trip by unrestrained differential protection
TRIPENHA Trip by enhanced restrained differential protection
START Common, main, start output signal
STL1 Start signal from phase L1
STL2 Start signal from phase L2
STL3 Start signal from phase L3
BLK2H Common block signal, due to 2nd harmonic
BLK2HL1 Block signal due to 2nd harmonic, phase L1
BLK2HL2 Block signal due to 2nd harmonic, phase L2
BLK2HL3 Block signal due to 2nd harmonic, phase L3
BLK5H Common block signal, due to 5-th harmonic
BLK5HL1 Block signal due to 5th harmonic, phase L1
BLK5HL2 Block signal due to 5th harmonic, phase L2
BLK5HL3 Block signal due to 5th harmonic, phase L3
NSANGLE Angle between local and remote neg. seq. currents
IDL1MAG Magnitude of fund. freq. differential current, phase L1
IDL2MAG Magnitude of fund. freq. differential current, phase L2
IDL3MAG Magnitude of fund. freq. differential current, phase L3
IBIAS Magnitude of the bias current, common for L1, L2, L3
IDNSMAG Magnitude of the negative sequence differential current
ID2HL1 Magnitude of the 2nd harm. diff. current, phase L1
ID2HL2 Magnitude of the 2nd harm. diff. current, phase L2
ID2HL3 Magnitude of the 2nd harm. diff. current, phase L3
ID5HL1 Magnitude of the 5th harm. diff. current, phase L1
ID5HL2 Magnitude of the 5th harm. diff. current, phase L2
ID5HL3 Magnitude of the 5th harm. diff. current, phase L3
IDL1 Instantaneous differential current, phase L1
IDL2 Instantaneous differential current, phase L2
IDL3 Instantaneous differential current, phase L3
ICHARGE Amount of compensated charging current

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Differential protection

Table 56: Input signals for the LT6CPDIF_87L (LT6D-) function block
Signal Description
I3P1 Group signal for three phase current channel 1
I3P2 Group signal for three phase current channel 2
I3P3 Group signal for three phase current channel 3
I3P4 Group signal for three phase current channel 4
I3P5 Group signal for three phase current channel 5
I3P6 Group signal for three phase current channel 6

Table 57: Output signals for the LT6CPDIF_87L (LT6D-) function block
Signal Description
TRIP Common, main, trip output signal
TRL1 Trip signal from phase L1
TRL2 Trip signal from phase L2
TRL3 Trip signal from phase L3
TRIPRES Trip by restrained differential protection
TRIPUNRE Trip by unrestrained differential protection
TRIPENHA Trip by enhanced restrained differential protection
START Common, main, start output signal
STL1 Start signal from phase L1
STL2 Start signal from phase L2
STL3 Start signal from phase L3
BLK2H Common block signal, due to 2nd harmonic
BLK2HL1 Block signal due to 2nd harmonic, phase L1
BLK2HL2 Block signal due to 2nd harmonic, phase L2
BLK2HL3 Block signal due to 2nd harmonic, phase L3
BLK5H Common block signal, due to 5-th harmonic
BLK5HL1 Block signal due to 5th harmonic, phase L1
BLK5HL2 Block signal due to 5th harmonic, phase L2
BLK5HL3 Block signal due to 5th harmonic, phase L3
NSANGLE Angle between local and remote neg. seq. currents
IDL1MAG Magnitude of fund. freq. differential current, phase L1
IDL2MAG Magnitude of fund. freq. differential current, phase L2
IDL3MAG Magnitude of fund. freq. differential current, phase L3
IBIAS Magnitude of the bias current, common for L1, L2, L3
IDNSMAG Magnitude of the negative sequence differential current
ID2HL1 Magnitude of the 2nd harm. diff. current, phase L1
ID2HL2 Magnitude of the 2nd harm. diff. current, phase L2
ID2HL3 Magnitude of the 2nd harm. diff. current, phase L3
Table continued on next page

110 Technical reference manual RED 670


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Differential protection

Signal Description
ID5HL1 Magnitude of the 5th harm. diff. current, phase L1
ID5HL2 Magnitude of the 5th harm. diff. current, phase L2
ID5HL3 Magnitude of the 5th harm. diff. current, phase L3
IDL1 Instantaneous differential current, phase L1
IDL2 Instantaneous differential current, phase L2
IDL3 Instantaneous differential current, phase L3
ICHARGE Amount of compensated charging current

Table 58: Input signals for the LineDiffLogic (LDL--) function block
Signal Description
CTFAIL CT failure indication from local CT supervision
OUTSERV Input for indicating that the terminal is out of service
BLOCK Block of function

Table 59: Output signals for the LDLPDIF_87L (LDL--) function block
Signal Description
TRIP General trip from differential protection system
TRL1 Trip signal from phase L1
TRL2 Trip signal from phase L2
TRL3 Trip signal from phase L3
TRLOCAL Trip from local differential function
TRLOCL1 Trip from local differential function in phase L1
TRLOCL2 Trip from local differential function in phase L2
TRLOCL3 Trip from local differential function in phase L3
TRREMOTE Trip from remote differential function
DIFLBLKD Local line differential function blocked

4.1.5 Setting parameters

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Differential protection

Table 60: General settings for the L3CPDIF_87L (L3D--) function


Parameter Range Step Default Unit Description
NoOfTerminals 2 - 2 - Number of current
3 terminals of the
protected circuit
Chan2IsLocal No - No - 2-nd local current
Yes connected to input
channel 2, Yes/ No
IBase 50.0 - 9999.9 0.1 3000.0 A Base (reference)
current of the
differential
protection
ZerSeqCurSubtr Off - Off - On/Off for
On elimination of zero
seq. from diff. and
bias curr

Table 61: Parameter group settings for the L3CPDIF_87L (L3D--) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
On
IdMin 0.20 - 2.00 0.01 0.50 IB Oper - restr charact.,
section 1 sensitivity,
multiple IBase
EndSection1 0.20 - 1.50 0.01 1.25 IB End of section 1, as
multiple of reference
current IBase
EndSection2 1.00 - 10.00 0.01 3.00 IB End of section 2, as
multiple of reference
current IBase
SlopeSection2 10.0 - 50.0 0.1 40.0 % Slope in section 2 of
operate-restrain
characteristic, in %
SlopeSection3 30.0 - 100.0 0.1 80.0 % Slope in section 3 of
operate- restrain
characteristic, in %
IdMinHigh 0.20 - 10.00 0.01 1.00 IB Initial lower
sensitivity, as
multiple of IBase
IntervIdMinHig 0.250 - 60.000 0.001 1.000 s Time interval of initial
lower sensitivity, in
sec
IdUnre 1.00 - 50.00 0.01 10.00 IB Unrestrained
differential current
limit, multiple of
IBase
NegSeqDiff Off - On - On/Off selection for
On internal / external
fault discriminator
NegSeqROA 30.0 - 120.0 1.0 60.0 Deg Internal/external
fault discriminator
Operate Angle,
degrees
Table continued on next page

112 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 4
Differential protection

Parameter Range Step Default Unit Description


IMinNegSeq 0.01 - 0.20 0.01 0.04 IB Min. value of neg.
seq. curr. as multiple
of IBase
CrossBlock No - No - On/Off selection of
Yes the cross -block logic
I2/I1Ratio 5.0 - 100.0 1.0 10.0 % Max. ratio of 2nd
harm. to
fundamental harm
dif. curr. in %
I5/I1Ratio 5.0 - 100.0 1.0 25.0 % Max. ratio of 5th
harm. to
fundamental harm
dif. curr. in %
ChargCurEnable Off - Off - On/Off selection for
On compensation of
charging currents
AddDelay Off - Off - On/Off selection for
On delayed diff. trip
command
IMaxAddDelay 0.20 - 5.00 0.01 1.00 IB Below limit, extra
delay can be
applied, multiple of
IBase
DefDelay 0.000 - 6.000 0.001 0.000 s Definite time
additional delay in
seconds
IDMTtMin 0.001 - 6.000 0.001 0.010 s Inverse Delay
Minimum Time. In
seconds
CurveType ANSI Ext. inv. - IEC Def. Time - 19 curve types.
ANSI Very inv. Example: 15 for
ANSI Norm. inv. definite time delay.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
k 0.05 - 1.10 0.01 1.00 - Time Multiplier
Setting (TMS) for
inverse delays
p 0.01 - 1000.00 0.01 0.02 - Settable curve
parameter, user-
programmable curve
type.
Table continued on next page

RED 670 Technical reference manual 113


1MRK505132-UEN rev. D
Section 4
Differential protection

Parameter Range Step Default Unit Description


a 0.01 - 1000.00 0.01 0.14 - Settable curve
parameter, user-
programmable curve
type.
b 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable curve
type.
c 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable curve
type.

Table 62: General settings for the L6CPDIF (L6D--) function


Parameter Range Step Default Unit Description
NoOfTerminals 2 - 2 - Number of current
3 terminals of the
4 protected circuit.
5 Minimum is 2,
6 maximum is 6.
Protection terminals
can be less than
number of current
terminals.
Chan2IsLocal No - No - 2nd current source
Yes connected to input
channel 2, Yes / No
IBase 50.0 - 9999.9 0.1 3000.0 A Base (reference)
current of the
differential
protection
ZerSeqCurSubtr Off - Off - On/Off for
On elimination of zero
seq. from diff. and
bias curr

Table 63: Parameter group settings for the L6CPDIF (L6D--) function
Parameter Range Step Default Unit Description
Operation Off - Off - Differential
On Protection Function
Operation Off/ On
IdMin 0.20 - 2.00 0.01 0.50 IB Oper - restr charact.,
section 1 sensitivity,
multiple IBase
EndSection1 0.20 - 1.50 0.01 1.25 IB End of section 1, as
multiple of reference
current IBase
EndSection2 1.00 - 10.00 0.01 3.00 IB End of section 2, as
multiple of reference
current IBase
Table continued on next page

114 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 4
Differential protection

Parameter Range Step Default Unit Description


SlopeSection2 10.0 - 50.0 0.1 40.0 % Slope in section 2 of
operate-restrain
characteristic, in %
SlopeSection3 30.0 - 100.0 0.1 80.0 % Slope in section 3 of
operate- restrain
characteristic, in %
IdMinHigh 0.20 - 10.00 0.01 1.00 IB Initial lower
sensitivity, as
multiple of IBase
IntervIdMinHig 0.250 - 60.000 0.001 1.000 s Time interval of initial
lower sensitivity, in
sec
IdUnre 1.00 - 50.00 0.01 10.00 IB Unrestrained
differential current
limit, multiple of
IBase
NegSeqDiff Off - On - On/Off selection for
On internal / external
fault discriminator
NegSeqROA 30.0 - 120.0 1.0 60.0 Deg Internal/external
fault discriminator
Operate Angle,
degrees
IMinNegSeq 0.01 - 0.20 0.01 0.04 IB Min. value of neg.
seq. curr. as multiple
of IBase
CrossBlock No - No - On/Off selection of
Yes Cross -block logic
I2/I1Ratio 5.0 - 100.0 1.0 10.0 % Max. ratio of 2nd
harm. to
fundamental harm
dif. curr. in %
I5/I1Ratio 5.0 - 100.0 1.0 25.0 % Max. ratio of 5th
harm. to
fundamental harm
dif. curr. in %
ChargCurEnable Off - Off - On/Off selection for
On compensation of
charging currents
AddDelay Off - Off - On/Off selection for
On delayed diff. trip
command
IMaxAddDelay 0.20 - 5.00 0.01 1.00 IB Below limit, extra
delay can be
applied, multiple of
IBase
DefDelay 0.000 - 6.000 0.001 0.000 s Definite time
additional delay in
seconds
IDMTtMin 0.001 - 6.000 0.001 0.010 s Inverse Delay
Minimum Time. In
seconds
Table continued on next page

RED 670 Technical reference manual 115


1MRK505132-UEN rev. D
Section 4
Differential protection

Parameter Range Step Default Unit Description


CurveType ANSI Ext. inv. - IEC Def. Time - 19 curve types.
ANSI Very inv. Example: 15 for
ANSI Norm. inv. definite time delay.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
k 0.05 - 1.10 0.01 1.00 - Time Multiplier
Setting (TMS) for
inverse delays
p 0.01 - 1000.00 0.01 0.02 - Settable curve
parameter, user-
programmable curve
type.
a 0.01 - 1000.00 0.01 0.14 - Settable curve
parameter, user-
programmable curve
type.
b 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable curve
type.
c 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable curve
type.

Table 64: General settings for the LT3CPDIF_87L (LT3D-) function


Parameter Range Step Default Unit Description
NoOfTerminals 2 - 2 - Number of current
3 terminals of the
protected circuit
Chan2IsLocal No - No - 2-nd local current
Yes connected to input
channel 2, Yes/
No
IBase 50.0 - 9999.9 0.1 3000.0 A Base (reference)
current of the
differential
protection
ZerSeqCurSubtr Off - Off - On/Off for
On elimination of zero
seq. from diff. and
bias curr
Table continued on next page

116 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 4
Differential protection

Parameter Range Step Default Unit Description


TransfAonInpCh No Transf A - No Transf A - Power
1 transformer A
2 applied on input
3 channel X
4
5
6
TraAWind1Volt 1.0 - 9999.9 0.1 130.0 kV Transformer A
rated voltage (kV)
on winding 1 (HV
winding)
TraAWind2Volt 1.0 - 9999.9 0.1 130.0 kV Transformer A
rated voltage (kV)
on winding 2 (LV
winding)
ClockNumTransA 0 [0 deg] - 0 [0 deg] - Transf. A phase
1 [30 deg lag] shift in multiples of
2 [60 deg lag] 30 deg, 5 for 150
3 [90 deg lag] deg
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
ZerSeqPassTraA No - No - Yes/No for
Yes capability of transf
A to transform
zero seq curr
TransfBonInpCh No Transf B - No Transf B - Power
1 transformer B
2 applied on input
3 channel X
4
5
6
TraBWind1Volt 1.0 - 9999.9 0.1 130.0 kV Transformer B
rated voltage (kV)
on winding 1 (HV
winding)
Table continued on next page

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Differential protection

Parameter Range Step Default Unit Description


TraBWind2Volt 1.0 - 9999.9 0.1 130.0 kV Transformer B
rated voltage (kV)
on winding 2 (LV
winding)
ClockNumTransB 0 [0 deg] - 0 [0 deg] - Transf. B phase
1 [30 deg lag] shift in multiples of
2 [60 deg lag] 30 deg, 2 for 60
3 [90 deg lag] deg
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
ZerSeqPassTraB No - No - Yes/No for
Yes capability of transf
B to transform
zero seq curr

Table 65: Parameter group settings for the LT3CPDIF_87L (LT3D-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
On
IdMin 0.20 - 2.00 0.01 0.50 IB Oper - restr charact.,
section 1 sensitivity,
multiple IBase
EndSection1 0.20 - 1.50 0.01 1.25 IB End of section 1, as
multiple of reference
current IBase
EndSection2 1.00 - 10.00 0.01 3.00 IB End of section 2, as
multiple of reference
current IBase
SlopeSection2 10.0 - 50.0 0.1 40.0 % Slope in section 2 of
operate-restrain
characteristic, in %
SlopeSection3 30.0 - 100.0 0.1 80.0 % Slope in section 3 of
operate- restrain
characteristic, in %
IdMinHigh 0.20 - 10.00 0.01 1.00 IB Initial lower
sensitivity, as
multiple of IBase
IntervIdMinHig 0.250 - 60.000 0.001 1.000 s Time interval of initial
lower sensitivity, in
sec
IdUnre 1.00 - 50.00 0.01 10.00 IB Unrestrained
differential current
limit, multiple of
IBase
NegSeqDiff Off - On - On/Off selection for
On internal / external
fault discriminator
Table continued on next page

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1MRK505132-UEN rev. D
Section 4
Differential protection

Parameter Range Step Default Unit Description


NegSeqROA 30.0 - 120.0 1.0 60.0 Deg Internal/external
fault discriminator
Operate Angle,
degrees
IMinNegSeq 0.01 - 0.20 0.01 0.04 IB Min. value of neg.
seq. curr. as multiple
of IBase
CrossBlock No - No - On/Off selection of
Yes the cross -block logic
I2/I1Ratio 5.0 - 100.0 1.0 10.0 % Max. ratio of 2nd
harm. to
fundamental harm
dif. curr. in %
I5/I1Ratio 5.0 - 100.0 1.0 25.0 % Max. ratio of 5th
harm. to
fundamental harm
dif. curr. in %
ChargCurEnable Off - Off - On/Off selection for
On compensation of
charging currents
AddDelay Off - Off - On/Off selection for
On delayed diff. trip
command
IMaxAddDelay 0.20 - 5.00 0.01 1.00 IB Below limit, extra
delay can be
applied, multiple of
IBase
DefDelay 0.000 - 6.000 0.001 0.000 s Definite time
additional delay in
seconds
IDMTtMin 0.001 - 6.000 0.001 0.010 s Inverse Delay
Minimum Time. In
seconds
CurveType ANSI Ext. inv. - IEC Def. Time - 19 curve types.
ANSI Very inv. Example: 15 for
ANSI Norm. inv. definite time delay.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
k 0.05 - 1.10 0.01 1.00 - Time Multiplier
Setting (TMS) for
inverse delays
Table continued on next page

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1MRK505132-UEN rev. D
Section 4
Differential protection

Parameter Range Step Default Unit Description


p 0.01 - 1000.00 0.01 0.02 - Settable curve
parameter, user-
programmable curve
type.
a 0.01 - 1000.00 0.01 0.14 - Settable curve
parameter, user-
programmable curve
type.
b 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable curve
type.
c 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable curve
type.

Table 66: Basic general settings for the LT6CPDIF_87LT (LT6D-) function
Parameter Range Step Default Unit Description
NoOfTerminals 2 - 2 - Number of current
3 terminals of the
4 protected circuit
5
6
Chan2IsLocal No - No - 2-nd local current
Yes connected to input
channel 2, Yes/ No
IBase 50.0 - 9999.9 0.1 3000.0 A Base (reference)
current of the
differential
protection
ZerSeqCurSubtr Off - Off - Off/On for
ON elimination of zero
seq. from diff. and
bias curr
TraAOnInpCh No Transf A - No Transf A - Power transformer
1 A applied on input
2 channel X
3
4
5
6
RatVoltW1TraA 1.0 - 9999.9 0.1 130.0 kV Transformer A
rated voltage (kV)
on winding 1 (HV
winding)
RatVoltW2TraA 1.0 - 9999.9 0.1 130.0 kV Transformer A
rated voltage (kV)
on winding 2 (LV
winding)
Table continued on next page

120 Technical reference manual RED 670


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Section 4
Differential protection

Parameter Range Step Default Unit Description


ClockNumTransA 0 [0 deg] - 0 [0 deg] - Transf. A phase
1 [30 deg lag] shift in multiples of
2 [60 deg lag] 30 deg, 5 for 150
3 [90 deg lag] deg
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
ZerSeqPassTraA No - No - Yes/No for
Yes capability of transf
A to transform zero
seq curr
TraBOnInpCh No Transf B - No Transf B - Power transformer
1 B applied on input
2 channel X
3
4
5
6
RatVoltW1TraB 1.0 - 9999.9 0.1 130.0 kV Transformer B
rated voltage (kV)
on winding 1 (HV
winding)
RatVoltW2TraB 1.0 - 9999.9 0.1 130.0 kV Transformer B
rated voltage (kV)
on winding 2 (LV
winding)
ClockNumTransB 0 [0 deg] - 0 [0 deg] - Transf. B phase
1 [30 deg lag] shift in multiples of
2 [60 deg lag] 30 deg, 2 for 60 deg
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg lag]
7 [210 deg lag]
8 [240 deg lag]
9 [270 deg lag]
10 [300 deg lag]
11 [330 deg lag]
ZerSeqPassTraB No - No - Yes/No for
Yes capability of transf
B to transform zero
seq curr

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Table 67: Basic parameter group settings for the LT6CPDIF_87LT (LT6D-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
ON
IdMin 0.20 - 2.00 0.01 0.30 IB Oper - restr
charact., section 1
sensitivity, multiple
IBase
IdMinHigh 0.20 - 10.00 0.01 0.80 IB Initial lower
sensitivity, as
multiple of IBase
tIdMinHigh 0.000 - 60.000 0.001 1.000 s Time interval of
initial lower
sensitivity, in sec
IdUnre 1.00 - 50.00 0.01 10.00 IB Unrestrained
differential current
limit, multiple of
IBase
NegSeqDiffEn Off - ON - Off/On selection for
ON internal / external
fault discriminator
NegSeqROA 30.0 - 120.0 1.0 60.0 Deg Internal/external
fault discriminator
Operate Angle,
degrees
IMinNegSeq 0.01 - 0.20 0.01 0.04 IB Min. value of neg.
seq. curr. as
multiple of IBase
CrossBlockEn No - No - Off/On selection of
Yes the cross -block
logic
I2/I1Ratio 5.0 - 100.0 1.0 10.0 % Max. ratio of 2nd
harm. to
fundamental harm
dif. curr. in %
I5/I1Ratio 5.0 - 100.0 1.0 25.0 % Max. ratio of 5th
harm. to
fundamental harm
dif. curr. in %
ChargCurEnable Off - Off - Off/On selection for
ON compensation of
charging currents
AddDelay Off - Off - On/Off selection for
ON delayed diff. trip
command
IMaxAddDelay 0.20 - 5.00 0.01 1.00 IB Below limit, extra
delay can be
applied, multiple of
IBase
tDefTime 0.000 - 6.000 0.001 0.000 s Definite time
additional delay in
seconds
tMinInv 0.001 - 6.000 0.001 0.010 s Inverse Delay
Minimum Time. In
seconds
Table continued on next page

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1MRK505132-UEN rev. D
Section 4
Differential protection

Parameter Range Step Default Unit Description


CurveType ANSI Ext. inv. - IEC Def. Time - 19 curve types.
ANSI Very inv. Example: 15 for
ANSI Norm. inv. definite time delay.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
k 0.05 - 1.10 0.01 1.00 - Time Multiplier
Setting (TMS) for
inverse delays
IdiffAlarm 0.05 - 1.00 0.01 0.15 IB Sustained
differential current
alarm, factor of
IBase
tAlarmdelay 0.000 - 60.000 0.001 10.000 s Delay for alarm due
to sustained
differential current,
in s

Table 68: Advanced parameter group settings for the LT6CPDIF_87LT (LT6D-) function
Parameter Range Step Default Unit Description
EndSection1 0.20 - 1.50 0.01 1.25 IB End of section 1, as
multiple of
reference current
IBase
EndSection2 1.00 - 10.00 0.01 3.00 IB End of section 2, as
multiple of
reference current
IBase
SlopeSection2 10.0 - 50.0 0.1 40.0 % Slope in section 2
of operate-restrain
characteristic, in %
SlopeSection3 30.0 - 100.0 0.1 80.0 % Slope in section 3
of operate- restrain
characteristic, in %
p 0.01 - 1000.00 0.01 0.02 - Settable curve
parameter, user-
programmable
curve type.
a 0.01 - 1000.00 0.01 0.14 - Settable curve
parameter, user-
programmable
curve type.
Table continued on next page

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1MRK505132-UEN rev. D
Section 4
Differential protection

Parameter Range Step Default Unit Description


b 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable
curve type.
c 0.01 - 1000.00 0.01 1.00 - Settable curve
parameter, user-
programmable
curve type.
OpenCTEnable Off - ON - Open CTEnable
ON Off/On
tOCTAlarmDelay 0.100 - 10.000 0.001 1.000 s Open CT: time in s
to alarm after an
open CT is
detected
tOCTResetDelay 0.100 - 10.000 0.001 0.250 s Reset delay in s.
After delay, diff.
function is
activated

Table 69: General settings for the LineDiffLogic (LDL--) function


Parameter Range Step Default Unit Description
Operation Off - On - Operation Off / On
On
testModeSet Off - Off - Test mode On/Off
On
ReleaseLocal Block all - Block all - Release of local
Release local terminal for trip
under test mode

4.1.6 Technical data

Table 70: Line differential protection (PDIF, 87L, 87LT)


Function Range or value Accuracy
Minimum operate current (20-200)% of Ibase ± 2.0% of Ir at I £Ir
± 2.0% of I at I >Ir

SlopeSection2 (10.0-50.0)% -
SlopeSection3 (30.0-100.0)% -
EndSection 1 (20–150)% of Ibase -

EndSection 2 (100–1000)% of Ibase -

Unrestrained limit function (100–5000)% of Ibase ± 2.0% of Ir at I ≤ Ir


± 2.0% of I at I > Ir

Second harmonic blocking (5.0–100.0)% of fundamental ± 2.0% of Ir

Fifth harmonic blocking (5.0–100.0)% of fundamental ± 5.0% of Ir

Table continued on next page

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1MRK505132-UEN rev. D
Section 4
Differential protection

Function Range or value Accuracy


Inverse characteristics, see table 19 curve types See table 436 and
436 and table 437 table 437
Operate time 25 ms typically at 0 to 10 x Id -

Reset time 15 ms typically at 10 to 0 x Id -

Critical impulse time 2 ms typically at 0 to 10 x Id -

Charging current compensation On/Off -

4.2 High impedance differential protection (PDIF,


87)

Function block name: HZDx- IEC 60617 graphical symbol:


ANSI number: 87
IEC 61850 logical node name:
HZPDIF IdN

4.2.1 Introduction
The high impedance differential protection can be used when the involved CT cores
have same turn ratio and similar magnetizing characteristic. It utilizes an external
summation of the phases and neutral current and a series resistor and a voltage
dependent resistor externally to the relay.

4.2.2 Principle of operation


The high impedance differential function is based on one current input with external
stabilizing resistors and voltage dependent resistors. Three functions can be used to
provide a three phase differential protection function. The stabilizing resistor value
is calculated from the relay operating value UR calculated to achieve through fault
stability. The supplied stabilizing resistor has a link to allow setting of the correct
resistance value.

4.2.2.1 Logic diagram

The logic diagram see figure 59 shows the operation principles for the high impedance
differential protection function. It is a basically a simple one step relay with an
additional lower alarm level. The function can be totally blocked totally or only
tripping by activating inputs from external signals.

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1MRK505132-UEN rev. D
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Differential protection

Figure 59: Logic diagram for High impedance differential protection.

4.2.3 Function block


HZD1-
HZPDIF_87
ISI TRIP
BLOCK ALARM
BLKTR MEASVOLT

en05000363.vsd

Figure 60: HZD function block

4.2.4 Input and output signals

Table 71: Input signals for the HZPDIF_87 (HZD1-) function block
Signal Description
ISI Group signal for current input
BLOCK Block of function
BLKTR Block of trip

Table 72: Output signals for the HZPDIF_87 (HZD1-) function block
Signal Description
TRIP Trip signal
ALARM Alarm signal
MEASVOLT Measured RMS voltage on CT secondary side

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1MRK505132-UEN rev. D
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4.2.5 Setting parameters

Table 73: Parameter group settings for the HZPDIF_87 (HZD1-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
On
U>Alarm 2 - 500 1 10 V Alarm voltage level in
volts on CT
secondary side
tAlarm 0.000 - 60.000 0.001 5.000 s Time delay to activate
alarm
U>Trip 5 - 900 1 100 V Operate voltage level
in volts on CT
secondary side
SeriesResistor 10 - 20000 1 250 ohm Value of series
resistor in Ohms

4.2.6 Technical data

Table 74: High impedance differential protection (PDIF, 87)


Function Range or value Accuracy
Operate voltage (20-400) V ± 1.0% of Ur for U < Ur
± 1.0% of U for U > Ur

Reset ratio >95% -


Maximum continuous voltage U>Trip2/series resistor ≤200 W -

Operate time 10 ms typically at 0 to 10 x Ud -

Reset time 90 ms typically at 10 to 0 x Ud -

Critical impulse time 2 ms typically at 0 to 10 x Ud -

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1MRK505132-UEN rev. D
128
Section 5
Distance protection

Section 5 Distance protection

About this chapter


This chapter describes distance protection and associated functions. It includes
function blocks, logic diagrams and data tables with information about distance
protection, automatic switch onto fault, weak end in-feed and other associated
functions. Quadrilateral characteristics are also covered.

5.1 Distance protection zones (PDIS, 21)

Function block name: ZMx-- IEC 60617 graphical symbol:


ANSI number: 21
IEC 61850 logical node name:
ZMQPDIS

5.1.1 Introduction
The line distance protection is a three zone full scheme protection with three fault
loops for phase to phase faults and three fault loops for phase to earth fault for each
of the independent zones. Individual settings for each zone resistive and reactive reach
gives flexibility for use onoverhead lines and cables of different types and lengths.

The function has a functionality for load encroachment which increases the possibility
to detect high resistive faults on heavily loaded lines(see figure 61).

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1MRK505132-UEN rev. D
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Distance protection

Forward
operation

Reverse
operation

en05000034.vsd

Figure 61: Typical distance protection zone with load encroachment function
activated

The independent measurement of impedance for each fault loop together with a
sensitive and reliable built in phase selection makes the function suitable in
applications with single phase auto-reclosing.

Built-in adaptive load compensation algorithm prevents overreaching of zone1 at load


exporting end at phase-to-earth faults on heavily loaded power lines.

The distance protection zones can operate, independent of each other, in directional
(forward or reverse) or non-directional mode. This makes them suitable, together with
different communication schemes, for the protection of power lines and cables in
complex network configurations, such as parallel lines, multi-terminal lines etc.

5.1.2 Principle of operation

5.1.2.1 Full scheme measurement

The execution of the different fault loops within the IED670 are of full scheme type,
which means that each fault loop for phase to earth faults and phase to phase faults
for forward and reverse faults are executed in parallel.

Figure 62 presents an outline of the different measuring loops for the basic five,
impedance-measuring zones l.

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1MRK505132-UEN rev. D
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Distance protection

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 1

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 2

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 3

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 4

L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 5

en05000458.vsd

Figure 62: The different measuring loops at line-earth fault and phase-phase
fault.

The use of full scheme technique gives faster operation time compared to switched
schemes which mostly uses a start element to select correct voltages and current
depending on fault type. Each distance protection zone performs like one independent
distance protection relay with six measuring elements.

5.1.2.2 Impedance characteristic

The distance measuring zone include six impedance measuring loops; three intended
for phase-to-earth faults, and three intended for phase-to-phase as well as three-phase
faults.

The distance measuring zone will essentially operate according to the non-directional
impedance characteristics presented in figure 63 and figure 64. The phase-to-earth
characteristic is illustrated with the full loop reach while the phase-to-phase
characteristic presents the per-phase reach.

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Distance protection

RFPE R1+Rn RFPE

X0 - X1
Xn =
3
X1+Xn R0 - R1
Rn =
3
f N f N
R (Ohm/loop)

RFPE RFPE

X1+Xn

RFPE R1+Rn RFPE


en05000661.vsd

Figure 63: Characteristic for the phase-to-earth measuring loops, ohm/loop


domain.

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1MRK505132-UEN rev. D
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Distance protection

X (Ohm/phase)

RFPP 2·R1 RFPP

2·X1

R (Ohm/phase)

RFPP RFPP

2·X1

RFPP 2·R1 RFPP


en05000662.vsd

Figure 64: Characteristic for the phase-to-phase measuring loops

The fault loop reach with respect to each fault type may also be presented as in
figure 65. Note in particular the difference in definition regarding the (fault) resistive
reach for phase-to-phase faults and three-phase faults.

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1MRK505132-UEN rev. D
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Distance protection

ILn R1 + j X1
Phase-to-earth
UL1
element

Phase-to-earth
fault in phase L1 RFPE
(Arc + tower
resistance)

0
IN (R0-R1)/3 +
j (X0-X1)/3 )

IL1 R1 + j X1 Phase-to-phase
UL1 element L1-L2
Phase-to-phase
fault in phase RFPP
L1-L2 IL2
UL2 (Arc resistance)
R1 + j X1

IL1 R1 + j X1 0.5´RFPP Phase-to-phase


UL1 element L1-L3
Three-phase
fault
IL3
UL3
R1 + j X1 0.5´RFPP
en05000181.vsd

Figure 65: Fault loop model

where:
n designates anyone of the three phases (1, 2 or 3) and
m represents the phase that is leading phase n with 120 degrees (i.e. 3, 1 or 2).

The R1 and jX1 in figure 65 represents the positive sequence impedance from the
measuring point to the fault location. The RFPE and RFPP is the eventual fault
resistance in the fault place.

Regarding the illustration of three-phase fault in figure 65, there is of course fault
current flowing also in the third phase during a three-phase fault. The illustration
merely reflects the loop measurement, which is made phase-to-phase.

The theoretical parameters p and q outline the area of operation in quadrant 1 when
varied from 0 to 1.0. That is, for any combination of p and q, where both are between
0 and 1.0, the corresponding impedance is within the reach of the characteristic.

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The zone may be set to operate in Non-directional, Forward or Reverse direction


through the setting OperationDir. The result from respective set value is illustrated
in figure 66. It may be convenient to once again mention that the impedance reach is
symmetric, in the sense that it is conform for forward and reverse direction. Therefore,
all reach settings apply to both directions.

X X X

R R R

Non-directional Forward Reverse

en05000182.vsd

Figure 66: Directional operating modes of the distance measuring zone

5.1.2.3 Minimum operating current

The operation of the distance measuring zone is blocked if the magnitude of input
currents fall below certain threshold values.

The phase-to-earth loop Ln is blocked if ILn < IMinOpPE.

For zone 1 with load compensation feature the additional criterion applies, that all
phase-to-earth loops will be blocked when IN < IMinOpIN, regardless of the phase
currents.

ILn is the RMS value of the current in phase Ln. IN is the RMS value of the vector
sum of the three phase currents, i.e. residual current 3I0.

The phase-to-phase loop LmLn is blocked if ILmLn < IMinOpPP.

ILmLn is the RMS value of the vector difference between phase currents Lm and Ln.

All three current limits IminOpPE, IminOpIN and IMinOpPP are


automatically reduced to 75% of regular set values if the zone is set
to operate in reverse direction, i.e. OperationDir=Reverse.

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Distance protection

5.1.2.4 Measuring principles

Fault loop equations use the complex values of voltage, current, and changes in the
current. Apparent impedances are calculated and compared with the set limits. The
calculation of the apparent impedances at ph-ph faults follows equation 4 (example
for a phase L1 to phase L2 fault).

UL1 – UL2
Zapp = -------------------------
I L1 – IL2
(Equation 4)

Here U and I represent the corresponding voltage and current phasors in the respective
phase Ln (n = 1, 2, 3)

The earth return compensation applies in a conventional manner to ph-E faults


(example for a phase L1 to earth fault) according to equation 6.

U L1
Z app = ------------------------------
I L1 + I N × KN
(Equation 5)

Where:
UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED
KN is defined as:

X0 - X1
KN =
3X1

where X0 and X1 is zero and positive sequence reactance from the measuring point
to the fault on the protected line.

Here IN is a phasor of the residual current in relay point. This results in the same
reach along the line for all types of faults.

The apparent impedance is considered as an impedance loop with resistance R and


reactance X.

The formula given in equation 6 is only valid for no loaded radial feeder applications.
When load is considered in the case of single line to earth fault, conventional distance
protection might overreach at exporting end and underreach at importing end. REx670
has an adaptive load compensation which increases the security in such applications.

Measuring elements receive current and voltage information from the A/D converter.
The check sums are calculated and compared, and the information is distributed into
memory locations. For each of the six supervised fault loops, sampled values of
voltage (U), current (I), and changes in current between samples (DI) are brought
from the input memory and fed to a recursive Fourier filter.

The filter provides two orthogonal values for each input. These values are related to
the loop impedance according to equation 7,

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1MRK505132-UEN rev. D
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Distance protection

X Di
U = R × i + ------ × -----
w 0 Dt
(Equation 7)

in complex notation, or:

X D Re ( I )
Re ( U ) = R × Re ( I ) + ------ × ------------------
w0 Dt
(Equation 8)

X DIm ( I )
Im ( U ) = R × Im ( I ) + ------ × -----------------
w0 Dt
(Equation 9)

with

w0 = 2 × p × f 0
(Equation 10)

where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f0 designates the rated system frequency

The algorithm calculates Rm measured resistance from the equation for the real value
of the voltage and substitute it in the equation for the imaginary part. The equation
for the Xm measured reactance can then be solved. The final result is equal to:

Im ( U ) × DRe ( I ) – Re ( U ) × D Im ( I )
R m = ------------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – D Im ( I ) × Re ( I )
(Equation 11)

Re ( U ) × Im ( I ) – Im ( U ) × Re ( I )
Xm = w 0 × Dt × -------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – DIm ( I ) × Re ( I )
(Equation 12)

The calculated Rm and Xm values are updated each sample and compared with the set
zone reach. The adaptive tripping counter counts the number of permissive tripping
results. This effectively removes any influence of errors introduced by the capacitive
voltage transformers or by other factors.

The directional evaluations are performed simultaneously in both forward and reverse
directions, and in all six fault loops. Positive sequence voltage and a phase locked
positive sequence memory voltage are used as a reference. This ensures unlimited
directional sensitivity for faults close to the relay point.

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5.1.2.5 Directional lines

The evaluation of the directionality is taken place in the function block ZD.
Equation 13 and equation 14 are used to classify that the fault is in forward direction
for line-to-earth fault and phase-phase fault.

0.8 × U1L1 + 0.2 × U1L1M


-ArgDir < arg ------------------------------------------------------------ < ArgNegRes
IL1 (Equation 13)

For the L1-L2 element, the equation in forward direction is according to.

0.8 × U1L1L2 + 0.2 × U1L1L2M


-ArgDir < arg ----------------------------------------------------------------------- < ArgNegRes
I L1L2 (Equation 14)

where:
ArgDir is the setting for the lower boundary of the forward directional characteristic, by default set
to 15 (= -15 degrees) and
ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default
set to 115 degrees, see figure 67.
U1L1 is positive sequence phase voltage in phase L1

U1L1M is positive sequence memorized phase voltage in phase L1

IL1 is phase current in phase L1

U1L1L2 is voltage difference between phase L1 and L2 (L2 lagging L1)

U1L1L2M is memorized voltage difference between phase L1 and L2 (L2 lagging L1)

IL1L2 is current difference between phase L1 and L2 (L2 lagging L1)

The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees
respectively.(see figure 67) and it should not be changed unless system studies has
shown the necessity.

The ZD gives a binary coded signal on the output STDIR depending on the evaluation
where STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4 etc.

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ArgNegRes

ArgDir
R

en05000722.vsd

Figure 67: Setting angles for discrimination of forward and reverse fault

The reverse directional characteristic is equal to the forward characteristic rotated by


180 degrees.

The polarizing voltage is available as long as the positive-sequence voltage exceeds


4% of the set base voltage UBase. So the directional element can use it for all
unsymmetrical faults including close-in faults.

For close-in three-phase faults, the U1L1M memory voltage, based on the same
positive sequence voltage, ensures correct directional discrimination.

The memory voltage is used for 100 ms or until the positive sequence voltage is
restored.

After 100 ms, the following occurs:

• If the current is still above the set value of the minimum operating current
(between 10 and 30% of the set terminal rated current IBase), the condition seals
in.

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• If the fault has caused tripping, the trip endures.


• If the fault was detected in the reverse direction, the measuring element in
the reverse direction remains in operation.
• If the current decreases below the minimum operating value, the memory resets
until the positive sequence voltage exceeds 10% of its rated value.

5.1.2.6 Simplified logic diagrams

Distance protection zones


The design of distance protection zone 1 is presented for all measuring loops: phase-
to-earth as well as phase-to-phase.

Phase-to-earth related signals are designated by LnE, where n represents the


corresponding phase number (L1E, L2E, and L3E). The phase-to-phase signals are
designated by LnLm, where n and m represent the corresponding phase numbers
(L1L2, L2L3, and L3L1).

Fulfillment of two different measuring conditions is necessary to obtain the one


logical signal for each separate measuring loop:

• Zone measuring condition, which follows the operating equations described


above.
• Group functional input signal (STCND), as presented in figure 68.

The STCND input signal represents a connection of six different integer values from
the phase selection function within the IED, which are converted within the zone
measuring function into corresponding boolean expressions for each condition
separately. It is connected to the PHS function block output STCDZ.

The internal input signal DIRCND is used to give condition for directionality for the
distance measuring zones. The signal contains binary coded information for both
forward and reverse direction. The zone measurement function filter out the relevant
signals on the STDIR input depending on the setting of the parameter
OperationDir. It shall be configured to the STDIR output on the ZD block.

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Figure 68: Conditioning by a group functional input signal STCND

Composition of the phase starting signals for a case, when the zone operates in a non-
directional mode, is presented in figure 69.

Figure 69: Composition of starting signals in non-directional operating mode

Results of the directional measurement enter the logic circuits, when the zone operates
in directional (forward or reverse) mode, see figure 70.

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STNDL1N
AND
DIRL1N
OR STZMPE.
&
STNDL2N
DIRL2N AND

STNDL3N 15 ms
OR STL1
& t
DIRL3N AND

STNDL1L2
DIRL1L2 AND 15 ms
OR STL2
& t
STNDL2L3
DIRL2L3 AND
15 ms
OR STL3
STNDL3L1 & t
DIRL3L1 AND

OR STZMPP
&
BLK

15 ms
OR START
& t

en05000778.vsd

Figure 70: Composition of starting signals in directional operating mode

Tripping conditions for the distance protection zone one are symbolically presented
in figure 71.

Figure 71: Tripping logic for the distance protection zone one

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5.1.3 Function block

ZM01-
ZMQPDIS
I3P TRIP
U3P TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND

en05000695.vsd

Figure 72: ZM function block

ZD01-
ZDRDIR
I3P STDIR
U3P

en05000681.vsd

Figure 73: ZD function block

5.1.4 Input and output signals

Table 75: Input signals for the ZMQPDIS_21 (ZM01-) function block
Signal Description
I3P Group signal for current input
U3P Group signal for voltage input
BLOCK Block of function
VTSZ Blocks all output by fuse failure signal
BLKTR Blocks all trip outputs
STCND External start condition (loop enabler)
DIRCND External directional condition

Table 76: Output signals for the ZMQPDIS_21 (ZM01-) function block
Signal Description
TRIP General Trip, issued from any phase or loop
TRL1 Trip signal from phase L1
TRL2 Trip signal from phase L2
TRL3 Trip signal from phase L3
Table continued on next page

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Signal Description
START General Start, issued from any phase or loop
STL1 Start signal from phase L1
STL2 Start signal from phase L2
STL3 Start signal from phase L3
STND Non-directional start, issued from any phase or loop

Table 77: Input signals for the ZDRDIR (ZD01-) function block
Signal Description
I3P Group connection
U3P Group connection

Table 78: Output signals for the ZDRDIR (ZD01-) function block
Signal Description
STDIR All start signals binary coded

5.1.5 Setting parameters

Table 79: Parameter group settings for the ZMQPDIS_21 (ZM01-) function
Parameter Range Step Default Unit Description
Operation Off - On - Operation Off / On
On
IBase 1 - 99999 1 3000 A Base current, i.e.
rated current
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage, i.e.
rated voltage
OperationDir Off - Forward - Operation mode of
Non-directional directionality NonDir /
Forward Forw / Rev
Reverse
X1 0.10 - 3000.00 0.01 30.00 ohm/p Positive sequence
reactance reach
R1 0.10 - 1000.00 0.01 5.00 ohm/p Positive seq.
resistance for zone
characteristic angle
X0 0.10 - 9000.00 0.01 100.00 ohm/p Zero sequence
reactance reach
R0 0.50 - 3000.00 0.01 15.00 ohm/p Zero seq. resistance
for zone characteristic
angle
RFPP 1.00 - 3000.00 0.01 30.00 ohm/l Fault resistance
reach in ohm/loop,
Ph-Ph
Table continued on next page

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Parameter Range Step Default Unit Description


RFPE 1.00 - 9000.00 0.01 100.00 ohm/l Fault resistance
reach in ohm/loop,
Ph-E
OperationPP Off - On - Operation mode Off /
On On of Phase-Phase
loops
Timer tPP Off - On - Operation mode Off /
On On of Zone timer, Ph-
Ph
tPP 0.000 - 60.000 0.001 0.000 s Time delay of trip, Ph-
Ph
OperationPE Off - On - Operation mode Off /
On On of Phase-Earth
loops
Timer tPE Off - On - Operation mode Off /
On On of Zone timer, Ph-
E
tPE 0.000 - 60.000 0.001 0.000 s Time delay of trip, Ph-
E
IMinOpPP 10 - 30 1 20 %IB Minimum operate
delta current for
Phase-Phase loops
IMinOpPE 10 - 30 1 20 %IB Minimum operate
phase current for
Phase-Earth loops
IMinOpIN 5 - 30 1 5 %IB Minimum operate
residual current for
Phase-Earth loops

Table 80: Parameter group settings for the ZDRDIR (ZD01-) function
Parameter Range Step Default Unit Description
ArgNegRes 90 - 175 1 115 Deg Angle to blinder in
second quadrant for
forward direction
ArgDir 5 - 45 1 15 Deg Angle to blinder in
fourth quadrant for
forward direction
IMinOp 1 - 99999 1 10 %IB Minimum operate
current in % of IBase
IBase 1 - 99999 1 3000 A Base Current
UBase 0.05 - 2000.00 0.05 400.00 kV Base Voltage

5.1.6 Technical data

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Table 81: Distance protection zones (PDIS, 21)


Function Range or value Accuracy
Number of zones 3 with selectable direction -
Minimum operate current (10-30)% of Ibase -

Positive sequence reactance (0.50-3000.00) W/phase ± 2.0% static accuracy


± 2.0 degrees static angular
Positive sequence resistance (0.10-1000.00) Ω/phase accuracy
Zero sequence reactance (0.50-9000.00) Ω/phase Conditions:
Voltage range: (0.1-1.1) x Ur
Zero sequence resistance (0.50-3000.00) Ω/phase Current range: (0.5-30) x Ir
Fault resistance, Ph-E (1.00-9000.00) W/loop Angle: at 0 degrees and 85
degrees
Fault resistance, Ph-Ph (1.00-3000.00) W/loop
Dynamic overreach <5% at 85 degrees measured with -
CVT’s and 0.5<SIR<30
Impedance zone timers (0.000-60.000) s ± 0.5% ± 10 ms
Operate time 24 ms typically -
Reset ratio 105% typically -
Reset time 30 ms typically -

5.2 Phase selection with load encroachment


(PDIS, 21)

Function block name: PHS-- IEC 60617 graphical symbol:


ANSI number: 21
IEC 61850 logical node name:
FDPSPDIS Z<phs

5.2.1 Introduction
The operation of transmission networks today is in many cases close to the stability
limit. Due to environmental considerations the rate of expansion and reinforcement
of the power system is reduced e.g. difficulties to get permission to build new power
lines. The ability to accurate and reliable classifying the different types of fault so
that single pole tripping and auto-reclosing can be used plays an important roll in this
matter. The PHS function is designed to accurate select the proper fault loop in the
distance function dependent on the fault type.

The heavy load transfer that is common in many transmission networks may in some
cases be in opposite to the wanted fault resistance coverage. Therefore the function
has an built in algorithm for load encroachment, which gives the possibility to enlarge

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the resistive setting of both the PHS and the measuring zones without interfering with
the load.

The extensive output signals from the PHS gives also important information about
faulty phase(s) which can be used for fault analysis.

5.2.2 Principle of operation


The basic impedance algorithm for the operation of the phase-selection measuring
elements is the same as for the distance-measuring function (see section "Distance
protection zones (PDIS, 21)"). The "phase selection" includes six impedance
measuring loops; three intended for phase-to-earth faults, and three intended for
phase-to-phase as well as for three-phase faults.

The difference, compared to the zone measuring elements, is in the combination of


the measuring quantities (currents and voltages) for different types of faults.

The characteristic is basically non-directional, but the PHS function uses information
from the directional function block to discriminate whether the fault is in forward or
reverse. The directional lines are drawn as "line-dot-dot-line" in the figures below.

The start condition STCNDZ is essentially based on the following criteria:

1. Residual current criteria, i.e. separation of faults with and without earth
connection
2. Regular quadrilateral impedance characteristic
3. Load encroachment characteristics is always active but can be switched off by
selecting a high setting.

The current start condition STCNDI is based on the following criteria:

1. Residual current criteria


2. No quadrilateral impedance characteristic. The impedance reach outside the load
area is theoretically infinite. The practical reach, however, will be determined by
the minimum operating current limits.
3. Load encroachment characteristic is always active, but can be switched off by
selecting a high setting.

The STCNDI-output described above is non-directional. The directionality is


determined by the distance zones direction function block. There are still output from
the function that indicate whether a start is in forward or reverse direction, or in
between those (e.g. STFWL1 and STRVL1, and NDIR_A). These directional
indications are based on the sector boundaries of the directional function and the
impedance setting of the phase selection function. Their operate characteristics are
illustrated in figure 74.

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X X X

60°
60° R
R R

60° 60°

Non-directional (ND) Forward (FW) Reverse (RV)

en05000668.vsd

Figure 74: Characteristic for non-directional, forward and reverse operation of


PHS

The setting of the load encroachment function may influence the total operating
characteristic, (for more information, refer to section "Load encroachment").

The input DIRCND contains binary coded information about the directional coming
from the directionality block. It shall be connected to the STDIR output on the ZD
block. This information is also transferred to the input DIRCND on the distance
measuring zones, i.e. the ZM block. The code built up for the directionality is as
follows:

STDIR= STFWL1*1+STFWL2*2+STFWL3*4+STFWL1L2*8+
+STFWL2L3*16+STFWL3L1*32+STRVL1*64+STRVL2*128+
+STRVL3*256+STRVL1L2*512+STRVL2L3*1024+STRVL3L1*2048

If the binary information is 1 then it will be considered that we have start in forward
direction in phase L1. If the binary code is 5 then we have start in forward direction
in phase L1 and L2 etc.

The STCND (Z or I) output contains, in a similar way as DIRCND, binary coded


information, in this case information about the condition for opening correct fault
loop in the distance measuring element. It shall be connected to the STCND input on
the ZM blocks. The code built up for release of the measuring fault loops is as follows:

STCND = L1N*1 + L2N*2 + L3N*4 + L1L2*8 + L2L3*16 + L3L1*32

5.2.2.1 Phase-to-earth fault

For a phase-to-earth fault, the measured impedance by PHS function will be according
to equation 15.

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ULn
ZPHSn =
ILn
(Equation 15)

where:
n corresponds to the particular phase (n=1, 2 or 3)

The characteristic for the PHS function at phase to earth fault is according to
figure 75. The characteristic has a fixed angle for the resistive boundary in the first
quadrant of 60°.

The resistance RN and reactance XN is the impedance in the earth return path defined
according to equation 16 and equation 17.

R0 - R1
RN =
3
(Equation 16)

X 0 - X1
XN =
3
(Equation 17)

X (ohm/loop)
Kr·(X1+XN)

RFRvPE RFFwPE

X1+XN

60 deg
RFFwPE

RFRvPE R (Ohm/loop)
60 deg

X1
1
Kr =
tan(60 deg)

RFRvPE RFFwPE

Kr·(X1+XN)
en06000396.vsd

Figure 75: Characteristic of PHS for phase to earth fault (setting parameters in
italic), ohm/loop domain

Besides this, the 3I0 residual current must fulfil the conditions according to
equation 18 and equation 19.

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3 × I 0 ³ 0.5 × IM in O p
(Equation 18)

3 × I0 ³ INReleasePE
------------------------------------ × Iphmax
100 (Equation 19)

where:
IMinOp is the minimum operation current for forward zones,
INReleasePE is the setting for the minimum residual current needed to enable operation in the ph-E
fault loops (in %) and
Iphmax is the maximum phase current in any of three phases.

5.2.2.2 Phase-to-phase fault

For a phase-to-phase fault, the measured by the PHS function will be according to
equation 20.

ULm - ULn
ZPHS =
-2 × ILn
(Equation 20)

ULm is the leading phase voltage, ULn the lagging phase voltage and ILn the phase
current in the lagging phase n.

The operation characteristic is shown in figure 76.

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X (ohm/phase)
0.5·FRvPP 0.5·RFFwPP

Kr·X1

X1
0.5·RFFwPP
60 deg

R (ohm/phase)
60 deg
0.5·RFRvPP
X1
1
Kr =
tan(60 deg)

Kr·X1

0.5·RFRvPP 0.5·RFFwPP
en05000670.vsd

Figure 76: The operation characteristic for PHS at phase-to-phase fault (setting
parameters in Italic), ohm/phase domain

In the same way as the condition for phase-to-earth fault, there are current conditions
that have to be fulfilled in order to release the phase-to-phase loop. Those are
according to equation 21 or equation 22.

3I 0 < IN Re leasePE
(Equation 21)

3I 0 < INBlockPP × Iph max


(Equation 22)

where:
INRelease is 3I0 limit for releasing phase-to-earth measuring loops,
INBlockPP is 3I0 limit for blocking phase-to-phase measuring loop and
Iphmax is maximal magnitude of the phase currents.

5.2.2.3 Three phase faults

The operation condition for three phase faults are the same as for phase-to-phase fault
i.e. equation 20, equation 21 and equation 22 are used to release the operation of the
function.

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However, the reach is expanded by a factor 2/√3 (approximately 1.1547) in all


directions. At the same time the apparent impedance is rotated 30 degrees, counter-
clockwise. The characteristic is shown in figure 77.

X (ohm/phase)

4 × X1
3

90 deg

0.5·RFFwPP·K3

X1·K3 4 × RFFwPP
6

R (ohm/phase)

0.5·RFRvPP·K3

K3 = 2 / sqrt(3)
30 deg

en05000671.vsd

Figure 77: The characteristic of PHS for three phase fault (setting parameters
in italic)

5.2.2.4 Load encroachment

Each of the six measuring loops has its own load (encroachment) characteristic based
on the corresponding loop impedance. The load encroachment functionality is always
active, but can be switched off by selecting a high setting.

The outline of the characteristic is presented in figure 78. As illustrated, the resistive
blinders are set individually in forward and reverse direction while the angle of the
sector is the same in all four quadrants.

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RLdFw
ARGLd ARGLd
R

ARGLd ARGLd
RLdRv

en05000196.vsd

Figure 78: Characteristic of load encroachment function

The influence of load encroachment function depending on the operation


characteristic is dependent on the chosen operation mode of the PHS function. When
selection mode is STCNDZ, the characteristic for the PHS (and also zone
measurement depending on settings) will be reduced by the load encroachment
characteristic (see figure 79, left illustration).

When STCNDI is selected the operation characteristic will be as the right illustration
in figure 79. The reach will in this case be limit by the minimum operation current
and the distance measuring zones.

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X X

R R

STCNDZ STCNDI

en05000197.vsd

Figure 79: Difference in operating characteristic depending on operation mode


when load encroachment is activated

When the "phase selection" is set to operate together with a distance measuring zone
the resultant operate characteristic could look something like in figure 80. The figure
shows a distance measuring zone operating in forward direction. Thus, the operate
area is highlighted in black.

"Phase selection"
"quadrilateral" zone

Distance measuring zone

Load encroachment
characteristic

Directional line

en05000673.vsd

Figure 80: Operation characteristic in forward direction when load


encroachment is enabled

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Figure 80 is valid for phase-to-earth as well as phase-to-phase faults. During a three-


phase fault, or load, when the "quadrilateral" phase-to-phase characteristic is subject
to enlargement and rotation the operate area is transformed according to figure 81.
Notice in particular what happens with the resistive blinders of the "phase selection"
"quadrilateral" characteristic. Due to the 30-degree rotation, the angle of the blinder
in quadrant one is now 90 degrees instead of the original 60 degrees. The blinder that
is nominally located to quadrant four will at the same time tilt outwards and increase
the resistive reach around the R-axis. Consequently, it will be more or less necessary
to use the load encroachment characteristic in order to secure a margin to the load
impedance.

X (ohm/phase)

Phase selection
”Quadrilateral” zone

Distance measuring zone

R (ohm/phase)

en05000674.vsd

Figure 81: Operation characteristic for PHS in forward direction for three-phase
fault, ohm/phase domain

5.2.2.5 Minimum operate currents

The operation of the PHS function is blocked if the magnitude of input currents falls
below certain threshold values.

The phase-to-earth loop Ln is blocked if ILn<IMinOpPE, where ILn is the RMS value
of the current in phase Ln.

The phase-to-phase loop LmLn is blocked if (2·ILn<IMinOpPP).

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5.2.2.6 Simplified logic diagrams

Figure 82 presents schematically the creation of the phase-to-phase and phase-to-


earth operating conditions. Consider only the corresponding part of measuring and
logic circuits, when only a phase-to-earth or phase-to-phase measurement is available
within the terminal.

Figure 82: Phase-to-phase and phase-to-earth operating conditions (residual current criteria)

A special attention is paid to correct phase selection at evolving faults. A STCNDI


output signal is created as a combination of the load encroachment characteristic and
current criteria, refer to figure 82. This signal can be configured to STCND functional
input signals of the distance protection zone and this way influence the operation of
the ph-ph and ph-E zone measuring elements and their phase related starting and
tripping signals.

Figure 83 presents schematically the composition of non-directional phase selective


signals PHS--STNDLn. Signals ZMLnN and ZMLmLn (m and n change between
one and three according to the phase number) represent the fulfilled operating criteria
for each separate loop measuring element (i.e. within the "quadrilateral"
characteristic.

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Figure 83: Composition on non-directional phase selection signals

Composition of the directional (forward and reverse) phase selective signals is


presented schematically in figure 85 and figure 84. The directional criteria appears
as a condition for the correct phase selection in order to secure a high phase selectivity
for simultaneous and evolving faults on lines within the complex network
configurations. Signals DFWLn and DFWLnLm present the corresponding
directional signals for measuring loops with phases Ln and Lm. Designation FW
(figure 85) represents the forward direction as well as the designation RV
(figure 84) represents the reverse direction. All directional signals are derived within
the corresponding digital signal processor.

Figure 84 presents additionally a composition of a STCNDZ output signal, which is


created on the basis of impedance measuring conditions. This signal can be configured
to STCND functional input signals of the distance protection zone and this way
influence the operation of the ph-ph and ph-E zone measuring elements and their
phase related starting and tripping signals.

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Figure 84: Composition of phase selection signals for reverse direction

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Figure 85: Composition of phase selection signals for forward direction

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5.2.3 Function block


PHS1-
FDPSPDIS_21
I3P TRIP
U3P START
BLOCK STFWL1
DIRCND STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STNDL1
STNDL2
STNDL3
STNDPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
STCNDZ
STCNDI

en06000258.vsd

Figure 86: PHS function block

5.2.4 Input and output signals

Table 82: Input signals for the FDPSPDIS_21 (PHS--) function block
Signal Description
I3P Group signal for current input
U3P Group signal for voltage input
BLOCK Block of function
DIRCND External directional condition

Table 83: Output signals for the FDPSPDIS_21 (PHS--) function block
Signal Description
STFWL1 Fault detected in phase L1 - forward direction
STFWL2 Fault detected in phase L2 - forward direction
STFWL3 Fault detected in phase L3 - forward direction
STFWPE Earth fault detected in forward direction
STRVL1 Fault detected in phase L1 - reverse direction
STRVL2 Fault detected in phase L2 - reverse direction
STRVL3 Fault detected in phase L3 - reverse direction
STRVPE Earth fault detected in reverse direction
STNDL1 Non directional start in L1
STNDL2 Non directional start in L2
Table continued on next page

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Signal Description
STNDL3 Non directional start in L3
STNDPE Non directional start, phase-earth
STFW1PH Start in forward direction for single-phase fault
STFW2PH Start in forward direction for two- phase fault
STFW3PH Start in forward direction for thre-phase fault
STPE Current conditions release of phase-earth measuring
elements
STPP Current conditions release of phase-phase measuring
elements
STCNDZ Start condition (PHS,LE and I based)
STCNDI Start condition (LE and I based)

5.2.5 Setting parameters

Table 84: Parameter group settings for the FDPSPDIS_21 (PHS--) function
Parameter Range Step Default Unit Description
IBase 1 - 99999 1 3000 A Base current for
current settings
INBlockPP 10 - 100 1 40 %IPh 3I0 limit for blocking
phase-to-phase
measuring loops
INReleasePE 10 - 100 1 20 %IPh 3I0 limit for releasing
phase-to-earth
measuring loops
RLdFw 1.00 - 3000.00 0.01 80.00 ohm/p Forward resistive
reach within the load
impedance area
RLdRv 1.00 - 3000.00 0.01 80.00 ohm/p Reverse resistive
reach within the load
impedance area
ArgLd 5 - 70 1 30 Deg Load angle
determining the load
impedance area
X1 0.50 - 3000.00 0.01 40.00 ohm/p Positive sequence
reactance reach
X0 0.50 - 9000.00 0.01 120.00 ohm/p Zero sequence
reactance reach
RFFwPP 0.50 - 3000.00 0.01 30.00 ohm/l Fault resistance
reach, Ph-Ph, forward
RFRvPP 0.50 - 3000.00 0.01 30.00 ohm/l Fault resistance
reach, Ph-Ph, reverse
RFFwPE 1.00 - 9000.00 0.01 100.00 ohm/l Fault resistance
reach, Ph-E, forward
Table continued on next page

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Parameter Range Step Default Unit Description


RFRvPE 1.00 - 9000.00 0.01 100.00 ohm/l Fault resistance
reach, Ph-E, reverse
IMinOpPP 5 - 30 1 10 %IB Minimum operate
delta current for
Phase-Phase loops
IMinOpPE 5 - 30 1 5 %IB Minimum operate
phase current for
Phase-Earth loops

5.2.6 Technical data

Table 85: Phase selection with load encroachment (PDIS, 21)


Function Range or value Accuracy
Minimum operate current (5-30)% of Ibase ± 1.0% of Ir

Reactive reach, positive (0.50–3000.00) Ω/phase ± 2.0% static accuracy


sequence, forward and reverse ± 2.0 degrees static angular
accuracy
Resistive reach, positive (0.10–1000.00) Ω/phase Conditions:
sequence Voltage range: (0.1-1.1) x Ur
Reactive reach, zero sequence, (0.50–9000.00) Ω/phase Current range: (0.5-30) x Ir
forward and reverse Angle: at 0 degrees and 85
degrees
Resistive reach, zero sequence (0.50–3000.00) Ω/phase
Fault resistance, phase-earth (1.00–9000.00) Ω/loop
faults, forward and reverse
Fault resistance, phase-phase (0.50–3000.00) Ω/loop
faults, forward and reverse
Load encroachment criteria:
Load resistance, forward and (1.00–3000.00) Ω/phase
reverse
Safety load impedance angle (5-70) degrees
Reset ratio 105% typically -

5.3 Power swing detection (RPSB, 78)

Function block name: PSD-- IEC 60617 graphical symbol:


ANSI number: 78
IEC 61850 logical node name:
ZMRPSB Zpsb

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5.3.1 Introduction
Power swings may occur after disconnection of heavy loads or trip of big generation
plants.

Power swing detection function is used to detect power swings and initiate block of
selected distance protection zones. Occurrence of earth fault currents during a power
swing can block the power swing detection function to allow fault clearance.

5.3.2 Principle of operation


The PSD function comprises an inner and an outer quadrilateral measurement
characteristic with load encroachment, see figure 87

Its principle of operation is based on the measurement of the time it takes for a power
swing transient impedance to pass through the impedance area between the outer and
the inner characteristics. Power swings are identified by transition times longer than
a transition time set on corresponding timers. The impedance measuring principle is
the same as that used for the distance protection zones. The impedance and the
characteristic passing times are measured in all three phases separately. One-out-of-
three or two-out-of-three operating modes can be selected according to the specific
system operating conditions.

Figure 87: Operating characteristic for the PSD function

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The impedance measurement within the PSD function is performed by solving


equation 23 and equation 24 (n = 1, 2, 3 for each corresponding phase L1, L2 and
L3).

æ U L1 ö
Reçç ÷÷ £ Rset
è IL1 ø (Equation 23)

æ U L1 ö
Imçç ÷÷ £ Xset
è IL1 ø (Equation 24)

The Rset and Xset are R and X boundaries which are more explained in the following
sections.

5.3.2.1 Resistive reach in forward direction

To avoid load encroachment the resistive reach is limited in forward direction by


setting the parameter RLdOutFw which is the outer resistive load boundary value
while the inner resistive boundary is calculated according to equation 25.

RLdInFw = kLdRFw × RLdOutFw (Equation 25)

where:
kLdRFw is a settable multiplication factor less than 1

The slope of the load encroachment inner and outer boundary is defined by setting
the parameter ARGLd.

The load encroachment in the fourth quadrant uses the same settings as in the first
quadrant (same ARGLd and RLdOutFw and calculated RLdInFw).

The quadrilateral characteristic in the first quadrant is tilted to get a better adaptation
to the distance zones. The angle is the same as the line angle and derived from the
setting of the reactive reach inner boundary X1InFw and the line resistance for the
inner boundary R1LIn. The fault resistance coverage for the inner boundary is set by
the parameter R1FInFw.

From the setting parameter RLdOutFw and the calculated value RLdInFw a distance
between the inner and outer boundary, DFw, is calculated. This value is valid for R
direction in first and fourth quadrant and for X direction in first and second quadrant.

5.3.2.2 Resistive reach in reverse direction

To avoid load encroachment in reverse direction the resistive reach is limited by


setting the parameter RLdOutRv for the outer boundary of the load encroachment

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cone. The distance to the inner resistive load boundary RLdInRv is determined by
using the setting parameter kLdRRv in equation 26.

RLdInRv = kLdRRv × RLdOutRv (Equation 26)

From the setting parameter RLdOutRv and the calculated value RLdInRv a distance
between the inner and outer boundary, DRv, is calculated. This value is valid for R
direction in second and third quadrant and for X direction in third and fourth quadrant.

The inner resistive characteristic in the second quadrant outside the load
encroachment part corresponds to the setting parameter R1FInRv for the inner
boundary. The outer boundary is internally calculated as the sum of DRv+R1FInRv.

The inner resistive characteristic in the third quadrant outside the load encroachment
zone consist of the sum of the settings R1FInRv and the line resistance R1LIn. The
argument of the tilted lines outside the load encroachment is the same as the tilted
lines in the first quadrant. The distance between the inner and outer boundary is the
same as for the load encroachment in reverse direction i.e. DRv.

5.3.2.3 Reactive reach in forward and reverse direction

The inner characteristic for the reactive reach in forward direction correspond to the
setting parameter X1InFw and the outer boundary is defined as X1InFw + DFw.

The inner characteristic for the reactive reach in reverse direction correspond to the
setting parameter X1InRv for the inner boundary and the outer boundary is defined
as X1InRv + DRv.

5.3.2.4 Basic detection logic

The operation of the function is only released if the magnitude of the current is above
the setting of the min operating current, IMinOpPE.

The PSD function can operate in two operating modes:

• The "1-of-3" operating mode is based on detection of power swing in any of the
three phases. Figure 88 presents a composition of a detection signal PSD-DET-
L1 in this particular phase.
• The "2-of-3" operating mode is based on detection of power swing in at least two
out of three phases. Figure 89 presents a composition of the detection signals
DET1of3 and DET2of3.

Signals ZOUTL1 (external boundary) and ZINL1 (internal boundary) in figure 88


are related to the operation of the impedance measuring elements in each phase
separately (Ln represents the corresponding phase L1, L2, and L3). They are internal
signals, calculated by the PSD-function.

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The tP1 timer in figure 88 serve as detection of initial power swings, which are usually
not as fast as the later swings are. The tP2 timer become activated for the detection
of the consecutive swings, if the measured impedance exit the operate area and returns
within the time delay, set on the tW waiting timer. The upper part of figure 88 (input
signal ZOUTL1, ZINL1, AND-gates and tP-timers etc.) are duplicated for phase L2
and L3. All tP1 and tP2 timers in the figure have the same settings.

Figure 88: Detection of power-swing in phase L1

Figure 89: Detection of power-swing for 1-of-3 and 2-of-3 operating mode

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ZOUTL1 ZOUT
OR
ZOUTL2 ZINL1
ZIN
ZOUTL3 AND ZINL2 OR

ZINL3
tEF
TRSP
t AND

I0CHECK

10 ms
AND t
BLKI02 OR

tR1
AND t INHIBIT
OR
-loop
tR2
BLKI01 AND t
BLOCK
-loop
DET1of3 - int.
REL1PH
AND
BLK1PH
tH
DET2of3 - int. OR t
REL2PH
AND
BLK2PH OR START
AND
EXTERNAL

en05000114.vsd

Figure 90: PSD function-simplified block diagram

5.3.2.5 Operating and inhibit conditions

Figure 90 presents a simplified logic diagram for the PSD function. The internal
signals DET1of3 and DET2of3 relate to the detailed logic diagrams in figure 88 and
figure 89 respectively.

Selection of the operating mode is possible by the proper configuration of the


functional input signals REL1PH, BLK1PH, REL2PH, and BLK2PH.

The load encroachment characteristic can be switched off by setting the parameter
OperationLdCh = Off, but notice that the DFw and DRv will still be calculated. The
characteristic will in this case be only quadrilateral.

There are four different ways to form the internal INHIBIT signal:

• Logical 1 on functional input BLOCK inhibits the output START signal


instantaneously.
• The INHIBIT internal signal is activated, if the power swing has been detected
and the measured impedance remains within its operate characteristic for the
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time, which is longer than the time delay set on tR2 timer. It is possible to disable
this condition by connecting the logical 1 signal to the BLKI01 functional input.
• The INHIBIT internal signal is activated after the time delay, set on tR1 timer,
if an earth fault appears during the power swing (input IOCHECK is high) and
the power swing has been detected before the earth fault (activation of the signal
I0CHECK). It is possible to disable this condition by connecting the logical 1
signal to the BLKI02 functional input.
• The INHIBIT logical signals becomes logical 1, if the functional input I0CHECK
appears within the time delay, set on tEF timer and the impedance has been seen
within the outer characteristic of the PSD operate characteristic in all three
phases. This function prevents the operation of the PSD function in cases, when
the circuit breaker closes onto persistent single-phase fault after single-pole auto-
reclosing dead time, if the initial single-phase fault and single-pole opening of
the circuit breaker causes the power swing in the remaining two phases.

5.3.3 Function block


PSD1-
ZMRPSB
I3P ST ART
U3P ZOUT
BLOCK ZIN
BLKI01
BLKI02
BLK1PH
REL1PH
BLK2PH
REL2PH
I0CHECK
TRSP
EXT ERNAL

en05000383.vsd

Figure 91: PSD function block

5.3.4 Input and output signals

Table 86: Input signals for the ZMRPSB_78 (PSD1-) function block
Signal Description
I3P Group signal for current input
U3P Group signal for voltage input
BLOCK Block of function
BLKI01 Block inhibit of start output for slow swing condition
BLKI02 Block inhibit of start output for subsequent residual current
detection
BLK1PH Block one-out-of-three-phase operating mode
REL1PH Release one-out-of-three-phase operating mode
BLK2PH Block two-out-of-three-phase operating mode
REL2PH Release two-out-of-three-phase operating mode
Table continued on next page

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Signal Description
I0CHECK Residual current (3I0) detection used to inhibit start output
TRSP Single-pole tripping command issued by tripping function
EXTERNAL Input for external detection of power swing

Table 87: Output signals for the ZMRPSB_78 (PSD1-) function block
Signal Description
START Power swing detected
ZOUT Measured impedance within outer impedance boundary
ZIN Measured impedance within inner impedance boundary

5.3.5 Setting parameters

Table 88: Parameter group settings for the ZMRPSB_78 (PSD1-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Mode On /
On Off
X1InFw 0.10 - 3000.00 0.01 30.00 ohm Inner reactive
boundary, forward
R1LIn 0.10 - 1000.00 0.01 30.00 ohm Line resistance for
inner characteristic
angle
R1FInFw 0.10 - 1000.00 0.01 30.00 ohm Fault resistance
coverage to inner
resistive line, forward
X1InRv 0.10 - 3000.00 0.01 30.00 ohm Inner reactive
boundary, reverse
R1FInRv 0.10 - 1000.00 0.01 30.00 ohm Fault resistance line
to inner resistive
boundary, reverse
OperationLdCh Off - On - Operation of load
On discrimination
characteristic
RLdOutFw 0.10 - 3000.00 0.01 30.00 ohm Outer resistive load
boundary, forward
ArgLd 5 - 70 1 25 Deg Load angle
determining load
impedance area
RLdOutRv 0.10 - 3000.00 0.01 30.00 ohm Outer resistive load
boundary, reverse
kLdRFw 0.50 - 0.90 0.01 0.75 Mult Multiplication factor
for inner resistive load
boundary, forward
kLdRRv 0.50 - 0.90 0.01 0.75 Mult Multiplication factor
for inner resistive load
boundary, reverse
Table continued on next page

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Parameter Range Step Default Unit Description


tP1 0.000 - 60.000 0.001 0.045 s Timer for detection of
initial power swing
tP2 0.000 - 60.000 0.001 0.015 s Timer for detection of
subsequent power
swings
tW 0.000 - 60.000 0.001 0.250 s Waiting timer for
activation of tP2 timer
tH 0.000 - 60.000 0.001 0.500 s Timer for holding
power swing START
output
tEF 0.000 - 60.000 0.001 3.000 s Timer for overcoming
single-pole reclosing
dead time
tR1 0.000 - 60.000 0.001 0.300 s Timer giving delay to
inhibit by the residual
current
tR2 0.000 - 60.000 0.001 2.000 s Timer giving delay to
inhibit at very slow
swing
IMinOpPE 5 - 30 1 10 %IB Minimum operate
current in % of IBase
IBase 1 - 99999 1 3000 A Base setting for
current level settings

5.3.6 Technical data

Table 89: Power swing detection (RPSB, 78)


Function Range or value Accuracy
Reactive reach (0.10-3000.00) W/phase ± 2.0% static accuracy
± 2.0 degrees static angular
accuracy
Conditions:
Voltage range: (0.1-1.1) x Ur
Resistive reach (0.10–1000.00)W /loop
Current range: (0.5-30) x Ir
Angle: at 0 degrees and 85
degrees
Timers (0.000-60.000) s ± 0.5% ± 10 ms

5.4 Automatic switch onto fault logic (PSOF)

Function block name: SOTF- IEC 60617 graphical symbol:


ANSI number:
IEC 61850 logical node name:
ZPSOF

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5.4.1 Introduction
Automatic switch onto fault logic is a function that gives an instantaneous trip at
closing of breaker onto a fault. A dead line detection check is provided to activate the
function when the line is dead.

5.4.2 Principle of operation


The switch-onto-fault (SOTF) function can be activated either externally or
internally. The internal start is activated by using the information from a dead-line-
detection (DLD) function, see figure 92, which is included in the SOTF function.

SOTF-BC 1000 ms
SOTF-DLCND 200 ms >1 t
& t 15 ms
SOTF-NDACC SOTF-TRIP
& t

SOTF-BLOCK &

en00000492.vsd

Figure 92: Simplified diagram for automatic switch onto fault logic function.

After activation, a distance protection zone (the non-directional starting signal) is


allowed to give an instantaneous trip. The functional output signal from the distance
protection zone to be used, should be connected to the NDACC functional input of
the SOTF function, see figure 92. The distance protection zone used together with
the switch-onto-fault function shall be set to cover the entire protected line.

The external activation is achieved by an input (BC), which should be set high for
activation, and low when the breaker has closed. This is carried out by an NC auxiliary
contact of the circuit breaker or by the closing order to the breaker.

The internal automatic activation is controlled by the internal dead line detection
(DLD) function. The function gives an internal output signal DLD when the current
and voltage for each phase is below the setting parameter IPh< and UPh<, see figure
93. The SOTF function will be activated if the signal is present for more than 200 ms
at the same time as the non-directional impedance starting signal NDACC is not
activated.

The SOTF function can be blocked by the activation of a SOTF-BLOCK functional


input.

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Iph_L1 1
1<2
AND
IPh< 2

Uph_L1 1
1<2
UPh< 2

Iph_L2 1
1<2
AND AND SOTF-DLD
IPh< 2

Uph_L2 1
1<2
UPh< 2

Iph_L3 1
1<2
AND
IPh< 2

Uph_L3 1
1<2
UPh< 2

en05000737.vsd

Figure 93: Simplified logic diagram for dead line detection function in SOTF.

5.4.3 Function block


SOTF-
ZPSOF
I3P TRIP
U3P
BLOCK
BC
NDACC

en05000377.vsd

Figure 94: SOTF function block

5.4.4 Input and output signals

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Table 90: Input signals for the ZPSOF (SOTF-) function block
Signal Description
I3P Group signal for current input
U3P Group signal for voltage input
BLOCK Block of function
BC Enabling of SOTF
NDACC Non Directional Zone to be accelerated by SOTF

Table 91: Output signals for the ZPSOF (SOTF-) function block
Signal Description
TRIP Trip output

5.4.5 Setting parameters

Table 92: Parameter group settings for the ZPSOF (SOTF-) function
Parameter Range Step Default Unit Description
Operation Off - On - Operation Off / On
On
IBase 1 - 99999 1 3000 A Base setting for
current levels
UBase 0.05 - 2000.00 0.05 400.00 kV Base setting for
voltage levels
IPh< 1 - 100 1 20 %IB Current level for
detection of dead line
in % of IBase
UPh< 1 - 100 1 70 %UB Voltage level for
detection of dead line
in % of UBase

5.4.6 Technical data

Table 93: Automatic switch onto fault logic (PSOF)


Parameter Range or value Accuracy
Operate voltage, detection of dead line (1–100)% of Ubase ± 1.0% of Ur

Operate current, detection of dead line (1–100)% of Ibase ± 1.0% of Ir

Delay following dead line detection input before SOTF 200 ms ± 0.5% ± 10 ms
function is automatically enabled
Time period after circuit breaker closure in which 1000 ms ± 0.5% ± 10 ms
SOTF function is active

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Section 6
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Section 6 Current protection

About this chapter


This chapter describes current protection functions. These include functions like
Instantaneous phase overcurrent protection, Four step phase overcurrent protection,
Pole discordance protection and Residual overcurrent protection.

6.1 Instantaneous phase overcurrent protection


(PIOC, 50)

Function block name: IOCx- IEC 60617 graphical symbol:


ANSI number: 50
IEC 61850 logical node name:
PHPIOC 3I>>

6.1.1 Introduction
The instantaneous three phase overcurrent function has a low transient overreach and
short tripping time to allow use as a high set short-circuit protection function, with
the reach limited to less than typical eighty percent of the power line at minimum
source impedance.

6.1.2 Principle of operation


The sampled analogue phase currents are pre-processed in a discrete Fourier filter
(DFT) block. From the fundamental frequency components of each phase current the
RMS value of each phase current is derived. These phase current values are fed to
the IOC function. In a comparator the RMS values are compared to the set operation
current value of the function (IP>>). If a phase current is larger than the set operation
current a signal from the comparator for this phase is set to true. This signal will,
without delay, activate the output signal TRLn (n=1,2,3) for this phase and the TRIP
signal that is common for all three phases.

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There is an operation mode (OpMode) setting: “1 out of 3” or “2 out of 3”. If the


parameter is set to “1 out of 3” any phase trip signal will be activated. If the parameter
is set to “2 out of 3” at least two phase signals must be activated for trip.

There is also a possibility to activate a preset change of the set operation current
(StValMult) via a binary input (ENMULT). In some applications the operation value
needs to be changed, for example due to transformer inrush currents.

The function can be blocked from the binary input BLOCK.

6.1.3 Function block


IOC1-
PHPIOC_50
I3P TRIP
BLOCK TRL1
ENMULT TRL2
TRL3

en04000391.vsd

Figure 95: IOC function block

6.1.4 Input and output signals

Table 94: Input signals for the PHPIOC_50 (IOC1-) function block
Signal Description
I3P Group signal for current input
BLOCK Block of function
ENMULT Enable current start value multiplier

Table 95: Output signals for the PHPIOC_50 (IOC1-) function block
Signal Description
TRIP Trip signal from any phase
TRL1 Trip signal from phase L1
TRL2 Trip signal from phase L2
TRL3 Trip signal from phase L3

6.1.5 Setting parameters

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Table 96: Parameter group settings for the PHPIOC_50 (IOC1-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
On
IBase 1 - 99999 1 3000 A Base setting for
current values
OpMode 2 out of 3 - 1 out of 3 - Select operation
1 out of 3 mode 2-out of 3 / 1-
out of 3
IP>> 1 - 2500 1 200 %IB Operate phase
current level in % of
IBase
StValMult 0.5 - 5.0 0.1 1.0 - Multiplier for operate
current level

6.1.6 Technical data

Table 97: Instantaneous phase overcurrent protection (PIOC, 50)


Function Range or value Accuracy
Operate current (1-2500)% of lbase ± 1.0% of Ir at I £ Ir
± 1.0% of I at I > Ir

Reset ratio > 95% -


Operate time 25 ms typically at 0 to 2 x Iset -

Reset time 25 ms typically at 2 to 0 x Iset -

Critical impulse time 10 ms typically at 0 to 2 x Iset -

Operate time 10 ms typically at 0 to 10 x Iset -

Reset time 35 ms typically at 10 to 0 x Iset -

Critical impulse time 2 ms typically at 0 to 10 x Iset -

Dynamic overreach < 5% at t = 100 ms -

6.2 Four step phase overcurrent protection


(POCM, 51_67)

Function block name: TOCx- IEC 60617 graphical symbol:


ANSI number: 51/67
IEC 61850 logical node name:
3I>
PH4POCM
4
alt
4

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6.2.1 Introduction
The four step phase overcurrent function has an inverse or definite time delay
independent for each step separately.

All IEC and ANSI time delayed characteristics are available together with an optional
user defined time characteristic.

The function can be set to be directional or non-directional independently for each of


the steps.

6.2.2 Principle of operation


The function is divided into four different sub-functions, one for each step. For each
step an operation mode is set (DirModen): Off/Non-directional/Forward/Reverse.

The protection design can be decomposed in four parts:

• The direction element, indicates the over current fault direction


• The harmonic Restraint Blocking function
• The 4 step over current function
• The Mode Selection

If VT inputs are not available or not connected, func parameter


DirModeX shall be left to default value, Non-directional.

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4 step over current


Direction dirPh1Flt element faultState
faultState
Element One element for each
dirPh2Flt step
I3P dirPh3Flt START

U3P

TRIP

Harmonic harmRestrBlock
I3P Restraint
Element

enableDir
Mode Selection
enableStep1-4
DirectionalMode1-4

en05000740.vsd

Figure 96: Functional overview of TOC.

A common setting for all steps, StPhaseSel, is used to specify the number of phase
currents to be high to enable operation. The settings can be chosen: 1 out of 3, 2 out
of 3 or 3 out of 3.

The sampled analogue phase currents are pre-processed in a discrete Fourier filter
(DFT) block. From the fundamental frequency components of each phase current the
RMS value of each phase current is derived. These phase current values are fed to
the TOC function. In a comparator, for each phase current, the RMS values are
compared to the set operation current value of the function (I1>, I2>, I3> or I4>). If
a phase current is larger than the set operation current a signal from the comparator
for this phase and step is set to true. This signal will, without delay, activate the output
signal Start for this phase/step, the Start signal common for all three phases for this
step and a common Start signal.

A harmonic restrain of the function can be chosen. A set 2nd harmonic current in
relation to the fundamental current is used. The 2nd harmonic current is taken from
the pre-processing of the phase currents and compared to a set restrain current level.

The function can use a directional option. The direction of the fault current is given
as current angle in relation to the voltage angle. The fault current and fault voltage
for the directional function is dependent of the fault type. To enable directional
measurement at close in faults, causing low measured voltage, the polarization
voltage is a combination of the apparent voltage (80%) and a memory voltage (20%).
The following combinations are used.

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Phase-phase short circuit:

U refL1L 2 = U L1 - U L 2 I dirL1L 2 = I L1 - I L 2

U refL 2 L 3 = U L 2 - U L 3 I dirL 2 L 3 = I L 2 - I L 3

U refL 3 L1 = U L 3 - U L1 I dirL 3 L1 = I L 3 - I L1

Phase-earth short circuit:

U refL1 = U L1 I dirL1 = I L1

U refL 2 = U L 2 I dirL 2 = I L 2

U refL 3 = U L 3 I dirL 3 = I L 3

The directional setting is given as a characteristic angle AngleRCA for the function
and an angle window AngleRCA-maxFwdAng to AngleRCA+minFwdAng.

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Reverse

Uref

RCA
ROA

ROA Forward

Idir

en05000745.vsd

Figure 97: Directional characteristic of the phase overcurrent protection

The default value of AngleRCA is –65°. The parameters minFwdAng and


maxFwdAng gives the angle sector from AngleRCA for directional borders.

A minimum current for directional phase start current signal can be set:
IminOpPhSel.

If no blockings are given the start signals will start the timers of the step. The time
characteristic for each step can be chosen as definite time delay or some type of
inverse time characteristic. A wide range of standardized inverse time characteristics
is available. It is also possible to create a tailor made time characteristic. The
possibilities for inverse time characteristics are described in chapter "Time inverse
characteristics".

Different types of reset time can be selected as described in chapter "Time inverse
characteristics".

There is also a possibility to activate a preset change (InMult, n= 1, 2, 3 or 4) of the


set operation current via a binary input (enable multiplier). In some applications the
operation value needs to be changed, for example due to changed network switching
state. The function can be blocked from the binary input BLOCK. The start signals
from the function can be blocked from the binary input BLKST. The trip signals from
the function can be blocked from the binary input BLKTR.

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Current protection

6.2.3 Function block


TOC1-
PH4POCM
I3P TRIP
U3P TR1
BLOCK TR2
BLKTR TR3
BLKST1 TR4
BLKST2 TRL1
BLKST3 TRL2
BLKST4 TRL3
ENMULT1 TR1L1
ENMULT2 TR1L2
ENMULT3 TR1L3
ENMULT4 TR2L1
TR2L2
TR2L3
TR3L1
TR3L2
TR3L3
TR4L1
TR4L2
TR4L3
START
ST1
ST2
ST3
ST4
STL1
STL2
STL3
ST1L1
ST1L2
ST1L3
ST2L1
ST2L2
ST2L3
ST3L1
ST3L2
ST3L3
ST4L1
ST4L2
ST4L3
2NDHARM
DIRL1
DIRL2
DIRL3

en05000708.vsd

Figure 98: TOC function block

6.2.4 Input and output signals

Table 98: Input signals for the PH4POCM_51_67 (TOC1-) function block
Signal Description
I3P Group signal for current input
U3P Group signal for voltage input
BLOCK Block of function
BLKTR Block of trip
BLKST1 Block of Step1
BLKST2 Block of Step2
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Current protection

Signal Description
BLKST3 Block of Step3
BLKST4 Block of Step4
ENMULT1 When activated, the current multiplier is in use for step1
ENMULT2 When activated, the current multiplier is in use for step2
ENMULT3 When activated, the current multiplier is in use for step3
ENMULT4 When activated, the current multiplier is in use for step4

Table 99: Output signals for the PH4POCM_51_67 (TOC1-) function block
Signal Description
TRIP Trip
TR1 Common trip signal from step1
TR2 Common trip signal from step2
TR3 Common trip signal from step3
TR4 Common trip signal from step4
TRL1 Trip signal from phase L1
TRL2 Trip signal from phase L2
TRL3 Trip signal from phase L3
TR1L1 Trip signal from step1 phase L1
TR1L2 Trip signal from step1 phase L2
TR1L3 Trip signal from step1 phase L3
TR2L1 Trip signal from step2 phase L1
TR2L2 Trip signal from step2 phase L2
TR2L3 Trip signal from step2 phase L3
TR3L1 Trip signal from step3 phase L1
TR3L2 Trip signal from step3 phase L2
TR3L3 Trip signal from step3 phase L3
TR4L1 Trip signal from step4 phase L1
TR4L2 Trip signal from step4 phase L2
TR4L3 Trip signal from step4 phase L3
START General start signal
ST1 Common start signal from step1
ST2 Common start signal from step2
ST3 Common start signal from step3
ST4 Common start signal from step4
STL1 Start signal from phase L1
STL2 Start signal from phase L2
STL3 Start signal from phase L3
ST1L1 Start signal from step1 phase L1
Table continued on next page

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Current protection

Signal Description
ST1L2 Start signal from step1 phase L2
ST1L3 Start signal from step1 phase L3
ST2L1 Start signal from step2 phase L1
ST2L2 Start signal from step2 phase L2
ST2L3 Start signal from step2 phase L3
ST3L1 Start signal from step3 phase L1
ST3L2 Start signal from step3 phase L2
ST3L3 Start signal from step3 phase L3
ST4L1 Start signal from step4 phase L1
ST4L2 Start signal from step4 phase L2
ST4L3 Start signal from step4 phase L3
2NDHARM Block from second harmonic detection
DIRL1 Direction for phase1
DIRL2 Direction for phase2
DIRL3 Direction for phase3

6.2.5 Setting parameters

Table 100: Parameter group settings for the PH4POCM_51_67 (TOC1-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
On
IBase 1 - 99999 1 3000 - Base setting for
current values
UBase 0.05 - 2000.00 0.05 400.00 kV Base setting for
voltage levels in kV
MaxFwdAng 40.0 - 70.0 0.1 50.0 Deg Maximum forward
angle
MinFwdAng 75.0 - 90.0 0.1 80.0 Deg Minimum forward
angle
AngleRCA -70.0 - -50.0 1.0 -65.0 Deg Relay characteristic
angle (RCA)
IMinOpPhSel 1 - 100 1 7 %IB Minimum current for
phase selection in %
of IBase
StartPhSel Not Used - 1 out of 3 - Number of phases
1 out of 3 required for op (1 of 3,
2 out of 3 2 of 3, 3 of 3)
3 out of 3
2ndHarmStab 5 - 100 1 20 %IB Operate level of 2nd
harm restrain op in %
of Fundamental
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Current protection

Parameter Range Step Default Unit Description


DirMode1 Off - Non-directional - Directional mode of
Non-directional step 1 (off, nodir,
Forward forward, reverse)
Reverse
Characterist1 ANSI Ext. inv. - ANSI Def. Time - Selection of time
ANSI Very inv. delay curve type for
ANSI Norm. inv. step 1
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I1> 1 - 2500 1 1000 %IB Operate phase
current level for step1
in % of IBase
t1 0.000 - 60.000 0.001 0.000 s Independent
(defenitive) time delay
of step 1
k1 0.05 - 999.00 0.01 0.05 - Time multiplier for the
dependent time delay
for step 1
I1Mult 1.0 - 10.0 0.1 2.0 - Multiplier for operate
current level for step 1
t1Min 0.000 - 60.000 0.001 0.000 s Minimum operate
time for IEC IDMT
curves for step 1
ResetTypeCrv1 Instantaneous - Instantaneous - Selection of reset
IEC Reset curve type for step 1
ANSI reset
tReset1 0.000 - 60.000 0.001 0.020 s Reset time delay used
in IEC Definite Time
curve step 1
tPCrv1 0.005 - 3.000 0.001 1.000 - Parameter P for
customer
programmable curve
for step 1
tACrv1 0.005 - 200.000 0.001 13.500 - Parameter A for
customer
programmable curve
for step 1
tBCrv1 0.00 - 20.00 0.01 0.00 - Parameter B for
customer
programmable curve
for step 1
Table continued on next page

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Current protection

Parameter Range Step Default Unit Description


tCCrv1 0.1 - 10.0 0.1 1.0 - Parameter C for
customer
programmable curve
for step 1
tPRCrv1 0.005 - 3.000 0.001 0.500 - Parameter PR for
customer
programmable curve
for step 1
tTRCrv1 0.005 - 100.000 0.001 13.500 - Parameter TR for
customer
programmable curve
for step 1
tCRCrv1 0.1 - 10.0 0.1 1.0 - Parameter CR for
customer
programmable curve
for step 1
HarmRestrain1 Disabled - Enabled - Enable block of step 1
Enabled from harmonic
restrain
DirMode2 Off - Non-directional - Directional mode of
Non-directional step 2 (off, nodir,
Forward forward, reverse)
Reverse
Characterist2 ANSI Ext. inv. - ANSI Def. Time - Selection of time
ANSI Very inv. delay curve type for
ANSI Norm. inv. step 2
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I2> 1 - 2500 1 500 %IB Operate phase
current level for step2
in % of IBase
t2 0.000 - 60.000 0.001 0.400 s Independent
(defenitive) time delay
of step 2
k2 0.05 - 999.00 0.01 0.05 - Time multiplier for the
dependent time delay
for step 2
I2Mult 1.0 - 10.0 0.1 2.0 - Multiplier for scaling
the current setting
value for step 2
t2Min 0.000 - 60.000 0.001 0.000 s Minimum operate
time for IEC IDMT
curves for step 2
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Current protection

Parameter Range Step Default Unit Description


ResetTypeCrv2 Instantaneous - Instantaneous - Selection of reset
IEC Reset curve type for step 2
ANSI reset
tReset2 0.000 - 60.000 0.001 0.020 s Reset time delay used
in IEC Definite Time
curve step 2
tPCrv2 0.005 - 3.000 0.001 1.000 - Parameter P for
customer
programmable curve
for step 2
tACrv2 0.005 - 200.000 0.001 13.500 - Parameter A for
customer
programmable curve
for step 2
tBCrv2 0.00 - 20.00 0.01 0.00 - Parameter B for
customer
programmable curve
for step 2
tCCrv2 0.1 - 10.0 0.1 1.0 - Parameter C for
customer
programmable curve
for step 2
tPRCrv2 0.005 - 3.000 0.001 0.500 - Parameter PR for
customer
programmable curve
for step 2
tTRCrv2 0.005 - 100.000 0.001 13.500 - Parameter TR for
customer
programmable curve
for step 2
tCRCrv2 0.1 - 10.0 0.1 1.0 - Parameter CR for
customer
programmable curve
for step 2
HarmRestrain2 Disabled - Enabled - Enable block of step 2
Enabled from harmonic
restrain
DirMode3 Off - Non-directional - Directional mode of
Non-directional step 3 (off, nodir,
Forward forward, reverse)
Reverse
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Current protection

Parameter Range Step Default Unit Description


Characterist3 ANSI Ext. inv. - ANSI Def. Time - Selection of time
ANSI Very inv. delay curve type for
ANSI Norm. inv. step 3
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I3> 1 - 2500 1 250 %IB Operate phase
current level for step3
in % of IBase
t3 0.000 - 60.000 0.001 0.800 s Independent
(definitive) time delay
for step 3
k3 0.05 - 999.00 0.01 0.05 - Time multiplier for the
dependent time delay
for step 3
I3Mult 1.0 - 10.0 0.1 2.0 - Multiplier for scaling
the current setting
value for step 3
t3Min 0.000 - 60.000 0.001 0.000 s Minimum operate
time for IEC IDMT
curves for step 3
ResetTypeCrv3 Instantaneous - Instantaneous - Selection of reset
IEC Reset curve type for step 3
ANSI reset
tReset3 0.000 - 60.000 0.001 0.020 s Reset time delay used
in IEC Definite Time
curve step 3
tPCrv3 0.005 - 3.000 0.001 1.000 - Parameter P for
customer
programmable curve
for step 3
tACrv3 0.005 - 200.000 0.001 13.500 - Parameter A for
customer
programmable curve
for step 3
tBCrv3 0.00 - 20.00 0.01 0.00 - Parameter B for
customer
programmable curve
for step 3
tCCrv3 0.1 - 10.0 0.1 1.0 - Parameter C for
customer
programmable curve
for step 3
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Current protection

Parameter Range Step Default Unit Description


tPRCrv3 0.005 - 3.000 0.001 0.500 - Parameter PR for
customer
programmable curve
for step 3
tTRCrv3 0.005 - 100.000 0.001 13.500 - Parameter TR for
customer
programmable curve
for step 3
tCRCrv3 0.1 - 10.0 0.1 1.0 - Parameter CR for
customer
programmable curve
for step 3
HarmRestrain3 Disabled - Enabled - Enable block of step3
Enabled from harmonic
restrain
DirMode4 Off - Non-directional - Directional mode of
Non-directional step 4 (off, nodir,
Forward forward, reverse)
Reverse
Characterist4 ANSI Ext. inv. - ANSI Def. Time - Selection of time
ANSI Very inv. delay curve type for
ANSI Norm. inv. step 4
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I4> 1 - 2500 1 175 %IB Operate phase
current level for step4
in % of IBase
t4 0.000 - 60.000 0.001 2.000 s Independent
(definitive) time delay
of step4
k4 0.05 - 999.00 0.01 0.05 - Time multiplier for the
dependent time delay
for step 4
I4Mult 1.0 - 10.0 0.1 2.0 - Multiplier for scaling
the current setting
value for step 4
t4Min 0.000 - 60.000 0.001 0.000 s Minimum operate
time for IEC IDMT
curves for step 4
ResetTypeCrv4 Instantaneous - Instantaneous - Selection of reset
IEC Reset curve type for step 4
ANSI reset
Table continued on next page

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1MRK505132-UEN rev. D
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Current protection

Parameter Range Step Default Unit Description


tReset4 0.000 - 60.000 0.001 0.020 s Reset time delay used
in IEC Definite Time
curve step 4
tPCrv4 0.005 - 3.000 0.001 1.000 - Parameter P for
customer
programmable curve
for step 4
tACrv4 0.005 - 200.000 0.001 13.500 - Parameter A for
customer
programmable curve
for step 4
tBCrv4 0.00 - 20.00 0.01 0.00 - Parameter B for
customer
programmable curve
for step 4
tCCrv4 0.1 - 10.0 0.1 1.0 - Parameter C for
customer
programmable curve
for step 4
tPRCrv4 0.005 - 3.000 0.001 0.500 - Parameter PR for
customer
programmable curve
for step 4
tTRCrv4 0.005 - 100.000 0.001 13.500 - Parameter TR for
customer
programmable curve
for step 4
tCRCrv4 0.1 - 10.0 0.1 1.0 - Parameter CR for
customer
programmable curve
for step 4
HarmRestrain4 Disabled - Enabled - Enable block of Step
Enabled 4 from harmonic
restrain

6.2.6 Technical data

Table 101: Four step phase overcurrent protection (POCM, 51/67)


Function Setting range Accuracy
Operate current (1-2500)% of lbase ± 1.0% of Ir at I £ Ir
± 1.0% of I at I > Ir

Reset ratio > 95% -


Min. operating current (1-100)% of lbase ± 1.0% of Ir

Relay characteristic angle (RCA) (-70.0– -50.0) degrees ± 2.0 degrees


Maximum forward angle (40.0–70.0) degrees ± 2.0 degrees
Minimum forward angle (75.0–90.0) degrees ± 2.0 degrees
Second harmonic blocking (5–100)% of fundamental ± 2.0% of Ir

Independent time delay (0.000-60.000) s ± 0.5% ± 10 ms


Table continued on next page

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Current protection

Function Setting range Accuracy


Minimum operate time (0.000-60.000) s ± 0.5% ± 10 ms
Inverse characteristics, see 19 curve types See table 436 and table 437
table 436 and table 437
Operate time, start function 25 ms typically at 0 to 2 x Iset -

Reset time, start function 25 ms typically at 2 to 0 x Iset -

Critical impulse time 10 ms typically at 0 to 2 x Iset -

Impulse margin time 15 ms typically -

6.3 Instantaneous residual overcurrent protection


(PIOC, 50N)

Function block name: IEFx- IEC 60617 graphical symbol:


ANSI number: 50N
IEC 61850 logical node name:
EFPIOC IN>>

6.3.1 Introduction
The single input overcurrent function has a low transient overreach and short tripping
times to allow use as a high set short circuit protection function, with the reach limited
to less than typical eighty percent of the power line at minimum source impedance.
The function can be configured to measure the residual current from the three phase
current inputs or the current from a separate current input.

6.3.2 Principle of operation


The sampled analogue residual currents are pre-processed in a discrete Fourier filter
(DFT) block. From the fundamental frequency components of the residual current
the RMS value is derived. This current value is fed to the IEF function. In a comparator
the RMS value is compared to the set operation current value of the function
(IN>>). If the residual current is larger than the set operation current a signal from
the comparator is set to true. This signal will, without delay, activate the output signal
TRIP.

There is also a possibility to activate a preset change of the set operation current via
a binary input (enable multiplier MULTEN). In some applications the operation value
needs to be changed, for example due to transformer inrush currents.

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Current protection

The function can be blocked from the binary input BLOCK. The trip signals from the
function can be blocked from the binary input BLKAR, that can be activated during
single pole trip and autoreclosing sequences.

6.3.3 Function block


IEF1-
EFPIOC
I3P TRIP
BLOCK
BLKAR
MULTEN

en04000393.vsd

Figure 99: IEF function block

6.3.4 Input and output signals

Table 102: Input signals for the EFPIOC_50N (IEF1-) function block
Signal Description
I3P Group signal for current input
BLOCK Block of function
BLKAR Block input for auto reclose
MULTEN Enable current multiplier

Table 103: Output signals for the EFPIOC_50N (IEF1-) function block
Signal Description
TRIP Trip signal

6.3.5 Setting parameters

Table 104: Parameter group settings for the EFPIOC_50N (IEF1-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
On
IBase 1 - 99999 1 3000 A Base setting for
current values
IN>> 1 - 2500 1 200 %IB Operate residual
current level in % of
IBase
StValMult 0.5 - 5.0 0.1 1.0 - Multiplier for operate
current level

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6.3.6 Technical data

Table 105: Instantaneous residual overcurrent protection (PIOC, 50N)


Function Range or value Accuracy
Operate current (1-2500)% of lbase ± 1.0% of Ir at I £ Ir
± 1.0% of I at I > Ir

Reset ratio > 95% -


Operate time 25 ms typically at 0 to 2 x Iset -

Reset time 25 ms typically at 2 to 0 x Iset -

Critical impulse time 10 ms typically at 0 to 2 x Iset -

Operate time 10 ms typically at 0 to 10 x Iset -

Reset time 35 ms typically at 10 to 0 x Iset -

Critical impulse time 2 ms typically at 0 to 10 x Iset -

Dynamic overreach < 5% at t = 100 ms -

6.4 Four step residual overcurrent protection


(PEFM, 51N/67N)

Function block name: TEFx- IEC 60617 graphical symbol:


ANSI number:51N/ 67N
IN
IEC 61850 logical node name:
EF4PEFM
4
alt
4

6.4.1 Introduction
The four step single input overcurrent function has an inverse or definite time delay
independent for each step separately.

All IEC and ANSI time delayed characteristics are available together with an optional
user defined characteristic.

The function can be set to be directional, forward, reverse or non-directional


independently for each of the steps.

A second harmonic blocking can be set individually for each step.

The function can be used as main protection for phase to earth faults.

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Current protection

The function can be used to provide a system back-up e.g. in the case of the primary
protection being out of service due to communication or voltage transformer circuit
failure.

Directional operation can be combined together with corresponding communication


blocks into permissive or blocking teleprotection scheme. Current reversal and weak-
end infeed functionality are available as well.

The function can be configured to measure the residual current from the three phase
current inputs or the current from a separate current input.

6.4.2 Principle of operation


The function is divided into four different sub-functions, one for each step. For each
step an operation modem DirModen is set: Off/Non-directional/Forward/Reverse.

The protection design can be decomposed in four parts:

• The direction element, indicate earth current fault direction. The directional
check uses 3I0cos(ϕ-ϕRCA) for comparison
• The harmonic Restraint Blocking function
• 4 step over current function
• Switch On To Fault function (SOTF), including Under Time
• Mode Selection
• Blocking at parallel transformers

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Current protection

signal to
communication
scheme
Directional Check
Element

4 step over current


Direction
operatingCurrent element TRIP
Element
3U0 One element for each
earthFaultDirection step
3I0 angleValid

enableDir

harmRestrBlock
3I0 Harmonic
Restraint ³1
Element

start step 2, 3 and


4
Blocking at parallel
transformers
SwitchOnToFault
TRIP

CB
pos
or cmd
enableDir
Mode
Selection enableStep1-4

DirectionalMode1-4

en05000741.vsd

Figure 100: Functional overview of TEF

The sampled analog residual current is pre-processed in a discrete Fourier filter (DFT)
block. From the fundamental frequency component the RMS value of the residual
current is derived. This residual current value is fed to the TEF function. In a
comparator the RMS value is compared to the set operation current value of the
function (IN1>, IN2>, IN3> or IN4>). If the residual current is larger than the set
operation current a signal from the comparator for this step is set to true. This signal
will, without delay, activate the output signal Start for this step and a common Start
signal.

A harmonic restrain of the function can be chosen. A set 2nd harmonic current in
relation to the fundamental current is used. The 2nd harmonic current is taken from
the pre-processing of the phase currents and compared to a set restrain current level.

The function can use a directional option. A fault is in the forward direction if the
residual current component 3I0cos(ϕ-ϕRCA) is larger than a set level. The angle ϕ
is the angle between the residual current and the polarizing voltage (–3U0). The angle
is defined positive when the residual current lags the reference voltage. The
AngleRCA is the characteristic angle of the directional function.

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Current protection

RCA Upol = -3U0

Operation
IN>Dir

en05000285.vsd

Figure 101: Characteristic of the directional option

If no blockings are given the start signals will start the timers of the step. The time
characteristic for each step can be chosen as definite time delay or some type of
inverse time characteristic. A wide range of standardized inverse time characteristics
is available. It is also possible to create a tailor made time characteristic. The
possibilities for inverse time characteristics are described in chapter 23 "Time inverse
characteristics"

Different types of reset time can be selected as described in chapter 23 "Time inverse
characteristics"

There is also a possibility to activate a preset change (INxMult, x = 1, 2, 3 or 4) of the


set operation current via a binary input (enable multiplier MULTEN). In some
applications the operation value needs to be changed, for example due to changed
network switching state.

In case of parallel transformers there is a risk of sympathetic inrush current. If one of


the transformers is in operation, and the parallel transformer is switched in, the
asymmetric inrush current of the switched in transformer will cause partial saturation
of the transformer already in service. This is called transferred saturation. The 2nd
harmonic of the inrush currents of the two transformers will be in phase opposition.
The summation of the two currents will thus give a small 2nd harmonic current. The
residual fundamental current will however be significant. The inrush current of the
transformer in service before the parallel transformer energizing, will be a little
delayed compared to the first transformer. Therefore we will have high 2nd harmonic
current initially. After a short period this current will however be small and the normal
2nd harmonic blocking will reset. If the BlkParTransf function is activated the 2nd

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harmonic restrain signal will latched as long as the residual current measured by the
relay is larger than a selected step current level.

The function can be blocked from the binary input BLOCK. The start signals from
the function can be blocked from the binary input BLKST. The trip signals from the
function can be blocked from the binary input BLKTR.

6.4.2.1 Switch onto fault logic

Integrated in the four step residual overcurrent protection are Switch on to fault logic
(SOTF) and undertime logic. The parameter SOFT is set to activate either SOTF or
undertime function or both. When the circuit breaker is closing there is a risk to close
energize a permanent fault, for example during an autoreclosing sequence. The SOTF
function will enable fast fault clearance during such situations. The time the SOTF/
Undertime function will be active after activation is set by the parameter t4U.

The SOFT function uses the start signal from step 2 or 3, which is set by parameter
Step3ForSOTF. The function is activated from change in circuit breaker position or
from circuit breaker close command pulse. The parameter ActivationSOTF can be set
for activation of CB position open change, CB position closed change or CB close
command. In case of a residual current start from step 2 or 3 (dependent on setting)
the function will give a trip after a set delay tSOTF. This delay is normally set to a
short time (default 100 ms).

The undertime function uses the start signal from step 4. The function will normally
be set to a lower current level than the SOTF function. The undertime function can
also be blocked by the 2nd harmonic restrain function. This enables high sensitivity
even if power transformer inrush currents can occur. The detection of unsymmetrical
CB poles after switching is thus possible. The function is activated from change in
circuit breaker position or from circuit breaker close and open command pulse. This
is set by parameter ActUnderTime. The parameter ActUnderTime can be set for
activation of CB position change or CB close/open command. In case of a residual
current start from step 4 the function will give a trip after a set delay tUnderTime.
This delay is normally set to a relatively short time (default 300 ms).

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6.4.3 Function block


T EF1-
EF4PEFM
BLOCK T RIP
I3P T RIN1
BLKT R T RIN2
U3P T RIN3
BLKST1 T RIN4
BLKST2 T RSOT F
BLKST3 START
BLKST4 ST IN1
ENMULT 1 ST IN2
ENMULT 2 ST IN3
ENMULT 3 ST IN4
ENMULT 4 ST SOT F
CBPOS STFW
CLOSECB STRV
OPENCB 2NDHARMD

en04000395.vsd

Figure 102: TEF function block

6.4.4 Input and output signals

Table 106: Input signals for the EF4PEFM_51N67N (TEF1-) function block
Signal Description
BLOCK Block of function
I3P Group signal for current input
BLKTR Block of trip
U3P Group signal for voltage input
BLKST1 Block of step 1 (Start and trip)
BLKST2 Block of step 2 (Start and trip)
BLKST3 Block of step 3 (Start and trip)
BLKST4 Block of step 4 (Start and trip)
ENMULT1 When activated, the current multiplier is in use for step1
ENMULT2 When activated, the current multiplier is in use for step2
ENMULT3 When activated, the current multiplier is in use for step3
ENMULT4 When activated, the current multiplier is in use for step4
CBPOS Breaker position
CLOSECB Breaker close command
OPENCB Breaker open command

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Table 107: Output signals for the EF4PEFM_51N67N (TEF1-) function block
Signal Description
TRIP Trip
TRIN1 Trip signal from step 1
TRIN2 Trip signal from step 2
TRIN3 Trip signal from step 3
TRIN4 Trip signal from step 4
TRSOTF Trip signal from earth fault switch onto fault function
START General start signal
STIN1 Start signal step 1
STIN2 Start signal step 2
STIN3 Start signal step 3
STIN4 Start signal step 4
STSOTF Start signal from earth fault switch onto fault function
STFW Forward directional start signal
STRV Reverse directional start signal
2NDHARMD 2nd harmonic block signal

6.4.5 Setting parameters

Table 108: Parameter group settings for the EF4PEFM_51N67N (TEF1-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation mode Off /
On On
IBase 1 - 99999 1 3000 A Base setting for
current values
UBase 0.05 - 2000.00 0.05 400.00 kV Base setting for
voltage level in kV
IMinOpFund 1 - 2500 1 3 %IB Minimum
fundamental
frequency current
level in % of IBase
AngleRCA -180 - 180 1 65 Deg Relay characteristic
angle (RCA)
3UO>Dir 1 - 100 1 5 %UB Minimum polarizing
quantity in % of
UBase
IN>DirCmp 1 - 100 1 3 %IB Operate residual
current level for
DirComp in % of
IBase
tDirCmp 0.000 - 60.000 0.001 10.000 s Time delay for
DirComp
Table continued on next page

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Current protection

Parameter Range Step Default Unit Description


2ndHarmStab 5 - 100 1 20 % Second harmonic
restrain operation in
% of INAMPL
UseStartValue IN1> - IN1> - Current level blk at
IN2> parallel transf (step1,
IN3> 2, 3 or 4)
IN4>
BlkParTransf Off - Off - Enable blocking at
On parallel transformers
ActivationSOTF Open - Open - Select signal that
Closed shall activate SOTF
CloseCommand
SOTF Off - Off - SOFT operation
SOTF mode (Off/SOTF/
UnderTime Undertime/SOTF
SOTF +undertime)
+UnderTime
tSOTF 0.000 - 60.000 0.001 0.100 s Time delay for SOTF
HarmResSOTF Disabled - Disabled - Enable harmonic
Enabled restrain functionin
SOTF
t4U 0.000 - 60.000 0.001 5.000 s Switch-onto-fault
active time
ActUnderTime CB position - CB position - Select signal to
CB command activate under time
(CB Pos/
CBCommand)
tUnderTime 0.000 - 60.000 0.001 0.300 s Time delay for under
time
DirMode1 Off - Non-directional - Directional mode of
Non-directional step 1 (off, nodir,
Forward forward, reverse)
Reverse
Characterist1 ANSI Ext. inv. - ANSI Def. Time - Selection of time
ANSI Very inv. delay curve type for
ANSI Norm. inv. step 1
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IN1> 1 - 2500 1 100 %IB Operate residual
current level for step 1
in % of IBase
Table continued on next page

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Current protection

Parameter Range Step Default Unit Description


t1 0.000 - 60.000 0.001 0.000 s Independent
(defenite) time delay
of step 1
k1 0.05 - 999.00 0.01 0.05 - Time multiplier for the
dependent time delay
for step 1
IN1Mult 1.0 - 10.0 0.1 2.0 - Multiplier for scaling
the current setting
value for step 1
t1Min 0.000 - 60.000 0.001 0.000 s Minimum operate
time for IEC IDMT
curves for step 1
ResetTypeCrv1 Instantaneous - Instantaneous - Selection of reset
IEC Reset curve type for step 1
ANSI reset
tReset1 0.000 - 60.000 0.001 0.020 s Reset time delay used
in IEC Definite Time
curve step 1
HarmRestrain1 Disabled - Enabled - Enable block of step 1
Enabled from harmonic
restrain
tPCrv1 0.005 - 3.000 0.001 1.000 - Parameter P for
customer
programmable curve
for step 1
tACrv1 0.005 - 200.000 0.001 13.500 - Parameter A for
customer
programmable curve
for step 1
tBCrv1 0.00 - 20.00 0.01 0.00 - Parameter B for
customer
programmable curve
for step 1
tCCrv1 0.1 - 10.0 0.1 1.0 - Parameter C for
customer
programmable curve
for step 1
tPRCrv1 0.005 - 3.000 0.001 0.500 - Parameter PR for
customer
programmable curve
for step 1
tTRCrv1 0.005 - 100.000 0.001 13.500 - Parameter TR for
customer
programmable curve
for step 1
tCRCrv1 0.1 - 10.0 0.1 1.0 - Parameter CR for
customer
programmable curve
for step 1
DirMode2 Off - Non-directional - Directional mode of
Non-directional step 2 (off, nodir,
Forward forward, reverse)
Reverse
Table continued on next page

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Current protection

Parameter Range Step Default Unit Description


Characterist2 ANSI Ext. inv. - ANSI Def. Time - Selection of time
ANSI Very inv. delay curve for step 2
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IN2> 1 - 2500 1 50 %IB Operate residual
current level for step 2
in % of IBase
t2 0.000 - 60.000 0.001 0.400 s Independent
(definitive) time delay
of step 2
k2 0.05 - 999.00 0.01 0.05 - Time multiplier for the
dependent time delay
for step 2
IN2Mult 1.0 - 10.0 0.1 2.0 - Multiplier for scaling
the current setting
value for step 2
t2Min 0.000 - 60.000 0.001 0.000 s Minimum operate
time for IEC IDMT
curves step 2
ResetTypeCrv2 Instantaneous - Instantaneous - Reset mode when
IEC Reset current drops off step
ANSI reset 2
tReset2 0.000 - 60.000 0.001 0.020 s Selection of reset
curve type for step 2
HarmRestrain2 Disabled - Enabled - Enable block of step 2
Enabled from harmonic
restrain
tPCrv2 0.005 - 3.000 0.001 1.000 - Parameter P for
customer
programmable curve
for step 2
tACrv2 0.005 - 200.000 0.001 13.500 - Parameter A for
customer
programmable curve
for step 2
tBCrv2 0.00 - 20.00 0.01 0.00 - Parameter B for
customer
programmable curve
for step 2
Table continued on next page

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Parameter Range Step Default Unit Description


tCCrv2 0.1 - 10.0 0.1 1.0 - Parameter C for
customer
programmable curve
for step 2
tPRCrv2 0.005 - 3.000 0.001 0.500 - Parameter PR for
customer
programmable curve
for step 2
tTRCrv2 0.005 - 100.000 0.001 13.500 - Parameter TR for
customer
programmable curve
for step 2
tCRCrv2 0.1 - 10.0 0.1 1.0 - Parameter CR for
customer
programmable curve
for step 2
DirMode3 Off - Non-directional - Directional mode of
Non-directional step 3 (off, nodir,
Forward forward, reverse)
Reverse
Characterist3 ANSI Ext. inv. - ANSI Def. Time - Time delay curve type
ANSI Very inv. for step 3
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IN3> 1 - 2500 1 33 %IB Operate residual
current level for step 3
in % of IBase
t3 0.000 - 60.000 0.001 0.800 s Independent time
delay of step 3
k3 0.05 - 999.00 0.01 0.05 - Time multiplier for the
dependent time delay
for step 3
IN3Mult 1.0 - 10.0 0.1 2.0 - Multiplier for scaling
the current setting
value for step 3
t3Min 0.000 - 60.000 0.001 0.000 s Minimum operate
time for IEC IDMT
curves for step 3
ResetTypeCrv3 Instantaneous - Instantaneous - Selection of reset
IEC Reset curve type for step 3
ANSI reset
Table continued on next page

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Current protection

Parameter Range Step Default Unit Description


tReset3 0.000 - 60.000 0.001 0.020 s Reset time delay used
in IEC Definite Time
curve for step 3
HarmRestrain3 Disabled - Enabled - Enable block of step 3
Enabled from harmonic
restrain
tPCrv3 0.005 - 3.000 0.001 1.000 - Parameter P for
customer
programmable curve
for step 3
tACrv3 0.005 - 200.000 0.001 13.500 - Parameter A for
customer
programmable curve
for step 3
tBCrv3 0.00 - 20.00 0.01 0.00 - Parameter B for
customer
programmable curve
for step 3
tCCrv3 0.1 - 10.0 0.1 1.0 - Parameter C for
customer
programmable curve
step 3
tPRCrv3 0.005 - 3.000 0.001 0.500 - Parameter PR for
customer
programmable curve
step 3
tTRCrv3 0.005 - 100.000 0.001 13.500 - Parameter TR for
customer
programmable curve
step 3
tCRCrv3 0.1 - 10.0 0.1 1.0 - Parameter CR for
customer
programmable curve
for step 3
Step3ForSOTF step 2 init - step 2 init - Select step3 to be
step 3 init connected to SOTF
DirMode4 Off - Non-directional - Directional mode of
Non-directional step 4 (off, nodir,
Forward forward, reverse)
Reverse
Table continued on next page

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Current protection

Parameter Range Step Default Unit Description


Characterist4 ANSI Ext. inv. - ANSI Def. Time - Time delay curve type
ANSI Very inv. for step 4
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IN4> 1 - 2500 1 17 %IB Operate residual
current level for step 4
in % of IBase
t4 0.000 - 60.000 0.001 1.200 s Independent
(definitive) time delay
of step 4
k4 0.05 - 999.00 0.01 0.05 - Time multiplier for the
dependent time delay
for step 4
IN4Mult 1.0 - 10.0 0.1 2.0 - Multiplier for scaling
the current setting
value for step 4
t4Min 0.000 - 60.000 0.001 0.000 s Minimum operate
time in IEC IDMT
modes step 4
ResetTypeCrv4 Instantaneous - Instantaneous - Selection of reset
IEC Reset curve type for step 4
ANSI reset
tReset4 0.000 - 60.000 0.001 0.020 s Reset time delay used
in IEC Definite Time
curve for step 4
HarmRestrain4 Disabled - Enabled - Enable block of step 4
Enabled from harmonic
restrain
tPCrv4 0.005 - 3.000 0.001 1.000 - Parameter P for
customer
programmable curve
for step 4
tACrv4 0.005 - 200.000 0.001 13.500 - Parameter A for
customer
programmable curve
step 4
tBCrv4 0.00 - 20.00 0.01 0.00 - Parameter B for
customer
programmable curve
for step 4
Table continued on next page

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Current protection

Parameter Range Step Default Unit Description


tCCrv4 0.1 - 10.0 0.1 1.0 - Parameter C for
customer
programmable curve
step 4
tPRCrv4 0.005 - 3.000 0.001 0.500 - Parameter PR for
customer
programmable curve
step 4
tTRCrv4 0.005 - 100.000 0.001 13.500 - Parameter TR for
customer
programmable curve
step 4
tCRCrv4 0.1 - 10.0 0.1 1.0 - Parameter CR for
customer
programmable curve
step 4

6.4.6 Technical data

Table 109: Four step residual overcurrent protection (PEFM, 51N/67N)


Function Range or value Accuracy
Operate current (1-2500)% of lbase ± 1.0% of Ir at I £ Ir
± 1.0% of I at I > Ir

Reset ratio > 95% -


Operate current for directional (1–100)% of lbase ± 1.0% of Ir
comparison
Timers (0.000-60.000) s ± 0.5% ± 10 ms
Inverse characteristics, see table 19 curve types See table 436 and table 437
436 and table 437
Second harmonic restrain (5–100)% of fundamental ± 2.0% of Ir
operation
Relay characteristic angle (-180 to 180) degrees ± 2.0 degrees
Minimum polarizing voltage (1–100)% of Ubase ± 1.0% of Ur

Operate time, start function 25 ms typically at 0 to 2 x Iset -

Reset time, start function 25 ms typically at 2 to 0 x Iset -

Critical impulse time 10 ms typically at 0 to 2 x Iset -

Impulse margin time 15 ms typically -

6.5 Thermal overload protection, one time constant


(PTTR, 26)

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Current protection

Function block name: THLx- IEC 60617 graphical symbol:


ANSI number: 49
IEC 61850 logical node name:
LPTTR

6.5.1 Introduction
The increasing utilizing of the power system closer to the thermal limits have
generated a need of a thermal overload function also for power lines.

A thermal overload will often not be detected by other protection functions and the
introduction of the thermal overload function can allow the protected circuit to operate
closer to the thermal limits.

The three phase current measuring function has an I2t characteristic with settable time
constant and a thermal memory.

An alarm level gives early warning to allow operators to take action well before the
line will be tripped.

6.5.2 Principle of operation


The sampled analogue phase currents are pre-processed and for each phase current
the RMS value of each phase current is derived. These phase current values are fed
to the THL function.

From the largest of the three phase currents a final temperature is calculated according
to the expression:

2
æ I ö
Q final =ç ÷÷ × Tref
ç I ref
è ø (Equation 33)

where:
I is the largest phase current,
Iref is a given reference current and

Tref is steady state temperature corresponding to Iref

If this temperature is larger than the set operate temperature level a start output signal
START is activated.

The actual temperature at the actual execution cycle is calculated as:

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Current protection

æ Dt
ö
Qn = Qn -1 + ( Q final - Q n-1 ) × ç1 - e t ÷
-

è ø (Equation 34)

where:
Qn is the calculated present temperature,

Qn-1 is the calculated temperature at the previous time step,

Qfinal is the calculated final temperature with the actual current,

Dt is the time step between calculation of the actual temperature and


t is the set thermal time constant for the protected device (line or cable)

The calculated component temperature can be monitored as it is exported from the


function as a real figure.

When the component temperature reaches the set alarm level AlarmTemp the output
signal ALARM is set. When the component temperature reaches the set trip level
TripTemp the output signal TRIP is set.

There is also a calculation of the present time to operation with the present current.
This calculation is only performed if the final temperature is calculated to be above
the operation temperature:

æQ - Qoperate ö
toperate = -t × ln ç final
ç Q final - Q n ÷÷
è ø (Equation 35)

The calculated time to trip can be monitored as it is exported from the function as a
real figure TTRIP.

After a trip, caused by the thermal overload protection function, there can be a lockout
to reconnect the tripped circuit. The output lockout signal LOCKOUT is activated
when the device temperature is above the set lockout release temperature setting
ReclTemp.

The time to lockout release is calculated, i.e. a calculation of the cooling time to a set
value. The thermal content of the function can be reset with input RESET.

æQ - Qlockout _ release ö
tlockout _ release = -t × ln ç final ÷÷
ç Q final - Q n
è ø (Equation 36)

The calculated component temperature can be monitored as it is exported from the


function as a real figure.

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Current protection

In some applications the measured current can involve a number of parallel lines.
This is often used for cable lines where one bay connects several parallel cables. By
setting the parameter IMult to the number of parallel lines (cables) the actual current
on one line is used in the protection algorithm. To activate this option the input
ENMULT must be activated.

The function has a reset input: RESET. By activating this input the calculated
temperature is reset to its default initial value. This is useful during testing when
secondary injected current has given a calculated “false” temperature level.

Final Temp start signal


> TripTemp

actual temperature
Calculation
of actual
temperature

IL1, IL2, IL3 Calculation


of final
temperature

Actual Temp >


alarm signal
AlarmTemp

trip signal
Actual Temp
> TripTemp initiate lockout

Actual Temp Reset of lockout after trip


< Recl Temp

Calculation time to trip


of time to
trip

Calculation
of time to time to reset of lockout
reset of
lockout

en05000736.vsd

Figure 103: Functional overview of THL

RED 670 Technical reference manual 209


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Current protection

6.5.3 Function block


THL1-
LPTTR_26
I3P TRIP
BLOCK START
ENMULT ALARM
RESET LOCKOUT

en04000396.vsd

Figure 104: THL function block

6.5.4 Input and output signals

Table 110: Input signals for the LPTTR_26 (THL1-) function block
Signal Description
I3P Group signal for current input
BLOCK Block of function
ENMULT Current multiplyer used when THOL is for two or more lines
RESET Reset of internal thermal load counter

Table 111: Output signals for the LPTTR_26 (THL1-) function block
Signal Description
TRIP Trip
START Start Signal
ALARM Alarm signal
LOCKOUT Lockout signal

6.5.5 Setting parameters

Table 112: Parameter group settings for the LPTTR_26 (THL1-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
On
HystTemp 0 - 50 1 10 - Hysteresis for start
temperature
IBase 0 - 99999 1 3000 A Base current in A
IMult 1-5 1 1 - Current multiplier
when THOL is used
for two or more lines
IRef 0 - 400 1 100 %IB The load current (in
%of IBase) leading to
TRef temperature
Table continued on next page

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Current protection

Parameter Range Step Default Unit Description


TRef 0 - 400 1 90 Deg C End temperature of
the line when loaded
with IRef
Tau 0 - 1000 1 45 Min Time constant of the
line in minutes.
TripTemp 0 - 400 1 90 Deg C Temperature level for
trip
AlarmTemp 0 - 200 1 80 Deg C Temperature level for
start (alarm)
ReclTemp 0 - 400 1 75 Deg C Temperature for reset
of lockout after trip

6.5.6 Technical data

Table 113: Thermal overload protection, one time constant (PTTR, 26)
Function Range or value Accuracy
Reference current (0-400)% of Ibase ± 1.0% of Ir

Start temperature reference (0-400)°C ± 1.0°C


Operate time: Ip = load current before overload IEC 60255-8, class 5 + 200 ms
occurs
æ I 2 - I p2 ö Time constant t = (0–1000)
t = t × ln ç 2 ÷ minutes
ç I - Ib 2 ÷
è ø

I = Imeasured

Alarm temperature (0-200)°C ± 2.0% of heat content trip


Trip temperature (0-400)°C ± 2.0% of heat content trip
Reset level temperature (0-400)°C ± 2.0% of heat content trip

6.6 Breaker failure protection (RBRF, 50BF)

Function block name: BFPx- IEC 60617 graphical symbol:


ANSI number: 50BF
IEC 61850 logical node name:
CCRBRF 3I>BF

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Current protection

6.6.1 Introduction
The circuit breaker failure function ensures fast back-up tripping of surrounding
breakers. The breaker failure protection operation can be current based, contact based
or adaptive combination between these two principles.

A current check with extremely short reset time is used as a check criteria to achieve
a high security against unnecessary operation.

The breaker failure protection can be single- or three-phase started to allow use with
single phase tripping applications. For the three-phase version of the breaker failure
protection the current criteria can be set to operate only if two out of four e.g. two
phases or one phase plus the residual current starts. This gives a higher security to
the back-up trip command.

The function can be programmed to give a single- or three phase re-trip of the own
breaker to avoid unnecessary tripping of surrounding breakers at an incorrect starting
due to mistakes during testing.

6.6.2 Principle of operation


The breaker failure protection function is initiated from protection trip command,
either from protection functions within the protection terminal or from external
protection devices.

The start signal can be phase selective or general (for all three phases). Phase selective
start signals enable single pole re-trip function. This means that a second attempt to
open the breaker is done. The re-trip attempt can be made after a set time delay. For
transmission lines single pole trip and autoreclosing is often used. The re-trip function
can be phase selective if it is initiated from phase selective line protection. The re-
trip function can be done with or without current check. With the current check the
re-trip is only performed if the current through the circuit breaker is larger than the
operate current level.

The start signal can be an internal or external protection trip signal. If this start signal
gets high at the same time as current is detected through the circuit breaker, the back-
up trip timer is started. If the opening of the breaker is successful this is detected by
the function, both by detection of low RMS current and by a special adapted
algorithm. The special algorithm enables a very fast detection of successful breaker
opening, i.e. fast resetting of the current measurement. If the current detection has
not detected breaker opening before the back-up timer has run its time a back-up trip
is initiated. There is also a possibility to have a second back-up trip output activated
after an added settable time after the first back-up trip.

Further the following possibilities are available:

• The minimum length of the re-trip pulse, the back-up trip pulse and the back-up
trip pulse 2 are settable. The re-trip pulse, the back-up trip pulse and the back-

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Section 6
Current protection

up trip pulse 2 will however sustain as long as there is an indication of closed


breaker.
• In the current detection it is possible to use three different options: 1 out of 3
where it is sufficient to detect failure to open (high current) in one pole, 1 out of
4 where it is sufficient to detect failure to open (high current) in one pole or high
residual current and 2 out of 4 where at least two current (phase current and/or
residual current) shall be high for breaker failure detection.
• The current detection for the residual current can be set different from the setting
of phase current detection.
• It is possible to have different re-trip time delays for single phase faults and for
multi-phase faults.
• The back-up trip can be made without current check. It is possible to have this
option activated for small load currents only.
• It is possible to have instantaneous back-up trip function if a signal is high if the
circuit breaker is insufficient to clear faults, for example at low gas pressure.

Current
AND
BLOCK

Current & t1 tp
STIL1
Contact t TRRETL1
AND AND
START
OR
STL1
OR

TRRET
OR
AND AND
CBCLDL1
Contact

L2 L3

en05000832.vsd

Figure 105: Simplified logic scheme of the retrip function

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Current protection

Figure 106: Simplified logic scheme of the back-up trip function

Internal logical signals STIL1, STIL2, STIL3 have logical value 1 when current in
respective phase has magnitude larger than setting parameter IP>.

Internal logical signal STN has logical value 1 when neutral current has magnitude
larger than setting parameter IN>.

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Current protection

More than 1 current high t2MPh


AND t
1 of 3
tp
TRBU
OR

t2
1 of 4 t
OR
t3 tp
t TRBU2

2 of 3
AND

CBALARM
CBFLT CBALARM
t

en06000223.vsd

Figure 107: Simplified logic scheme of the back-up trip function

6.6.3 Function block


BFP1-
CCRBRF
I3P T RBU
BLOCK T RBU2
START T RRET
STL1 T RRET L1
STL2 T RRET L2
STL3 T RRET L3
CBCLDL1 CBALARM
CBCLDL2
CBCLDL3
CBFLT

en04000397.vsd

Figure 108: BFP function block

6.6.4 Input and output signals

Table 114: Input signals for the CCRBRF_50BF (BFP1-) function block
Signal Description
I3P Group signal for current input
BLOCK Block of function
START Three phase start of breaker failure protection function
STL1 Start signal of phase L1
Table continued on next page

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Section 6
Current protection

Signal Description
STL2 Start signal of phase L2
STL3 Start signal of phase L3
CBCLDL1 Circuit breaker closed in phase L1
CBCLDL2 Circuit breaker closed in phase L2
CBCLDL3 Circuit breaker closed in phase L3
CBFLT CB faulty, unable to trip. Back-up trip instantanously.

Table 115: Output signals for the CCRBRF_50BF (BFP1-) function block
Signal Description
TRBU Back-up trip by breaker failure protection function
TRBU2 Second back-up trip by breaker failure protection function
TRRET Retrip by breaker failure protection function
TRRETL1 Retrip by breaker failure protection function phase L1
TRRETL2 Retrip by breaker failure protection function phase L2
TRRETL3 Retrip by breaker failure protection function phase L3
CBALARM Alarm for faulty circuit breaker

6.6.5 Setting parameters

Table 116: Parameter group settings for the CCRBRF_50BF (BFP1-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
On
IBase 1 - 99999 1 3000 A Base setting for
current level settings
FunctionMode Current - Current - Detection for back-up
Contact trip Current/Cont/
Current&Contact Current and Cont
BuTripMode 2 out of 4 - 1 out of 3 - Back-up trip mode, 2
1 out of 3 out of 4, 1 out of 3 or
1 out of 4 1 out of 4
RetripMode Retrip Off - Retrip Off - Operation mode of re-
I> Check trip logic: OFF/I>
No I> Check check/No I> check
IP> 5 - 200 1 10 %IB Operate level in % of
IBase
I>BlkCont 5 - 200 1 20 %IB Current for blocking of
CB contact operation
in % of IBase
IN> 2 - 200 1 10 %IB Operate residual level
in % of IBase
t1 0.000 - 60.000 0.001 0.000 s Time delay of re-trip
Table continued on next page

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Parameter Range Step Default Unit Description


t2 0.000 - 60.000 0.001 0.150 s Time delay of back-up
trip
t2MPh 0.000 - 60.000 0.001 0.150 s Time delay of back-up
trip at multi-phase
start
t3 0.000 - 60.000 0.001 0.030 s Additional time delay
to t2 for a second
back-up trip
tCBAlarm 0.000 - 60.000 0.001 5.000 s Time delay for CB
faulty signal
tPulse 0.000 - 60.000 0.001 0.200 s Trip pulse duration

6.6.6 Technical data

Table 117: Breaker failure protection (RBRF, 50BF)


Function Range or value Accuracy
Operate phase current (5-200)% of lbase ± 1.0% of Ir at I £ Ir
± 1.0% of I at I > Ir

Reset ratio, phase current > 95% -


Operate residual current (2-200)% of lbase ± 1.0% of Ir at I £ Ir
± 1.0% of I at I > Ir

Reset ratio, residual current > 95% -


Phase current level for blocking of (5-200)% of lbase ± 1.0% of Ir at I £ Ir
contact function ± 1.0% of I at I > Ir

Reset ratio > 95% -


Timers (0.000-60.000) s ± 0.5% ± 10 ms
Operate time for current detection 10 ms typically -
Reset time for current detection 15 ms maximum -

6.7 Stub protection (PTOC, 50STB)

Function block name: STB-- IEC 60617 graphical symbol:


ANSI number: 50STB
IEC 61850 logical node name:
STBPTOC 3I>STUB

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6.7.1 Introduction
When a power line is taken out of service for maintenance and the line disconnector
is opened in multi-breaker arrangements the voltage transformers will mostly be
outside on the disconnected part. The primary line distance protection will thus not
be able to operate and must be blocked.

The stub protection covers the zone between the current transformers and the open
disconnector. The three phase instantaneous overcurrent function is released from a
NO (b) auxiliary contact on the line disconnector.

6.7.2 Principle of operation


The sampled analogue phase currents are pre-processed in a discrete Fourier filter
(DFT) block. From the fundamental frequency components of each phase current the
RMS value of each phase current is derived. These phase current values are fed to
the STB function. In a comparator the RMS values are compared to the set operation
current value of the function I>. If a phase current is larger than the set operation
current a signal from the comparator for this phase is set to true. This signal will, in
combination with a release signal, activate the timer of this function. If the fault
current remains during the set timer delay t the function gives a trip signal.

STUB PROTECTION FUNCTION

BLOCK

TRIP
STIL1 AND

STIL2 OR

STIL3

RELEASE

en05000731.vsd

Figure 109: Simplified logic diagram for the stub protection

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6.7.3 Function block


STB1-
STBPTOC_50STB
I3P TRIP
BLOCK START
BLKTR
RELEASE

en05000678.vsd

Figure 110: STB function block

6.7.4 Input and output signals

Table 118: Input signals for the STBPTOC_50STB (STB1-) function block
Signal Description
I3P Group signal for current input
BLOCK Block of function
BLKTR Block of trip
RELEASE Release of stub protection

Table 119: Output signals for the STBPTOC_50STB (STB1-) function block
Signal Description
TRIP Trip
START General start

6.7.5 Setting parameters

Table 120: Parameter group settings for the STBPTOC_50STB (STB1-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
On
IBase 1 - 99999 1 3000 A Base setting for
current values
ReleaseMode Release - Release - Release of stub
Continuous protection
I> 1 - 2500 1 200 %IB Operate current level
in % of IBase
t 0.000 - 60.000 0.001 0.000 s Time delay

6.7.6 Technical data

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Table 121: Stub protection (PTOC, 50STB)


Function Range or value Accuracy
Operate current (1-2500)% of Ibase ± 1.0% of Ir at I £ Ir
± 1.0% of I at I > Ir

Reset ratio > 95% -


Definite time (0.000-60.000) s ± 0.5% ± 10 ms
Operate time, start function 25 ms typically at 0 to 2 x Iset -

Reset time, start function 25 ms typically at 2 to 0 x Iset -

Critical impulse time 10 ms typically at 0 to 2 x Iset -

Impulse margin time 15 ms typically -

6.8 Pole discordance protection (RPLD, 52PD)

Function block name: PDx-- IEC 60617 graphical symbol:


ANSI number: 50PD
IEC 61850 logical node name:
CCRPLD PD

6.8.1 Introduction
Single pole operated circuit breakers can due to electrical or mechanical failures end
up with the different poles in different positions (close-open). This can cause negative
and zero sequence currents which gives thermal stress on rotating machines and can
cause unwanted operation of zero sequence current functions.

Normally the own breaker is tripped to correct the positions. If the situation consists
the remote end can be intertripped to clear the unsymmetrical load situation.

The pole discordance function operates based on information from auxiliary contacts
of the circuit breaker for the three phases with additional criteria from unsymmetrical
phase current when required.

6.8.2 Principle of operation


The detection of pole discordance can be made in two different ways. If the contact
based function is used an external logic can be made by connecting the auxiliary
contacts of the circuit breaker so that a pole discordance is indicated. This is shown
in figure 111

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C.B.

poleDiscordance Signal from C.B.

en05000287.vsd

Figure 111: Pole discordance external detection logic

This single binary signal is connected to a binary input of the IED. The appearance
of this signal will start a timer that will give a trip signal after the set delay.

There is also a possibility to connect all phase selective auxiliary contacts (phase
contact open and phase contact closed) to binary inputs of the IED. This is shown in
figure 112

C.B.

poleOneClosed from C.B.

poleTwoClosed from C.B.

poleThreeClosed from C.B.

+
poleOneOpened from C.B.

poleTwoOpened from C.B.

poleThreeOpened from C.B.

en05000288.vsd

Figure 112: Pole discordance signals for internal logic

In this case the logic is realized within the function. If the inputs are indicating pole
discordance the trip timer is started. This timer will give a trip signal after the set
delay.

Pole discordance can also be detected by means of phase selective current


measurement. The sampled analogue phase currents are pre-processed in a discrete
Fourier filter (DFT) block. From the fundamental frequency components of each
phase current the RMS value of each phase current is derived. These phase current

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values are fed to the PD function. The difference between the smallest and the largest
phase current is derived. If this difference is larger than a set ratio the trip timer is
started. This timer will give a trip signal after the set delay. The current based pole
discordance function can be set to be active either continuously or only directly in
connection to breaker open or close command.

The function also has a binary input that can be configured from the autoreclosing
function, so that the pole discordance function can be blocked during sequences with
a single pole open if single pole autoreclosing is used.

The simplified block diagram of the current and contact based pole discordance
function is shown in figure 113.

BLOCK
OR
BLKDBYAR

PolPosAuxCont

AND
POLE1OPN
POLE1CL
POLE2OPN
Discordance
POLE2CL
detection
POLE3OPN
POLE3CL t 150 ms
t TRIP
AND
OR

PD Signal from CB
AND
EXTPDIND

CLOSECMD t+200 ms
OR
OPENCMD

AND

Unsymmetry current
detection

en05000747.vsd

Figure 113: Simplified block diagram of pole discordance function - contact and
current based

The pole discordance function is disabled if:

• The terminal is in TEST mode (TEST-ACTIVE is high) and the function has
been blocked from the HMI (BlockPD=Yes)
• The input signal BLOCK is high
• The input signal BLKDBYAR is high

The BLOCK signal is a general purpose blocking signal of the pole discordance
function. It can be connected to a binary input of the terminal in order to receive a
block command from external devices or can be software connected to other internal
functions of the terminal itself in order to receive a block command from internal
functions. Through OR gate it can be connected to both binary inputs and internal
function outputs.

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The BLKDBYAR signal blocks the pole discordance operation when a single phase
autoreclosing cycle is in progress. It can be connected to the output signal AR01-1PT1
if the autoreclosing function is integrated in the terminal; if the autoreclosing function
is an external device, then BLKDBYAR has to be connected to a binary input of the
terminal and this binary input is connected to a signalization “1phase autoreclosing
in progress” from the external autoreclosing device.

If the pole discordance function is enabled, then two different criteria will generate
a trip signal TRIP:

• Pole discordance signalling from the circuit breaker.


• Unsymmetrical current detection.

6.8.2.1 Pole discordance signalling from circuit breaker

If one or two poles of the circuit breaker have failed to open or to close (pole
discordance status), then the function input EXTPDIND is activated from the pole
discordance signal derived from the circuit breaker auxiliary contacts (one NO contact
for each phase connected in parallel, and in series with one NC contact for each phase
connected in parallel) and, after a settable time interval t (0-60 s), a 150 ms trip pulse
command TRIP is generated by the pole discordance function.

6.8.2.2 Unsymmetrical current detection

Unsymmetrical current detection is based on checking that:

• any phase current is lower than 80% of the highest current in the remaining two
phases
• the highest phase current is greater than 10% of the rated current

If these conditions are true, an unsymmetrical condition is detected and the internal
signal INPS is turned high. This detection is enabled to generate a trip after a set time
delay t (0-60 s) if the detection occurs in the next 200 ms after the circuit breaker has
received a command to open trip or close and if the unbalance persists. The 200 ms
limitation is for avoiding unwanted operation during unsymmetrical load conditions.

The pole discordance function is informed that a trip or close command has been
given to the circuit breaker through the inputs CLOSECMD (for closing command
information) and OPENCMD (for opening command information). These inputs can
be connected to terminal binary inputs if the information are generated from the field
(i.e. from auxiliary contacts of the close and open push buttons) or may be software
connected to the outputs of other integrated functions (i.e. close command from a
control function or a general trip from integrated protections).

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6.8.3 Function block


PD01-
CCRPLD
I3P T RIP
BLOCK ST ART
BLKDBYAR
CLOSECMD
OPENCMD
EXT PDIND
POLE1OPN
POLE1CL
POLE2OPN
POLE2CL
POLE3OPN
POLE3CL

en05000321.vsd

Figure 114: PD function block

6.8.4 Input and output signals

Table 122: Input signals for the CCRPLD_52PD (PD01-) function block
Signal Description
I3P Group signal for current input
BLOCK Block of function
BLKDBYAR Block of function at CB single phase auto re-closing cycle
CLOSECMD Close order to CB
OPENCMD Open order to CB
EXTPDIND Pole discordance signal from CB logic
POLE1OPN Pole one opened indication from CB
POLE1CL Pole one closed indication from CB
POLE2OPN Pole two opened indication from CB
POLE2CL Pole two closed indication from CB
POLE3OPN Pole three opened indication from CB
POLE3CL Pole three closed indication from CB

Table 123: Output signals for the CCRPLD_52PD (PD01-) function block
Signal Description
TRIP Trip signal to CB
START Trip condition TRUE, waiting for time delay

6.8.5 Setting parameters

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Current protection

Table 124: Parameter group settings for the CCRPLD_52PD (PD01-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
On
IBase 1 - 99999 1 3000 A Base setting for
current levels
TimeDelayTrip 0.000 - 60.000 0.001 0.300 s Time delay between
trip condition and trip
signal
ContSel Off - Off - Contact function
PD signal from CB selection
Pole pos aux cont.
CurrSel Off - Off - Current function
CB oper monitor selection
Continuous
monitor
CurrUnsymLevel 0 - 100 1 80 % Unsym magn of
lowest phase current
compared to the
highest.
CurrRelLevel 0 - 100 1 10 %IB Current magnitude for
release of the function
in % of IBase

6.8.6 Technical data

Table 125: Pole discordance protection (RPLD, 52PD)


Function Range or value Accuracy
Operate current (0–100% of Ibase ± 1.0% of Ir

Time delay (0.000-60.000) s ± 0.5% ± 10 ms

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226
Section 7
Voltage protection

Section 7 Voltage protection

About this chapter


This chapter describes voltage related protection functions. The way the functions
work, their setting parameters, function blocks, input and output signals and technical
data are included for each function.

7.1 Two step undervoltage protection (PUVM, 27)

Function block name: TUVx- IEC 60617 graphical symbol:


ANSI number: 27
IEC 61850 logical node name:
PH2PUVM 3U<

7.1.1 Introduction
Undervoltages can occur in the power system during faults or abnormal conditions.
The function can be used to open circuit breakers to prepare for system restoration at
power outages or as long-time delayed back-up to primary protection.

The function has two voltage steps, each with inverse or definite time delay.

7.1.2 Principle of operation


The two-step undervoltage protection function (TUV) is used to detect low power
system voltage. The function has two voltage measuring steps with separate time
delays. If one, two or three phase voltages decrease below the set value, a
corresponding start signal is issued. TUV can be set to start/trip based on "one out of
three", "two out of three", or "three out of three" of the measured phase voltages,
being below the set point. If the phase voltage remains below the set value for a time
period corresponding to the chosen time delay, the corresponding trip signal is issued.
To avoid an unwanted trip due to disconnection of the related high voltage equipment,
a voltage controlled blocking of the function is available, i.e. if the voltage is lower
than the set blocking level the function is blocked and no start or trip signal is issued.
The time delay characteristic is individually chosen for each step and can be either
definite time delay or inverse time delay.

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Voltage protection

The voltage related settings are made in percent of the base voltage, which is set in
kV, phase-phase.

The undervoltage protection function measures the phase to earth voltages, if the
voltage transformer is connected phase to earth to the analogue voltage inputs. The
setting of the analogue inputs are given as primary phase to phase voltage and
secondary phase to phase voltage. The function will operate if the phase to earth
voltage gets lover than the set percentage of the phase to earth voltage corresponding
to the set base voltage UBase. This means operation for phase to earth voltage under:

U < (%) × UBase( kV )


3 (Equation 38)

If the voltage transformer is connected phase to phase to the analogue input, the setting
of the analogue inputs are given as primary phase to phase voltage and secondary
phase to phase voltage divided by √ 3. The function will operate if the phase to phase
voltage gets lover than the set percentage of the phase to phase voltage corresponding
to the set base voltage UBase.

7.1.2.1 Measurement principle

All the three phase to earth voltages are measured continuously, and compared with
the set values, U1< and U2<. The parameters OpMode1 and OpMode2 influence the
requirements to activate the start outputs. Either "1 out of 3", "2 out of 3" or "3 out
of 3" phases have to be lower than the corresponding set point to issue the
corresponding start signal.

To avoid oscillations of the output start signal, a hysteresis has been included.

7.1.2.2 Time delay

The time delay for the two steps can be either definite time delay (DT) or inverse time
delay (IDMT). For the inverse time delay three different modes are available; inverse
curve A, inverse curve B, and a programmable inverse curve.

The type A curve is described as:

k
t=
æ U < -U ö
ç ÷
è U< ø (Equation 39)

The type B curve is described as:

k × 480
t= 2.0
+ 0.055
æ U < -U ö
ç 32 × - 0.5 ÷
è U< ø (Equation 40)

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Voltage protection

The programmable curve can be created as:

é ù
ê ú
k×A
t=ê ú+D
êæ U < -U ö ú
p

êç B × -C÷ ú
ëè U< ø û (Equation 41)

When the denominator in the expression is equal to zero the time delay will be infinity.
There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set
to compensate for this phenomenon. In the voltage interval U< down to U< *(1.0 –
CrvSatn/100) the used voltage will be: U< *(1.0 – CrvSatn/100). If the programmable
curve is used this parameter must be calculated so that:

CrvSatn
B× -C > 0
100 (Equation 42)

The lowest phase voltage is always used for the inverse time delay integration, see
figure 115. The details of the different inverse time characteristics are shown in
section "Inverse characteristics".

Voltage

UL1
UL2
UL3

IDMT Voltage

Time

en05000009.vsd

Figure 115: Voltage used for the inverse time characteristic integration

Trip signal issuing requires that the undervoltage condition continues for at least the
user set time delay. This time delay is set by the parameter t1 and t2 for definite time
mode (DT) and by some special voltage level dependent time curves for the inverse
time mode (IDMT). If the start condition, with respect to the measured voltage ceases

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Voltage protection

during the delay time, and is not fulfilled again within a user defined reset time
(tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the inverse
time) the corresponding start output is reset. Here it should be noted that after leaving
the hysteresis area, the start condition must be fulfilled again and it is not sufficient
for the signal to only return back to the hysteresis area. Note that for the undervoltage
function the IDMT reset time is constant and does not depend on the voltage
fluctuations during the drop-off period. However, there are three ways to reset the
timer, either the timer is reset instantaneously, or the timer value is frozen during the
reset time, or the timer value is linearly decreased during the reset time. See
figure 116 and figure 117.

tReset
tReset 1
Voltage 1 Measured
START Voltage
Hysteresis
TRIP

U1<

Time

START t1

TRIP

Time
Integrator Froozen Timer

t1

Time
Instantaneous
Linear Decrease
Reset en05000010.vsd

Figure 116: Voltage profile not causing a reset of the start signal for step 1, and definite time delay

230 Technical reference manual RED 670


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Voltage protection

tReset1
Voltage
tReset1
START
START
Hysteresis Measured Voltage
TRIP

U1<

Time

START t1

TRIP

Time Integrator
Froozen Timer

t1

Time
Instantaneous
Linear Decrease
Reset en05000011.vsd

Figure 117: Voltage profile causing a reset of the start signal for step 1, and definite time delay

7.1.2.3 Blocking

The undervoltage function can be partially or totally blocked, by binary input signals
or by parameter settings, where:

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Voltage protection

BLOCK: blocks all outputs


BLKTR1: blocks all trip outputs of step 1
BLKST1: blocks all start and trip outputs related to step 1
BLKTR2: blocks all trip outputs of step 2
BLKST2: blocks all start and trip outputs related to step 2

If the measured voltage level decreases below the setting of IntBlkStVal1, either the
trip output of step 1, or both the trip and the start outputs of step 1, are blocked. The
characteristic of the blocking is set by the IntBlkSel1 parameter. This internal blocking
can also be set to "off" resulting in no voltage based blocking. Corresponding settings
and functionality are valid also for step 2.

In case of disconnection of the high voltage component the measured voltage will get
very low. The event will start both the under voltage function and the blocking
function, as seen in figure 118. The delay of the blocking function must be set less
than the time delay of under voltage function.

U Disconnection

Normal voltage

U1<

U2<

tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2

Time

Block step 1

Block step 2
en05000466.vsd

Figure 118: Blocking function.

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Voltage protection

7.1.2.4 Design

The voltage measuring elements continuously measure the phase-to-neutral voltages


in all three phases. Recursive Fourier filters filter the input voltage signals. The phase
voltages are individually compared to the set value, and the lowest phase voltage is
used for the inverse time characteristic integration. A special logic is included to
achieve the "1 out of 3", "2 out of 3" and "3 out of 3" criteria to fulfill the start
condition. The design of the TimeUnderVoltage function is schematically described
in figure 119.

UL1 Comparator ST1L1


UL1 < U1< Phase 1
Voltage Phase
Selector ST1L2
UL2 Comparator OpMode1 Phase 2
UL2 < U1< 1 out of 3
2 out of 3 ST1L3
Phase 3 Start
UL3 Comparator 3 out of 3
&
UL3 < U1< Trip ST1
OR
Output
START Logic TR1L1

Step 1
Time integrator TR1L2
MinVoltSelect t1 TRIP
or tReset1
ResetTypeCrv1 TR1L3

TR1
OR

Comparator ST2L1
UL1 < U2< Phase 1
Voltage Phase
Selector ST2L2
Comparator OpMode2 Phase 2
UL2 < U2< 1 out of 3
2 outof 3 ST2L3
Phase 3 Start
Comparator 3 out of 3
&
UL3 < U2< Trip ST2
Output OR

START Logic TR2L1

Step 2
Time integrator TR2L2
MinVoltSelect t2 TRIP
or tReset2
ResetTypeCrv2 TR2L3

TR2
OR

OR START

TRIP
OR

en05000012.vsd

Figure 119: Schematic design of the TUV function

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Voltage protection

7.1.3 Function block


T UV1-
PH2PUVM
U3P T RIP
BLOCK TR1
BLKT R1 T R1L1
BLKST1 T R1L2
BLKT R2 T R1L3
BLKST2 TR2
T R2L1
T R2L2
T R2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3

en05000330.vsd

Figure 120: TUV function block

7.1.4 Input and output signals

Table 126: Input signals for the PH2PUVM_27 (TUV1-) function block
Signal Description
U3P Group signal for voltage input
BLOCK Block of function
BLKTR1 Block of operate signal, step 1
BLKST1 Block of step 1
BLKTR2 Block of operate signal, step 2
BLKST2 Block of step 2

Table 127: Output signals for the PH2PUVM_27 (TUV1-) function block
Signal Description
TRIP Operate signal
TR1 Operate signal for step 1
TR1L1 Operate signal for phase 1, step 1
TR1L2 Operate signal for phase 2, step 1
TR1L3 Operate signal for phase 3, step 1
TR2 Operate signal for step 2
TR2L1 Operate signal for phase 1, step 2
TR2L2 Operate signal for phase 2, step 2
TR2L3 Operate signal for phase 3, step 2
Table continued on next page

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Voltage protection

Signal Description
START Start signal
ST1 Start signal for step1
ST1L1 Start signal for phase 1, step 1
ST1L2 Start signal for phase 2, step 1
ST1L3 Start signal for phase 3, step 1
ST2 Start signal for step 2
ST2L1 Start signal for phase 1, step 2
ST2L2 Start signal for phase 2, step 2
ST2L3 Start signal for phase 3, step 2

7.1.5 Setting parameters

Table 128: Basic parameter group settings for the PH2PUVM_27 (TUV1-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
On
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage, phase-
phase in kV
Characterist1 Definite time - Definite time - Operation
Inverse curve A characteristic
Inverse curve B selection, step 1
Prog. inv. curve
OpMode1 1 out of 3 - 1 out of 3 - Operation Mode, 1
2 out of 3 out of 3 / 2 out of 3 / 3
3 out of 3 out of 3, step 1
U1< 1 - 100 1 70 %UB Voltage setting/start
val (DT & IDMT) in %
of UBase, step 1
t1 0.000 - 60.000 0.001 5.000 s Operate time delay in
DT mode, step 1.
t1Min 0.000 - 60.000 0.001 5.000 s Minimum operate
time in IDMT mode
(s), step 1
k1 0.05 0.01 0.05 - 1.10 - Time multiplier in
IDMT mode, step 1
IntBlkSel1 Off - Off - Internal (low level)
Block of trip blocking mode, step 1
Block all
IntBlkStVal1 1 - 100 1 20 %UB Voltage setting for
internal blocking in %
of UBase, step 1
tBlkUV1 0.000 - 60.000 0.001 0.000 s Time delay of internal
(low level) blocking for
step 1
HystAbs1 0.0 - 100.0 0.1 0.5 %UB Absolute hysteresis in
% of UBase, step 1
Table continued on next page

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Voltage protection

Parameter Range Step Default Unit Description


HystAbsIntBlk1 0.0 - 100.0 0.1 0.5 %UB Abs hysteresis for
internal blocking in %
of UBase, step 1
Characterist2 Definite time - Definite time - Operation
Inverse curve A characteristic
Inverse curve B selection, step 2
Prog. inv. curve
OpMode2 1 out of 3 - 1 out of 3 - Operation Mode, 1
2 out of 3 out of 3 / 2 out of 3 / 3
3 out of 3 out of 3, step 2
U2< 1 - 100 1 50 %UB Voltage setting/start
val (DT & IDMT) in %
of UBase, step 2
t2 0.000 - 60.000 0.001 5.000 s Operate time delay in
DT mode, step 2
t2Min 0.000 - 60.000 0.001 5.000 s Minimum operate
time in IDMT mode
(s), step 2
k2 0.05 0.01 0.05 - 1.10 - Time multiplier in
IDMT mode, step 2
IntBlkSel2 Off - Off - Internal (low level)
Block of trip blocking mode, step 2
Block all
IntBlkStVal2 1 - 100 1 20 %UB Voltage setting for
internal blocking in %
of UBase, step 2
tBlkUV2 0.000 - 60.000 0.001 0.000 s Time delay of internal
(low level) blocking for
step 2
HystAbs2 0.0 - 100.0 0.1 0.5 %UB Absolute hysteresis in
% of UBase, step 2
HystAbsIntBlk2 0.0 - 100.0 0.1 0.5 %UB Abs hysteresis for
internal blocking in %
of UBase, step 2

Table 129: Advanced parameter group settings for the PH2PUVM_27 (TUV1-) function
Parameter Range Step Default Unit Description
tReset1 0.000 - 60.000 0.001 0.025 s Time delay in DT
reset (s), step 1
ResetTypeCrv1 Instantaneous - Instantaneous - IDMT mode reset type
Frozen timer selector, step 1
Linearly
decreased
tIReset1 0.000 - 60.000 0.001 0.025 s Time delay in IDMT
reset (s), step 1
ACrv1 1.000 0.001 0.005 - 200.000 - Setting A for
programmable under
voltage IDMT curve,
step 1
Table continued on next page

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1MRK505132-UEN rev. D
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Voltage protection

Parameter Range Step Default Unit Description


BCrv1 1.00 0.01 0.50 - 100.00 - Setting B for
programmable under
voltage IDMT curve,
step 1
CCrv1 0.0 0.1 0.0 - 1.0 - Setting C for
programmable under
voltage IDMT curve,
step 1
DCrv1 0.000 0.001 0.000 - 60.000 - Setting D for
programmable under
voltage IDMT curve,
step 1
PCrv1 1.000 0.001 0.000 - 3.000 - Setting P for
programmable under
voltage IDMT curve,
step 1
CrvSat1 0 - 100 1 0 % Tuning param for
prog. under voltage
IDMT curve, step 1
tReset2 0.000 - 60.000 0.001 0.025 s Time delay in DT
reset (s), step 2
ResetTypeCrv2 Instantaneous - Instantaneous - IDMT mode reset type
Frozen timer selector, step 2
Linearly
decreased
tIReset2 0.000 - 60.000 0.001 0.025 s Time delay in IDMT
reset (s), step 2
ACrv2 1.000 0.001 0.005 - 200.000 - Setting A for
programmable under
voltage IDMT curve,
step 2
BCrv2 1.00 0.01 0.50 - 100.00 - Setting B for
programmable under
voltage IDMT curve,
step 2
CCrv2 0.0 0.1 0.0 - 1.0 - Setting C for
programmable under
voltage IDMT curve,
step 2
DCrv2 0.000 0.001 0.000 - 60.000 - Setting D for
programmable under
voltage IDMT curve,
step 2
PCrv2 1.000 0.001 0.000 - 3.000 - Setting P for
programmable under
voltage IDMT curve,
step 2
CrvSat2 0 - 100 1 0 % Tuning param for
prog. under voltage
IDMT curve, step 2

7.1.6 Technical data

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Voltage protection

Table 130: Two step undervoltage protection (PUVM, 27)


Function Range or value Accuracy
Operate voltage, low and high (1–100)% of Ubase ± 1.0% of Ur
step
Absolute hysteresis (0–100)% of Ubase ± 1.0% of Ur

Internal blocking level, low and (1–100)% of Ubase ± 1.0% of Ur


high step
Inverse time characteristics for - See table 438
low and high step, see table 438
Definite time delays (0.000-60.000) s ± 0.5% ±10 ms
Minimum operate time, inverse (0.000–60.000) s ± 0.5% ± 10 ms
characteristics
Operate time, start function 25 ms typically at 2 to 0 x Uset -

Reset time, start function 25 ms typically at 0 to 2 x Uset -

Critical impulse time 10 ms typically at 2 to 0 x Uset -

Impulse margin time 15 ms typically -

7.2 Two step overvoltage protection (POVM, 59)

Function block name: TOVx- IEC 60617 graphical symbol:


ANSI number: 59
IEC 61850 logical node name:
PH2POVM 3U>

7.2.1 Introduction
Overvoltages will occur in the power system during abnormal conditions such as
sudden power loss, tap changer regulating failures, open line ends on long lines.

The function can be used as open line end detector, normally then combined with
directional reactive over-power function or as system voltage supervision, normally
then giving alarm only or switching in reactors or switch out capacitor banks to control
the voltage.

The function has two voltage steps, each of them with inverse or definite time delayed.

The overvoltage function has an extremely high reset ratio to allow setting close to
system service voltage.

7.2.2 Principle of operation

238 Technical reference manual RED 670


1MRK505132-UEN rev. D
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The two-step overvoltage protection function (TOV) is used to detect high power
system voltage. The function has two steps with separate time delays. If one, two or
three phase voltages increase above the set value, a corresponding start signal is
issued. TOV can be set to start/trip based on "one out of three", "two out of three",
or "three out of three" of the measured phase voltages, being above the set point. If
the phase voltage remains above the set value for a time period corresponding to the
chosen time delay, the corresponding trip signal is issued. The time delay
characteristic is individually chosen for the two steps and can be either definite time
delay or inverse time delay.

The voltage related settings are made in percent of the base voltage, which is set in
kV, phase-phase.

The overvoltage protection function measures the phase to earth voltages, if the
voltage transformer is connected phase to earth to the analogue voltage inputs. The
setting of the analogue inputs are given as primary phase to phase voltage and
secondary phase to phase voltage. The function will operate if the phase to earth
voltage gets higher than the set percentage of the phase to earth voltage corresponding
to the set base voltage UBase. This means operation for phase to earth voltage over

U > (%) × UBase( kV )


3 (Equation 43)

If the voltage transformer is connected phase to phase to the analogue input, the setting
of the analogue inputs are given as primary phase to phase voltage and secondary
phase to phase voltage divided by √3. The function will operate if the phase to phase
voltage gets higher than the set percentage of the phase to phase voltage corresponding
to the set base voltage UBase.

7.2.2.1 Measurement principle

All the three phase voltages are measured continuously, and compared with the set
values, U1> and U2>. The parameters OpMode1 and OpMode2 influence the
requirements to activate the start outputs. Either "1 out of 3", "2 out of 3" or "3 out
of 3" phases have to be higher than the corresponding set point to issue the
corresponding start signal.

To avoid oscillations of the output start signal, a hysteresis has been included.

7.2.2.2 Time delay

The time delay for the two steps can be either definite time delay (DT) or inverse time
delay (IDMT). For the inverse time delay four different modes are available; inverse
curve A, inverse curve B, inverse curve C, and a programmable inverse curve.

The type A curve is described as:

RED 670 Technical reference manual 239


1MRK505132-UEN rev. D
Section 7
Voltage protection

k
t=
æ U < -U ö
ç ÷
è U< ø (Equation 44)

The type B curve is described as:

k × 480
t= 2.0
æ U -U > ö
ç 32 × - 0.5 ÷ - 0.035
è U> ø (Equation 45)

The type C curve is described as:

k × 480
t= 3.0
æ U -U > ö
ç 32 × - 0.5 ÷ - 0.035
è U> ø (Equation 46)

The programmable curve can be created as:

k×A
t= p
+D
æ U -U > ö
çB× -C÷
è U> ø (Equation 47)

When the denominator in the expression is equal to zero the time delay will be infinity.
There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set
to compensate for this phenomenon. In the voltage interval U< down to U< *(1.0 –
CrvSatn/100) the used voltage will be: U< *(1.0 – CrvSatn/100). If the programmable
curve is used this parameter must be calculated so that:

CrvSatn
B× -C > 0
100 (Equation 48)

The highest phase voltage is always used for the inverse time delay integration, see
figure 121. The details of the different inverse time characteristics are shown in
section "Inverse characteristics"

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1MRK505132-UEN rev. D
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Voltage protection

Voltage
IDMT Voltage

UL1
UL2
UL3

Time

en05000016.vsd

Figure 121: Voltage used for the inverse time characteristic integration

Trip signal issuing requires that the overvoltage condition continues for at least the
user set time delay. This time delay is set by the parameter t1 and t2 for definite time
mode (DT) and by selected voltage level dependent time curves for the inverse time
mode (IDMT). If the start condition, with respect to the measured voltage ceases
during the delay time, and is not fulfilled again within a user defined reset time
(tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the inverse
time) the corresponding start output is reset, after that the defined reset time has
elapsed. Here it should be noted that after leaving the hysteresis area, the start
condition must be fulfilled again and it is not sufficient for the signal to only return
back to the hysteresis area. It is also remarkable that for the overvoltage function the
IDMT reset time is constant and does not depend on the voltage fluctuations during
the drop-off period. However, there are three ways to reset the timer, either the timer
is reset instantaneously, or the timer value is frozen during the reset time, or the timer
value is linearly decreased during the reset time. See figure 122 and figure 123.

RED 670 Technical reference manual 241


1MRK505132-UEN rev. D
Section 7
Voltage protection

tReset1

tReset1
Voltage
START
TRIP

U1>

Hysteresis
Measured Voltage

Time

START t1

TRIP

Time Integrator
Linear Decrease
Froozen Timer

t1

Instantaneous Time
Reset
en05000017.vsd

Figure 122: Voltage profile note causing a reset of the start signal for step 1, and definite time delay

242 Technical reference manual RED 670


1MRK505132-UEN rev. D
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Voltage protection

tReset1
Voltage tReset1
START
START TRIP
Hysteresis

U1>

Measured Voltage

Time

START t1

TRIP

Time Integrator
Froozen Timer

t1

Time
Instantaneous
Linear Decrease
Reset en05000018.vsd

Figure 123: Voltage profile causing a reset of the start signal for step 1, and definite time delay

7.2.2.3 Blocking

The overvoltage function can be partially or totally blocked, by binary input signals
where:

RED 670 Technical reference manual 243


1MRK505132-UEN rev. D
Section 7
Voltage protection

BLOCK: blocks all outputs


BLKTR1: blocks all trip outputs of step 1
BLKST1: blocks all start and trip outputs related to step 1
BLKTR2: blocks all trip outputs of step 2
BLKST2: blocks all start and trip outputs related to step 2

7.2.2.4 Design

The voltage measuring elements continuously measure the phase-to-neutral voltages


in all three phases. Recursive Fourier filters filter the input voltage signals. The phase
voltages are individually compared to the set value, and the highest phase voltage is
used for the inverse time characteristic integration. A special logic is included to
achieve the "1 out of 3", "2 out of 3" and "3 out of 3" criteria to fulfill the start
condition. The design of the TimeOverVoltage function is schematically described
in figure 124.

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1MRK505132-UEN rev. D
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Voltage protection

UL1 Comparator ST1L1


UL1 > U1> Phase 1
Voltage Phase
Selector ST1L2
UL2 Comparator OpMode1 Phase 2
UL2 > U1> 1 out of 3
2 outof 3 ST1L3
3 out of 3 Phase 3 Start
UL3 Comparator &
UL3 > U1> Trip ST1
OR
Output
START Logic TR1L1
Step 1
Time integrator TR1L2
MaxVoltSelect t1 TRIP
or tReset1
ResetTypeCrv1 TR1L3

OR TR1

Comparator ST2L1
UL1 > U2> Phase 1
Voltage Phase
Selector ST2L2
Comparator OpMode2 Phase 2
UL2 > U2> 1 out of 3
2 outof 3 ST2L3
3 out of 3 Phase 3 Start
Comparator &
UL3 > U2> Trip ST2
OR
Output
START Logic TR2L1
Step 2
Time integrator TR2L2
MaxVoltSelect t2 TRIP
or tReset2
ResetTypeCrv2 TR2L3

TR2
OR

START
OR

TRIP
OR

en05000013.vsd

Figure 124: Schematic design of the TimeOverVoltage function

RED 670 Technical reference manual 245


1MRK505132-UEN rev. D
Section 7
Voltage protection

7.2.3 Function block


T OV1-
PH2POVM
U3P T RIP
BLOCK TR1
BLKT R1 T R1L1
BLKST1 T R1L2
BLKT R2 T R1L3
BLKST2 TR2
T R2L1
T R2L2
T R2L3
ST ART
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3

en05000328.vsd

Figure 125: TOV function block

7.2.4 Input and output signals

Table 131: Input signals for the PH2POVM_59 (TOV1-) function block
Signal Description
U3P Group signal for three phase voltage input
BLOCK Block of function
BLKTR1 Block of operate signal, step 1
BLKST1 Block of step 1
BLKTR2 Block of operate signal, step 2
BLKST2 Block of step 2

Table 132: Output signals for the PH2POVM_59 (TOV1-) function block
Signal Description
TRIP Operate signal
TR1 Operate signal for step 1
TR1L1 Operate signal from phase 1, step 1
TR1L2 Operate signal from phase 2, step 1
TR1L3 Operate signal from phase 3, step 1
TR2 Operate signal for step 2
TR2L1 Operate signal from phase 1, step 2
TR2L2 Operate signal from phase 2, step 2
TR2L3 Operate signal from phase 3, step 2
Table continued on next page

246 Technical reference manual RED 670


1MRK505132-UEN rev. D
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Voltage protection

Signal Description
START Start signal
ST1 Start signal for step1
ST1L1 Start signal from phase 1, step 1
ST1L2 Start signal from phase 2, step 1
ST1L3 Start signal from phase 3, step 1
ST2 Start signal for step 2
ST2L1 Start signal from phase 1, step 2
ST2L2 Start signal from phase 2, step 2
ST2L3 Start signal from phase 3, step 2

7.2.5 Setting parameters

Table 133: Parameter group settings for the PH2POVM_59 (TOV1-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
On
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage, phase-
phase in kV
Characterist1 Definite time - Definite time - Operation
Inverse curve A charcteristic
Inverse curve B selection, step 1
Inverse curve C
Prog. inv. curve
OpMode1 1 out of 3 - 1 out of 3 - Operation mode, 1
2 out of 3 out of 3 / 2 out of 3 / 3
3 out of 3 out of 3, step 1
U1> 1 - 200 1 120 %UB Voltage setting/start
val (DT & IDMT) in %
of UBase, step 1
t1 0.000 - 60.000 0.001 5.000 s Operate time delay in
DT mode, step 1.
tReset1 0.000 - 60.000 0.001 0.025 s Time delay in DT
reset (s), step 1
t1Min 0.000 - 60.000 0.001 5.000 s Minimum operate
time in IDMT mode
(s), step 1
ResetTypeCrv1 Instantaneous - Instantaneous - IDMT mode reset type
Frozen timer selector, step 1
Linearly
decreased
tIReset1 0.000 - 60.000 0.001 0.025 s Time delay in IDMT
reset (s), step 1
k1 0.05 - 1.10 0.01 0.05 - Time multiplier in
IDMT mode, step 1
Table continued on next page

RED 670 Technical reference manual 247


1MRK505132-UEN rev. D
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Voltage protection

Parameter Range Step Default Unit Description


ACrv1 0.005 - 200.000 0.001 1.000 - Setting A for
programmable over
voltage IDMT curve,
step 1
BCrv1 0.50 - 100.00 0.01 1.00 - Setting B for
programmable over
voltage IDMT curve,
step 1
CCrv1 0.0 - 1.0 0.1 0.0 - Setting C for
programmable over
voltage IDMT curve,
step 1
DCrv1 0.000 - 60.000 0.001 0.000 - Setting D for
programmable over
voltage IDMT curve,
step 1
PCrv1 0.000 - 3.000 0.001 1.000 - Setting P for
programmable over
voltage IDMT curve,
step 1
CrvSat1 0 - 100 1 0 % Tuning param for
prog. over voltage
IDMT curve, step 1
HystAbs1 0.0 - 100.0 0.1 0.5 %UB Absolute hysteresis in
% of UBase, step 1
Characterist2 Definite time - Definite time - Operation
Inverse curve A characteristic
Inverse curve B selection, step 2
Inverse curve C
Prog. inv. curve
OpMode2 1 out of 3 - 1 out of 3 - Operation mode, 1
2 out of 3 out of 3 / 2 out of 3 / 3
3 out of 3 out of 3, step 2
U2> 1 - 200 1 180 %UB Voltage setting/start
val (DT & IDMT) in %
of UBase, step 2
t2 0.000 - 60.000 0.001 5.000 s Operate time delay in
DT mode, step 2
tReset2 0.000 - 60.000 0.001 0.025 s Time delay in DT
reset (s), step 2
t2Min 0.000 - 60.000 0.001 5.000 s Minimum operate
time in IDMT mode
(s), step 2
ResetTypeCrv2 Instantaneous - Instantaneous - IDMT mode reset type
Frozen timer selector, step 2
Linearly
decreased
tIReset2 0.000 - 60.000 0.001 0.025 s Time delay in IDMT
reset (s), step 2
k2 0.05 - 1.10 0.01 0.05 - Time multiplier in
IDMT mode, step 2
Table continued on next page

248 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 7
Voltage protection

Parameter Range Step Default Unit Description


ACrv2 0.005 - 200.000 0.001 1.000 - Setting A for
programmable over
voltage IDMT curve,
step 2
BCrv2 0.50 - 100.00 0.01 1.00 - Setting B for
programmable over
voltage IDMT curve,
step 2
CCrv2 0.0 - 1.0 0.1 0.0 - Setting C for
programmable over
voltage IDMT curve,
step 2
DCrv2 0.000 - 60.000 0.001 0.000 - Setting D for
programmable over
voltage IDMT curve,
step 2
PCrv2 0.000 - 3.000 0.001 1.000 - Setting P for
programmable over
voltage IDMT curve,
step 2
CrvSat2 0 - 100 1 0 % Tuning param for
prog. over voltage
IDMT curve, step 2
HystAbs2 0.0 - 100.0 0.1 0.5 %UB Absolute hysteresis in
% of UBase, step 2

7.2.6 Technical data

Table 134: Two step overvoltage protection (POVM, 59)


Function Range or value Accuracy
Operate voltage, low and high (1-200)% of Ubase ± 1.0% of Ur at U < Ur
step ± 1.0% of U at U > Ur
Absolute hysteresis (0–100)% of Ubase ± 1.0% of Ur at U < Ur
± 1.0% of U at U > Ur

Inverse time characteristics for - See table 439


low and high step, see table 439
Definite time delays (0.000-60.000) s ± 0.5% ± 10 ms
Minimum operate time, Inverse (0.000-60.000) s ± 0.5% ± 10 ms
characteristics
Operate time, start function 25 ms typically at 0 to 2 x Uset -

Reset time, start function 25 ms typically at 2 to 0 x Uset -

Critical impulse time 10 ms typically at 0 to 2 x Uset -

Impulse margin time 15 ms typically -

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1MRK505132-UEN rev. D
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Voltage protection

7.3 Two step residual overvoltage protection


(POVM, 59N)

Function block name: TRVx- IEC 60617 graphical symbol:


ANSI number: 59N
IEC 61850 logical node name: 3U0
R2POVM

7.3.1 Introduction
Residual voltages will occur in the power system during earth faults.

The function can be configured to calculate the residual voltage from the three phase
voltage input transformers or from a single phase voltage input transformer fed from
an open delta or neutral point voltage transformer.

The function has two voltage steps, each with inverse or definite time delayed.

7.3.2 Principle of operation


The two-step residual overvoltage protection function (TRV) is used to detect high
single-phase voltage, such as high residual voltage, also called 3U0. The residual
voltage can be measured directly from a voltage transformer in the neutral of a power
transformer or from a three-phase voltage transformer, where the secondary windings
are connected in an open delta. Another possibility is to measure the three phase
voltages and internally in the protection terminal calculate the corresponding residual
voltage and connect this calculated residual voltage to the TRV function block. The
function has two steps with separate time delays. If the single-phase (residual) voltage
remains above the set value for a time period corresponding to the chosen time delay,
the corresponding trip signal is issued. The time delay characteristic is individually
chosen for the two steps and can be either definite time delay or inverse time delay

The voltage related settings are made in percent of the base voltage, which is set in
kV, phase-phase.

7.3.2.1 Measurement principle

The residual voltage is measured continuously, and compared with the set values,
U1> and U2>.

To avoid oscillations of the output start signal, a hysteresis has been included.

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7.3.2.2 Time delay

The time delay for the two steps can be either definite time delay (DT) or inverse time
delay (IDMT). For the inverse time delay four different modes are available; inverse
curve A, inverse curve B, inverse curve C, and a programmable inverse curve.

The type A curve is described as:

k
t=
æ U < -U ö
ç ÷
è U< ø (Equation 49)

The type B curve is described as:

k × 480
t= 2.0
æ U -U > ö
ç 32 × - 0.5 ÷ - 0.035
è U> ø (Equation 50)

The type C curve is described as:

k × 480
t= 3.0
æ U -U > ö
ç 32 × - 0.5 ÷ - 0.035
è U> ø (Equation 51)

The programmable curve can be created as:

k×A
t= p
+D
æ U -U > ö
çB× -C÷
è U> ø (Equation 52)

When the denominator in the expression is equal to zero the time delay will be infinity.
There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set
to compensate for this phenomenon. In the voltage interval U> up to U> *(1.0 +
CrvSatn/100) the used voltage will be: U> *(1.0 + CrvSatn/100). If the programmable
curve is used this parameter must be calculated so that:

CrvSatn
B× -C > 0
100 (Equation 53)

The details of the different inverse time characteristics are shown in chapter "Inverse
characteristics".

RED 670 Technical reference manual 251


1MRK505132-UEN rev. D
Section 7
Voltage protection

Trip signal issuing requires that the residual overvoltage condition continues for at
least the user set time delay. This time delay is set by the parameter t1 and t2 for
definite time mode (DT) and by some special voltage level dependent time curves for
the inverse time mode (IDMT). If the start condition, with respect to the measured
voltage ceases during the delay time, and is not fulfilled again within a user defined
reset time (tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the
inverse time) the corresponding start output is reset, after that the defined reset time
has elapsed. Here it should be noted that after leaving the hysteresis area, the start
condition must be fulfilled again and it is not sufficient for the signal to only return
back to the hysteresis area. It is also remarkable that for the overvoltage function the
IDMT reset time is constant and does not depend on the voltage fluctuations during
the drop-off period. However, there are three ways to reset the timer, either the timer
is reset instantaneously, or the timer value is frozen during the reset time, or the timer
value is linearly decreased during the reset time. See figure 126 and figure 127.

tReset
1
tReset1
Voltage
START
TRIP

U1>

Hysteresis
Measured
Voltage

Time

START t1

TRIP

Time
Integrator Linear Decrease
Froozen Timer
t1

Instantaneous Time
Reset en05000019.vsd

Figure 126: Voltage profile not causing a reset of the start signal for step 1, and definite time delay

252 Technical reference manual RED 670


1MRK505132-UEN rev. D
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Voltage protection

tReset1
Voltage tReset1
START TRIP
START
Hysteresis

U1>

Measured Voltage

Time

START t1

TRIP

Time Integrator
Froozen Timer

t1

Time
Instantaneous
Linear Decrease en05000020.vsd
Reset

Figure 127: Voltage profile causing a reset of the start signal for step 1, and definite time delay

7.3.2.3 Blocking

The residual overvoltage function can be partially or totally blocked, by binary input
signals where:

RED 670 Technical reference manual 253


1MRK505132-UEN rev. D
Section 7
Voltage protection

BLOCK: blocks all outputs


BLKTR1: blocks all trip outputs of step 1
BLKST1: blocks all start and trip outputs related to step 1
BLKTR2: blocks all trip outputs of step 2
BLKST2: blocks all start and trip outputs related to step 2

7.3.2.4 Design

The voltage measuring elements continuously measure the residual voltage.


Recursive Fourier filters filter the input voltage signal. The single input voltage is
compared to the set value, and is also used for the inverse time characteristic
integration. The design of the TRV function is schematically described in
figure 128.

UN Comparator Phase 1 ST1


UN > U1>
TR1
START Start
&
Trip
Time integrator Output
t1 Logic
TRIP
tReset1
ResetTypeCrv1 Step 1

ST2
Comparator Phase 1
UN > U2> TR2

Start
START &
Trip START
Output OR
Time integrator
Logic
t2 TRIP
tReset2
Step 2
ResetTypeCrv2 TRIP
OR

en05000748.vsd

Figure 128: Schematic design of the TRV function

254 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 7
Voltage protection

7.3.3 Function block


TRV1-
R2POVM
U3P TRIP
BLOCK TR1
BLKTR1 TR2
BLKST1 START
BLKTR2 ST1
BLKST2 ST2

en05000327.vsd

Figure 129: TRV function block

7.3.4 Input and output signals

Table 135: Input signals for the R2POVM_59N (TRV1-) function block
Signal Description
U3P Group signal for voltage input
BLOCK Block of function
BLKTR1 Block of operate signal, step 1
BLKST1 Block of step 1
BLKTR2 Block of operate signal, step 2
BLKST2 Block of step 2

Table 136: Output signals for the R2POVM_59N (TRV1-) function block
Signal Description
TRIP Operate signal
TR1 Operate signal for step 1
TR2 Operate signal for step 2
START Start signal
ST1 Start signal for step 1
ST2 Start signal for step 2

7.3.5 Setting parameters

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Table 137: Parameter group settings for the R2POVM_59N (TRV1-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
On
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage, phase-
phase in kV
Characterist1 Definite time - Definite time - Operation
Inverse curve A characteristic
Inverse curve B selection, step 1
Inverse curve C
Prog. inv. curve
U1> 1 - 200 1 30 %UB Voltage setting/start
val (DT & IDMT), step
1 in % of UBase
t1 0.000 - 60.000 0.001 5.000 s Operate time delay in
DT mode, step 1.
tReset1 0.000 - 60.000 0.001 0.025 s Time delay in DT
reset (s), step 1
t1Min 0.000 - 60.000 0.001 5.000 s Minimum operate
time in IDMT mode
(s), step 1
ResetTypeCrv1 Instantaneous - Instantaneous - IDMT mode reset type
Frozen timer selector, step 1
Linearly
decreased
tIReset1 0.000 - 60.000 0.001 0.025 s Time delay in IDMT
reset (s), step 1
k1 0.05 - 1.10 0.01 0.05 - Time multiplier in
IDMT mode, step 1
ACrv1 0.005 - 200.000 0.001 1.000 - Setting A for
programmable over
voltage IDMT curve,
step 1
BCrv1 0.50 - 100.00 0.01 1.00 - Setting B for
programmable over
voltage IDMT curve,
step 1
CCrv1 0.0 - 1.0 0.1 0.0 - Setting C for
programmable over
voltage IDMT curve,
step 1
DCrv1 0.000 - 60.000 0.001 0.000 - Setting D for
programmable over
voltage IDMT curve,
step 1
PCrv1 0.000 - 3.000 0.001 1.000 - Setting P for
programmable over
voltage IDMT curve,
step 1
CrvSat1 0 - 100 1 0 % Tuning param for
prog. over voltage
IDMT curve, step 1
HystAbs1 0.0 - 100.0 0.1 0.5 %UB Absolute hysteresis in
% of UBase, step 1
Table continued on next page

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Parameter Range Step Default Unit Description


Characterist2 Definite time - Definite time - Operation
Inverse curve A characteristic
Inverse curve B selection, step 2
Inverse curve C
Prog. inv. curve
U2> 1 - 100 1 45 %UB Voltage setting/start
val (DT & IDMT), step
2 in % of UBase
t2 0.000 - 60.000 0.001 5.000 s Operate time delay in
DT mode, step 2
tReset2 0.000 - 60.000 0.001 0.025 s Time delay in DT
reset (s), step 2
t2Min 0.000 - 60.000 0.001 5.000 s Minimum operate
time in IDMT mode
(s), step 2
ResetTypeCrv2 Instantaneous - Instantaneous - IDMT mode reset type
Frozen timer selector, step 2
Linearly
decreased
tIReset2 0.000 - 60.000 0.001 0.025 s Time delay in IDMT
reset (s), step 2
k2 0.05 - 1.10 0.01 0.05 - Time multiplier in
IDMT mode, step 2
ACrv2 0.005 - 200.000 0.001 1.000 - Setting A for
programmable over
voltage IDMT curve,
step 2
BCrv2 0.50 - 100.00 0.01 1.00 - Setting B for
programmable over
voltage IDMT curve,
step 2
CCrv2 0.0 - 1.0 0.1 0.0 - Setting C for
programmable over
voltage IDMT curve,
step 2
DCrv2 0.000 - 60.000 0.001 0.000 - Setting D for
programmable over
voltage IDMT curve,
step 2
PCrv2 0.000 - 3.000 0.001 1.000 - Setting P for
programmable over
voltage IDMT curve,
step 2
CrvSat2 0 - 100 1 0 % Tuning param for
prog. over voltage
IDMT curve, step 2
HystAbs2 0.0 - 100.0 0.1 0.5 %UB Absolute hysteresis in
% of UBase, step 2

7.3.6 Technical data

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Table 138: Two step residual overvoltage protection (POVM, 59N)


Function Range or value Accuracy
Operate voltage, low and high (1-200)% of Ubase ± 1.0% of Ur at U < Ur ± 1.0%
step of U at U > Ur

Absolute hysteresis (0–100)% of Ubase ± 1.0% of Ur at U < Ur


± 1.0% of U at U > Ur

Inverse time characteristics for - See table 440


low and high step, see table 440
Definite time setting (0.000–60.000) s ± 0.5% ± 10 ms
Minimum operate time (0.000-60.000) s ± 0.5% ± 10 ms
Operate time, start function 25 ms typically at 0 to 2 x Uset -

Reset time, start function 25 ms typically at 2 to 0 x Uset -

Critical impulse time 10 ms typically at 0 to 2 x Uset -

Impulse margin time 15 ms typically -

7.4 Overexcitation protection (PVPH, 24)

Function block name: OEXx- IEC 60617 graphical symbol:


ANSI number: 24
IEC 61850 logical node name:
OEXPVPH U/f >

7.4.1 Introduction
When the laminated core of a power transformer is subjected to a magnetic flux
density beyond its design limits, stray flux will flow into non-laminated components
not designed to carry flux and cause eddy currents to flow. The eddy currents can
cause excessive heating and severe damage to insulation and adjacent parts in a
relatively short time.

7.4.2 Principle of operation


The importance of overexcitation protection is growing as the power transformers as
well as other power system elements today operate most of the time near their
designated limits.

Modern design transformers are more sensitive to overexcitation than earlier types.
This is a result of the more efficient designs and designs which rely on the
improvement in the uniformity of the excitation level of modern systems. Thus, if

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emergency that includes overexcitation does occur, transformers may be damaged


unless corrective action is promptly taken. Transformer manufacturers recommend
an overexcitation protection as a part of the transformer protection system.

Overexcitation results from excessive applied voltage, possibly in combination with


below-normal frequency. Such condition may occur when a unit is on load, but are
more likely to arise when it is on open circuit, or at a loss of load occurrence.
Transformers directly connected to generators are in particular danger to experience
overexcitation condition. It follows from the fundamental transformer equation, see
equation 54, that peak flux density Bmax is directly proportional to induced voltage
E, and inversely proportional to frequency f, and turns n.

E = 4.44 × f × n × B max × A
(Equation 54)

The relative excitation M (relative V/Hz) is therefore according to equation 55.

V E¤f
M = relative æè -------öø = ------------------------
Hz ( Ur ) ¤ ( fr )
(Equation 55)

Disproportional variations in quantities E and f may give rise to core overfluxing. If


the core flux density Bmax increases to a point above saturation level (typically 1.9
Tesla), the flux will no longer be contained within the core only but will extend into
other (non-laminated) parts of the power transformer and give rise to eddy current
circulations. Overexcitation will result in:

• overheating of the non-laminated metal parts,


• a large increase in magnetizing currents,
• an increase in core and winding temperature,
• an increase in transformer vibration and noise.

Protection against overexcitation is based on calculation of the relative Volts per


Hertz (V / Hz) ratio. The action of the protection is usually to initiate a reduction of
excitation and, if this should fail, or is not possible, to trip the transformer after a
delay which can be from seconds to minutes, typically 5 - 10 seconds.

Overexcitation protection may be of particular concern on directly connected


generator unit transformers. Directly connected generator-transformers are subjected
to a wide range of frequencies during the acceleration and deceleration of the turbine.
In such cases, the overexcitation protection may trip the field breaker during a start-
up of a machine, by means of the overexcitation ALARM signal from the transformer
terminal. If this is not possible, the power transformer can be disconnected from the
source, after a delay, by the TRIP signal.

The IEC 60076 - 1 standard requires that transformers shall be capable of operating
continuously at 10% above rated voltage at no load, and rated frequency. At no load,
the ratio of the actual generator terminal voltage to the actual frequency should not

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exceed 1.1 times the ratio of transformer rated voltage to the rated frequency on a
sustained basis, see equation 56.

---- £ 1.1 × Ur
E ------
f fr
(Equation 56)

or equivalently, with 1.1 · Ur = V/Hz> according to equation 57.

E V/Hz>
---- £ ---------------------
f fr (Equation 57)

where:
V/Hz> is the maximum continuously allowed voltage at no load, and rated frequency.

V/Hz> is an OEX setting parameter. The setting range is 1.0 pu to 1.5 pu. If the user
does not know exactly what to set, then the standard IEC 60076 - 1, section 4.4, the
default value V/Hz> = 1.10 pu shall be used.

In OEX protection function the relative excitation M (relative V/Hz) is expressed


according to equation 58.

V E¤f
M = relative æè -------öø = --------------
Hz Ur ¤ fr
(Equation 58)

It is clear from the above formula that, for an unloaded power transformer, M = 1 for
any E and f, where the ratio E / f is equal to Ur / fr. A power transformer is not
overexcited as long as the relative excitation is M ≤ V/Hz>, V/Hz> expressed in pu.
The relative overexcitation is thus defined as shown in equation 59.

overexcitation = M – V/Hz> (Equation 59)

The overexcitation protection algorithm is fed with an input voltage U which is in


general not the induced voltage E from the fundamental transformer equation. For no
load condition, these two voltages are the same, but for a loaded power transformer
the internally induced voltage E may be lower or higher than the voltage U which is
measured and fed to OEX, depending on the direction of the power flow through the
power transformer, the power transformer side where OEX is applied, and the power
transformer leakage reactance of the winding. It is important to specify on the OEX
function block in CAP 531 configuration tool worksheet on which side of the power
transformer OEX is placed

As an example, at a transformer with a 15% short circuit impedance Xsc, the full load,
0.8 power factor, 105% voltage on the load side, the actual flux level in the transformer
core, will not be significantly different from that at the 110% voltage, no load, rated
frequency, provided that the short circuit impedance X can be equally divided

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between the primary and the secondary winding: Xleak = Xleak1 = Xleak2 = Xsc /
2 = 0.075 pu..

OEX calculates the internal induced voltage E if Xleak (meaning the leakage
reactance of the winding where OEX is connected) is known to the user. The
assumption taken for 2-winding power transformers that Xleak = Xsc / 2 is
unfortunately most often not true. For a 2-winding power transformer the leakage
reactances of the two windings depend on how the windings are located on the core
with respect to each other. In the case of three-winding power transformers the
situation is still more complex. If a user has the knowledge on the leakage reactance,
then it should applied. If a user has no idea about it, Xleak can be set to Xc/2. The
OEX protection will then take the given measured terminal voltage U, as the induced
voltage E.

It is assumed that overexcitation is a symmetrical phenomenon, caused by events such


as loss of load, etc. It will be observed that a high phase-to-earth voltage does not
mean overexcitation. For example, in an unearthed power system, a single-phase-to-
earth fault means high voltages of the “healthy” two phases to earth, but no
overexcitation on any winding. The phase-to-phase voltages will remain essentially
unchanged. The important voltage is the voltage between the two ends of each
winding.

7.4.2.1 Measured voltage

If one phase-to-phase voltage is available from the side where OEX protection is
applied, then OEX protection function block shall be set to measure this voltage,
MeasuredU. The particular voltage which is used determines the two currents that
must be used. If, for example, voltage Uab is fed to OEX, then currents Ia, and Ib
must be applied, etc. From these two input currents, current Iab = Ia - Ib is calculated
internally by the OEX protection algorithm. The phase-to-phase voltage must be
higher than 70% of the rated value, otherwise the OEX protection algorithm is exited
without calculating the excitation. ERROR output is set to 1, and the displayed value
of relative excitation V / Hz shows 0.000.

If three phase-to-earth voltages are available from the side where OEX is connected,
then OEX protection function block shall be set to measure positive sequence voltage.
In this case the positive sequence voltage and the positive sequence current are used
by OEX protection. A check is made within OEX protection if the positive sequence
voltage is higher than 70% rated phase-to-earth voltage; below this value, OEX is
exited immediately, and no excitation is calculated. ERROR output is set to 1, and
the displayed value of relative excitation V / Hz shows 0.000.

The frequency value is received from the pre-processing block. The function is in
operation for frequencies within the range of 33-60 Hz and of 42-75 Hz for 50 and
60 Hz respectively.

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• OEX protection function can be connected to any power transformer side,


independent from the power flow.
• The side with a possible On-Load-Tap-Changer (OLTC) must not be used.

7.4.2.2 Operate time of the overexcitation protection.

The operate time of the overexcitation protection is a function of the relative


overexcitation. Basically there are two different delay laws available to choose
between:

• the so called IEEE law, and


• a tailor-made law.

The so called IEEE law approximates a square law and has been chosen based on
analysis of the various transformers’ overexcitation capability characteristics. They
can match well a transformer core capability.

The square law is according to equation 60.

0.18 × k 0.18 × k
t o p = --------------------------------------------- = ----------------------------------------
2 2
( M – V/Hz> ) overexcitation (Equation 60)

where:
M is excitation, mean value in the interval from t = 0 to t = top

V/Hz> is maximum continuously allowed voltage at no load, and rated frequency, in pu and
k is time multiplier setting for inverse time functions, see figure 131.
Parameter k (“time multiplier setting”) selects one delay curve from the family of curves.

An analog overexcitation relay would have to evaluate the following integral


expression, which means to look for the instant of time t = top according to
equation 61.

t op
2
ò ( M(t) – V/Hz> ) dt ³ 0.18 × k
0 (Equation 61)

A digital, numerical relay will instead look for the lowest j (i.e. j = n) where it becomes
true that:

n
2
Dt × å ( M(j) – V/Hz> ) ³ 0.18 × k
j=k (Equation 62)

where:
Dt is the time interval between two successive executions of overexcitation function and

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M(j) - V/Hz> is the relative excitation at (time j) in excess of the normal (rated) excitation which is given
as Ur/fr.

As long as M > V/Hz> (i.e. overexcitation condition), the above sum can only be
larger with time, and if the overexcitation persists, the protected transformer will be
tripped at j = n.

Inverse delays as per figure 131, can be modified (limited) by two special definite
delay settings, namely tMax and tMin, see figure 130.
delay in s

tMax

under - inverse delay law


excitation

overexcitation
tMin
0 Mmax - V/Hz> Overexcitation M-V/Hz>

M=V/Hz> Mmax Excitation M

V/Hz> Emax E (only if f = fr = const)

99001067.vsd

Figure 130: Restrictions imposed on inverse delays by tMax, and tMin

A definite maximum time, tMax, can be used to limit the operate time at low degrees
of overexcitation. Inverse delays longer than tMax will not be allowed. In case the
inverse delay is longer than tMax, OEX trips after tMax seconds.

A definite minimum time, tMin, can be used to limit the operate time at high degrees
of overexcitation. In case the inverse delay is shorter than tMin, OEX function trips
after tMin seconds. Also, the inverse delay law is no more valid beyond excitation
Mmax. Beyond Mmax (beyond overexcitation Mmax - V/Hz>), the delay will always
be tMin, no matter what overexcitation.

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Time (s) IEEE OVEREXCITATION CURVES

1000

100

k = 60

k = 20

k = 10
10 k=9
k=8
k=7
k=6
k=5
k=4
k=3

k=2

k=1
1
1 2 3 4 5 10 20 30 40

OVEREXCITATION IN % (M-Emaxcont)*100)

en01000373.vsd

Figure 131: Delays inversely proportional to the square of the overexcitation.

The critical value of excitation Mmax is determined indirectly via OEX protection
function setting V/Hz>>. V/Hz>> can be thought of as a no-load-rated-frequency
voltage, where the inverse law should be replaced by a short definite delay, tMin. If,
for example, V/Hz>> = 1.40 pu, then Mmax is according to equation 63.

(V/Hz>>) ¤ f
Mmax = -------------------------
- = 1.40
Ur ¤ fr
(Equation 63)

The Tailor-Made law allows a user to design an arbitrary delay characteristic. In this
case the interval between M = V/Hz>, and M = Mmax is automatically divided into
five equal subintervals, with six delays. (settings t1, t2, t3, t4, t5, and t6) as shown in
the figure 132. These times should be set so that t1 => t2 => t3 => t4 => t5 => t6.

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delay in s

tMax

under- tMin
excitation Overexcitation M-Emaxcont
0 Mmax - Emaxcont Excitation M

Emaxcont Mmax
99001068.vsd

Figure 132: An example of a Tailor-Made delay characteristic

Delays between two consecutive points, for example t3 and t4, are obtained by linear
interpolation.

Should it happen that tMax be lower than, for example, delays t1, and t2, the actual
delay would be tMax. Above Mmax, the delay can only be tMin.

7.4.2.3 Cooling

The overexcitation protection OEX is basically a thermal protection; therefore a


cooling process has been introduced. Exponential cooling process is applied.
Parameter Tcool is an OEX setting, with a default time constant tCooling of 20
minutes. This means that if the voltage and frequency return to their previous normal
values (no more overexcitation), the normal temperature is assumed to be reached
not before approximately 5 times tCooling minutes. If an overexcitation condition
would return before that, the time to trip will be shorter than it would be otherwise.

7.4.2.4 OEX protection function measurands

A service value data item called Time to trip, and designated on the display by tTRIP
is available in seconds on the local HMI, or monitoring tool. This value is an
estimation of the remaining time to trip if the overexcitation remained on the level it
had when the estimation was done. This information can be useful with small or
moderate overexcitations. If the overexcitation is so low that the valid delay is
tMax, then the estimation of the remaining time to trip is done against tMax.

The displayed relative excitation M, designated on the display by V/Hz is calculated


from the expression:

V E¤f
M = relative æ -------ö = --------------
è Hzø Uf ¤ fr
(Equation 64)

If less than V / Hz = V/Hz> (in pu) is shown on the HMI display (or read via SM/
RET521), the power transformer is underexcited. If the value of V/Hz is shown which

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is equal to V/Hz> (in pu), it means that the excitation is exactly equal to the power
transformer continuous capability. If a value higher than the value of V/Hz> is shown,
the protected power transformer is overexcited. For example, if V/Hz = 1.100 is
shown, while V/Hz> = 1.1 pu, then the power transformer is exactly on its maximum
continuous excitation limit.

The third item of the OEX protection service report is the thermal status of the
protected power transformer iron core, designated on the display by ThermalStatus.
This gives the thermal status in % of the trip value which corresponds to 100%.
Thermal Status should reach 100% at the same time, when tTRIP reaches 0 seconds.
If the protected power transformer is then for some reason not switched off, the
ThermalStaus shall go over 100%.

If the delay as per IEEE law, or Tailor-made Law, is limited by tMax, and/or TMin,
then the Thermal Status will generally not reach 100% at the same time, when tTRIP
reaches 0 seconds. For example, if, at low degrees of overexcitation, the very long
delay is limited by tMax, then the OEX TRIP output signal will be set to 1 before the
Thermal status reaches 100%.

7.4.2.5 Overexcitation alarm

A separate step, AlarmLevel, is provided for alarming purpose. The voltages are
normally set 2% lower and has a definite time delay, tAlarm. This will give the
operator an early abnormal voltages warning.

7.4.2.6 Logic diagram

Figure 133: A simplified diagram of the OEX protection function

Simplification of the diagram is in the way the IEEE and Tailor-made delays are
calculated. The cooling process is not shown. It is not shown that voltage and
frequency are separately checked against their respective limit values.

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7.4.3 Function block


OEX1-
OEXPVPH
I3P ERROR
U3P T RIP
BLOCK START
RESET ALARM

en05000329.vsd

Figure 134: OEX function block

7.4.4 Input and output signals

Table 139: Input signals for the OEXPVPH (OEX1-) function block
Signal Description
I3P Group signal for current input
U3P Group signal for voltage input
BLOCK External block
RESET Reset operation

Table 140: Output signals for the OEXPVPH (OEX1-) function block
Signal Description
ERROR General function error
TRIP Trip from overexcitation function
START Overexcitation above set operate level (instantaneous)
ALARM Overexcitation above set alarm level (delayed)

7.4.5 Setting parameters

Table 141: Parameter group settings for the OEXPVPH (OEX1-) function
Parameter Range Step Default Unit Description
Operation Off - Off - Operation Off / On
On
IBase 1 - 99999 1 3000 A Base current (rated
phase current)
UBase 0.05 - 2000.00 0.05 400.00 kV Base voltage (main
voltage) in kV
MeasuredU Ph-Ph - Ph-Ph - Input voltage
Pos Seq selection (pos. seq/
one phase-to-phase)
Table continued on next page

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Parameter Range Step Default Unit Description


V/Hz> 100.0 - 180.0 0.1 110.0 %UB/f Operate level of V/Hz
at no load & rated freq
in % of Ubase
V/Hz>> 100.0 - 200.0 0.1 140.0 %UB/f High level of V/Hz
above which tMin is
used, in % of Ubase
XLeak 0.000 - 200.000 0.001 0.000 ohm Winding reactance in
primary ohms
TrPulse 0.000 - 60.000 0.001 0.100 s Length of the pulse for
trip signal (in sec)
tMin 0.000 - 60.000 0.001 7.000 s Minimum trip delay for
V/Hz inverse curve, in
sec
tMax 0.00 - 9000.00 0.01 1800.00 s Maximum trip delay
for V/Hz inverse
curve, in sec
tCooling 0.10 - 9000.00 0.01 1200.00 s Transformer
magnetic core cooling
time constant, in sec
CurveType IEEE - IEEE - Inverse time curve
Tailor made selection, IEEE/Tailor
made
kForIEEE 1 - 60 1 1 - Time multiplier for
IEEE inverse type
curve
t1Tailor 0.00 - 9000.00 0.01 7200.00 s Time delay t1
(longest) for tailor
made curve, in sec
t2Tailor 0.00 - 9000.00 0.01 3600.00 s Time delay t2 for tailor
made curve, in sec
t3Tailor 0.00 - 9000.00 0.01 1800.00 s Time delay t3 for tailor
made curve, in sec
t4Tailor 0.00 - 9000.00 0.01 900.00 s Time delay t4 for tailor
made curve, in sec
t5Tailor 0.00 - 9000.00 0.01 450.00 s Time delay t5 for tailor
made curve, in sec
t6Tailor 0.00 - 9000.00 0.01 225.00 s Time delay t6
(shortest) for tailor
made curve, in sec
AlarmLevel 50.0 - 120.0 0.1 100.0 % Alarm operate level
as % of the trip level
tAlarm 0.00 - 9000.00 0.01 5.00 s Alarm time delay, in
sec

7.4.6 Technical data

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Table 142: Overexcitation protection (PVPH, 24)


Function Range or value Accuracy
Operate value, start (100–180)% of (Ubase/frated) ± 1.0% of U

Operate value, alarm (50–120)% of start level ± 1.0% of Ur at U ≤ Ur


± 1.0% of U at U > Ur

Operate value, high level (100–200)% of (Ubase/frated) ± 1.0% of U

Curve type IEEE or customer defined Class 5 + 40 ms

(0.18 × k )
IEEE : t =
( M - 1) 2

where M = relative (V/Hz) = (E/f)/


(Ur/fr)
Minimum time delay for inverse (0.000–60.000) s ± 0.5% ± 10 ms
function
Maximum time delay for inverse (0.00–9000.00) s ± 0.5% ± 10 ms
function
Alarm time delay (0.000–60.000) s ± 0.5% ± 10 ms

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Frequency protection

Section 8 Frequency protection

About this chapter


This chapter describes the frequency protection functions. The way the functions
work, their setting parameters, function blocks, input and output signals and technical
data are included for each function.

8.1 Underfrequency protection (PTUF, 81)

Function block name: TUFx-- IEC 60617 graphical symbol:


ANSI number: 81
IEC 61850 logical node name:
SAPTUF f<

8.1.1 Introduction
Underfrequency occurs as a result of lack of generation in the network.

The function can be used for load shedding systems, remedial action schemes, gas
turbine start-up etc.

The function is provided with an undervoltage blocking. The operation may be based
on single phase, phase-to-phase or positive sequence voltage measurement.

Up to two independent under frequency steps are available.

8.1.2 Principle of operation


The underfrequency (TUF) function is used to detect low power system frequency.
The function can either have a definite time delay or a voltage magnitude dependent
time delay. If the voltage magnitude dependent time delay is applied the time delay
will be longer if the voltage is higher and shorter if the voltage is lower. If the
frequency remains below the set value for a time period corresponding to the chosen
time delay, the corresponding trip signal is issued. To avoid an unwanted trip due to
uncertain frequency measurement at low voltage magnitude, a voltage controlled
blocking of the function is available, i.e. if the voltage is lower than the set blocking
voltage the function is blocked and no start or trip signal is issued.

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8.1.2.1 Measurement principle

The fundamental frequency of the measured input voltage is measured continuously,


and compared with the set value, StartFrequency. The frequency function is also
dependent on the voltage magnitude. If the voltage magnitude decreases the setting
IntBlkStVal, the underfrequency function is blocked, and the output BLKDMAGN is
issued. All voltage settings are made in percent of the setting UBase, which should
be set as a phase-phase voltage in kV.

To avoid oscillations of the output start signal, a hysteresis has been included, see
section "Inverse characteristics".

8.1.2.2 Time delay

The time delay for the underfrequency function can be either a settable definite time
delay or a voltage magnitude dependent time delay, where the time delay depends on
the voltage level; a high voltage level gives a longer time delay and a low voltage
level causes a short time delay. For the definite time delay, the setting tTrip sets the
time delay, see figure 135and figure 136. For the voltage dependent time delay the
measured voltage level and the settings UNom, UMin, Exponent, tMax and tMin set
the time delay according to figure 137 and equation 66. The setting
TimerOperation is used to decide what type of time delay to apply. The output
STARTDUR, gives the time elapsed from the issue of the start output, in percent of
the total operation time available in PST.

Trip signal issuing requires that the underfrequency condition continues for at least
the user set time delay. If the start condition, with respect to the measured frequency
ceases during the delay time, and is not fulfilled again within a user defined reset
time, tReset, the start output is reset, after that the defined reset time has elapsed. Here
it should be noted that after leaving the hysteresis area, the start condition must be
fulfilled again and it is not sufficient for the signal to only return back to the hysteresis
area.

On the output of the underfrequency function a 100 ms pulse is issued, after a time
delay corresponding to the setting of TimeDlyRestore, when the measured frequency
returns to the level corresponding to the setting RestoreFreq.

272 Technical reference manual RED 670


1MRK505132-UEN rev. D
Section 8
Frequency protection

tReset
tReset