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Electrical Characteristics
(AVIN = 12V, PVIN = 12V, VUVLO = VSTT = 3V, VCON = 3V, RRCOSC = 24kΩ, CCSS = 10nF, CRCOSC = 100pF, CREG9 = 4.7μF,
CREG5 = 4.7μF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C. All driver, voltage-regulator, and refer-
ence outputs unconnected except for bypass capacitors.)
MAX5051 toc02
MAX5051 toc03
VUVLO = 0V VUVLO = 0V VUVLO = 0V
290 270
500
AVIN STANDBY CURRENT (µA)
280 260
270 250
400
260 240
250 230 300
240 220
200
230 210
220 200
100
210 190
200 180 0
10 20 30 40 50 60 70 80 -50 -25 0 25 50 75 100 125 10 20 30 40 50 60 70 80
AVIN SUPPLY VOLTAGE (V) TEMPERATURE (°C) PVIN SUPPLY VOLTAGE (V)
MAX5051 toc05
MAX5051 toc06
VUVLO = 0V STT = FLOATING
500 23.5
PVIN STANDBY CURRENT (µA)
8.802
PVIN STARTUP VOLTAGE (V)
8.793
100 23.1
0 23.0 8.970
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 10 20 30 40 50 60 70 80
TEMPERATURE (°C) TEMPERATURE (°C) PVIN VOLTAGE (V)
MAX5051 toc08
MAX5051 toc09
8.88 8.9
8.86 8.8 5.6
REG9 OUTPUT VOLTAGE (V)
8.84 8.7
8.82 8.6 5.2
8.80 8.5
8.78 8.4 4.8
8.76 8.3
8.74 8.2 4.4
8.72 8.1
8.70 8.0 4.0
-50 -25 0 25 50 75 100 125 0 20 40 60 80 100 120 140 160 0 10 20 30 40 50 60 70 80 90
TEMPERATURE (°C) REG9 OUTPUT CURRENT (mA) REG5 OUTPUT CURRENT (mA)
MAX5051 toc11
MAX5051 toc12
VUVLO = 0V VPVIN = 12V
5.000
600 7.1
4.999
4.998
OUTPUT VOLTAGE (V)
500
7.0
4.997
4.996 400
6.9
4.995 300
4.994
6.8
4.993 200
4.992 6.7
100
4.991
4.990 0 6.6
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
MAX5051 toc14
MAX5051 toc15
SOFT-START/REFERENCE VOLTAGE (V)
1.240 1.235
CSS SOFT-START CURRENT (µA)
85
1.235
1.230
1.230 80
1.225
UVLO (V)
1.225
75 1.220
1.220
1.215
1.215 70
1.210 1.210
65
1.205 1.205
1.200 60 1.200
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
STT STARTUP THRESHOLD RCFF LEVEL-SHIFT VOLTAGE
vs. TEMPERATURE FLTINT CURRENT vs. TEMPERATURE vs. TEMPERATURE
1.240 95 2.30
MAX5051 toc16
MAX5051 toc17
MAX5051 toc18
1.235 94 2.29
RCFF LEVEL-SHIFT VOLTAGE (V)
93 2.28
1.230
FLTINT CURRENT (µA)
92 2.27
1.225 91 2.26
STT (V)
1.220 90 2.25
89 2.24
1.215
88 2.23
1.210
87 2.22
1.205 86 2.21
1.200 85 2.20
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
MAX5051 toc21
ISOURCE = 5mA
240 7
165 80
CS THRESHOLD VOLTAGE (mV)
GAIN
PHASE (DEGREES)
160
5
150
GAIN (dB)
155 40 4
120
3
150 20 90
PHASE 2 ISINK = 5mA
60
145 0
30 1
140 -20 0 0
-50 -25 0 25 50 75 100 125 0.01 0.1 1 10 100 1000 10,000 -50 -25 0 25 50 75 100 125
TEMPERATURE (°C) FREQUENCY (kHz) TEMPERATURE (°C)
DRVH AND DRVL RDSON LXL AND LXH RDSON SWITCHING PERIOD vs. RRCOSC
vs. TEMPERATURE vs. TEMPERATURE 50
MAX5051 toc24
4.0 12
45
MAX5051 toc23
MAX5051 toc22
10 35
3.0
DRVH AND DRVL SOURCING 50mA 30
2.5 9
RDSON (Ω)
RDSON (Ω)
6 10
1.0
LXH SINKING 10mA 5
0.5 5
DRVH AND DRVL SINKING 50mA 0
0 4 0 40 80 120 160 200
-50 -25 0 25 50 75 100 125 -40 -15 10 35 60 85 110 RRCOSC (kΩ)
TEMPERATURE (°C) TEMPERATURE (°C)
NORMALIZED SWITCHING FREQUENCY SYNCIN TO SYNCOUT PROPAGATION DRVH MAXIMUM DUTY CYCLE
vs. TEMPERATURE DELAY vs. TEMPERATURE vs. TEMPERATURE
1.020 130 50.0
MAX5051 toc26
MAX5051 toc25
MAX5051 toc27
NORMALIZED SWITCHING FREQUENCY
0.970 60 47.2
50 SYNCIN RISE TO SYNCOUT FALL 46.8
0.960
40 46.4
SWITCHING
0.950 30 46.0
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
MAX5051 toc28
MAX5051 toc29
50mV OVERDRIVE 50mV OVERDRIVE
105
140
100
PROPAGATION DELAY (ns)
90
120
85
110
80
75 100
70
90
65
60 80
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
TEMPERATURE (°C) TEMPERATURE (°C)
Pin Description
PIN NAME FUNCTION
Reset Input. Drive RESET low to clear all latches and registers (all outputs are turned off). All OUT
1 RCOSC
pulldown currents are disabled when RESET = low.
2 SYNCOUT Synchronization Output. Synchronization signal to drive SYNCIN of a second MAX5051, if used.
Feed-Forward Input. Connect a resistor from RCFF to AVIN and a capacitor from RCFF to GND. This is
3 RCFF
the PWM ramp.
PWM Comparator Noninverting Input. Connect CON to the optocoupler output for isolated applications,
4 CON
or to COMP for nonisolated applications.
Soft-Start and Reference. Connect a 0.01μF or greater capacitor from CSS to GND. The 1.24V
5 CSS
reference voltage appears across this capacitor.
6 COMP Internal Error Amplifier Output.
Feedback Input. Inverting input of the internal error amplifier. The soft-started reference is connected to
7 FB
the noninverting input of this amplifier.
8 REG5 5V Linear Regulator Output. Bypass REG5 to GND with a 4.7μF ceramic capacitor.
9 REG9 9V Linear Regulator Output. Bypass REG9 to GND with a 4.7μF ceramic capacitor.
Regulator Voltage Input. Voltage input to the internal 5V and 9V linear regulators. A high-value resistor
connected from the input supply to PVIN provides the necessary current to charge up the startup
10 PVIN
capacitor, and the 400μA standby current required by the MAX5051. After startup, the output of a tertiary
winding is used to provide continued bias to the controller.
Startup Threshold Input. Leave STT floating for a default startup voltage of 24V at PVIN. STT can be
11 STT modified by connecting external resistors. For high accuracy, choose external resistors with 50kΩ or less
impedance looking back into the divider.
Supply Input for the Secondary-Side Synchronous Pulse Transformer or Optocoupler Driver. LXVDD is
12 LXVDD
normally connected to REG5.
Fault Integration Input. During persistent current-limit faults, a capacitor connected to FLTINT is charged
with an internal 90µA current source. Switching is terminated when the voltage reaches 2.9V. An
27 FLTINT
external resistor connected in parallel discharges the capacitor. Switching resumes when the voltage
drops to 2V.
Synchronization Input. SYNCIN accepts the synchronization signal from SYNCOUT of another
MAX5051 and shifts the switching of the synchronized unit by 180° allowing the reduction of input
28 SYNCIN
bypass capacitors. The MAX5051 switches at the same frequency at SYNCIN. SYNCIN must be 50%
duty cycle. Leave SYNCIN floating if unused.
Functional Diagram
9V
PVIN REG9
LDO
5V
REG9 OK LDO REG5
18R REG5 OK
MAX5051
OVER
STT TEMP THERMAL
SHUTDOWN BST
R LEVEL
1.25V DRVH
SHIFT
1.125V 60ns
25µs XFRMRH
SHDN RISING-
RISING- EDGE
EDGE DRVDD
DELAY
DELAY
UVLO DRVL
PGND
1.25V
1.125V
LXVDD
INTERNAL
INTERNAL SUPPLY
AVIN LEVEL
REGULATOR 1.25V LXH
REFERENCE SHIFT LXL
80µA
RCOSC OSC
FLTINT
SYNCIN
SYNCOUT 2.7V/1.8V
RCFF CS
1
S
D Q
CON Q
R 50µA
COMP 2.7V/1.8V
FB
STARTUP
E/A 64µA
CSS
DRVDD
200ns
300ns
RISING- LEVEL
SHDN SSA ONE DRVB
EDGE SHIFT
SHOT
GND 1.25V DELAY
VIN+
D4 R6
MA111CT 47Ω
R9 C8
15kΩ 4.7µF R5 D3
C11 10Ω BAT46W
0.1µF
R12
1MΩ C7 C5
4.7µF 1µF T1
C12
BST
STT
CSS
AVIN
PVIN
SYNCIN
REG9
LM: 150µH fs = 250kHz
220nF
P: 14T
FLTINT XFRMRH
N1 S: 4T
SI4486 T: 6T
GND DRVDD
D1 L1
B2100
RCOSC DRVH 2µH
N3 D5
C13 MAX5051 BSS123 T1 3.3V
STARTUP USED FOR
100pF 10A
BOOST C4
DRVB CAPACITOR 3 x 270µF
RCFF N2 RLOAD
PRECHARGE
C14 SI4486
390pF CON DRVL
CS D2
SYNCOUT
R13
UVLO
REG5
LXH
R3
LXL
100kΩ C3
FB
R4 475Ω
28mΩ 150nF
R14
24.9kΩ U2
R8
R15 2.2kΩ
1MΩ R10
10Ω R7 PS2913
C1
360Ω
47nF R1
R11 C10 C9
39.2kΩ 11.5kΩ
4.7µF 1µF C2
C6 220nF
270nF MAX8515
R2
2.55kΩ
VIN-
R1
MAX5051 4.7Ω MAX5051 R1
REG5 4.7Ω
REG5
LXVDD D3 5V
C1 1N4148 LXVDD
D1 R3
1µF
LXH T1 560W U2
R2 LXH
2kΩ
C1
LXL R2
LXL 1µF
2kΩ PS9715
D2 C2
HIGH-SPEED
PGND OPTO
PGND
T1: PULSE ENGINEERING, PE-68386.
D1, D2: CENTRAL SEMICONDUCTOR, CMOSH-3.
Figure 4. Secondary-Side Synchronous Rectifier Driver Using Figure 5. Secondary-Side Synchronous Rectifier Driver Using
Pulse Transformer High-Speed Optocoupler
rate is constant at light or heavy loads. Once the soft-start low-value ceramics in parallel as necessary. A 5V regu-
ends, the voltage on CSS regulates to 1.24V. Do not load lator also is provided, REG5, primarily used to bias the
CSS with external circuitry. A suitable range of capacitors internal circuitry of the MAX5051. Bypass REG5 with a
connected to CSS is from 10nF to 0.1μF. Calculate the 4.7μF ceramic capacitor similar to the one used for REG9.
required soft-start capacitor based on the total output volt- Both of these regulators are always powered. When using
age startup time as follows: bootstrapped startup through a bleed resistor, do not load
CCSS = 56μF/s × tSS these outputs while the MAX5051 is in standby as it may
fail to start. Any external loading to this output should be
where CCSS is the capacitor connected to CSS, tSS is the such that the sum of their load and the standby current
soft-start time required for the output voltage to rise from through PVIN of the MAX5051 is less than the current that
0V to the rated output voltage. This only applies when this the bleed resistor can supply.
amplifier is used for output voltage regulation.
Startup Modes
PWM Ramp
The MAX5051 can be configured for two different startup
The PWM ramp is generated at RCFF. Connect a capaci- modes, allowing operation in either bootstrapped or direct
tor CRCFF from RCFF to ground and a resistor RRCFF power mode.
from RCFF to AVIN. The ramp generated on RCFF is in-
ternally offset by 2.3V and applied to the noninverting in- Direct Power Mode
put of the PWM comparator. The slope of the ramp is part In direct power mode, AVIN and PVIN are connected
of the overall loop gain. The dynamic range of RCFF is 0 directly to the input supply. This is typical in 12V to 24V
to 3V, and so the ramp peak must be kept below that. As- systems. The undervoltage lockout set at STT needs to
suming the maximum duty cycle approaches 50% at mini- be adjusted down with an external resistor-divider to an
mum input voltage, use the following formula to calculate appropriate level.
the minimum value of either the ramp capacitor or resistor:
Bootstrapped Startup
VINUVLO In bootstrap mode, a resistor is connected from the in-
R RCFF C RCFF ≥ put supply to PVIN, where a capacitor to GND is charged
2 f S VRPP
towards the input supply. When this voltage reaches the
startup threshold, the device wakes up and begins switch-
where VINUVLO is the minimum input supply voltage (typi- ing. A tertiary winding from the transformer is then used to
cally the PWM UVLO turn-on voltage), fS is the switching sustain operation. The MAX5051 draws little current from
frequency, and VRPP is the peak-to-peak ramp voltage, PVIN before reaching the threshold, which allows a large-
typically 2V. value bootstrap resistor and reduces its power dissipation
Allow the ramp peak to be as high as possible to maximize after startup. A large startup hysteresis helps the design
the signal-to-noise ratio. The low-frequency smallsignal of the bootstrap circuit by providing longer running times
gain of the power stage, Gps (the gain from the inverting during startup.
input of the PWM comparator to the output) can be calcu- After coming out of standby and before initiating the soft-
lated by using the following formula: start, the MAX5051 turns on the low-side FET to charge
Gps = NspRRCFFCRCFF fs up the boost capacitor. A voltage detector has been in-
corporated in the high-side driver that prevents the high-
where Nsp is the secondary-to-primary power transformer
side switch from turning on with insufficient voltage. It is
turns ratio.
also used to indicate when the boost capacitor has been
Internal Regulators charged. Once the capacitor is charged, soft-start com-
The MAX5051 has two internal linear regulators that mences. If the duty cycle is low, the magnetizing energy in
are used to power internal and external control circuits. the transformer may be insufficient to keep the bootstrap
The 9V regulator, REG9, is primarily used to power the capacitor charged. DRVB (see Figure 2 dotted lines) has
highand low-side gate drivers. Bypass REG9 with a 4.7μF been provided to drive a small external FET connected
ceramic capacitor or any other high-quality capacitor; use between XFRMRH and PGND, and is pulsed every cycle
to keep the capacitor charged.
Normally PVIN is derived from a tertiary winding of the have enough time to switch and build up sufficient voltage
transformer. However, at startup there is no energy de- across the tertiary output to power the device. The device
livered through the transformer, hence, a special boot- goes back into standby and will not attempt to restart until
strap sequence is required. Figure 6 shows the voltages PVIN rises above 24V. Use a low-leakage capacitor for
on PVIN, REG9, and REG5 during startup. Initially, PVIN, C21, C3, and C4 (see Figure 8). Generally, power sup-
REG9, and REG5 are 0V. After the input voltage is ap- plies keep typical startup times to less than 500ms even
plied, C21 (Figure 8) charges PVIN through the startup in low-line conditions (36VDC for telecom applications).
resistor, R22, to an intermediate voltage. At this point, Size the startup resistor, R22 (Figure 8) to supply both the
the internal regulators begin charging C3 and C4. The maximum startup bias of the device and the charging cur-
MAX5051 uses only 400μA (typ) of the current supplied rent for C21, C3, and C4.
by R22, and the remaining current charges C21, C3, and
C4. The charging of C4 and C3 stops when their voltages Oscillator and Synchronization
reach approximately 5V and 9V, respectively, while PVIN The MAX5051 oscillator is externally programmable
continues rising until it reaches the wakeup level of 24V. through a resistor and capacitor connected to RCOSC.
Once PVIN exceeds this wakeup level, switching of the The PWM frequency will be 1/2 the frequency at RCOSC
external MOSFETs begins and energy is transferred to with a 50% duty cycle, and is available at SYNCOUT. The
the secondary and tertiary outputs. When the voltage on maximum duty cycle is limited to < 50% by a 60ns internal
the tertiary output builds to higher than 9V, startup has blanking circuit in the power drivers in addition to the gate
been accomplished and operation is sustained. However, and driver delays.
if REG9 drops below 6.2V (typ) before startup is complete, Use the following formula to calculate the oscillator com-
the device goes back into standby. In this case, increase ponents:
the value of C21 to store enough energy allowing for volt-
age buildup at the tertiary winding. 1
R RCOSC =
Startup Time Considerations REG5
2 f S ( C RCOSC + C PCB ) In
The PVIN bypass capacitor, C21, supplies current imme- REG5 − V TH
diately after wakeup (see Figure 8). The size of C21 and
the connection of the tertiary winding determine the num- where CPCB is the stray capacitance on the PC board
ber of cycles available for startup. Large values of C21 (about 14pF), REG5 = 5V, VTH is the RCOSC peak trip
increase the startup time and supply gate charge for more level, and fs is the switching frequency.
cycles during initial startup. If the value of C21 is too small, The MAX5051 contains circuitry that allows it to be syn-
REG9 drops below 6.2V because the MOSFETs did not chronized to an external clock whose duty cycle is 50%.
For proper synchronization, the frequency of this clock
should be 15% to 20% higher than half the RCOSC fre-
quency of the MAX5051’s internal oscillator. This is be-
cause the external source SYNCIN directly drives the
power stage, whereas the internal clock is divided by two.
PVIN The synchronization feature in the MAX5051 has been
10V/div designed primarily for two devices connected to the same
power source with a short physical distance between the
REG9 two circuits. Under these circumstances, the SYNCOUT
5V/div from one of the circuits can be connected to the SYNCIN
of the other one; this forces the power cycle of the sec-
REG5 ond unit to be 180° out-of-phase. To synchronize a second
5V/div MAX5051, feed the SYNCOUT of the first device to the
40ms/div SYNCIN of the second device. If necessary, many devices
can be daisy-chained in this manner. Each device will then
Figure 5. Secondary-Side Synchronous Rectifier Driver Using have 180° phase difference from the device that drives it.
High-Speed Optocoupler
1% R4
1 28
RCOSC U1 SYNCIN 1MΩ
C1 +VIN
1% +VIN
100pF D2 3
MAX5051 C7 2 1 2 N1 8 7
+VIN -VIN
27 0.22µF R6 C10 C11 C12 C25
www.maximintegrated.com
+VIN FLTINT 1 6 0.47µF 0.47µF 1µF 0.07µF
R25 TP1 2 1MΩ 5
SYNCOUT R5 4 100V 100V 100V 100V
100kΩ 1% XFRMRH
3 26 38.3kΩ 3
RCFF STARTUP ON/OFF 1% C35 5V R29
C2 25 1µF
390pF UVLO N5 1Ω
24 1 8 1
GND
+VIN IN OUT DRVB
4 R7 REG9 D6 U5 C16 2
COM 23 2 1 2 7
D1 0Ω EN WDI 3.3µF
5 AVIN 2 C32
CSS
D8 C5 C8 1µF 3 GND N.C. 6
2 1 4700pF 6 22 4.7µF
COMP BST
4 5
R16 R15 RESET HOLD
21
10.5kΩ 31.6kΩ DRVH L1 VOUT
20 R13
1% 1% 7 XFRMRH XFRMRH R8 XFRMRH 2.4µH
47Ω
FB 19 8.2Ω
REG5 DRVB DRVB 2 VOUT
C4 T1 1 87
56 C13 C14 C15 C33
4.7µF 8 REG9 C34 270µF 270µF 270µF 1µF
REG5 18 D4 N4
REG9 DRVDD +VIN 330pF 8T 8 R10 2 3 4V 4V 4V 10V
C3 C9 D3 20Ω 2 1 4
4.7µF 9 1µF 5 SGND
REG9 17
PVIN PGND 1 2 65 8 1 3 4
C6 R9 7 2T C23 N_OUT GND
0.1µF 10 8.2Ω N2 1000pF U4
PVIN 16 4 5V 2 5
DRVL 2 4T P_OUT IN-
11 15 3 10 6
1 2 5
STT CS D5 6 1 6
C18 C20
1 87
V+ IN+
REG5 R14 1
100pF R17 D7 N3 C29
12 220pF 150Ω
LXVDD 0.027Ω 2 3 0.1µF
2 4
R27 C19 1% 1
R18
10Ω 1µF LXH
4.7Ω
IC_PADDLE C31 5V R26
13 C30 5V 5V 0.1µF
LXH LXH PVIN R22 +VIN 560Ω
VOUT 0.1µF 5 1
14 15kΩ 6 VCC AN
TP3 LXL 1
V+ IN+
R20 C27 U6
REG5 C21 U7
0Ω 0.15µF 2 4 R28
4.7µF P_OUT IN- 5 OUT
2kΩ
80V 3 4
R3 R19 M_OUT GND 3 2
475Ω GND CA
2.2kΩ 4 1
U2
R12
100kΩ
C24 1%
R11 3 2 VOUT
1000pF C22 REG9 U1: MAX5051
360Ω
4 2200pF U2: PS2913-1-M
3 U3 IN U3: MAX8515
Figure 8. Schematic of a 48V Input 3.3V at 15A Output Synchronously Rectified, Isolated Power Supply
OUT 1 2kV
C17 PGND C26 U4, U7: MAX5048A
0.33µF TRIM
5 2 0.1µF U5: MAX5023M
FB GND
U6: PS9715
C36 C28 R1 R2 N1, N2: SI4486
0.22µF 0.047µF 11.5kΩ 2.55kΩ N3, N4: SI4864
VOUT 1% 1% R24
N5: BSS123
10Ω
R23
10Ω
SENSE (+) SENSE (-)
Power-Supply Controller IC
Maxim Integrated │ 19
Parallelable, Clamped Two-Switch
MAX5051 Parallelable, Clamped Two-Switch
Power-Supply Controller IC
95 8
90 7
5
80
4
75
3
70
2
65 1
60 0
0 2 4 6 8 10 12 14 0 2 4 6 8 10 12 14
LOAD CURRENT (A) LOAD CURRENT (A)
Figure 9. Efficiency at Nominal Output Voltage vs. Load Current Figure 10. Power Dissipation at Nominal Output Voltage vs.
48V Nominal Input Voltage Load Current for 48V Input Voltage.
RL = 0.22Ω
VOUT
VOUT
100mV/div
1V/div
IOUT
5A/div
IOUT
5A/div
4ms/div 1ms/div
50% > 75% > 50% OF IOUT(MAX), dl/dt = 5A/µs
Figure 11. Turn-On Transient at Full Load (Resistive Load) Figure 12. Output Voltage Response to Step-Change in Load
Current
IOUT
A
10A/div
VOUT
50mV/div
IOUT
B
10A/div
2s/div A: 1ms/div
B: 20ms/div
Figure 13. Output Voltage Ripple At Nominal Input Voltage and Figure 14. Load Current (10A/div) as a Function of Time When
Full Load Current (Scope Bandwidth = 20MHz) the Converter Attempts to Turn On into a 50mΩ Short Circuit
RCFF 3 26 STARTUP
LXH 13 16 DRVL
LXL 14 15 CS
TSSOP
EXPOSED PADDLE IS INTERNALLY CONNECTED TO GND.
Revision History
REVISION REVISION PAGES
DESCRIPTION
NUMBER DATE CHANGED
2 5/14 No /V OPNs; removed automotive reference from Applications section 1
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Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2014 Maxim Integrated Products, Inc. │ 22