RMIT University © 2010 School of Electrical and Computer Engineering

EEET2261 Embedded Systems Eng.

Putting It All Together – HC11 Architecture

Aim:
To use the Quartus II development tools to build a simple HC11-like microprocessor using previously
created building blocks.

For this part of the work, you need to coalesce into groups of no greater than three.

Due:
This lab project brings together all of the previous components you have developed. The final
requirement is a design report and a final demonstration to your tutor in week 12. You will need to
show clearly that the circuit works as required and that you personally contributed and that you
know what is going on across the whole design (not just the part you may have done in detail).
Introduction:
The purpose of this lab is to build a simplified 68HC11 “look-alike” machine that is able to execute a
small number of instructions drawn from the instruction set. Which particular instructions these are
will be negotiated with your tutor after the lab starts. You will develop and simulate this using the
same tools used in the previous labs.

Getting Started:
Review the previous laboratories. Source your favourite caffeine.

Exercises:
1. Developing a Design Hierarchy. The greatest threat to any design is unmanaged complexity.
The easiest way to manage complexity is to use hierarchy – to place a boundary around parts
of the design and hide the internal complexity. We will look at creating a local design library
to aid in this process.

Open your first lab exercise (MyAdder) in the ISE. Create a component from this schematic
and place in your own local library. Note that the following description is for ISE8.1i. The
version on the lab machines is identical. Here is my version of the adder/incrementer circuit:

Open Exercise 2—the simple accumulator—from Lab 1 (Intro to Quartus II). Create a
component from this schematic and place in your own local library. Here is my version of the
accumulator circuit:

Now create a symbol for this file:

File → Create/Update → Create Symbol Files for Current Files

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RMIT University © 2010 School of Electrical and Computer Engineering
This creates a new symbol for the schematic. Position the cursor on the schematic and right
click. Select Open Symbol File. The new symbol (with a *.bsf extension) is opened. Check to
see if all of the I/O pins are present on the new symbol.

We now have a BLOCK SYMBOL FILE encapsulating the MyAdder function that can be made
available to other designs. The easiest way to do this is to attach the project directory as one
of the User Libraries under the Settings menu. Note that it will already be part of the current
project and therefore visible in the current Symbol Library.

2. Create the CPU library component. Repeat the steps above using your CPU component from the third
laboratory. Add this to your list of User Libraries, if necessary.

3. Use the simple controller from Lab 2 as the basis of a microprogrammed controller for your CPU. Note that
you will have to set the control ROM bits to suit your own CPU design.

4. Connect up the Controller, your CPU component, one 32x8bit RAM and one 32x8bit ROM component to
make a (very) cut-down HC11 Microprocessor design. You need to make up an address map for the RAM
and ROM. How is this done in the real HC11 parts? Can you do a similar thing in this design? How are
these separated into their own physical address spaces?

5. Debug and simulate the circuit as before. Show it working to your lab tutor. You will be asked to show the
design documentation. You will have to execute at least ONE complete instruction from the HC11 set. This
will be chosen by negotiation with the tutor who will try to spread the instructions around amongst the
groups to minimize overlap. First-in-first-served (i.e. if you want to control what you do, better get in early).
This operation will be what you must demonstrate to the tutor in week 12.

6. Finally, you will synthesize the design and download it to the DE-1 board. You will have to work out a
method to make the operation of the machine visible on the hardware.

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