Passive components

Electronic circuits consist of networks of passive components and electronic devices. The
basic passive components are resistors, capacitors and inductors

Resistors

- Devices which oppose the flow of electrons. They are represented in a schematic
diagram by the letter R. the international unit measure for resistance is the ohm
symbolized by the greek letter omega (Ω)
- The ohm maybe defined as, 1 Ω resistance is required to limit current flow within
a circuit to 1A when 1V of emf if applied.

Resistor types

a) Fixed resistors b) Variable resistors

- Conductors and insulators have resistance, the difference is that a resistor is a

component designed to produce a specific amount of resistance.

Purpose
-Used to direct and control current
- To produce specific voltages
When electrons pass through conductors some heat is caused by the resistance of the
conductors and its desirable.
Heating elements of stoves, toasters utilize the heat caused by the elements

Fixed resistors
- these have one value
- they can be described in terms of the way they are constructed or fabricated

Wire wound
- made from resistance wire around an insulating core
- core is either ceramic or plastic
- wound core is packaged in a round, tubular case of plastic or ceramic
- values range from a fraction of an ohm up to 35K Ω depending on the length and
diameter of wire used

1
Advantages
- power resistors used for high current applications
- precision resistors because the length and gauge of wire used can be measured
exactly than other materials used in resistors ( tolerance 0.005% to 1%)
- high stability resistors – value is stable under many conditions

Disadvantages
- physically large in size
- expensive as compared to carbon resistors

Carbon composition

- Made from a mixture of carbon (conductor) and clay (non-conductor which is

pressed and molded into rods by heating.

- they are packaged in plastic tubes with circular bands outside the package

- bands have different colors which represent the resistance values

- values range from a few ohms to 10MΩ

- tolerance is ±10%

- power ratings from 0.125W to 1W

Advantages

-less expensive

2
- Values vary over an extremely broad range

- made in the most popular sizes

-standard units can be purchased with the resistance values in fractions of an ohm

Disadvantages

- high tolerance

- poor stability

- noisy i.e. they introduce unwanted voltages due to agitated electrons (thermal
agitation Noise) causing a rushing sound in the speaker

Metal oxide

- Tin oxide is deposited on a ceramic rod and protected by a tough insulating

coating.

- Have color bands on the outside to represent their values

- Tolerance is ±3%

- Power rating typically 0.5W

Advantages

- offer high stability over a long period of time

- low tolerance

Disadvantages

-lower rating

3
Variable resistors

- Usually called potentiometers or rheostats

- They provide the ability to continually adjust the resistance of a resistor

- They consist of an incomplete circular track of either fixed carbon resistor for
high value and low power ( up to 2W) of fixed wire wound resistor for high
power.

- Connections to each end of the track are brought out to 2 terminal tags

- A wiper makes contact with the track and is connected to a 3rd terminal tag
between the other 2.

- Rotation of the spindle moves wiper over track and changes resistance between
centre and either end ones.

- Variable resistors can either be linear or non linear

Linear

- Equal changes of resistance occur when the spindle is rotated through equal
angles.

- Current through a linear resistor is directly proportional to the supply voltage and
inversely proportional to the resistance provided temperature remains constant.

Non linear (logarithmic)

- resistance change is not in direct proportion to the position change

- change of resistance at one end of the track is less than at the other for equal
angular rotations

4
-from a few ohms to several mega ohms values are 10KΩ, 50KΩ, 100K, 500KΩ and
1MΩ

Preset resistors

Symbol

- these are adjusted with a screw driver when necessary

- have tracks of carbon or cement ( ceramic and metal oxide)

Applications of variable resistors

- maybe used to control current in a circuit

- only one end tag and wiper are needed

- rotating clockwise increase resistance in the circuit and reduces curren

5
 Potential divider

- any voltage from zero to maximum voltage can be obtained by rotating the
spindle

- all three terminal tags are used in this case

Resistor specifications

1. Tolerance – Manufacturer‟s statement of how close to the exact value a resistor

can be expected to be.

2. Power rating – if the rate at which a resistor changes electrical energy exceeds
power rating it will overheat and be damaged.

3. The greater the physical size the greater the rating

4. Stability – it is the ability of a resistor to keep same value as it ages despite

changes of temperature and other physical conditions.

5. Nominal value – value of resistance in ohms

Resistor colour codes

- Clear method is needed for marking and identifying resistors

- Large units , values can be printed on cases

- Small carbon composition resistors have no room to print the information

- After printing a mark it will be difficult to read when it is connected in circuit.

- Every resistor is identified by at least three colour bands

6
FIRST BAND SECOND BAND THIRD BAND FOURTH BAND FIFTH BAND

COLOUR DIGIT COLOUR DIGIT COLOUR DIGIT COLOUR DIGIT TEMP COEFF
OR
RELIABILITY

BLACK 0 BLACK 0 BLACK 100

BROWN 1 BROWN 1 BROWN 101 BROWN ±1%

RED 2 RED 2 RED 102 RED ±2%

ORANGE 3 ORANGE 3 ORANGE 103

YELLOW 4 YELLOW 4 YELLOW 104

GREEN 5 GREEN 5 GREEN 105 GREEN ±0.5%

BLUE 6 BLUE 6 BLUE 106 BLUE ±0.25

%

VIOLET 7 VIOLET 7 VIOLET 107 VIOLET ±0.1%

GREY 8 GREY 8 GREY 108

WHITE 9 WHITE 9 WHITE 109

SILVER 10-2 SILVER ±10%

GOLD 10-1 GOLD ±5%

NO ±20%
BAND

Printed code

- code printed on resistors and consists of letters and numbers

- Also used on variable resistors and circuit diagrams e.g.

7
Value 0.27Ω 3.3Ω 68KΩ 4.7MΩ

Printed code R27 3R3 68K 4M7

Tolerances are indicated by adding a letter at the end

F = ±1% G=±2% J=±5% K=±10% M=±20%

E.g. 5K6K =5.6K Ω ±10%

Preferred values

Exact values of fixed resistors are unnecessary so only preferred values are made

- values chosen for the E12 series (±10% tolerance) are 1, 1.2, 1.5, 1.8, 2.2, 2.7,
3.3, 3.9, 4.7, 5.6, 6.8, 8.2 and multiples that are 10 times greater

- values for the E24 series (± 5% tolerance) have 24 basic values, those in addition
to the E12 series being 1.1, 1.3, 1.6, 2.0, 2.4, 3.0, 3.6, 4.3, 5.1, 6.2, 7.5, and 9.1

NON LINEAR RESISTORS

Temperature coefficient

- Important difference between carbon and wire wound resistors lies in the effect of
a change in temperature on resistance.

- The value of a carbon resistor decreases if it gets hot whereas the resistance of a
wire wound increases with temperature.

- Carbon has a negative temperature coefficient while metals have a positive

temperature coefficient.

- The temp coefficient of a resistive material is the factor or coefficient by which its
resistivity at 0°C must be multiplied to give resistivity increase for each degree
rise in temp

- Special type of resistors which respond to change are called thermistors or

thermal sensitive resistors

SYMBOL

8
 - Temp of thermistors is a function of both ambient temp and power dissipation due
to the current flow through the device.

- There are 2 main types of thermistors

i) The NTC (negative temp coefficient)

ii) The PTC ( positive temp coefficient)

The NTC

- Resistance of most semiconductors decreases with increase in temp.

- When heat is applied to the semiconductor, a number of its covalent bonds are
broken, releasing free electrons thus reducing the resistance of the material.

Temp resistance curve for NTC

- When a voltage is applied to an NTC thermistor which is in series with a resistor,

current will flow and heat is generated in the thermistor.

- Its resistance will be lowered and more current will flow thru the cct.

- This in turn will heat the thermistor more and lower its resistance further.

- The process is cumulative and will continue until the thermistor reaches the max
temp possible for the amount of power available in the cct.

- At this time a steady state will exist.

- Because of the mass of the thermistor, it takes time for it to be heated to its max
value.

Application of NTCs

i) temp measurement

9
- Vs is a constant voltage supply

- The bridge is balance so that voltmeter reading is zero before the NTC is heated.

- The NTC is then placed in the environment in which the temp is to be measured.

- The balance of the bridge is disturbed and a small voltage appears across the
bridge.

- The voltage is then amplified using a differential amp and then measured using a
voltmeter graduated in °C

ii) Transistor protection

- When the transistor heats up, resistance of the NTC falls, thereby reducing the
base current which in turn reduces heating of the transistor.

10
iii) Prevention of current surges

- e.g. filaments of electron tubes of radio and TV receivers have low resistance
when cold.

- When switching on a large current tends to flow through the lamp (damaging it).

- With the use of an NTC, initially current is reduced at room temp.

- Current grows slowly as the bulb heats and the NTC resistance lowers

Disadvantages of NTCs

i) Non-linearity, hence scales are difficult to make

ii) NTC takes along time to return to its original value

iii) They are not stable

PTCs

- for most conductors, the resistance increases with increase in temp

- PTC thermistors are generally made of barium, strontium titanate

11
 - Resistance of PTC thermistors increase exponentially as the temp is increased

- Resistance of PTC at any temp can be calculated by the formula

RT  RN (1  T  T 2 )
Where RN is the resistance at room temp

α and β are stable coefficients

Applications of PTCs

i) PTC can be used for temp measurements as in NTCs

ii) Motor/Transformer winding protection

- the PTC is wound together with windings

- during the normal operation PTC has low resistance hence it does not interfere
with the operation of the motor/ Tx

- when the windings begin to overheat, resistance of PTC rise exponentially thereby
blocking the rise of current through the windings hence overheating stops

- when the winding cool down, the PTC resistance falls and normal operation is
restored

The voltage dependant resistor (VDR)

- it is also referred to as a varistor

- it is a resistor whose resistance varies depending on the voltage across it

Symbol

12
 Characteristics

- VDR is normally made of material such as silicon carbide bunched with a ceramic
and dry pressed into rods or discs and then fired at 1250°C

- A VDR is chosen to have high resistance at normal or supply voltage and a low
resistance at high voltages ( associated with transient peaks in a cct)

- The resistance of a VDR falls exponentially with increase in voltage

Uses of VDR

i) protection against current surges

- Normally the VDR has a high resistance in the range of MΩ, when struck by
lightning the VDR is subjected to several KW and its resistance exponentially
falls towards zero thus shunting all the current to the ground.

- After the surge has passed the VDRs resistance maintains its high value allowing
normal operation

Cathode ray tube degaussing coil (demagnetizing coil)

13
 - On switching on most current flows through the VDR thereby magnetizing the
coil since the NTC has very high resistance at room temp

- The magnetism on the coil cancels any magnetism on the screen. As the coil heats
up the resistance of the NTC falls allowing more current to go to the CRO
systems

Hall generator effect

- If a current carrying conductor is subjected to a perpendicular magnetic field

Holes will accumulate on one end and electrons to the other end creating +ve and
–ve potentials respectively

- The difference between these two potential is referred to as Hall voltage and the
device is referred to as Hall generator

- Semiconductors have replace metals as materials for hall generator because they
have extremely high electron mobility

Magneto Dependant Resistors

SYMBOL

- they are magnetically controlled resistors

- charge carriers passing through the semiconductors are deflected to the sides due
to transversal magnetic fields

14
 - the extension of the path of charge carriers through the conductor ( channel of
charge carriers) with increasing flux results in an increase in the resistance of the
conductor

Construction

- the variation of resistance with the magnetic field strength is a function of both
the magnetic flux density and temp

Applications

i) Current measurement

ii) Proximity switches

iii) Counters

iv) Detection and measurement of magnetic field

15
CAPACITORS

- a capacitor is a device that store electric charge

- it does not allow direct current to flow through it and it behaves as if alternating
current does flow through it

Construction

- In its simplest form it consists of two parallel metal plate separated by an insulator
called the dielectric.

- Capacitance value of the parallel plate structure is found from the expression
k 0 A
C
d
Where k is the relative dielectric constant,

ε0 is the permittivity of free space ( constant value of ε0 is equal to 8,85*10-12F/m)

A is the area of the plates in m2

d is the distance of between the plates in meters

 0  r A(n  1)
Or C  , where ε0 is the permittivity of free space,εr is the relative
d
permittivity which depends on the material, d is the width of the dielectric

Stray capacitance

- capacitance can and does exist between conductors that are at different potential
regardless of their shape

- various configurations of cct elements and leads exhibit such un wanted and
unplanned capacitance

16
 - this is called stray capacitance

- it can be small and neglected and in some cases it may be large and can cause
significant changes in cct behaviour

- e.g. high frequency can be shunted by stray capacitance

- when stay capacitance is large it must either be reduced or its magnitude must be
included into the analysis of the cct

Symbols

FIXED CAP PRESET CAP

VARIABLE CAP POLARIZED CAP

Capacitor specifications

i) Nominal value

ii) Tolerance

iii) Stability

iv) Working voltage – the largest dc or peak ac voltage that can be applied across
Cap and is usually marked on the device. If exceeded the dielectric breaks
down and permanent damage may occur to the Cap

v) Leakage current through the dielectric- refers to the charge lost through the
capacitor since no dielectric is a perfect insulator

vi) Frequency range is the range of frequencies which a cap may be operated
without causing high power loses in the dielectric

vii) Temp coefficient – it gives the rate of change capacitance with temp

17
Types of capacitors

The dielectric determines the type of capacitor

Capacitor are generally classified into 2 groups

i) fixed

ii) variable

Fixed capacitor

i) paper capacitors

- formed by wrapping successive layers of wax paper and foil into a cylinder (
most paper capacitors are cylindrical)

- wire leads can be extended straight out from the cap

- in packaging a black band is usually drawn at one end of paper caps

- this indicates the lead that is connected to the outside foil wrapping

Disadvantages

- have poor stability

- high temp coefficient

- tolerances relatively poor (±10% and ±20% )

- relatively large leakage currents

Advantages

- withstand high voltages ratings approx 50V to 1600V

- low cost

Applications

- used in amplified, radios, television sets, test instruments and computers

Mica cap

- successive layers of mica and foil are stacked on top each other then pressed
together

- finished caps are encapsulated in a ceramic material

18
Construction

- they are more expensive than paper caps

- the can perform in wider freq bands

Advantages

- low tolerance ±1%

- low temp coefficient of cap

- low leakage current ( R leakage is approx 1000Mohms

- good stability and reliability

- high working voltage (100V – 1000V )

Disadvantages

- expensive

- available in small values (3pF -47 000pF )

Applications

- widely used in comm. And computing equip

Ceramic caps

- use a form of clay as the dielectric

- clay is pressed into moulds , and then fired

19
 - the dielectric materials are layered with foil or other plate materials and packaged
in molded containers usually made of plastic

- they can be disc, rod or plate shaped

Advantages

- they tolerate high voltages (50V -2000V)

- tolerate wider ranges of temp

- costs are lower

- high capacitance values obtained with small size

Disadvantages

- quality and reliability are poor

- poor tolerance

- poor stability

Applications

- can be used in low ac voltages as by pass caps in electronic amps

- used in h.f. comms

Polyester caps

- two strips of polyester film (plastic dielectric) are wound between two strips of
aluminum foil (plates)

- two connections, one to each strip of foil, form capacitor leads

20
Advantages

- small size

- high capacitance value (0.01μF - 10μF)

- low temp coef

- good stability

- low leakage current

Disadvantages

- affected by humidity

- volume when large values are required

Polystyrene caps

- polystyrene is easy to handle in fabrication

- basic material is a resin that can be cured during production

- finished dielectric is insensitive to humidity and extremely rugged

- polystyrene is fused to an aluminum film that is rolled into a capacitor body

- capacitance values range from 5pF to 10000pF

- voltage ratings from 200V to 600V

Applications

- situations in which light weight and high resistance to humidity are required

- aircraft and marine devices

Polycarbonate film wrapped capacitors

- construction is similar to polystyrene

- polycarbonate units are slightly more costly and can be built into larger
capacitance values

- capacitance values range from 0.01μF to 2μF

21
 - voltage ratings run from 50V to 200V

Applications

- radios

- TV sets and other comm. Devices

Mylar caps

- Mylar film is used as a dielectric in place of paper or other films for these caps

- high stability and reliability

- capacitance values range from 0.001μF to 1μF

- voltage ratings from 50V to 600V

Paper – oil caps

- use oil – soaked (impregnated ) paper as their dielectric

- packaged in canister type units

- has extremely high voltage rating (200V – 5000V )

- capacitance values range from 0.5 μF to 125 μF

Applications

- high voltage applications

- motor starters, air conditioners and business machines

Electrolytic caps

- construction technique provides an extremely high capacitance to size ratio

- metal plate usually made of aluminum or tantalum

- consists of two aluminum foils, one of which is coated by an extremely thin oxide

- oxide is grown on the metal by a process of applying voltage to the capacitor, the
process is called forming

22
 - thickness of oxide depends on forming voltage

- between the foils in an electrolytic solution soaked into paper

- the electrolyte ( conductor) serves as an extension of he non oxidized metal foil

- the electrolyte can butt up directly against the oxide dielectric

- the two oppositely charged plates are then effectively separated by an extremely
thin oxide film that possesses an extremely high dielectric constant

Advantages

- high values possible in small volumes

- cheap

- wider range of capacitance values ( 1μF to 270 000μF )

Disadvantages

- high leakage currents

- short shelf life ( lifespan) life is short when not in use and longer when in use

- poor stability

- poor tolerance

- leakage resistance low (approx 1Mohm)

- low breakdown voltage

- polarization limited to dc applications

23
Tantalum caps

- construction similar to electrolytic differences being the foil which is made of

tantalum

- capacitance values from 0.0047μF to 560μF

- voltage ratings from 6V to 150V

- used in transistor type ccts

- they are small

- have longer shelf life

- metal container serves as the connection to cap and the electrolyte as the negative
plate

- +ve (plate) connection of the cap is an aluminum rod inserted in the centre of the
cap[

- The rod is surrounded by a film of oxide, which serves as the dielectric

- Electrolyte caps have definite polarities that must bee observed when connecting
them in a cct

- If reversed, the oxide coating on the +ve plate will break down, allowing current
to flow through the cap

Ac Applications

- electrolytic caps for ac use are constructed so that two units are placed back to
back and they share a –ve plate

24
 - an oxide coating is placed on each +ve plate

- ac electrolytic caps are designed so that they present a dielectric to each polarity
of the sine wave

Variable caps

Symbol

- used in ccts that operate over a band of freqs

- the dielectric is air

- power and voltage determine the size of cap

- air has a low breakdown voltage, which means the plates must be spaced further
apart as the voltage is increased

- the thin plates are made of aluminum, thus reducing size and weight

- one set of plates ( the stator) is stable and the other set (the rotor) is removable

- the rotor is connected to a shaft, which allows it to be moved

- when rotated, the rotor‟s plates pass between the stators plats without touching

- this increases on decreases the plate area and varies the capacitance

Adjustable caps (preset, padders or trimmers)

- used to make fine, infrequent adjustments to the capacitance of a cct

- usually set during maintenance

25
Charging a cap Using dc

- when the switch is closed, electrons from plate X of cap are attracted to the +ve
terminal of the battery

- an equal no. of electrons are repelled to plate Y by the –ve terminal

- +ve charge builds up on X and equal -ve charge on Y

- While this charging action is occurring, electrons are moving along the
connecting wires ( but no through the dielectric)

- A brief current would be detected at any point in the cct

- In a short time, depending on the value of the cap, resistance of battery and wires,
voltage between X and Y is equal and opposite to that of the battery

- Electrons flow then stops i.e. current is zero

- If X has a charge +ve Q then plate Y has a charge –ve Q

Using AC

- During the positive half cycle, electrons will be moving from –ve of supply to cap
lower plate and from C upper plate to +ve of battery

- During the –ve half cycle the direction of electrons changes

- This changing direction of electrons continues as long as the ac is available

Thus – a cap seems as if it allows ac to pass through it but blocks dc

Caps can be connected in parallel or in series

26
Inductors

- an inductor is a device that opposes any change in current flow

- an inductor does not oppose current flow itself, only a change in the amount of
current flow is opposed

- ac changes continually, a coil continually opposes the change

- * Inductance: is the property of a cct that enables it to oppose any change in

current. It is measured in henries and is represented by the letter H

- * 1 henry of inductance is present when 1 volt of EMF id induced by current that

is changing at the rate of 1A per second

Factors which affect the devices inductance

1. The number of turns of the coil - inductance of a coil of directly proportional to the
no. of turns of the coil

(a) (b)

- the field around either loop in (a) can only induce a voltage (EMF) in one other
loop

- in (b) the field of each loop can cut three other loops, thus inducing an EMF in
each

- the back emf opposes any change in current flow

o r N 2 A
L Where N is the no. of turns, μ o is absolute permeability, μr
l
is relative permeability, A is the area of on turn, L is the length of the coil

2. Type of material

- soft iron is more permeable than air, i.e. soft iron conducts more magnetic lines of
flux

- inductance of a coil is directly proportional to the permeability of the material

used as its core

27
 3. Diameter to length ratio

- Inductance of a coil is inversely proportional to the cross sectional area of its core
and the length of its core

Types of inductors

Air core, Iron core, Variable inductance, Dust core

Laminated iron cores

- materials based on iron and are used where a large inductance is required

- iron increases several hundred times the strength of the magnetic field caused by
the current flowing in the coil of the inductor

- silicon steel, and nickel iron alloys such as mumetal stalloy are used at audio freqs
up to 20kHz

- iron cores are laminated i.e. consists of flat sheets which are coated thinly on one
side by an insulating material

- laminations reduce the conversion of electrical energy to heat by making it

difficult for induced currents to circulate in the whole core, these currents are
called eddy currents and flow in circles

- if the laminations are at right angles to the plane of the coil windings, the core
offers a large resistance to the eddy currents

- E and I –shaped laminations for lower freq choke

Air core inductors

- inductors with an air core have small inductances and are used for h.f. either in
tuning ccts or as rf chokes to stop r.f. currents taking certain path in a cct

- Coils for use in h.f are made of Litz wire which consists of several copper wires
insulated from each other.

- There is considerable reduction of conversion of electrical energy to heat

Iron dust and ferrite cores

- - in the iron core, the core is made of finely divided ferromagnetic particles of an
alloy such as permalloy coated and compressed in an insulating binder

- Iron dust cored inductors have a high resistance and so reduce eddy current losses

- Ferrite cores have in many instances replaced iron dust cores for r.f. coils

28
 - Ferrite is a chemical compound in which one atom of iron in the iron oxide
molecule (Fe3O4) has been replaced by an atom of another metal such as
manganese or nickel

- Advantages of ferrite over iron dust cores

- 1/ a higher relative permeability

- Negligible eddy current loss

- Can be applied to coils used in h.f .

Toroid cores, toroidal inductors

- flux loops all exist within the core, they are doughnut shaped

- each turn of wire is threaded through the centre of the core

- toroid core usually made from powdered iron or ferrite

- toroidal inductors can have high inductance values for their size

Molded inductors

- these look like resistors

- they are enclose in an insulating material to protect the inductor winding

- molded inductors can have cores of are, ferrite or powdered iron

Shielded inductors

- inductors are often shielded to protect them from the influence of magnetic field
rather than their own

- the shield is made from magnetic material

- he coil is wound on a cylindrical tube or bobbin

- they are used on PCBs

- molded inductors have their shields encased underneath the outside molding

Filter chokes

- laminated iron core inductors are often referred to as filter chokes

- used in a power supply to smoothen out the fluctuating or pulsating dc

29
RF chokes.coils

-inductor may have an air, powdered iron or ferrite core

Ratings of inductors

i) Dc resistance specifies the total resistance of the wire in the winding if the inductor

- This is the resistance one would measure between the terminals of the inductor with an
ohmmeter called ohmic resistance

ii) Current rating indicates how much current the inductor can continually carry without
overheating

iii) Voltage rating indicates how much voltage the insulation on the inductor
winding can continuously withstand.

- Exceeding this voltage rating may not result in instantaneous breakdowns of the
insulation. However it will shorten the life expectancy of the inductors insulation

iv) quality of an inductor refers to the ratio of tits resistance all other factors being
equal, the lower the dc resistance the higher the quality of the inductor

v) inductors have manufacturers‟ tolerances- precision inductors can be obtained

with a tolerance of less than ±1%

- they are expensive

- Typical inductors used in massed produced electric and electronic devices have
tolerances of ±10% or more

30
BASIC ELECTRONIC MATERIALS

Basic materials used in electronics are conductors, insulators and semiconductors

Conductors

- Metal is a good conductor of electricity

- Salt water is a reasonably good electrical conductor while distilled water is a poor
conductor

Factors affecting quality

- if atoms of a material to release electrons easily the material is a good conductor

- Temp affects conductivity of most materials. Some have a +ve temp coff and
others have a –ve temp coeff

- rate of change varies among materials, for some it is slight and for some it is
significant

- cross sectional area of conductor i.e. the width of the path the electrons can follow

ATOMS

- an atom is the smallest particle in an element that retains the characteristics of that
element

- each know element has a unique atomic structure

- according to the Borh model atoms have a planetary structure which consists of a
central nucleus surrounded by orbiting electrons

- the nucleus consists of +vely charged particles called protons and uncharged
particles called neutrons

Atomic weight and number

- atomic weight is approx the no. of protons and neutrons in the nucleus

- atomic number equals the no. of electrons in an electrically balanced atom

- e.g. Hydrogen atomic weight is 1 and atomic no. is 1

- elements are arranged in the periodic table according to their atomic number

Electron shells and orbits

- Electrons orbit the nucleus at certain distances from the nucleus.

31
 - Electrons near the nucleus have less energy than these in more distant orbits.

- Only discrete values (orbit) of electron energies exist within atomic structures.

- Each discrete distance (orbit) from the nucleus corresponds to a certain energy
level

- Orbits are grouped into energy bands known as shells

- Each atom has a fixed no. of shells

- Each shell has a fixed maximum no. of electrons and permissible energy levels (
orbits)

- Differences in energy levels within a shell are much more smaller than the
difference in energy between shells

- Shells are designated k, L, M, N and so on k being the closest to the nucleus

Valence electrons

- Electrons away from the nucleus are less attracted by the _+vely chared nucleus

- Force of attraction decreases with increase in distance from the nucleus

- Electrons in the outermost shell have the highest energy levels and are relatively
loosely bound to the atom

- These are called valence electrons and contribute to chemical reactions and
bonding with the structure of the material

- The valence of an atom is the no. of electrons in its outermost shell

Ionization

- if a valence electron acquires sufficient energy it can be completely removed from

the outer shell and the atom‟s influence

- departure of a valence electron leaves a previously neutral atom with an excess of

+ve charge ( more protons than electrons )

- this process of losing a valence electron is known as ionization and the resulting
+vely charged atom is called a +ve ion (H+ designation for hydrogen)

- the escaped valence electron is called a free electron

- when an electron falls into the outer shell of a neutral atom he atom becomes
negatively charged and is called a –ve ion

32
Silicon and germanium atoms

- these are the widely used semiconductor materials

- they both have 4 valence electrons

- silicon has 14 protons in its nucleus where germanium has 32

Atomic bonding

- Si atoms combine into molecules to form a solid material and fixed parten called
crystal

- atoms within the crystal structure are held together by covalent bonds

- each si atom positions itself with 4 adjacent atoms

- since an atom can have 8 electrons in its outer shell a si atom with its 4 valece
electrons share an electron with each of its 4 neighbours

- Sharing of valence electrons produces covalent bonds that hold atoms together
because each shared electron is attracted equally by the two adjacent atoms which
share it.

Conduction in semiconductors

- Each shell corresponds to a certain energy bond and is sep[erated from adjacent
shells by energy gaps

Conduction electrons and holes

- at room temp a si crystal derives heat energy from the surrounding air

- the valence electrons gain sufficient energy to jump the gap from the valence
band into the conduction band becoming free electrons

- when a valence electron jumps to the conduction band a vacancy or hole is

created

- recombination occurs when a conduction band electron loses energy and falls
back into a hole in the valence band

- at room temp pure si has a no. of free electrons drifting randomly throughout the
material

- there is also an equal no. of hole in the valence band created when these electrons
jump into the conduction band

33
Germanium VS silicon

- pure germanium has more free electrons than silicon and therefore higher
conductivity

- si can be used at higher temps than germanium

Electron and hole current

- when a voltage is applied across a piece of silicon free electrons in the conduction
band will be attracted towards the +ve end

- this movement of electrons is called electron current

- at valence level vacancies or holes that are created by electrons moving into the
conduction band will be filled by the valence electrons nearby thus leaving holes
where they came from

- effectively the hole has moved from one place to another

- this is called hole current

Semiconductors, conductors and insulators

-in their pure state semiconductors are just as good as insulators at absolute 0°C

Doping

- intrinsic (pure) semiconductor materials do not conduct current well because of

the limited no. of free electrons in the conduction band

- resistivities of si and ge can be drastically reduced and controlled by the addition

of impurities

- this process is called and results in extrinsic conduction i.e. increasing the no. of
current carriers (electrons)

N-type semiconductor

- To increase the no. of free electrons in pure si, pentavalent impurity atoms are aadded

- Atoms with 5 valence electrons, arsenic, phosphorus and antimony

- 4 antimony atom‟s valence electrons form the covalent bonds leaving one extra
electron

- This extra electron becomes a conduction electron because it is not attached to any
atom

34
 - No. of conduction electrons can be controlled by the amt of impurity added

- Because the no. of electrons has increased si doped in this way is an N-type
semiconductor

- Electrons are the majority carriers in the N-type material

- Holes are minority charge carriers

P-type semiconductor

- Trivalent impurity atoms such as aluminum, boron and gallium are added to pure si
material

- The trivalent atom forms covalent bonds with four si atoms

- All its valence electrons are used in the bonds; a hole is formed with each trivalent atom

- No. of holes can be controlled by amt of impurity added to si

- Current carriers are holes and si and ge doped in this way is called P type
semiconductor

- Holes are majority charge carriers in the p-type material and electrons are minority
carriers

PN junctions

- when a piece of n-type an p-type si material are put together they form a pn
junction

- The pn junction is fundamental to the operation not only of diodes but also
transistors and other solid state devices.

The depletion layer

- at instant of junction formation some electrons diffuse across into the p region
and recombine with holes near the junction

- for each electron that crosses the junction to recombine with a hole , a pentavalent
atom is left with a net positive charge (+ve ion)

35
 - when an electron recombines with a hole in the p region , a trivalent atom
acquires net –ve charge (-ve ion)

- as a result of the recombination, a large no. of _+ve and –ve ion build up near the
junction

- as the layer builds up , the area both sides of the junction becomes essentially
depleted of any conduction electrons or holes

- this area is called the depletion layer

- when an equilibrium is reached, the depletion layer has widened o a point where
no further electrons can cross the pn junction

- existence of +ve and –ve ions on either side of the junction creates a barrier
potential VB across the depletion layer

- at 25°C this VB fis approx 0.7V for sil and 0.3 for ge

- as junction temp increases, VB decreases

Energy levels

- at the instant of junction formation, energy bands of trivalent atoms in P type are
at a slightly higher level than those of pentavalent atom in n type material

- this is because of the core attraction for the valence electrons (+3) in trivalent is
less than core attraction for the valence electrons (+5+ in the pentavalent atom.

- The conduction bands for the p and n type materials are overlapping with the
valence bands

- Electrons of the higher energy band near the top of the n region conduction band
begin diffusing across the junction into the lower part f the p region conduction
band

36
 - as soon as an electron diffuses across the junction, it recombines with a hole in the
valence band]

- as diffusion occurs, the energy bands in the n region shift down as more electrons
of higher energy are lost

- when top of the n region conduction band reaches the same level as the bottom of
the p region conduction band, diffusion ceases and the equilibrium condition is
reached

Biasing the PN junction

- There are two bias conditions for the pn junction i.e. forward and reverse

- Bias is a fixed voltage the sets the operating conditions for a device

Forward bias

- Condition that permit current top flow through the pn junction

- -ve terminal of battery pushes the conduction band electrons in the n region towards
the junction, while +ve terminal pushes the holes in the p region a toward the junction

37
 - When it overcomes VB, the external voltage source provides the n region electrons
with energy to penetrate the depletion layer and recombine with p region holes

Effect of Barrier voltage on forward bias

- the barrier potential of the depletion layer can be envisioned as acting as a small
battery that opposes bias

- the external bias voltage must overcome the barrier potential before the diode
conducts

- once conducting in the forward direction , the voltage drop across it remains at
approx barrier potential

Reverse bias

- Condition that prevents current flow through the pn junction

- -ve terminal of battery attracts holes in the p region away from the pn junction while
the +ve terminal also attracts electrons away from the junction

-As electrons and holes move away from the junction, the depletion layer widens

- The layer widens until the potential difference across it equals the external bias
voltage

- When the diode is reverse biased, the depletion layer effectively acts as an insulator
between the layers of oppositely charged ions

- This forms effective capacitance

- Depletion layer widens with increased reverse bias voltage, the capacitance
decreases and vice verse

Reverse leakage current

- majority current very quickly becomes zero when reverse bias is applied

- there is also a very small leakage current produced by minority carriers during
revere bias

- ge has a greater leakage current than si

- reverse leakage current depends primarily on junction temp

- increase in temp causes an increase in leakage current

38
Reverse breakdown

- if external reverse bias is increased to a large enough value, avalanche breakdown

occurs

- conduction band electrons acquires enough energy from the external source to
accelerate it towards the +ve end of the diode

- during its travel it collides with an atom and imparts enough energy to knock a
valence electron into the conduction band and they become two conduction band
electrons

- each collides with an atom, knocking two more valence electrons into the
conduction bands

- a rapid multiplication of conduction band electrons results which is known as the

avalanche effect

- this results in a rapid build up of reverse current

Volt ampere characteristics of the pn junction

- the V-I characteristics of a pn junction (semiconductor or crystal diode) is the

curve between the voltage across the junction and the cct current

- usually voltage is along x-axis and current along y axis

- R is the current limiting resistance, it prevents the forward current from

exceeding the permitted value

Zero external voltage – when the external voltage is zero, i.e. when S is open, the
potential barrier at the junction does not permit current flow

Forward bias

- at 0.7 for si and 0.3 for ge, the potential barrier is altogether eliminated and currnt
starts flowing in the cct

39
 - from now onwards, the current increases with the increase in forward voltage

- a rising curve OB is obtained with forward bias

Reverse bias

- p type connected to –ve terminal of battery and n type connected to +ve terminal

- the junction resistance becomes very high and no current flows thru the cct

- practically a small current (μA) flows in the cct

- this current is due to minority carriers

- if reverse voltage is increased continually, the kinetic energy of electrons

(minority carriers) may become high enough to knock out electrons from the
semiconductor atoms

- Breakdown of the junction occurs, characterized by a sudden rise of reverse

current and sudden fall of resistance of barrier region

- This destroys the junction permanently

Limitations in operating conditions of pn junction

i) maximum forward current – highest instantaneous forward current that a pn

junction can conduct without damage to the junction

40
 ii) normally specified in manufacture‟s data sheets

iii) if current in a pn junction is more than this rating, the junction will be
destroyed due to overheating

iv) peak inverse voltage (PIV) – it is the max reverse voltage that can be applied
to the pn junction without damaging it

v) Max power rating – max power that can be dissipated at the junction without
damaging it

vi) the power dissipated at the junction is equal to the product of I and V across
the junction

vii) Max forward voltage

Semiconductor diode

Symbol

-the forward biased diode conducts easily whereas a reverse biased diode practically
conducts no current

Forward resistance

- Resistance offered by the diode to forward bias

- The resistance is of two types namely dc forward resistance and ac resistance

- DC forward resistance

- opposition offered by the diode to direct current

- measured by the ratio of dc voltage across the diode to the resulting dc current
thru it

OA
dc forward resistance R f 
OB

AC forward resistance

41
 - opposition offered by a diode to the changing forward current

- it is measured by the ratio of change in voltage across diode to the resulting

change in current thru it

oc  oa ac V
Ac forward resistance   
of  od df I

- ac forward resistance is more significant as diodes are generally used with

alternating voltages

- forward resistance of diodes is very small, ranging from 1 to 25 ohms reverse

resistance

- resistance offered by the diode to reverse bias

- it can be dc or ac reverse resistance depending on whether the reverse bias is

direct or alternating

- ideally the reverse resistance is not infinite because for any value of reverse bias
there does exist a small leakage current

DC load line for a PN Junction Diode

- the applied load will normally have an important impact on the point or region of
operation of a device

- if analysis is performed in a graphical manner, a line can be drawn on the

characteristics of the device that represents the load , the intersection of the load
line with the Xstics will determine the pt of operation of the system

42
Applying KVL, Vs –VD- VR = 0

Vs = VD + IDR

- the intersections can easily be determine if on simply employs the fact that
anywhere on the vertical VD = 0V

Vs
- if VD = 0V, solve for I D  , and when ID = 0, VD = VS
R

- a straight line drawn between the 2pts will define the load line

- if the value of R is changed , the intersection on the vertical will also change

- the result will be a change in the slope of the load and a different pt of intersection
between the load line and the device characteristics

- a load line is defined by a network and a Xstics curve defined by the device

- The diode voltage and current can be determined at the pt of intersection

- The pt of operation is called the quiescent pt (Q pt)

43
 Examples

a) Draw the forward Xstics of diode

b) Plot in the dc load line and hence determine the voltage across and the current
thru the diode at the Qpt

c) Calculate the current thru the diode assuming

i) an ideal diode

ii) a diode with a constant voltage drop across it

iii) a non-ideal (practical ) diode

2. Determine VD, VR, and ID

3. Determine VO and ID

4. Determine VO, I1, ID1 and IDS for parallel diode configuration

44
RECTIFICATION

Dc power supply block diagram

A power supply is the cct that supplies the energy to operate an electronic system. E.g
TV, Radio etc

Why use a block diagram

- Most electronic systems have no so many components.
- A set of components operate function in the system.
-The electronic system can be subdivided according to the function
- This makes it easy for the technician to easily identified the faulty section

Basic power supply stages

A. Transformer
- transforms the ac line voltage to produce proper ac voltage input to the
rectification functions
- electrically isolates the electronic equipment from the utility power lines

Basic operation of a transformer

- Consists of two coil windings –primary and secondary windings which are not
electrically connected.
- Varying current from an ac voltage when applied to a primary coil creates a
changing magnetic field in the iron core.
- This magnetic field is coupled to the secondary windings through the core cuts
into secondary windings and induces an ac voltage in each turn at the secondary
winding
- Energy is transferred from the primary to the secondary windings by varying the
magnetic field without any connection between them.

Transformer function
-Must provide an ac output voltage required to produce a proper dc output voltage

45
- This can be done by varying the ratio of the no. of secondary turns to the no. of primary
turns
B. Rectification
- Converts an ac voltage into a dc voltage .
- A diode performs the rectification
Types of rectification
1. Half rectification
- a single diode with an output of 60Hz is used for low current applications
2. Full wave rectification
- has 2 diodes and converts both alternatives of the secondary voltage to a dc voltage
- Output is 120Hz in an average dc voltage of 0.636Vpk
3. Bridge rectifier
- Uses four diodes in bridge diodes in a bridge network.
C. Filtering
- filtering of the rectifier is smoothed so that a steady constant dc is available to the load
- Output from a rectifier contains an averaged dc value and an ac portion called a ripple
voltage.
- Resistors, inductors and capacitors are used to build filters
D. Regulation
- a zener regulator r IC regulators can be used . Its main function is to keep the terminal
voltage of the dc supply constant even when
i) Ac input voltage to the transformer varies
ii) The load varies

The half – wave rectifier

- the rectifier conducts current only during the positive half cycles of the i/p ac
supply

- -ve half cycles of the ac are suppressed i.e. during the –ve half cycles, no current
is conducted and hence no voltage appears across the load
- during the –ve half cycle, diode D is forward biased and it conducts current
through the load resistor producing an output which is in phase with the supply
- During the –ve half cycle D is reverse biased and so does not conduct current.

Average dc = 0.318Vpk
F = 50Hz
To derive the value
To calculate the area under the half cycle of rectification signal we must integrate
The rectified signal

46
The dc signal can be expressed as
V = Vpk Sin Ө for 0 ≤ Ө ≤ ∏ rad

From 0 to 2∏ rad the value is calculate to be

Vdc  Vac  1
T  vd

1
2 0
 Vm sin d

Vm
 ( cos  )
2

Vm
 cos   cos 0
2
Vm


Average DC = 0.318Vm

Effects of Barrier Potential on half wave rectifier

A crystal diode having rf = 20 ohms is used for half wave rectification. If the applied
voltage v = 50 sin wt and RL = 800 ohms find

i) Im, Idc, and Irms

ii) Ac power input and dc power output
iii) Dc output voltage
iv) Efficiency

Efficiency of half wave rectifier

outputPdc
efficiency 
inputPac

47
Pdc = Iav * RL

 
1 1 VmSin
Iav  
2 0
id 
2 0 r f  RL
d


Vm
 cos  0
2 (r f  RL )
Vm Vm
 but  Im
 (r f  RL ) r f  RL
Im


and Pac  Irms  rf  RL 
Im
Pdc  (
2
) 2 RL

2
 Im 
   (rf  RL )
 2
Im2
By integration Irms  Im therefore Pac  (rf  RL )
2 4

 Im2 
  RL

 2 
Pac 4 RL 0.405
 2 
Pdc Im  (rf  RL ) 1  rf
(rf  RL )
4 RL

If rf is very small as compared to RL

Pdc 0.405
  0.405
Pac 1
Pdc
Efficiency =  100  0.405  40.5%
Pac

Example
The applied input ac power to a half wave rectifier is Pdc = 40W
a) what is the rectification efficiency
b) what happens to the remaining 60W

48
Practically the barrier potential is neglected if the peak value of applied voltage is much
greater than the barrier potential (at least 10 times)

Root mean square (Rms)

- Mathematically “average of the ever changing instantaneous ac values inherent in the ac

Maximum reverse voltage

- The maximum value of reverse voltage sometimes called peak inverse voltage
(PIV) occurs at the peak of the negative alternation of the input cycle when diodes
are reverse biased.
- The PIV of a diode equals the peak value of the input voltage and the diodes must
be capable of withstanding this amount of repetitive reverse voltage.

- the average value for a full wave rectified voltage is twice that of the half wave

2Vp
Vav  Freq is 100Hz


Find the average value of the full wave rectified voltage

soln
2V p 2  15
Vav    9.55V
 

Disadvantages of half wave rectifiers

i) pulsating I in the load contains alternating component whose basic freq is equal
to the supply freq and therefore elaborate filtering is required to produce steady
dc

ii) thee ac supply delivers power only half the time therefore low output

Centre tapped full wave rectifier

- uses two diodes connected to a secondary of the centre tapped transformer

- during the positive half cycle D1 is forward biased and D2 is reverse biased
- during the negative half cycle D2 is forward biased and D1 is reverse biased

49
Disadvantages of centre tapped rectifier
- difficult to locate the centre tap on the winding
- DC output is small as each diode only utilizes half of the transformer secondary
voltage.

Effect of the turn’s ratio of the full wave output voltage

- if transformer turns is 1 the peak value of the rectified output voltage equals half
peak value of the primary voltage less the barrier potential.
- In order to obtain an output voltage equal to the input step up transformer with
turn‟s ratio of 2 must be used.
- Total secondary voltage V2 is twice primary voltage (2Vm)
Peak inverse voltage
 Vp 2   Vp 2  Vp 2
Vp (out )    VB      Vp (out )   VB
 2   2  2
Vp 2
Since Vp (out )   VB
2
PIV =2Vp(out) + VB

Full wave bridge rectifier

a) During the positive half cycle, D1 and D2 are forward biased and conduct current
and D3 and D4 re reverse biased.
b) During the negative half cycle D3 and D4 are forward biased and conduct, D1 and
D2 are reverse biased
Bridge output voltage
- Two diodes are always in series with the load resistor during both the positive and
negative half cycle.
- Vout = Vs – 2VB
Peak inverse voltage

Reverse voltage across D3 = (Vs – 2VB) + VB

50
 = Vs +VB
Therefore PIV = Vs +VB
Example
Determine the output voltage for the bridge rectifier. What minimum PIV rating is
required for the silicon diode?
Soln

\\\\

Vout  Vs  2VB
Ns
  Vp  2VB
Np
 1  24  1.4V  12  1.4  10.6V
2
 Vout  VB
PIV for each diode  10.6V  0.7V
 11.3V

Efficiency of full wave rectifier

2 Im
Iac  andPdc  I 2 dc RL

2
 2 Im 
 RL  
  

Im
I rms 
2
 Im 
Therefore Pac     rf  RL 
2  2

Pout Pdc
Efficiency = 
Pin Pac
2
 2 Im   Im 
Where Pdc    Rc and Pac     rf  RL 
    2

51
 2 2
Pdc  2 Im   Im 
Therefore   RL     rf  RL 
Pac     2
2
2 Im 4 Im2 RL
RL
   2
2 2
 Im  Im
   rf  RL  (rf  RL )
 2  2
4 Im2 RL 2
η  2
 2
Im rf  RL 
8RL 0.811RL
 2 
 (rf  RL ) rf  RL

Efficiency is max when rf is negligible compared to RL therefore η (max) = 0.811*100

= 81.1%

This indicates that the efficiency of a full wave rectifier is twice that of the half wave
rectifier

Advantages of full wave rectifiers

i) high efficiency

ii) rectifies both alternations

iii) high current applications

Rectifier filters
- The purpose of a power supply filter is to greatly reduce the fluctuations in the
output of the half of full wave rectifier and produce a nearly level dc voltage.

- The 60Hz or 120Hz pulsating dc from the rectifier cct must be filtered to reduce
the large voltage variations

52
Capacitor filters

During the 1st +ve quarter cycle of the input the diode is forward biased allowing the
capacitor to charge to within a diode drop of the input peak

- When the i/p begins to decrease below its peak, the cap retains its charge and the
diode becomes reverse biased

- During the remaining part of the cycle the cap can discharge only through the load
resistance at a rate determined by the RC time constant

- The larger the constant, the less the cap will discharge

- During the 1st quarter of the next cycle the diodes will again be forward biased
when the input exceeds the cap voltage by approx VB

Ripple voltage

- the cap quickly charges at he beginning of the cycle and slowly discharges after
the +ve peak when the diode is reverse biased

- the variation in the output voltage due to the charging and discharging is called
the ripple voltage

- the smaller the ripple the better the filtering action.

- For a given i/p freq the output freq of a full wave rectifier is twice that of a half
wave rectifier.

- The full wave rectified voltage has less ripple than does a half wave voltage for
the same load resistors and cap value

- For a full rectified voltage the cap discharges less during the shorter internal btwn
full wave pulse

Ripple factor

- an indication of effectiveness of the filter and is given by

53
 Vr
r Vr = rms ripple voltage
Vdc

Vdc = the dc average value of voltage of the filter output

For a full wave rectifier with a sufficiently high capacitance filter, if Vdc is very near
 0.00417 
in value to the peak rectified input voltage then Vdc  1  Vp (in )
 RLC 

0.0024
Vr  Vp
RLC

Where Vp(in) is the peak rectified full wave voltage applied to the filter

Example

Determine the ripple factor for the filtered full wave bridge rectifier

Series inductor filter

54
 - Operation of this filter depends on the fundamental property of an inductor to
oppose any sudden changes in the current flowing through it

- The inductor presents high impedence to the ac component in the filter output, it
reduces their amplitude with respect to the dc component hereby producing a
small ripple

RL
- The ripple factor is given r 
2  3wL

- The ripple decreases as RL decreases or load increases

The LC filter

- When a choke is added to a cap filter an additional reduction in ripple voltage is

achieved

- The choke has a high reactance at the ripple freq and the capacitive reactance is
low compared to both XL and RL

- The 2 reactances from an ac voltage divider that tends to significantly reduce the
ripple from that of a straight cap filter.

The LC filter as it looks to the ac component

Magnitude of the ripple voltage out of the filter is determined with the voltage divider

- To the dc (average) value of the rectified input, the choke presents a winding resistance
Rw in series with the load resistance. The R produces an undesirable reduction of the dc
value and therefore Rw must be small as compared to RL

55
Π-filter or capacitor i/p filter

- C1 charges to the peak value of the i/p voltage and discharges slightly into the load
during the remaining part of the i/p cycle

- The opposing action of the inductor tends to deep the discharge variation to a minimum
resulting in a small amt of ripple at the output

C2 also helps to deep the output voltage constant.

The ZENER diode

Symbol

- is a pn junction device that is designed for operation in the reverse breakdown

region

- breakdown of a zener diode is set by carefully controlling the doping level during
manufacturing

- when the diode reaches reverse breakdown, its voltage remains almost constant
even though the current may change drastically

Zener breakdown

- there are two types of reverse breakdown in a zener diode

56
 - one is the avalanche breakdown which occurs in general diodes at sufficiently
high reverse voltage

- the other type is zener breakdown which occurs in a zener diode at low reverse
voltages

- The zener diode is heavily doped to reduce the breakdown voltage

- This causes a narrow depletion layer

- Zener diodes with breakdown voltages of less than approx 5V operate

predominantly in zener breakdown

- Those with breakdown voltages greater than approx 5V operate predominantly in

the avalanche breakdown

- Both types are called zener diodes

- Zener diode values commercially available from 1.8V to 200V

Breakdown Xstics

- as reverse voltage (VZ) is increased, he reverse current IZ remains extremely small

up to the knee of curve

- at this pt, breakdown effect begins, the internal zener resistance (RZ) begins to
decrease as the reverse current increases rapidly

- from the bottom of the knee, the zener breakdown voltage (VZ) remains
essentially constant although it increases slightly as IZ increases

- a zener diode maintains (regulate) a nearly constant voltage across its terminals
over a over a specified range of reverse current values

- IZK is the mi reverse current that must be maintained in order to deep the diode in
regulating

57
 - IZM is the max current above which the diode may be damaged

- The Zener maintains a nearly constant voltage across its terminals for values of
reverse current ranging from IZK to IZM

- A nominal Zener voltage VZT is usually specified on a data sheet at a value of

reverse current called the zener test current IZT

Zener Equivalent Cct

- the ideal zener approx is a simple battery having value equal to the nominal zener
voltage

- practical equivalent includes zener resistance Rz

- since the voltage curve is not ideally vertical, a change in zener current produces a
small change in zener voltage

- normally RZ is specified at IZT, the zener test current

Examples

i) A ZD exhibits 50mV change in VZ for a 2mA change in IZ on the linear portion of the
Xstics curve between IZK and IZM. Calculate RZ

ii) A certain ZD has RZ = 5 ohms. The data sheet gives VZT = 6.8V at IZT = 20mA, IZK =
1mA and IZM = 50mA. What is the voltage across the diode terminals when IZ = 30mA

Calculating the series resistor Rs

- The zener diode passes a minimum current if it is to continue to operate in the

breakdown region and still operate as a regulator

Vin (min)  VZ Vin ( MAX )  VZ

RS  or
I Z (min)  I L I Z ( MAX )  I L

VIN  VRS  VZ RS 
VIN  VZ
I
For VIN(max) I  I Z ( MIN )  I L For VIN(max) I  I Z ( MAX )  I L

Example

A 9.1V, 1.3W ZD has a min current requiment of 20mA and is to be used in a stabilizer
cct. The supply voltage is 20V±10% and the constant load current is 30mA. Calculate

58
i) Series resistance (R)

ii) Diode dissipation when input voltage is max

Varying load, fixed supply voltage

- the current thru Rs is maintained constant

- IZ reaches its max value (Iz(max) when the load current IL = 0 i.e. RL = ∞

- At this pt care must be taken to ensure that the power rating of the zener diode is
not exceeded

- Power dissipation of the diode is given by PZ(max) = VZ *IZ(max)

- Vin is fixed but changes

- When IL increases, diode current decreases, thereby keeping I and hence IR drop
constant, this way Vout remains unaffected

- If IL decreases, Iz would increase in order to keep I and hence IR drop constant

- Again, Vout would remain unchanged because Vout = Vin – IR = Vin – (Iz+IL)R

Diode clipping ccts

- Clipping refers to the removal or switching off of on half cycle of a waveform i.e.
either +ve or –ve half cycle

- Diodes used in clippers are aso referred to as limiters even though proper limiters
do not normally remove a complete cycle.

- Clippers remove a complete half cycle while clippers limit the amplitude to som
preset level

Shunt or parallel clipper ccts

+ve clipper with ideal diode

- clips out or removes only the +ve half cycle of the supply input waveform

59
 - during the +ve half cycle D is forward biased i.e. short cct

- current flows thru d via Rs and all of Vin is therefore dropped across Rs

- Vin = VRs therefore Vo = 0

- During the –ve half cycle D is reverse biased i.e. open cct

- No current flows through Rs and therefore no voltage drop across Rs

- All of Vin appears at the output Vo =Vin

Negative clipper with ideal diode

- clipps out or removes only the –ve half cycles of the input waveform

- during the +ve half cycle D is reverse biased i.e. open cct

- no current flows thru D via Rs and no voltage is dropped across Rs and therefore
all of Vin appears on the output, Vo = Vin

- During the –ve half cycle D is forward biased i.e. short cct

- current flows through Rs and therefore all of Vin is dropped across Rs

- All of Vin appears at the output Vo =0

Positive clipper with non ideal diode

- i.e. diode with constant VD or VT

60
- during the +ve half cycle when Vin is less than VD D is reverse biased therefore
no current flows i.e. open cct Vout = Vin

- when Vin is greater than VD, D is forward biased and current flows thru D via Rs
and all of Vin is therefore dropped across Rs. Rs drops most of the voltage and D
drops an amount equal to VD, Vout = VD

- during the –ve half cycle D is reverse biased and no current flows thru the cct
therefore no voltage drops across Rs and all of Vin appears at the out put i.e. Vo =
Vin

Negative clipping with non ideal diode

Clipped –ve half cycle exhibits the effects of the diode forward voltage drop

- During the +ve half cycle D is reverse biased and no current flows thru the cct
therefore no voltage drop across rs and the whole of Vin appears at the output i.e.
Vo = Vin

- During the –ve half cycle, when Vin< VD, D is reverse biased and no current
flows therefore all Vin appears at the output Vin = Vout

- When Vin > than VD, D is forward and current flows through Rs and D causing
the two share Vin between them. Rs drops most of Vin and D drops an amount
equal to its VD i.e. Vout = VD

The series diode clipper

- During the +ve half cycle, D is reverse biased therefore there is no output voltage
across Rs Vo = 0

61
 - During the –ve half cycle, D is forward biased since D is ideal no voltage is
dropped across the diode hence the input voltage is the voltage across Rs

- i.e. Vin = Vout = VRs (which is IRsRs)

Negative series diode clipper

- during the +ve half cycle D is forward biased, current therefore flows thru D and Rs
causing all of Vin to be dropped across Rs since an ideal diode has no drop thereforeVin
= Vout = VRs

During the –ve half cycle D is reverse biased, no current flows in the cct therefore no
voltage is dropped across Rs Vo = 0V

Series +ve clipper with non ideal diode

- During the +ve half cycle D is reverse biased and no current flows Vo=0

- During the –ve half cycle when Vin is less than D remains off therefore Vo=0

- When Vin is greater than VD, D is now forward biased i.e. short cct and current flows in
the cct causing drops of vD and VRs

Vo = VRs but VRs = Vin – Vo

62
Parallel –ve clipper with reference voltage and the non ideal diode

-during the +ve half cycle, when Vin is less than Vref, D is forward biased with a
constant Vo

- when Vin is greater than Vref, D is now reverse biased and no current flows thus all of
Vin appears at the output Vout = Vin

- During the –ve half cycle, D is always forward biased by both Vin and Vref therefore
Vout = Vref - VD

The double diode limiter (ideal diode)

- this limits amplitude of both half cycles

The values of vref1 and Vref2 determine the level at which each half cycle will be clipped

- during the +ve half cycle D2 is always reverse biased by Vin and Vref

- when Vin < Vrf, D1 is reverse biased therefore Vout = Vin

- when Vin > Vref, D1 is now forward biased Vin = VRs

- VD = 0 ideal diode therefore Vout = Vref

- During the –ve half cycle D1 is always reverse biased by Vin and Vref

- when Vin< Vref, D2 is reverse biased no VRs therefore Vout = Vin

63
 - when Vin > Vref , D2 is now forward biased and current flows i.e. Vin = VRs
therefore Vout = Vref

- if Vref1 =Vref2 then the output waveform is clipped symmetrically about the x-
axis

- repeated clipping and amplification of such waveforms results in the formation of

a square wave

- hence the double diode limiter is used often as a square wave generator

Other applications of the cct are

a) the removal of noise pulses above the real signal level in telecommunication

b) measuring meter protection by limiting the voltage across the meter V2

regardless of the actual voltage under test

Clamping ccts
- clamping refers to shifting of the position of a wave along the vertical axis i.e.
fixing of the amplitude of the waveform at a desired level

- the o/p waveform shape is not affected by a clamping cct

- Minimum requirement of he cct, a diode, a capacitor and a resistor. It is

advantageous to start with the half cycle that will forward bias the diode therefore
charging C

+ve clamping at zero level

- During the first -ve half cycle, D is forward biased and current flows in the cct.
Initially Vout = 0 until cap C has charged to Vm therefore Vout = Vin

- During the first +ve half cycle, when Vin = 0 then Vout = Vm

64
 - When Vin = Vm then Vout = Vm + Vm = 2Vm

- During the 2nd –ve half cycle, when Vin = -Vm then Vout = -Vm +Vm

- A larger resistor is usually incorporated in the cct to discharge capacitor

- The magnitude of Rand C must be chosen so that the time constant τ = RC is

larger enough to ensure that the voltage across the capacitor does not change
significant

- The voltage across the cap does not change significantly during the interval of
time determined by the input that both R and C affect the output waveform

Positive clamping at a reference voltage

- During the 1st +ve half cycle, D is reverse biased and no I flows i.e. Vout = 0

- During the 1st –ve half cycle, D is forward biased and current flows in the cct
charging C to a value of Vm + Vref therefore Vout = Vmax + Vref

- During the 2nd +ve half cycle, when Vin = 0 then Vout = Vmax + Vref

- When Vin = Vm then Vout = Vm + Vm + Vref

= 2Vm + Vref

Subsequent -ve half cycle

When Vin = -Vm, then Vout = Vref

Thus the output is clamped at Vout = Vin + (Vin+VR)

Negative clamping

These are the ccts that change the ac level of oscillation to a –ve value (a lower value)

The zero negative clamper

65
 It lowers the peak value of a waveform to a zero DC level

- during the +ve half cycle, the cap C will be charged to Vin with polarity shown on
the above cct

- from Kirchhoffs voltage low, Vout = Vin –Vc but Vc = Vin

Vout = Vin – Vm

i) when Vin = 0, Vout = 0 – Vm = -Vm

ii) when Vm = Vin, Vout = Vin – Vm = 0

- During the –ve half cycle, D is reverse biased and the supply polarity is now such
that the +ve of the cap is connected to the –ve of the supply

- hence from KVL, Vout = Vin + Vc

- when Vin = 0, Vout = Vc + 0 but Vc = -Vm ( because of –ve fall which is

experienced) therefore Vout = Vin

- when Vin = -Vin, Vout = -Vm +Vc = -Vm-Vm (since Vc = -Vm), then Vout = -
2V

Non zero –ve clamping

This is changing the peak voltage to a –ve value or a value lower than the original (not
necessarily zero) Cct diag (Vin>Vref)

66
 - during the +ve half cycle, D is forward biased by Vin, C charges but to a value
not Vin or Vref but Vc = Vin – Vref

- Vin = Vm, Vout = Vin – Vc = Vin – Vin –Vrf = Vref

- During the –ve half cycle, D is reverse biased by Vin, Vc and Vref

- Vout = -Vm + Vc

= -Vm – (Vm –Vref)

= -2Vm + Vref

Example

Transistors
Symbol

- A transistor is a 3 layer semiconductor device consisting of either 2 p-type and 1

n-type materials of 2 n-type and 1 p-type materials

- The former is called NPN and the latter is called PNP

Construction

67
 - The outer layers of transistors ore heavily doped semiconductor materials having
width much greater than those of the sandwiched p or n type material.

- This lower doping of the sandwiched layer decreases the conductivity of this
material by limiting the number of free electrons

- It has 3 terminals each connected to each layer of material

- The abbreviation BJT, from Bipolar Junction Transistor, is often applied to this 3
terminal device

- Term bipolar reflects the fact that holes and electrons participate in the injection
into the oppositely polarized material

Transistor operation

- in order for the transistor to operate properly as an amp, the two pn junctions must
be correctly biased with external voltages

- the npn transistor will be for illustration, but otherwise the operation of the pnp
transistor is the same except that the roles of the electrons and holes, bias voltage
polarities and the current directions are all reversed

68
 - in both types NPN and PNP the base – emitter junction is forward biased and the
base collector is reverse biased

Internal effects of forward –reverse bias

- the forward bias from base to emitter narrows the depletion layer

- the reverse bias from B –C widens the BC depletion layer

- the n type emitter region is teeming with conduction band electrons that easily
diffuse across the forward biased BE junction into the P type base region

- the base region is lightly doped and very narrow so that it has very limited
number of holes

- thus, only a small % of all the electrons flowing across the BE junction can
combine with the available holes

- these relatively few hole recombined electrons flow out of the base lead as
valence forming the base current IB

- most of the electrons flowing from the emitter into the narrow base region do not
recombine and diffuse into the BC depletion layer

- once in this layer they are pulled across the reverse biased BC junction by the
depletion field set up by the force of attraction between +ve and _ve ions

- actually the electrons will pulled across the reverse biased BC junction by the
attraction of the +ve ions on the other side

- the electrons now move through the collector region out through the collector
lead, and into the +ve terminal of the external dc source

- this forms the collector current Ic and the amount depends directly on the amount
of the base current and is essentially independent of the dc collector voltage

Electron flow across forward biased BE junction

69
Electron flow across reverse biased BC junction

Transistor currents

- the direction of convectional current in an npn tr is shown below

- the arrow on the emitter of the transistor symbol points in the direction of
convectional current IE = Ic + IB

- IB is very small to Ic and IE

- IE is the sum of collector and base currents

- Ic is comprised of two components, the majority and minority carrier currents

- Minority current component is called the leakage current and is given by the
symbol ICEO

- Where Ic is collector current, E represents common- emitter and O when base is

open ccted

- For general – purpose transistor , Ic is measured in mA while ICEO is measured in

μA or nA

Transistor configurations

70
 - transistor may be connected in a circuit in one of 3 ways and in each case one
terminal is always connected to both input and output
- the connection is then described in terms of the common terminal
- in all connections the base/emitter junction is always forward biased and the
collector/base junction always reverse biased

Common base configuration

The second subscript will always indicate the transistor configuration

The first subscript is defined as the point of higher potential

Ic
hFB    It has good voltage gain
IE

Common emitter configuration

- the most frequently encountered transistor configuration

71
 - emitter is common
- has a high current amplification, high voltage amplification and high power
amplification

Ic Vo
Ai  hFE  Av 
IB Vin

Common collector configuration

- the common collector configuration is used primarily for impedance matching

purposes since it has a high input impedance and low output impedance, opposite
to that of the CB and CE configurations
Parameters
i) input impedance
ii) output impedance – opposition experienced by a signal across output
terminals
iii) forward current gain- ratio of output current to input current
iv) forward voltage gain (Av) ratio of output voltage to input voltage

Transistor parameters
- when a BJT is connected to bias voltages VBB and Vcc reverse biases the BC
junction

Dc Beta (βdc) and dc alpha (αdc)

- ratio of Ic to IB is called the dc current gain (βdc) of the transistor or hFE
- IB is the input current to the transistor whereas Ic is the output current to the
transistor thus the transistor is a current amplifier
Ic
- Dc current gain  hFE   dc 
IB

72
 - Where F indicates that we are considering forward currents and E that the BJT is
connected in common emitter mode
- Ratio of collector current Ic to emitter current IE is called dc α
Ic
hFB   dc  range (0.95 – 0.99)
IE
Relationship of Beta (βdc) and alpha (αdc)
I E  Ic  I B dividing throughout by Ic
IE I Ic Ic
 1  B since   and  
Ic Ic IB IE
1 1
Therefore  1
 


1 
If we know β, α can be calculated and also β can be found in terms of α
    
    
   (1   )


1
DC analysis

- there are 3 transistor currents and 3 voltages IB, Ic and IE and VBE, VCE and VCB
- the voltage drop across the forward biased function is VBE ≈ 0.7V
voltage across RB is given by VRB = VBB - VBE
VRB = IBRB
Substituting for VRB gives IBRB = VBB - VBE
V  VBE
I B  BB
RB
Ic Ic
From the equation   and   , drop across Rc is VRC = IcRc,
IB IE
voltage at collector with respect to emitter (ground)
VCE = Vcc – IcRc
Voltage between base and collector
VCB = VCE - VBE

73
Parameter CE CC CB
Voltage gain (Av) High Low High
Current gain (Ai) High High Low

Power gain (Ap) AiAv Ai Av

(very high) High High
Input resistance Low High Very low
Output resistance High Rc Rs // RE very Rc high
 ac
low
Phase relationship 180˚ out of phase 0˚ in phase In phase
of Vin and Vout

Transistor characteristics

R2 protects the transistor from excessive base currents

Input (base) characteristics (IB – VBE)

Vce is kept constant (6V) and VBE is measured for values of IB obtained by varying R1

IB is negligibly small until Vbe exceeds about 0.6V and thereafter small changes in Vbe
cause large changes in IB but Vbe is always near 0.6V whatever the value of IB

74
 VBE
- the input resistance ri is obtained as the ratio
I B
- since the input characteristics is non – linear, ri varies but is of the order of 1 to
5KΩ
Output (collector) characteristics
- IB is fixed at a low value e.g. 10µA and IC measured as Vce is increased in stages
by varying R3. this is neglected for different values of IB to give a family of
curves
- IC depend almost entirely on IB and hardly at all VCE ( except when Vce is less
than about 0.5V)
- As an amplifier the transistor operates well to the right of the sharp bend on knee

- IC depend almost entirely on IB and hardly at all VCE ( except when Vce is less
than about 0.5V)
- As an amplifier the transistor operates well to the right of the sharp bend on knee
of the characteristics i.e. where Ic varies linearly with Vce for a given IB
- The small slope of the characteristic shows that the o/p resistance ro of the
transistor is fairly high of the order 10KΩ to 50KΩ
It is given by
Vce
ro 
Ic
- as a switch, a transistor operates in the shaded region and changes over rapidly
from the off state in which Ic = 0 (cut off) to the „on‟ state in which Ic is max
(saturation)
Cut off and saturation

75
When IB = 0 transistor is cut off
- Under these conditions there is a very small amount of collector leakage current
denoted by Iceo due to thermally produced carriers.
- In cut off both BE and BC junctions are reverse biased. When base current
increases collector current also increases and Vce decreases as a result of more
voltage drop across Rc.
- When Vce reaches a value called Vce(sat) the BC junction becomes forward
biased and Ic increase no further even with a continued increase in IB
- At the point of saturation the relationship Ic= βIB is no longer valid
- Vce(sat) occurs somewhere below the knee of the collector curves

Transfer characteristics
- Vce is kept fixed and Ic measured for different values by varying R1
- The graph is almost a straight line implying that Io is directly proportional to IB
i.e. the relationship btwn Ic and IB is linear.
Ic
- The ac current gain hfE is defined by h fE  for moat cases hfE and hfe are
I B
considered equal
- Characteristics also shows that when IB = 0 Ice has a small value
- This is called the leakage Iceo and is due to minority carriers of holes for
an n-p-n transistor crossing the reverse biased CB junction from C to B to E
- Since minority carriers are produced by heat breaking bonds in the crystal lattice,
the leakage current increases as the temp rises and upsets the working of the
transistor.

Active region
- this is the region btwn saturation and cut- off points . in this region the BE
junction remains forward while the BC is reversed
- normal transistor action is therefore maintained
- increases in IB are accompanied by similar increases in Ic and vice versa
- the transistor continues to function normally if biased to operate in the active
region
- transistor amp biasing and stabilization is therefore meant to ensure that the
transistor continues to operate in the active region despite the variations in the
input signal.
The dc current gain
- β is not really a constant but varies with both current and temp

76
- keeping the junction temp constant and increases causes β to increases to a max
0- a further increase in Ic beyond this max point causes β to decrease
- If Ic is held constant and the temp varied β changes directly with the temp
- if the temp goes up and vice- versa

Transistor thermal runaway

When a transistor is conducting current across both junctions it gives power which is
dissipated by each junction in the form of heat. If this heat is produced at a rate faster
than the rate at which it is lost to the surrounding atmosphere the junction temp will
continue to rise
- the temp of the whole transistor increases leading to what is called thermal
runaway or destruction of the transistor junctions due to overheating.
- When this happens the transistor becomes permanently damaged care should
therefore be taken that the current flowing and the voltage across each junction do
not exceed the max ratings on the data sheet. The total power dissipated by a
transistor is however normally considered equivalent to the power dissipated at
the Base - Collector junction.
- This is so because the majority of the total current flowing in the transistor flows
in the collector terminal and reverse bias voltage across the base collector junction
is greater than the forward voltage across Emitter - Base junction.
- Therefore when the transistor is conducting the total power is approx equal to the
power dissipated across the collector (Pc) Pc(max) = VceIc
- Transistors are constructed with their collector terminal connected to their
metallic case to increase the area from which the heat is removed
- To increase the area from which the heat is removed, the case of the transistor can
be bolted onto a heat sink. Heat will move from the transistor to the heat sink by
conduction and be removed from the sink by convection and radiation.

Transistor power dissipation curve (Power hyperbola)

-The standard transistor data sheet will include at east three max ratings collector
dissipation, collector voltage and collector current
- the power dissipation rating is the product of the collector voltage and current
For the common emitter configuration Pc(max) is equal of VceIce for amplification
purposes, the non- linear characteristics of the saturation and cut off regions are avoided

77
 - the saturation region has been indicated by the vertical line at Vce(sat) and the
cutoff region by shaded region IB = 0
- the unshaded region remaining is the region employed for amplification purposes
DC Biasing
- a transistor must be dc biased in order to operate as an amplifier. A dc operating
point must be set so that the signal variation at the input terminal are amplified
and accurately reproduced at the output terminal
- improper biasing can cause distortion in the output signal

The DC operating point

- when n you bias a transistor you establish a certain current and voltage condition.
Therefore at the dc operating point, Ic and Vce have specified values
- the dc operating point is often referred to as the Q-pt

Dc load line
- With reference to the collector/output characteristics curve, when IB increases and
Vce decreases
- When IB decreases, Ic decreases and Vce increases
- As Vbb is adjusted up or down, the dc operating point of the transistor moves
along a sloping straight line called the dc load line, connecting each Q-pt
- At any point along the line, values of IB ,Ic and Vce can be picked off the graph

78
- The dc load line intersects with the Vce axis at a point where Vce = Vcc because
Vcc= Vce + IcRc but when Ic = 0 Vce is max
- this is the cutoff point because because IB and Ic are zero (ideally)
- actually there is a small leakage current ICBO at cut off
- the load line intersects the Ic axis at the saturation point because Ic is max at the
Vcc
point where Vce = 0 and Ic 
Rc

Linear operation
- the region along the dc load line including all points btwn saturation and cutoff is
generally known as the linear region of the transistor operation
- as long as the transistor is operated in this region, the output voltage is ideally a
linear reproduction of the input e.g. if a sine wave voltage is superimposed on VBB
at the input , it causes the base current to vary 100µA above and below the Q-
point value of 300 µA.
- this causes the collector current to vary 10mA above and below its Q-point value
of 30mA

79
 - as a result of the variation in collector current, the Vce varies 2V above and below
its Q-point value of 4V
- point A on the load line corresponds to the +ve peak of the input sine wave
- point B corresponds to the negative peak and the Q point corresponds to the zero
value of the sine wave
- VCEQ and ICQ are Q point values with no signal applied

Distortion of the output

- Under certain input signal condition the location of the Q-point on the load line
can cause one peak of the output signal to be limited or clipped
- If the input is too large for the Q- point location and is driving the transistor into
cut off or saturation during a portion of the input cycle

- when both peaks are limited, the transistor is being driven into both saturation and
cut off by an excessively large input signal
- when only the +ve peak is limited, the transistor is driven into cut off but not
saturation
example
Determine the Q-point and find the max peak value of base current for linear operation,
β= 200

80
 - To draw the dc load line, first take into account the fact that Ic (cut off) is zero so
Ic (sat needs to be calculated to determine how much variation in collector current
can occur. Also Vce cut off needs to be calculated.
- To determine Ic (sat), Vce is zero along the Ic axis therefore using kirchhoffs
voltage law, the equation below applies
Vcc  IcRc  VCE
When Vce = 0, Vcc = IcRc + 0
Which gives, Ic( SAT )  Vcc
Rc
Also when Ic = 0, Vcc = 0 + Vce
Which gives Vce = Vcc
- Plotting the two points on the axis, a straight line can be drawn joining them. The
Q – point can be found any where along that line but a proper operating point is
required.

The Q- point is defined by Ic and Vce

VBB  I B RB  VBE
VBB  VBE 10  0.7
IB    198A
RR 4.7  103
I CQ  I B  200(198  10 6 )  39.6mA
VCEQ  Vcc  IcRc  20  (39.6  10 3  330)  6.93V

Base bias
- a separate battery VBB has been used to bias BE junction
- a more practical method is to use a single bias

the drop across RB = Vcc - VBE

81
 Vcc  VBE
therefore I B  and neglecting leakage current Ic = βIB …(i)
RB
Vce = Vcc- IcRc
Substituting βIB for Ic, Vce = Vcc- βIBRc …(ii)
Equations (i) and (ii) include β
- any variations in β causes both Ic and Vce to change thus changing the Q- point
at the BJT and making the base – biased cct beta –dependent
- this makes the bias very unstable

Emitter bias

this type of bias cct uses both a +ve and –ve supply voltage
the base is approx zero volts and the Vee supply forward bias the B-E junction
V  VEE
VB≈ 0, VE = -VBE, I E  E
RE
Ic≈ IE
Vc = Vcc- IcRc
Vce = Vc – Ve

Example
Find IE, Ic and Vce

Solution
Vce = Vc – Ve
Ic≈ IE

82
Vc  10  I E R E
Vc  10  (
Stability of emitter bias
Refer to the following diagram

VEE  I B RB  VBE  I E RE
I I
since I B  E then VEE  E RB  VBE  I E RE
 
R 
I E  B  RE   VBE  VEE
  
Transposing VBE and solving for IE
V  VBE R V  VBE
I E  EE if RE >> B then I E  EE
R
RE  B  RE

VEE
If VEE >> VBE, I E 
RE
- This shows that the emitter can be essentially independent of β and VBE
- The Q – point is not affected appreciably by variation in these parameters
- Thus the emitter bias can provide a stable bias point

Voltage divider bias

83
 - A dc bias voltage at the base of the BJT is developed by a resistive voltage divider
consisting of R1 and R2
- At point A current divides one through R2 and the other through the base – emitter
junction of the BJT
- If the base current is much smaller than the current through R2 the base cct can be
viewed as a simplified voltage divider consisting R1 and R2
- If IB is not small enough to neglect compared to I2 then the dc input resistance, IIN
(base), looking in at the base of the transistor must be considered

OPTO ELECTRONIC DEVICES

- Heat energy applied to a semiconductor causes the breaking of some covalent
bonds.
- For each bond so broken a free electron and a hole are produced
- The greater the heat , the greater the no. of free electrons hole pairs so created.
- At room temp enough careers are produced so that a small current will flow if an
electric field is applied to the semiconductor
- The greater the light intensity falling upon the semiconductor , the larger will be
the no. of careers produced. And because of the presence of these careers, the
lower will be the resistance of the semiconductor
- Light energy will produce the rapture of covalent bonds in a semiconductor. The
property of a material to exhibit a lower resistance when exposed to light is called
photo production

Photo diode
- semiconductor pn junction device whose region of operation is limited to the
reverse bias region

- the junction is made of transparent material to allow light to pass through and a
lens
- the application of light to the junction will result in a transfer of energy from the
incident traveling light waves to the atomic structure resulting in the lens which is
incorporated to concentrate the amount of light energy on the junction region.
- An increased no. of minority careers and an increased level of reverse current.
The dark current is that current that will exist with no applied illumination
- The current will only return to zero with a +ve applied bias equal to Vo

Application

84
Photo conductive cell (LDR)
- it is a 2 – terminal semiconductor device whose terminal resistance will vary
(linearly) with the intensity of incident light

- the photoconductive cell generally known as the LDR is usually made of

cadmium – sulphide
- when the illumination on the device increases in intensity the energy state of a
large no. of electrons in the structure will also increase because of the increased
availability of the photo packages of energy
- the result is an increasing no. of relatively free electrons in the structure and a
decrease in the terminal resistance

Application
automatic ON –OFF control of public lighting switch and security lights

- during daylight hours the resistance of the photoconductive cell is very low and
therefore voltage across it is not sufficient to forward bias the BE junction and the
transistor is off
- During hours of darkness the LDR resistance rises and voltage across it becomes
sufficient to forward bias the BE junction thus switch the transistor hard on and
supply the load current
Voltage regulator with LDR

- purpose of the system is to maintain Vo at a fixed value even though Vi may

fluctuate from its rated value
- the LDR, bulb and resistor all form part of this voltage regulator system. If Vi is
too cheap in magnitude for any no. of reasons the brightness of the bulb will also
decrease.

85
 - The decrease in illumination would result in an increase in the resistance Rλ of the
LDR to maintain Vo at its rated level as determined by the voltage divider rule
RVi
Vo 
R  Ri

Solar cell /Photovoltaic cell

- converts light energy of the sun to electric energy required to power the
instruments of space vehicles

- device consists of a single crystal of p – type silicon whose top surface is a thin n
– layer that has been diffused.
- If light strikes the n layer of the crystal sufficient energy is supplied to break a
number of covalent bonds thus releasing free electrons and holes
- Normally, a depletion layer is formed at the junction and this would keep the free
electrons from migrating in the P layer
- Energy furnished by the light enables some of the electrons to surmount the
barrier and enter into the P layer thus making it negative
- The holes left behind make the n type +ve
- If an external path is provided an electron current will flow through it from the p
layer to the n layer
- Output from such a cell is rather small
- Surface measure 1 by 2cm has a max output of about 0.45

ON / OFF switch
- RB must be small to allow flow of IB(sat) but large enough of limit IB to the
optimum value of the transistor

86
 - In darkness the photocell acts as an open cct and current flows through RB to the
transistor

Photo transistor

- it has a light sensitive collector – base pn junction

- it is exposed to incident light through a lens opening the transistor package
- when there is no incident light there is a small thermally generated collector –
emitter leakage current, ICEO called the dark current and is typically in the nA
range
- when light strikes the collector base pn junction a base current Iλ is produced that
is directly proportional to the light intensity.
- This action produces a collector current which increases with Iλ according to the
intensity
- Except for the way base current is generated, the photo – transistor behaves as
convectional bipolar transistor
Ic   DC I 
- in many cases, there is no electrical connection to the base
- since the actual photo generation of base current occurs in the collector – base
region, the larger the physical area of this region, the more base current generated
- a typical photo transistor is designed to offer a large area to the incident light

- a photo transistor can be either a two lead of three lead device

- in the 3 lead configuration, the base lead is brought out so that the device can be
used as a convectional BJT with or without the additional light sensitivity feature
- in the 2 lead configuration the base is not electrically available and the device can
be used only with light as the input
- phototransistors are not sensitive to all light but only to light within a certain
range of wavelength

87
Photo Darlington
- consists of a phototransistor connected in a Darlington arrangement with a
convectional transistor
- because of the higher current gain, the device has a much higher collector current
and exhibits a greater light sensitivity than does a regular phototransistor.

Applications
Light operated relay cct
Photo transistor Q1drives the BJT Q2
w- hen there is sufficient incident on Q1, transistor Q2 is driven into saturation, the
collector current energizes the relay

Darkness – operated relay cct

- a relay is de- energized by incident light of the phototransistor
- when there is sufficient light, transistor Q2 is biased on keeping the relay
energized
- when there is sufficient light , phototransistor Q1 turns on , this pulls the base of
Q2 low, thus turning Q2 off and de – energizing the relay

88
Light emitting diode LED
- emits light in response to a sufficient forward current
- the amount of light output is directly proportional to the forward current

- when the device is forward biased, electrons across the pn junction from the n
type material and recombine with holes in the p type material
- recall that the free electrons are in the conduction band whereas the holes are in
the valence band
- when recombination takes place the recombining electrons release energy in the
form of heat and light
- a large exposed surface area on one layer of the semiconductor material permits
the light photons to be emitted as visible light
- this process is called electroluminescence

89
 - silicon and germanium are not used because they are essentially heat producing
materials and are very poor at producing light
- gallium arsenide phosphide (GaAsP) produces either red or yellow light
- gallium phosphide produces red or green light

Application
- commonly used for indicator lamps and read out displays on a wide variety of
instruments ranging from consumer appliances to scientific apparatus
- display devices using LEDs is the seven segment display
- combinations of these segments form the ten decimal digits
- IR emitting diodes are employed in optical coupling applications often in
conjunction with fibre optics

i) choose on light dependent device, draw the construction diagram, explain how
and give one application of the device
ii) draw the diagram of one type of an opto coupler and explain how it operates
Opto couplers
- they are designed to provide complete electrical isolation between an input circuit
and an output circuit
- the usual purpose of isolation is to provide protection from high voltage
transients, surge voltage, or low level noise that could possibly result in an
erroneous output or damage to the device
- optical couplers also allow, interfacing ccts with different voltage levels or
different grounds
- input cct is typically an LED, but the output can take several forms such as
phototransistor, photodiode or photothyristor
- 2 components are placed in close proximity so that the light produced by one falls
on the other

- when the input voltage forward biases the LED, light transmitted to the
phototransistor turns it on producing current through the load

The Darlington transistor coupler

90
 - can be used when increased output capability is needed beyond that produce by
the phototransistor output

- the opto couplers can be used instead of transformers and have the following
advantages
i) they are more efficient since their losses are negligible
ii) high switching speeds
iii) opto couplers can couple both ac and dc
iv) high reliability
v) no impedance matching is required between the LED and the sensing device

Opto coupler specification

i) isolation voltage of an optical coupler is the maximum voltage that exits
between the input and output terminals without dielectric breakdown
occurring – typical values 7500V ac peak
ii) dc current transfer ratio – ratio of output current to the input current through
output
the LED usually expressed as a percentage  100%
input
FIELD EFFECT TRANSISTORS
- FETs are unipolar devices which operate with only majority carriers
- they are two main types of FETs
- the junction field effect transistor (JUGFET) and the Metal oxide field effect
transistor (MOSFET)
- the FET is a voltage controlled device where the voltage at one of the terminals
controls the amount of current through the device

Comparison of FETs and BJTs

1. FETs have an extremely high input resistance with about 100MΩ typical
2. FETs have no offset voltage when used as a switch
3. FETs are relatively immune to radiation but the BJT is very sensitive (β)
4. FETs are less noisy than BJTs and thus more suitable for input voltages of low
level amplifiers
5. FETs can be operated to provide great stability than a BJT

Disadvantages of FETs
1. FETs have small gain bandwidth

91
 2. FETs can easily be damaged if not properly handled

THE JUNCTION FIELD EFFECT TRANSISTOR

- these fall into two categories, the n- channel and the p- channel

- the device consists of three terminals, the gate, the drain and the source
- two p regions are diffused in the n material to form a channel
- both p – type regions are connected to the gate lead
- p – type is more heavily doped than n – type channel

Basic operation

- VDD provides a drain to source voltage and supplies current from drain to source
- VGG sets the reverse – bias voltage between the gate and the source
- The J – FET is always operated with the G – S pn junction reverse – biased
- Reverse biasing of the G-S junction with a negative gate voltage produces a
depletion region in the n – channel and this increases its resistance
- The channel width can be controlled by varying the gate voltage whereby the
amount of drain current ID can also be controlled
- Gate to source is always reverse biased

92
 - shaded areas represent the depletion region created by the reverse bias
- it is wider towards the drain because the reverse bias voltage between the gate
and drain is greater than between the gate and the source

JFET symbols

- the arrow on the gate points in for n- channel and out for p channel

JFET characteristics and parameters

- only the transfer and output characteristics are plotted because the gate is
negligible

Drain curves and pinch offs

93
when VGS = 0, by shorting the gate to source
- as VDD ( and thus VDS ) is increased from zero, ID will increase proportionally,
that is between A and B
- in this region the channel resistance is essentially constant because depletion
region is not large enough to have significant effect
- this is called the ohmic region because VDS and ID are related by Ohms law
- at point B, the curve levels off and ID becomes a relatively constant value called
IDSS
- it is at this point that the reverse bias voltage across the gate drain junction (VGB)
produces a depletion region sufficient to narrow the channel so that its resistance
begins to increase significantly
- the value of VGD at this point is called the pinch - off voltage Vp
- for VGS = 0, -Vp = VDS at the pinch- off because VGS and VGD are equal
Vp = VGS – VDS (p) ----- (i)
Where VDS (p) is the value of VDS at pinch off for a given VGS
- Vp is a constant value for a given JFET and is a fixed parameter
- VGS at pinch – off is also a variable that depends on the G – S bias voltage VGS
- IDSS is the max value of ID when VGS = 0
- At point C breakdown occurs and ID increases rapidly with irreversible damage to
the device
- JFETs are always operated below the breakdown point within the pinch off region
(between B and C)
- If VGS = -1, as VDD is increased from 0 pinch off occurs at a lower value of VDS
- This is because VP is constant for a given negative gate voltage, the drain voltage
must only reach a value sufficient to make the gate – drain equal to VD in order to
produce pinch off

94
VGS controls ID
- increasing –ve value of VGS cause pinch off to occur at successively lower values
of VDS resulting in lower ID
- therefore amount of ID is controlled by VGS
- IDSS the max drain current occurs when VGS = 0 and decreases as VGS is increased
negatively (N – CHANNEL)

Cut – off
- When VGS is made sufficiently negative , ID is reduced to 0
- This is caused by widening of the depletion region to a point where it completely
closes the channel
- Value of VGS at the cut off point is designated VGS(off)
- From (i) Vp = VGS - VDS (p)
- Cutoff occurs when VGS = Vp, since the pinch off voltage Vp is constant for a
given JFET, when VGS = Vp, the drain to source voltage VDS(p) must be zero
- Since there is no voltage drop between drain and source, ID must be zero
 do no confuse cutoff with pinch off
- pinch off voltage Vp is the value of gate – drain voltage VGD at which drain
current reaches a constant for a given value of VGS
- cut – off voltage, VGS (off) is the value of VGS at which the drain current is zero
- ID is zero only when the magnitude of VGS is equal or greater than the magnitude
of VD
- ID is non – zero for less negative value of VGS

Example 1

95
Vp = -8V and IDSS = 12mA,
a) determine VDS at pinch off
b) if gate is grounded, what is ID for VDD = 12V when VDS is above pinch off

Solution
VDS(p) = VGS – Vp,
Substituting Vp = -8V
VDS (p) = (-5) – (-8 ) = 3
a) this is a value of VDS at pinch off
b) if VGS = 0, ID = IDSS = 12mA for any value of VDS between pinch off (8V) and
breakdown

Example 2
Vp = -6V, IDSS = 15mA, Determine VDS at pinch off.
What is ID when VDD = 10V if the gate is grounded and VDS above pinch off

Solution
Vp and VGS are equivalent
ID is zero when VGS = Vp
- because a o drain current corresponds to an off condition the magnitude of Vp is
equivalent to the magnitude of VGS(off) but opposite in sign
- data sheets give a value for VGS(off) and not for Vp

Example 1
a particular p – channel JFET has a VGS = 4V what is ID when VGS = 6V
any further increase in VGS positively (>4V) switches off the divide

JFET Transfer characteristics

- VGS values ranging from zero to VGS off control the amount of drain current
- for an n – channel JFET, VGS(off) is negative and for a p – channel JFET,
VGS(off) is +ve
- the transfer characteristic illustrates graphically the relationship between VGS and
ID
- the curve shows the operating limits of a JFET

96
 ID = 0, VGS = VGS(off)
ID = IDSS when VGS = 0
- the JFET transfer characteristics curve is nearly parabolic in shape and therefore
2
 VGS 
approximated as I D  I DSS 1  
 VGS (off ) 
2
 V 
I D  I DSS 1  GS 
 Vp 
- because of its form, parabolic relationship is known as a square law and therefore
JFETs and MOSFETs are often referred to as law devices

Example
the data sheet for a certain JFET indicates that IDSS = 15mA and VGS(off) = -5V
determine the drain current for VGS = 0V, -1V and -4V

JFET forward transconductance

The forward transconductance gm of a mutual conductance Yfs is the change in drain
current (∆ID) to a given change in gate – source voltage (∆VGS) with VDS constant
I D
gm  , an indication of JFET ac amplification
VGS
- other designations ate gfs or Yfs (forward transfer admittance)

- because the transfer curve is non linear gm varies in value depending on the
location on the curve as set by VGS
- value of gm is greater near the top than it is near the bottom (near VGS (off)
- data sheets normally gives the value of gm measured at VGS = 0V gmo
- given gmo, the approximate value of gm at any point on the transfer characteristic
curve can be calculated
 VGS  2 I DSS
gm  g mo 1   and g mo 
 VGS (off )  VGS (off )

Example 1
Data sheet information for a certain JFET shows,
IDSS = 20mA, VGS(off) = -8V, and gmo = 400µs,
Determine gm for VGS = -4v and ID at this point

97
Solution
 VGS 
g m  g mo 1  
 VGS (off ) 
  4V 
g m  4000s 1 
 8V 
= 2000µs
2
 VGS 
I D  I DSS 1  
 VGS (off ) 
  4
2

I D  20mA1 
 8 

Example 2
A give JFET has the following characteristics
IDSS = 12mA, VGS(off) = -5V, and gmo = 3000µs,
find gm and ID when VGS = -2V

Solution
 VGS 
g m  g mo 1  
 VGS (off ) 
  2V 
g m  3000s 1 
 5V 
= 1800µs
2
 VGS 
I D  I DSS 1  
 VGS (off ) 
2
 2
I D  12mA1  
 5
= 7.2mA

Input resistance
- because of the reverse biased G – S junction the input resistance at the gate is high
V
- input resistance can be determined by Rin  GS , where IGSS is the gate reverse
I GSS
current at a given VGS

Drain to source resistance

- above pinch off ID is constant over a range of VDS
- a large change in VDS produces only a small change in ID
- the ratio of these changes is the D – S resistance of the device rds

98
 VDS
rds 
I D
- data sheets often specify this parameter as output conductance gOS or output
admittance YOS

JFET configuration
- Common source amplifier configuration provides best voltage gain
- Common drain amplifier provides a non – inverted output with near – unity gain
- Common gate amplifier connection is used less frequently providing voltage gain
with no polarity inversion

Source follower ( common drain ) circuit

- output is from source terminal

- there is no polarity inversion between output and input and voltage amplitude is
reduce from the input source

Common gate circuit

- input resistance is low, voltage gain is non inverting and output resistance is
same as the common source

Common source circuit

99
 Vout VDS
Av  
Vin VGS
Id
gm 
Vgs
Id
Vgs 
gm
IdRd
Av  gm
Id
Av  g m Rd

DC load line
- this can be drawn by interconnecting two points of the straight line
i) at ID = 0, VDS = VDD
V  VDS VDD
ii) at VDS = 0, VDD = IDRD + VDS, therefore I D  DD 
RD RD

100
Biasing
Self bias

- the gate is biased at approximately 0V by resistor RG connected to ground

- IGSS produces a very small voltage across RG
VG = 0, Vs = IDRs
VGS = VG – Vs = 0 - IDRs
Therefore VGS = -IDRs
VD = VDD - IDRD and Vs = IDRs
Then VDS = VDD – ID( RD + Rs)
Example 1
Find VDS and VRS when ID = 8mA, assume RD = 860Ω, Rs = 390Ω and VDD = 12V

Example 2
An n channel self biased JFET has a drain current of 12mA and Rs = 100Ω what is
the value of VGS

Solution
VGS = -IDRs = -12*10-3.100 = -1.2V

Fixed bias

101
 Fixed dc bias is obtained using a battery to set the gate – source reverse bias VGS with
no resulting current through RG or the gate terminal
VGS = VGG, VDS = VDD - IDRD

Voltage divider biasing

R2
VG  VGG  .VDD
R1  R2

Then VGSQ = VGG - IDQRs

Source bias

Vss = IDRs + VGS

VGS = Vss - IDRs

Find VDS and VGS for ID = 4mA

Vs = 2V
VD = VDD - IDRL
= 6V

102
VDS = VD - Vs
= 4V
VGS = VG – Vs
= 2V

Example
Determine the dc bias of the JFET with the following data,
VDD = 16V, RD = 2.5KΩ, R1 = 2MΩ, R2 = 280KΩ, Rs = 1.5KΩ, Vp = -4V, IDSS = 8mA
and VD = 8V

Solution
R2
VG  VGG  .VDD
R1  R2

280
VG  VGG  .  16  1.965V
280  2  106

8
ID   3.2mA
2.5  103
Vs = IDRs = 0.0032*1500 = 4.8V
VGS = 1.965 – 4.8
=2.835V

Example
Determine the quiescent value of Vgs, ID and VDS for JFET IDSS = 10mA, Rs = 5K and
VD = -5V

2
 VGS 
i) I D  I DSS 1  
 VGS (off ) 
ii) VGS = -IDRs
iii) substitute value of ID in (ii)

103
THE METAL OXIDE SEMICONDUCTOR FET (MOSFET)
- differs from JFET in that it has no pn junction structure
- the gate of the mosfet is insulated from the channel. By a silicon dioxide (SiO2)
layer
- there are 2 types of mosfets, the Depletion - Enhancement (DE) and the
enhancement only (E)

Depletion enhancement MOSFET

VGS is negative and less than VGS(off)

- the DE mosfet can be operated in either of 2 modes
i) the depletion mode
ii) Enhancement mode
- Since the gate is insulated from the channel a +ve or –ve gate voltage may be
applied
- MOSFETs operate in the depletion mode when a negative gate – source voltage is
applied and in the enhancement mode when a +ve gate to source voltage is
applied
Depletion mode
- Take the gate to be 1 plate of a capacitor and the channel to be the other plate
- The SiO2 layer is the dielectric
- With a negative gate voltage the negative charges on the gate repel conduction
electrons from the channel leaving positive ions in their place
- This way the channel is depleted of its electrons thus decreasing channel
conductivity
- The greater the negative voltage on the gate the greater the channel resistance
- At a sufficiently negative VGS, VGS(off) the channel is totally depleted and ID = 0

104
 - the n channel DE MOSFET conducts drain current for values of VGS between
VGS(off) and 0
- in addition the DEMOSFET conducts for values of VGS above 0

Enhancement Mode
- with a positive gate voltage more conduction electrons are attracted into the n –
channel thus increasing (enhancing) the channel conductivity

Symbols

Enhancement MOSFET
- operates only in the enhancement mode and has no depletion mode
- it differs in construction from the DE MOSFET in that it has no physical channel

Basic construction

105
Induced channel

- for an n – channel device a positive gate voltage about threshold value induces a
channel by creating a thin layer of negative charges in the substrate region
adjacent to the SiO2
- conductivity at the channel is enhanced by increasing the gate to source voltage
and thus pulling more electrons into the channel
- for any gate voltage below threshold value there is no channel;

Symbols

DE mosfet Transfer Characteristics

106
 - the DE mosfet operate with either a negative or positive gate voltage
- the point on the curve where VGS = 0 corresponds to IDSS
- the point where ID corresponds to VGS(off) as with the JFET VGS(off) = VP

Examples
1. For a certain DE mosfet IDSS = 10mA and VGS(off) = -8V
a) is this n channel or p- channel
b) calculate ID at VGS = -3V
c) calculate ID at VGS = +3V
2. IDSS = 18mA and VGS(off) = +10VV
a) is this n channel or p- channel
b) determine ID at VGS = -4V
c) determine ID at VGS = +4V

Enhancement mosfet transfer characteristics

- uses only channel enhancement
- n channel therefore requires a positive VGS and p channel requires a negative VGS
- there is no drain current when VGS = 0
- therefore the E - mosfet does not have an IDSS parameter
- there is no ID until VGS reaches a certain non – zero value called the threshold
voltage VGS(th)
- the equation for E mosfet parabolic transfer characteristics differ from that of

JFET DE mosfet
- this is because the curve at VGS(th) rather VGS (off) on horizontal axis and never
intersects the vertical axis
- for the E - mosfet the equation for transfer characteristics is
I D  k VGS  VGS (th)
2

- where k is a constant and depends on the particular

E – MOSFET Transfer Characteristic

107
Example
1. datasheet for a certain mosfet gives ID(on) = 3mA at VGS = 0V and VGS(th) = 5V
a) determine the drain current for VGS = 8V
Solution
First find k using I D  k VGS  VGS (th)
2

3mA  k 0  5
2

 0.12mA / V 2

Calculate ID for VGS = 8V using I D  k VGS  VGS (th)

2

I D  0.12mA / V 2 0  5
2

= 1.08mA
2. Datasheet for a certain mosfet gives ID(on) = 3mA at VGS = 8V and VGS(th) = 4V
Find the drain current for VGS = 6V

Handling precautions
- because the gate of a mosfet is insulated from the channel, the input resistance is
extremely high
- the gate leakage current IGSS for a typical mosfet is in the pA region whereas for
Jfet its in nA range
- input capacitance results from insulated gate structure
- excess static charge can be accumulated because input capacitance combines with
the very high input resistance and can result in damage to device

Precautions to be taken
- Mosfets should be shipped and stored in construction form
- All instruments and metal benches used in assembly or that should be connected to
earth ground
- The assembler‟s or wrist should be connected to earth ground with a length of wire
and high value series R
- Never remove a Mos device from circuit while power is on
Do not apply signals while the power supply is off

DE Mosfet Bias
- set VGS = 0 so that an ac signal at gate will vary the gate to source voltage below
and above bias point

108
 From diagram
VGS = 0, ID = IDSS therefore VDS = VDD - IDSSRD
1. determine VDS for a mosfet with the following data VGS(off) = -8V and IDSS =
12mA, VDD = 18V, RD = 600Ω
2. find determine VDS for a mosfet with the following data VGS(off) = -10V and
IDSS = 20mA, VDD = 18V, RD = 600Ω

E Mosfet
- Enhancement only mosfets must have a VGS greater than the threshold value VGS(th)

Drain – feedback bias

- in the two arrangements, the purpose is to make the gate voltage more positive
than the source by an amount exceeding VGS(th)
R2
VG  VGG  .VDD
- for voltage divider R1  R2

where, I D  k VGS  VGS (th)

2

Problem

109
Determine VGS and VDS for the E – mosfet with the following information
ID(on) = 3mA at VGS = 10V VGS(th) = 5V, VDD = 24V, RD = 1KΩ, R1 = 10KΩ, R2 =
15KΩ

Solution
I D  k VGS  VGS (th)
2

3mA  k 10  5)

2

= 0.12mA/V2
R2
VG  VGG  .VDD
R1  R2

15K
VG  VGG  .24
10  52

= 14.4V
I D  k VGS  VGS (th)
2

I D  120  106 14.4  5

2

= 10.6mA

VDS = VDD - IDRS

= 24 – 10.6*10-3*103
= 13.4V
Transistor as an amplifier
- Amplifiers increase the voltage, current and power of an input signal without
distorting the signal
- The CEC is ideal as voltage, current and power gains are obtained
- A BJT is a current operated device, a load resistor Rc is put in series with the
collector to convert collector current Ic to voltage . the collector junction is
reverse biased that is it has high resistance therefore Rc does not change Ic

- Output Vce is given by , when Ic changes VCE changes

Initial VBE =600mV, IB = 0.005mA, Ic = 0.995mA, Rc = 2K

110
 Final VBE =600mV, IB = 0.01mA, Ic = 1.995mA, Rc = 2K, Vcc = 6V
∆Vcc, Amplification factor/ voltage gain, Power gain and Current gain
VCE  Vcc  IcRc
VCE Ic
Output power gain = VCE  6  (0.995  2)
VBE I B
VCE  4.01
VCE  Vcc  IcRc
VCE 1.99
Vgain    49.75 VCE  6  3.98
VBE 40mV
VCE  2.02
Ic 1.99  0.995
I gain    199
I B 0.01  0.005
VCE  4.01  2.02  1.99V

DIGITAL TECHNOLOGY
- a branch of electronics and communications which utilizes discontinuous signals
i.e. signals that appear in discreet steps.
- Value of digital techniques desired from the ability to construct unique codes to
represent different items f information

Comparison of analogue and digital signals

- An analogue signal is best illustrated by a sine wave. It is continuous and the
value of analogue signal can be somewhere between the signal extremes
- Digital signals do not provide this continuous representation of the original signal
- instead the digital signal represents data as a series of digits such as a number
- this digital representation can be considered as a code which approximates the
actual value

The binary digit system

- based on the binary number system which has only 2 numbers ( 1 and 0)
- if a sine wave is represented by the most basic binary digital system – one will be
generated if the signal is positive and o0 will be generated if the signal is negative
- series of the sine wave cycles will generate a series of pulses between them
- the binary code consists of a series of binary digits each of which can have either
of the 2 variables
- when the BITS are assembled together into a group of particular length, they form
a binary word sometimes called the BYTE i.e. a group of 8 binary digits /bits
which normally are used to represent a denary figure, letter of the alphabet or any
other character
- as bits are assembled into words and several bits increase in length , the number
code combinations increases
- a binary word 2 bits in length can have 4 different forms i.e. 0.0, 0.1, 1.0 and 1.1.
where a 3 bit word can have 8 combinations
- a number possible combination increases by powers of 2

111
 - if information is reduced to a standard set of codes which can be represented by
binary words, the information can be handled by digital electronic devices

Digital codes
- various types of equipment are used on computer system to send and receive data:
keyboards, video terminals, printers, paper tap punchers and readers and magnetic
storage devices
- each of these types of equipment generates and receives data in the form of codes
and several codes exist

Encoding
- most electronic digital systems are based on voltage or current signals that assume
one of the 2 binary states, logic 0 and logic 1
- the system must therefore perform any arithmetic operation using binary codes
- human beings are however accustomed to working with decimal formatted
numbers
- Thus we frequently want to be able to convert decimal formatted numbers into
binary format
- The process of converting decimal formatted numbers (and other symbols
including alphabetic characters) into various digital formats is known as encoding

Decoding
- The electronic digital can then operate on such encoded numbers which it is
required to obtain the output in decimal form.
- The digital formatted numbers are decoded into decimal; format
- Specific digital electronic devices called encoders and decoders are designed to
perform such operations

WORD – any four of bits treated as a separate unit of data by the control unit. Words
may be subdivided into bytes which normally correspond to the size of a character
BIT - a single binary digit or base 2 digit
NIBBLE – a group of 4 binary digits
BYTE – a group of 8 binary digits

Binary Coded digits

- Each digit of a decimal number is coded in binary instead of coding the number
e.g. 2910 = 0010 1001 in BCD
- 40710 = 0100 0000 0111
- 49510 = 0100 1010 0101
ASCII
- It is also important to encode other symbols such as the characters of the alphabet.
Symbols such as +, - *, #, %, $, @, !, & etc and certain keyboard operations such
as “carriage returns”, backspace, “shift” and space
- A popular alpha numeric digital code exists for encoding these symbols and
keyboard functions. It is known as ASCII

112
DIGITAL SIGNAL
Pulse repetition frequency (PRF)
- PRF refers to the rate per second at which digital pulses are generated from
soured or at which they are propagated of transmitted through digital circuits
Pulse length/ width
- the time that a digital pulse lasts or occurs

Duty cycle
- ratio of the time that a digital generator produces pulses to the time that the
generator is switched on over to a given length of time
- most pulse waveforms have a duty cycle of 1:2

Mark to space ratio

- refers to the ratio of the time that the pulse occurs to the time when there is no
pulse

LOGIC CIRCUITS / GATES

- Digital circuits are classified into 2 main groups
i) those concerned with the control of
process and
ii) arithmetic processes
- in order to reduce logical statements to meaningful symbolic statements we must
be able to express such words as OR, AND, NOT, NAND, nor etc in symbolic
form

Logic circuits – circuits that perform the requirements of these words o fulfill the
meaning of these words or signals are referred to as logic agates or electronic gates
- An electronic or logic gate is a circuit that is able to operate on a number of input
binary signals in order to perform a particular logical function.
- Logic gates are basic building blocks from which many different kinds of logical
systems can be constructed

AND gate
- Under normal operating conditions A and B are either energized (high) or de –
energized (low)

113
- Under normal operating conditions A and B are either energized (high) or de –
energized (low)
- The behavior of the gate is summed up in a truth table showing the 1s (high) and 0s
(low)
1 represent true whereas 0 represents false
Symbol

Truth table
A B X
0 0 0
0 1 0
1 0 0
1 1 1

With N inputs x = A.B.C etc the number of inputs is limited by fan out
Fan in
The fan in of a fate is the number of inputs coming from similar circuits, that can be
connected to the gate without adversely affecting its performance

Fan out
- Max number of similar circuits that can be connected to its output terminals
without the output voltage falling out side the limits at which the logic levels 1
and 0 are specified

Diode – resistor and gate

- Using +ve voltage levels of +v for 1& 0V as zero, the circuit provides a 1 output
of +v only if all inputs are +v or one
- Any input at 0V will hold the output at about zero V

- 0V input at any (one or more) inputs terminals will cause that diode to short to
ground.
- In logic form, this means that zero at any input will cause zero output

114
 - A +v at input 1 & 2 but a zero input at 3 will produce a zero output because
diode 3 shorts the output to ground
- Only when a 1 input is provided at inputs 1, 2 and 3 with none of the diodes
conducting is the output 1

The OR gate

- A 1 (+v) input at any (one or more) input terminals will cause that diode to conduct,
placing the output at the 1 level
- A 0 input at inputs 1 and 2 but a 1 input at 3 will produce a 1 output because diode 3
conducts, placing the output at +v and thereby holding diodes 1 and 2 on cut off
- Only when a 0 input is produced at all 3 inputs will the output be 0

Diode OR gate

A B X
0 0 0
0 1 1
1 0 1
1 1 1

The NOT gate

- simplest gate with one input and one output (has a negation indicator)
- also called the inverter gives logical complements of the input signal

115
NAND GATE relay equivalent cct

A B X
0 0 1
0 1 1
1 0 1
1 1 0

Not A and B give 1

Output is high when A & B are not energized

DIODE Transistor logic

-when both inputs are high (+6V) D1 and D2 are reverse biased and behave like
high value resistors
- if V1 reaches about 1,2V and VBE about 0.6V the transistor (tr1) turns on
- at saturates provided the base current flowing is large enough giving a low output
- When either A & B or both are low (0) current through RB is passed to ground via
D1 and D2. transistor is off because V1 will be held at 0.6V (by conducting diodes)
giving a high output
- to sum up if A & B are both high, the output is not high, any other input
combination produces a high output
The NOR gate

Combination of the NOT & OR gats

Relay equivalent

116
Resistor transistor logic (RTL)
- If either A or B is high, the transistor is switched on and saturates, X is „low‟.
- When A & B are both low 0V i.e. neither A nor B is „high‟ the output is high

A B A B AB AB AB  AB
0 0 1 1 0 0 1
0 1 1 0 1 1 0
1 0 0 1 0 0 0
1 1 0 0 0 0 1

The exclusive or (EX -OR) gate

- It is an or gate with only 2 inputs which gives a high output when either input is
high but not when both are high
- Unlike the ordinary OR gate (EX – OR ) it excludes the case of both input being
high for a high output
- Also called the difference gate because the output is high when the input are
different

X  A  B  A.B  A.B
A B A B AB AB AB  AB
0 0 1 1 0 0 0
0 1 1 0 1 0 1
1 0 0 1 0 1 1
1 1 0 0 0 0 0

THE EXCLUSIVE nor Gate(EX – NOR)

Output is 1 if the inputs are equivalent

117
 X  A B
 AB  AB
A B A B AB AB AB  AB
0 0 1 1 0 0 1
0 1 1 0 1 1 0
1 0 0 1 0 0 0
1 1 0 0 0 0 1

The buffer

A X
0 0
1 1

Negation indicators
- Negation indicator is a “bubble” (0) appearing on the input or output of a logic
element.
- When appearing on the input, the bubble means that the external 0 produces an
internal 1.
- When appearing on the output , the bubble means that an external 1 produces an
external 0

Positive and negative logic

118
 - the negation indicators mean that the input is inverted before it enters the gates

This is equivalent to,

Gate propagation delay time

- the gate propagation delay limits the speeds at which they can operate
- propagation delay of a gate is the time interval between application of an input
pulse and the occurrence of the resulting output pulse

Power dissipation

119
-power dissipation of a logic gate equals the dc supply voltage multiplied by the average
supply current Icc, normally the value of Icc for a low gate output is higher that for a high
output P = VccIcc

Noise immunity
- gates ability to withstand fluctuations of the voltage levels noise at its inputs

LOGIC FAMILIES
- Transistor Transistor logic (TTL) and the complementary Metal oxide
semiconductor (CMOS) are 2 of the most widely used digital integrated circuit
technologies.
- TTL and CMOS differ in that TTL uses Bipolar junction transistors in its cct
technologies whereas the CMOS uses field effect transistors.
- Logic ccts are the same whether the device TTL or CMOS technologies the
difference will be in performance characteristics

Comparison of TTL and CMOS families

Advantages of CMOS
i) packing density i.e. many more gates or other ccts can be fabricated on a
single chip than for a TTL cct
ii) CMOS has low power consumption which is ideal for large scale circuits.
Application for such circuitry is in memory circuits and microprocessors

Advantages of TTL
i) much faster than CMOS
ii) There is a vast array of gate arrangements available on the logic which has
made it very popular in recent years. In cct application it is often desirable to
incorporate both TTKL and CMOS
iii) when both logic families are used great care must be taken in designing
interfaces between the logic circuit types to ensure correct operation
When interfacing CMOS with TTL, the main problems are
i) Majority of CMOS circuits cannot drive TTL circuits. The high capacitance
input of TTL will affect CMOS logic switching speed
ii) TTL requires 5V whereas CMOS can operate between 3 and 18V
- first problem can be solved by use of CMOS buffer (4049 or 4050)
- the second problem can be solved by using a pull up resistor of ≈ 1KΩ to bring
TTL output to +5V from 3.6V

BOOLEAN OPERATIONS
- in Boolean algebra, the binary digits are utilized to represent the two levels that
occur within digital logic ccts
- in binary 1 will represent a high level and binary 0 will represent a low level in
Boolean equations
- the complement of a variable A is represented by a “bar” over the letter e.g. A

120
 - the logical AND function of two variables is represented either by writing a “dot”
between the two variables, such as A.B or by simply writing the adjacent letters
without the dot, such as AB
- the logical OR function of two variables is represented by a “+” between the two
variables such as A+B

Boolean addition and Multiplication

- addition in Boolean algebra involves variables having value of either binary 1 or
binary 0
- basic rules for Boolean addition are as follows
0+0 0+0 1+0 1+1
(differs from binary)
- In application of Boolean algebra to logic ccts, Boolean addition is the same as the OR
- multiplication in Boolean algebra follows the same basic rules governing binary
multiplication
0.0 = 0 0.1= 0 1.0= 0 1.1= 1
Boolean multiplication is the same as the AND

Rules and laws of Boolean algebra

Three basic laws of Boolean algebra are
1. Commutative laws
a) Addition: A + B = B + A

- The order in which variables are ORed makes no difference

b) Multiplication: A.B + B. A

- The order in which variables are ANDed makes no difference associative laws

2. Associative laws
a) Addition: A + (B + C) = ( A + B ) C
- states that in the ORing of several variables, the result is the same regardless of the
grouping of the variables

b) Multiplication: A. (B.C) = (A.B). C

- law tells us that it makes no difference in what order the variables are grouped
when ANDing several variables

121
Distributive laws
A(B+C)=A.B+A.B

- law states that ORing several variables and ANDing the result with a single variable is
equivalent to ANDing the single variable with each of the several variables

Rules for Boolean algebra

1) A + 0 = A 2) A + 1 = 1 3) A . 0 = 0 4) A . 1= A
5) A+ A = A 6) A  A = A 7) AA=A 8) A. A  0
9) A  A 10) A + A.B = A 11) A  A.B  A  B
(A + B )(A + C ) = A + B.C

Illustration of rule 1

Q=A+0=A

Illustration of rule 2

Q=A+1=1

Illustration of rule 3

Q=A.0=0
Illustration of rule 4

Q=A.1=A

122
Illustration of rule 5

Q=A+A=A

Illustration of rule 6

Q  A A 1

Illustration of rule 7

Q=A.A=A
Illustration of rule 8

Q  A. A  0
Illustration of rule 9

A A
To prove rule 10
A + A.B = A from distributive law A (1+ B) = A
A + A.B = A (1 + B)
= A. 1 rule 2
=A rule 4

To prove rule 11
A  A.B  A  B
A  A.B  ( A  A.B)  A.B Rule 10
= AA + AB + AB rule 8 (adding A. A  0 )
= A + AB + 0 + AB
= AA + AB + AB
= ( A  A)( A  B) BY FACTORISING
=1. (A + B ) RULE 6
=A+B RULE 4

123
Proving rule 12
(A + B )(A + C ) = A + B.C
= AA + AC + AB + BC
= A + AC + AB + BC
= A ( 1 + C) + AB + BC
= A.1 + AB + BC
= A ( 1+ B ) + BC
= A.1 + BC
= A + BC
iii) apply associative laws of addition to
A + ( B + C +D )
iv) apply distributive law to the
expression A ( B + C +D )

DEMORGAN’S THEOREMS
AB  A  B (i)
A  B  A.B (ii)
- Equation states that the complement of a product is equal to the sum of the
complements
- The complement of two or more variables ANDed is the same as the OR of the
complements of each individual variable
- Equation 2 states that the complement of a sum is equal to the product of
complements
- The complement of two or more variables ORed is the same as he AND of the
complements of each individual variable
Theorems can be illustrated by the gate equivalents and Truth table

TRURH TABLE
A B AB A  B
0 0 1 1
0 1 1 1
1 0 1 1
1 1 0 0

A B AB A B

124
0 0 1 1
0 1 0 0
1 0 0 0
1 1 0 0

Applying De Morgan’s theorems

Q  A  BC  D( E  F )
STEP 1 Break the bar over the entire expression and change it to
 
 ( A  BC )  D ( E  F ) 
 
STEP 2 Cancel the double bars over left term since A  A to give
 
 ( A  BC )  D ( E  F ) 
 
STEP3 Break the long bar over the right term
 
 ( A  BC )  D  ( E  F ) 
 
STEP 4 cancel double bars
 ( A  BC )( D  E  F )

Examples
Express the following complement of product of terms as sum of complements using
DeMorgan‟s theorem
a) ABC b) ABCD c) ABCDEF
a) ABC  A  B  C
b) ABCD  A  B  C  D
c) ABCDEF  A  B  C  D  E  F

Apply DeMorgan‟s theorems to each expression

a) ( A  B)  C  ( A  B)(C )  ( A  B)C

b) ( A  B)  CD  ( A  B)(CD)  ( A  B)CD
c)
( A  B)C D  E  F  ( A  B)C D( E  F )  ( AB  C  D)( E F )  ( AB  C  D) EF

Sum - of - products form

- a product of 2 of more variables or their compliments is simply the and function
of those variables
- product of 2 or more variables is AB or the product of 3 variables is ABC and so
on

125
 - in Boolean algebra the sum is the same as the OR function, so a sum of products
expression is two or more AND functions ORed together
AB + BCD
ABC + DEF
ABC  DE F  FGH  AFG
- A sum of products form can also contain a term with a single variable e.g.
A + BCD + EFG
- the reason why the sum of products is a useful form of Boolean algebra is the
straight forward manner in which it can be implemented with logic gates
Implement the expression AB + BCD + EFGH with logic gates

- an important characteristic of the sum of products form is that the corresponding

implementation is always a two level gate network, that is the max number of
gates through which a signal must pass in going from an input to the output is
TWO excluding inversions

Product - of - sums form

- dual of the sum of products
- the AND of two or more OR functions e. g ( A + B )( B + C ) is a product of sum
(A + B + C)(D + E + F)
(A + B + C)(D + E + F + G)(A + E + G)
- This form also lends itself to straightforward implementation with logic gates
because it involves simply ANDing two or more terms and a two level gate
network will result

Example
Construct the following function with basic logic gates
( A + B )( C + D + E ) ( F + G + H + I )

126
Identify each expression ea either sum of products or a product of sums
a) Q = AB + CD + EF
b) Q = (A + B ) ( C + D ) ( E + F )
c) Q = ( ABC  ABC  ABC  ABC
Draw each logic gate diagram for each Boolean expression

Simplification of Boolean expressions

- using Boolean algebra we have to reduce a particular expression to its simplest
form or change its form to a more convenient on e in order to implement the
expression most efficiently
- the approach is to use basic laws, rules and theorems o Boolean algebra to
manipulate and simplify an expression
- method depends on thorough knowledge of Boolean algebra and considerable
practice in its application

Example
Simplify the expression AB + A ( B + C ) + B ( B + C ) using Boolean algebra
techniques
Step 1 – AB + A B + AC + BB + BC BUT BB = B
AB + A B + AC + B + BC but AB + AB = AB
AB + AC + B + BC factor the 2 last terms
AB + AC + B( 1 + C) but 1 + C = 1
AB + AC + B( 1 ) but B.1 = B
AB + AC + B factor B out
B (A + 1) + AC also (A + 1) = 1
B (1) + AC B.1 = B
B + AC

Simplify a) AB (C  BD)  AB
c) A + AB + ABC
d) ( A  B)C  ABC
e) ABC ( BD  CDE)  AC

127
The universal capability of NAND and NOR gates
- NAND and NOR gates are sometimes referred to as universal gates, because by
utilizing a combination of NANDs ass the other logic gates (NOT, OR, AND,
NOR) can be formed
- Also by utilizing a combination of NORs, all other logic gates (NOT, OR, AND,
NAND) can be formed
- This may be useful, NANDs may be readily available and can be used for some
other functions
- A 7400 quad TTL IC can be used with 4 NAND gates

Inverter (NOT)

X  AA  A
The AND function

X  AB  AB
For the circuit below use NAND gate only

- We can also form Ors and NORs from NANDs

128
 - From De Morgan‟s theorem that an AND with an inverted output (NAND) is
equivalent to OR with inverted input

OR function

X  A B  A B

Forming a NOR from 4 NANDs

Forming an INVERTER from a NOR gate

-
For X  A  B use NAND gate only

X  A B

X  A B  A B
Draw the connection required to convert
a) A NAND gate into an NOT
b) A NOR gate into a NOT

Draw the connection required to construct a

a) OR gate from two NAND gate
b) AND gate from several NOR gates
c) NOR gate from several NAND gates

129
Basic adders
- adders are important not only in computers, but in many types of digital systems
in which numerical data are processed

The Half Adder

Basic rules for binary addition
0+0=0 0+1=1 1+0=1 1+1=1

- these operations are performed by a logic circuit called a half adder

- NB. The half adder accepts 2 binary digits on its input and produces 2 binary
digits on its output a SUM bit and a CARRY bit

SUM = A  B

The full adder

- a full adder accepts 3 inputs including an input carry and generates a sum output
and an output carry

- the full adder must add the 3 input bits and the input carry
- from the half adder the sum of the input bits A and B is the exclusive OR of those
variables ( A  B )
- for the inputs carry Cin to be added to the input bits, it must be exclusive ORed
with ( A  B ), sum A  B  Cin
- to implement the full adder sum of function 2 exclusive OR gates can be used
- the first must generate A  B and the 2nd has its input on the output of the first
XOR gate and the input carry

130
 sum  ( A  B)  Cin
For full adder

- the output carry of the full adder is therefore produced by the inputs (A) ANDed
with B and A  B ANDed with Cin
Cout = AB + ( A  B ) Cin

Arrangement of 2 half adders to form a full adder

Encoders
- an encoder is a combinational logic circuit that essentially performs the reverse
decoder function
- it accepts an active level on one of its inputs representing a digit such as a decimal
or octal digit and converts it to a coded output such BCD or binary
- encoders can also be devised to encode various symbols and alphabet characters
- an encoder has many inputs lines bur the output is coded pattern which identifies
each of the input
- the decimal to BCD encoder called a rectangular diode matrix, contains switches
number 0 – 9 representing the corresponding decimal numbers

131
- if the switch 3 is pressed, diodes D4 and D3 are connected to supply +ve and
conducts
- current flows through RA and RB creating voltage across them which makes
output A and B go high
- outputs C and D stay low since they are connected to ground via Rc and RD
respectively
- the BCD output is then 0011
- if the switch 3 is pressed, diodes D4 and D3 are connected to supply +ve and
conducts

- if the switch 3 is pressed, diodes D4 and D3 are connected to supply +ve and
conducts
- current flows through RA and RB creating voltage across them which makes
output A and B go high
- outputs C and D stay low since they are connected to ground via Rc and RD
respectively

132
 - the BCD output is then 0011

Decoders
- the basic function of a decoder is to detect the presence of a specific combination
of bits (codes) on its input and to indicate the presence of that code by specified
output level
- an AND gate can be used as the basic decoding element because it produces a
high output when all its inputs are high

- if a NAND gate is used in place of the AND gate, a low output will indicate the
presence of the proper binary
- determine the logic required to decode the binary number 10112 by producing a
HIGH indication on the output

- decoding function can be formed by complementary only the variables that appear
as 0 on the binary number X  DC BA

133
BCD to decimal decoder
-
DECIMAL BCD CODE LOGIC
DIGIT FUNCTION
D C B A

0 0
1 0
2 0
3 0
4 0
5 0
6 0
7 0
8 1
9 1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
0 0
0 0
0 DC B A
1
DC BA
0
1 DCB A
0 DC B A
1 DC B A
0 DC BA
1
0 DCB A
1 DCBA
DC B A
DC BA

- the decoder converts each BCD code word (8421 code) in the one of ten possible
decimal digit indications
- each 4 to 10 line decoder has 10 decoding gates to represent the decimal digits 0
through to 9
- each developing functions is implemented with NAND gate provide to provide
active low outputs
- if active high outputs are required, AND gates are used for decoding

BCD to Seven Segment Decoder

- accepts the BCD code on its input and provides output to energize 7 segments
display devices in order to produce a decimal read out
- display formal composed the 7 elements segments
- by energizing certain combinations of these segments each of the decimal digits
can be produced
- to produce a 1, segments b and c are used
- one common type of 7 segment display consists of LED
- each segment is an LED that emits light when current flows through it
- common anode arrangement requires the driving circuit to provide a low level
voltage in order in order to activate a five segment

134
 - when a low is applied to a segment input, the LED is forward biased and current
flows through it
- common cathode arrangement is obtained by reversing the diodes and it requires
the drive to provide a HIGH level
- If BCD input to the decoder is represented by a general form DCBA, a Boolean
expression can be found for each.

Multiplexers (parallel in series out) (P I S O )

- a multiplexer (data selector) is a device that allows digital information from
several sources to be routed on to a single line for transmission over that line to a
common destination

- base MUX have several data – input lines and a single output line
- it has also data select input, which permits digital data on any on of the inputs to
be switched to the output line

SEQUENTIAL LOGIC
- when logic gates are connected together to produce a specified output fo certain
specified combinations of input variables, with no storage involve, the resulting
network is called combinational logic
- in combinational logic, the output level is at all times dependent on the
combination of input levels

135
 - Memory is very important in digital systems, its availability in digital computers
allows for storing programs and data
- Logic circuits that incorporate memory are called sequential logic since their
output depends not only on the present value of the input but also on the inputs
previous values
- Such circuits require a timing generators ( a clock) for their operation
- The main component in memory types are flip flop or latches

FLIP – FLOPs (Bistable Multivibrator)

- circuit with 2 stable conditions and is able to remain in either one for indefinite
length of time
- circuit will change state only when a switching operation is initiated by a trigger
pulse applied to the appropriate terminal
- the bistable/ flip flop will remain in its other stable state until another trigger
pulse is received
- The flip flop has 2 output terminals, normally Q and Q , when Q  1, Q  0 , it
sis said to be set and when Q = 0, Q  1 , the circuit is said to be reset
- Flip flops can either be synchronous or asynchronous
- With synchronous, the output does not respond immediately to an input change
bur waits until it receives a clock or enabling pulse

The SR FLIP FLOP

S R Q Q+
0 0 0 0
0 0 1 1
1 0 0 1
1 0 1 1
0 1 0 0
0 1 1 0
1 1 0 X
1 1 1 X

- the Q+ represents the logical state of the Q output after a set (S) or a reset ® pulse
has been applied to the input terminal
- S = R = 0, the state of the output will remain unchanged at whatever logical state
it should already have
- To set he circuit, i.e. Q = 0, Q  1 require S = o, R = 1
- If pulses are simultaneously applied to both S and R terminals so that S = R =1,
the effect upon the circuit cannot be predicted, the FF may switch to reverse the
state of its 2 outputs or it may remain on its existing condition

136
 - The S = R =1 condition is said to be indeterminate

S – R FLIP FLOP using NAND gates or NOR gates

S – R FLIP FLOP as a CONTACT – BOUNCE ELIMINATOR

- Good application for the SR FF is in elimination of mechanical switch contact
“BOUNCE”
- when the pole of the switch strikes, the contact upon switch closure, it physically
vibrates or bounces several times before finally making a solid contact
- although these bounces are small, they produces voltage spikes which are often
not acceptable on a digital system
- an S –R FF can be used to eliminate the effects of switch bounce

Switch contact bounce Bounce eliminator

- switch is normally in position 1, keeping the R input low and the FF reset
- when switch is thrown to position 2 R goes high because of R2 to Vcc and S
goes on first contact
- S remains low for only a very short time before the switch bounces, this is
sufficient to set the FF
- Q output of the FF provides a clean transition from LOW to HIGH, thus
eliminating the voltage spikes caused by contact bounce

Clocked S – R FF
- the clock determines the time at which the S and R signals should be effective
- S & R are effective when the clock input

137
 When CE = 1, A becomes S and B becomes R so that while CE remains „1‟ the
-
circuit behaves as an ordinary SR FF without a clock signal
S 00 11 00 11 00 11 00 11
R 00 00 11 11 00 00 11 11
CLOCK 00 00 00 00 11 11 11 11
Q 01 01 01 01 01 01 01 01
Q+ 01 01 01 01 01 11 00 XX

Wave in a gated S – R FF

The J – K FF
- designed to eliminate the indeterminate S = R = 1 state of the S – R FF

J K Q Q+
0 0 0 0
0 0 1 1
1 0 0 1
1 0 1 1
0 1 0 0

138
0 1 1 0
1 1 0 1
1 1 1 0

- the operational difference between S – R and JK FFs lies in the final 2 rows of
their truth tables
- the J pulse acts as the Set signal and the K pulses as the Reset signal
- the J – K FF always changes states when both J and K pulses are simultaneously
applied to the circuit

- the JK FF can be constructed by ANDing the S input of an S – R FF with its Q

output and ANDing the R input with its Q output

The D FF
- has a single trigger D input terminal and its logical operation as such that its Q
output terminal always takes up the same logic value as the D input
- any change in state takes place when the clock or strobe is 1

CK T Q Q+
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 0

The T FF

139
 - made from the JK FF by merely connecting its J and K terminals together

- provided the clock is 1, FF will change state or toggle each time there is a trigger
T pulse applied to its input

Waveforms in a T FF

MASTER – SLAVE SR FF
- Basically 2 SR FFs in series with the clock pulse connected to the second FF ( the slave)
inverted by comparison with the pulse applied to the first FF ( the master)

THE KARNAUGH MAP

- technique which allows circuit minimization to be achieved simply and quickly, if
properly used it will produce the simplest sum of products expression possible
- the K – Map is a pictorial method of plotting the circuit truth table

The map format

- the K map is composed of an arrangement of adjacent cells each representing
one particular combination of variables in product form
- total number of combinations of n variables and their complements is 2n, the K
map consists of 2n cells

140
 - variable combinations are labeled in the cells but practically the map is actually
arranged with the variables labeled outside the cells
- the variables to the left of a row of cells applies to each cell in that row
- the variable above a column of cells applies to each cell in that column

Single variable

21 = 2 cells

Two variable K map

22 = 4 cells

Three variable K map

23 = 8 cells

Four variable K map

24 =16 cells

141
 - the cells are arranged such that there is only a single variable change between
any adjacent cells
- it can be seen from the 3 variable map that top right hand corner cell ABC and
the top left hand corner ABC , i.e. only on variable has change
- similarly the bottom left hand corner ( ABC ) and the bottom right hand

Plotting a Boolean expression

- once a Boolean expression is in the sum – of – products form, you can “plot” it on
the K map by placing a 1 in each cell corresponding to a term in the sum of
products expression

1. ABC  ABC  ABC 2. ABCD  ABCD  ABCD  ABCD

3. ABCD  ABC D  ABCD  ABCD  ABC D  ABCD

Grouping cells for simplification

- you can group 1s that are in adjacent cells according to the following rules by
drawing a loop around those cells
- adjacent cells are cells that differ by only a single variable ( e.g. ABCD and
ABC D )
- the 1s in adjacent cells must be combined in groups of 1, 2, 4, 8, 16, and so on
- each group of 1s should be maximized to include the largest number of adjacent
cells as possible in accordance with rule 2
- Every 1 on the map must be included in as least one group. There can be
overlapping groups if they include non common 1s
ABCD  ABC D  ABCD  ABCD  ABC D  ABCD

142
 Simplifying the expression
- when all the 1s representing each term in the original Boolean expression are
grouped, the mapped expression is ready fro simplification,
The following rules apply:
1. Each group of 1s creates a product term composed of all
variables that appear in only one form (uncomplemented or
complemented) within the group. Variables that appear
both uncomplemented and complemented are eliminated
2. the final simplified expression is formed by summing the
product terms of all groups

Minimize the expression X  ABC  ABC  ABC  ABC  ABC

Reduce the following four variable function to its minimum sum of products form
X  ABC D  ABC D  ABBC D  ABC D  ABCD  ABCD  ABC D  ABC D  ABC D  ABC D

X  D  BC

Reduce the following function to its minimum sum of products form

X  ABC D  ABC D  ABC D  ABCD  ABC D

143
 Q  B D  ACD

Implementing Truth Table functions

- Another use of the K – map is in implementing logic functions that are specified
in truth table format
- The format of the K – map is modified slightly for this application

Plotting the truth table

- when the output variable on he truth table is a 1, a 1 I placed on the K – map in
the cell corresponding to the states of the input variables
E.g. if output variable is 1 when A = 1, B = 0 and C = 1, then a 1 is placed in the
lower right cell of the 3 variable map
Grouping and simplification
- the previously stated rules apply in grouping the 1s
- variables that are both 1 and 0 within a group are eliminated
- if a variable is a 1 in all cells of a group, it appears uncomplemented in the
product term
- if a variable is a 0 in all cell of a group, it appears complemented in the product
term

Implement the logic function specified by the truth table using the K map method
INPUTS O/P
A B C Q
0 0 0 1
0 0 1 0

144
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 1

Using the k map method, simplify the following expression to their minimum Sum Of
Product form
a) Q  AB  AB b) Q  AB  AB
c) Q  AB  AB d) Q  AB  AB  AB
e) Q  A( B  AB ) f) Q  AB  AB
g) Q  ABC  ABC  ABC h) X  ABC D  ABC D  ABC D  ABC D
From the truth table derive a logic circuit to satisfy the requirements o the TT
i) using the SOP
ii) using the POS
Q  ABC  ABC  ABC  ABC
 AC ( B  B)  AB(C  C )
 AC.1  AB.1
 AC  AB SOP

Alternatively
Q  ABC  ABC  ABC  ABC
 AC ( B  B)  AB(C  C )
 AC.1  AB.1
And  AC  AB
 ( A  C )( A  B)
Q  ( A  C )( A  B) POS

145
 BREAKDOWN DEVICES
- this refers to a family of 4 layered solid state devices externally controlled by
either a voltage or a current
- they are also referred to as voltage breakdown devices because they work
depending on Avalanche breakdown
- thyristors haves have two states only i.e. the ON and OFF states

Silicon controlled rectifier

- it is a 4 layer P – N device with 3 terminals anode, cathode and gate
- It is a rectifier with a control mechanism. It is used switch device in power
application

Construction Symbol

Biasing
Forward Biasing Reverse Biasing

During forward bias J1 and J3 are forward biased whilst J2 is reverse biased
During reverse bias J1 and J3 are reverse biased whilst J2 is reverse biased

146
Operation
- When V is increased to a certain critical value called forward break over voltage
VBO, J2 breaks down and SCR conducts.
- When conducting it offers very little resistance 0.01Ω to 1Ω and voltage across it
drops to about 1V.
- Current would be limited by supply and load resistor.
- Current keeps flowing indefinitely until the circuit is opened briefly

Static Characteristics

I
IL = latching current
IH = holding current

- in both the forward and reverse directions current does not flow until the voltage
across the thyristor has an excess of the breakdown or break over
- forward voltage at which the device starts to conduct can be reduced by a gate
current
- when VBC has not been reached there is a small leakage current passing until
when VBO has been reached and the thyristor will be “ON” and maximum current
starts to flow
- J1 and J2 are reverse biased , when V is increased zener breakdown will finally
occur and may destroy the SCR.

SCR turn on methods

1) apply gate triggering voltage (VGT) which cause IGT to flow

147
 (VGT) has the range 2 – 10V, IGT 100µA to 1500mA
The higher the gate triggering current, the shorter the turn on time

SCR turn off methods

- Poses more problems than SCR turn on because once the device is ON, the gate loses all
control
i) anode current interruption to reduce anode current below holding current
ii) forced commutation, uses capacitor in parallel with the SCR

Turning off the thyristor

- forward current is reduced below holding current (IH)
- reduce the anode to cathode voltage
- Reversing the polarity of the anode voltage. A thyristor is connected to ac mains;
reversal of polarity (voltage) every half cycle
- if dc is used VA (anode voltage) is reversed using a commutating capacitor
- latching current is the minimum current that must flow thru a thyristor so as to
remain ON just after the gate is removed
- holding current is the minimum current that can keep the thyristor on its „ON‟
state after it has been turned on

The Two transistor analogue

- the SCR is split into three layer transistors which are interconnected as shown
- Suppose A is positive and C negative and T2 starts conducting current. IE
increases and Ic1 also increases since Ic1 = IB2, IB2 also increases hence Ic2
increases
Ic = βIB = hFEIB
- since Ic2 = IB1, IB1 increases consequently both Ic1 and IE1 increases and the
process repeats itself
- The regenerative action is limited by external resistance. Typical turn on times of
a SCR are 0.12 to 1µs

Firing and triggering an SCR

148
 - SCR is operated with an anode voltage slightly less than the forward breakover
voltage and is triggered into conduction by a low power gate pulse or gate current
- Once switched on gate has no further control on the device current
- When S is closed momentarily a positive voltage is applied to the gate which
forward biases J2 and SCR conducts and the lamp lights up.
- SCR will remain in the conducting state until the supply voltage is removed or
reversed
Gate signals can be dc or ac

Application
1. switches
2. invertors
3. motor controls
4. regulated power supplies
5. phase control etc

- when SCR is „OFF‟ its current is negligible and when „ON‟ the drop across it is
low (1V) so no appreciable power is lost when it is in use

Advantages
- SCR require only 150mA to control a load of 2500A
- Can control power up to 10MW with individual ratings of 2000A at 1.8KV
- Can work at 50KHz

Transient effects in SCR

- the rate of change of anode current is due to a high initial rate of rise of anode
current when SCR is just switched ON
- This results in the formation of a local hot spot heating near the gate connection.
- holes injected into the P – region concentrated on J2 and cause spot heating which
can damage the SCR
- The rate of change of voltage causes the SCR to turn „ON‟ without a gate pulse.
- This is due to a large capacitance at J2, when the rate of rise of the applied anode
dv
voltage is very high, the capacitive charging current may become high enough
dt
to initiate switch on even in the absence of external gate current.

149
Phase control

- Gate current is derived from the supply. R limits the gate current during the
positive cycles
- if R is adjusted to a low value SCR will trigger immediately at the
commencement of the positive half cycle of input
- by adjusting R between the two extremes SCR can be made to switch ON
somewhere between 0˚ and 90˚
- if IG is not enough to trigger the SCR at 90˚, then the device will not trigger
- the purpose of D is to protect the SCR from negative voltage during the negative
half cycle
- from the diagram v  IG RL  I G R  VD  VG
V  VD  VG  I G RL
R
IG
- the load is always in series with the anode
- typical gate signals (1.5V, 30mA)

150
 - commercially available SCRs have break over voltages from 50V to 500V

Advantages of SCR over Electro mechanical or mechanical

1. no arching
2. no moving parts so no noise
3. high efficiency
4. switching speed of 109 per second
5. permits control over large currents
6. small size

SCR as a half wave rectifier

- The ac supply is supplied by transformer

- The variable resistor r is to control the gate current
NB. PIV < +VBO (in magnitude)

151
Operation
- During the positive half cycle SCR conducts provided proper gate current is made
to flow
- The greater the gate current, the lesser the supply voltage at which the SCR is
turned ON
- During the negative half cycle SCR does not conduct regardless of the gate
voltage because anode is negative and cathode is positive

Instantaneous voltage
From diagram V = Vm sin wt
- If the firing angle is θ the SCR will conduct from θ to 180˚
180
1
2 
Average output voltage Vav  Vm sin d


Vm
 cos 180

2

Vm
1  cos  
2
Average output current, Iav 
Vav

Vm
1  cos  
RL 2RL

SCR characteristics
- the junction temperature must be kept within recommended limits by the
manufacturers because leakage current is temperature dependent
- If leakage current increases, thyristor resistance falls and turns ON therefore the
thyristor must be mounted on a hat sink to dissipate the heat.

Problems
1 A half wave rectifier circuit employing an SCR is adjusted to have a gate
current of 1mA. The forward breakdown voltage of SCR is 100V, IG =
1mA and RL = 100Ω. If a sinusoidal voltage of 200V peak is applied find:
i) firing angle
ii) conduction angle
iii) average current
(Answers; θ = 30˚, Φ = 150˚, Iav = 0.5925A)

2. A SCR has a forward breakdown voltage of 150V when a gate current of 1mA flows
in the gate circuit. If a sinusoidal voltage of 400V peak is applied find;
i) Firing angle
ii) Average output voltage
iii) Average current for a load resistance of 200Ω
iv) Power output

152
3) An ac voltage v = 240sin314t is applied to an SCR. If the SCR has a forward
breakdown voltage of 180V find the time during which SCR remains off (= = 2.7ms)

4 a) explain the construction and working of an SCR

c) draw the transistor equivalent circuit of SCR and explain its operation
d) explain the terms break over voltage , holding current and forward current rating
used in an SCR
e) Draw the V – I characteristics of an SCR, explain the action of an SCR as a
switch. What are the advantages of SCR switch over mechanical or electro –
mechanical switch
f) (i) how does SCR differ from an ordinary rectifier\
(ii) How does SCR control power fed to the load
(iii) Why is SCR always turned on by gate current?
(iv) Why cannot an SCR be used as a bidirectional switch
THE DIAC
- it is a four layer device that can conduct in both directions ( BILATERAL)
- it ha 2 terminals A1 and A2
- conduction occurs in a DIAC when the breakover voltage is reached with either
polarity across the 2 terminals

Basic construction schematic symbol

153
Diac characteristic curve

- once break over occurs, current flows in a direction depending on the polarity of
the voltage across the terminals
- Device turns OFF when current drops below holding value
The equivalent circuit

- With A1 more positive with respect to A2, Q1 and Q2 are forward biased and Q3
and Q4 are reverse biased. The device operates on the upper right portion of the
characteristic curve
- With A2 more positive with respect to A1, Q3 and Q4 are forward biased and Q1
and Q2 are reverse biased. The device operates over the lower left portion of the
characteristic curve
- When A1 is +ve, current flow path is N1, P1, N2, P2, j2, and j4 are forward biased.
- When A2 is positive with respect to A2 the current flow path P2, N2,P1,N1, j1 and j3
are forward biased.

Application of Diac

154
 i) light dimming
ii) universal motor speed
iii) heat control
Lamp dimmer

- the circuit controls ac fed to a lamp

- the control of light output from the lamp is achieved by Rc variable gate voltage
arrangement
- the series R4 – C1 circuit across the triac is designed to limit the rate of voltage
rise across the device during switch off

Operation
- As the input V increases positively of negatively, C1, C2, and C3 charge at a rate
determined by R4, R1, and R2 andR3 respectively.
- When voltage across C3 exceeds the VBO of the Diac, the Diac is fired and thus in
turn, the Diac fires the gate of the Triac
- The Triac is turned „on‟ to pass the ac power to the lamp
- by adjusting the value of R2, the rate of charge of C2, and C3 can be varied and
hence the point at which Triac is triggered can be controlled

155
Heat control

- the capacitor C1 and L help to slow up the voltage rise across the device during
switch off
- R4 ensures smooth control at all positions of variable resistance R2

Operation
- as the input increases positively or negatively C1, C2 and C3 charge
- when voltage across C3 exceeds VBO of diac, the diac conducts
- C3 discharges through the conducting diac into the gate of the triac.
- This turns on the triac and hence ac power to the heater
Problems
1) explain the construction and working of a diac
2) discuss the applications of a diac
3) explain how a diac can be used as a triggering device
THE TRIAC
- Is like a Diac with a gate terminal. It can be turned on by a pulse at the gate and
does not require a breakover voltage to initiate conduction
- Triac can be equated to two SCRs connected in parallel and opposite directions
with a common gate terminal
- Triac can conduct current in either direction when it is triggered „on‟ depending
on the polarity of the voltage across A1 and A2 terminals

156
Equivalent circuit

157
 - - with A1 positive , Q1 and Q2 are „on‟, current flows in the direction
- with a A2 positive Q3 and Q4 are „ON‟, current flows in the opposite direction

Triac operation

- with switch open, IG = 0 and Triac is cut - off

- Even when there is no IG , the Triac can be turned „ON‟ provided the supply
voltage becomes equal to the break over voltage of the Triac
- The normal way to turn „On‟ a Triac is by introducing a proper IG
- With switch closed, IG flows thus breaking voltage of the Triac can be varied by
making proper IG to flow. IG is usually in mA

Applications
1. as a static switch to turn on ac power „OFF‟ and „ON‟
2. for light control
3. motor speed control
Triac as a power control

- the Triac is used to control ac power to a load by switching „ON‟ and „OFF‟
during the positive and negative cycles

158
 - In the positive half cycle, D1 conducts, gate is positive with respect to A2. R is
adjusted and the point at which conduction commences can be varied

Light dimming

- Circuit controls ac fed to a lamp, this controls light output for the lamp.
- The series R4 –C1 circuit across the Triac is designed to limit the rate of Voltage
across the device during switch off

Operation
- As the input V increases positively of negatively, C1, C2, and C3 charge at a rate
determined by R4, R1, and R2 andR3 respectively.
- When voltage across C3 exceeds the VBO of the Diac, the Diac is fired and thus in
turn, the Diac fires the gate of the Triac
- The Triac is turned „on‟ to pass the ac power to the lamp
- by adjusting the value of R2, the rate of charge of C2, and C3 can be varied and
hence the point at which Triac is triggered can be controlled

Problems
1. explain the construction and working of a triac
2. sketch the V – I characteristics of a triac
3. describe some important applications of a triac
4. explain how a triac can be used as a switch
5. what a the advantages of a triac over an SCR
6. why is a diac used to trigger a triac

159
THE UNIJUNCTION TRANSISTOR
- consists of a lightly doped bar of n- type silicon that has a small piece of heavily
doped p type formed on of its sides
- smaller p type region is called the emitter
- because it is lightly doped, the n type bar has relatively high resistance R called
the interbase resistance, RBB
- at the ends of the n type, two terminals are connected, these are known as the base
1 and base 2 terminals

Construction of the UJT

UJT equivalent

160
 RBB  RB1  RB 2
RB1 varies inversely with emitter current therefore shows the variable voltage across RB1
R
is given by VRB1  B1  VEB
RBB

Intrinsic stand off ratio

RB1
- the ratio is a UJT characteristic called intrinsic stand off ratio η
RBB
- when the emitter voltage VEB is less then VRB1  Vpn , there is no IE because the pn
junction is not forward biased
- value of emitter that causes the pn junction to become forward biased called
Vp(peak) and is expressed as Vp  VBB  Vpn
- When VEB reaches Vp, the junction becomes forward biased, IE begins to flow.
Holes are injected into the n-type bar from the p type emitter
- This increases the holes because of an increase in free electrons, thus increasing
conductivity between emitter and B1 (decreasing RB1)
- After turn „on‟ the UJT operate in a negative region up to a certain value of IE.
- After the peak VE = Vp and IE = Ip, VE decreases as IE continuous to increase,
thus producing the negative Resistance characteristic beyond the valley point of
peak above which the device is in saturation and VE increases very little when
increasing IE

Operation
- When VBB is switched on VA is developed and reverse biases the junction.
- If VB is the barrier voltage of the PN junction, then total reverse bias voltage is
 VA  VB  VBB  VB
- the emitter junction will not become forward biased unless its applied voltage, VE
exceeds ( VBB  VB )

161
UJT applications
- The unique property of UJT is that it can be triggered by or an output can be taken
from any one of its 3 terminals.
- Once triggered, the emitter current IE of the UJT increases regenerative until it
reaches a limiting value determined by the external power supply
- So it can be used for
1) phase control
2) Switching
3) Pulse generation
4) Sine wave generation
5) Saw tooth generator
Example 1
A given Si UJT has an interbase resistance of 10K. it has RB1 = 6K with IE = 0 find
a) UJT current if VBB = 20V and VE = is less than Vp
b) η and VB1
c) Peak point voltage Vp
Solution
a) since VE <Vp, IE = 0 because P – N junction is reverse biased therefore
V
I1  I 2  BB  20  2mA
RBB 10k
R
b)   B1  6  0.6
RBB 10
VB1  VBB  0.6  20  12V
c) VP  VBB  VB  12  0.7  12.7
Relaxation oscillator
a)

162
 - UJT is often used as a trigger device for SCRs and Triacs
- other application include non sinusoidal oscillators, generators, phase control and
firing circuits
- when dc power is applied, C charges exponentially through R1 until it reaches the
peak point voltage Vp
- at this point, the pn junction becomes forward biased and the emitter
characteristics goes into negative R region (VE deceases and IE increases)
- the capacitor then quickly discharges through the forward biased RB and R2
- when the capacitor voltage increases to the valley point voltage ,Vv, the UJT
turns off, the capacitor begins to charge again and the cycle is repeated
- during the discharge time of the capacitor, the UJT is conducting and a V is
developed across R2

b)

- The inclusion of external resistance R2 and R1 in series with B2 and B1 provides

spike waveforms.
- When the UJT fires the sudden surge of current through B1 causes a drop across
R1 which produces the going spikes

163
 - Also at the time of firing, fall of VEB1 causes I2 to increases rapidly which
generates negative going spikes across R2.
- Frequency of the output waveform can be changed by changing the capacitances

Conditions for turning on and off

- to ensure turn on , R1 must not limit IE at the peak point o less than Ip
- voltage drop across R1 at the peak point should not be greater than IpR1, thus the
V  Vp
condition for turn on is : VBB  Vp  IpR1 or R1  BB
Ip
- to ensure turn off of the UJT at valley point, R1 must be large enough that IE(at
the valley point) can decrease below the specified value of Iv
- This means that the voltage across R1 at the valley point must be less than IvR.
V  Vv
Thus the condition for turn off is : VBB  Vv  IvR11 or R1  BB
Iv
VBB  Vp V  Vv
- For proper turn on and off, R1 must be he range:  R1  BB
Ip Iv
- Charging time constant of the capacitor for voltage V is τ = CR and discharging
time constant τd = CRB1
- The time required to charge up to Vp (called ramp rise time) is ts =
(V  Vv )
ts  T log
(V  Vp )
Vp
- time required by the capacitor to discharge from Vp to Vv is td ≈ τd ≈ log e
Vv
1
- the frequency of oscillation is given by f 
ts  td
Example
Determine the value of R1 that will ensure turn off of the UJT. Characteristics of the UJT
exhibit the following values

η = 0.5, Iv = 10mA, Vv = 1V, Ip = 20µA and Vp = 14V

Theft alarm

164
The circuit is used to protect a car tape deck or a radio receiver from theft
- S is located at some concealed point in the car and is kept closed
- Gate is grounded through the tape deck
- The SCR is off and the alarm silent
- If tape is removed G is no longer grounded, it is connected to the car battery
through R
- As a result the horn starts blowing and continuous to do so until S is opened

OPERATIONAL AMPLIFIERS
Integrated circuits ICs
- complete electronic circuits containing resistors, capacitors diodes, transistors,
mosfets, fets, thyristors etc ass on a single cheap of silicon
- The op – amp is an I.C circuit of about 20 transistors with few resistors and
capacitors formed on tiny piece of silicon sealed in package from which
connections emerge. The op amp is termed because it can perform electronically
addition multiplication and integration
- these operations form the basis of analogue computing in which mathematical exp
represent physical systems e.g. forces on a bridge are solved and it was for this
originally

Advantages
i) small in size
ii) cheap
iii) reliable
iv) low power consumption
v) standard packaging
vi) easy replacement
vii) standard power supply requirements

Disadvantages
i) inability to dissipate large amount of power
ii) when one component fails the whole unit needs to be replaced
NB. Op amp can be wired to perform mathematical operations e.g. calculations of
differentiation and integration

Ideal amplifier characteristics

165
 - infinite gain (voltage)
- infinite bandwidth frequency
- infinite input impedance
- zero output impedance
- constant phase shift 1.1 input and output
- slew rate – the max rate at which the output voltage change on response to a step
or digital change on the differential input voltage v
t

Parameters
- Input Bias current – half of the current entering the 2 outputs of a balanced op –
1 
amp.  ( I B1  I B 
2 
- Input offset current – difference between the current entering the 2 inputs for a
 
balanced op – amp I io  I B1  I B
Iio
- Input offset current – ratio of the change in I IO 
T oC
- Input offset voltage – the value of the input voltage to be applied to the input
terminal to ensure the op – amp is balanced i.e. differential d.c voltage between
the output to force the differential output voltage to zero volts with temp
Uses
- compare 2 separate voltages and give an output which depends on the result
- amplify ac voltages direct by a multi factor which is easy to control
- buffer a high impedance source which is to drive a low impedance load voltage
follower/buffer
- add 2 or more voltages (summing amplifier) operate as the Schmitt the first op
amp were made from discrete components but to no avail in Ic and belong to the
linear/ analogue group

Properties of an op amp
- very high Av also called open loop gain Ao typical 105 for dc low freq but
decreases with frequency
- High input resistance typically 1012 so that it draws minute current from the
device cct supplying its input.
- it means it does not alter the value of voltage applied to its input
- low output resistance Ro typically 100Ω which means that its output voltage can
be transferred with little loss to a greater load
- Common mode rejection ratio – the ratio of the output of the op amp to the
difference between the voltages applied to the inverting terminals.
- The signal applied to the input terminals is known as common mode signal and is
nearly always an unwanted noise Voltage
- The ability of an Op amp to suppress common mode signals is expressed in its
 DVG 
CMRR CMRR  20 log  where DVG is the differential voltage
 CMG 
gain and CMG is the common mode gain

166
  calculate the common mode gain that has a differential V
gain 200*103, CMRR = 90dB

Slew rate
- is the max rate in V/µsec at which the output of an op amp is capable of changing
- When a signal at a given frequency is applied to an op amp the max permissible
output voltage is determined by the slew rate.
- Should a greater output voltage be developed , the signal waveform will be
distorted

- The slew rate limitation means that an op amp can be used to provide either a
large output voltage or a high upper 3dB frequency but not at the same time
- Typical slew rates are in the region 0.2V – 12V/µsec

Gain characteristics of a 741 OP AMP

At frequencies below 10Hz, the Voltage gain is constant at 106dB, at high frequencies
the gain falls off at a constant rate of 6dB/octare to 0dB

Input offset voltage

- Ideally the output of an op amp should be 0
- For a practical op amp it sis found that an output voltage does exist for input
voltage.
- The voltage arises because of small imbalances within the op amp but for
convenience it is assumed to be caused by an input offset voltage Vos

167
Bandwidth
The open loop gain of an op amp is not constant at all frequencies but falls t high
frequencies due to capacitive effects.
The gain frequency characteristics are specified by the manufacturer in 2 ways
2. bandwidth for large signals over which 5% distribution is
obtained
3. the frequency at the gain falls to unity

Input bias current

- The input cct of an op amp is always a differential amplifier, BJTs are employed.
- Both transistors should be provided with a bias current and to keep the cct
balanced these currents should be of equal value
- manufacturing imperfections means that there is always some difference between
the 2 base bias currents
- the input bias current is on half of the sum of the bias currents taken by each input
of the OP amp
- typically the input bias current is 10 – 50nA for BJTs and 10 – 100pA for FETs

Input offset current

- The difference between the bias currents is known as the input offset current
- Typical values are in the region 3 – 20nA for BJT input OP AMPs and few pA for
FETs input circuits

Symbol

- the standard has 2 input terminals, the inverting terminal marked (-) and the non
inverting terminal (+)
- operation is most convenient from dual balanced dc power supply giving equal
positive and negative voltage
- the centre of the supply is common to the input and output and is taken as the
voltage reference level

168
Operation
- if the voltage V2 applied to the non – inverting terminal is positive relative to V,
the output is +ve
- similarly if the V1 greater than V2 then output is negative
- basically an op amp is a differential voltage amplifier i.e. it amplifies the
difference between V1 and V2
- there are three cases i) V2 > V1 Vo is +ve
V2 < V1 Vo is -Ve
V2 = V1 Vo = 0
In general the output is given by Vo  Ao(V2  V1 ) where A0 is the open loop gain
Vo
And gain is given by Ao 
V2  V1

Transfer characteristics
- the characteristics shows how the output voltage ( V1 – V2 ) in (µV) varies with
the input

- it shows that, it is only within the very small input range AOB that the output is
directly proportional to the input thus an op amp behaves more or less linearly
- input outside the range causes saturation and the output is then close to the
maximum value it can have
- the limited linear behavior is due to very high open loop gain Ao and the higher it
is the greater the limitation
- a small change in the input Vin results in a very large change in the output range

169
 - when an OP AMP is to be used in a circuit, it sis usually connected to split, or
dual, power supplies to enable the output voltage to swing positively or negatively
- such supplies consists of two sets of batteries connected as shown

- the common link is termed the zero volt line

- it forms the reference line to which all input and output voltages are measured
- The simple arrangement is called open loop mode because there is no feedback
connection between the output of the OP AMP and either of its inputs
Op amp as the voltage amp
- the very high Ao of an op amp makes it unsuitable for most applications s an
amplifier since it either turns to saturate permanently or the gain varies violently
with the frequency of the input signal causing instability
- in practice an amp is almost always used with negative feedback obtained by
feeding back a certain fraction of the output to the inverting input
- this reduces the input and also the output, because the feedback is in anti phase
with the input
- the gain with negative feedback is called closed loop gain and is less than the
open loop gain

The closed loop gain Av has certain merits over the predictable and more or less
independent open loop
i) stability is greater
ii) distortion of the output is less thus amplification is more linear
iii) The gain is constant over a wide band of frequencies, the greater the feedback,
the lesser the gain but the greater the bandwidth. The loss is easily restored by
using two or more op amp stages
iv) gain is predictable and more or less independent of the OP AMP
characteristics

170
- the input voltage Vin appears across R1 and the input current is Vin
R1
- the input resistance of the OP AMP is very high so little current flows into the OP
AMP itself
- all the input current therefore flows through the resistor Rf and the voltage
developed across R2 is equal to the output voltage Vo of the circuit
Vin  Vo Vo  R f
- therefore  or Avf  
R1 Rf Vin R1

171
 - the input resistance of the OP AMP appears in series with the resistor R1 and so
the input of the circuit is ≈ R1
- the non inverting terminal is connected to earth
- the input voltage will be nearly at the same potential as the non inverting terminal
and is said to be a virtual earth
- the closed loop bandwidth is reduced by the negative feedback as
ft
Closed loop bandwidth 
1  Avf

Example
An OP AMP has unity gain bandwidth of 1.2MHz, calculate its bandwidth for
a) open loop gain of 50
b) closed loop gain of 50

1.2  106
Bandwidth   24 KHz
50
1.2  106
Bandwidth   23.53KHz
51
- If the closed loop bandwidth of an amplifier is too high it may be reduced by
connecting a capacitor C2 in parallel with the feedback resistor.
1
- If the wanted upper 3dB frequency is f2, then C2 
2f 2 R2

The non inverting amplifier

- the amp has a voltage series negative feedback applies to it
- the output voltage of the circuit is equal to Ao(Vin-Vdc) where Ao is the open
loop gain of the OP amp
- Vin is the input voltage and Vx is the voltage which appears at the inverting
 R1 
terminal i.e. Vx  Vo 
 R1  R2 

172
- Since the gain Ao is very large, the difference between Vin and Vx is very small so that
Vo Vo  R  R21 
Vin maybe taken as being equal to Vx, Av    Vo 
Vin Vx  R1 

R2
Av  1 
For a non - inverting amp gain is given by R1

- the input resistance of the op amp and hence of non inverting amp is increased to
a very high value while its output resistance is reduce to a low value
- a resistor R3 is often connected in series with the non inverting terminal to reduce
RR
the effect of the input offset current, where R3  1 2 but R3 must take into
R1  R2
account source resistance

ft
- the closed loop bandwidth of the non inverting amp is
Av

Inverting amplifier

173
 - Practically the non – inverting input terminal is not connected directly to 0V but
via a resistor RB
- If RB is correctly chosen, each input will “see” roughly the resistance to the
ground
- Value of RB for correct operation should be about the same as Rf and Ri in
parallel since some the bias current inverting input drawn from the output through
RR
Rf and the rest through R1, RB  1 f
R1  R f

Example
Given that V1 = 0.1V
An op amp is to have an inverting voltage gain of 10V. Calculate the required
external resistance values for R1 and RB =200kΩ
Application of inverting op amp
a) inverter / phase changer (i.e. where R1 = Rf then Vo = Vi ) out voltage will be
180˚ out of phase with input voltage
b) amplifier / magnifier / scaler where the output voltage is a multiple of the
magnitude of the input voltage i.e. ( with  Rf  Av then Vout = Av * Vin
R1

Input impedance
- since P is at a point virtual earth, R1 may be considered to be connected between
–ve and zero V
- input impedance is therefore R1 parallel with the much greater input impedance
i.e. effectively R1

Examples
a) determine the value of Rf required to produce a closed loop gain of 100, given
that R1 =2KΩ
b) if R1 is changed to 2.7k what value of Rf is required to produce a closed loop gain
of 25

SUMMING AMPLIFIER

174
I1  I 2  I 3  I 4  I N  0
V1 V2 V3 Vi
   0
R1 R2 R3 R f

V1 V2 V3 V4 Vo
   
R1 R2 R3 R4 Rf
R1 =R2 = R3 = Rf

V1 V2 V3
Vo   Rf (   )  (V1  V2  V3 )
R1 R2 R3
- Thus the output voltage magnitude is equal to the sum of the individual
magnitude of the input voltages

Applications
- perform mathematical operations in analogue computers and is also used in
electronic mixers e.g. to mix signal from guitars, microphones and drums

Voltage follower

Vin ≈ 0 (virtual earth but Vin = Vo – 0

0 = Vo – Vin therefore Vo = Vin
- the voltage follower circuit applies 100Cc feedback Av = 1 but Ai ≠ 1 – this is
also known as the better or absolute circuit which is mainly used for impedance
matching between a high output impedance source and a low input impedance
load (max power transfer)
- it is used as the input stage for electronic or digital voltmeters because of its very
high input impedance
Differential amplifier

175
 - amplifies the difference between 2 signals
- Vo  ( Ad )V1  ( Ad )V2 where Ad is the differential gain
- Therefore Vo  Ad (V1  V2 )
Vo  Rf
Ad  or If R1 =R2 = R3 = Rf
V1  V2 R1
1
- Common mode input signals Vc – is he average of the two signals i.e. (V1  V2 )
2
Vo
- Differential gain (Ad) – when CMIS = 0, Ad = where Vd = difference
Vd
between two signals when Vc = 0
Vo
- Common mode gain ac =
Vc

OP Amp as a comparator

- If both inputs are used simultaneously, output voltage is given by Vo = Ac (V2 –

V1) where V1 is the inverting input and V2 is the non inverting input and Ao is the
open loop gain.
- however Ao is so large that if (V1 – V2) exceeds about 100µV , the OP AMP
saturates
- if V2 > V1 Vo rises to a stead value close to a supply voltage, within V1 > V2 Vo
falls to near –Vs
- the OP Amp is then behaving as a 2 state digital device with Vo switching from
high to low
- in this form it is used as a comparator to compare voltage a job done in electronic
digital voltmeter
- wave in (a) shows what happens if input is an alternating voltage (sufficient to
saturate an op amp) greater than 100µV
- If V1 > 0 and the switching occurs within V2 – V1 giving a mark to space ratio
which is no longer 1.
- In fact the op amp in its saturated condition is converting a continuously varying
analogue signal to a 2 sate digital one

Integrating op amp

176
 dvc dv
Ic  c
dt dt
Vin
IN 
Rin
Ic  dQ
dt
-Vo = Vc
Ic  C dv but Ic = IN
dt
Vin dVo
Therefore  C
Rin dt
t
dVo 1
 C  t
dt
0
Rin  Vin
0
t
1
CRin 0
Vo   Vin dt

Multi stage amplifiers

- For greater amplification multistage op amps are employed whereby op amp
stages give different output until the require output is achieved

Example
Calculate the output voltages of the two circuits

177
 - output of op amp 1 becomes the input to the next opamp
- each op amp is treated separately and according to the type and its operation
- output of the last op amp becomes the output of the circuit

MICROPROCESSORS AND PROGRAMS

- microprocessor is an advanced electronic device which has arisen out of logic
integrated circuits
- uses of microprocessor
a) Control
c) calculation
d) administration
- the device slice is mounted in a 20 pin or 40 pin DIL unit
- Instructions fed into a microprocessor are binary digits known as bits.
- A typical instruction could be 0101 0110, this is an 8 bit instruction known as a
byte
- The byte is fed into a microprocessor either by a sequence of pulses, which is
known as asynchronous action or all pulses at once, which is known as
synchronous action
- The former is a serial operation while the later is a parallel operation
- The rate at which bits are fed into a microprocessor is determined by a clock
which typically operates at 1MHz
- The input information comes in two distinct forms
6) instructions
7) data
6. relates to a particular section of memory termed READ ONLY MEMORY
(ROM)
When the microprocessor is switched off, the instructions remain permanently in the
ROM and called non – volatile
7. relates to the alternative form of memory that is one in which information can be
temporarily stored
This form of memory is termed RANDOM ACCESS MEMORY (RAM)
- a RAM comprises a large number of stores, each of which has an address
therefore, when an information byte is inserted, an associated address indicating
the particular location in which it is to be stored is required
- similarly, the address needs to be known if we wish to recall the information byte
- unlike a ROM, the information stored in a RAM is lost when it is de – energized

178
 - the RAM is therefore said to be volatile
- the microprocessor therefore can be seen to operate on the interaction of a number
of interacting processes
- at the heart of these interaction is the accumulator
- this can be considered as the section where the main activity takes place
- thus, when it is proceeding through a series of operations, the changes in
formation process take place in the accumulator
- typically, a sequence of events could require two or three changes, at which stage
the processor would have gone as far as it could
- the result can be stored in the RAM, clearing the accumulator ready for the next
stage series of operations
- the control of the sequence may come either from the ROM or from another
section of the RAM in conjunction with the ROM
Simple block diagram of a microprocessor

- CPU is the microprocessor chip containing

- the accumulator, it is connected to ROM and RAM by 3 se circuits or buses
- The address bus relays the direction of the data to be stored or recalled from
memory in order that the correct storage system is used
- The port is the circuitry which connects the microprocessor system to the world
around it
- The data is transferred through the data bus
Filter circuits

179
Procedure
- The input is from a sin wave and v = sinwt
- V(rms) is the rms input voltage into the transformer
- The peak primary voltage is Vp1 = 2Vrms
N1 V1 I1
- the peak secondary voltage is found using the transformation ratio   ,
N 2 V2 I 2
N 
therefore by using Vp2  Vp1  1  the peak secondary voltage can be obtained
 N2 
- Vp(in) is the input to the filter circuit and it is found by Vp (in)  Vp2  2VD

The rectified voltage is pulsating dc that needs to be filtered of ripples and the n be
smoothened

- The capacitor charges exponentially to Vp(in) obeying the exponential

t
equation v  Vp (in)(1  e RC
)
t
- It discharges to Vc(min) obeying the equation v  Vp (in )e RC

180
- The capacitor does not discharge to zero since another wave is already rising from
the next half cycle
So the capacitor charges to Vc(min) giving Vc(min)  Vp (in)e RC
t
-
- The time taken to discharge is almost equal to the peak to peak that is the period
T
therefore the equation becomes Vc(min)  Vp (in)e RC
T t
- Since RC is much much greater than T,  0 and e RC approaches 1
RC
 t T
- Therefore it will be true to say, e RC  1 
RC
T
- This gives Vc (min)  Vp (in )(1  )
RC
- Vr(pp) is the voltage from the peak of the capacitor to its minimum value Vc(min)
T
Vr ( pp)  Vp (in)  Vc(min) but Vc (min)  Vp (in )(1  )
RC
T
Substituting for Vc(min), Vr ( pp)  Vp (in )  Vp (in )(1  )
RC
T
Vr ( pp)  Vp (in )  Vp (in )  Vp (in ) )
RC
1
Vr ( pp)  Vp (in ) Since T  1
RCf f
Vp (in )
Therefore Vr ( pp) 
RCf
- Vr(p) is the ripple peak voltage given by dividing the Vr(pp) by 2 to give
Vp (in )
Vr ( p) 
2 RCf
- The average voltage, that is the dc filtered voltage is given by subtracting one
Vp (in )
peak of the ripple from Vp(in), that is Vav  Vdc  Vp (in ) 
2 RCf
1
- This gives Vav  Vdc  Vp (in )(1  )
2 RCf
- Since the ripple voltage waveform is a sawtooth, the rms value of the ripple
Vp (in )
voltage is given by dividing Vr(p) by 3 which gives Vr 
2 RCf 3
- Ripple factor is the ratio of the average voltage to the ripple voltage
Vdc
r
Vr
NB. For a full wave rectifier, the frequency doubles

181
 The AC load line
From the dc wiew point
Vcc
- Ic( sat) occurs when VCE ≈ 0, so Ic( sat ) 
Rc  RE
- VCE(cut off) occurs when Ic≈ Vcc

From the ac view point

- the circuit looks different than does from the dc viewpoint
- collector resistance is different because RL is in parallel with Rc due to the
coupling capacitor C2
- the emitter resistance is zero due to the bypass capacitor C3
- therefore the ac load line is different from the dc load line
- note that a lower subscript indicates an ac quantity and an upper case subscript
indicates a dc quantity for example Rc is the ac collector resistance and RC is the
dc collector resistance
- ICQ and VCEQ are the dc Q point co-ordinates
- Going from the Q –point to the saturation point, the collector to emitter voltage
changes from VCEQ to zero that is ∆VCE =VCEQ
- The swing in collector current going from Q – point to saturation therefore
VCE V
Ic   CE , where Rc = RC parallel RL is the collector resistance
Rcparallel RL Rc
The max (sat) ac collector current is IC(sat) = IcQ + ∆Ic
VCEQ
Therefore I C ( sat )  I CQ 
RC

- Going from the Q point to the cut off point, the collector current swings from ICQ
to near zero, that is ∆IC = ICQ
- The swing in collector emitter voltage going from the Q point to cut off is
therefore VCE  IC RC  I CQ RC
- The cut off value of ac collector to emitter voltage is

182
 - VCE(cut off) = VCEQ + ICQRc

AC and DC load lines

183