Middle Technical University Digital Electronic Lab.

Electrical Engineering Technical College First Stage

Electrical Power Technical Engineering Dept. Mohammed D. Altamemi

Experiment-7
Design a binary Subtractor Circuit
Half and Full Subtractor

7-1 Object:
To design and implement logic circuit that perform binary subtraction.

7-2 Theory:
There are two types of subtractor circuits:

7-2-1 Half Subtractor:

The half subtarctor or accepts two binary digital as input and produce two
binary digits as outputs. A difference bit (D) and the logic symbol of half subtractor or
is shown in figure (9-1).

Figure (7-1) half subtractor circuit

Half subtractor circuit is used to subtract two digits only, as shown in table (7-
1). Where D is the difference between A and B (D=A-B), and B is the bowrow bit
from the next significant bit in the number (A).

A B D B
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
Table (7.1)

From table (7-1):

From above Boolean expression (D) and (B) can be construct a half-subtractor
logic circuit, as shown in figure (7-2).

‫د‬.‫م‬
Middle Technical University Digital Electronic Lab.
Electrical Engineering Technical College First Stage
Electrical Power Technical Engineering Dept. Mohammed D. Altamemi

Figure (7-2) implement half subtractor circuit

7-2-2 full Subtractor:

A full subtractor is a combinational logic circuit that forms the arithmetic

difference of three binary inputs bits. The full subtractor circuit has two output,
difference (D) and borrow (B). figure (7-3) shows the logic symbol of a full subtractor
logic circuit. The operation of full subtractor is depicted in table (7-2).

A B C D B
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1
Table (7-2)

Figure (7-3) full subtractor circuit

From table (7-2) we obtain the boot can expression for D and B:

‫د‬.‫م‬
Middle Technical University Digital Electronic Lab.
Electrical Engineering Technical College First Stage
Electrical Power Technical Engineering Dept. Mohammed D. Altamemi

Than the logic diagram for full subtractor can be drawn as shown in figure (7-4)
from equations (7.3) and (7.4).

Figure (7-4) implement of a full subtractor circuit

7-3 Procedures:

We will use TTL technology gates to form the half and full subtractor.

1. Use the following gates (NOT, AND, XOR) to build a half subtractor circuit
shown in figure (7-5).

Figure (7-5) implement of a half subtractor circuit by Multisim

2. Use any two sources from source circuit (f6 to f13) to supply the half subtractor
circuit. And then full in the table (7-3).

A B D B
0 0
0 1
1 0
1 1
Table (7-3)

‫د‬.‫م‬
Middle Technical University Digital Electronic Lab.
Electrical Engineering Technical College First Stage
Electrical Power Technical Engineering Dept. Mohammed D. Altamemi

3. Now we will use two half subtractor to build a full subtractor, and the circuit will
be as in figure (7-6) below.

Figure (7-6) implement a full subtractor circuit by use two half subtractors by
Multisim
4. Use the following logic gates (NOT, XOR, OR, AND) to build a full subtractor
circuit by use two half subtractors.
5. Use any three sources to supply the full subtractor circuit, then fill in the table (7-
4).

A B C D B
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1
Table (7-4)

7-4 Discussion:

1. Design a logic circuit that subtract 4-bit binary number from other 4-bit binary
number.
2. Design a logic subtractor to subtract (0101)2 from (1001)2.
3. Design a half subtractor by using the following gates only (NOT, AND, OR).

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