WorkShop Audace

INSA ROUEN
8 juin 2012
EOS robustness testing

Jean Luc Lefebvre

 AGENDA

EOS, EMC clarification

Presto Engineering

Work package 3.3 (Testing part)

Conclusion
 EMC and EOS Definitions
EMC:(IEC 161-01-07)
Focused on equipment requirement

Ability of an equipment or system to function satisfactorily in

its electromagnetic environment without introducing
intolerable electromagnetic disturbances to anything in that
environment

Aptitude d'un appareil ou d'un système à fonctionner dans son

environnement électromagnétique de façon satisfaisante, sans
produire lui-même des perturbations électromagnétiques
intolérables pour tout ce qui se trouve dans cet environnement.
Une bonne compatibilité électromagnétique décrit un état de « bon
voisinage électromagnétique »
 EMC and EOS Definitions (cont)
ESD association (ESDA) focused on device (IC)
requirement
Electrical Stress (ES): Any electrical current, voltage or power
that is imposed on a device
EOS: Electrical operation of device outside device’s AMR, leading to
either damage, malfunction or accelerated aging
AMR (Absolute Maximum Rating): Specific limiting value
or values of handling and electrical application conditions defined by
the device manufacturer not to be exceeded by the device user
Safety Margin
100%
Failures

Safe Handling &

Application
0 Electrical Stress
0 AMR FT
 EMI, EMC classification and test
Main standard committees: IEC and ISO
Scopes: Equipment and devices

Electro Magnetic Electro Magnetic Electro Magnetic

Compatibility Compatibility Interference (EMI)
(EMC) (EMC) Classification
Test device Test equipment

ESD x : Surges, Radiated Power

integrity
HBM, MM, CDM Burst, Conducted
Latch up Transient, Signal
integrity
Surge (draft) Ring wave,
Burst (draft) ESD system
……..

Standard for ESD protection in production lines

 EOS classification and test
Main standard committees: JEDEC & ESDA
Scopes: Devices

EOS/ESD Test EOS/ESD Test Electrical Over Stress

Standards Standard practices (EOS) Classification

ESD x : HBM, MM, ESD x : HMM

CDM, TLP, VF-TLP Transient Latch up Power
Latch up integrity
Conducted
Signal
integrity
EOS Technical
Reports

ESD x : CBM, CDE

ESD program Standard management for production lines

Overall committees, test and Presto ENG
JEDEC, ESDA, IEC & ISO
Main standard committees:

Scopes: Equipment and devices

EOS/EMC EOS/EMC EOS/EMC/EMI

Test device Test equipment Classification

ESD x : HBM, MM, CDM, Surges,

TLP, VF-TLP, HMM, CBM, Burst, Radiated Power
CDE Transient, integrity
Latch up Conducted
Ring wave, Signal
Transient Latch up ESD system integrity
Surge,& OVS ……..
Burst

Standard for ESD protection in production lines

 Presto ENG : Over Voltage Stress (OVS)
512 test channels 128 test channels
- DUT supply (7): 1A/50V
- Pattern generator: 64Kbit/1MHz
- Pulse generator:
- Mode: Voltage force and current regulator
- Max I/V: 1Amp / 50Volts
- Polarities: positive & negative
- Slew rate (fixe): 20V/mS
- Time duration: from 1mS up to 5 Sec
Transient Power Generator
- Arbitrary Function Generator
- Pulse generator:
- Mode: Voltage force and current
compliance
- Max I/V: 8 Amp pp/125Volts
- Polarities: positive & negative
- Tr/Tf (min): 500nS
- Time duration: from 0.5µS up to DC
 Transient Power Generator (TPG)
Ability description:
To characterize electrical robustness levels of components
versus frequency and energy parameters besides ESD regime.
 Transient Power Generator (TPG)
Schematic and capabilities:

I VA
I=f(V) P(VA)= f(freq)
60V/10A/
180KHz

125V/8A pp/1MHz
60V/10A/180KHz
1400V/50mA/200KHz V

125V/2A/1MHz
125V/8App/1MHz
60V/10A/ F
1400V/50mA/200KHz
180KHz
Objectives and deliverables (WP 3.3)
Objectives:

The current EOS (Electrical Over Stress) device test

equipments and standards do not cover the full range of EOS
events. Then, experiments with prototype of EOS test
equipment to reproduce and understand degradation
mechanism is needed.

Deliverables:
EOS/OVS test méthodology besides ESD (Electro Static
discharge).
 Presto ENG.: Audace WP 3.3
Methodology:
Objective: to determine the failure mechanism of the silicied
transistors MOS used for DC-DC Buck supply and for engine
driver.

• IRfr3710zpbf from Internal Rectifier (Thales)

• BUK761R8-30C from NXP (Valeo)
• NP110N03PUG-E1 from NEC (Valeo) Hypothesis:
Depletion of body diode while
Over voltage event occurs on
Drain that induces over
heating and degradation.

To reproduce degradation
by EOS/OVS test
methodology
 Presto ENG.: Audace WP 3.3
Méthodology (cont):

Thales measurement Valeo measurement

Current transient & Over voltage on Drain

 Presto ENG.: Audace WP 3.3
Méthodology (cont): (Thales experiment)
• Step 1: VDS Breakdown measurement at low current (VBR)
• Step 2: EOS/OVS test level close but less than VBR (initial)
• Step 3: VDS Breakdown measurement at low current (VBR)
• OVS level is incremented as long as there is no drift observed of VBR

OVS pulse parameters:

EOS/OVS : DC
Vgs: Duty cycle = 50%
Vgs: Tr/tf = 100nS
Vgs: Time duration: 2µS,
20µS, 200µS

VBR meas. setup OVS test setup

VDS max specified (AMR) = 100V

 Presto: Audace WP 3.3
EOS/OVS test results:

VDS (t) at EOS/OVS = 110V VDS (t) at EOS/OVS = 115V

IDS (t) at EOS/OVS = 110V IDS (t) at EOS/OVS = 115V

 Presto: Audace WP 3.3
EOS/OVS test results:

120 14 0.12
VBR

100 12 0.1

10
80 0.08

Vth & Ronlin

8
60 0.06 Gm

Gm
Vds Vth(Id=250µA&Vd=3.8V)
6
Vdg
40 0.04 Ronlin
4
20
2 0.02

0 0 0
-5 -4 -3 -2 -1 0 1 2 3 4 5
40 50 60 70 80 90 100 110 120 130
-20
stress(V)
Vgs(V)

Drift of VBR, IDSsat, VTh, Ron, Gm observed

VBR with EOS/OVS time duration at 2µS, 20µS & 200µS = 113V
 Conclusion

EOS/OVS equipment and test methodology at low current

level were implemented

It was possible to understand the failure mechanism of the

body diode of the transistor.

Failure threshold does not relate to EOS/OVS pulse

duration

Further study versus slew rate parameter is expected

THANK FOR YOUR
ATTENTION