ECE 8823: Planned Spring 2018 Lecture Schedule

Week 1 Jan 8 Overview & Introduction

Week 2 Jan 15 CUDA Execution Model
Week 3 Jan 22 CUDA Execution Model
Week 4 Jan 29 CUDA Memory Model/ CUDA Execution
Mapping
Week 5 Feb 5 CUDA Execution Mapping
µarch:kernel
Week 6 Feb 12 exec µarch: SM microarchitecture and
register file
Week 7 Feb 19 Control-Div
Week 8 Feb 26 Control-Div
Week 9 March 5 Memory Divergence (Midterm March 5th)
Week 10 March 12 Scheduling
Week 11 March 19 Spring break
Week 12 March 26 Scheduling
Week 13 April 2 Power & Energy Optimizations
Week 14 April 9 Webinar & Power and Energy Optimizations
Week 15 April 16 Dataflow and Systolic Computation
Week 16 April 23 Webinar
 ECE 8823: Planned Spring 2018 Assignment Schedule
Week 1 Jan 8 Overview & Introduction
Week 2 Jan 15 CUDA Execution Model Assn 1 (5%)
Week 3 Jan 22 CUDA Execution Model
Week 4 Jan 29 CUDA Memory Model Assn 1 Due/Assn 2
CUDA Execution Mapping (10%)
Week 5 Feb 5 CUDA Execution Mapping
µarch:kernel
Week 6 Feb 12 exec µarch: SM Assn 2 due/Assn 3
microarchitecture and (10%)
register file
Week 7 Feb 21 Control-Div Assn 3 Due/ Assn 4
(10%)
Week 8 March 2 Control-Div Base Project
Suggestions
Week 9 March 9 Memory Divergence Assn 4 Due/Assn 5
(Midterm March 5th) (10%)
Week 10 March 16 Scheduling Project Write-ups
Due
Week 11 March 19 Spring break
Week 12 March 28 Scheduling Assn 5 Due
Feedback on Projects
Week 13 April 2 Power & Energy
Optimizations
Week 14 April 11 Webinar & Power and Project status due
Energy Optimizations
Week 15 April 16 Dataflow and Systolic
Computation
Week 16 April 23 Webinar Project Due date TBD
May 2nd Final Exam (10%) Project Due

Note the schedule and content are subject to change depending

on the progress of the class lectures! If there are changes, sufficient
notice will be provided. The first entry corresponds to when the assignment is
given. The second entry is the due date.

• Assignment 1: CUDA Introduction

• Assignment 2: CUDA – Shared memory and constant memory usage
• Assignment 3: CUDA – Memory coalescing, streams, and new
application
• Assignment 4: Harmonica Emulator
• Assignment 5: Control Divergence and Memory Coalescing
• Project: Base project suggestions; TBD (students will be able to
propose their own)