EMONA MyDSP Experiment Manual - V2-1

EXPERIMENT MANUAL
Introductory DSP Experiments with EMONA myDSP

for NI myDAQ
Instruments www.my .com

1
Introductory DSP Experiments with EMONA myDSP
for the NI myDAQ
Author: Carlo Manfredini B.E.(Hons.), B.F.A.
Issue Number: 2.1
Published by:
Emona Instruments Pty Ltd,
78 Parramatta Road
Camperdown NSW 2050
AUSTRALIA.
web: www.myEMONA.com
telephone: +61-2-9519-3933
fax: +61-2-9550-1378
Copyright © 2013 Emona TIMS Pty Ltd and its related entities. All rights reserved. No
part of this publication may be reproduced or distributed in any form or by any means,
including any network or Web distribution or broadcast for distance learning, or stored
in any database or in any network retrieval system, without the prior written consent
of Emona Instruments Pty Ltd.
For licensing information, please contact Emona TIMS Pty Ltd.

NI ELVIS, NI myDAQ, NI LabVIEW are registered trademarks of National
Instruments Corp.
myDSP is a trademark of EMONA Instruments.
The TIMS logo is a registered trademark of
Emona TIMS Pty Ltd
Printed in Australia
EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com 2

EMONA myDSP Experiment Manual
Contents
Introduction (i)
How to handle, install and power up myDSP™:
ESD Warning, Unpacking, Handling, Set-up and ESD Preventative Measures
Quickstart guide to using myDSP
An introduction to the NI myDAQ instruments D-01
An introduction to the EMONA myDSP board D-02

myDSP board overview
myDSP Soft Front Panel descriptions
Special signals – Impulse and step responses D-03

Step response of a system
Pulse response of a system
Sinewave response to a system
Sampling, Aliasing & Nyquist D-04

Through the time domain
Through the frequency domain
Aliasing and the Nyquist rate
Discrete-time filters with FIR systems D-05

Notch filter creation using two-delay FIR
Using notch filters to eliminate interference
Poles and zeros in the z plane with IIR systems D-06

IIR without feedforward – a second order resonator
IIR with feedforward – second order filters
Ideas for further investigation:
Broadband noise & FFT
Designing filters from specifications to implementation

with LabVIEW D-07
Configuring myDSP from your own LabVIEW code D-08
Appendix A: Math relating to pole-zero based graphical

response estimation D-AppA
Appendix B: Calculations relating polynomials coefficients

to DF structure implementation gains D-AppB
3 EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com

Introduction
This experiment manual is designed to provide a practical “hands-on”, experiential, lab-based
component to the theoretical work presented in lectures on the topics typically covered in
introductory “Signals and Systems” courses for engineering students.
Whilst it is predominantly focused on all electrical engineering students, this material is not
exclusively for electrical engineers. With an understanding of differential equations, algebra of
complex numbers and basic circuit theory, engineering students in general can reinforce their
understanding of these important foundational principles through practical laboratory course
work where they see the “math come alive” in real circuit based signals.
This provides a foundation for further study of communications, control, and systems
engineering in general.
The use of a configurable template program where the students concentrates on the
calculations, and then the measurement of signals, is an approach which releases students from
the irrelevant tedium of debugging code when they should be studying the math and theory of
the system at hand.
It has been shown that experimenting with scaled models of real world systems allows students
early-on to get a tangible “feel” for principles that they may later utilize in real world
commercial workplace environments. As well, students tend to “believe” results from “real
hardware” rather than from software simulations, and this supports their “learning by doing”.
By combining both the software tools and the hardware implementation , the author hopes that
the students will find in the myDSP/myDAQ bundle, the best of all worlds.
Carlo Manfredini
Sydney, November 2012

How to handle, install and power up myDSP™ with NI myDAQ
ESD Warning – ESD Sensitive Product

Caution Although this product has been designed to be as robust as possible,
ESD (Electrostatic Discharge) can damage or upset this product. This product
must be protected at all times from ESD. Static charges may easily produce
potentials of several kilovolts on the human body or equipment, which can
discharge without detection. Industry-standard ESD precautions must be
employed at all times.
The Emona myDSP board is designed and intended for use as an experimental
platform for hardware or software in an educational/professional laboratory
environment. To facilitate usage, the board is manufactured with its components
and connecting traces openly exposed to the operator and the environment. As a
result, ESD sensitive (ESDS) components on the board, such as the semiconductor
integrated circuits, can be damaged when exposed to an ESD event. To indicate
the ESD sensitivity of the Emona MYDSP board, it carries the symbol shown at
left.
Unpacking, Transporting, and Storage

When unpacking the Emona myDSP board from its shipping carton, do not remove the board
from the antistatic packaging material until you are ready to complete the installation. Before
unwrapping the antistatic packaging, discharge yourself by touching a grounded bare metal
surface, touching an approved anti-static mat, or wearing an ESD strap. When transporting or
storing the Emona myDSP board, first place it in an antistatic container or packaging.
Handling and Setup

Handling the Emona MYDSP board can damage the board components if ESD prevention
measures are not applied. Before handling or setup, equalize your potential with the board by
touching one of the integrated ESD discharge pads. During all handling and setup, ESD
prevention measures must be applied. In addition, the Emona MYDSP board should be handled by
the edges. Touching exposed circuits, components or connectors could result in an ESD event.
When setting up Emona MYDSP board, observe the following guidelines to minimize the potential
impact of ESD:
• Patch the desired experiment blocks using single strand wire leads.
• Set switches and other controls to initial settings.
• Plug the myDSP into the myDAQ with the USB cable NOT CONNECTED to the PC.
• Connect the myDAQ via the USB cable to the PC to power up.
Operation
When operating the Emona MYDSP board, ESD can cause upset as well as damage to the board
components. Therefore, apply ESD prevention measures whenever operating the Emona MYDSP
board. In addition, observe the following guidelines:

• Do not touch exposed traces or components on the board while the board is powered on.
• Exercise caution when manipulating switches, buttons, knobs, and other controls while the
board is powered on.
ESD Prevention Measures

ESD prevention measures focus on reducing or eliminating the build-up of static charge that
may result in an ESD event that could damage or upset sensitive electronics. To minimize the
potential for an ESD event, implement the following measures:
• Perform all work at an approved work station.

• Use an approved antistatic mat to cover your work surface.
• Wear a conductive wrist strap attached to the antistatic mat and a good earth ground.
• Before handling or beginning work, equalize your potential with the board by touching one of
the “GND” pads.
Before removing myDSP™ from the NI myDAQ

Ensure NI myDAQ Power is OFF
Before removing the myDSP add-in module from the NI MYDAQ, always turn the myDAQ
POWER OFF.
ALWAYS STORE THE myDSP BOARD IN A ESD-SAFE PLASTIC BAG – AS SUPPLIED WITH
ORIGINAL PACKAGING.
Electrostatic Discharge Sensitive Product
CAUTION: The inputs/outputs of this product can be damaged if subjected to

Electrostatic Discharge (ESD).
To prevent damage, industry-standard ESD prevention measures must be
employed during installation, maintenance, and operation.

Quickstart guide for EMONA myDSP v1.0
Welcome to the EMONA myDSP Quickstart guide.

Follow the steps below to begin using your EMONA myDSP Board for
NI myDAQ™. With the myDSP, you can bring to life the theory behind
signals & systems with a real-time DSP hardware applications board.
1) INSERTION & POWER UP
a) Please ensure that the myDAQ is unplugged and powered OFF.
NOTE THAT myDSP IS NOT HOTSWAPPABLE.

myDAQ MUST BE POWERED OFF DURING INSERTION AND
REMOVAL.
b) Carefully and firmly plug the myDSP into the myDAQ unit.
c) Plug a breadboard module (such as the Elenco protoboard) into the
myDSP, or simply use the screw terminal 20 way connector supplied
with your myDAQ.
d) Use the 5 pre-stripped wires supplied with the myDSP kit to patch
up signals between myDSP I/O ports and the myDAQ instruments.
Patching connections for myDSP inputs & outputs:
wire 1: from ao0 to ‘Analog in’…To input a signal from the Function Generator.
wire 2: from ai0+ to ‘Analog in’…To display the output from the Function Generator on the Scope.
wire 3: from ai1+ to ‘DAC Filtered’…To display the myDSP filter output on the Scope.
wires 4 & 5: from ai0- and ai1- to agnd…These connections will ground the myDAQ Scope.
Figure 1: patching diagram for ‘analysis’ mode
You are now ready to sweep the Function Generator output frequency and view the filtered output
signal on the myDAQ Scope.
e) Plug-in the myDAQ to PC via USB cable and power up.
f) The myDAQ Instrument Launcher panel will appear. Open the Function Generator & Scope
Instruments.
g) Firstly set Scope settings to ‘Channel 0 is enabled for AI 0’ and ‘Channel 1 is enabled for AI 1’ and
RUN the instrument. You should see 2 flat traces on the scope. Be aware that one trace may be
overlapping the other.
h) Next, leave the Function Generator settings at their default settings: Sine, 100Hz, 1Vpp, and RUN
the instrument. You should see 2 sinusoidal signals on the scope.

i) Vary (sweep) the Function Generator frequency from 100 Hz to 10kHz. The output signal on the
Scope (blue trace) will reduce in amplitude as the frequency increases beyond 1kHz, according to
the filter specifications. The myDSP default filter at power-up, pre-programmed at the factory, is
a 4th order Butterworth LPF, with -3db cut-off of 1kHz.
Your myDSP is now working and ready for use.
2) DOWNLOADING PROGRAM FILES
a) All the latest software and documentation is available online at www.myEMONA.com

Download the most recent version of myDSP-setup.exe and unpack this file to your preferred
location on your hard drive. Please note that this program requires on-line registration by the user.
On-line registration will be immediate after you enter the serial number of your board and your
email address.
Refer to the downloaded EXPERIMENT MANUAL for information on how to use the myDSP Filter
Design SFP.
Go to www.my .com for downloads and updates
THE REMAINDER OF THIS PAGE IS INTENTIONALLY BLANK

Experiment 1 – An introduction to the NI myDAQ instruments
Preliminary discussion
The digital multimeter and oscilloscope are probably the two most used pieces of test equipment
in the electronics industry. The bulk of measurements needed to test and/or repair electronics
systems can be performed with just these two devices.
At the same time, there would be very few electronics

laboratories or workshops that don’t also have a DC Power
Supply and Function Generator. As well as generating DC
test voltages, the power supply can be used to power the
equipment under test. The function generator is used to
provide a variety of AC test signals.
Importantly, NI myDAQ has these four essential pieces of

laboratory equipment in one unit (and others). However,
instead of each having its own digital readout or display (like
the equipment pictured), NI myDAQ sends the information
via USB to a personal computer where the measurements are displayed on one screen.
On the computer, the NI myDAQ devices are called “virtual instruments”. However, don’t let
the term mislead you. The digital multimeter and scope are real measuring devices, not software
simulations. Similarly, the DC power supply and function generator output real voltages.
As well as the instruments mentioned above, the NI myDAQ has available two analog outputs &
8 digital i/o which can be controlled and written to by our LabVIEW program and the readings
processed and displayed on screen.
When an NI myDAQ unit is connected to a PC it will automatically run the Instrument Launcher
panel as shown below:
Figure 1: NI myDAQ Instrument Launcher panel
This panel gives the user access to each individual instrument. Several of these independent
instruments are used by myDSP experiments. These are the FUNCTION GENERATOR (FGEN),
the DYNAMIC SIGNAL ANALYSER (DSA), the BODE ANALYSER (Bode) and most often the
SCOPE (Scope). These instruments can also be launched from the myDSP SFP itself.
The other instruments may also be of use in the users’ custom experiments, such as the
ARBITRARY WAVEFORM GENERATOR (ARB).
Procedure:
It should take you about 10 minutes to read this experiment and explore these functions.

Click the SCOPE and FGEN icon, and familiarize yourself with their operation. Also run the
BODE analyser and notice how SCOPE and FGEN are not available when BODE is running.
? Why is this ?

Experiment 2 – An introduction to the EMONA myDSP
experiment board
Achievements in this experiment

For this experiment you will familiarize yourself with the various i/o on the myDSP and the use
of the myDSP SFP.
It should take you about 10 minutes to read this experiment and explore these functions.
The experiments possible with the EMONA myDSP board bring together worlds of
mathematical theory and practical implementation. We are able to explore, in a hands-on
manner, the representation of physical processes by mathematical models and test and measure
the benefits and limitations of such models. We explore the complementarity of the time and
frequency domains and practice thinking and theorizing in both. Through measurements,
calculations and observations we are able to consolidate our understanding of these domains.
By implementing several mathematical model and theorems in real hands-on circuit based
experiments, the student reinforces and actualizes their understanding of these principles to
create a solid foundation for future learning.
An important skill for the engineer and scientist is the ability to take rigorous and precise
measurements, often repetitively, in order to study the phenomena at hand. The EMONA myDSP
provides an abundance of opportunities to learn and put in practice theory in a way that avoids
the distraction of program debugging and syntax, but concentrates on system-level thinking and
theory.
Pre-requisites:
You should have completed the introductory chapter 1 so that you’re familiar with the myDAQ
equipment setup and capabilities.
Equipment
 PC with LabVIEW 2012 (or higher) software or LV2012 Runtime Engine installed
 NI DAQ and USB cable to suit

 EMONA myDSP board
 5 pre-stripped leads
Procedure
Part A – Setting up the NI myDAQ/myDSP bundle
1. Turn off the NI myDAQ unit by unplugging its USB cable
WARNING: DO NOT HOTSWAP THE myDSP BOARD. myDAQ MUST

ALWAYS BE OFF DURING INSERTION & REMOVAL.

2. Plug the myDSP board into the NI myDAQ unit.
3. Powerup the myDAQ by connecting to the PC using the USB cable and wait for the
Instrument Launcher to display. The PC may make a sound to indicate that the myDAQ unit has
been detected if the speakers are activated.
4. Launch the myDSP Main VI.
5. If you’re asked to select a device number, enter the number that corresponds with the
NI DAQ that you’re using.
6. You’re now ready to work with the myDSP.
Note: To stop the myDSP VI when you’ve finished the experiment, it’s preferable to use the
STOP button on the myDSP SFP itself rather than the LabVIEW window STOP button at the
top of the window. This will allow the program to conduct an orderly shutdown and close the
various DAQmx channels it has opened.
EMONA myDSP board overview
The myDSP board is a single channel DSP unit, with anti-aliasing filter on the input, and
selectable reconstruction filter on the output. The inputs and outputs are patched with pre-
stripped, single strand wire as documented in this Lab Manual.
Figure 1: myDSP board block diagram, showing i/o terminals
This chapter discusses the functionality of each SFP feature briefly . Further details such as
specifications are contained in the EMONA MyDSP User Manual.

Figure 2: NI myDAQ/ EMONA myDSP bundle

EMONA MyDSP Soft Front Panel (SFP) descriptions
The EMONA myDSP Soft Front Panel serves both to control elements of the myDSP hardware,
as well as provide experiment specific design and analysis tools for use with the hardware, in
one compact panel.
The layout is arranged so as to fit on screen easily with all parameters in view and two modes
selected via tabs.
Filter Design to Gains mode

There are a number of controls which allow you to select the specifications of a
filter, by the following parameters:
Figure 3a: EMONA myDSP Soft Front Panel (SFP);design mode
Filter type: Lowpass, Highpass, Bandpass, Bandstop

Design method: Butterworth,Elliptic,Inverse Chebyshev,Chebyshev
Sampling Frequency: enter the clock frequency of the unit delay elements.
Filter specifications: pass and stop frequencies for the Filter type.
Ripple Specifications: pass and stopband ripple amplitude
Transfer function display

The tabs allow the display of a number of representations of the Transfer Function for the
filter design. The one used mostly in this manual is the Transfer Function: Expanded Form, as
this relates most closely to the polynomial and coefficients.
Graphic displays
The filter design is displayed by Frequency response, phase response and z-plane plot of poles &
zeroes. These displays are instantly updated to match the filter design. The exact locations of
each pole and each zero is available at the bottom center indicators ‘zeroes’ and ‘poles’.
EXTRACT HARDWARE GAINS

This control, when pressed, causes the filter design values, such as sampling frequency, filter
order and polynomial coefficients to be extracted from the design and copied to the individual
HARDWARE GAINS controls. These controls have a yellow background.
DOWNLOAD to myDSP
This control, when pressed, will load the ‘extracted’ parameters into the DSP processor for
implementation.
ELVISmx instruments
The required ELVISmx instruments, FGEN, Scope, Bode & DSA can be launched from this
button panel.
Manual Gains Entry mode
Figure 3b: EMONA myDSP Soft Front Panel (SFP); manual mode

‘Manual Gain Entry’ mode allows the user to vary individual hardware gains, and see the
corresponding filter design be displayed in the Graphic displays. Any yellow control may be
varied in this mode. This is especially interesting when the gains are being varied manually in
that the user can see the poles and zeros moving about the unit circle in real time and the
resulting changes to the filter response. Then you load and run that filter and see it perform
with real signals in the ‘real’ world.
These values will override the values setup in the ‘Filter Design to Gains mode’ tab.
Filter structure
There are 2 filter structures implemented in the DSP unit. These are Direct Form 2 and Direct
Form 2 transposed. These are selected on this tab.
Tap select
As well as viewing the output of the structure, the user can choose to view any one of the
internal taps of the structure.
Input scaling
A user can internally scale a signal, after sampling, by varying this control. This serves to
maintain a large scale signal for sampling with mathematical amplitude reduction internally, to
improve signal/noise performance.
Sampling Freq
The actual sampling frequency sent to the myDSP can be set here.
Refer to the User Manual for outline of the limitations to sampling rate versus the order of
filter selected.
Tune Ts
Refer to User Manual for information

Experiment 3 – Special signals – Impulse and Step responses
Time domain responses are discovered: step and impulse responses as paradigms for the
characterization of system inertia; sinewaves were used as probe signals;
Bandwidth is a term that has been in the engineering vocabulary for many decades. Its usage
has extended over time, especially in the context of digital systems. It has become
commonplace now to mean information transfer rate, and all Internet users know that
broadband stands for fast, and better. There are highly competitive markets demanding top
performance – ever higher speed whilst maintaining a low probability of corruption. However, as
speed is increased, obstacles emerge in the form of noise, interference and signal distortion. At
the destination these limitations become digital errors, resulting in pixellated images, and audio
breaking up.
Engineers involved in the design of these systems must assess the suitability of numerous
components and sub-units e.g. adequate speed of response ?, too noisy, distorted? They will
need to benchmark the behaviour of subsystem. The procedures that are used for modelling and
testing must be universally accepted.
The most important consideration affecting the speed of a digital signal is the switching
process to produce a change of state. The switching time can never be instantaneous in a
physical system because of energy storage in electronic circuitry, cabling and connecting
hardware. This energy lingers in stray capacitance and inductance that cannot be completely
eliminated in wiring and in electronic components. The effect is just like inertia in a mechanical
system.
A universal procedure is needed to characterize, measure and specify ‘inertia’. Various

paradigms have become established over many years of application. One of these is the step
response. For this reason, the step function has become one of the special signals in systems
engineering.
There are other signal types of importance. The sinusoid or sinewave heads the list of the
range of applications. There are many others, including the impulse function, ramps,
pseudonoise waveforms and pseudorandom sequences, chirp signals.
This Lab has its focus on signals that are most needed for basic operations.
Figure 1: step, impulse and sinusoid signals

The experiment
In this experiment we investigate how signals are distorted when a system's response is
affected by inertia, and discover signals that are useful for probing a system's behaviour.
It should take you about 45 minutes to complete this experiment.
Pre-requisites:
Familiarization with the myDSP conventions and SFP usage. No theory required.
Equipment

Procedure

Figure 2: myDSP connected to myDAQ instruments for ‘analysis’ configuration

Patch up the myDSP board in ‘analysis’ mode as follows:
ao0 to ANALOG IN;
ai0 to ANALOG IN;
ai1 to DAC UNFILTERED;
INPUT FILTER to NO.
MODE: filter design to gains
Load the myDSP with a S.U.I, ‘system to investigate’, in this case a filter. You may also wish to
repeat this experiment with other filter designs to see the difference in performance.
To do this, you can select the following design specifications. By sampling at a high enough rate,
10kHz, you will not notice the discrete samples steps and we can ignore those effects for now. A
Chebyshev filter type is selected as it has a lower order than a Butterworth filter, and can be
run at 10kHz.
myDSP settings are shown below. Press “EXTRACT HARDWARE GAINS” when ready, and then
“DOWNLOAD to myDSP”.
Figure 3: myDSP SFP settings for S.U.I
Other settings are as follows:

FUNCTION GENERATOR: 100 Hz Squarewave, 1Vpp
SCOPE: view both ANALOG IN & DAC UNFILTERED out. Timebase 2ms/div
INPUT FILTER: NO

STEP S.U.I.
SOURCE
Figure 4: block diagram of step excitation arrangement
Part 1 – step response of a system
Output a slow moving squarewave (100Hz) so that each edge is an isolated event which you can
study independently of other edges. Trigger the scope for a stable display. View the output
from the system under investigation, S.U.I. output will follow input more or less.
When the response to a step excitation is isolated in this way, so that there is no overlap with
the responses of neighbouring transitions, it is known as the step response.
The risetime of the step response is an indicator of the time taken to traverse the transition
range. Various definitions can be found according to the application context. The frequently
used 90% criterion is suggested as a convenient choice for this lab.
Measure and compare the risetime of the step responses. Use this to estimate the maximum
number of transitions per second that could be accommodated in each case (ignore the effect
of the oscillations).
Sketch this step response in your notebook, with all the relevant time and amplitude
measurements. You can also view the DAC FILTERED output if you prefer.
Part 2 – isolated pulse response of a system
An isolated pulse can also be used as an alternative to the use of an isolated step as the
excitation to “probe” the behaviour of the system. The variable duty cycle of the FUNCTION
GENERATOR serves as source of this signal.
PULSE
S.U.I.
SOURCE
Figure 5: block diagram of pulse response investigation
Leave the patching as per the previous section, with the FUNCTION GENERATOR output
connected to the S.U.I. With the frequency of the FUNCTION GENERATOR still set to 100
Hz, progressively reduce the DUTY CYCLE in steps as follows: 50,40,30,20,10%

When you reach 10%, move in steps of 1% ... and observe the effect on the pulse width and pulse
interval. Note that the transitions are not affected. As you continue to reduce the duty cycle,
and thus reduce the input impulse width, the flat top at the peak between transitions gets
shorter, and ultimately disappears. Since the rising transition is not able to reach its final value,
it is not surprising that the amplitude of the pulse gets smaller.
? Describe what happens when you reach 10% and 5% duty cycle ?
? Are you able to determine the ‘demarcation’ pulse width -- i.e. after which the response shape
remains unchanging? Record the duty cycle value at which this occurs for all SUI’s in the table
below.
? Using the known FUNCTION GENERATOR frequency and the measured duty cycle, calculate
and tabulate the input pulse width.
? Express this as a percentage of the step response risetime, using the values from the
previous section on step response, and note these values.
Reflect on this for a moment, i.e. the response shape remaining apparently independent of
the input pulse width -- this is an interesting discovery.
You have demonstrated that, provided the time span of the excitation signal is sufficiently
concentrated, the shape of the response pulse is entirely determined by the characteristics of
the system. We could think of this as the striking of a bell, or tuning fork, or of the steel
wheel of a train to detect a crack. The system is hit with a short sharp burst of energy.
INSIGHT: The response shape is not affected by the input signal.
The energy burst used as input is called an impulse. The resulting response is called the impulse
response. An impulse function is a mathematical construct derived from a physical pulse. The
idea is straightforward. The pulse width is reduced to an infinitesimal value while maintaining
the energy constant. Naturally this implies a very large amplitude. The impulse function plays a
central role as one of the fundamental signals in systems theory, with numerous ramifications.
In the above exploration we discovered practical conditions that make it possible to generate a
system's natural response or characteristic, i.e. a response that is not affected by the exact
shape of the input excitation. Concurrently we have discovered a path to the definition of the
impulse function and a vital bridge to link this mathematical abstraction to the world of physical
signals.
With the setup unchanged, measure the delay from the input to the peak of the output pulse
and compare this with the delay of the step response measured earlier.
Return to your records of the step responses obtained earlier. For each case, carry out a
graphical differentiation with respect to time (approximate sketches are sufficient, however
take care to achieve a good time alignment to identify key features).

Figure 6: example of an impulse response
Part 3 – sinewave response to a system
As mentioned in the introduction, sinewaves are encountered in a large number of applications.

In this segment we just get our toes wet. We carry out some basic observations and compare
the sinewave response of the S.U.I with the impulse response obtained above.
S.U.I.
Figure 7:block diagram of setup for sinewave investigation
Progressively increase the frequency from 100 Hz to 2kHz and observe the effect on the
amplitude of the output signal. Make a record of your findings in the form of a table of
amplitude vs frequency.

Refer to the results you obtained and sketched of the step response. Notice the similarity of
the step response shape to a half cycle of a sinewave. Estimate the frequency of the matching
sinewave. Examine the graph obtained in the above task and see whether any feature worth
noting appears near this frequency.

Figure 8: example of input & output signals
? What frequency would a matching sinewave have ?

? Describe what happens to the frequency response you plotted at this frequency ?
? A physical mechanism was proposed above to explain the reduction in pulse response amplitude
as the width of the input pulse was progressively made smaller. Consider whether the reduction
in output amplitude of the sinewave with increasing frequency could be explained through a
parallel argument.

Experiment 4 – Sampling, Aliasing & Nyquist
You will be able to intuitively visualize the spectrum of a sampled signal, and aliasing. You will be
able to use this to gain an intuitive understanding of sampling theorems for minimum sampling
rates.
In this lab we are concerned only with the sampling process. It is evident that the choice of
sampling rate is the paramount issue: Too slow means that some details are lost with samples
too far apart. If the sample spacing is too fine, resources are wasted, i.e. storage and
processing time. A suitable balance between these considerations is needed.
You will start with the sampling of some typical signals, then observe the recovery of the
continuous-time signals from sample sequences at various rates. From this you will be able to
discover the link between the minimum sampling rate and bandwidth.
This lab opens the door to gaining an intuitive understanding of the theory and practical issues
underlying sampling.
In Part 1 you set up sampling operations of selected test signals and carry out observations in
the time domain. Next, you investigate the reverse process, recovering the analog signal, and
examine the effect of various sampling rates.
In Part 2 you retrace the time domain investigations of Part 1 with observations in the
frequency domain. This provides a systematic structure for the processes involved and makes
possible intuitive mathematical interpretation. Equipped with this insight, you will be able to
easily formulate criteria for choosing efficient sampling rates.
Pre-requisite work
Question 1
Look up or derive the trigonometric identity for the product of two sines. Express this as a sum.
Confirm that the frequencies in this sum are (f1 + f2) and |(f1 - f2)|, where f1 and f2 are the
input frequencies. Confirm that the output components are of equal magnitudes.
Question 2
Look up or derive the Fourier series of a squarewave of duty ratio other than 50% (25% and 1%
say). Note the sinx/x shaped spectrum envelope. Locate the frequency of the first null of the
envelope for each case and note the relationship with the pulse width.
Now consider the 50% duty ratio case. Comment on the disappearance of the even harmonics.
Question 3
Derive the spectrum of the product of a sinewave and a 1% duty ratio squarewave. You can do
this easily by using superposition with the results in Question 1 and Question 2. For convenience,

make the frequency of the squarewave around five times the sinewave frequency. Plot the
resulting spectrum.
Equipment

Procedure

Experiment
Part 1: through the time domain
In this exercise we observe the sampling of a sinewave. Patch up the model in Figure below.
Figure 1: myDSP patching diagram

ao0 to ANALOG IN;
ai0 to ANALOG IN;
INPUT FILTER to NO.
MODE: “manual gains entry”
Setup the myDSP to implement simple straight through sampling. The settings are shown in
the screenshot below. ‘LOAD myDSP’ when ready.
Figure 2: Screenshot of ‘straight through’ sampling setup on SFP
With the structure set to order equal zero, the input signal will be sampled by the ADC and
directly output by the DAC.
Setup the myDSP SFP to implement a simple sampling, with no delay elements as follows:
Filter structure: DF2;
MODE: manual gain entry
Sampling Freq=10,000 Hz; order 0; tap 0; input scaling=1;
GAINS: unused.
SCOPE: Edge triggered with Ch0 source; Timebase = 1ms/div
FUNCTION GENERATOR: 200 Hz, 1Vpp sine

Figure 3: block diagram for sampling with full width pulses (using one Sample/Hold element)
Increase the input signal frequency while viewing both input and DAC UNFILTERED outputs.
See if you can understand what is happening as you sweep towards at least 5 kHz and beyond.
You will need to change the timebase as required.
Next we consider the recovery of the original analog waveform from the sample train. We will
use a lowpass filter to smooth out the jagged corners of the stepped signal generated with the
Sample/Hold. This has a good chance of succeeding when variations between samples are
“relatively small”. How small ? This is what we are aiming to find out. This type of filtering is
called ‘reconstruction” filtering, eg: to ‘reconstruct’ the original signal from its samples.
Attempt the recovery of the analog signal from the stepped sample train from the
SAMPLE/HOLD by means of the DAC FILTERED output. Display the filter output and observe
the effect of increasing the input signal frequency. Remember that the reconstruction filter -
3dB cutoff bandwidth on the myDSP is fixed at around 3kHz. View both the input and DAC
FILTERED output as you do this. Pay particular attention around the frequencies 3kHz, 5kHz &
10kHz. It will help to view both the DAC FILTERED and DAC UNFILTERED outputs on the
scope at the same time. You don’t need to view the input as you know it is simply a sinewave, with
known frequency set by the FUNCTION GENERATOR. Note down your observations.
Since the sample rate is set by an internal clock signal, we may interchangeably refer to the
sampling rate as a clock rate, and use the unit “Hz” rather than “samples/sec”.
With an input frequency of 1kHz, repeat this for a few other sampling rates, from 10000Hz,
down to 3000Hz, say. Document your readings. From these observations, what is the minimum
sampling rate you consider adequate to allow recovery of the 1khz analog signal without too
much distortion, on the basis of this sampling format (i.e. using the SAMPLE/HOLD function).
The sinusoid has a special role in linear systems. It turns out that the sampling properties of
sinewaves make it possible to establish precise limits for sampling rates. This is developed
thoroughly in Part 2.
Reload the sampling rate to be 10kHz.

Carefully observe the result when the sampling rate is less than two samples per period (e.g the
input frequency is more than 5kHz, for a sample rate of 10kHz). The frequency of the sinewave
recovered at the filter output will have changed (use the filter output as trigger source for the
scope). The recovered signal is not the sinewave at the input of the sampler.

This is easily achieved by slowly decreasing the FREQUENCY setting of the FUNCTION
GENERATOR. Using the “down arrow” to slowly decrement frequency works well.
One way to see how this comes about is to plot the sample points on graph paper and draw a
smooth curve through these points by eye. The new sinewave is called an ‘alias’ of the original.
The effect is known as aliasing. Try this for an input frequency of greater than 5kHz.
Confirm that the sum of the original and alias frequencies = sampling frequency.
Insight into these outcomes is best achieved from a frequency domain perspective.
Part 2: through the frequency domain
Set the FUNCTION GENERATOR frequency to 1 kHz. Reload the myDSP so that it is sampling
at 10 kHz. Stop the SCOPE and run the DSA (DYNAMIC SIGNAL ANALYZER or Spectrum
Analyzer), to view the signals in both the time and frequency domains.
View the myDSP SAMPLE CLK signal with the DSA. As you know from the prerequisite
questions, a squarewave, with 50:50 duty cycle will contain only odd harmonics of its
fundamental frequency. In this case because the duty cycle of SAMPLE CLK is not exactly 50-
50 you will also view the even harmonics of the signal.
Focus on the main harmonics at 10 and 20 kHz. Now move your observation point to the DAC
UNFILTERED output, which is the sampled 1kHz sine wave. As you do so notice the spectrum
change from single harmonics at 10, 20 and 30 kHz to a pair of harmonics at 1 kHz on either
side of these points. Repeat this process a few times until you see it clearly. As well, the
spectrum of the sample signal contains a large component at 1 kHz.

Figure 4: sampling viewed in the frequency domain with the DSA
(You may wish to ‘tune’ the sample rate to be exactly at 10kHz, using the ‘tune Ts’ control,
though it is not essential for this experiment.)
So a sample signal is the original signal PLUS copies of itself, known as aliases or images at
intervals based on the sampling frequency. To recover the original signal we simply need to
eliminate the aliases, and we do this with the reconstruction filter. Since the reconstruction
filter begins to attenuate at 3 kHz it does a good job of rejecting the aliases around 10, 20
kHz etc.
? How much attenuation does the reconstruction filter apply to the signals about 10kHz.
Now try varying the input frequency whilst viewing this sample signal on the spectrum analyser.
Increase the input frequency steadily and watch especially closely as you approach 5 kHz. You
can also view the signal in the time domain at the bottom of the spectrum analyser. By
experimenting with these relationships see if you can understand how the spectrum of the
sample signal comes about. Try going beyond 5kHz, and see if you can explain the result.
Satisfy yourself that each of these sinewave components can be considered as being separately
multiplied by the sampler input. Thus, by focusing on just one Fourier component of the
squarewave pulse train in turn, we are able to build the array of line pairs of the form observed
earlier, each pair centered at the respective harmonics of the FUNCTION GENERATOR
squarewave frequency. Confirm you understand completely why the spectrum looks like this.

Aliasing and the Nyquist rate
Repeating steps above closely track the position of the input frequency component as well as the
lower frequency component of the first pair of aliases, known as the lower sideband of the first
image. (At this point , for precision, you may wish to tune Fs, so that it is exactly at 10kHz.
Refer to the User Manual for details)
? At what sampling rate does the lower sideband of the first spectrum image become located
at the same frequency as the input sinewave ?
This frequency you have identified is the point at which the false images coincide with the true
input signal making recovery of the true input signal impossible.
Consider how the sampling rate could be decreased further if a filter with tighter transition
band was available. In theory, an ideal “brickwall” filter is needed to achieve ideal results. We
will have to make do with the capabilities of the DAC output filter. Check the myDSP User
Manual to inform yourself about its performance characteristics. You may have noticed that it
was difficult to recover the original input signal even before aliasing did occur for this very
reason.
? Why is it not possible to recover the analog input when the number of samples per cycle of the
input sinewave is less than two?
? What is the minimum sampling rate that allows a filter to be able to recover the original
sinewave signal without any other unwanted components ?

Experiment 5 – Discrete-time structures:
Finite Impulse Response (FIR) filters
You will be able to relate the response of a discrete-time (DT) FIR filter to its transfer
function. You will use the zeros of the transfer function to visualize frequency responses
graphically at a glance, without math. You will be able to use this knowledge to intuitively design
low order discrete-time responses. You will be ready to extend this concept to recursive DT
filters and to higher order applications in later experiments.
DT filters can be implemented with or without the use of feedback. The latter filters are
generally known as nonrecursive or Finite Impulse Response (FIR). Finite Impulse Response
means just what it says: a finite response to an impulse. Not an infinite response. And you
covered ‘impulse responses” in an earlier experiment. Keep a lookout for this concept during the
experiment.
The transfer function of a nonrecursive (no feedback) filter can be expressed as a polynomial.
Since there is no denominator, there are no poles, only zeros, which makes it simpler for getting
started. As with the continuous-time case, you can intuitively predict and track system
responses from the zeros.
Refresher: what’s a ‘zero’ of a polynomial? It’s the value which causes the polynomial to be equal
to 0. In other words it’s one of the roots of the equation (polynomial) that describes the
structure. That’s it ! No big deal.
The absence of feedback is an important advantage in many applications as there is no risk of

unstable behaviour. This is very useful when working with adaptive filters.
Serious practical realizations of FIR filters generally require a large number of delay elements.
The most demanding are the bandpass. However, the notch filter works well as a two-delay FIR
example. We will use this example here to examine the relationship between the frequency
response and the coefficient values through the interpretation of zero positions in the z plane.
Preparation
This preparation provides essential theory needed for the lab work to make sense. This
experiment does not aim to provide all the theory you need to understand this topic, but simply
aims to give you an opportunity to put your understanding attained in lectures and from
textbooks to practice.

+
OUTPUT
b0 b1 b2
INPUT
UNIT UNIT
DELAY DELAY
Figure1: schematic of FIR filter with two unit delays
Prove that a general expression for the magnitude of y/u as a function of z for the structure
shown in figure 1 is as follows:
y/u = H(z) = b0 + b1.z-1 + b2.z-2 = z-2 . [b0. z2 + b1.z + b2 ] (Eqn 1).
For the case b0 = 1, b1 = - 1.3 , b2 = 0.9025, express the quadratic in the brackets in the
factored form (z - z1)(z - z2), where z1 and z2 are the roots. Show that these are given by
z1 = 0.95e j0.260π
z2 = 0.95e -j0.260π (Eqn 2).
Question 1: Graphical plotting of poles & zeros
We are now ready to proceed with a graphical approach for evaluating the factors (z - z1) and (z
- z2) in Eqn 3. Place an "o" on a complex plane (we will refer to this as the z plane) at the
locations corresponding to z1 and z2, as obtained in Eqn 4. With T = 1, we will get an estimate of
|H| at ω = π/5.
Place a dot at the point ejπ/6. Join this point and the point z1 with a straight line. The length of
this line is |(ejπ/5- z1)|.
Do the same with z2 to obtain |(ejπ/5 - z2)|. From Eqn 5, the desired estimate of |H(π/5)| is
simply the product of the lengths of these two lines.
Question 2
By repeating this for other values of ω we are able to get a quick estimate of the graph of |H|
versus ω. It's important to note that the locus of ejTω is a circle of unity radius centered at
the origin (known as the unit circle). Hence, the general shape of the frequency response is
easily estimated by simply running a point counter-clockwise along the circumference of the unit
circle, starting at (1, 0). Note that the idea is just a variant on the procedure introduced in Lab
11, where we moved the frequency point along the j axis
Notice that the presence of the trough in the response can be seen at a glance from the
behaviour of the vector from the "zero" z1 as the dot on the unit circle is moved near z1. By
comparison, the rate of change of the other vector is small over that range.

Equipment

Procedure

Part 1 Notch filter using two-delay FIR:
We will be implementing the 2 element filter in figure “schematic of FIR filter with two unit
delays”
ao0 to ANALOG IN;
ai0 to ANALOG IN;
INPUT FILTER to NO.
Figure 2: patching diagram for ‘analysis’ mode

Setup the myDSP SFP as follows:
MODE: manual gains entry
Structure DF2; Sampling freq=10kHz, order 2; tap 0; input scaling=1.
Coefficients: b0 =1.0; b1 = -1.3; b2 = 0.902
All other coefficients =0;
FUNCTION GENERATOR: 200 Hz; 1Vpp Sinewave
SCOPE: Timebase 4ms; Rising edge trigger on CH0; Trigger level=0V, viewing ANALOG IN &
DAC UNFILTERED signals.
View the input signal on CH0, and output with CH1. Check that the time interval between samples
is consistent with the clock frequency.
Measure and plot the magnitude response over the range 200 Hz to 3kHz using the FUNCTION
GENERATOR. Note that the amplitude measurement could be a little challenging at the upper
frequencies due to reduced number of samples per cycle of the input signal. It is suggested you
vary the timebase appropriately.
Confirm that the response has a deep notch. Notice the gain at frequencies above the notch.
Measure the notch frequency and the depth relative to the response at DC. Also measure the
time delay as a function of frequency at several points of interest.
Using the values of b0, b1, b2 entered, apply the method developed in the preparation section to
plot the zeros of this filter in the z-plane. Check that you have the correct sign of the
coefficients (the zeros should be in the right half-plane). Compare the measured frequency
response with the plot of the zeros. Verify that the measured notch frequency agrees with the
position of the zeros (remember, the frequency at the 180 degree point on the unit circle
corresponds to f_sample/2 = 1/2Ts Hz).
Decrease the b1 gain slightly and observe the effect on the magnitude response. You can view
the theoretical change in response on the myDSP SFP before reloading the values to the
myDSP board. Measure the new notch frequency. Use this to determine the new positions of the
zeros and the corresponding value of b 1. Verify the agreement between measurement and
theory.
Determine and note the new notch frequency, for the b1 gain entered. Based on your
observations, document the relationship between b1 and notch frequency
{b1 changes the notch freq, but not depth}
This time, reduce b2 gain very slightly (order of 2-3%, say) and again, observe the effect on the
magnitude response. The outcome should be a reduced notch depth. Try to determine the
approximate position of the zeros from the notch depth (notch depth relative to DC gain, say).
{b2 affects the notch depth}
Notice the effect of these changes on the Z-plane representation in the SFP, as well as the
derived transfer function display. Make sure you understand these.

Part 2 Using a notch filter to eliminate interference
In the next exercise we use the notch filter to remove an interference tone. Consider this
practical situation: we are trying to receive a message at frequency f1 from a distant
transmitter, but in our neighbourhood there is another transmitter sending an unwanted signal
at frequency f2 affecting our reception of f1.
Keep the myDSP sampling frequency at 10,000Hz but change the values of the b1 coefficient to
create a notch filter with equal gain on either side of the notch.
Set the coefficients to:
Coefficients: b0 =1.0; b1 = 0; b2 = 0.902
Use the FUNCTION GENERATOR as a source of signals f1 ,and f2. Set it to output a
squarewave, 1Vpp at 833Hz. View the FUNCTION GENERATOR signal with the DSA, by setting
the DSA Source Channel to AI 0. Notice that the square wave is actually a series of sinewaves
added together. (This was covered in an earlier experiment, and relates to Fourier series.)
Now view the DAC FILTERED output of the notch filter, by setting the DSA Source Channel to
AI 1. What do you notice at the notch frequency? How good a job does the notch filter do at
that frequency. Take some measurements of the before and after signal magnitudes and relate
these to the notch attenuation you measured earlier. Try to work in dB.
Vary the value of b1 slightly in each direction and notice the affect on the output. Remember
that b1 controls the frequency of the notch. This is a finding from a previous part of this
experiment. Keep an eye on the z-plane display of the zeroes during this process so you can
reinforce your understanding of their relationship to the transfer function and filter
performance. You are exploring using the selectivity of a filter through variation of its transfer
function.
NOTE: To vary the value of a control slightly, set the cursor next to the digit you wish to
vary and then use the UP and DOWN arrow buttons on the control.

Experiment 6 – Poles and zeros in the z plane: IIR systems
You will be able to interpret the poles and zeros of the transfer function of discrete-time
filters to visualize frequency responses graphically at a glance, without math. You will be able to
use this knowledge to intuitively design recursive/IIR discrete-time responses. You will see the
effect of pole-zero placement on system stability.
In a previous experiment, we explored FIR filters. Because zeros only are used in FIR filter
work, this provided a convenient gateway to getting started with z-plane ideas.
In this Lab we will investigate more general DT filters that are characterized with both poles
and zeros. These filters are known as recursive since they use feedback, and also as Infinite
Impulse Response (IIR). With feedback we will be able to realize much higher selectivity than
possible with a comparable complexity FIR implementation. The most conspicuous example is
the second-order resonator, which will open the way to achieving realistic bandpass responses.
Part 1: we examine the behaviour of the basic second-order resonator implemented without
zeros.
Part 2: zeros are introduced to generate lowpass, bandpass, highpass and allpass responses
using the Direct Form 2 structure.
Pre-requisite work:
Show that the transfer function for the system in Fig. 3 is
H_y (z) = y/u = (b0 + b1.z-1 + b2.z-2 ) /(1 + a1.z-1 + a2.z-2 )
Equipment

Procedure

Experiment
Part 1: IIR without feedforward: a second-order resonator
In this part we implement and investigate the system in Fig 3.

ao0 to ANALOG IN;
ai0 to ANALOG IN;
INPUT FILTER to NO.
Settings are as follows:

FUNCTION GENERATOR: 100 Hz Squarewave, 1Vpp with DC offset = 0.5V; DUTY
CYCLE=10%
myDSP settings:
MODE: manual gains entry
Filter DF2, sampling frequency 10kHz, order 2, tap 0, input scaling = 0.2 !!!
Coefficients: a0=1.0; a1=1.6; a2=-0.902; b0=1.0
SCOPE: view both ANALOG IN & DAC UNFILTERED out. Timebase 2ms.
Notice that input scaling = 0.2 (1/5). This filter has a high gain which can easily result in
saturation of the output and clipping of the output signal. By using internal scaling of the input
the system can sample a relatively normal amplitude signal, amplify it internally, and still output
a signal level which will avoid truncation.

Figure 1: impulse response of IIR structure: stable
Begin with a2 at -0.902. Describe the effect on the response (viewed on the SFP) as the
magnitude of a2 reduces ( ie: becomes less negative). Load these new settings into myDSP and
measure the frequency of the oscillatory tail of the response and compare with your previous
observations.
Now increase the magnitude of a2 (i.e. becomes more negative) and pay particular attention to
the position of the poles in the Z plane display. Notice that the magnitude of the peak in the
frequency response increases. When the value of a2 reaches approximately -0.98, load the
myDSP. On the scope you should notice that the ringing on the tail of the impulse response is
larger and the response may be in fact oscillating or approaching oscillation. Notice that the
poles in the Z plane are on or close to the unit circle, approaching the condition for instability.
Push the poles even further, load the myDSP, and see what happens.
When you detect some oscillation, note the exact value of the pole, from the pole indicator at
the bottom of the SFP, and calculate its distance from the centre of the Z plane. It should be
very close to unity, as expected for instability.

Figure 2: impulse response of IIR structure: unstable & oscillating
Part 2 - IIR with feedforward: second-order filters
In this part we implement and investigate the system in Fig 3. Note that the system with
feedforward simply builds upon the previous system with feedback only. It also provides a new
output point. The system response x0 for the feedback only, all-pole system is still available as a
subset within this new arrangement and is unchanged by the additional feedforward elements.
The feedforward elements simply add numerator terms to the overall transfer function which
becomes y/u. Confirm that you understand this.
b0
x0
b1
x1
x2
b2 y
1/Z 1/Z
u
-a
1
-a2
Figure 3: block diagram of 2nd-order Direct-form 2 structure with feedforward.
Settings are as follows:

FUNCTION GENERATOR: 1kHz Sinewave, 1Vpp
myDSP settings:
MODE: coefft to design
Filter DF2, sampling frequency 20kHz, order 2, tap 0, input scaling = 0.02
Coefficients: b0=1; b1=2; b2=1; a0=1; a1=+1.6; a2= -0.902
SCOPE: view both ANALOG IN & DAC UNFILTERED out. Timebase 4ms.
Observation: the high pass band gain due to the selection of coefficients resulting in poles very
close to the unit circle, can be seen in the SFP display. Note that there are 2 overlapping zeroes
at (-1+0i).
NOTE: The poles are very close to the unit circle. In fact, the pole radius is 0.95. Hence the
gain close to the poles is very large. Calculate the radius of the poles for yourself.
NOTE: due to the high gain, we need to internally scale the signal down to avoid saturation of
the output. You will need to multiply your output readings by (1/input scaling) to adjust for this.
Measure the magnitude response |y/u| by sweeping the FUNCTION GENERATOR and confirm
that it is a lowpass filter. You may also use the BODE ANALYSER
Adjust a2 to reduce the peaking to a minimum. Keep the input scaling as you will still have high
gain. Notice the effect of changing a2 on the response.
? Why was a2 used for this rather than a1?
Change the polarity of b1 in the lowpass just used and show that this produces a highpass.
? Can you relate this to the z-plane display as well as the polynomial and explain why this
happens.
Repeat this analysis for b0 = 1, b1 = 0; b2 = -1 ; a0 = 1; a1 =-1.6; a2 =0.902;

? Confirm this is a bandpass filter. Tune a1 to obtain a peak at 5 kHz. Notice the poles and
zeroes position.
Implement the following case: a0 = 1, a1 =b1= 0, a2 = -0.8, b0 = 0.8, b2 = 1. Note that b0=| a2 | and
b1=a1=0. Measure the magnitude response.
? Confirm it is allpass. View the positions of the poles and zeros. Note them in your records.
What use is an allpass ?
Change a1= 1.6 and b1 to - 1.6 and confirm the response is still allpass.
? Examine the behaviour of the phase response. Look for the frequency of most rapid phase
variation, and confirm this occurs near a pole. Plot the poles and zeros in your records.

Ideas for further investigation
Viewing spectrum of system with broadband noise input & FFT
As well as sweeping a single frequency signal from the FUNCTION GENERATOR across the
spectrum of interest it is also convenient to input a broad range of frequencies at once and view
the overall output frequency response of the system. Creating a broadband analog noise signal
can be done in LabVIEW and output to ao0 for use in this exercise. The programming involved is
not covered in this manual, however using DAQ Assistant, and some noise function blocks, this is
easily accomplished.
HINT: pay attention to your signal levels…keep them below 1Vpp, and use scaling. Also,
remember to use the INPUT FILTER for anti-aliasing, as your noise will be broadband. Try
band-limiting the signal in LabVIEW before outputting it also. Do as much processing of the
signal in LabVIEW before outputting as required.

Experiment 7 – Designing filters from specification to
implementation with LabVIEW
You will gain familiarity with the terms used in filter design, specifications, and see their
conversion into implementation. Using software filter design tools to bypass manual calculation.
A conversation comes to mind with a professor who asked his students to “design” a system of
filtering for a specific and challenging application using simulation tools. One student came back
to the professor and proudly claimed to have completed the task in one single filter. Upon being
asked what order his filter was he stated that it was order 240 th. The professor congratulated
the student and awarded him 50% of the total marks for this effort. He then told the student
that he would get the other 50% once he had built this filter from passive components and
analog op-amp circuits (which is what was required for this project) … a task that was impossible
to accomplish.
Although it is easy enough to just keep increasing the order of a filter to make it meet the
requirements, the previous experiments in this manual have aimed to clarify some of the issues
relating to the implementation of filters, even when using DSP technology rather than discrete
components.
In this experiment keep in mind issues such as sensitivity, dynamic range, sampling rate and
optimal placement of poles and zeroes in the designs you investigate.
Equipment

Procedure


Experiment

ao0 to ANALOG IN;
ai0 to ANALOG IN;
INPUT FILTER to NO.
Figure 1: myDSP board patched in ‘analysis’ mode
In previous experiments you have operated the myDSP SFP in the “ manual gains entry” mode,
whereby the filter design and response is displayed from the gain values entered manually. In
this experiment you’ll switch to the “filter design to gain” mode whereby the filter is specified
by its filter type design method pass band and stop band and ripple specifications.
Switch the MODE tab to “filter design to gains” position.
WARNING: if you enter illegal specifications the program will issue a warning and give you an
opportunity to correct the entry. For example, with a low pass filter if the stop band frequency
is less than the pass band frequency this will be considered as illegal entries.
On start up the myDSP SFP will load a simple 4th order Butterworth lowpass filter. Try
reducing the stop band frequency from 2000 Hz in gradual steps of 100 Hz, and notice as you do
so that the filter order changes and the transfer function becomes increasingly complicated.
Remembering that the myDSP board can only implement filters up to and including 10th order,
when you are ready, press the “EXTRACT HARDWARE GAINS” button to load the coefficients
from the transfer function to the HARDWARE GAINS boxes ready for loading to the
hardware. Press “DOWNLOAD to myDSP”, launch the BODE ANALYSER and then run a BODE
plot of the filter you have “designed”.

Remember that after extracting the gains you can manually edit them if required and the
magnitude response displays will change in real time to reflect your edits. In this way you can
increase your understanding of the relationship between the transfer function and the filter
design.
Change the design method of the filter and use the myDSP SFP to explore different filter
designs. In particular notice how certain design methods require a lower number of polls and
zeros to achieve the same design specifications. These issues are discussed in the textbooks
relating to filter design.
For example, you may have a real application where some noise from 60 Hz power line is entering
your system and second harmonic of that noise, at 120 Hz is creating some interference with
your design. Using these filter design tools you can specify a bandstop response at around 120
Hz with the required attenuation, within the limits of your hardware’s capability, view the
response, extract the gains and implement the filter on the myDSP board.
Figure 2: 120 Hz bandstop filter
Designing filters from gain values extracted from the polynomial coefficients
Switch the MODE tab to “manual gains entry” position.
In a previous experiment investigated the instability caused by placing poles to close to the unit
circle. In this example below you can see a simple second order system with the output is
constantly oscillating.

Figure 3: system oscillating with poles too close to the unit circle
Following are some examples of interesting filters mentioned in various textbooks. You may wish
to design and implement a filter to suit a particular application or project you are building.

This next filter is a Notch filter which is taken from an example in the textbook “ Engineering
Signals and Systems” by Ulaby & Yagle, NTS Press. By viewing equation 8.15, we can easily
convert the coefficient values of the polynomial to the equivalent hardware gains for our IIR
structure. In the screenshot below, you can see the transfer function resulting from the
hardware gains entered.
Figure 4: 2nd order notch filter

In a further example from the same textbook , “Engineering Signals and Systems” by Ulaby &
Yagle, NTS Press. “,that is equation 8.28, we see the polynomial for a comb filter design. This
happens to be a sixth order design, and again by converting the coefficient values to the
corresponding hardware gains, and loading these to the myDSP board we are able to implement
this comb filter and used the BODE analyser to view its spectrum response.
Figure 5: 6th order comb filter
Try manually adjusting the poles and zeroes, and see what effect disrupting the symmetry has
on the filter transfer function and consequentially the filter response.
Textbooks are full of such similar examples and you are encouraged to experiment by
implementing the filters described by their polynomial in the textbooks.

Experiment 8 – Configuring myDSP from your own LabVIEW code
You will gain familiarity with the insertion of the myDSP API code into an open VI, so as to see
how you could create your own custom filter configuration SFP.
Having used the supplied myDSP SFP as an .EXE up until now, you have gained experience in how
a filter is designed from mathematics without getting involved in LabVIEW coding. These
calculations are very difficult and time consuming and so using the VI’s available in the Digital
Filter Design toolkit are very convenient and in most cases, essential. There are many designs
possible with these VI’s, and ultimately, the hardware is only interested in the hardware
“implementation gains” which will be loaded to the processing hardware. These “gains” are
related to the polynomial co-efficients of the system being designed.
In this experiment you will use an example where alternative sets of hardware gains and other
parameters are loaded directly into the myDSP processor hardware. This simple example aims to
encourage you to add to it and so build the front end code you need for your own application. It
exposes you to the myDSP API blocks.
Equipment
 PC with LabVIEW 2012 (or higher) software. Runtime only is not enough.

Procedure


Experiment

ao0 to ANALOG IN;
ai0 to ANALOG IN;
INPUT FILTER to NO.
Figure 1: myDSP board patched in ‘analysis’ mode
This code is written in LabVIEW 2012 and so you will need LabVIEW 2012 or later to run this
experiment.
Run the VI “ myDSP_direct_load_example.vi” which will look as shown below.
Figure 2: myDSP direct load example SFP

Below in Figure 3 is the block diagram for this front panel.
Before the loop are two blocks to (i) detect the myDAQ and (ii) to initialize the myDAQ lines
needed for the myDSP. myDSP uses the digital lines ony for its configuration. Other myDAQ
lines are available for the application.
Inside the loop is an EVENT function simply to detect the pressing of the “DOWNLOAD to
myDSP” button on the front panel.
You can see two sets of parameters: B gains array, A gains array, Sampling Freq, Order, Filter
Structure, input scaling, tune Ts and tap select. One of these sets is selected and passed to the
“myDSP Write” block (highlighted in Figure 3). This block completes the formatting ofthe
parameter data and transmission of this data to the myDSP hardware via the digital lines.
Figure 3: myDSP direct load example block diagram
The outputs from this block are:

(i) progress: not used
(ii) Samp period: actual sampling period used
(iii) Tap label: label of tap selected, for display purposes
Inside the “myDSP Write” block you can see a DAQmx Write block inside a FOR loop which
handles the digital lines for transmission.
Stopping the VI using the STOP button will close the DAQmx connection by calling the “myDSP
clear connection” vi, before ending the program.

Using the example program
Each set of parameters prescribes a filter. A lowpass filter and a bandpass filter, both 4 th
order as shown below.
Figure 4: 4th order lowpass filter design
Figure 5: 4th order bandpass filter design
These parameters were derived using the myDSP SFP (shown in Figure 4 & 5) and manually
entered into the “direct load” program in this experiment.
Run the “direct load” program and “download” a filter to the myDSP. Then use the BODE
ANALYSER to confirm that it has loaded and is performing as expected.

Ideas for further investigation
1) After referring to the myDSP SFP for specific values, try varying the values of the
parameters so as to specify a different filter. A simple change is to vary the Sampling
Frequency. Try this and see the effect. Confirm you understand why this is. Restartign
the VI will reload the default values so you don’t need to worry about re-entering them.
2) Try and modify this code so that multiple filters are selected via a radio button on the
front panel, rather than a simple switch.
3) Familiarise yourself with functions available in the Digital Filter Design toolkit and
starting from a filter design specification, as per the myDSP SFP, write code to derive
the hardware gains, from the co-efficients of the polynomial, and pass those to the
myDSP as shown above.
Figure 6: Digital Filter Design toolkit blocks
You can also display the filter responses easily using the DFD toolkit blocks.
Make sure you read Appendix B, relating to the subtle difference between the
polynomial co-efficients and the hardware gains for the denominator.
4) Implement the tutorial VI “EMONA myDSP Audio in-out Spectrum monitor_b_LV2012”

in hardware as shown in the tutorial, and then use it to view the effects of the “direct
load” program at the same time as playing music through various filters. In Figure 7
below, you can see the resulting spectrum of music played through a narrow bandpass
filter of Figure 5 above. Listening to it is very interesting and helps to reinforce the
principles covered in this experiment manual.

Figure 7: Tutorial program running with 4th order BANDPASS filter loaded
using “direct load” example VI

Appendix A: Math relating to pole-zero based graphical response estimation
Figure 1: Notes on the graphical interpretation of pole-zero plots

Reviewing the finding of roots of the quadratic polynomial
From equation 1 above

x0(nT) = u[nT] - a1.x1(nT) - a2.x2(nT) substituting x1=x0.z-1 and x2=x0.z-1.z-1 we arrive at
x0 = u –a1x0/z1 – a2x0/z2
Grouping x0 terms:
x0(1 + a1/z1 + a2/z2) = u
At this point we can see that although we started with negative gains in the circuit model, we now
have positive values as coefficients in the quadratic equation.
Further, we arrive at:

x0/u = z2/(z2 + a1z1 + a2) which we earlier named Eqn 3.
We now have the general quadratic form with positive coefficients.
INSIGHT: positive coefficients result in negative gains in the actual implementation
This quadratic (z2 + a1z + a2) can be expressed in factored form, as (z-p1)(z-p2)
Remember that z, p1 & p2 are complex numbers. You can think of these as vectors: from the origin of
the z plane to a 2 dimensional point on that plane.
Each factor ie: (z-p1) and (z-p2) is a difference vector between a general point z, who’s locus we
restrain to the unit circle, and the 2 specific roots p1 & p2. It will be a vector, having direction and
magnitude, and can be expressed in polar notation as r⁄θ, or re jθ, or in Cartesian notation as (a + ib).
Both these representation are complex numbers.
If we define p1 as (σ + iw) and its conjugate, p2 as (σ – iw) we can express the quadratic factors as:
(z- p1)(z- *p1) = z2 + p.*p – pz – *pz
Switching to polar notation for convenience, p.*p = rejθ. re-jθ = r2
So that leaves z2 + r2 –z.(p + *p), and if using Cartesian notation in this instance for convenience, ie. p
= σ + jw then p + *p = 2σ so
z2 +(-2 σ)z + r2 = z2 -2 σ z + r2 = z2 +a1z + a2
Relating coefficients gives a1 = -2σ and a2 = r2
For stability the poles must always be inside the unit circle, hence 0 < a2 < 1
Changes in a1 directly influence the real component of the pole position

a2 has a square law relationship with r of the pole.
Other relationships, such as θ, w, imag part, can be derived from these easily with trigonometry.
The general solution for the roots of the quadratic polynomial x 2 + a1x + a2 is:
x = -a1/2 +/- i√[a2-(a1/2)2]
With these equations in mind consider how changes in the coefficients from the math will move the
poles or zeros about the unit circle, and influence the response of the system.
This lab aims to make you more familiar of the interrelationships between these parameters.

Appendix B: Calculations relating polynomial coefficients to
DF structure implementation (hardware) gains
You should have noticed that the denominator coefficients of the transfer function are the
negative of the HARDWARE GAINS a1-a10, whereas the numerator coefficents are the same as
the HARDWARE GAINS b1-b10. Why is this so ?
Let us do the math for a simple second order section. We are only interested in the denominator
section, which relates to the poles.
Imagine a second order system with 2 poles, z0 and z0*. It is a 2 nd order feedback system.
Its polynomial is:
H(z) = (z-z0).(z-z0*) where z0=a + ib, and z0* = a-ib (its conjugate)
So
H(z) = z2 – z0.z – z0*.z = z0.z0*
Since z0 + z0* = 2 Re(z0) and z0.z0* = |z0|2 then

H(z) = z2 -2.Re(z0).z + |z0|2
Note that -2Re(z0) is always <= 0, and |z0|2 is always >= 0

Let us call -2Re(z0) = a1 and |z0|2 = a2
Looking at the implementation of this polynomial we have this diagram:
Figure 1: Implementation of a 2nd order feedback system
u = x + h.u/z + g.u/z2 and y = u/z2 so u = yz2
Substituting for u we get

yz2 = x + hyz + gy
y(z2 – hz –g) = x
y/x = H(z) = 1/(z2 –hz - g)
Relating the implementation to the general polynomial gives

z2 –hz - g = z2 + a1z + a2
So the implementation of the polynomial uses the negated value of the coefficients.

EXPERIMENT MANUAL
Introductory DSP Experiments with EMONA myDSP for NI myDAQ
Published by Emona Instruments Pty Ltd
For software updates experiments and FAQ support,

go to www.myEmona.com"
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EXPERIMENT MANUAL

Introductory DSP Experiments with EMONA myDSP

Instruments www.my .com

Author: Carlo Manfredini B.E.(Hons.), B.F.A.

Issue Number: 2.1

For licensing information, please contact Emona TIMS Pty Ltd.

EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com 2

An introduction to the NI myDAQ instruments D-01

An introduction to the EMONA myDSP board D-02

Special signals – Impulse and step responses D-03

Sampling, Aliasing & Nyquist D-04

Discrete-time filters with FIR systems D-05

Poles and zeros in the z plane with IIR systems D-06

Designing filters from specifications to implementation

Configuring myDSP from your own LabVIEW code D-08

Appendix A: Math relating to pole-zero based graphical

Appendix B: Calculations relating polynomials coefficients

3 EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com

EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com 4

ESD Warning – ESD Sensitive Product

Unpacking, Transporting, and Storage

Handling and Setup

5 EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com

ESD Prevention Measures

• Perform all work at an approved work station.

Before removing myDSP™ from the NI myDAQ

Electrostatic Discharge Sensitive Product

CAUTION: The inputs/outputs of this product can be damaged if subjected to

EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com 6

Welcome to the EMONA myDSP Quickstart guide.

1) INSERTION & POWER UP

a) Please ensure that the myDAQ is unplugged and powered OFF.

NOTE THAT myDSP IS NOT HOTSWAPPABLE.

Patching connections for myDSP inputs & outputs:

Figure 1: patching diagram for ‘analysis’ mode

e) Plug-in the myDAQ to PC via USB cable and power up.

7 EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com

Your myDSP is now working and ready for use.

2) DOWNLOADING PROGRAM FILES

a) All the latest software and documentation is available online at www.myEMONA.com

Go to www.my .com for downloads and updates

THE REMAINDER OF THIS PAGE IS INTENTIONALLY BLANK

EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com 8

At the same time, there would be very few electronics

Importantly, NI myDAQ has these four essential pieces of

Figure 1: NI myDAQ Instrument Launcher panel

9 EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com

EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com 10

Achievements in this experiment

 NI DAQ and USB cable to suit

Part A – Setting up the NI myDAQ/myDSP bundle

1. Turn off the NI myDAQ unit by unplugging its USB cable

WARNING: DO NOT HOTSWAP THE myDSP BOARD. myDAQ MUST

11 EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com

EMONA myDSP board overview

Figure 1: myDSP board block diagram, showing i/o terminals

EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com 12

13 EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com

Filter Design to Gains mode

Figure 3a: EMONA myDSP Soft Front Panel (SFP);design mode

Filter type: Lowpass, Highpass, Bandpass, Bandstop

Transfer function display

EMONA myDSP Experiment Manual © 2013 Emona Instruments www.myEMONA.com 14