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February 2011
NC7SZ04
TinyLogic® UHS Inverter
Features Description
Ultra-High Speed: tPD 2.4ns (Typical) into 50pF at The NC7SZ04 is a single inverter from Fairchild’s Ultra-
5V VCC High Speed (UHS) series of TinyLogic®. The device is
fabricated with advanced CMOS technology to achieve
High Output Drive: ±24mA at 3V VCC ultra-high speed with high output drive while maintaining
Broad VCC Operating Range: 1.65V to 5.5V low static power dissipation over a broad VCC operating
range. The device is specified to operate over the 1.65V
Matches Performance of LCX when Operated at to 5.5V VCC operating range. The inputs and output are
3.3V VCC high-impedance when VCC is 0V. Inputs tolerate
Power Down High Impedance Inputs/Outputs voltages up to 6V, independent of VCC operating voltage.
Ordering Information
Part Number Top Mark Package Packing Method
NC7SZ04M5X 7Z04 5-Lead SOT23, JEDEC MO-178 1.6mm 3000 Units on Tape & Reel
NC7SZ04P5X Z04 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3000 Units on Tape & Reel
NC7SZ04L6X CC 6-Lead MicroPak™, 1.00mm Wide 5000 Units on Tape & Reel
NC7SZ04FHX CC 6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch 5000 Units on Tape & Reel
IEEC/IEC
Pin Configurations
Figure 2. SC70 and SOT23 (Top View) Figure 3. MicroPak™ (Top Through View)
Pin Definitions
Pin # SC70 / SOT23 Pin # MicroPak™ Name Description
1 1,5 NC No Connect
2 2 A Input
3 3 GND Ground
4 4 Y Output
5 6 VCC Supply Voltage
Function Table
Y= /A
Inputs Output
A Y
L H
H L
H = HIGH Logic Level
L = LOW Logic Level
Note:
3. Input=AC Waveform; tr=tf=1.8ns; PRR=10MHz; Duty Cycle=50%.
Figure 6. ICCD Test Circuit
5 4
B
3.00
2.60
1.70
1.50
2.60
1 2 3
(0.30)
0.50 1.00
0.95 0.30
0.20 C A B
1.90
0.70
SEE DETAIL A
1.30
0.90 1.45 MAX
0.15
0.05 C 0.22
0.08
0.10 C
8°
0°
0.55
0.35
SEATING PLANE
0.60 REF
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Package Designator Tape Section Cavity Number Cavity Status Cover Type Status
Leader (Start End) 125 (Typical) Empty Sealed
M5X Carrier 3000 Filled Sealed
Trailer (Hub End) 75 (Typical) Empty Sealed
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Package Designator Tape Section Cavity Number Cavity Status Cover Type Status
Leader (Start End) 125 (Typical) Empty Sealed
P5X Carrier 3000 Filled Sealed
Trailer (Hub End) 75 (Typical) Empty Sealed
(0.254) (0.49)
1.00
5X
(0.75)
(0.52)
TOP VIEW A 1X
PIN 1 IDENTIFIER
5
0.55MAX (0.30)
PIN 1 6X
0.05 C
0.05 RECOMMENED
0.00
LAND PATTERN
0.05 C
C 0.45
0.10 0.35
0.25 0.00 6X
0.15 6X
DETAIL A 1.0
0.10 C B A
0.05 C 0.40
0.30
0.35 5X
0.25
0.40 5X
0.30 DETAIL A
0.075 X 45 PIN 1 TERMINAL
0.5 CHAMFER
(0.05) (0.13)
6X 4X
BOTTOM VIEW
Notes:
1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD
2. DIMENSIONS ARE IN MILLIMETERS
3. DRAWING CONFORMS TO ASME Y14.5M-1994
4. FILENAME AND REVISION: MAC06AREV4
5. PIN ONE IDENTIFIER IS 2X LENGTH OF ANY
OTHER LINE IN THE MARK CODE LAYOUT.
Figure 9. 6-Lead, MicroPak™, 1.0mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Package Designator Tape Section Cavity Number Cavity Status Cover Type Status
Leader (Start End) 125 (Typical) Empty Sealed
L6X Carrier 5000 Filled Sealed
Trailer (Hub End) 75 (Typical) Empty Sealed
PIN 1
0.66
MIN 250uM
1.00
1X 0.45
6X 0.19
0.05 C
TOP VIEW RECOMMENDED LAND PATTERN
2X
FOR SPACE CONSTRAINED PCB
0.90
0.05 C 0.35
C 0.55MAX
5X 0.52
(0.08) 4X 1X 0.57
0.09
DETAIL A 1 2 3 0.19 6X
0.20 6X
(0.05) 6X
5X 0.35
0.25 0.60
6 5 4 0.10 C B A
0.35 (0.08) 0.40
.05 C 0.30
4X
BOTTOM VIEW
NOTES:
A. COMPLIES TO JEDEC MO-252 STANDARD
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 0.075X45°
D. LANDPATTERN RECOMMENDATION IS BASED ON FSC CHAMFER DETAIL A
DESIGN. PIN 1 LEAD SCALE: 2X
E. DRAWING FILENAME AND REVISION: MGF06AREV3
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Package Designator Tape Section Cavity Number Cavity Status Cover Type Status
Leader (Start End) 125 (Typical) Empty Sealed
FHX Carrier 5000 Filled Sealed
Trailer (Hub End) 75 (Typical) Empty Sealed
Authorized Distributor
Fairchild Semiconductor:
NC7SZ04P5 NC7SZ04L6X NC7SZ04M5 NC7SZ04M5X NC7SZ04P5X NC7SZ04FHX