A PRACTICAL APPROACH TO EMC EDUCATION AT THE

UNDERGRADUATE LEVEL

Y. Zhao 1 K. Y. See 2

1
School of Electrical and Electronic Engineering, Nanjing Normal University,

Nanjing 210042, China

2
School of Electrical and Electronic Engineering, Nanyang Technology University,

Singapore 639798, Republic of Singapore

Abstract: In view of the importance of electromagnetic compatibility (EMC), universities

worldwide are paying more attention in training electronic engineers with good EMC design

knowledge. As part of the EMC training, a practical printed circuit board (PCB) layout project

has been offered as an elective to the undergraduates in the authors’ universities. The project

requires the students to design the PCB layout of a standard digital circuit twice, first time with

no EMC consideration at all and the second time with careful EMC consideration. The significant

difference in the levels of radiated emissions of the two layouts allows the students to appreciate

the importance of EMC design at early stage of product development.

Key words: university education, electromagnetic compatibility (EMC), printed circuit board

(PCB) design

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I. INTRODUCTION

Due to worldwide trends of imposing EMC regulations on electronic and information technology

products [1-2], EMC education has been gaining more attention than before in the universities [3].

Without some EMC training, the future electronic engineers, when they graduate and enter the

industry, will have to learn the EMC design techniques through the painful trial-and-error process.

The companies that hire these engineers also suffered from higher design cost and unnecessary

production delay, which are crucial surviving factors in today’s competitive markets. Basic

understanding of the electromagnetic interference (EMI) generation mechanism and the

mitigation techniques will help to avoid EMI problems as far as possible at the product design

stage. This is a rational and economical approach when compared to leaving the EMI problems to

be tackled and mitigated after the product is developed and assembled.

In view of the growing importance of EMC education, the IEEE EMC Society has published an

EMC education manual as a guide for universities to introduce EMC design courses at the

undergraduate level [4]. As the scope of EMC is rather wide, it is impossible to conduct too many

EMC design experiments in universities where students are overloaded with many other subjects.

In view of such constraints, the authors have designed a practical EMC design project, entitled

“PCB layout design for EMC compliance“. This project has been offered as an elective to the

undergraduates during the university’s inter-semester vacation for the last five years and it has

received positive feedbacks from the students who completed the project. Instead of looking at all

the design aspects such as crosstalk, signal integrity, etc., the focus of the project is on controlling

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radiated emissions from digital circuit through good PCB layout practices. At the end of the

project, the students are expected to understand the fundamental radiation mechanism from

digital circuit and to apply the correct PCB layout practices in controlling radiated emissions

from the digital circuit.

II. PROJECT DESCRIPTION

A standard digital circuit, as shown in Fig.1, will be given to all the students who have chosen the

project. A 9 V battery powers the digital circuit through a 5 V voltage regulator (RG1). A 10

MHz crystal, together with the inverting buffer (U1A), provides the clock signals to the decade

counter (U2) and the JK flip-flop (U6A). After the divide-by-ten operation, the output of U2 has

a digital signal of 1 MHz, which drives another decade counter (U3) and results in a digital signal

of 100 kHz at the output of U3. The output of U3 is finally terminated with a resistor (R1)

through an inverting buffer (U1D). The output of U6A has a digital signal of 5 MHz because of

its toggle mode operation. It drives two cascaded decade counters (U4 and U5) and results in 500

kHz and 50 kHz digital signals at the outputs of U4 and U5, respectively. Finally, the output of

U5 is terminated with a resistor (R2) via an inverting buffer (U1C). Hence, the various signal

traces of the digital circuit carry digital signals of frequencies 10 MHz, 5 MHz, 1 MHz, 500 kHz,

100 kHz and 50 kHz. The purpose of having the wide-ranging digital signals is to inject some

realism into the project. Also, it is important to let the students know that those signal traces that

carry digital signals of high spectral content, for examples, 10 MHz and 5 MHz, should be given

more attention than other signal traces in their layout on the PCB.

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 Fig. 1 Schematic of the standard digital circuit

Based on the given circuit, the students are asked to route the circuit on a single-layer

double-sided PCB. Each of them will be given two chances to lay the digital circuit on the PCB.

For the first PCB layout, no information on EMC design is given to the students and they have

total freedom to do their own layouts. Once the first layout is completed with all the components

in place, they need to perform a functional check to ensure that all the integrated circuits (ICs)

generate the correct digital signals at their output pins. Next, the digital circuit on the PCB is

powered by a 9 V battery and radiated emissions of the PCB in the frequency range of 30 MHz to

1 GHz are measured using a GTEM (Giga-Hertz Transverse Electromagnetic) based EMI

measurement system. The CISPR 22 Class B limit is imposed as the regulatory EMI requirement

[5]. For the first layout, all the students, without exception, fail to get their PCBs complied with

the CISPR 22 Class B limit.

With their first taste of EMI failure, they begin to realize the importance of EMC consideration at

the early design stage, such as proper PCB layout. It is not the objective of this paper to discuss in

details all the PCB layout guidelines. For interested readers, a comprehensive list of literature on

PCB layout guidelines for EMI control is available [6-7]. The authors feel that understanding the

fundamental concept of EMI radiation mechanism of the digital circuit will benefit the students

more instead of asking them to follow those design rules passed down by experienced engineers.

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In general, the radiation mechanism can be classified as either differential-mode (DM) or

common-mode (CM) in nature [8-9]. All the power-ground and signal-ground loops on the PCB

form unintentional loop antennas and cause DM radiation. These large circuit loops also lead to

significant inductance in the circuit ground and result in large ground bounce between any two

points on the PCB ground conductor. For the given digital circuit, the negative terminal of the 9

V source is the only true zero volt reference. To maintain the so called “equal potential ground’

on the PCB, the ground inductance must be well controlled by keeping the ground return paths

close to their associated power and signal tracks. If there exists a large ground bounce between

the true zero volt reference and any other point on the PCB ground conductor, an attached

conductor to that ground point, for example, the signal ground of an interface cable, will result in

significant level of CM radiation [10-11]. Hence, a good PCB design should control both DM and

CM radiation from a digital circuit. To meet this objective, the students have to pay special

attention to those power-ground and signal-ground loops that carry switching and digital signals

of high spectral content. Once the radiation mechanism of the digital circuit is understood, the

students proceed with their second chance of PCB layout. Without surprise, more than 90 % of

the students manage to get their second layout passed the CISPR 22 Class B limit with good

margin.

III. PCB LAYOUT WITHOUT EMC CONSIDERATION

The first layout is designed without any EMC consideration. Once the component footprints are

finalized, the auto-routing algorithm of the PCB layout software carries out routing of the

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interconnecting tracks automatically. Auto-routing functions of most PCB layout tools usually

take care of the physical aspects such as looking for the most direct and convenient paths

amongst the components, but neglect the EMI control aspect. Because of that, the layout tools

tend to overlook the return current paths for + 5V and signal tracks. One of these typical finished

layouts is given in Fig. 2. The red and blue lines are interconnecting tracks on upper and lower

sides of the PCB, respectively. The 0 V and 9 V terminals are for connection to an external 9 V

battery. All the components are placed on the upper side of the PCB and the brown lines are their

positions. The components, RG1, U1, U2, and U3 etc., are labeled in accordance with the

standard digital circuit given in Fig. 1.

Since currents flow in closed loops, with no EMC consideration, the layout in Fig. 2 creates many

unexpected large +5V-ground and signal-ground loops. Fig. 3a shows that radiated emissions of

the PCB in frequency range 300 – 400 MHz have exceeded the CISPR 22 Class B limit

marginally. To show the possible impact of CM radiation of the PCB, a 30 cm wire is soldered at

the far end PCB ground, directly opposite the 9 V source. Fig. 3b shows the radiated emissions of

the PCB with the attached wire. It indicates clearly that the added CM radiation due to the

attached wire pushes the emissions up significantly and now the highest emission exceeded the

limit by as much as 20 dB. The high CM radiation is due to the large ground bounce on the PCB

ground resulting from poor layout.

Fig. 2 PCB layout without EMC consideration

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Fig. 3 Radiated emissions for PCB layout given in Fig. 2. (a) PCB alone (b) PCB with attached
wire

Another classic misconception of ground implementation on PCB is the single-point or star-point

ground. The purpose of star-point ground is to eliminate common-impedance coupling amongst

the various circuits, which is usually applicable to low frequency operation in the kHz range. Fig.

4 shows one of the finished layouts that adopt the star-point ground. A large conducting patch at

the lower side of the PCB (in blue) is connected to the 9 V reference and surrounds all the six ICs.

All the ground pins of the ICs are connected to the surrounded ground patch with the star-point

pattern. Unfortunately, the layout does not take advantage to route the +5V and signal tracks (in

red) close enough to the large ground patch. Fig. 5a shows the radiated emissions of the PCB.

Comparing with the layout of Fig. 2, this layout fares better with all its emissions below the limit.

However, when the 30 cm wire is connected to the PCB ground, radiated emissions due to CM

radiation mechanism increase substantially with some of these emissions exceeded the limit, as

shown in Fig. 5b. This indicates that by applying the wrong grounding concept without

understanding the rationale behind it will lead to surprising EMI results.

Fig. 4 PCB layout with improper implementation ground plane

Fig. 5 Radiated emissions for PCB layout given in Fig. 4. (a) PCB alone (b) PCB with attached
wire

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IV. PCB LAYOUT WITH EMC CONSIDERATION

The second layout is designed after the students have attended the EMC design course conducted

by the authors. In the course the authors stressed the importance of knowing where are the return

paths for signals and dc power distributions. Once the return paths are identified, they should be

routed as close as possible their corresponding +5V and signal tracks. To ensure that both the

+5V and signal tracks have tightly coupled return paths, careful planning of PCB ground on the

PCB becomes crucial. One of the best layouts is shown in Fig. 6. It reserves almost the complete

copper at the lower side of the PCB (in blue) as a ground plane. With this ground plane, all +5V

tracks (in red) at the upper side and signal tracks (thin lines in blue) at the lower side are kept

very close to their associated return paths. Fig. 7a and 7a show the radiated emissions for the

PCB alone and the PCB with the 30 cm attached wire, respectively. Not only the emissions for

PCB alone are too low to be measured, even the CM radiation due to the attached wire has been

suppressed completely.

Fig. 6 PCB layout with EMC consideration

Fig. 7 Radiated emissions for PCB layout given in Fig. 6. (a) PCB alone (b) PCB with attached
wire

V. CONCLUSIONS

A practical PCB layout project has been designed for the purpose of EMC education at the

undergraduate level. As the scope of EMC design is rather wide, the project only focuses on

controlling radiated emissions from PCB with good layout practices. By giving the students two

chances to do their PCB layouts, the authors have emulated a design review process similar to

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that in the industrial environment. The significant difference in radiated emission results for PCB

layouts with and without EMC consideration has proven to be the most effective way to show the

students the importance of EMC design. As all digital circuit modules come with interfacing

ports, EMC design should not only restrict to controlling DM radiation from the PCB alone, but

also the CM radiation due to attached interface cabling. In this project, the students have been

taught the radiation mechanism, both DM and CM, from the digital circuit on the PCB. Once they

understand the radiation mechanism, they will challenge the validity of specific design rules used

in the past rather than adopt these rules without knowing the rationale behind them. The practical

approach adopted in this project has achieved its objective to train better electronic engineers for

the industry.

REFERENCE

[1] FCC title 47, parts 15, 18 and 68 of US code of federal regulation, Federal

Communication Committee, Washington DC, USA.

[2] 89/336/EEC Council Directive, On the Approximation of Laws of Member States

Relating to Electromagnetic Compatibility, Official Journal of European Communities,

May, 1989.

[3] Paul, C. R., “Establishment of a university course in electromagnetic compatibility

(EMC),” IEEE Transactions on Education, vol. TE-33, no.1, pp. 111-118, Feb. 1990.

[4] EMC Education Manual, Education Committee, IEEE EMC Society, July 1992.

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[5] IEC CISPR 22: 1997, Information Technology Equipment – Radio Disturbance

Characteristics – Limits and Methods of Measurement.

[6] Gravelle, L. B. and Wilson, P. F., “EMI/EMC in printed circuit boards – a literature

review,” IEEE Transactions on Electromagnetic Compatibility, vol. EMC-34, no. 2, pp.

109-116, May 1992.

[7] Montrose, M. I., EMC and the Printed Circuit Board: Design, Theory and Layout Made

Easy, New York: IEEE Press, 1998.

[8] Paul, C. R., Introduction to Electromagnetic Compatibility, New York: John Wiley &

Sons, 1992, pp. 401-428.

[9] Ott, H. W., Noise Reduction Techniques in Electronic Systems, 2d ed. Singapore: John

Wiley & Sons, 1989, pp. 298-321.

[10] Paul, C. R., “A comparison of the contribution of common-mode and differential-mode

currents in radiated emission”, IEEE Transactions on Electromagnetic Compatibility,

vol. EMC-31, no. 2, pp. 189-193, May 1989.

[11] Hockanson, D. M., Drewniak, J. L., Hubing, T. H., Vandoren, T. P., Sha, F. and Wilhelm,

M. J., “Investigation of fundamental mechanisms driving common-mode radiation from

printed circuit boards with attached cables,” IEEE Transactions on Electromagnetic

Compatibility, vol. EMC-38, no. 4, pp. 557-566, Nov. 1996.

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 Fig.1 Schematic of the standard digital circuit

9V

0V

Upper side Lower side Component

Fig.2 PCB layout without EMC consideration

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 (a)

(b)

Fig. 3 Radiated emissions for PCB layout given in Fig. 2

(a) PCB alone (b) PCB with attached wire

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0V
9V

Upper side Lower side Component

Fig. 4 PCB layout with improper implementation ground plane

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 (a)

(b)

Fig. 5 Radiated emissions for PCB layout given in Fig. 4

(a) PCB alone (b) PCB with attached wire

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0V

9V

Upper side Lower side Component

Fig. 6 PCB layout with EMC consideration

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 (a)

(b)

Fig. 7 Radiated emissions for PCB layout given in Fig. 6

(a) PCB alone (b) PCB with attached wire

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