IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO.

2, FEBRUARY 2014 841

A Half-Bridge LLC Resonant Converter Adopting

Boost PWM Control Scheme for Hold-Up
State Operation
In-Ho Cho, Student Member, IEEE, Young-Do Kim, Student Member, IEEE, and Gun-Woo Moon∗ , Member, IEEE

Abstract—This paper presents a half-bridge LLC resonant con-

verter having a boost pulse width modulation (PWM) converter
characteristic for hold-up state operation. The proposed converter
is based on a half-bridge LLC resonant converter structure and a
single auxiliary switch is added at the primary side. The converter
has two different operational characteristics. It shows the same op-
erational characteristic with the conventional LLC resonant con-
verters during nominal state, which is frequency modulation (FM)
method. However, when ac line lost and the converter enters into
the hold-up time state, which requires wide voltage gain changes, Fig. 1. Block diagram of two-stage ac/dc converter.
the control method of the proposed converter is changed to the
PWM method using the auxiliary switch. Since the proposed con-
verter compensates wide voltage gain variation with PWM method NP , NS Transformer primary turns and secondary
of the auxiliary switch rather than adopting the FM method of turns.
main switches, the frequency variation range for the LLC resonant n Turn ratio of transformer, NP /NS .
converter is highly reduced in the proposed converter. Therefore, V S , VO Input voltage and output voltage.
the transformer in the proposed converter can be designed at the
Vpri , VLm Magnetizing inductor voltage.
optimal operating point and it results in decreased conduction loss
of the magnetizing inductor current. Furthermore, the maximum VCr , VLr Resonant capacitor and resonant inductor
voltage gain of the proposed converter is easily increased by ex- voltage.
tending the duty ratio of the auxiliary switch. It helps to decrease VQ a Auxiliary switch voltage.
the link capacitance. To verify the effectiveness of the proposed Ipri Primary side current.
circuit, operational principle will be explained and experimental
ILr Resonant inductor current.
results will be presented with following specification. 100 kHz of
switching frequency, 250–400 V of input voltage range, 250 V of ILm Magnetizing inductor current.
output voltage, and 75 W output power. IQ a Auxiliary switch current.
Irect Current flows to the load.
Index Terms—Boost PWM control and zero voltage switching
(ZVS), hold-up time, LLC resonant converter. COSS Output capacitance of switch.
Clink Input link capacitor.
DQ a Duty ratio of the auxiliary switch.
NOMENCLATURE Fr , FS Resonant frequency and switching frequency.
M1 , M2 Main switches. K Lm /Lr .
Qa Auxiliary switch. tdead Dead time of gate signals.
D1 , D2 , D3 , D4 Rectifier diodes. PO Output power.
Cr , Lr Resonant capacitor and resonant inductor. Vnom , Vm in Nominal and minimum input voltage.
Lm Magnetizing inductor of transformer.
Clink Link capacitor. I. INTRODUCTION
CO , RO Output capacitor and output resistor. N recent years, considerable researches have been performed
I for ac/dc converters to increase the power density and to im-
prove the efficiency. These researches are mainly focused on
two-stage type ac/dc converter which includes a power-factor-
Manuscript received November 8, 2012; revised January 8, 2013 and March correction (PFC) stage besides output regulation circuit. Fig. 1
24, 2013; accepted March 30, 2013. Date of current version August 20, 2013.
Recommended for publication by Associate Editor K. Ngo. shows the structure of two-stage ac/dc converter. The PFC stage
I.-H. Cho is with LG Electronics, Seoul 150-721, Korea (e-mail: ihnara@ is used to achieve unity power factor of the system and galvanic
angel.kaist.ac.kr). isolation and output voltage regulation characteristics are sat-
Y.-D. Kim is with Samsung Electro-Mechanics Company, Gyeonggi-Do 443-
743, Korea (e-mail: nemind@angel.kaist.ac.kr). isfied by the dc/dc stage. In these two parts, the dc/dc stage is
∗ G.-W. Moon is with the Department of Electrical Engineering, KAIST, regarded as the more critical part to improve the efficiency of the
Daejeon 305-701, Korea (e-mail: gwmoon@ee.kaist.ac.kr). system, because it converts high voltage input into variable load
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. voltage/current output, which results in a significant power loss.
Digital Object Identifier 10.1109/TPEL.2013.2257863 Furthermore, some specifications require that the system should
0885-8993 © 2013 IEEE
842
Fig. 2. Input voltage variation of dc/dc converter.
maintain output voltage for a certain amount of time after loss
of ac line voltage, called hold-up time (see Fig. 2), which make
dc/dc converters have limited efficiency and low power density.
The hold-up time period is varied depends on specifications,
from a few milliseconds to dozens of milliseconds. During this
time, a dc/dc converter is powered by the stored energy in link
capacitors, so that the dc/dc converter should be designed to be
able to compensate the wide input voltage range.
Many approaches have been suggested for a high efficient
dc/dc converter [1]–[9]. Among these approaches, LLC resonant
converter [9] is chosen as the most promising candidate in low-
power application, due to the zero voltage switching (ZVS)
characteristic for the primary switches and no reverse-recovery
problem for the rectifier diodes.
An LLC resonant converter shows the maximum efficiency
in the nominal condition, when the converter is operated at the
resonant frequency. However, the switching frequency becomes
reduced and growing apart from the resonant switching point
as the input voltage decreases. This frequency change becomes
a considerable issue under a wide input variation condition.
It makes LLC resonant converters have difficulty in magnetic
design, and it also decreases nominal efficiency of the convert-
ers. Furthermore, output voltage in the converter is not well
regulated using the conventional dc gain equation of LLC con-
verters because the converter is affected by harmonics when
it is operated out of the resonant point. The dc conversion ra-
tio of a conventional LLC resonant converter is represented as
follows [9]–[11]:
VO 1 age gain is achieved using this method while maintaining high
=   
VS  2 2  
2
2n 1+ K1 1 − FF rs + FF rs − Fr
Fs
π2
8n 2
 √ (1)
where Q = Lr /Cr (1/RO ) , Fr = 1/2π Lr Cr , and K =
Lm /Lr .
A number of different methods have been proposed to over-
come this drawback of the LLC resonant converter [12]–[14].
Modulating transformer secondary turns is suggested in Fig. 3
[12]. By increasing secondary turns during hold-up time, the
converter makes higher voltage gain than the conventional LLC
converter, and it results in reduction of frequency variation
range. However, additional transformer windings increase the
transformer size, and an additional diode and a switch make the
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 2, FEBRUARY 2014
Fig. 3. An LLC resonant converter using various transformer turn ratios.
Fig. 4. An LLC resonant converter with a secondary auxiliary circuit for hold-
up time.
Fig. 5. Asymmetric PWM control scheme during hold-up time for an LLC
resonant converter.
converter have low power density and increased circuit complex-
ity. Boosting-up primary current is another method proposed in
Fig. 4 [13]. The converter applies zero voltage to the trans-
former using the secondary auxiliary circuit and the primary
current is build up during this period. Although higher voltage
gain characteristic can be achieved with this method, the pro-
posed converter requires many bulk components. Asymmetric
PWM control scheme is proposed in Fig. 5 [14]. This method in-
creases voltage gain without using any additional components,
but with changing control scheme from frequency modulation
(FM) to PWM control for the hold-up time operation. High volt-
power density characteristic. However, the gain variation range
is limited in the converter (see Fig. 6) and the maximum gain
Q
is determined by the resonant tank design. Also, the dc offset
current of the magnetizing inductor increases the transformer
size.
In this paper, a new half-bridge (HB) LLC resonant converter
having wide gain variation characteristic is proposed. The pro-
posed converter is operated at the resonant frequency, which is
the maximum efficiency point of the HB LLC resonant converter,
during nominal state and the converter shows boost PWM con-
verter operation to increase the voltage gain with an auxiliary
switch during hold-up state. The input energy is build up while
the auxiliary switch is conducted and it is transferred to the sec-
ondary side for the last period. Since switching frequency is not
CHO et al.: HALF-BRIDGE LLC RESONANT CONVERTER ADOPTING BOOST PWM CONTROL SCHEME 843

Fig. 6. Gain characteristic of the Asymmetric PWM Control (APWM) LLC

Converter adopting the APWM control method.

Fig. 8. Key operations of the proposed converter. (a) Nominal state operation.
(b) Hold-up state operation.

Fig. 7. Schematic diagram of the proposed converter.

widely varied in the proposed converter operation, the converter

can be designed with the optimal operating point. Also, the size
of link capacitors can be reduced in the converter. To verify the
advantages, theoretical analysis and experimental results of the
proposed converter will be presented with 75 W prototype.

II. FEATURES OF THE PROPOSED CONVERTER

The circuit diagram of the proposed converter is represented
in Fig. 7. It is based on the conventional HB LLC resonant con-
verter and an auxiliary switch is added to the primary side of the
converter. Fig. 8 shows the key operations of the proposed con-
verter for the nominal state and for the hold-up state. In nominal
state, the proposed converter is operated just the same as the
conventional LLC resonant converter operated at the resonant
switching frequency. The soft switching condition is naturally
realized and no unnecessary conduction loss is appeared in this Fig. 9. Key waveforms of the proposed converter.
operation. Therefore, the maximum efficiency is showed with
the proposed converter during nominal state. When the converter
enters into the hold-up state, the converter increases the volt- III. OPERATIONAL PRINCIPLES
age gain using the auxiliary switch Qa . The resonant inductor Operations of the proposed converter are analyzed in this sec-
current is build up, while the auxiliary switch is conducted and tion. The operational principle for the nominal sate is the same
it is transferred to load during off-state of the auxiliary switch. with that of the conventional LLC resonant converter operated at
Therefore, higher voltage gain is easily achieved in the proposed resonant frequency [9]–[14]. Thus, only the operation for hold-
converter by increasing the duty ratio of Qa . The operational up time is explained in this section. For the convenience of the
characteristic is similar to the boost PWM operation. mode analysis, several assumptions are made as follows:
844
Fig. 10. Equivalent circuit of the proposed converter in hold-up state.
1) the converter is operated in the steady state;
2) the switches M1 , M2 , and Qa are ideal components except
for their output capacitances and body diodes;
3) the diodes D1 −D4 are ideal components;
4) the windings of the transformer are well coupled so that
the leakage inductance is negligible;
5) the output voltage is constant;
6) the turn ratios of the transformer is expressed as n (n =
NP /NS );
7) the resonant capacitance is very high, so that VCr is re-
garded as constant value.
Each switching cycle can be divided into six modes t0 ∼t6
for hold-up state operation. The operating waveforms and the
equivalent circuits are represented in Figs. 9 and 10.
A. Mode 1 (t0 −t1 ) : The switch M1 is conducted in this mode
and resonant inductor current ILr resonates with Cr and “Lm +
Lr .” The secondary side is disconnected from the primary side
and output energy is supplied with the output capacitor.
B. Mode 2 (t1 −t2 ) : As M1 is turned OFF, the parasitic
capacitors of M1 and M2 start to be charged and discharged,
respectively, in a resonant manner. Since the large magnetizing
inductor energy is participated in this resonance, ZVS condition
of M2 is easily achieved.
C. Mode 3 (t2 −t3 ): Qa and M2 is turned ON at t2 . HB
capacitor voltage VCr is applied to the resonant inductor Lr and
resonant inductor current is linearly increased in this mode. It is
expressed as follows:
ΔILr = (VC r /Lr ) × DQ a × T.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 2, FEBRUARY 2014
D. Mode 4 (t3 −t4 ): After the Qa switch is turned OFF, the
built-up resonant inductor current is transferred to the load side.
Reflected output voltage is applied to magnetizing inductance
of the transformer and negative voltage, “VC r −(NP /NS )VO ,”
is found at the resonant inductor Lr . Therefore, the resonant
inductor current decreases in this mode.
E. Mode 5 (t4 −t5 ) : When the resonant inductor current
reaches the magnetizing inductor current, ILm , the secondary
side is disconnected from the primary side and resonance be-
tween Cr and “Lm + Lr ” appears in the converter.
F. Mode 6 (t5 −t6 ) : M2 is turned OFF at t5 and the primary
current flows through the body diode of M2 .
IV. ANALYSIS AND DESIGN CONSIDERATION
In this section, key characteristics and design considerations
of the proposed converter are presented and compared with the
conventional LLC resonant converter. Generally, high capaci-
tance design for a resonant capacitor and low inductance design
for a resonant inductor are preferred in conventional LLC res-
onant converters for high power density and high efficiency, so
that the capacitor voltage VC r is regarded as a constant value in
this analysis for an easier understanding of the proposed con-
verter. Also the magnetizing inductor current, ILm , is considered
as a constant value in this analysis during the switching period
because the magnetizing inductor Lm is normally designed to
have very high inductance value compared to Lr , so that the cur-
rent variation of ILm is neglected in conventional LLC converter
(2) operation.
CHO et al.: HALF-BRIDGE LLC RESONANT CONVERTER ADOPTING BOOST PWM CONTROL SCHEME 845

Fig. 11. Simplified key waveforms of the proposed converter.

A. Voltage on the Resonant Capacitor Fig. 12. Dc conversion ratio during nominal period (at 75 W Specification).
The voltage applied to the resonant capacitor VC r is used to
derive the dc conversion ratio and current stress of the proposed At nominal state when the converter has fixed input voltage
converter, and VC r can be achieved by using the simplified key condition, the proposed converter is operated at the resonant
waveforms (see Fig. 11). frequency Fr , and the switching frequency is ideally fixed to
Since each increment of resonant inductor currents ΔiLr dur- the resonant frequency at any load condition. The relation of
ing the period of “DQ a T” and “DP T” are the same, the duration voltage gain and switching frequency is depicted in Fig. 12.
“DP T” is achieved as follows: A PWM method is adopted in the proposed converter to in-
VC r (nVO − VC r ) crease the voltage gain during hold-up state operation. Fig. 11
DQ a T = DP T → DP T
Lr Lr shows the key waveforms of the proposed converter during hold-
up state operation. The shaded area AP in Fig. 11 implies the
VC r
= DQ a T. (3) total charge Q transferred from the input side to the secondary
(nVO − VC r )
load side. Thus, output voltage can be derived by calculating the
Using the voltage-second balance rule of the magnetizing in- area of AP , and total charge transferred to the load is represented
ductance Lm the voltage of the resonant capacitor is expressed as follows:
as (4) and the final equation of (4) means the average magnetiz- 0.5 × (Ipk DP T ) VO 1
ing inductor voltage during the time “DQ a T + DP T,” Q= = × . (7)
T RO n
0.5T (VS − VC r ) = nVO DP T + VC r (0.5 − DQ a − DP ) T Since DP T and Ipk values in (7) are calculated from the
0.5VO − nVO DP nVO DP following equations:
→ VC r = = . (4)
1 − DQ a − DP DQ a + DP VC r
DP T = DQ a T (8)
Therefore, the resonant capacitor voltage can be represented (nVO − VC r )
as (5). It means the half of the input voltage is applied to the VC r
resonant capacitor during the hold-up state operation Ipk = DQ a T. (9)
Lr
VC r = 0.5VS . (5) The dc conversion ratio of the proposed converter in hold-up
operation is expressed as (10) and Fig. 13
B. DC Conversion Ratio 
n 2 + 2 × L r × T × DQ a
1 1 RO 2
The proposed converter has two different input–output volt- VO n +
= . (10)
age conversion ratios depending on its operational state. For VS 4
nominal state, it has the same operational characteristic with
As shown in Fig 13, the voltage gain in hold-up state is
the conventional LLC resonant converter. Thus, voltage gain is
affected by the duty ratio of Qa , and the gain is linearly increased
affected by switching frequency, Fs , and the dc conversion ratio
followed by the duty ratio.
is expressed as
VO 1 C. Reduction of the Link Capacitor
=    .
VS  2 2  
2
After ac line lost, dc/dc converters are powered by energy
2n 1+ K1 1 − Fs
Fr
+ F r − F s 8n 2 Q
Fs Fr π2
stored in link capacitors. Therefore, hold-up time condition and
(6) the size of link capacitance are the major considerations when
846 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 2, FEBRUARY 2014

TABLE I
STANDARD RATINGS OF CAPACITORS <NIPPON CHEMICALS>

Fig. 13. Dc conversion ratio during hold-up period (at 75 W Specification).

Fig. 15. Current-second balance of the resonant capacitor.

achieved simply by increasing the maximum duty ratio of the

auxiliary switch Qa . Size of capacitors is highly affected by the
capacitances and the trend is represented in Table I.

D. Current Stress of Switches

The current stress of switches is a very important factor when
designing the proposed converter. In nominal state, the current
stresses of switches are the same with those of the conven-
tional converters, but this condition is changed for the hold-up
time operation. Different from the conventional LLC resonant
converter, the proposed converter shows boost PWM operation
during the hold-up state. Thus, the peak value and RMS value of
Fig. 14. Required link capacitance depending on minimum link voltage. the resonant inductor current are varied depending on the duty
ratio of Qa . Also, the dc offset current which is represented in
designing converters. This relation is represented as the magnetizing inductor affects the current stress of the con-
verter. The dc offset current is calculated using current-second
1 2  balance rule of the resonant capacitor Cr (see Fig. 15). Accord-
Clink × Vnom − Vm2 in ≥ PO t, t = hold - up time. (11)
2 ing to the current-second balance rule of the capacitor, sum of
Since the hold-up time condition and output power ratings are the total charge flows in and out of the resonant capacitor is zero.
given specifications in the system, minimum link voltage is the Therefore, the positive and the negative area in Fig. 15 should
only one factor which affects the link capacitance design. The be equal.
equation for the link capacitance design is derived from (11) The shaded area of each period, ta −tb , tb −tc , tc −td , td −te ,
and it is expressed as (12) and Fig. 14. and te −tf are expressed as follows:
2 Shaded area of ta −tb
Clink ≥ PO t × . (12)  
2
(Vnom − Vm2 in )
1 VC r
As shown in Fig. 14, the required capacitance for link capac- × × ILm × ILm . (13)
2 Lr
itors can be reduced by decreasing the minimum link voltage.
Therefore, converters are required to have high voltage gain Shaded area of tb −tc
characteristic to minimize the link capacitor size and increase    
the power density. 1 VC r Lr
× ×DQ a × T −ILm × DQ a × T − ILm × .
Since the dc conversion ratio of the proposed converter 2 Lr VC r
shows linear characteristic, reduction of link capacitor is easily (14)
CHO et al.: HALF-BRIDGE LLC RESONANT CONVERTER ADOPTING BOOST PWM CONTROL SCHEME 847

Fig. 16. Dc offset current of the magnetizing inductor (at 75 W Specification). Fig. 17. Maximum current stress of the primary switch (at 75 W Specification).

Shaded area of tc −td

   
1 VC r ×DQ a Lr ×ILm VC r
× − × DQ a ×T −ILm .
2 VC r −nVO (VC r −nVO ) T Lr
(15)
Shaded area of td − te
 
1 Lr
× ILm × ILm × . (16)
2 (nVO − VC r )
Shaded area of te −tf
 
VC r × DQ a × T
ILm × T − DQ a T − . (17)
(nVO − VC r )
By utilizing the aforementioned equations, (13), (14), (15),
(16), and (17), the dc offset current can be obtained as (18) and
it is represented as Fig. 16
⎛ ⎞
1 VC r 2 VC r Fig. 18. Voltage gain graph of LLC resonant converters with different K (at
ILm = D T × ⎝1 +   ⎠ . 75 W Specification).
2 Lr Q a NP / V − V
NS O C r
(18)
frequency variation range for hold-up state regulation. This de-
Since the resonant inductor current is build up in direct op-
sign condition increases the size of magnetic components and
position to the dc offset current of the magnetizing inductor
makes the converter operated in far from the optimal operat-
during the switching period of Qa , DQ a , the peak current stress
ing point. To reduce the frequency variation range, a low K
of the primary switch is obtained as (19) and Fig. 17. Also, the
(K=Lm /Lr ) design with small magnetizing inductance Lm is
maximum current stress of the auxiliary switch is the same as
typically used [9]–[20] (see Fig. 18) in LLC resonant convert-
that of the primary switch
ers. Although this method is beneficial to the magnetic compo-
VC r nents design, the reduced magnetizing inductor Lm increases
Ipk = DQ a T − ILm , (0 ≤ DQ a ≤ 0.5). (19)
Lr the RMS value of the primary current. Therefore, a low K de-
sign helps to decrease the frequency variation range, but it also
As shown in (19) and Fig. 17, the larger duty ratio requires
increases conduction loss of the converter in the nominal state.
the switches with the higher current stress.
Conduction loss comparison on different K value is presented
in Table II. Unlike the conventional converter, the proposed
E. Reduction of Conduction Loss in the Nominal State converter adopts boost PWM operation for hold-up state. Thus,
In conventional LLC resonant converters, the converter in- frequency variation is not required for hold-up state regulation
creases voltage gain by decreasing switching frequencies. Thus, and magnetic components design is not affected by hold-up time
the converter should be designed to be able to operate in wide condition. It makes the converter enable to design with high “K”
848 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 2, FEBRUARY 2014

TABLE II TABLE III

CONDUCTION LOSS ON VARIABLE K (AT 75 W SPECIFICATION) COMPONENTS USED IN THE EXPERIMENT

value and higher efficiency is achieved in the nominal state with

the proposed converter.

F. ZVS Condition for the Switches

To achieve high efficiency for converters, ZVS condition
should be considered when designing converters. The opera-
tional principle of the proposed converter in the nominal state
is the same as that of the conventional LLC resonant converters.
The output voltage builds up the magnetizing inductor current
during the powering period (20) and the built-up current is used
to discharge output capacitors of the switches during the dead
time of gate signals (21). Therefore, ZVS condition of the main
switches in an LLC resonant converter is represented as
 
1 (NP /NS )VO T
IL m pk = − tdead . (20)
2 Lm 2
IL m pk × tdead ≥ 2CO S S × VS . (21)
1 (NP /NS )VO × T × tdead
Lm ≤ (22)
8 Coss × VS
where IL m pk is the peak value of magnetizing inductor current,
tdead is the dead time of the switches, and Coss represents the
output capacitance of switches. The high magnetizing induc-
tor current results in conduction loss increases in the converter,
so that the magnetizing inductance should be designed to sat-
isfy both conditions, satisfying ZVS condition and minimizing
conduction loss increases.

V. EXPERIMENTAL RESULTS
To verify the effectiveness of the proposed converter, pro-
totypes of the proposed converter and the conventional LLC
resonant converter are designed with following 75 W LED TV
specifications:
1) input voltage range : 250 –400 V;
2) hold-up time : 60 ms;
3) output voltage : 250 V;
4) output power : 75 W (250 V/0.3 A); Fig. 19. Experimental waveforms of the proposed converter operation at min-
imum input voltage. (a) Nominal state. (b) Hold-up state.
5) nominal switching frequency: 100 kHz.
The components which are used in the experiment are listed
in Table III. The conventional LLC resonant converter is de- Also, the components used in both converters are the same ex-
signed with low “K( = Lm /Lr )” design condition to regulate cept the auxiliary switch and the transformers. The auxiliary
the output voltage with small frequency changes based on the switch is newly added in the proposed converter. Although the
theoretical analysis. Some margin is also considered due to the proposed converter does not need any frequency changes for
loss of the converter. The same input voltage range is applied in hold-up operation, the same transformer size is used in the ex-
designing both converters to match the size of input capacitors. periment because of the dc offset current of the magnetizing
CHO et al.: HALF-BRIDGE LLC RESONANT CONVERTER ADOPTING BOOST PWM CONTROL SCHEME
Fig. 20. ZVS condition at nominal input voltage. (a) Proposed converter.
(b) Conventional converter.
inductor. However, the transformer in the proposed converter
can be designed to have higher magnetizing inductance to re-
duce the RMS value of magnetizing inductor current. Fig. 19
shows the experimental waveforms of the proposed converter
both in nominal state operation and hold-up state operation with
the minimum input voltage condition (Vs = 250 V). As expected,
the proposed converter grows up its voltage gain by increasing
the duty ratio of the auxiliary switch. When no PWM gate signal
is applied to the auxiliary switch, the output voltage becomes
153 V and it increases to 250 V for hold-up state operation
with 20% duty ratio of the auxiliary switch Qa . The proposed
converter shows boost PWM operation during hold-up state and
the resonant inductor current is build up to −2.4 A while the
auxiliary switch is conducted. Operational comparisons of the
proposed converter and the conventional LLC resonant converter
in nominal state are represented in Fig. 20. The ZVS conditions
are achieved in both converters. Since the proposed converter
has higher magnetizing inductance, the RMS value and the peak
value of the primary current, which is the same with the reso-
nant inductor current in nominal state operation, is smaller in
the proposed converter than those of the conventional converter.
Transient response of the proposed converter is shown in Fig. 21.
Transient response is tested by changing the operational mode
of the proposed converter under the same input voltage con-
dition. Increased voltage gain is represented as the converter
changes its operational modes from nominal operation condi-
tion to hold-up time operation condition. A resonant inductor
849
Fig. 21. Experimental waveforms of the proposed converter in transient state:
iL r , and V O .
Fig. 22. Efficiency results in the nominal state.
current overshoot is represented when the operational mode is
changed, but this overshoot can be decreased by slowly increas-
ing the duty cycle of the auxiliary switch. Efficiency results in
nominal state are shown in Fig. 22. The proposed converter has
higher efficiency over the entire load condition because the loss
made by the primary current is reduced in the proposed con-
verter. The efficiency difference becomes maximized at light
load condition when the magnetizing inductor current takes up
significant portion in the total primary current.
VI. CONCLUSION
A new HB LLC resonant converter having boost PWM oper-
ation characteristic has been proposed. By adopting the PWM
control method with an auxiliary switch, the proposed LLC reso-
nant converter reduces its frequency variation range while main-
taining the advantages of the conventional LLC resonant con-
verters. Thus, high-K design with high Lm becomes enabled in
the proposed converter. It makes the converter have low magne-
tizing inductor current which results in reduced conduction loss
in the proposed converter. The characteristics of the proposed
converter are verified with a 75 W prototype and it is compared
with the LLC resonant converter. Efficiency increase is repre-
sented in the proposed converter over the entire load condition
from 0.86% efficiency improvement at full load condition to
3.69% efficiency improvement at 20% load condition. The effi-
ciency results verifies that the effectiveness of the proposed con-
verter and the benefit of the proposed converter becomes max-
imized at light load condition when the magnetizing inductor
850
current takes a large part in the total primary RMS current value.
Consequently, the proposed converter is expected to find wide
use for high-efficient dc/dc converter having hold-up time re-
quirements.
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vol. 27, no. 1, pp. 331–341, Jan. 2012.
[6] K. M. Cho, Y. D. Kim, I. H. Cho, and G. W. Moon, “Transformer inte-
grated with additional resonant inductor for phase-shift full-bridge con-
verter with primary clamping diodes,” IEEE Trans. Power Electron,
vol. 27, no. 5, pp. 2405–2414, May 2012.
[7] I. H Cho, K. M. Cho, J. W. Kim, and G. W. Moon, “A new phase-shifted
full-bridge converter with maximum duty operation for server power sys-
tem,” IEEE Trans. Power Electron., vol. 26, no. 12, pp. 3491–3500, Dec.
2011.
[8] Y. K. Lo, C. Y. Lin, M. T. Hsieh, and C. Y. Lin, “Phase-Shifted full-bridge
series-resonant DC-DC converters for wide load variations,” IEEE Trans.
Ind. Electron., vol. 58, no. 6, pp. 2572–2575, Jun. 2011.
[9] B. Yang, P. Xu, and F. C. Lee, “Range winding for wide input range front
end DC/DC converter,” in Proc. IEEE Appl. Power Electron. Conf. Expo.,
2001, pp. 476–479.
[10] G. Ivensky, S. Bronshtein, and A. Abramovitz, “Approximate analysis of
resonant LLC DC-DC converter,” IEEE Trans. Power Electron., vol. 26,
no. 11, pp. 3274–3284, Nov. 2011.
[11] X. Fang, H. Hu, Z. J. Shen, and I. batarseh, “Operation mode analysis and
peak gain approximation of the LLC resonant converter,” IEEE Trans.
Power Electron., vol. 27, no. 4, pp. 1985–1995, Apr. 2012.
[12] M. Y. Kim, B. C. Kim, K. B. Park, and G. W. Moon, “LLC series resonant
converter with auxiliary hold-up time compensation circuit,” in Proc.
IEEE Energy Convers. Congr. Expo. Asia, 2011, pp. 628–633.
[13] B. C. Kim, K. B. Park, S. W. Choi, and G. W. Moon, “LLC series resonant
converter with auxiliary circuit for hold-up time,” in Proc. IEEE Int.
Telecommun. Energy Conf., 2009, pp. 1–4.
[14] B. C. Kim, K. B Park, and G. W. Moon, “Asymmetric PWM control
scheme during hold-up time for LLC resonant converter,” IEEE Trans.
Ind. Electron., vol. 59, no. 7, pp. 2992–2997, Jul. 2012.
[15] I. O. Lee and G. W. Moon, “Analysis and design of a three-level LLC
series resonant converter for high- and wide-input-voltage applications,”
IEEE Trans. Power Electron., vol. 27, no. 6, pp. 2966–2979, Jun. 2012.
[16] R. Beiranvand, B. Rashidian, M. R. Zolghadri, and S. M. H. Alavi, “Op-
timizing the normalized dead-time and maximum switching frequency
of wide-adjustable-range LLC resonant converter,” IEEE Trans. Power
Electron., vol. 26, no. 2, pp. 462–472, Feb. 2011.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 2, FEBRUARY 2014
[17] R. Beiranvand, B. Rashidian, M. R. Zolghadri, and S. M. H. Alavi, “A
design procedure for optimizing the LLC resonant converter as a wide
output range voltage source,” IEEE Trans. Power Electron., vol. 27, no. 8,
pp. 3749–3763, Aug. 2012.
[18] B. Lu, W. Liu, Y. Liang, F. C. Lee, and J. D. Van Wyk, “Optimal design
methodology for LLC resonant converter,” presented at the IEEE Appl.
Power Electron. Conf. Expo., Blacksburg, VA, USA, 2006.
[19] S. S. Hong, S. H. Cho, C. W. Roh, and S. K. Han, “Precise analytical
solution for the peak gain of LLC resonant converters,” J. Power Electron.,
vol. 10, no. 6, pp. 680–685, 2010.
[20] K. B. Park, B. H. Lee, G. W. Moon, and M. J. Youn, “Analysis on center-
tap rectifier voltage oscillation of LLC resonant converter,” IEEE Trans.
Power Electron., vol. 27, no. 6, pp. 2684–2689, Jun. 2012.
In-Ho Cho (S’09) received the B.S. degree from Han-
Yang University, Seoul, in 2007, and the M.S. and
Ph.D. degrees in the electrical engineering from the
Korea Advanced Institute of Science and Technol-
ogy (KAIST), Daejeon, Korea, in 2009 and 2013,
respectively.
He is currently with LG Electronics. His main
research interests include dc/dc converter, power-
factor-correction (PFC) ac/dc converters, and server
power system.
Young-Do Kim (S’08) was born in Korea, in 1983.
He received the B.S. degree in the electrical engi-
neering and computer science Kore, the M.S. degree
in automobile engineering, and the Ph. D degrees in
the electrical engineering from the KAIST, Daejeon,
Korea, in 2006, 2008, and 2013, respectively.
He is currently a Senior Engineer in Power R&D
team of Samsung Electro-Mechanics Company, Ko-
rea. His main research-interests are dc/dc converters,
power-factor-correction (PFC) ac/dc converters, soft-
switching technique, sever power supply, and note-
book adapter.
Gun-Woo Moon (S’92-M’00) received the M.S. and
Ph.D. degrees in electrical engineering from the Ko-
rea Advanced Institute of Science and Technology
(KAIST), Daejeon, in 1992 and 1996, respectively.
He is currently a Professor in the Department of
Electrical Engineering, KAIST. His research inter-
ests include modeling, design and control of power
converters, soft-switching power converters, resonant
inverters, distributed power systems, power-factor
correction, electric drive systems, driver circuits of
plasma display panels, and flexible ac transmission
systems.
Dr. Moon is a Member of the Korean Institute of Power Electronics (KIPE),
Korean Institute of Electrical Engineers (KIEE), Korea Institute of Telematics
and Electronics (KITE), Korea Institute of Illumination Electronics and Indus-
trial Equipment (KIIEIE), and Society for Information Display (SID).