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AN3009
Phototransistor Switching Time Analysis
Authors: Van N. Tran Staff Application Engineer, CEL Opto Semiconductors
Robert Stuart, CEL Product Marketing Manager
Hardik Bhavsar, San Jose State University
Introduction use with digital circuits, and other situations where data or
pulse-edge events communicate between units.
A standard optocoupler provides signal transfer between
an isolated input and output via an infrared Emitting Diode
Parameter Definition
(IRED) and a silicon phototransistor. Optical isolation sends
a beam of infrared energy to an optical receiver in a single Rise time is the interval of time it takes a waveform, here the
package with a light-conducting medium between the output voltage (Vout) to increase from 10 percent to its 90
emitter and detector. This mechanism provides complete percent of its peak value, as shown in figure A.
electrical isolation of electronic circuits from input to output Fall time is the time interval required for a waveform,
while transmitting information from one side to the other, here the output voltage (Vout) to decrease from 90%
and from one voltage potential to another. to 10 percent of its peak value, as shown in figure A.
This application note addresses the rise and fall time char-
acteristics of a phototransistor used in common circuits,
compared to an improved circuit. Most common optocou-
plers have a limited switching speed when used in general- 90%
purpose applications. Here we explain the basic operating Output
behavior and outline a method to increase the operating Waveforms
speed behavior of the optocoupler. This modified circuit 10%
may provide an alternative in some cases where faster
switching edge times are required. tf
tr
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Tr Tf CTR
VCC
VOUT RL
100 Ω RL If
VOUT
D1 Q1
100 Ω
Figure 1.0: Common Collector Amplifier
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This configuration leads to overall improvement in rise and This configuration is duality of the cascode topology in figure
fall times of the signals under the same drive condition: Load 3.0. An NPN transistor, 2N4400, is used and a resistor divider
resistor 4.7 kΩ, pulsed at 1.0 kHz with 50% duty cycle at room network may be used to bias the 2N4400. Following our previ-
temperature TA=25°C, and Vcc = +5V. ous example, for the purpose of measuring rise time (tr) and
fall time (tf ), rb as shown in figure 4.0 is used.
In this topology, the phototransistor does not see the load
resistor RL, only the input resistance of the common base
transistor Q2, VCC
re = 25 mV / Ic (in mA.) rb RL
Figure 4A below shows the CTR, rise time (tr) and fall time (tf )
as a function of forward current under Vcc = 5 V @Ta = 25C
Figure 3: Current Transfere Ratio (CTR), T and Tf VS. Forward Current (IF) for
cascode configuration using PNP transistor for active high
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Additional info of the Rise Time, Fall Time and Performance comparisons for Common Collector, Common
CTR vs. Forward Current, If (mA) from different Emitter and our Cascode circuits at various base resistor val-
Topologies ues are shown in data tables in the Appendix. As well, we
have included data for the traditional Cascode circuit for
Following are the graphs for reference based on different comparison. In some cases, it may serve better, depending
topologies with the same load RL=4.7KΩ to measure rise on circuit topology.
time (tr), fall time (tf ), and RL= 100 to measure CTR, Vcc =
The alternating behavior of the Common Collector and Com-
5V, Rb = 1KΩ for cascode topology and the measurement
mon Emitter circuit with regard to rise and fall times is clearly
was made at Ta = 25C:
seen in the data. The modified Cascode at Vb=0V has the
1. Active low using common emitter and cascode: best performance, though with the lowest output signal. The
rise time of the modified Cascode at Vb=1 kΩ is similar to the
Common Collector circuit, and significantly faster than the
Common Emitter. Performance is adjusted at the bias volt-
age, with a tradeoff in collector and base currents through
the transistors.
The fall time of the modified Cascode is faster than the stan-
dard Common Collector stage, though not as fast as the Com-
mon Emitter on its own. Pick the active high or active low
requirement to fit your application. The traditional Cascode
topology has corollary performance for rise and fall times, as
seen in the data in the Appendix.
Conclusion:
Besides the general circuit configurations, such as Common
Emitter or Common Collector, the Cascode configuration
can improve the switching time and behavior of the circuit
by adding either a NPN or PNP transistor as in the examples
shown. In short, remember that the optocoupler has a tran-
sistor output that may be leveraged similar to any other tran-
sistor to overcome inherent device behavior. This paper pro-
vides a general design idea that can be used as a reference
to meet design needs.
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Appendix
These tables show data collected from the Cascode with PNP transistor (2N4402) circuit at: Load resistor is 4.7 kΩ, pulsed at 1.0
kHz with 50% duty cycle at room temperature (TA=25 degrees) and Vcc = +5V. CTR measurements were taken with RL = 110 Ω, to
create a similar comparison environment. Rise and fall time measurements were with the RL = 4.7 kΩ.
CTR Rb Rb Rb Rb
If (mA) 100 'W 470 ‘W 1000 ‘W 10,000 ‘W
1 215 211 222 222
2 280 284 287 284
3 255 291 303 310
4 241 295 309 327
5 225 294 309 327
6 215 285 303 318
7 205 270 283 294
8 189 245 257 268
9 174 223 236 246
10 160 207 222 225
Ic (mA) Rb Rb Rb Rb
If (mA) 100 ‘W 470 ‘W 1000 ‘W 10,000 ‘W
1 2.15 2.11 2.22 2.218
2 5.60 5.67 5.75 5.673
3 7.64 8.73 9.09 9.309
4 9.64 11.82 12.36 13.091
5 11.27 14.68 15.45 16.364
6 12.91 17.09 18.18 19.091
7 14.36 18.91 19.80 20.545
8 15.09 19.64 20.55 21.455
9 15.64 20.09 21.27 22.182
10 16.00 20.73 22.18 22.545
Trise (us) Rb Rb Rb Rb
If (mA) 100 ‘W 470 ‘W 1000 ‘W 10,000 ‘W
1 6.1 10.5 16.0 28.3
2 5.6 10.3 13.7 8.8
3 5.6 8.8 7.9 6.1
4 5.6 6.7 6.2 5.3
5 5.4 6.1 5.4 4.7
6 5.4 5.6 5.2 4.4
7 5.0 5.1 4.6 4.4
8 5.1 5.3 4.6 4.1
9 4.6 5.5 4.3 4.1
10 4.5 6.1 4.3 4.1
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Appendix (Continued)
Tfall (us) Rb Rb Rb Rb
If (mA) 100 ‘W 470 ‘W 1000 ‘W 10,000 ‘W
1 50.3 42.0 41.0 70.0
2 43.6 34.6 36.0 69.0
3 38.5 32.3 36.0 69.5
4 34.5 31.5 36.0 68.0
5 33.0 30.1 37.7 69.5
6 32.5 31.0 36.7 69.4
7 32.0 31.0 36.8 69.2
8 31.4 31.5 36.0 69.1
9 31.1 33.9 36.0 69.1
10 31.1 35.2 36.2 69.1
These tables show data collected from a standard Cascode circuit using an NPN transistor 2N4400 at: Load resistor is 4.7 kΩ,
pulsed at 1.0 kHz with 50% duty cycle at room temperature (TA=25 degrees) and Vcc = +5V. CTR measurements were taken with
RL = 110 Ω, to create a similar comparison environment. Rise and fall time measurements were with the RL = 4.7 kΩ.
CTR Rb Rb Rb Rb
If (mA) 100 ‘W 470 ‘W 1000 ‘W 10,000 ‘W
1 227 227 218 227
2 255 255 255 292
3 242 269 291 314
4 237 291 309 327
5 219 291 305 320
6 213 279 303 314
7 197 260 281 281
8 191 240 255 260
9 170 219 234 242
10 160 204 218 218
Ic (mA) Rb Rb Rb Rb
If (mA) 100 ‘W 470 ‘W 1000 ‘W 10,000 ‘W
1 2.273 2.273 2.182 2.273
2 5.091 5.091 5.091 5.845
3 7.273 8.073 8.727 9.427
4 9.473 11.636 12.364 13.091
5 10.927 14.545 15.273 16.000
6 12.773 16.727 18.182 18.864
7 13.818 18.182 19.636 19.655
8 15.273 19.164 20.364 20.782
9 15.273 19.709 21.091 21.782
10 16.000 20.364 21.773 21.818
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Appendix (Continued)
Trise (us) Rb Rb Rb Rb
If (mA) 100 ‘W 470 ‘W 1000 ‘W 10,000 ‘W
Tfall (us) Rb Rb Rb Rb
If (mA) 100 ‘W 470 ‘W 1000 ‘W 10,000 ‘W
1 6.5 11.5 16.0 31.2
2 6.0 10.3 13.7 8.9
3 6.0 9.1 7.9 6.2
4 6.1 6.7 6.5 5.2
5 5.9 5.7 5.8 4.7
6 5.3 6.1 5.2 4.5
7 5.1 5.7 4.6 4.2
8 5.1 6.2 4.3 4.3
9 4.8 6.3 4.6 3.8
10 4.9 6.2 4.4 3.9
Information and data presented here is subject to change without notice. California
Eastern Laboratories assumes no responsibility for the use of any circuits described
herein and makes no representations or warranties, expressed or implied, that such
circuits are free from patent infringement. 4590 Patrick Henry Drive, Santa Clara, CA 95054-1817
Tel. 408-919-2500 FAX 408-988-0279 www.cel.com
© California Eastern Laboratories 04/09
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