CHAPTER 5

MATLAB SIMULATION OF VSI FED SENSOR LESS BLDC

DRIVE
5.1 MATLAB SIMULATION OF VSI FED SENSOR LESS BLDC DRIVE
WITH CSC:
A MATLAB/Simulink environment is used to simulate the performance of a 600W sensor
less BLDCM drive system. Performance indices such as THD (TOTAL HARMONIC
DISTORTION) and PF (Power Factor) at the AC mains are computed to quantify the performance
of the proposed BLDC motor drive. Fig 5.1 shows the Simulink model involving CSC converter
fed BLDC in sensor less mode of operation.

Fig 5.1 Simulink model involving CSC converter fed BLDC in sensor less mode of operation.

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5.2 SIMULATED RESULTS FOR VSI FED SENSOR LESS BLDC DRIVE
WITH CSC:

Fig 5.2 stator current and back EMF.

The stator current after start up transient settles down to constant magnitude of 2.5A due to the
fixed stator resistance of the winding. Since the motor used here is the BLDC the back EMF should
be trapezoidal as shown in fig 5.2.

Figure 5.3 rotor speed

Figure 5.3 shows the rotor speed response which overshoots initially till 3050 rpm and then settles
at 3000 rpm and is maintained constant.so the machine operates at a constant speed.

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 Fig5.4 electromagnetic torque

Fig5.4 portrays the electromagnetic torque developed by BLDC drive operated in sensor less mode
involving CSC and VSI converters.

Fig 5.5 dc voltage

Fig 5.56 shows the DC link voltage with the motor loaded at the rated condition and the supply
voltage of 500 V.

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 Fig 5.6 Harmonic spectrum of AC mains current at rated voltage

Fig5.5 shows the harmonic spectrum of the AC mains current at near rated speed and the THD
obtained as 1.39% which is well below the international PQ standards limits. The THD of AC
mains current is maintained within 5% with near unity power factor operation.

5.3 ALGORITHM USED FOR SENSORLESS MODE OF OPERATION

OF BLDC USING ZCD:

Fig 5.7 zero crossing detection

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 The voltage drop resistor is used to measure the DC-bus current which is chopped by the
PWM. The obtained signal is rectified and amplified (0-3.3V with 1.65V offset). The internal
controller€s A/D converter and Zero Crossing detection are synchronized with the PWM signal.
This synchronization avoids spikes when the IGBTs (or MOSFETs) are switching and simplifies
the electric circuit.

The A/D converter is also used to sense the DC-Bus Voltage and drive Temperature. The
DC-Bus voltage is divided down to a 3.3V signal level by a resistor network. The six IGBTs
(copack with built-in fly back diode) or MOSFETs and gate drivers create a compact power stage.
The drivers provide the level shifting that is required to drive high side switch. PWM technique is
used to control the motor phase voltage.

Fig 5.8 Zero crossing detection model

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 Fig 5.9 Zero crossing decoding model

5.4 PERFORMANCE EVALUATION OF THE DRIVE UNDER

VARIOUS DISTURBANCES:

The power quality indices for the speed control and varying AC mains voltage have been
obtained within the limits by IEC 61000-3-2.The proposed drive system has been found suitable
among various adjustable speed drives for many low power applications.

5.4.1 POWER QUALITY PARAMETERS WITH INPUT AC VOLTAGE VARIATION FOR CSC
CONVERTER FED BLDC MOTOR DRIVE:
The performance of the proposed drive system has been evaluated under varying input AC
voltages and found satisfactory. The performance indices that are considered for analysis are
(i)THD (ii)PF
The power quality indices for the speed control and varying AC mains voltage have been
obtained within the limits by IEC 61000-3-2. The proposed drive system has been found suitable
among various adjustable speed drives for many low power applications.
(i)TOTAL HARMONIC DISTORTION:
The total harmonic distortion or THD of a signal is a measurement of the harmonic
distortion present and is defined as the ratio of the sum of the powers of all harmonic components

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to the power of the fundamental frequency. THD is used to characterize the linearity of audio
systems and th e p ower quality of power systems.
,

∑ , ,…
THD= or

(∑ ⋯ )
%THD=
(∑ ⋯ )

(ii) POWER FACTOR:

Power Factor can be defined as the cosine of the angle between the current and the
voltage. This power factor is also known as the Displacement power factor. The conventional
measurement of the power factor is relevant only for loads that are linear and the waveforms are
purely sinusoidal. With the increase in non-linear loads such as inverters, drives, etc. this
definition of the power factor is not adequate. This is because the harmonics have an impact on
the power factor.
Power factor=
√

Where THD refers to the total current harmonic distortion.

True power factor=displacement power factor*distortion power factor.

Table 5.1 POWER QUALITY PARAMETERS WITH VARIATION IN INPUT AC

VOLTAGE FOR CSC CONVERTER FED BLDC MOTOR DRIVE:

Motor speed(rpm) THD(%) PF

1000 45.12 0.9115
1500 41.64 0.9231
2000 36.98 0.9379
2500 27.87 0.9632
3000 23.79 0.9728

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Table 5.2 PERFORMANCE PARAMETERS OF THE SYSTEM UNDER THE CHANGE
IN SUPPLY VOLATGE:
Vs THD (%) DPF
(V)
180 29.72 0.9586

190 29.51 0.9591

200 26.06 0.9676

210 24.94 0.9702

220 24.87 0.9704

230 23.31 0.9738

5.5 MATLAB SIMULATION OF VSI FED SENSOR LESS BLDC DRIVE

WITHOUT CSC:
Performance indices such as THD (TOTAL HARMONIC DISTORTION) and PF (Power
Factor) at the AC mains are computed to quantify the performance of the proposed BLDC motor
drive. Fig 5.9 shows the Simulink model without CSC converter fed BLDC in sensor less mode of
operation.

Fig 5.10 Simulink model without CSC converter fed BLDC in sensor less mode of operation

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5.6 SIMULATED RESULTS FOR VSI FED SENSOR LESS BLDC DRIVE
WITHOUT CSC:

Fig 5.11 electromagnetic torque

Fig 5.10 portrays the electromagnetic torque developed by BLDC drive operated in sensor less
mode involving CSC and VSI converters.

Fig 5.12 rotor speed

Fig 5.11shows the rotor speed response which overshoots till 1000 rpm and then settles at 990 rpm
and is maintained constant.so the machine operates at a constant speed.

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 Fig 5.13 dc link volatge

Fig 5.13 shows the DC link voltage with the motor loaded at the rated condition and the supply
voltage of 200 V.

Fig 5.14 stator current and electromotive force

Fig 5.13 shows the stator current after start up transient settles down to constant magnitude of 2.5A
due to the fixed stator resistance of the winding. Since the motor used here is the BLDC the back
EMF should be trapezoidal as shown in fig 5.10

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Table 5.3 PERFORMANCE PARAMETERS OF THE SYSTEM UNDER THE CHANGE
IN SET SPEED:

SPEED THD(%) PF
(rpm)
1000 25.61 0.9687
1500 32.49 0.9510
2000 34.68 0.9447
2500 38.11 0.9344
3000 42.43 0.9070

Table 5.4 PERFORMANCE PARAMETERS OF THE SYSTEM UNDER THE CHANGE

IN SUPPLY VOLATGE:
VOLTAGE(Vs) THD(%) PF
180 22.98 0.9745
190 24.19 0.9719
200 27.72 0.9636
210 28.66 0.9612
220 30.73 0.9585
230 34.41 0.9455

5.7 SUMMARY:
The sensor less method of BLDC motor is simulated in MATLAB software. Simulation of
BLDC motor is carried out in sensor less mode with and without CSC and the waveforms of BLDC
motor such as stator control stator back EMF, electromagnetic torque and rotor speed were
obtained. The simulated results were tabulated in table 5.1 and 5.2.

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 PROPOSED WORKING
A PMBLDC which is a kind of three-phase synchronous motor with permanent magnets
(PMs) on the rotor and trapezoidal back EMF waveform, operates on electronic commutation
accomplished by solid state switches using PWM technique.. It is powered through a three-phase
voltage source inverter (VSI) which is fed from single-phase AC supply using a diode bridge
rectifier (DBR) followed by smoothening DC link capacitor.

The PMBLDCM drive, fed from a single-phase AC mains through a diode bridge rectifier
(DBR) followed by a DC link capacitor, suffers from power quality (PQ) disturbances such as poor
power factor (PF), increased total harmonic distortion (THD) of current at input AC mains It is
mainly due to uncontrolled charging of the DC link capacitor which results in a pulsed current
waveform having a peak value higher than the amplitude of the fundamental input current at AC
mains.

The conventional system use a DBR rectifier in the front end and MOSFET switch inverter
in the second stage to produce desired output voltage constituting a two-stage PFC drive. There are
serious contaminations from harmonic currents at the mains side, load side and the drive circuit
making the products not pass successfully.

In order to mitigate the harmonic components and reduce the displacement between voltage and
current waveform, the inverters are equipped with power factor corrector as front AC/DC converter
using filters. For the proposed voltage controlled drive, an additional CSE Converter is employed in
the input AC supply to control harmonics and bring the voltage and current wave forms almost in
phase with each other from the input AC supply.

A detailed modeling, design and performance evaluation of the conventional method and
proposed method is done and the results are compared by simulation and hardware
implementation of proposed method

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