Basic

 Transistor  Amplifier  Stages  

 Single  Transistor  Amplifier  Stages  
•  Common  Emi6er/Common  Source  (CE/CS)  
•  CE/CS  with  Emi6er/Source  Degrada?on  
•  Common  Base/Common  Gate  (CB/CG)  
•  Common  Collector/Common  Drain  (CC/CD)  
•  Cascode    
Common  Emi6er  Amplifier  
 Common  Emi6er  Amplifier  

Rin = rπ Rb1 Rb 2
Rout = RC r0
Rin
Av = −
Rin + RS
gm RC r0 RL ( )

For  a  d€
iscrete  implementa?on,  RC  <<  r0.  Also,  assume  RL  is  very  large.  Ignore  input  
voltage  division  (Rs  is  small).  Then,  

AV ≈ −gm RC
 Common  Emi6er  Amplifier  
•  However,  VC  is  limited  between  VCC  and  GND.  
Choose  VC=VCC/2  for  maximum  swing.  
•  Then,  RC=VCC/2IC.  
IC VCC VCC
AV = −gm RC = − =−
VT 2IC 2VT

€
 Common  Emi6er  Amplifier  
•  How  do  we  increase  voltage  gain?  
•  Make  RL  very  large.  Already  done.  
•  Make  Rin  very  large.  Already  done.  
•  Exchange  RC  with  a  current  source.  
 Common  Emi6er  Amplifier  
•  With  the  current  source,  

(
AV = −gm rCS r0 )
•  In  the  case  of  an  ideal  current  source,  
IC VA VA
€ A0 = −gm r0 = − =−
VT IC VT

•  This  is  called  intrinsic  gain  

€
 Common  Source  Amplifier  
•  The  circuit  is  the  same.  
Rin = Rg1 Rg 2
Rin = ∞ If  no  biasing  resistors  
Rout = RD r0
Rin
AV = − g R r R
Rin + Rsig m D 0 L
( )
•  For  a  discrete  implementa?on,  RD  <<  r0.  Also,  
assume  
€
RL  is  very  large.  Then,    

AV ≈ −gm RD
 Common  Source  Amplifier  
•  Connect  a  current  source  instead  of  RD  to  
increase  gain.  
•  The  intrinsic  gain  then  becomes,  
2ID VA 2VAʹ′
A0 = −gm r0 = − ≈− L
VGS − VT ID Vov

•  For  minimum  sized  devices  in  submicron  

technologies,  VA=VA’L=5…10V.  
€
•  Choose  Vov=0.2…0.3V  
 CS/CE  Amplifier  Frequency  Response  
•  RL’  includes  the  load  resistor  and  r0,  CL  
includes  the  load  capacitance  and  Cdb  

•  If  biasing  exists,  it  can  be  concentrated  into  

Rsig.  In  this  case,  it  becomes  R’sig.  
 CS/CE  Amplifier  Frequency  Response  
•  Three  ways  of  solving  this  circuit:  
–  Miller  Approxima?on  
–  Open  Circuit  Time  Constants  
–  Exact  Analysis  
 Miller  Analysis  
•  Correct  when  one  pole  is  dominant.  In  this  
case,  when  Rsig  is  large.  
1 1
f −3dB =
[ ]
2π (1+ gm Rʹ′L )Cgd + Cgs Rʹ′sig

•  Do  not  use  to  find  the  other  pole.  

€
 Method  of  Open  Circuit  Time  
Constants  

τGS = CGS Rʹ′sig

(
τGD = CGD RGD = CGD Rʹ′sig + Rʹ′L + gm Rʹ′L Rʹ′sig )
τ L = CL Rʹ′L
1
ωH ≈
τGS + τGD + τ L

€
 Exact  Analysis  
⎡ ⎛ Cgd ⎞⎤
−gm Rʹ′L ⎢1 − s⎜ gm ⎟⎠⎥⎦
⎣ ⎝
Av ( s) =
{[ ] ( ) } [(
1+ s Cgs + Cgd (1+ gm Rʹ′L ) Rʹ′sig + CL + Cgd Rʹ′L + s2 CL + Cgd Cgs + CL Cgd Rʹ′sig Rʹ′L ) ]

€ Posi?ve  zero  at  gm/Cgd  

1
ω p1 ≈
[C gs ] ( )
+ Cgd (1+ gm Rʹ′L ) Rʹ′sig + CL + Cgd Rʹ′L

ω p2 =
[ C gs + C (1+ g Rʹ′ )] Rʹ′ + (C + C ) Rʹ′
gd m L sig L gs L

[(C + C )C + C C ]Rʹ′ Rʹ′

L gd gs L gd L sig
 The  Case  When  Rsig  is  Low  

1
ωH =
(C L )
+ Cgd Rʹ′L

€
 Three  Cases  
•  Case  1:  Input  capacitance  dominant.  
•  Case  2:  Feedback  capacitance  dominant.  
•  Case  3:  Load  capacitance  dominant.  
•  Ignore  RL  for  this  analysis.  
Case  1:  Input  Capacitance  Dominant  

A0 = gm r0
1
BW =
2πRsig Cgs
gm r0 r0 1 1
GBW = = fT ∝
2πCgs Rsig Rsig WCox Vov

€
 Case  2:  Feedback  Capacitance  
Dominant  
A0 = gm r0
1
BW ≈
2πRsig A0C f
1
GBW =
2πRsig C f

€
Dependent   only  on  external  components  unless  Cf  is  Cgd.  In  any  case,  is  not  
affected  by  biasing.  
Case  3:  Load  Capacitance  Dominant  

A0 = gm r0
1
BW =
2πr0CL
gm
GBW =
2πCL

€
 Example  
•  A  circuit  with  ID=10µA  and  VGS-­‐VT=0.25V  was  
designed.  A  current  source  with  resistance  
100K  was  used  as  load.  Rsig  was  chosen  as  
100K  as  well.  
•  We  expect  the  component  due  to  Rsig  to  be  
dominant.    
•  gm=80µS,  the  gain  is  around  5.  
 Example  
•  The  3dB  point  is  at  700MHz  which  is  100K*
(6Cgd+Cgs)  
dB vdb(1)

-40.0

-45.0

-50.0
decibel

-55.0
XXX

-60.0

-65.0

-70.0
10^6 10^7 10^8 10^9 10^10
frequency Hz
 Example  
•  Now,  make  Rsig  very  small.  The  3dB  point  is  
determined  only  by  Cgd  and  RL’.  
dB vdb(1)

-43.0

-43.5

-44.0
decibel

-44.5
XXX

-45.0

-45.5

-46.0
10^6 10^7 10^8 10^9 10^10
frequency Hz
 Example  
•  Now,  add  a  large  load  capacitance  of  1pF.    
dB vdb(1)

-40

-50
decibel

-60
XXX

-70

-80
10^4 10^5 10^6 10^7 10^8
frequency Hz
 Example  2  
•  Design  a  single  transistor  amplifier  to  drive  
3pF  with  a  GBW  of  100MHz.    
•  This  is  a  CL  constrained  problem.  
gm
GBW =
2πCL
•  gm=1.9mS  
•  Choose  VGS-­‐VT=0.25V.  
€
•  ID=0.25mA  
 Example  2  
•  Choose  W=70µm  and  L=0.35µm  for  this  
current.  
dB vdb(1)

40

30

20
decibel

10
XXX

-10

-20
10^4 10^5 10^6 10^7 10^8 10^9
frequency Hz
 Example  2  
•  To  increase  the  gain,  mul?ply  both  W  and  L  by  
2.  Make  a  few  adjustments  to  bring  current  
back  to  0.25mA.  
dB vdb(1)

50

40

30

20
decibel

10 XXX

-10

-20
10^4 10^5 10^6 10^7 10^8 10^9
frequency Hz
Common  Gate  and  Common  Base  
Amplifiers  
 CG  Input  Resistance  
•  General  Expression  
v i − ii RL
ii = ( gm + gmb )v i +
r0
v r0 + RL
Rin = i =
ii 1+ (gm + gmb )r0

•  When  r0  is  large,  

€

1
Rin ≈
gm + gmb
•  When  RL  is  large,    
Rin →∞
€
 CG  Output  Resistance  
•  General  expression:  
[ ]
Rout = r0 + 1+ ( gm + gmb ) r0 Rsig

•  This  expression  can  be  rewri6en  as,  

€
[
Rout = Rsig + 1+ ( gm + gmb ) Rsig r0 ]
[
Rout ≈ 1+ ( gm + gmb ) Rsig r0]
Rout ≈ (1+ g R ) r
m sig 0
CG/CB  Voltage  Gain  
 CG  Voltage  Gain  
•  Since  the  input  and  output  currents  are  the  same,  

Av = =
[
RL RL 1+ ( gm + gmb ) r0
≈
]
gm r0 RL
Rin r0 + RL r0 + RL
•  When  RL  is  small  (the  case  in  discrete  design)  

€ Av ≈ gm RL

•  When  RL  =  r0,  Av  becomes  approximately  gmr0/2  

€
•  When  RL  is  large,  Av  becomes  1+(gm+gmb)r0  
 CG  Voltage  Gain  vs  RL  

Av  
14  

12  

10  

8  

6   Av  

4  

2  

0  
1.00E+03   1.00E+04   1.00E+05   1.00E+06   1.00E+07  
 CG  Frequency  Response  
•  Method  of  open  circuit  ?me  constants,  
(
τ p1 = Cgs Rsig Rin )
( )
τ p 2 = CL + Cgd ( RL Rout )
1
fH =
(
2π τ p1 + τ p 2 )

•  If  r0  had  
€
been  infinite,  two  independent  poles  
as  given  above.  
 CB  Input  Resistance  
•  General  expression:  
r0 + RL
Rin =
r RL
1+ 0 +
re ( β +1) re

•  When  β  goes  to  infinity,  

€ r0 + RL
Rin ≈
1+ gm r0
•  When  r0  is  neglected,  or  RL  is  taken  as  zero,  Rin  
becomes  simply  re.  
€
 CB  Output  Resistance  
•  General  expression  
Rout = r0 + (1+ gm r0 ) Rʹ′e where  
Rʹ′e = Re rπ

•  When  Re  is  zero,  Rout  =  r0  

•  When  
€ R  is  very  large,  
e

Rout = (1+ gm rπ ) r0 = (1+ β) r0 ≈ βr0

€
CB  Output  Resistance  vs  Emi6er  
Resistance  

Rout  
2.50E+07  

2.00E+07  

1.50E+07  

Rout  
1.00E+07  

5.00E+06  

0.00E+00  
1.E+02   1.E+03   1.E+04   1.E+05   1.E+06  
 CS  Amplifier  with  Source  Degenera?on  
•  The  output  resistance  can  be  found  as  earlier,  

[ ] [
Rout = r0 + 1+ ( gm + gmb ) r0 Rs ≈ r0 1+ ( gm + gmb ) Rs ]
•  The  transconductance  changes  to  
€ gm
Gm =
1+ ( gm + gmb ) Rs

€
 Frequency  Response  
•  Again,  use  the  method  of  open  circuit  ?me  
constants,  
Rgd = Rsig (1+ Gm Rʹ′L ) + Rʹ′L
RC L = RL Rout = Rʹ′L
Rsig + Rs
Rgs ≈
⎛ r0 ⎞
1+ ( gm + gmb ) Rs⎜ ⎟
r
⎝ 0 + RL ⎠

τ H = CgsRgs + Cgd Rgd + CL RC L

•  As  RS  increases,  the  gd  and  gs  ?me  constants  

decrease,   € leading  to  wider  bandwidth.  
 CE  with  Emi6er  Degenera?on  
•  Input  Resistance  
RL
r0 +
β +1
Rin = ( β +1) re + ( β +1) Re
r0 + RL + Re
1
Rin ≈ ( β +1) re + ( β +1) Re
R
1+ L r
0
•  Output  resistance  is  the  same  as  before,  
Rout ≈ r0 (1+ gm Rʹ′e )
€
•  The  transconductance  is  also  similar,  
gm
Gm =
€ 1+ gm Re
CD  (Source  Follower)  
 Source  Follower  
1
•  Define   Rʹ′L = RL r0
gmb
•  The  voltage  gain  is,  
gm Rʹ′L
Av =
€ 1+ gm Rʹ′L

•  If  RL  >>1/gmb,    
€
Rʹ′L ≈ 1 g
mb

gm 1 1
Av = = =
gm + gmb 1+ χ n
 Source  Follower  
•  Output  resistance  is  
1 1 1 1
Rout = r0 ≈ = =
gm + gmb gm + gmb (1+ χ) gm ngm

€
 Source  Follower  Frequency  Response  
•  The  source  follower  will  have  one  posi?ve  
zero.  The  dominant  pole  can  be  found  by  the  
method  of  open  circuit  ?me  constants.  
gm
fz =
2πCgs

•  Compare  this  to  fT.  Thus,  the  zero  is  very  far  
away.  
€
 Source  Follower  Frequency  Response  
•  The  dominant  pole  can  be  found  as    

Rgd = Rsig
Rsig + Rʹ′L
Rgs =
1+ gm Rʹ′L
RC L = RL Rout
1
fH =
(
2π Cgd Rsig + CgsRgs + CL RC L )

€
 Source  Follower  Frequency  Response  
•  Note  that  no  pole  may  be  dominant.  In  this  
case,  complex  poles  may  occur  and  peaking  
may  be  observed.    
•  A  good  rule  of  thumb  is  to  try  to  make                        
gm  =  1/RL’  
•  Also,  note  that  the  output  impedance  may  
show  induc?ve  behavior  at  high  frequencies.  
 Emi6er  Follower  
•  Input  resistance  
(
Rin = rπ + ( β +1) RL r0 )
•  Output  resistance  
rπ + Rsig
Rout = r0
€ β +1
•  Gain  
1
Av =
€ 1+ Rsig + rπ
(β +1)( RL r0 )
 Emi6er  Follower  
•  If  Rsig  <<rπ,  and  r0  is  very  large,  

gm RL
Av ≈
1+ gm RL

€
Emi6er  Follower  Frequency  Response  
1
ωz =
Cπ re
R µ = Rʹ′sig [ rπ + ( β +1) Rʹ′L ]
Rʹ′sig + Rʹ′L
Rπ =
Rʹ′sig Rʹ′L
1+ +
rπ re
Rʹ′sig = Rsig + rπ
Rʹ′L = RL r0
1
fH =
(
2π C µ R µ + Cπ Rπ )
 The  Cascode  Configura?on  
•  Bipolar  cascode  is  a  CE-­‐CB  configura?on.  
Ri = rπ 1
Gm ≈ gm1
⎛ ⎞
⎜ gm 2 r01 ⎟
Rout ≈ r02 ⎜1+ ⎟ ≈ βr02
g r
⎜⎜ 1+ m 2 01 ⎟⎟
⎝ β ⎠

•  Maximum  gain  available  when  RL  is  infinite.  

€
Av max = −Gm Rout ≈ −gm1r02 β
 The  Cascode  Configura?on  
•  MOS  cascode  is  CS-­‐CG  configura?on.  
Rin →∞
⎛ ⎞
io ⎜ 1 ⎟
Gm = v o =0 = gm1⎜1 − ⎟ ≈ gm1
vi r
⎜ 1+ ( g + g ) r + 01 ⎟
⎜ m2 mb 2 01 ⎟
⎝ r02 ⎠

r02 + Rʹ′L 1 Rʹ′L

Ri2 = ≈ +
1+ ( gm 2 + gmb 2 ) r02 gm 2 + gmb 2 ( gm 2 + gmb 2 ) r02
€

Rout = r01 + r02 + ( gm 2 + gmb 2 ) r01r02 ≈ ( gm 2 + gmb 2 ) r01r02

€
 Frequency  Response  of  the  MOS  
Cascode  
•  Capacitance  Cgs1  sees  a  resistance  Rsig.  
•  Capacitance  Cgd1  sees  a  resistance  Rgd1  which  is  
( ( ))
Rgd1 = 1+ gm1 Ri2 r01 Rsig + Ri2 r01

•  Capacitance  Cdb1+Cgs2  sees  a  resistance  Ri2||r01  

•  Capacitance  CL+Cgd2  sees  a  resistance  RL||Rout.  
€
 Frequency  Response  of  the  MOS  
Cascode    
•  If  CL  is  the  dominant  capacitance,  the  GBW  is  
the  same  as  a  simple  CS  amplifier.  
gm1
GBW =
2πCL

•  The  GBW  advantage  of  the  cascode  is  seen  

only  when  
€ the  term  due  to  C  is  not  dominant.  
L
Ac?ve  Cascode  
 Ac?ve  Cascode  
•  The  circuit  works  by  stabilizing  the  drain  
voltage  of  M1,  thus  increasing  its  output  
impedance.  
v gs2 = v g 2 − v s2 = v g 2 − v ds1 = −av ds1 − v ds1 = −( a +1)v ds1

⎛ ⎞
⎜ 1 ⎟
€ Gm = gm1⎜1 − ⎟ ≈ gm1
r
⎜ 1+ [ g ( a +1) + g ] r + 01 ⎟
⎜ m2 mb 2 01 ⎟
⎝ r02 ⎠
Rout = r01 + r02 + [ gm 2 ( a +1) + gmb 2 ] r01r02 ≈ [ gm 2 ( a +1) + gmb 2 ] r01r02

€
 Ac?ve  Cascode  
•  Advantages  
–  Rout  has  been  boosted  without  the  need  for  an  
extra  cascode  stage  =>  low  voltage.  
•  Disadvantages  
–  Amplifier  has  to  work  at  all  the  frequencies.  
–  Be  careful  about  stability  and  se6ling  ?me.  
 A  Simpler  Ac?ve  Cascode  
•  Some?mes  called  regulated  cascode  

•  Av  =  (gmr0)1(gmr0)2(gmr0)3  
Super  Source  Follower  
 Super  Source  Follower  
•  If  Vout  increases,  the  source  and  drain  current  
of  M1  increase  by  a  factor  which  is  1/Rout  of  CD  
M1.  
•  This  current  increase  increases  the  gate  
voltage  of  M2.  
•  The  drain  current  of  M2  increases,  subtrac?ng  
from  the  output  current.    
•  Thus,  the  current  change  becomes  smaller,  
resul?ng  in  smaller  Rout.  
 Super  Source  Follower  
⎛ ⎞
r01 + rcs2
Rout = rcs1 r02 ⎜ ⎟
⎝ [ m1 mb1 01 ]
⎜ 1+ ( g + g ) r (1+ g r ) ⎟
m 2 cs2 ⎠

1 ⎛ 1 ⎞
Rout ≈ ⎜ ⎟
gm1 + gmb1 ⎝ gm 2 r01 ⎠
gm1r01
Av =
rcs2 + r01
1+ ( gm1 + gmb1 ) r01 +
( )
rcs1 r02 (1+ gm 2 rcs2 )

With  ideal  current  sources,  

€
gm1r01
Av ≈
1
1+ ( gm1 + gmb1 ) r01 +
gm 2 r02